dp_rx.c 65 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. #ifdef CONFIG_MCL
  41. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  42. {
  43. if (vdev->opmode != wlan_op_mode_sta)
  44. return true;
  45. else
  46. return false;
  47. }
  48. #else
  49. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  50. {
  51. return vdev->ap_bridge_enabled;
  52. }
  53. #endif
  54. /*
  55. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  56. *
  57. * @soc: core txrx main context
  58. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  59. * @ring_desc: opaque pointer to the RX ring descriptor
  60. * @rx_desc: host rs descriptor
  61. *
  62. * Return: void
  63. */
  64. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  65. void *ring_desc, struct dp_rx_desc *rx_desc)
  66. {
  67. void *hal_soc = soc->hal_soc;
  68. dp_rx_desc_dump(rx_desc);
  69. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  70. hal_srng_dump_ring(hal_soc, hal_ring);
  71. qdf_assert_always(0);
  72. }
  73. /*
  74. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  75. * called during dp rx initialization
  76. * and at the end of dp_rx_process.
  77. *
  78. * @soc: core txrx main context
  79. * @mac_id: mac_id which is one of 3 mac_ids
  80. * @dp_rxdma_srng: dp rxdma circular ring
  81. * @rx_desc_pool: Pointer to free Rx descriptor pool
  82. * @num_req_buffers: number of buffer to be replenished
  83. * @desc_list: list of descs if called from dp_rx_process
  84. * or NULL during dp rx initialization or out of buffer
  85. * interrupt.
  86. * @tail: tail of descs list
  87. * Return: return success or failure
  88. */
  89. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  90. struct dp_srng *dp_rxdma_srng,
  91. struct rx_desc_pool *rx_desc_pool,
  92. uint32_t num_req_buffers,
  93. union dp_rx_desc_list_elem_t **desc_list,
  94. union dp_rx_desc_list_elem_t **tail)
  95. {
  96. uint32_t num_alloc_desc;
  97. uint16_t num_desc_to_free = 0;
  98. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  99. uint32_t num_entries_avail;
  100. uint32_t count;
  101. int sync_hw_ptr = 1;
  102. qdf_dma_addr_t paddr;
  103. qdf_nbuf_t rx_netbuf;
  104. void *rxdma_ring_entry;
  105. union dp_rx_desc_list_elem_t *next;
  106. QDF_STATUS ret;
  107. void *rxdma_srng;
  108. rxdma_srng = dp_rxdma_srng->hal_srng;
  109. if (!rxdma_srng) {
  110. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  111. "rxdma srng not initialized");
  112. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  113. return QDF_STATUS_E_FAILURE;
  114. }
  115. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  116. "requested %d buffers for replenish", num_req_buffers);
  117. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  118. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  119. rxdma_srng,
  120. sync_hw_ptr);
  121. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  122. "no of available entries in rxdma ring: %d",
  123. num_entries_avail);
  124. if (!(*desc_list) && (num_entries_avail >
  125. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  126. num_req_buffers = num_entries_avail;
  127. } else if (num_entries_avail < num_req_buffers) {
  128. num_desc_to_free = num_req_buffers - num_entries_avail;
  129. num_req_buffers = num_entries_avail;
  130. }
  131. if (qdf_unlikely(!num_req_buffers)) {
  132. num_desc_to_free = num_req_buffers;
  133. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  134. goto free_descs;
  135. }
  136. /*
  137. * if desc_list is NULL, allocate the descs from freelist
  138. */
  139. if (!(*desc_list)) {
  140. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  141. rx_desc_pool,
  142. num_req_buffers,
  143. desc_list,
  144. tail);
  145. if (!num_alloc_desc) {
  146. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  147. "no free rx_descs in freelist");
  148. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  149. num_req_buffers);
  150. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  151. return QDF_STATUS_E_NOMEM;
  152. }
  153. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  154. "%d rx desc allocated", num_alloc_desc);
  155. num_req_buffers = num_alloc_desc;
  156. }
  157. count = 0;
  158. while (count < num_req_buffers) {
  159. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  160. RX_BUFFER_SIZE,
  161. RX_BUFFER_RESERVATION,
  162. RX_BUFFER_ALIGNMENT,
  163. FALSE);
  164. if (qdf_unlikely(!rx_netbuf)) {
  165. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  166. break;
  167. }
  168. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  169. QDF_DMA_FROM_DEVICE);
  170. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  171. qdf_nbuf_free(rx_netbuf);
  172. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  173. continue;
  174. }
  175. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  176. /*
  177. * check if the physical address of nbuf->data is
  178. * less then 0x50000000 then free the nbuf and try
  179. * allocating new nbuf. We can try for 100 times.
  180. * this is a temp WAR till we fix it properly.
  181. */
  182. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  183. if (ret == QDF_STATUS_E_FAILURE) {
  184. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  185. break;
  186. }
  187. count++;
  188. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  189. rxdma_srng);
  190. qdf_assert_always(rxdma_ring_entry);
  191. next = (*desc_list)->next;
  192. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  193. /* rx_desc.in_use should be zero at this time*/
  194. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  195. (*desc_list)->rx_desc.in_use = 1;
  196. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  197. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  198. (unsigned long long)paddr,
  199. (*desc_list)->rx_desc.cookie);
  200. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  201. (*desc_list)->rx_desc.cookie,
  202. rx_desc_pool->owner);
  203. *desc_list = next;
  204. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  205. }
  206. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  207. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  208. count, num_desc_to_free);
  209. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  210. (RX_BUFFER_SIZE * count));
  211. free_descs:
  212. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  213. /*
  214. * add any available free desc back to the free list
  215. */
  216. if (*desc_list)
  217. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  218. mac_id, rx_desc_pool);
  219. return QDF_STATUS_SUCCESS;
  220. }
  221. /*
  222. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  223. * pkts to RAW mode simulation to
  224. * decapsulate the pkt.
  225. *
  226. * @vdev: vdev on which RAW mode is enabled
  227. * @nbuf_list: list of RAW pkts to process
  228. * @peer: peer object from which the pkt is rx
  229. *
  230. * Return: void
  231. */
  232. void
  233. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  234. struct dp_peer *peer)
  235. {
  236. qdf_nbuf_t deliver_list_head = NULL;
  237. qdf_nbuf_t deliver_list_tail = NULL;
  238. qdf_nbuf_t nbuf;
  239. nbuf = nbuf_list;
  240. while (nbuf) {
  241. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  242. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  243. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  244. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  245. /*
  246. * reset the chfrag_start and chfrag_end bits in nbuf cb
  247. * as this is a non-amsdu pkt and RAW mode simulation expects
  248. * these bit s to be 0 for non-amsdu pkt.
  249. */
  250. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  251. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  252. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  253. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  254. }
  255. nbuf = next;
  256. }
  257. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  258. &deliver_list_tail, (struct cdp_peer*) peer);
  259. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  260. }
  261. #ifdef DP_LFR
  262. /*
  263. * In case of LFR, data of a new peer might be sent up
  264. * even before peer is added.
  265. */
  266. static inline struct dp_vdev *
  267. dp_get_vdev_from_peer(struct dp_soc *soc,
  268. uint16_t peer_id,
  269. struct dp_peer *peer,
  270. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  271. {
  272. struct dp_vdev *vdev;
  273. uint8_t vdev_id;
  274. if (unlikely(!peer)) {
  275. if (peer_id != HTT_INVALID_PEER) {
  276. vdev_id = DP_PEER_METADATA_ID_GET(
  277. mpdu_desc_info.peer_meta_data);
  278. QDF_TRACE(QDF_MODULE_ID_DP,
  279. QDF_TRACE_LEVEL_DEBUG,
  280. FL("PeerID %d not found use vdevID %d"),
  281. peer_id, vdev_id);
  282. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  283. vdev_id);
  284. } else {
  285. QDF_TRACE(QDF_MODULE_ID_DP,
  286. QDF_TRACE_LEVEL_DEBUG,
  287. FL("Invalid PeerID %d"),
  288. peer_id);
  289. return NULL;
  290. }
  291. } else {
  292. vdev = peer->vdev;
  293. }
  294. return vdev;
  295. }
  296. #else
  297. static inline struct dp_vdev *
  298. dp_get_vdev_from_peer(struct dp_soc *soc,
  299. uint16_t peer_id,
  300. struct dp_peer *peer,
  301. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  302. {
  303. if (unlikely(!peer)) {
  304. QDF_TRACE(QDF_MODULE_ID_DP,
  305. QDF_TRACE_LEVEL_DEBUG,
  306. FL("Peer not found for peerID %d"),
  307. peer_id);
  308. return NULL;
  309. } else {
  310. return peer->vdev;
  311. }
  312. }
  313. #endif
  314. #ifndef FEATURE_WDS
  315. static void
  316. dp_rx_da_learn(struct dp_soc *soc,
  317. uint8_t *rx_tlv_hdr,
  318. struct dp_peer *ta_peer,
  319. qdf_nbuf_t nbuf)
  320. {
  321. }
  322. #endif
  323. /*
  324. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  325. *
  326. * @soc: core txrx main context
  327. * @ta_peer : source peer entry
  328. * @rx_tlv_hdr : start address of rx tlvs
  329. * @nbuf : nbuf that has to be intrabss forwarded
  330. *
  331. * Return: bool: true if it is forwarded else false
  332. */
  333. static bool
  334. dp_rx_intrabss_fwd(struct dp_soc *soc,
  335. struct dp_peer *ta_peer,
  336. uint8_t *rx_tlv_hdr,
  337. qdf_nbuf_t nbuf)
  338. {
  339. uint16_t da_idx;
  340. uint16_t len;
  341. uint8_t is_frag;
  342. struct dp_peer *da_peer;
  343. struct dp_ast_entry *ast_entry;
  344. qdf_nbuf_t nbuf_copy;
  345. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  346. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  347. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  348. tid_stats.tid_rx_stats[ring_id][tid];
  349. /* check if the destination peer is available in peer table
  350. * and also check if the source peer and destination peer
  351. * belong to the same vap and destination peer is not bss peer.
  352. */
  353. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  354. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  355. ast_entry = soc->ast_table[da_idx];
  356. if (!ast_entry)
  357. return false;
  358. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  359. ast_entry->is_active = TRUE;
  360. return false;
  361. }
  362. da_peer = ast_entry->peer;
  363. if (!da_peer)
  364. return false;
  365. /* TA peer cannot be same as peer(DA) on which AST is present
  366. * this indicates a change in topology and that AST entries
  367. * are yet to be updated.
  368. */
  369. if (da_peer == ta_peer)
  370. return false;
  371. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  372. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  373. is_frag = qdf_nbuf_is_frag(nbuf);
  374. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  375. /* linearize the nbuf just before we send to
  376. * dp_tx_send()
  377. */
  378. if (qdf_unlikely(is_frag)) {
  379. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  380. return false;
  381. nbuf = qdf_nbuf_unshare(nbuf);
  382. if (!nbuf) {
  383. DP_STATS_INC_PKT(ta_peer,
  384. rx.intra_bss.fail,
  385. 1,
  386. len);
  387. /* return true even though the pkt is
  388. * not forwarded. Basically skb_unshare
  389. * failed and we want to continue with
  390. * next nbuf.
  391. */
  392. tid_stats->fail_cnt[INTRABSS_DROP]++;
  393. return true;
  394. }
  395. }
  396. if (!dp_tx_send(ta_peer->vdev, nbuf)) {
  397. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  398. len);
  399. return true;
  400. } else {
  401. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  402. len);
  403. tid_stats->fail_cnt[INTRABSS_DROP]++;
  404. return false;
  405. }
  406. }
  407. }
  408. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  409. * source, then clone the pkt and send the cloned pkt for
  410. * intra BSS forwarding and original pkt up the network stack
  411. * Note: how do we handle multicast pkts. do we forward
  412. * all multicast pkts as is or let a higher layer module
  413. * like igmpsnoop decide whether to forward or not with
  414. * Mcast enhancement.
  415. */
  416. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  417. !ta_peer->bss_peer))) {
  418. nbuf_copy = qdf_nbuf_copy(nbuf);
  419. if (!nbuf_copy)
  420. return false;
  421. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  422. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  423. if (dp_tx_send(ta_peer->vdev, nbuf_copy)) {
  424. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  425. tid_stats->fail_cnt[INTRABSS_DROP]++;
  426. qdf_nbuf_free(nbuf_copy);
  427. } else {
  428. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  429. tid_stats->intrabss_cnt++;
  430. }
  431. }
  432. /* return false as we have to still send the original pkt
  433. * up the stack
  434. */
  435. return false;
  436. }
  437. #ifdef MESH_MODE_SUPPORT
  438. /**
  439. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  440. *
  441. * @vdev: DP Virtual device handle
  442. * @nbuf: Buffer pointer
  443. * @rx_tlv_hdr: start of rx tlv header
  444. * @peer: pointer to peer
  445. *
  446. * This function allocated memory for mesh receive stats and fill the
  447. * required stats. Stores the memory address in skb cb.
  448. *
  449. * Return: void
  450. */
  451. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  452. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  453. {
  454. struct mesh_recv_hdr_s *rx_info = NULL;
  455. uint32_t pkt_type;
  456. uint32_t nss;
  457. uint32_t rate_mcs;
  458. uint32_t bw;
  459. /* fill recv mesh stats */
  460. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  461. /* upper layers are resposible to free this memory */
  462. if (!rx_info) {
  463. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  464. "Memory allocation failed for mesh rx stats");
  465. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  466. return;
  467. }
  468. rx_info->rs_flags = MESH_RXHDR_VER1;
  469. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  470. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  471. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  472. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  473. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  474. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  475. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  476. if (vdev->osif_get_key)
  477. vdev->osif_get_key(vdev->osif_vdev,
  478. &rx_info->rs_decryptkey[0],
  479. &peer->mac_addr.raw[0],
  480. rx_info->rs_keyix);
  481. }
  482. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  483. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  484. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  485. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  486. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  487. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  488. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  489. (bw << 24);
  490. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  491. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  492. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  493. rx_info->rs_flags,
  494. rx_info->rs_rssi,
  495. rx_info->rs_channel,
  496. rx_info->rs_ratephy1,
  497. rx_info->rs_keyix);
  498. }
  499. /**
  500. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  501. *
  502. * @vdev: DP Virtual device handle
  503. * @nbuf: Buffer pointer
  504. * @rx_tlv_hdr: start of rx tlv header
  505. *
  506. * This checks if the received packet is matching any filter out
  507. * catogery and and drop the packet if it matches.
  508. *
  509. * Return: status(0 indicates drop, 1 indicate to no drop)
  510. */
  511. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  512. uint8_t *rx_tlv_hdr)
  513. {
  514. union dp_align_mac_addr mac_addr;
  515. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  516. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  517. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  518. return QDF_STATUS_SUCCESS;
  519. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  520. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  521. return QDF_STATUS_SUCCESS;
  522. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  523. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  524. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  525. return QDF_STATUS_SUCCESS;
  526. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  527. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  528. &mac_addr.raw[0]))
  529. return QDF_STATUS_E_FAILURE;
  530. if (!qdf_mem_cmp(&mac_addr.raw[0],
  531. &vdev->mac_addr.raw[0],
  532. QDF_MAC_ADDR_SIZE))
  533. return QDF_STATUS_SUCCESS;
  534. }
  535. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  536. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  537. &mac_addr.raw[0]))
  538. return QDF_STATUS_E_FAILURE;
  539. if (!qdf_mem_cmp(&mac_addr.raw[0],
  540. &vdev->mac_addr.raw[0],
  541. QDF_MAC_ADDR_SIZE))
  542. return QDF_STATUS_SUCCESS;
  543. }
  544. }
  545. return QDF_STATUS_E_FAILURE;
  546. }
  547. #else
  548. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  549. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  550. {
  551. }
  552. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  553. uint8_t *rx_tlv_hdr)
  554. {
  555. return QDF_STATUS_E_FAILURE;
  556. }
  557. #endif
  558. #ifdef FEATURE_NAC_RSSI
  559. /**
  560. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  561. * clients
  562. * @pdev: DP pdev handle
  563. * @rx_pkt_hdr: Rx packet Header
  564. *
  565. * return: dp_vdev*
  566. */
  567. static
  568. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  569. uint8_t *rx_pkt_hdr)
  570. {
  571. struct ieee80211_frame *wh;
  572. struct dp_neighbour_peer *peer = NULL;
  573. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  574. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  575. return NULL;
  576. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  577. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  578. neighbour_peer_list_elem) {
  579. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  580. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  581. QDF_TRACE(
  582. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  583. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  584. peer->neighbour_peers_macaddr.raw[0],
  585. peer->neighbour_peers_macaddr.raw[1],
  586. peer->neighbour_peers_macaddr.raw[2],
  587. peer->neighbour_peers_macaddr.raw[3],
  588. peer->neighbour_peers_macaddr.raw[4],
  589. peer->neighbour_peers_macaddr.raw[5]);
  590. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  591. return pdev->monitor_vdev;
  592. }
  593. }
  594. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  595. return NULL;
  596. }
  597. /**
  598. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  599. * @soc: DP SOC handle
  600. * @mpdu: mpdu for which peer is invalid
  601. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  602. * pool_id has same mapping)
  603. *
  604. * return: integer type
  605. */
  606. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  607. uint8_t mac_id)
  608. {
  609. struct dp_invalid_peer_msg msg;
  610. struct dp_vdev *vdev = NULL;
  611. struct dp_pdev *pdev = NULL;
  612. struct ieee80211_frame *wh;
  613. qdf_nbuf_t curr_nbuf, next_nbuf;
  614. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  615. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  616. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  617. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  618. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  619. "Drop decapped frames");
  620. goto free;
  621. }
  622. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  623. if (!DP_FRAME_IS_DATA(wh)) {
  624. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  625. "NAWDS valid only for data frames");
  626. goto free;
  627. }
  628. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  630. "Invalid nbuf length");
  631. goto free;
  632. }
  633. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  634. if (!pdev) {
  635. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  636. "PDEV not found");
  637. goto free;
  638. }
  639. if (pdev->filter_neighbour_peers) {
  640. /* Next Hop scenario not yet handle */
  641. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  642. if (vdev) {
  643. dp_rx_mon_deliver(soc, pdev->pdev_id,
  644. pdev->invalid_peer_head_msdu,
  645. pdev->invalid_peer_tail_msdu);
  646. pdev->invalid_peer_head_msdu = NULL;
  647. pdev->invalid_peer_tail_msdu = NULL;
  648. return 0;
  649. }
  650. }
  651. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  652. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  653. QDF_MAC_ADDR_SIZE) == 0) {
  654. goto out;
  655. }
  656. }
  657. if (!vdev) {
  658. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  659. "VDEV not found");
  660. goto free;
  661. }
  662. out:
  663. msg.wh = wh;
  664. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  665. msg.nbuf = mpdu;
  666. msg.vdev_id = vdev->vdev_id;
  667. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  668. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  669. &msg);
  670. free:
  671. /* Drop and free packet */
  672. curr_nbuf = mpdu;
  673. while (curr_nbuf) {
  674. next_nbuf = qdf_nbuf_next(curr_nbuf);
  675. qdf_nbuf_free(curr_nbuf);
  676. curr_nbuf = next_nbuf;
  677. }
  678. return 0;
  679. }
  680. /**
  681. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  682. * @soc: DP SOC handle
  683. * @mpdu: mpdu for which peer is invalid
  684. * @mpdu_done: if an mpdu is completed
  685. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  686. * pool_id has same mapping)
  687. *
  688. * return: integer type
  689. */
  690. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  691. qdf_nbuf_t mpdu, bool mpdu_done,
  692. uint8_t mac_id)
  693. {
  694. /* Only trigger the process when mpdu is completed */
  695. if (mpdu_done)
  696. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  697. }
  698. #else
  699. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  700. uint8_t mac_id)
  701. {
  702. qdf_nbuf_t curr_nbuf, next_nbuf;
  703. struct dp_pdev *pdev;
  704. struct dp_vdev *vdev = NULL;
  705. struct ieee80211_frame *wh;
  706. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  707. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  708. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  709. if (!DP_FRAME_IS_DATA(wh)) {
  710. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  711. "only for data frames");
  712. goto free;
  713. }
  714. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  715. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  716. "Invalid nbuf length");
  717. goto free;
  718. }
  719. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  720. if (!pdev) {
  721. QDF_TRACE(QDF_MODULE_ID_DP,
  722. QDF_TRACE_LEVEL_ERROR,
  723. "PDEV not found");
  724. goto free;
  725. }
  726. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  727. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  728. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  729. QDF_MAC_ADDR_SIZE) == 0) {
  730. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  731. goto out;
  732. }
  733. }
  734. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  735. if (!vdev) {
  736. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  737. "VDEV not found");
  738. goto free;
  739. }
  740. out:
  741. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  742. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  743. free:
  744. /* reset the head and tail pointers */
  745. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  746. if (pdev) {
  747. pdev->invalid_peer_head_msdu = NULL;
  748. pdev->invalid_peer_tail_msdu = NULL;
  749. }
  750. /* Drop and free packet */
  751. curr_nbuf = mpdu;
  752. while (curr_nbuf) {
  753. next_nbuf = qdf_nbuf_next(curr_nbuf);
  754. qdf_nbuf_free(curr_nbuf);
  755. curr_nbuf = next_nbuf;
  756. }
  757. return 0;
  758. }
  759. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  760. qdf_nbuf_t mpdu, bool mpdu_done,
  761. uint8_t mac_id)
  762. {
  763. /* Process the nbuf */
  764. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  765. }
  766. #endif
  767. #ifdef RECEIVE_OFFLOAD
  768. /**
  769. * dp_rx_print_offload_info() - Print offload info from RX TLV
  770. * @rx_tlv: RX TLV for which offload information is to be printed
  771. *
  772. * Return: None
  773. */
  774. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  775. {
  776. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  777. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  778. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  779. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  780. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  781. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  782. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  783. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  784. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  785. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  786. dp_verbose_debug("---------------------------------------------------------");
  787. }
  788. /**
  789. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  790. * @soc: DP SOC handle
  791. * @rx_tlv: RX TLV received for the msdu
  792. * @msdu: msdu for which GRO info needs to be filled
  793. *
  794. * Return: None
  795. */
  796. static
  797. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  798. qdf_nbuf_t msdu)
  799. {
  800. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  801. return;
  802. /* Filling up RX offload info only for TCP packets */
  803. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  804. return;
  805. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  806. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  807. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  808. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  809. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  810. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  811. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  812. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  813. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  814. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  815. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  816. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  817. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  818. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  819. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  820. HAL_RX_TLV_GET_IPV6(rx_tlv);
  821. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  822. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  823. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  824. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  825. dp_rx_print_offload_info(rx_tlv);
  826. }
  827. #else
  828. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  829. qdf_nbuf_t msdu)
  830. {
  831. }
  832. #endif /* RECEIVE_OFFLOAD */
  833. /**
  834. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  835. *
  836. * @nbuf: pointer to msdu.
  837. * @mpdu_len: mpdu length
  838. *
  839. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  840. */
  841. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  842. {
  843. bool last_nbuf;
  844. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  845. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  846. last_nbuf = false;
  847. } else {
  848. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  849. last_nbuf = true;
  850. }
  851. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  852. return last_nbuf;
  853. }
  854. /**
  855. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  856. * multiple nbufs.
  857. * @nbuf: pointer to the first msdu of an amsdu.
  858. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  859. *
  860. *
  861. * This function implements the creation of RX frag_list for cases
  862. * where an MSDU is spread across multiple nbufs.
  863. *
  864. * Return: returns the head nbuf which contains complete frag_list.
  865. */
  866. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  867. {
  868. qdf_nbuf_t parent, next, frag_list;
  869. uint16_t frag_list_len = 0;
  870. uint16_t mpdu_len;
  871. bool last_nbuf;
  872. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  873. /*
  874. * this is a case where the complete msdu fits in one single nbuf.
  875. * in this case HW sets both start and end bit and we only need to
  876. * reset these bits for RAW mode simulator to decap the pkt
  877. */
  878. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  879. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  880. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  881. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  882. return nbuf;
  883. }
  884. /*
  885. * This is a case where we have multiple msdus (A-MSDU) spread across
  886. * multiple nbufs. here we create a fraglist out of these nbufs.
  887. *
  888. * the moment we encounter a nbuf with continuation bit set we
  889. * know for sure we have an MSDU which is spread across multiple
  890. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  891. */
  892. parent = nbuf;
  893. frag_list = nbuf->next;
  894. nbuf = nbuf->next;
  895. /*
  896. * set the start bit in the first nbuf we encounter with continuation
  897. * bit set. This has the proper mpdu length set as it is the first
  898. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  899. * nbufs will form the frag_list of the parent nbuf.
  900. */
  901. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  902. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  903. /*
  904. * this is where we set the length of the fragments which are
  905. * associated to the parent nbuf. We iterate through the frag_list
  906. * till we hit the last_nbuf of the list.
  907. */
  908. do {
  909. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  910. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  911. frag_list_len += qdf_nbuf_len(nbuf);
  912. if (last_nbuf) {
  913. next = nbuf->next;
  914. nbuf->next = NULL;
  915. break;
  916. }
  917. nbuf = nbuf->next;
  918. } while (!last_nbuf);
  919. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  920. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  921. parent->next = next;
  922. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  923. return parent;
  924. }
  925. /**
  926. * dp_rx_compute_delay() - Compute and fill in all timestamps
  927. * to pass in correct fields
  928. *
  929. * @vdev: pdev handle
  930. * @tx_desc: tx descriptor
  931. * @tid: tid value
  932. * Return: none
  933. */
  934. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  935. {
  936. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  937. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  938. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  939. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  940. uint32_t interframe_delay =
  941. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  942. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  943. CDP_DELAY_STATS_REAP_STACK, ring_id);
  944. /*
  945. * Update interframe delay stats calculated at deliver_data_ol point.
  946. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  947. * interframe delay will not be calculate correctly for 1st frame.
  948. * On the other side, this will help in avoiding extra per packet check
  949. * of vdev->prev_rx_deliver_tstamp.
  950. */
  951. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  952. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  953. vdev->prev_rx_deliver_tstamp = current_ts;
  954. }
  955. /**
  956. * dp_rx_drop_nbuf_list() - drop an nbuf list
  957. * @pdev: dp pdev reference
  958. * @buf_list: buffer list to be dropepd
  959. *
  960. * Return: int (number of bufs dropped)
  961. */
  962. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  963. qdf_nbuf_t buf_list)
  964. {
  965. struct cdp_tid_rx_stats *stats = NULL;
  966. uint8_t tid = 0, ring_id = 0;
  967. int num_dropped = 0;
  968. qdf_nbuf_t buf, next_buf;
  969. buf = buf_list;
  970. while (buf) {
  971. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  972. next_buf = qdf_nbuf_queue_next(buf);
  973. tid = qdf_nbuf_get_tid_val(buf);
  974. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  975. stats->fail_cnt[INVALID_PEER_VDEV]++;
  976. stats->delivered_to_stack--;
  977. qdf_nbuf_free(buf);
  978. buf = next_buf;
  979. num_dropped++;
  980. }
  981. return num_dropped;
  982. }
  983. #ifdef PEER_CACHE_RX_PKTS
  984. /**
  985. * dp_rx_flush_rx_cached() - flush cached rx frames
  986. * @peer: peer
  987. * @drop: flag to drop frames or forward to net stack
  988. *
  989. * Return: None
  990. */
  991. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  992. {
  993. struct dp_peer_cached_bufq *bufqi;
  994. struct dp_rx_cached_buf *cache_buf = NULL;
  995. ol_txrx_rx_fp data_rx = NULL;
  996. int num_buff_elem;
  997. QDF_STATUS status;
  998. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  999. qdf_atomic_dec(&peer->flush_in_progress);
  1000. return;
  1001. }
  1002. qdf_spin_lock_bh(&peer->peer_info_lock);
  1003. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1004. data_rx = peer->vdev->osif_rx;
  1005. else
  1006. drop = true;
  1007. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1008. bufqi = &peer->bufq_info;
  1009. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1010. qdf_list_remove_front(&bufqi->cached_bufq,
  1011. (qdf_list_node_t **)&cache_buf);
  1012. while (cache_buf) {
  1013. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1014. cache_buf->buf);
  1015. bufqi->entries -= num_buff_elem;
  1016. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1017. if (drop) {
  1018. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1019. cache_buf->buf);
  1020. } else {
  1021. /* Flush the cached frames to OSIF DEV */
  1022. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1023. if (status != QDF_STATUS_SUCCESS)
  1024. bufqi->dropped = dp_rx_drop_nbuf_list(
  1025. peer->vdev->pdev,
  1026. cache_buf->buf);
  1027. }
  1028. qdf_mem_free(cache_buf);
  1029. cache_buf = NULL;
  1030. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1031. qdf_list_remove_front(&bufqi->cached_bufq,
  1032. (qdf_list_node_t **)&cache_buf);
  1033. }
  1034. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1035. qdf_atomic_dec(&peer->flush_in_progress);
  1036. }
  1037. /**
  1038. * dp_rx_enqueue_rx() - cache rx frames
  1039. * @peer: peer
  1040. * @rx_buf_list: cache buffer list
  1041. *
  1042. * Return: None
  1043. */
  1044. static QDF_STATUS
  1045. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1046. {
  1047. struct dp_rx_cached_buf *cache_buf;
  1048. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1049. int num_buff_elem;
  1050. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1051. bufqi->entries, bufqi->dropped);
  1052. if (!peer->valid) {
  1053. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1054. rx_buf_list);
  1055. return QDF_STATUS_E_INVAL;
  1056. }
  1057. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1058. if (bufqi->entries >= bufqi->thresh) {
  1059. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1060. rx_buf_list);
  1061. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1062. return QDF_STATUS_E_RESOURCES;
  1063. }
  1064. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1065. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1066. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1067. if (!cache_buf) {
  1068. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1069. "Failed to allocate buf to cache rx frames");
  1070. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1071. rx_buf_list);
  1072. return QDF_STATUS_E_NOMEM;
  1073. }
  1074. cache_buf->buf = rx_buf_list;
  1075. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1076. qdf_list_insert_back(&bufqi->cached_bufq,
  1077. &cache_buf->node);
  1078. bufqi->entries += num_buff_elem;
  1079. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1080. return QDF_STATUS_SUCCESS;
  1081. }
  1082. static inline
  1083. bool dp_rx_is_peer_cache_bufq_supported(void)
  1084. {
  1085. return true;
  1086. }
  1087. #else
  1088. static inline
  1089. bool dp_rx_is_peer_cache_bufq_supported(void)
  1090. {
  1091. return false;
  1092. }
  1093. static inline QDF_STATUS
  1094. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1095. {
  1096. return QDF_STATUS_SUCCESS;
  1097. }
  1098. #endif
  1099. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1100. struct dp_peer *peer,
  1101. qdf_nbuf_t nbuf_head,
  1102. qdf_nbuf_t nbuf_tail)
  1103. {
  1104. /*
  1105. * highly unlikely to have a vdev without a registered rx
  1106. * callback function. if so let us free the nbuf_list.
  1107. */
  1108. if (qdf_unlikely(!vdev->osif_rx)) {
  1109. if (dp_rx_is_peer_cache_bufq_supported())
  1110. dp_rx_enqueue_rx(peer, nbuf_head);
  1111. else
  1112. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1113. return;
  1114. }
  1115. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1116. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1117. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1118. &nbuf_tail, (struct cdp_peer *) peer);
  1119. }
  1120. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1121. }
  1122. /**
  1123. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1124. * @nbuf: pointer to the first msdu of an amsdu.
  1125. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1126. *
  1127. * The ipsumed field of the skb is set based on whether HW validated the
  1128. * IP/TCP/UDP checksum.
  1129. *
  1130. * Return: void
  1131. */
  1132. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1133. qdf_nbuf_t nbuf,
  1134. uint8_t *rx_tlv_hdr)
  1135. {
  1136. qdf_nbuf_rx_cksum_t cksum = {0};
  1137. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1138. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1139. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1140. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1141. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1142. } else {
  1143. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1144. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1145. }
  1146. }
  1147. /**
  1148. * dp_rx_msdu_stats_update() - update per msdu stats.
  1149. * @soc: core txrx main context
  1150. * @nbuf: pointer to the first msdu of an amsdu.
  1151. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1152. * @peer: pointer to the peer object.
  1153. * @ring_id: reo dest ring number on which pkt is reaped.
  1154. * @tid_stats: per tid rx stats.
  1155. *
  1156. * update all the per msdu stats for that nbuf.
  1157. * Return: void
  1158. */
  1159. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1160. qdf_nbuf_t nbuf,
  1161. uint8_t *rx_tlv_hdr,
  1162. struct dp_peer *peer,
  1163. uint8_t ring_id,
  1164. struct cdp_tid_rx_stats *tid_stats)
  1165. {
  1166. bool is_ampdu, is_not_amsdu;
  1167. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1168. struct dp_vdev *vdev = peer->vdev;
  1169. qdf_ether_header_t *eh;
  1170. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1171. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1172. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1173. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1174. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1175. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1176. tid_stats->msdu_cnt++;
  1177. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1178. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1179. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1180. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1181. tid_stats->mcast_msdu_cnt++;
  1182. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1183. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1184. tid_stats->bcast_msdu_cnt++;
  1185. }
  1186. }
  1187. /*
  1188. * currently we can return from here as we have similar stats
  1189. * updated at per ppdu level instead of msdu level
  1190. */
  1191. if (!soc->process_rx_status)
  1192. return;
  1193. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1194. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1195. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1196. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1197. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1198. tid = qdf_nbuf_get_tid_val(nbuf);
  1199. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1200. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1201. rx_tlv_hdr);
  1202. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1203. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1204. DP_STATS_INC(peer, rx.bw[bw], 1);
  1205. /*
  1206. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1207. * then increase index [nss - 1] in array counter.
  1208. */
  1209. if (nss > 0 && (pkt_type == DOT11_N ||
  1210. pkt_type == DOT11_AC ||
  1211. pkt_type == DOT11_AX))
  1212. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1213. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1214. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1215. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1216. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1217. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1218. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1219. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1220. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1221. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1222. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1223. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1224. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1225. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1226. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1227. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1228. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1229. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1230. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1231. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1232. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1233. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1234. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1235. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1236. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1237. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1238. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1239. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1240. if ((soc->process_rx_status) &&
  1241. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1242. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1243. if (!vdev->pdev)
  1244. return;
  1245. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1246. &peer->stats, peer->peer_ids[0],
  1247. UPDATE_PEER_STATS,
  1248. vdev->pdev->pdev_id);
  1249. #endif
  1250. }
  1251. }
  1252. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1253. void *rx_tlv_hdr,
  1254. qdf_nbuf_t nbuf)
  1255. {
  1256. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1257. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1258. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1259. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1260. qdf_nbuf_is_da_valid(nbuf) &&
  1261. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1262. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1263. return false;
  1264. return true;
  1265. }
  1266. #ifndef WDS_VENDOR_EXTENSION
  1267. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1268. struct dp_vdev *vdev,
  1269. struct dp_peer *peer)
  1270. {
  1271. return 1;
  1272. }
  1273. #endif
  1274. #ifdef RX_DESC_DEBUG_CHECK
  1275. /**
  1276. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1277. * corruption
  1278. *
  1279. * @ring_desc: REO ring descriptor
  1280. * @rx_desc: Rx descriptor
  1281. *
  1282. * Return: NONE
  1283. */
  1284. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1285. struct dp_rx_desc *rx_desc)
  1286. {
  1287. struct hal_buf_info hbi;
  1288. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1289. /* Sanity check for possible buffer paddr corruption */
  1290. qdf_assert_always((&hbi)->paddr ==
  1291. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1292. }
  1293. #else
  1294. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1295. struct dp_rx_desc *rx_desc)
  1296. {
  1297. }
  1298. #endif
  1299. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1300. static inline
  1301. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1302. {
  1303. bool limit_hit = false;
  1304. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1305. limit_hit =
  1306. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1307. if (limit_hit)
  1308. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1309. return limit_hit;
  1310. }
  1311. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1312. {
  1313. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1314. }
  1315. #else
  1316. static inline
  1317. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1318. {
  1319. return false;
  1320. }
  1321. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1322. {
  1323. return false;
  1324. }
  1325. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1326. /**
  1327. * dp_rx_process() - Brain of the Rx processing functionality
  1328. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1329. * @soc: core txrx main context
  1330. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1331. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1332. * @quota: No. of units (packets) that can be serviced in one shot.
  1333. *
  1334. * This function implements the core of Rx functionality. This is
  1335. * expected to handle only non-error frames.
  1336. *
  1337. * Return: uint32_t: No. of elements processed
  1338. */
  1339. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1340. uint8_t reo_ring_num, uint32_t quota)
  1341. {
  1342. void *hal_soc;
  1343. void *ring_desc;
  1344. struct dp_rx_desc *rx_desc = NULL;
  1345. qdf_nbuf_t nbuf, next;
  1346. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1347. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1348. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1349. uint32_t l2_hdr_offset = 0;
  1350. uint16_t msdu_len = 0;
  1351. uint16_t peer_id;
  1352. struct dp_peer *peer;
  1353. struct dp_vdev *vdev;
  1354. uint32_t pkt_len = 0;
  1355. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1356. struct hal_rx_msdu_desc_info msdu_desc_info;
  1357. enum hal_reo_error_status error;
  1358. uint32_t peer_mdata;
  1359. uint8_t *rx_tlv_hdr;
  1360. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1361. uint8_t mac_id = 0;
  1362. struct dp_pdev *pdev;
  1363. struct dp_pdev *rx_pdev;
  1364. struct dp_srng *dp_rxdma_srng;
  1365. struct rx_desc_pool *rx_desc_pool;
  1366. struct dp_soc *soc = int_ctx->soc;
  1367. uint8_t ring_id = 0;
  1368. uint8_t core_id = 0;
  1369. struct cdp_tid_rx_stats *tid_stats;
  1370. qdf_nbuf_t nbuf_head;
  1371. qdf_nbuf_t nbuf_tail;
  1372. qdf_nbuf_t deliver_list_head;
  1373. qdf_nbuf_t deliver_list_tail;
  1374. uint32_t num_rx_bufs_reaped = 0;
  1375. uint32_t intr_id;
  1376. struct hif_opaque_softc *scn;
  1377. int32_t tid = 0;
  1378. bool is_prev_msdu_last = true;
  1379. uint32_t num_entries_avail = 0;
  1380. DP_HIST_INIT();
  1381. qdf_assert_always(soc && hal_ring);
  1382. hal_soc = soc->hal_soc;
  1383. qdf_assert_always(hal_soc);
  1384. scn = soc->hif_handle;
  1385. hif_pm_runtime_mark_last_busy(scn);
  1386. intr_id = int_ctx->dp_intr_id;
  1387. more_data:
  1388. /* reset local variables here to be re-used in the function */
  1389. nbuf_head = NULL;
  1390. nbuf_tail = NULL;
  1391. deliver_list_head = NULL;
  1392. deliver_list_tail = NULL;
  1393. peer = NULL;
  1394. vdev = NULL;
  1395. num_rx_bufs_reaped = 0;
  1396. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1397. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1398. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1399. qdf_mem_zero(head, sizeof(head));
  1400. qdf_mem_zero(tail, sizeof(tail));
  1401. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring))) {
  1402. /*
  1403. * Need API to convert from hal_ring pointer to
  1404. * Ring Type / Ring Id combo
  1405. */
  1406. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1407. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1408. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1409. goto done;
  1410. }
  1411. /*
  1412. * start reaping the buffers from reo ring and queue
  1413. * them in per vdev queue.
  1414. * Process the received pkts in a different per vdev loop.
  1415. */
  1416. while (qdf_likely(quota &&
  1417. (ring_desc = hal_srng_dst_peek(hal_soc, hal_ring)))) {
  1418. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1419. ring_id = hal_srng_ring_id_get(hal_ring);
  1420. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1421. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1422. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1423. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1424. /* Don't know how to deal with this -- assert */
  1425. qdf_assert(0);
  1426. }
  1427. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1428. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1429. qdf_assert(rx_desc);
  1430. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1431. /*
  1432. * this is a unlikely scenario where the host is reaping
  1433. * a descriptor which it already reaped just a while ago
  1434. * but is yet to replenish it back to HW.
  1435. * In this case host will dump the last 128 descriptors
  1436. * including the software descriptor rx_desc and assert.
  1437. */
  1438. if (qdf_unlikely(!rx_desc->in_use)) {
  1439. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1440. dp_err("Reaping rx_desc not in use!");
  1441. dp_rx_dump_info_and_assert(soc, hal_ring,
  1442. ring_desc, rx_desc);
  1443. }
  1444. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1445. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1446. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1447. dp_rx_dump_info_and_assert(soc, hal_ring,
  1448. ring_desc, rx_desc);
  1449. }
  1450. /* TODO */
  1451. /*
  1452. * Need a separate API for unmapping based on
  1453. * phyiscal address
  1454. */
  1455. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1456. QDF_DMA_FROM_DEVICE);
  1457. rx_desc->unmapped = 1;
  1458. core_id = smp_processor_id();
  1459. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1460. /* Get MPDU DESC info */
  1461. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1462. /* Get MSDU DESC info */
  1463. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1464. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1465. HAL_MPDU_F_RAW_AMPDU)) {
  1466. /* previous msdu has end bit set, so current one is
  1467. * the new MPDU
  1468. */
  1469. if (is_prev_msdu_last) {
  1470. is_prev_msdu_last = false;
  1471. /* Get number of entries available in HW ring */
  1472. num_entries_avail =
  1473. hal_srng_dst_num_valid(hal_soc, hal_ring, 1);
  1474. /* For new MPDU check if we can read complete
  1475. * MPDU by comparing the number of buffers
  1476. * available and number of buffers needed to
  1477. * reap this MPDU
  1478. */
  1479. if (((msdu_desc_info.msdu_len /
  1480. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1481. num_entries_avail)
  1482. break;
  1483. } else {
  1484. if (msdu_desc_info.msdu_flags &
  1485. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1486. is_prev_msdu_last = true;
  1487. }
  1488. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1489. }
  1490. /* Pop out the descriptor*/
  1491. hal_srng_dst_get_next(hal_soc, hal_ring);
  1492. rx_bufs_reaped[rx_desc->pool_id]++;
  1493. peer_mdata = mpdu_desc_info.peer_meta_data;
  1494. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1495. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1496. /*
  1497. * save msdu flags first, last and continuation msdu in
  1498. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1499. * length to nbuf->cb. This ensures the info required for
  1500. * per pkt processing is always in the same cache line.
  1501. * This helps in improving throughput for smaller pkt
  1502. * sizes.
  1503. */
  1504. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1505. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1506. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1507. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1508. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1509. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1510. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1511. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1512. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1513. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1514. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1515. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1516. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1517. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1518. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1519. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1520. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1521. /*
  1522. * if continuation bit is set then we have MSDU spread
  1523. * across multiple buffers, let us not decrement quota
  1524. * till we reap all buffers of that MSDU.
  1525. */
  1526. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1527. quota -= 1;
  1528. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1529. &tail[rx_desc->pool_id],
  1530. rx_desc);
  1531. num_rx_bufs_reaped++;
  1532. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1533. break;
  1534. }
  1535. done:
  1536. dp_srng_access_end(int_ctx, soc, hal_ring);
  1537. if (nbuf_tail)
  1538. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1539. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1540. /*
  1541. * continue with next mac_id if no pkts were reaped
  1542. * from that pool
  1543. */
  1544. if (!rx_bufs_reaped[mac_id])
  1545. continue;
  1546. pdev = soc->pdev_list[mac_id];
  1547. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1548. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1549. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1550. rx_desc_pool, rx_bufs_reaped[mac_id],
  1551. &head[mac_id], &tail[mac_id]);
  1552. }
  1553. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1554. /* Peer can be NULL is case of LFR */
  1555. if (qdf_likely(peer))
  1556. vdev = NULL;
  1557. /*
  1558. * BIG loop where each nbuf is dequeued from global queue,
  1559. * processed and queued back on a per vdev basis. These nbufs
  1560. * are sent to stack as and when we run out of nbufs
  1561. * or a new nbuf dequeued from global queue has a different
  1562. * vdev when compared to previous nbuf.
  1563. */
  1564. nbuf = nbuf_head;
  1565. while (nbuf) {
  1566. next = nbuf->next;
  1567. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1568. /* Get TID from struct cb->tid_val, save to tid */
  1569. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1570. tid = qdf_nbuf_get_tid_val(nbuf);
  1571. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1572. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1573. peer = dp_peer_find_by_id(soc, peer_id);
  1574. if (peer) {
  1575. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1576. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1577. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1578. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1579. QDF_NBUF_RX_PKT_DATA_TRACK;
  1580. }
  1581. rx_bufs_used++;
  1582. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1583. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1584. deliver_list_tail);
  1585. deliver_list_head = NULL;
  1586. deliver_list_tail = NULL;
  1587. }
  1588. if (qdf_likely(peer)) {
  1589. vdev = peer->vdev;
  1590. } else {
  1591. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1592. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1593. qdf_nbuf_free(nbuf);
  1594. nbuf = next;
  1595. continue;
  1596. }
  1597. if (qdf_unlikely(!vdev)) {
  1598. qdf_nbuf_free(nbuf);
  1599. nbuf = next;
  1600. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1601. dp_peer_unref_del_find_by_id(peer);
  1602. continue;
  1603. }
  1604. rx_pdev = vdev->pdev;
  1605. DP_RX_TID_SAVE(nbuf, tid);
  1606. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1607. qdf_nbuf_set_timestamp(nbuf);
  1608. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1609. tid_stats =
  1610. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1611. /*
  1612. * Check if DMA completed -- msdu_done is the last bit
  1613. * to be written
  1614. */
  1615. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1616. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1617. dp_err("MSDU DONE failure");
  1618. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1619. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1620. QDF_TRACE_LEVEL_INFO);
  1621. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1622. qdf_nbuf_free(nbuf);
  1623. qdf_assert(0);
  1624. nbuf = next;
  1625. continue;
  1626. }
  1627. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1628. /*
  1629. * First IF condition:
  1630. * 802.11 Fragmented pkts are reinjected to REO
  1631. * HW block as SG pkts and for these pkts we only
  1632. * need to pull the RX TLVS header length.
  1633. * Second IF condition:
  1634. * The below condition happens when an MSDU is spread
  1635. * across multiple buffers. This can happen in two cases
  1636. * 1. The nbuf size is smaller then the received msdu.
  1637. * ex: we have set the nbuf size to 2048 during
  1638. * nbuf_alloc. but we received an msdu which is
  1639. * 2304 bytes in size then this msdu is spread
  1640. * across 2 nbufs.
  1641. *
  1642. * 2. AMSDUs when RAW mode is enabled.
  1643. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1644. * across 1st nbuf and 2nd nbuf and last MSDU is
  1645. * spread across 2nd nbuf and 3rd nbuf.
  1646. *
  1647. * for these scenarios let us create a skb frag_list and
  1648. * append these buffers till the last MSDU of the AMSDU
  1649. * Third condition:
  1650. * This is the most likely case, we receive 802.3 pkts
  1651. * decapsulated by HW, here we need to set the pkt length.
  1652. */
  1653. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1654. bool is_mcbc, is_sa_vld, is_da_vld;
  1655. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1656. is_sa_vld = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  1657. is_da_vld = hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr);
  1658. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1659. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1660. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1661. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1662. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1663. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1664. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1665. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1666. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1667. next = nbuf->next;
  1668. } else {
  1669. l2_hdr_offset =
  1670. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1671. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1672. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1673. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1674. qdf_nbuf_pull_head(nbuf,
  1675. RX_PKT_TLVS_LEN +
  1676. l2_hdr_offset);
  1677. }
  1678. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1679. QDF_TRACE(QDF_MODULE_ID_DP,
  1680. QDF_TRACE_LEVEL_ERROR,
  1681. FL("Policy Check Drop pkt"));
  1682. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1683. /* Drop & free packet */
  1684. qdf_nbuf_free(nbuf);
  1685. /* Statistics */
  1686. nbuf = next;
  1687. dp_peer_unref_del_find_by_id(peer);
  1688. continue;
  1689. }
  1690. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1691. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1692. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) ==
  1693. false))) {
  1694. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1695. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1696. qdf_nbuf_free(nbuf);
  1697. nbuf = next;
  1698. dp_peer_unref_del_find_by_id(peer);
  1699. continue;
  1700. }
  1701. if (soc->process_rx_status)
  1702. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1703. /* Update the protocol tag in SKB based on CCE metadata */
  1704. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1705. reo_ring_num, false, true);
  1706. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1707. ring_id, tid_stats);
  1708. if (qdf_unlikely(vdev->mesh_vdev)) {
  1709. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1710. == QDF_STATUS_SUCCESS) {
  1711. QDF_TRACE(QDF_MODULE_ID_DP,
  1712. QDF_TRACE_LEVEL_INFO_MED,
  1713. FL("mesh pkt filtered"));
  1714. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1715. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1716. 1);
  1717. qdf_nbuf_free(nbuf);
  1718. nbuf = next;
  1719. dp_peer_unref_del_find_by_id(peer);
  1720. continue;
  1721. }
  1722. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1723. }
  1724. if (qdf_likely(vdev->rx_decap_type ==
  1725. htt_cmn_pkt_type_ethernet) &&
  1726. qdf_likely(!vdev->mesh_vdev)) {
  1727. /* WDS Destination Address Learning */
  1728. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1729. /* Due to HW issue, sometimes we see that the sa_idx
  1730. * and da_idx are invalid with sa_valid and da_valid
  1731. * bits set
  1732. *
  1733. * in this case we also see that value of
  1734. * sa_sw_peer_id is set as 0
  1735. *
  1736. * Drop the packet if sa_idx and da_idx OOB or
  1737. * sa_sw_peerid is 0
  1738. */
  1739. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1740. qdf_nbuf_free(nbuf);
  1741. nbuf = next;
  1742. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1743. dp_peer_unref_del_find_by_id(peer);
  1744. continue;
  1745. }
  1746. /* WDS Source Port Learning */
  1747. if (qdf_likely(vdev->wds_enabled))
  1748. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1749. peer, nbuf);
  1750. /* Intrabss-fwd */
  1751. if (dp_rx_check_ap_bridge(vdev))
  1752. if (dp_rx_intrabss_fwd(soc,
  1753. peer,
  1754. rx_tlv_hdr,
  1755. nbuf)) {
  1756. nbuf = next;
  1757. dp_peer_unref_del_find_by_id(peer);
  1758. tid_stats->intrabss_cnt++;
  1759. continue; /* Get next desc */
  1760. }
  1761. }
  1762. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1763. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1764. DP_RX_LIST_APPEND(deliver_list_head,
  1765. deliver_list_tail,
  1766. nbuf);
  1767. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1768. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1769. tid_stats->delivered_to_stack++;
  1770. nbuf = next;
  1771. dp_peer_unref_del_find_by_id(peer);
  1772. }
  1773. if (deliver_list_head && peer)
  1774. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1775. deliver_list_tail);
  1776. if (dp_rx_enable_eol_data_check(soc)) {
  1777. if (quota &&
  1778. hal_srng_dst_peek_sync_locked(soc, hal_ring)) {
  1779. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1780. if (!hif_exec_should_yield(scn, intr_id))
  1781. goto more_data;
  1782. }
  1783. }
  1784. /* Update histogram statistics by looping through pdev's */
  1785. DP_RX_HIST_STATS_PER_PDEV();
  1786. return rx_bufs_used; /* Assume no scale factor for now */
  1787. }
  1788. /**
  1789. * dp_rx_detach() - detach dp rx
  1790. * @pdev: core txrx pdev context
  1791. *
  1792. * This function will detach DP RX into main device context
  1793. * will free DP Rx resources.
  1794. *
  1795. * Return: void
  1796. */
  1797. void
  1798. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1799. {
  1800. uint8_t pdev_id = pdev->pdev_id;
  1801. struct dp_soc *soc = pdev->soc;
  1802. struct rx_desc_pool *rx_desc_pool;
  1803. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1804. if (rx_desc_pool->pool_size != 0) {
  1805. if (!dp_is_soc_reinit(soc))
  1806. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  1807. rx_desc_pool);
  1808. else
  1809. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1810. }
  1811. return;
  1812. }
  1813. static QDF_STATUS
  1814. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  1815. struct dp_pdev *dp_pdev)
  1816. {
  1817. qdf_dma_addr_t paddr;
  1818. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1819. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1820. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  1821. FALSE);
  1822. if (!(*nbuf)) {
  1823. dp_err("nbuf alloc failed");
  1824. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1825. return ret;
  1826. }
  1827. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  1828. QDF_DMA_FROM_DEVICE);
  1829. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1830. qdf_nbuf_free(*nbuf);
  1831. dp_err("nbuf map failed");
  1832. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1833. return ret;
  1834. }
  1835. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  1836. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  1837. if (ret == QDF_STATUS_E_FAILURE) {
  1838. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  1839. QDF_DMA_FROM_DEVICE);
  1840. qdf_nbuf_free(*nbuf);
  1841. dp_err("nbuf check x86 failed");
  1842. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1843. return ret;
  1844. }
  1845. return QDF_STATUS_SUCCESS;
  1846. }
  1847. static QDF_STATUS
  1848. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1849. struct dp_srng *dp_rxdma_srng,
  1850. struct rx_desc_pool *rx_desc_pool,
  1851. uint32_t num_req_buffers)
  1852. {
  1853. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1854. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  1855. union dp_rx_desc_list_elem_t *next;
  1856. void *rxdma_ring_entry;
  1857. qdf_dma_addr_t paddr;
  1858. qdf_nbuf_t *rx_nbuf_arr;
  1859. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  1860. uint32_t buffer_index, nbuf_ptrs_per_page;
  1861. qdf_nbuf_t nbuf;
  1862. QDF_STATUS ret;
  1863. int page_idx, total_pages;
  1864. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1865. union dp_rx_desc_list_elem_t *tail = NULL;
  1866. if (qdf_unlikely(!rxdma_srng)) {
  1867. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1868. return QDF_STATUS_E_FAILURE;
  1869. }
  1870. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  1871. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1872. num_req_buffers, &desc_list, &tail);
  1873. if (!nr_descs) {
  1874. dp_err("no free rx_descs in freelist");
  1875. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1876. return QDF_STATUS_E_NOMEM;
  1877. }
  1878. dp_debug("got %u RX descs for driver attach", nr_descs);
  1879. /*
  1880. * Try to allocate pointers to the nbuf one page at a time.
  1881. * Take pointers that can fit in one page of memory and
  1882. * iterate through the total descriptors that need to be
  1883. * allocated in order of pages. Reuse the pointers that
  1884. * have been allocated to fit in one page across each
  1885. * iteration to index into the nbuf.
  1886. */
  1887. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  1888. /*
  1889. * Add an extra page to store the remainder if any
  1890. */
  1891. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  1892. total_pages++;
  1893. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  1894. if (!rx_nbuf_arr) {
  1895. dp_err("failed to allocate nbuf array");
  1896. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1897. QDF_BUG(0);
  1898. return QDF_STATUS_E_NOMEM;
  1899. }
  1900. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  1901. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  1902. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  1903. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  1904. /*
  1905. * The last page of buffer pointers may not be required
  1906. * completely based on the number of descriptors. Below
  1907. * check will ensure we are allocating only the
  1908. * required number of descriptors.
  1909. */
  1910. if (nr_nbuf_total >= nr_descs)
  1911. break;
  1912. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  1913. &rx_nbuf_arr[nr_nbuf],
  1914. dp_pdev);
  1915. if (QDF_IS_STATUS_ERROR(ret))
  1916. break;
  1917. nr_nbuf_total++;
  1918. }
  1919. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1920. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  1921. rxdma_ring_entry =
  1922. hal_srng_src_get_next(dp_soc->hal_soc,
  1923. rxdma_srng);
  1924. qdf_assert_always(rxdma_ring_entry);
  1925. next = desc_list->next;
  1926. nbuf = rx_nbuf_arr[buffer_index];
  1927. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  1928. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  1929. desc_list->rx_desc.in_use = 1;
  1930. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  1931. desc_list->rx_desc.cookie,
  1932. rx_desc_pool->owner);
  1933. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  1934. desc_list = next;
  1935. }
  1936. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  1937. }
  1938. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  1939. qdf_mem_free(rx_nbuf_arr);
  1940. if (!nr_nbuf_total) {
  1941. dp_err("No nbuf's allocated");
  1942. QDF_BUG(0);
  1943. return QDF_STATUS_E_RESOURCES;
  1944. }
  1945. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  1946. RX_BUFFER_SIZE * nr_nbuf_total);
  1947. return QDF_STATUS_SUCCESS;
  1948. }
  1949. /**
  1950. * dp_rx_attach() - attach DP RX
  1951. * @pdev: core txrx pdev context
  1952. *
  1953. * This function will attach a DP RX instance into the main
  1954. * device (SOC) context. Will allocate dp rx resource and
  1955. * initialize resources.
  1956. *
  1957. * Return: QDF_STATUS_SUCCESS: success
  1958. * QDF_STATUS_E_RESOURCES: Error return
  1959. */
  1960. QDF_STATUS
  1961. dp_rx_pdev_attach(struct dp_pdev *pdev)
  1962. {
  1963. uint8_t pdev_id = pdev->pdev_id;
  1964. struct dp_soc *soc = pdev->soc;
  1965. uint32_t rxdma_entries;
  1966. struct dp_srng *dp_rxdma_srng;
  1967. struct rx_desc_pool *rx_desc_pool;
  1968. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  1969. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1970. "nss-wifi<4> skip Rx refil %d", pdev_id);
  1971. return QDF_STATUS_SUCCESS;
  1972. }
  1973. pdev = soc->pdev_list[pdev_id];
  1974. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1975. rxdma_entries = dp_rxdma_srng->num_entries;
  1976. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  1977. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1978. dp_rx_desc_pool_alloc(soc, pdev_id,
  1979. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  1980. rx_desc_pool);
  1981. rx_desc_pool->owner = DP_WBM2SW_RBM;
  1982. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  1983. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  1984. rx_desc_pool, rxdma_entries - 1);
  1985. }
  1986. /*
  1987. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1988. * @soc: core txrx main context
  1989. * @pdev: core txrx pdev context
  1990. *
  1991. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1992. * until retry times reaches max threshold or succeeded.
  1993. *
  1994. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1995. */
  1996. qdf_nbuf_t
  1997. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1998. {
  1999. uint8_t *buf;
  2000. int32_t nbuf_retry_count;
  2001. QDF_STATUS ret;
  2002. qdf_nbuf_t nbuf = NULL;
  2003. for (nbuf_retry_count = 0; nbuf_retry_count <
  2004. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2005. nbuf_retry_count++) {
  2006. /* Allocate a new skb */
  2007. nbuf = qdf_nbuf_alloc(soc->osdev,
  2008. RX_BUFFER_SIZE,
  2009. RX_BUFFER_RESERVATION,
  2010. RX_BUFFER_ALIGNMENT,
  2011. FALSE);
  2012. if (!nbuf) {
  2013. DP_STATS_INC(pdev,
  2014. replenish.nbuf_alloc_fail, 1);
  2015. continue;
  2016. }
  2017. buf = qdf_nbuf_data(nbuf);
  2018. memset(buf, 0, RX_BUFFER_SIZE);
  2019. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2020. QDF_DMA_FROM_DEVICE);
  2021. /* nbuf map failed */
  2022. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2023. qdf_nbuf_free(nbuf);
  2024. DP_STATS_INC(pdev, replenish.map_err, 1);
  2025. continue;
  2026. }
  2027. /* qdf_nbuf alloc and map succeeded */
  2028. break;
  2029. }
  2030. /* qdf_nbuf still alloc or map failed */
  2031. if (qdf_unlikely(nbuf_retry_count >=
  2032. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2033. return NULL;
  2034. return nbuf;
  2035. }