lt9611uxc.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2019-2020. Linaro Limited.
  5. */
  6. /*
  7. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  8. */
  9. #include <linux/firmware.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/i2c.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/module.h>
  14. #include <linux/mutex.h>
  15. #include <linux/of_graph.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/regmap.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <linux/wait.h>
  20. #include <linux/workqueue.h>
  21. #include <sound/hdmi-codec.h>
  22. #include <drm/drm_atomic_helper.h>
  23. #include <drm/drm_bridge.h>
  24. #include <drm/drm_mipi_dsi.h>
  25. #include <drm/drm_print.h>
  26. #include <drm/drm_probe_helper.h>
  27. #define EDID_BLOCK_SIZE 128
  28. #define EDID_NUM_BLOCKS 2
  29. struct lt9611uxc {
  30. struct device *dev;
  31. struct drm_bridge bridge;
  32. struct drm_connector connector;
  33. struct regmap *regmap;
  34. /* Protects all accesses to registers by stopping the on-chip MCU */
  35. struct mutex ocm_lock;
  36. struct wait_queue_head wq;
  37. struct work_struct work;
  38. struct device_node *dsi0_node;
  39. struct device_node *dsi1_node;
  40. struct mipi_dsi_device *dsi0;
  41. struct mipi_dsi_device *dsi1;
  42. struct platform_device *audio_pdev;
  43. struct gpio_desc *reset_gpio;
  44. struct gpio_desc *enable_gpio;
  45. struct regulator_bulk_data supplies[2];
  46. struct i2c_client *client;
  47. bool hpd_supported;
  48. bool edid_read;
  49. /* can be accessed from different threads, so protect this with ocm_lock */
  50. bool hdmi_connected;
  51. uint8_t fw_version;
  52. };
  53. #define LT9611_PAGE_CONTROL 0xff
  54. static const struct regmap_range_cfg lt9611uxc_ranges[] = {
  55. {
  56. .name = "register_range",
  57. .range_min = 0,
  58. .range_max = 0xd0ff,
  59. .selector_reg = LT9611_PAGE_CONTROL,
  60. .selector_mask = 0xff,
  61. .selector_shift = 0,
  62. .window_start = 0,
  63. .window_len = 0x100,
  64. },
  65. };
  66. static const struct regmap_config lt9611uxc_regmap_config = {
  67. .reg_bits = 8,
  68. .val_bits = 8,
  69. .max_register = 0xffff,
  70. .ranges = lt9611uxc_ranges,
  71. .num_ranges = ARRAY_SIZE(lt9611uxc_ranges),
  72. };
  73. struct lt9611uxc_mode {
  74. u16 hdisplay;
  75. u16 vdisplay;
  76. u8 vrefresh;
  77. };
  78. /*
  79. * This chip supports only a fixed set of modes.
  80. * Enumerate them here to check whether the mode is supported.
  81. */
  82. static struct lt9611uxc_mode lt9611uxc_modes[] = {
  83. { 1920, 1080, 60 },
  84. { 1920, 1080, 30 },
  85. { 1920, 1080, 25 },
  86. { 1366, 768, 60 },
  87. { 1360, 768, 60 },
  88. { 1280, 1024, 60 },
  89. { 1280, 800, 60 },
  90. { 1280, 720, 60 },
  91. { 1280, 720, 50 },
  92. { 1280, 720, 30 },
  93. { 1152, 864, 60 },
  94. { 1024, 768, 60 },
  95. { 800, 600, 60 },
  96. { 720, 576, 50 },
  97. { 720, 480, 60 },
  98. { 640, 480, 60 },
  99. };
  100. static struct lt9611uxc *bridge_to_lt9611uxc(struct drm_bridge *bridge)
  101. {
  102. return container_of(bridge, struct lt9611uxc, bridge);
  103. }
  104. static struct lt9611uxc *connector_to_lt9611uxc(struct drm_connector *connector)
  105. {
  106. return container_of(connector, struct lt9611uxc, connector);
  107. }
  108. static void lt9611uxc_lock(struct lt9611uxc *lt9611uxc)
  109. {
  110. mutex_lock(&lt9611uxc->ocm_lock);
  111. regmap_write(lt9611uxc->regmap, 0x80ee, 0x01);
  112. }
  113. static void lt9611uxc_unlock(struct lt9611uxc *lt9611uxc)
  114. {
  115. regmap_write(lt9611uxc->regmap, 0x80ee, 0x00);
  116. msleep(50);
  117. mutex_unlock(&lt9611uxc->ocm_lock);
  118. }
  119. static irqreturn_t lt9611uxc_irq_thread_handler(int irq, void *dev_id)
  120. {
  121. struct lt9611uxc *lt9611uxc = dev_id;
  122. unsigned int irq_status = 0;
  123. unsigned int hpd_status = 0;
  124. lt9611uxc_lock(lt9611uxc);
  125. regmap_read(lt9611uxc->regmap, 0xb022, &irq_status);
  126. regmap_read(lt9611uxc->regmap, 0xb023, &hpd_status);
  127. if (irq_status)
  128. regmap_write(lt9611uxc->regmap, 0xb022, 0);
  129. if (irq_status & BIT(0)) {
  130. lt9611uxc->edid_read = !!(hpd_status & BIT(0));
  131. wake_up_all(&lt9611uxc->wq);
  132. }
  133. if (irq_status & BIT(1)) {
  134. lt9611uxc->hdmi_connected = hpd_status & BIT(1);
  135. schedule_work(&lt9611uxc->work);
  136. }
  137. lt9611uxc_unlock(lt9611uxc);
  138. return IRQ_HANDLED;
  139. }
  140. static void lt9611uxc_hpd_work(struct work_struct *work)
  141. {
  142. struct lt9611uxc *lt9611uxc = container_of(work, struct lt9611uxc, work);
  143. bool connected;
  144. if (lt9611uxc->connector.dev) {
  145. if (lt9611uxc->connector.dev->mode_config.funcs)
  146. drm_kms_helper_hotplug_event(lt9611uxc->connector.dev);
  147. } else {
  148. mutex_lock(&lt9611uxc->ocm_lock);
  149. connected = lt9611uxc->hdmi_connected;
  150. mutex_unlock(&lt9611uxc->ocm_lock);
  151. drm_bridge_hpd_notify(&lt9611uxc->bridge,
  152. connected ?
  153. connector_status_connected :
  154. connector_status_disconnected);
  155. }
  156. }
  157. static void lt9611uxc_reset(struct lt9611uxc *lt9611uxc)
  158. {
  159. gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);
  160. msleep(20);
  161. gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 0);
  162. msleep(20);
  163. gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);
  164. msleep(300);
  165. }
  166. static void lt9611uxc_assert_5v(struct lt9611uxc *lt9611uxc)
  167. {
  168. if (!lt9611uxc->enable_gpio)
  169. return;
  170. gpiod_set_value_cansleep(lt9611uxc->enable_gpio, 1);
  171. msleep(20);
  172. }
  173. static int lt9611uxc_regulator_init(struct lt9611uxc *lt9611uxc)
  174. {
  175. int ret;
  176. lt9611uxc->supplies[0].supply = "vdd";
  177. lt9611uxc->supplies[1].supply = "vcc";
  178. ret = devm_regulator_bulk_get(lt9611uxc->dev, 2, lt9611uxc->supplies);
  179. if (ret < 0)
  180. return ret;
  181. return regulator_set_load(lt9611uxc->supplies[0].consumer, 200000);
  182. }
  183. static int lt9611uxc_regulator_enable(struct lt9611uxc *lt9611uxc)
  184. {
  185. int ret;
  186. ret = regulator_enable(lt9611uxc->supplies[0].consumer);
  187. if (ret < 0)
  188. return ret;
  189. usleep_range(1000, 10000); /* 50000 according to dtsi */
  190. ret = regulator_enable(lt9611uxc->supplies[1].consumer);
  191. if (ret < 0) {
  192. regulator_disable(lt9611uxc->supplies[0].consumer);
  193. return ret;
  194. }
  195. return 0;
  196. }
  197. static struct lt9611uxc_mode *lt9611uxc_find_mode(const struct drm_display_mode *mode)
  198. {
  199. int i;
  200. for (i = 0; i < ARRAY_SIZE(lt9611uxc_modes); i++) {
  201. if (lt9611uxc_modes[i].hdisplay == mode->hdisplay &&
  202. lt9611uxc_modes[i].vdisplay == mode->vdisplay &&
  203. lt9611uxc_modes[i].vrefresh == drm_mode_vrefresh(mode)) {
  204. return &lt9611uxc_modes[i];
  205. }
  206. }
  207. return NULL;
  208. }
  209. static struct mipi_dsi_device *lt9611uxc_attach_dsi(struct lt9611uxc *lt9611uxc,
  210. struct device_node *dsi_node)
  211. {
  212. const struct mipi_dsi_device_info info = { "lt9611uxc", 0, NULL };
  213. struct mipi_dsi_device *dsi;
  214. struct mipi_dsi_host *host;
  215. struct device *dev = lt9611uxc->dev;
  216. int ret;
  217. host = of_find_mipi_dsi_host_by_node(dsi_node);
  218. if (!host) {
  219. dev_err(dev, "failed to find dsi host\n");
  220. return ERR_PTR(-EPROBE_DEFER);
  221. }
  222. dsi = devm_mipi_dsi_device_register_full(dev, host, &info);
  223. if (IS_ERR(dsi)) {
  224. dev_err(dev, "failed to create dsi device\n");
  225. return dsi;
  226. }
  227. dsi->lanes = 4;
  228. dsi->format = MIPI_DSI_FMT_RGB888;
  229. dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  230. MIPI_DSI_MODE_VIDEO_HSE;
  231. ret = devm_mipi_dsi_attach(dev, dsi);
  232. if (ret < 0) {
  233. dev_err(dev, "failed to attach dsi to host\n");
  234. return ERR_PTR(ret);
  235. }
  236. return dsi;
  237. }
  238. static int lt9611uxc_connector_get_modes(struct drm_connector *connector)
  239. {
  240. struct lt9611uxc *lt9611uxc = connector_to_lt9611uxc(connector);
  241. unsigned int count;
  242. struct edid *edid;
  243. edid = lt9611uxc->bridge.funcs->get_edid(&lt9611uxc->bridge, connector);
  244. drm_connector_update_edid_property(connector, edid);
  245. count = drm_add_edid_modes(connector, edid);
  246. kfree(edid);
  247. return count;
  248. }
  249. static enum drm_connector_status lt9611uxc_connector_detect(struct drm_connector *connector,
  250. bool force)
  251. {
  252. struct lt9611uxc *lt9611uxc = connector_to_lt9611uxc(connector);
  253. return lt9611uxc->bridge.funcs->detect(&lt9611uxc->bridge);
  254. }
  255. static enum drm_mode_status lt9611uxc_connector_mode_valid(struct drm_connector *connector,
  256. struct drm_display_mode *mode)
  257. {
  258. struct lt9611uxc_mode *lt9611uxc_mode = lt9611uxc_find_mode(mode);
  259. return lt9611uxc_mode ? MODE_OK : MODE_BAD;
  260. }
  261. static const struct drm_connector_helper_funcs lt9611uxc_bridge_connector_helper_funcs = {
  262. .get_modes = lt9611uxc_connector_get_modes,
  263. .mode_valid = lt9611uxc_connector_mode_valid,
  264. };
  265. static const struct drm_connector_funcs lt9611uxc_bridge_connector_funcs = {
  266. .fill_modes = drm_helper_probe_single_connector_modes,
  267. .detect = lt9611uxc_connector_detect,
  268. .destroy = drm_connector_cleanup,
  269. .reset = drm_atomic_helper_connector_reset,
  270. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  271. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  272. };
  273. static int lt9611uxc_connector_init(struct drm_bridge *bridge, struct lt9611uxc *lt9611uxc)
  274. {
  275. int ret;
  276. if (!bridge->encoder) {
  277. DRM_ERROR("Parent encoder object not found");
  278. return -ENODEV;
  279. }
  280. lt9611uxc->connector.polled = DRM_CONNECTOR_POLL_HPD;
  281. drm_connector_helper_add(&lt9611uxc->connector,
  282. &lt9611uxc_bridge_connector_helper_funcs);
  283. ret = drm_connector_init(bridge->dev, &lt9611uxc->connector,
  284. &lt9611uxc_bridge_connector_funcs,
  285. DRM_MODE_CONNECTOR_HDMIA);
  286. if (ret) {
  287. DRM_ERROR("Failed to initialize connector with drm\n");
  288. return ret;
  289. }
  290. ret = drm_connector_attach_encoder(&lt9611uxc->connector, bridge->encoder);
  291. if (ret) {
  292. DRM_ERROR("Failed to link up connector to encoder: %d\n", ret);
  293. return ret;
  294. }
  295. /* Attach primary DSI */
  296. lt9611uxc->dsi0 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi0_node);
  297. if (IS_ERR(lt9611uxc->dsi0)) {
  298. ret = PTR_ERR(lt9611uxc->dsi0);
  299. drm_bridge_remove(&lt9611uxc->bridge);
  300. return ret;
  301. }
  302. /* Attach secondary DSI, if specified */
  303. if (lt9611uxc->dsi1_node) {
  304. lt9611uxc->dsi1 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi1_node);
  305. if (IS_ERR(lt9611uxc->dsi1)) {
  306. ret = PTR_ERR(lt9611uxc->dsi1);
  307. drm_bridge_remove(&lt9611uxc->bridge);
  308. return ret;
  309. }
  310. }
  311. return ret;
  312. }
  313. static int lt9611uxc_bridge_attach(struct drm_bridge *bridge,
  314. enum drm_bridge_attach_flags flags)
  315. {
  316. struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
  317. int ret;
  318. ret = lt9611uxc_connector_init(bridge, lt9611uxc);
  319. if (ret < 0)
  320. return ret;
  321. return 0;
  322. }
  323. static enum drm_mode_status
  324. lt9611uxc_bridge_mode_valid(struct drm_bridge *bridge,
  325. const struct drm_display_info *info,
  326. const struct drm_display_mode *mode)
  327. {
  328. struct lt9611uxc_mode *lt9611uxc_mode;
  329. lt9611uxc_mode = lt9611uxc_find_mode(mode);
  330. return lt9611uxc_mode ? MODE_OK : MODE_BAD;
  331. }
  332. static void lt9611uxc_video_setup(struct lt9611uxc *lt9611uxc,
  333. const struct drm_display_mode *mode)
  334. {
  335. u32 h_total, hactive, hsync_len, hfront_porch;
  336. u32 v_total, vactive, vsync_len, vfront_porch;
  337. h_total = mode->htotal;
  338. v_total = mode->vtotal;
  339. hactive = mode->hdisplay;
  340. hsync_len = mode->hsync_end - mode->hsync_start;
  341. hfront_porch = mode->hsync_start - mode->hdisplay;
  342. vactive = mode->vdisplay;
  343. vsync_len = mode->vsync_end - mode->vsync_start;
  344. vfront_porch = mode->vsync_start - mode->vdisplay;
  345. regmap_write(lt9611uxc->regmap, 0xd00d, (u8)(v_total / 256));
  346. regmap_write(lt9611uxc->regmap, 0xd00e, (u8)(v_total % 256));
  347. regmap_write(lt9611uxc->regmap, 0xd00f, (u8)(vactive / 256));
  348. regmap_write(lt9611uxc->regmap, 0xd010, (u8)(vactive % 256));
  349. regmap_write(lt9611uxc->regmap, 0xd011, (u8)(h_total / 256));
  350. regmap_write(lt9611uxc->regmap, 0xd012, (u8)(h_total % 256));
  351. regmap_write(lt9611uxc->regmap, 0xd013, (u8)(hactive / 256));
  352. regmap_write(lt9611uxc->regmap, 0xd014, (u8)(hactive % 256));
  353. regmap_write(lt9611uxc->regmap, 0xd015, (u8)(vsync_len % 256));
  354. regmap_update_bits(lt9611uxc->regmap, 0xd016, 0xf, (u8)(hsync_len / 256));
  355. regmap_write(lt9611uxc->regmap, 0xd017, (u8)(hsync_len % 256));
  356. regmap_update_bits(lt9611uxc->regmap, 0xd018, 0xf, (u8)(vfront_porch / 256));
  357. regmap_write(lt9611uxc->regmap, 0xd019, (u8)(vfront_porch % 256));
  358. regmap_update_bits(lt9611uxc->regmap, 0xd01a, 0xf, (u8)(hfront_porch / 256));
  359. regmap_write(lt9611uxc->regmap, 0xd01b, (u8)(hfront_porch % 256));
  360. }
  361. static void lt9611uxc_bridge_mode_set(struct drm_bridge *bridge,
  362. const struct drm_display_mode *mode,
  363. const struct drm_display_mode *adj_mode)
  364. {
  365. struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
  366. lt9611uxc_lock(lt9611uxc);
  367. lt9611uxc_video_setup(lt9611uxc, mode);
  368. lt9611uxc_unlock(lt9611uxc);
  369. }
  370. static enum drm_connector_status lt9611uxc_bridge_detect(struct drm_bridge *bridge)
  371. {
  372. struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
  373. unsigned int reg_val = 0;
  374. int ret;
  375. bool connected = true;
  376. lt9611uxc_lock(lt9611uxc);
  377. if (lt9611uxc->hpd_supported) {
  378. ret = regmap_read(lt9611uxc->regmap, 0xb023, &reg_val);
  379. if (ret)
  380. dev_err(lt9611uxc->dev, "failed to read hpd status: %d\n", ret);
  381. else
  382. connected = reg_val & BIT(1);
  383. }
  384. lt9611uxc->hdmi_connected = connected;
  385. lt9611uxc_unlock(lt9611uxc);
  386. return connected ? connector_status_connected :
  387. connector_status_disconnected;
  388. }
  389. static int lt9611uxc_wait_for_edid(struct lt9611uxc *lt9611uxc)
  390. {
  391. return wait_event_interruptible_timeout(lt9611uxc->wq, lt9611uxc->edid_read,
  392. msecs_to_jiffies(500));
  393. }
  394. static int lt9611uxc_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)
  395. {
  396. struct lt9611uxc *lt9611uxc = data;
  397. int ret;
  398. if (len > EDID_BLOCK_SIZE)
  399. return -EINVAL;
  400. if (block >= EDID_NUM_BLOCKS)
  401. return -EINVAL;
  402. lt9611uxc_lock(lt9611uxc);
  403. regmap_write(lt9611uxc->regmap, 0xb00b, 0x10);
  404. regmap_write(lt9611uxc->regmap, 0xb00a, block * EDID_BLOCK_SIZE);
  405. ret = regmap_noinc_read(lt9611uxc->regmap, 0xb0b0, buf, len);
  406. if (ret)
  407. dev_err(lt9611uxc->dev, "edid read failed: %d\n", ret);
  408. lt9611uxc_unlock(lt9611uxc);
  409. return 0;
  410. };
  411. static struct edid *lt9611uxc_bridge_get_edid(struct drm_bridge *bridge,
  412. struct drm_connector *connector)
  413. {
  414. struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
  415. int ret;
  416. ret = lt9611uxc_wait_for_edid(lt9611uxc);
  417. if (ret < 0) {
  418. dev_err(lt9611uxc->dev, "wait for EDID failed: %d\n", ret);
  419. return NULL;
  420. } else if (ret == 0) {
  421. dev_err(lt9611uxc->dev, "wait for EDID timeout\n");
  422. return NULL;
  423. }
  424. return drm_do_get_edid(connector, lt9611uxc_get_edid_block, lt9611uxc);
  425. }
  426. static const struct drm_bridge_funcs lt9611uxc_bridge_funcs = {
  427. .attach = lt9611uxc_bridge_attach,
  428. .mode_valid = lt9611uxc_bridge_mode_valid,
  429. .mode_set = lt9611uxc_bridge_mode_set,
  430. .detect = lt9611uxc_bridge_detect,
  431. .get_edid = lt9611uxc_bridge_get_edid,
  432. };
  433. static int lt9611uxc_parse_dt(struct device *dev,
  434. struct lt9611uxc *lt9611uxc)
  435. {
  436. lt9611uxc->dsi0_node = of_graph_get_remote_node(dev->of_node, 0, -1);
  437. if (!lt9611uxc->dsi0_node) {
  438. dev_err(lt9611uxc->dev, "failed to get remote node for primary dsi\n");
  439. return -ENODEV;
  440. }
  441. lt9611uxc->dsi1_node = of_graph_get_remote_node(dev->of_node, 1, -1);
  442. return 0;
  443. }
  444. static int lt9611uxc_gpio_init(struct lt9611uxc *lt9611uxc)
  445. {
  446. struct device *dev = lt9611uxc->dev;
  447. lt9611uxc->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
  448. if (IS_ERR(lt9611uxc->reset_gpio)) {
  449. dev_err(dev, "failed to acquire reset gpio\n");
  450. return PTR_ERR(lt9611uxc->reset_gpio);
  451. }
  452. lt9611uxc->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_LOW);
  453. if (IS_ERR(lt9611uxc->enable_gpio)) {
  454. dev_err(dev, "failed to acquire enable gpio\n");
  455. return PTR_ERR(lt9611uxc->enable_gpio);
  456. }
  457. return 0;
  458. }
  459. static int lt9611uxc_read_device_rev(struct lt9611uxc *lt9611uxc)
  460. {
  461. unsigned int rev0, rev1, rev2;
  462. int ret;
  463. lt9611uxc_lock(lt9611uxc);
  464. ret = regmap_read(lt9611uxc->regmap, 0x8100, &rev0);
  465. ret |= regmap_read(lt9611uxc->regmap, 0x8101, &rev1);
  466. ret |= regmap_read(lt9611uxc->regmap, 0x8102, &rev2);
  467. if (ret)
  468. dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);
  469. else
  470. dev_info(lt9611uxc->dev, "LT9611 revision: 0x%02x.%02x.%02x\n", rev0, rev1, rev2);
  471. lt9611uxc_unlock(lt9611uxc);
  472. return ret;
  473. }
  474. static int lt9611uxc_read_version(struct lt9611uxc *lt9611uxc)
  475. {
  476. unsigned int rev;
  477. int ret;
  478. lt9611uxc_lock(lt9611uxc);
  479. ret = regmap_read(lt9611uxc->regmap, 0xb021, &rev);
  480. if (ret)
  481. dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);
  482. else
  483. dev_info(lt9611uxc->dev, "LT9611 version: 0x%02x\n", rev);
  484. lt9611uxc_unlock(lt9611uxc);
  485. return ret < 0 ? ret : rev;
  486. }
  487. static int lt9611uxc_hdmi_hw_params(struct device *dev, void *data,
  488. struct hdmi_codec_daifmt *fmt,
  489. struct hdmi_codec_params *hparms)
  490. {
  491. /*
  492. * LT9611UXC will automatically detect rate and sample size, so no need
  493. * to setup anything here.
  494. */
  495. return 0;
  496. }
  497. static void lt9611uxc_audio_shutdown(struct device *dev, void *data)
  498. {
  499. }
  500. static int lt9611uxc_hdmi_i2s_get_dai_id(struct snd_soc_component *component,
  501. struct device_node *endpoint)
  502. {
  503. struct of_endpoint of_ep;
  504. int ret;
  505. ret = of_graph_parse_endpoint(endpoint, &of_ep);
  506. if (ret < 0)
  507. return ret;
  508. /*
  509. * HDMI sound should be located as reg = <2>
  510. * Then, it is sound port 0
  511. */
  512. if (of_ep.port == 2)
  513. return 0;
  514. return -EINVAL;
  515. }
  516. static const struct hdmi_codec_ops lt9611uxc_codec_ops = {
  517. .hw_params = lt9611uxc_hdmi_hw_params,
  518. .audio_shutdown = lt9611uxc_audio_shutdown,
  519. .get_dai_id = lt9611uxc_hdmi_i2s_get_dai_id,
  520. };
  521. static int lt9611uxc_audio_init(struct device *dev, struct lt9611uxc *lt9611uxc)
  522. {
  523. struct hdmi_codec_pdata codec_data = {
  524. .ops = &lt9611uxc_codec_ops,
  525. .max_i2s_channels = 2,
  526. .i2s = 1,
  527. .data = lt9611uxc,
  528. };
  529. lt9611uxc->audio_pdev =
  530. platform_device_register_data(dev, HDMI_CODEC_DRV_NAME,
  531. PLATFORM_DEVID_AUTO,
  532. &codec_data, sizeof(codec_data));
  533. return PTR_ERR_OR_ZERO(lt9611uxc->audio_pdev);
  534. }
  535. static void lt9611uxc_audio_exit(struct lt9611uxc *lt9611uxc)
  536. {
  537. if (lt9611uxc->audio_pdev) {
  538. platform_device_unregister(lt9611uxc->audio_pdev);
  539. lt9611uxc->audio_pdev = NULL;
  540. }
  541. }
  542. #define LT9611UXC_FW_PAGE_SIZE 32
  543. static void lt9611uxc_firmware_write_page(struct lt9611uxc *lt9611uxc, u16 addr, const u8 *buf)
  544. {
  545. struct reg_sequence seq_write_prepare[] = {
  546. REG_SEQ0(0x805a, 0x04),
  547. REG_SEQ0(0x805a, 0x00),
  548. REG_SEQ0(0x805e, 0xdf),
  549. REG_SEQ0(0x805a, 0x20),
  550. REG_SEQ0(0x805a, 0x00),
  551. REG_SEQ0(0x8058, 0x21),
  552. };
  553. struct reg_sequence seq_write_addr[] = {
  554. REG_SEQ0(0x805b, (addr >> 16) & 0xff),
  555. REG_SEQ0(0x805c, (addr >> 8) & 0xff),
  556. REG_SEQ0(0x805d, addr & 0xff),
  557. REG_SEQ0(0x805a, 0x10),
  558. REG_SEQ0(0x805a, 0x00),
  559. };
  560. regmap_write(lt9611uxc->regmap, 0x8108, 0xbf);
  561. msleep(20);
  562. regmap_write(lt9611uxc->regmap, 0x8108, 0xff);
  563. msleep(20);
  564. regmap_multi_reg_write(lt9611uxc->regmap, seq_write_prepare, ARRAY_SIZE(seq_write_prepare));
  565. regmap_noinc_write(lt9611uxc->regmap, 0x8059, buf, LT9611UXC_FW_PAGE_SIZE);
  566. regmap_multi_reg_write(lt9611uxc->regmap, seq_write_addr, ARRAY_SIZE(seq_write_addr));
  567. msleep(20);
  568. }
  569. static void lt9611uxc_firmware_read_page(struct lt9611uxc *lt9611uxc, u16 addr, char *buf)
  570. {
  571. struct reg_sequence seq_read_page[] = {
  572. REG_SEQ0(0x805a, 0xa0),
  573. REG_SEQ0(0x805a, 0x80),
  574. REG_SEQ0(0x805b, (addr >> 16) & 0xff),
  575. REG_SEQ0(0x805c, (addr >> 8) & 0xff),
  576. REG_SEQ0(0x805d, addr & 0xff),
  577. REG_SEQ0(0x805a, 0x90),
  578. REG_SEQ0(0x805a, 0x80),
  579. REG_SEQ0(0x8058, 0x21),
  580. };
  581. regmap_multi_reg_write(lt9611uxc->regmap, seq_read_page, ARRAY_SIZE(seq_read_page));
  582. regmap_noinc_read(lt9611uxc->regmap, 0x805f, buf, LT9611UXC_FW_PAGE_SIZE);
  583. }
  584. static char *lt9611uxc_firmware_read(struct lt9611uxc *lt9611uxc, size_t size)
  585. {
  586. struct reg_sequence seq_read_setup[] = {
  587. REG_SEQ0(0x805a, 0x84),
  588. REG_SEQ0(0x805a, 0x80),
  589. };
  590. char *readbuf;
  591. u16 offset;
  592. readbuf = kzalloc(ALIGN(size, 32), GFP_KERNEL);
  593. if (!readbuf)
  594. return NULL;
  595. regmap_multi_reg_write(lt9611uxc->regmap, seq_read_setup, ARRAY_SIZE(seq_read_setup));
  596. for (offset = 0;
  597. offset < size;
  598. offset += LT9611UXC_FW_PAGE_SIZE)
  599. lt9611uxc_firmware_read_page(lt9611uxc, offset, &readbuf[offset]);
  600. return readbuf;
  601. }
  602. static int lt9611uxc_firmware_update(struct lt9611uxc *lt9611uxc)
  603. {
  604. int ret;
  605. u16 offset;
  606. size_t remain;
  607. char *readbuf;
  608. const struct firmware *fw;
  609. struct reg_sequence seq_setup[] = {
  610. REG_SEQ0(0x805e, 0xdf),
  611. REG_SEQ0(0x8058, 0x00),
  612. REG_SEQ0(0x8059, 0x50),
  613. REG_SEQ0(0x805a, 0x10),
  614. REG_SEQ0(0x805a, 0x00),
  615. };
  616. struct reg_sequence seq_block_erase[] = {
  617. REG_SEQ0(0x805a, 0x04),
  618. REG_SEQ0(0x805a, 0x00),
  619. REG_SEQ0(0x805b, 0x00),
  620. REG_SEQ0(0x805c, 0x00),
  621. REG_SEQ0(0x805d, 0x00),
  622. REG_SEQ0(0x805a, 0x01),
  623. REG_SEQ0(0x805a, 0x00),
  624. };
  625. ret = request_firmware(&fw, "lt9611uxc_fw.bin", lt9611uxc->dev);
  626. if (ret < 0)
  627. return ret;
  628. dev_info(lt9611uxc->dev, "Updating firmware\n");
  629. lt9611uxc_lock(lt9611uxc);
  630. regmap_multi_reg_write(lt9611uxc->regmap, seq_setup, ARRAY_SIZE(seq_setup));
  631. /*
  632. * Need erase block 2 timess here. Sometimes, block erase can fail.
  633. * This is a workaroud.
  634. */
  635. regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));
  636. msleep(3000);
  637. regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));
  638. msleep(3000);
  639. for (offset = 0, remain = fw->size;
  640. remain >= LT9611UXC_FW_PAGE_SIZE;
  641. offset += LT9611UXC_FW_PAGE_SIZE, remain -= LT9611UXC_FW_PAGE_SIZE)
  642. lt9611uxc_firmware_write_page(lt9611uxc, offset, fw->data + offset);
  643. if (remain > 0) {
  644. char buf[LT9611UXC_FW_PAGE_SIZE];
  645. memset(buf, 0xff, LT9611UXC_FW_PAGE_SIZE);
  646. memcpy(buf, fw->data + offset, remain);
  647. lt9611uxc_firmware_write_page(lt9611uxc, offset, buf);
  648. }
  649. msleep(20);
  650. readbuf = lt9611uxc_firmware_read(lt9611uxc, fw->size);
  651. if (!readbuf) {
  652. ret = -ENOMEM;
  653. goto out;
  654. }
  655. if (!memcmp(readbuf, fw->data, fw->size)) {
  656. dev_err(lt9611uxc->dev, "Firmware update failed\n");
  657. print_hex_dump(KERN_ERR, "fw: ", DUMP_PREFIX_OFFSET,
  658. 16, 1, readbuf, fw->size, false);
  659. ret = -EINVAL;
  660. } else {
  661. dev_info(lt9611uxc->dev, "Firmware updates successfully\n");
  662. ret = 0;
  663. }
  664. kfree(readbuf);
  665. out:
  666. lt9611uxc_unlock(lt9611uxc);
  667. lt9611uxc_reset(lt9611uxc);
  668. release_firmware(fw);
  669. return ret;
  670. }
  671. static ssize_t lt9611uxc_firmware_store(struct device *dev,
  672. struct device_attribute *attr, const char *buf, size_t len)
  673. {
  674. struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);
  675. int ret;
  676. ret = lt9611uxc_firmware_update(lt9611uxc);
  677. if (ret < 0)
  678. return ret;
  679. return len;
  680. }
  681. static ssize_t lt9611uxc_firmware_show(struct device *dev, struct device_attribute *attr, char *buf)
  682. {
  683. struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);
  684. return sysfs_emit(buf, "%02x\n", lt9611uxc->fw_version);
  685. }
  686. static DEVICE_ATTR_RW(lt9611uxc_firmware);
  687. static struct attribute *lt9611uxc_attrs[] = {
  688. &dev_attr_lt9611uxc_firmware.attr,
  689. NULL,
  690. };
  691. static const struct attribute_group lt9611uxc_attr_group = {
  692. .attrs = lt9611uxc_attrs,
  693. };
  694. static const struct attribute_group *lt9611uxc_attr_groups[] = {
  695. &lt9611uxc_attr_group,
  696. NULL,
  697. };
  698. static int lt9611uxc_probe(struct i2c_client *client)
  699. {
  700. struct lt9611uxc *lt9611uxc;
  701. struct device *dev = &client->dev;
  702. int ret;
  703. bool fw_updated = false;
  704. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  705. dev_err(dev, "device doesn't support I2C\n");
  706. return -ENODEV;
  707. }
  708. lt9611uxc = devm_kzalloc(dev, sizeof(*lt9611uxc), GFP_KERNEL);
  709. if (!lt9611uxc)
  710. return -ENOMEM;
  711. lt9611uxc->dev = dev;
  712. lt9611uxc->client = client;
  713. mutex_init(&lt9611uxc->ocm_lock);
  714. lt9611uxc->regmap = devm_regmap_init_i2c(client, &lt9611uxc_regmap_config);
  715. if (IS_ERR(lt9611uxc->regmap)) {
  716. dev_err(lt9611uxc->dev, "regmap i2c init failed\n");
  717. return PTR_ERR(lt9611uxc->regmap);
  718. }
  719. ret = lt9611uxc_parse_dt(dev, lt9611uxc);
  720. if (ret) {
  721. dev_err(dev, "failed to parse device tree\n");
  722. return ret;
  723. }
  724. ret = lt9611uxc_gpio_init(lt9611uxc);
  725. if (ret < 0)
  726. goto err_of_put;
  727. ret = lt9611uxc_regulator_init(lt9611uxc);
  728. if (ret < 0)
  729. goto err_of_put;
  730. lt9611uxc_assert_5v(lt9611uxc);
  731. ret = lt9611uxc_regulator_enable(lt9611uxc);
  732. if (ret)
  733. goto err_of_put;
  734. lt9611uxc_reset(lt9611uxc);
  735. ret = lt9611uxc_read_device_rev(lt9611uxc);
  736. if (ret) {
  737. dev_err(dev, "failed to read chip rev\n");
  738. goto err_disable_regulators;
  739. }
  740. retry:
  741. ret = lt9611uxc_read_version(lt9611uxc);
  742. if (ret < 0) {
  743. dev_err(dev, "failed to read FW version\n");
  744. goto err_disable_regulators;
  745. } else if (ret == 0) {
  746. if (!fw_updated) {
  747. fw_updated = true;
  748. dev_err(dev, "FW version 0, enforcing firmware update\n");
  749. ret = lt9611uxc_firmware_update(lt9611uxc);
  750. if (ret < 0)
  751. goto err_disable_regulators;
  752. else
  753. goto retry;
  754. } else {
  755. dev_err(dev, "FW version 0, update failed\n");
  756. ret = -EOPNOTSUPP;
  757. goto err_disable_regulators;
  758. }
  759. } else if (ret < 0x40) {
  760. dev_info(dev, "FW version 0x%x, HPD not supported\n", ret);
  761. } else {
  762. lt9611uxc->hpd_supported = true;
  763. }
  764. lt9611uxc->fw_version = ret;
  765. init_waitqueue_head(&lt9611uxc->wq);
  766. INIT_WORK(&lt9611uxc->work, lt9611uxc_hpd_work);
  767. ret = devm_request_threaded_irq(dev, client->irq, NULL,
  768. lt9611uxc_irq_thread_handler,
  769. IRQF_ONESHOT, "lt9611uxc", lt9611uxc);
  770. if (ret) {
  771. dev_err(dev, "failed to request irq\n");
  772. goto err_disable_regulators;
  773. }
  774. i2c_set_clientdata(client, lt9611uxc);
  775. lt9611uxc->bridge.funcs = &lt9611uxc_bridge_funcs;
  776. lt9611uxc->bridge.of_node = client->dev.of_node;
  777. lt9611uxc->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
  778. if (lt9611uxc->hpd_supported)
  779. lt9611uxc->bridge.ops |= DRM_BRIDGE_OP_HPD;
  780. lt9611uxc->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
  781. drm_bridge_add(&lt9611uxc->bridge);
  782. return lt9611uxc_audio_init(dev, lt9611uxc);
  783. err_disable_regulators:
  784. regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);
  785. err_of_put:
  786. of_node_put(lt9611uxc->dsi1_node);
  787. of_node_put(lt9611uxc->dsi0_node);
  788. return ret;
  789. }
  790. static void lt9611uxc_remove(struct i2c_client *client)
  791. {
  792. struct lt9611uxc *lt9611uxc = i2c_get_clientdata(client);
  793. disable_irq(client->irq);
  794. cancel_work_sync(&lt9611uxc->work);
  795. lt9611uxc_audio_exit(lt9611uxc);
  796. drm_bridge_remove(&lt9611uxc->bridge);
  797. mutex_destroy(&lt9611uxc->ocm_lock);
  798. regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);
  799. of_node_put(lt9611uxc->dsi1_node);
  800. of_node_put(lt9611uxc->dsi0_node);
  801. }
  802. static struct i2c_device_id lt9611uxc_id[] = {
  803. { "lt,lt9611uxc", 0 },
  804. { /* sentinel */ }
  805. };
  806. static const struct of_device_id lt9611uxc_match_table[] = {
  807. { .compatible = "lt,lt9611uxc" },
  808. { /* sentinel */ }
  809. };
  810. MODULE_DEVICE_TABLE(of, lt9611uxc_match_table);
  811. static struct i2c_driver lt9611uxc_driver = {
  812. .driver = {
  813. .name = "lt9611uxc",
  814. .of_match_table = lt9611uxc_match_table,
  815. .dev_groups = lt9611uxc_attr_groups,
  816. },
  817. .probe = lt9611uxc_probe,
  818. .remove = lt9611uxc_remove,
  819. .id_table = lt9611uxc_id,
  820. };
  821. module_i2c_driver(lt9611uxc_driver);
  822. MODULE_AUTHOR("Dmitry Baryshkov <[email protected]>");
  823. MODULE_LICENSE("GPL v2");