dp_li_tx.c 16 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "dp_types.h"
  21. #include "dp_tx.h"
  22. #include "dp_li_tx.h"
  23. #include "dp_tx_desc.h"
  24. #include <dp_internal.h>
  25. #include <dp_htt.h>
  26. #include <hal_li_api.h>
  27. #include <hal_li_tx.h>
  28. #include "dp_peer.h"
  29. #ifdef FEATURE_WDS
  30. #include "dp_txrx_wds.h"
  31. #endif
  32. #include "dp_li.h"
  33. extern uint8_t sec_type_map[MAX_CDP_SEC_TYPE];
  34. void dp_tx_comp_get_params_from_hal_desc_li(struct dp_soc *soc,
  35. void *tx_comp_hal_desc,
  36. struct dp_tx_desc_s **r_tx_desc)
  37. {
  38. uint8_t pool_id;
  39. uint32_t tx_desc_id;
  40. tx_desc_id = hal_tx_comp_get_desc_id(tx_comp_hal_desc);
  41. pool_id = (tx_desc_id & DP_TX_DESC_ID_POOL_MASK) >>
  42. DP_TX_DESC_ID_POOL_OS;
  43. /* Find Tx descriptor */
  44. *r_tx_desc = dp_tx_desc_find(soc, pool_id,
  45. (tx_desc_id & DP_TX_DESC_ID_PAGE_MASK) >>
  46. DP_TX_DESC_ID_PAGE_OS,
  47. (tx_desc_id & DP_TX_DESC_ID_OFFSET_MASK) >>
  48. DP_TX_DESC_ID_OFFSET_OS);
  49. /* Pool id is not matching. Error */
  50. if ((*r_tx_desc)->pool_id != pool_id) {
  51. dp_tx_comp_alert("Tx Comp pool id %d not matched %d",
  52. pool_id, (*r_tx_desc)->pool_id);
  53. qdf_assert_always(0);
  54. }
  55. (*r_tx_desc)->peer_id = hal_tx_comp_get_peer_id(tx_comp_hal_desc);
  56. }
  57. static inline
  58. void dp_tx_process_mec_notify_li(struct dp_soc *soc, uint8_t *status)
  59. {
  60. struct dp_vdev *vdev;
  61. uint8_t vdev_id;
  62. uint32_t *htt_desc = (uint32_t *)status;
  63. /*
  64. * Get vdev id from HTT status word in case of MEC
  65. * notification
  66. */
  67. vdev_id = HTT_TX_WBM_COMPLETION_V2_VDEV_ID_GET(htt_desc[3]);
  68. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  69. return;
  70. vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  71. DP_MOD_ID_HTT_COMP);
  72. if (!vdev)
  73. return;
  74. dp_tx_mec_handler(vdev, status);
  75. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_HTT_COMP);
  76. }
  77. void dp_tx_process_htt_completion_li(struct dp_soc *soc,
  78. struct dp_tx_desc_s *tx_desc,
  79. uint8_t *status,
  80. uint8_t ring_id)
  81. {
  82. uint8_t tx_status;
  83. struct dp_pdev *pdev;
  84. struct dp_vdev *vdev = NULL;
  85. struct hal_tx_completion_status ts = {0};
  86. uint32_t *htt_desc = (uint32_t *)status;
  87. struct dp_txrx_peer *txrx_peer;
  88. dp_txrx_ref_handle txrx_ref_handle = NULL;
  89. struct cdp_tid_tx_stats *tid_stats = NULL;
  90. struct htt_soc *htt_handle;
  91. uint8_t vdev_id;
  92. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_desc[0]);
  93. htt_handle = (struct htt_soc *)soc->htt_handle;
  94. htt_wbm_event_record(htt_handle->htt_logger_handle, tx_status, status);
  95. /*
  96. * There can be scenario where WBM consuming descriptor enqueued
  97. * from TQM2WBM first and TQM completion can happen before MEC
  98. * notification comes from FW2WBM. Avoid access any field of tx
  99. * descriptor in case of MEC notify.
  100. */
  101. if (tx_status == HTT_TX_FW2WBM_TX_STATUS_MEC_NOTIFY)
  102. return dp_tx_process_mec_notify_li(soc, status);
  103. /*
  104. * If the descriptor is already freed in vdev_detach,
  105. * continue to next descriptor
  106. */
  107. if (qdf_unlikely(!tx_desc->flags)) {
  108. dp_tx_comp_info_rl("Descriptor freed in vdev_detach %d",
  109. tx_desc->id);
  110. return;
  111. }
  112. if (qdf_unlikely(tx_desc->vdev_id == DP_INVALID_VDEV_ID)) {
  113. dp_tx_comp_info_rl("Invalid vdev_id %d", tx_desc->id);
  114. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  115. goto release_tx_desc;
  116. }
  117. pdev = tx_desc->pdev;
  118. if (qdf_unlikely(tx_desc->pdev->is_pdev_down)) {
  119. dp_tx_comp_info_rl("pdev in down state %d", tx_desc->id);
  120. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  121. goto release_tx_desc;
  122. }
  123. qdf_assert(tx_desc->pdev);
  124. vdev_id = tx_desc->vdev_id;
  125. vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  126. DP_MOD_ID_HTT_COMP);
  127. if (qdf_unlikely(!vdev)) {
  128. dp_tx_comp_info_rl("Unable to get vdev ref %d", tx_desc->id);
  129. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  130. goto release_tx_desc;
  131. }
  132. switch (tx_status) {
  133. case HTT_TX_FW2WBM_TX_STATUS_OK:
  134. case HTT_TX_FW2WBM_TX_STATUS_DROP:
  135. case HTT_TX_FW2WBM_TX_STATUS_TTL:
  136. {
  137. uint8_t tid;
  138. if (HTT_TX_WBM_COMPLETION_V2_VALID_GET(htt_desc[2])) {
  139. ts.peer_id =
  140. HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_GET(
  141. htt_desc[2]);
  142. ts.tid =
  143. HTT_TX_WBM_COMPLETION_V2_TID_NUM_GET(
  144. htt_desc[2]);
  145. } else {
  146. ts.peer_id = HTT_INVALID_PEER;
  147. ts.tid = HTT_INVALID_TID;
  148. }
  149. ts.release_src = HAL_TX_COMP_RELEASE_SOURCE_FW;
  150. ts.ppdu_id =
  151. HTT_TX_WBM_COMPLETION_V2_SCH_CMD_ID_GET(
  152. htt_desc[1]);
  153. ts.ack_frame_rssi =
  154. HTT_TX_WBM_COMPLETION_V2_ACK_FRAME_RSSI_GET(
  155. htt_desc[1]);
  156. ts.tsf = htt_desc[3];
  157. ts.first_msdu = 1;
  158. ts.last_msdu = 1;
  159. tid = ts.tid;
  160. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  161. tid = CDP_MAX_DATA_TIDS - 1;
  162. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  163. if (qdf_unlikely(pdev->delay_stats_flag))
  164. dp_tx_compute_delay(vdev, tx_desc, tid, ring_id);
  165. if (tx_status < CDP_MAX_TX_HTT_STATUS)
  166. tid_stats->htt_status_cnt[tx_status]++;
  167. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, ts.peer_id,
  168. &txrx_ref_handle,
  169. DP_MOD_ID_HTT_COMP);
  170. if (qdf_likely(txrx_peer)) {
  171. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1,
  172. qdf_nbuf_len(tx_desc->nbuf));
  173. if (tx_status != HTT_TX_FW2WBM_TX_STATUS_OK)
  174. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  175. }
  176. dp_tx_comp_process_tx_status(soc, tx_desc, &ts, txrx_peer,
  177. ring_id);
  178. dp_tx_comp_process_desc(soc, tx_desc, &ts, txrx_peer);
  179. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  180. if (qdf_likely(txrx_peer))
  181. dp_txrx_peer_unref_delete(txrx_ref_handle,
  182. DP_MOD_ID_HTT_COMP);
  183. break;
  184. }
  185. case HTT_TX_FW2WBM_TX_STATUS_REINJECT:
  186. {
  187. uint8_t reinject_reason;
  188. reinject_reason =
  189. HTT_TX_WBM_COMPLETION_V2_REINJECT_REASON_GET(
  190. htt_desc[0]);
  191. dp_tx_reinject_handler(soc, vdev, tx_desc,
  192. status, reinject_reason);
  193. break;
  194. }
  195. case HTT_TX_FW2WBM_TX_STATUS_INSPECT:
  196. {
  197. dp_tx_inspect_handler(soc, vdev, tx_desc, status);
  198. break;
  199. }
  200. case HTT_TX_FW2WBM_TX_STATUS_VDEVID_MISMATCH:
  201. {
  202. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  203. goto release_tx_desc;
  204. }
  205. default:
  206. dp_tx_comp_err("Invalid HTT tx_status %d\n",
  207. tx_status);
  208. goto release_tx_desc;
  209. }
  210. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_HTT_COMP);
  211. return;
  212. release_tx_desc:
  213. dp_tx_comp_free_buf(soc, tx_desc);
  214. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  215. if (vdev)
  216. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_HTT_COMP);
  217. }
  218. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  219. /*
  220. * dp_tx_get_rbm_id()- Get the RBM ID for data transmission completion.
  221. * @dp_soc - DP soc structure pointer
  222. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  223. *
  224. * Return - HAL ring handle
  225. */
  226. #ifdef IPA_OFFLOAD
  227. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  228. uint8_t ring_id)
  229. {
  230. return (ring_id + soc->wbm_sw0_bm_id);
  231. }
  232. #else
  233. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  234. uint8_t ring_id)
  235. {
  236. if (ring_id == soc->num_tcl_data_rings)
  237. return HAL_WBM_SW4_BM_ID(soc->wbm_sw0_bm_id);
  238. return (ring_id + HAL_WBM_SW0_BM_ID(soc->wbm_sw0_bm_id));
  239. }
  240. #endif
  241. #else
  242. #ifdef TX_MULTI_TCL
  243. #ifdef IPA_OFFLOAD
  244. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  245. uint8_t ring_id)
  246. {
  247. if (soc->wlan_cfg_ctx->ipa_enabled)
  248. return (ring_id + soc->wbm_sw0_bm_id);
  249. return soc->wlan_cfg_ctx->tcl_wbm_map_array[ring_id].wbm_rbm_id;
  250. }
  251. #else
  252. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  253. uint8_t ring_id)
  254. {
  255. return soc->wlan_cfg_ctx->tcl_wbm_map_array[ring_id].wbm_rbm_id;
  256. }
  257. #endif
  258. #else
  259. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  260. uint8_t ring_id)
  261. {
  262. return (ring_id + soc->wbm_sw0_bm_id);
  263. }
  264. #endif
  265. #endif
  266. #if defined(CLEAR_SW2TCL_CONSUMED_DESC)
  267. /**
  268. * dp_tx_clear_consumed_hw_descs - Reset all the consumed Tx ring descs to 0
  269. *
  270. * @soc: DP soc handle
  271. * @hal_ring_hdl: Source ring pointer
  272. *
  273. * Return: void
  274. */
  275. static inline
  276. void dp_tx_clear_consumed_hw_descs(struct dp_soc *soc,
  277. hal_ring_handle_t hal_ring_hdl)
  278. {
  279. void *desc = hal_srng_src_get_next_consumed(soc->hal_soc, hal_ring_hdl);
  280. while (desc) {
  281. hal_tx_desc_clear(desc);
  282. desc = hal_srng_src_get_next_consumed(soc->hal_soc,
  283. hal_ring_hdl);
  284. }
  285. }
  286. #else
  287. static inline
  288. void dp_tx_clear_consumed_hw_descs(struct dp_soc *soc,
  289. hal_ring_handle_t hal_ring_hdl)
  290. {
  291. }
  292. #endif /* CLEAR_SW2TCL_CONSUMED_DESC */
  293. #ifdef CONFIG_SAWF
  294. /**
  295. * dp_sawf_config_li - Configure sawf specific fields in tcl
  296. *
  297. * @soc: DP soc handle
  298. * @hhal_tx_desc_cached: tx descriptor
  299. * @vdev_id: vdev id
  300. * @nbuf: skb buffer
  301. *
  302. * Return: void
  303. */
  304. static inline
  305. void dp_sawf_config_li(struct dp_soc *soc, uint32_t *hal_tx_desc_cached,
  306. uint16_t *fw_metadata, uint16_t vdev_id,
  307. qdf_nbuf_t nbuf)
  308. {
  309. uint8_t q_id = 0;
  310. uint32_t search_index;
  311. if (!wlan_cfg_get_sawf_config(soc->wlan_cfg_ctx))
  312. return;
  313. q_id = dp_sawf_queue_id_get(nbuf);
  314. if (q_id == DP_SAWF_DEFAULT_Q_INVALID)
  315. return;
  316. dp_sawf_tcl_cmd(fw_metadata, nbuf);
  317. search_index = dp_sawf_get_search_index(soc, nbuf, vdev_id,
  318. q_id);
  319. hal_tx_desc_set_hlos_tid(hal_tx_desc_cached, (q_id & 0x7));
  320. hal_tx_desc_set_search_type_li(soc->hal_soc, hal_tx_desc_cached,
  321. HAL_TX_ADDR_INDEX_SEARCH);
  322. hal_tx_desc_set_search_index_li(soc->hal_soc, hal_tx_desc_cached,
  323. search_index);
  324. }
  325. #else
  326. static inline
  327. void dp_sawf_config_li(struct dp_soc *soc, uint32_t *hal_tx_desc_cached,
  328. uint16_t *fw_metadata, uint16_t vdev_id,
  329. qdf_nbuf_t nbuf)
  330. {
  331. }
  332. #define dp_sawf_tx_enqueue_peer_stats(soc, tx_desc)
  333. #define dp_sawf_tx_enqueue_fail_peer_stats(soc, tx_desc)
  334. #endif
  335. QDF_STATUS
  336. dp_tx_hw_enqueue_li(struct dp_soc *soc, struct dp_vdev *vdev,
  337. struct dp_tx_desc_s *tx_desc, uint16_t fw_metadata,
  338. struct cdp_tx_exception_metadata *tx_exc_metadata,
  339. struct dp_tx_msdu_info_s *msdu_info)
  340. {
  341. void *hal_tx_desc;
  342. uint32_t *hal_tx_desc_cached;
  343. int coalesce = 0;
  344. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  345. uint8_t ring_id = tx_q->ring_id & DP_TX_QUEUE_MASK;
  346. uint8_t tid = msdu_info->tid;
  347. /*
  348. * Setting it initialization statically here to avoid
  349. * a memset call jump with qdf_mem_set call
  350. */
  351. uint8_t cached_desc[HAL_TX_DESC_LEN_BYTES] = { 0 };
  352. enum cdp_sec_type sec_type = ((tx_exc_metadata &&
  353. tx_exc_metadata->sec_type != CDP_INVALID_SEC_TYPE) ?
  354. tx_exc_metadata->sec_type : vdev->sec_type);
  355. /* Return Buffer Manager ID */
  356. uint8_t bm_id = dp_tx_get_rbm_id_li(soc, ring_id);
  357. hal_ring_handle_t hal_ring_hdl = NULL;
  358. QDF_STATUS status = QDF_STATUS_E_RESOURCES;
  359. if (!dp_tx_is_desc_id_valid(soc, tx_desc->id)) {
  360. dp_err_rl("Invalid tx desc id:%d", tx_desc->id);
  361. return QDF_STATUS_E_RESOURCES;
  362. }
  363. hal_tx_desc_cached = (void *)cached_desc;
  364. hal_tx_desc_set_buf_addr(soc->hal_soc, hal_tx_desc_cached,
  365. tx_desc->dma_addr, bm_id, tx_desc->id,
  366. (tx_desc->flags & DP_TX_DESC_FLAG_FRAG));
  367. hal_tx_desc_set_lmac_id_li(soc->hal_soc, hal_tx_desc_cached,
  368. vdev->lmac_id);
  369. hal_tx_desc_set_search_type_li(soc->hal_soc, hal_tx_desc_cached,
  370. vdev->search_type);
  371. hal_tx_desc_set_search_index_li(soc->hal_soc, hal_tx_desc_cached,
  372. vdev->bss_ast_idx);
  373. hal_tx_desc_set_dscp_tid_table_id(soc->hal_soc, hal_tx_desc_cached,
  374. vdev->dscp_tid_map_id);
  375. hal_tx_desc_set_encrypt_type(hal_tx_desc_cached,
  376. sec_type_map[sec_type]);
  377. hal_tx_desc_set_cache_set_num(soc->hal_soc, hal_tx_desc_cached,
  378. (vdev->bss_ast_hash & 0xF));
  379. if (dp_sawf_tag_valid_get(tx_desc->nbuf)) {
  380. dp_sawf_config_li(soc, hal_tx_desc_cached, &fw_metadata,
  381. vdev->vdev_id, tx_desc->nbuf);
  382. dp_sawf_tx_enqueue_peer_stats(soc, tx_desc);
  383. }
  384. hal_tx_desc_set_fw_metadata(hal_tx_desc_cached, fw_metadata);
  385. hal_tx_desc_set_buf_length(hal_tx_desc_cached, tx_desc->length);
  386. hal_tx_desc_set_buf_offset(hal_tx_desc_cached, tx_desc->pkt_offset);
  387. hal_tx_desc_set_encap_type(hal_tx_desc_cached, tx_desc->tx_encap_type);
  388. hal_tx_desc_set_addr_search_flags(hal_tx_desc_cached,
  389. vdev->hal_desc_addr_search_flags);
  390. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  391. hal_tx_desc_set_to_fw(hal_tx_desc_cached, 1);
  392. /* verify checksum offload configuration*/
  393. if ((qdf_nbuf_get_tx_cksum(tx_desc->nbuf) ==
  394. QDF_NBUF_TX_CKSUM_TCP_UDP) ||
  395. qdf_nbuf_is_tso(tx_desc->nbuf)) {
  396. hal_tx_desc_set_l3_checksum_en(hal_tx_desc_cached, 1);
  397. hal_tx_desc_set_l4_checksum_en(hal_tx_desc_cached, 1);
  398. }
  399. if (tid != HTT_TX_EXT_TID_INVALID)
  400. hal_tx_desc_set_hlos_tid(hal_tx_desc_cached, tid);
  401. if (tx_desc->flags & DP_TX_DESC_FLAG_MESH)
  402. hal_tx_desc_set_mesh_en(soc->hal_soc, hal_tx_desc_cached, 1);
  403. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  404. qdf_unlikely(
  405. wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx)) ||
  406. dp_tx_pkt_tracepoints_enabled() ||
  407. qdf_unlikely(soc->rdkstats_enabled))
  408. tx_desc->timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  409. else
  410. dp_tx_desc_set_timestamp(tx_desc);
  411. dp_verbose_debug("length:%d , type = %d, dma_addr %llx, offset %d desc id %u",
  412. tx_desc->length,
  413. (tx_desc->flags & DP_TX_DESC_FLAG_FRAG),
  414. (uint64_t)tx_desc->dma_addr, tx_desc->pkt_offset,
  415. tx_desc->id);
  416. hal_ring_hdl = dp_tx_get_hal_ring_hdl(soc, ring_id);
  417. if (qdf_unlikely(dp_tx_hal_ring_access_start(soc, hal_ring_hdl))) {
  418. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  419. "%s %d : HAL RING Access Failed -- %pK",
  420. __func__, __LINE__, hal_ring_hdl);
  421. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  422. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  423. dp_sawf_tx_enqueue_fail_peer_stats(soc, tx_desc);
  424. return status;
  425. }
  426. dp_tx_clear_consumed_hw_descs(soc, hal_ring_hdl);
  427. /* Sync cached descriptor with HW */
  428. hal_tx_desc = hal_srng_src_get_next(soc->hal_soc, hal_ring_hdl);
  429. if (qdf_unlikely(!hal_tx_desc)) {
  430. dp_verbose_debug("TCL ring full ring_id:%d", ring_id);
  431. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  432. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  433. dp_sawf_tx_enqueue_fail_peer_stats(soc, tx_desc);
  434. goto ring_access_fail;
  435. }
  436. tx_desc->flags |= DP_TX_DESC_FLAG_QUEUED_TX;
  437. dp_vdev_peer_stats_update_protocol_cnt_tx(vdev, tx_desc->nbuf);
  438. hal_tx_desc_sync(hal_tx_desc_cached, hal_tx_desc);
  439. coalesce = dp_tx_attempt_coalescing(soc, vdev, tx_desc, tid, msdu_info);
  440. DP_STATS_INC_PKT(vdev, tx_i.processed, 1, tx_desc->length);
  441. DP_STATS_INC(soc, tx.tcl_enq[ring_id], 1);
  442. dp_tx_update_stats(soc, tx_desc->nbuf);
  443. status = QDF_STATUS_SUCCESS;
  444. dp_tx_hw_desc_update_evt((uint8_t *)hal_tx_desc_cached,
  445. hal_ring_hdl, soc);
  446. ring_access_fail:
  447. dp_tx_ring_access_end_wrapper(soc, hal_ring_hdl, coalesce);
  448. dp_pkt_add_timestamp(vdev, QDF_PKT_TX_DRIVER_EXIT,
  449. qdf_get_log_timestamp(), tx_desc->nbuf);
  450. return status;
  451. }
  452. QDF_STATUS dp_tx_desc_pool_init_li(struct dp_soc *soc,
  453. uint32_t num_elem,
  454. uint8_t pool_id)
  455. {
  456. uint32_t id, count, page_id, offset, pool_id_32;
  457. struct dp_tx_desc_s *tx_desc;
  458. struct dp_tx_desc_pool_s *tx_desc_pool;
  459. uint16_t num_desc_per_page;
  460. tx_desc_pool = &soc->tx_desc[pool_id];
  461. tx_desc = tx_desc_pool->freelist;
  462. count = 0;
  463. pool_id_32 = (uint32_t)pool_id;
  464. num_desc_per_page = tx_desc_pool->desc_pages.num_element_per_page;
  465. while (tx_desc) {
  466. page_id = count / num_desc_per_page;
  467. offset = count % num_desc_per_page;
  468. id = ((pool_id_32 << DP_TX_DESC_ID_POOL_OS) |
  469. (page_id << DP_TX_DESC_ID_PAGE_OS) | offset);
  470. tx_desc->id = id;
  471. tx_desc->pool_id = pool_id;
  472. dp_tx_desc_set_magic(tx_desc, DP_TX_MAGIC_PATTERN_FREE);
  473. tx_desc = tx_desc->next;
  474. count++;
  475. }
  476. return QDF_STATUS_SUCCESS;
  477. }
  478. void dp_tx_desc_pool_deinit_li(struct dp_soc *soc,
  479. struct dp_tx_desc_pool_s *tx_desc_pool,
  480. uint8_t pool_id)
  481. {
  482. }