dp_tx.h 29 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef __DP_TX_H
  20. #define __DP_TX_H
  21. #include <qdf_types.h>
  22. #include <qdf_nbuf.h>
  23. #include "dp_types.h"
  24. #ifdef FEATURE_PERPKT_INFO
  25. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  26. defined(QCA_TX_CAPTURE_SUPPORT) || \
  27. defined(QCA_MCOPY_SUPPORT)
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #endif
  31. #include "dp_internal.h"
  32. #include "hal_tx.h"
  33. #include <qdf_tracepoint.h>
  34. #ifdef CONFIG_SAWF
  35. #include "dp_sawf.h"
  36. #endif
  37. #define DP_INVALID_VDEV_ID 0xFF
  38. #define DP_TX_MAX_NUM_FRAGS 6
  39. /*
  40. * DP_TX_DESC_FLAG_FRAG flags should always be defined to 0x1
  41. * please do not change this flag's definition
  42. */
  43. #define DP_TX_DESC_FLAG_FRAG 0x1
  44. #define DP_TX_DESC_FLAG_TO_FW 0x2
  45. #define DP_TX_DESC_FLAG_SIMPLE 0x4
  46. #define DP_TX_DESC_FLAG_RAW 0x8
  47. #define DP_TX_DESC_FLAG_MESH 0x10
  48. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  49. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  50. #define DP_TX_DESC_FLAG_ME 0x80
  51. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  52. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  53. #define DP_TX_DESC_FLAG_MESH_MODE 0x400
  54. #define DP_TX_DESC_FLAG_UNMAP_DONE 0x800
  55. #define DP_TX_DESC_FLAG_TX_COMP_ERR 0x1000
  56. #define DP_TX_DESC_FLAG_FLUSH 0x2000
  57. #define DP_TX_EXT_DESC_FLAG_METADATA_VALID 0x1
  58. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  59. do { \
  60. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  61. qdf_nbuf_free(buf); \
  62. } while (0)
  63. #define OCB_HEADER_VERSION 1
  64. #ifdef TX_PER_PDEV_DESC_POOL
  65. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  66. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  67. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  68. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  69. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  70. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  71. #else
  72. #ifdef TX_PER_VDEV_DESC_POOL
  73. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  74. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  75. #endif /* TX_PER_VDEV_DESC_POOL */
  76. #endif /* TX_PER_PDEV_DESC_POOL */
  77. #define DP_TX_QUEUE_MASK 0x3
  78. #define MAX_CDP_SEC_TYPE 12
  79. /* number of dwords for htt_tx_msdu_desc_ext2_t */
  80. #define DP_TX_MSDU_INFO_META_DATA_DWORDS 7
  81. #define dp_tx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX, params)
  82. #define dp_tx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX, params)
  83. #define dp_tx_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP_TX, params)
  84. #define dp_tx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX, params)
  85. #define dp_tx_info(params...) \
  86. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX, ## params)
  87. #define dp_tx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX, params)
  88. #define dp_tx_comp_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX_COMP, params)
  89. #define dp_tx_comp_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX_COMP, params)
  90. #define dp_tx_comp_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX_COMP, params)
  91. #define dp_tx_comp_info(params...) \
  92. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  93. #define dp_tx_comp_info_rl(params...) \
  94. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  95. #define dp_tx_comp_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX_COMP, params)
  96. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  97. /**
  98. * struct dp_tx_frag_info_s
  99. * @vaddr: hlos vritual address for buffer
  100. * @paddr_lo: physical address lower 32bits
  101. * @paddr_hi: physical address higher bits
  102. * @len: length of the buffer
  103. */
  104. struct dp_tx_frag_info_s {
  105. uint8_t *vaddr;
  106. uint32_t paddr_lo;
  107. uint16_t paddr_hi;
  108. uint16_t len;
  109. };
  110. /**
  111. * struct dp_tx_seg_info_s - Segmentation Descriptor
  112. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  113. * @frag_cnt: Fragment count in this segment
  114. * @total_len: Total length of segment
  115. * @frags: per-Fragment information
  116. * @next: pointer to next MSDU segment
  117. */
  118. struct dp_tx_seg_info_s {
  119. qdf_nbuf_t nbuf;
  120. uint16_t frag_cnt;
  121. uint16_t total_len;
  122. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  123. struct dp_tx_seg_info_s *next;
  124. };
  125. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  126. /**
  127. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  128. * @num_segs: Number of segments (TSO/ME) in the frame
  129. * @total_len: Total length of the frame
  130. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  131. * descriptors for SG frames/multicast-unicast converted packets.
  132. *
  133. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  134. * carry fragmentation information
  135. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  136. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  137. * converted into set of skb sg (nr_frags) structures.
  138. */
  139. struct dp_tx_sg_info_s {
  140. uint32_t num_segs;
  141. uint32_t total_len;
  142. struct dp_tx_seg_info_s *curr_seg;
  143. };
  144. /**
  145. * struct dp_tx_queue - Tx queue
  146. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  147. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  148. *
  149. * Tx queue contains information of the software (Descriptor pool)
  150. * and hardware resources (TCL ring id) to be used for a particular
  151. * transmit queue (obtained from skb_queue_mapping in case of linux)
  152. */
  153. struct dp_tx_queue {
  154. uint8_t desc_pool_id;
  155. uint8_t ring_id;
  156. };
  157. /**
  158. * struct dp_tx_msdu_info_s - MSDU Descriptor
  159. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  160. * @tx_queue: Tx queue on which this MSDU should be transmitted
  161. * @num_seg: Number of segments (TSO)
  162. * @tid: TID (override) that is sent from HLOS
  163. * @u.tso_info: TSO information for TSO frame types
  164. * (chain of the TSO segments, number of segments)
  165. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  166. * @meta_data: Mesh meta header information
  167. * @exception_fw: Duplicate frame to be sent to firmware
  168. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  169. * @ix_tx_sniffer: Indicates if the packet has to be sniffed
  170. * @gsn: global sequence for reinjected mcast packets
  171. * @vdev_id : vdev_id for reinjected mcast packets
  172. * @skip_hp_update : Skip HP update for TSO segments and update in last segment
  173. *
  174. * This structure holds the complete MSDU information needed to program the
  175. * Hardware TCL and MSDU extension descriptors for different frame types
  176. *
  177. */
  178. struct dp_tx_msdu_info_s {
  179. enum dp_tx_frm_type frm_type;
  180. struct dp_tx_queue tx_queue;
  181. uint32_t num_seg;
  182. uint8_t tid;
  183. uint8_t exception_fw;
  184. uint8_t is_tx_sniffer;
  185. union {
  186. struct qdf_tso_info_t tso_info;
  187. struct dp_tx_sg_info_s sg_info;
  188. } u;
  189. uint32_t meta_data[DP_TX_MSDU_INFO_META_DATA_DWORDS];
  190. uint16_t ppdu_cookie;
  191. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  192. #ifdef WLAN_MCAST_MLO
  193. uint16_t gsn;
  194. uint8_t vdev_id;
  195. #endif
  196. #endif
  197. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  198. uint8_t skip_hp_update;
  199. #endif
  200. };
  201. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  202. /**
  203. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  204. * @soc: core txrx context
  205. * @index: index of ring to deinit
  206. *
  207. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  208. * index of the respective TCL/WBM2SW release in soc structure.
  209. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  210. * and &soc->tx_comp_ring[2] will be deinitialized.
  211. *
  212. * Return: none
  213. */
  214. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  215. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  216. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  217. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  218. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  219. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  220. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  221. uint8_t num_pool,
  222. uint32_t num_desc);
  223. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  224. uint8_t num_pool,
  225. uint32_t num_desc);
  226. void dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc);
  227. void dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id);
  228. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  229. uint8_t tid, uint8_t ring_id);
  230. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  231. struct dp_tx_desc_s *tx_desc,
  232. struct hal_tx_completion_status *ts,
  233. struct dp_txrx_peer *txrx_peer,
  234. uint8_t ring_id);
  235. void dp_tx_comp_process_desc(struct dp_soc *soc,
  236. struct dp_tx_desc_s *desc,
  237. struct hal_tx_completion_status *ts,
  238. struct dp_txrx_peer *txrx_peer);
  239. void dp_tx_reinject_handler(struct dp_soc *soc,
  240. struct dp_vdev *vdev,
  241. struct dp_tx_desc_s *tx_desc,
  242. uint8_t *status,
  243. uint8_t reinject_reason);
  244. void dp_tx_inspect_handler(struct dp_soc *soc,
  245. struct dp_vdev *vdev,
  246. struct dp_tx_desc_s *tx_desc,
  247. uint8_t *status);
  248. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  249. uint32_t length, uint8_t tx_status,
  250. bool update);
  251. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  252. /**
  253. * dp_tso_attach() - TSO Attach handler
  254. * @txrx_soc: Opaque Dp handle
  255. *
  256. * Reserve TSO descriptor buffers
  257. *
  258. * Return: QDF_STATUS_E_FAILURE on failure or
  259. * QDF_STATUS_SUCCESS on success
  260. */
  261. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  262. /**
  263. * dp_tso_detach() - TSO Detach handler
  264. * @txrx_soc: Opaque Dp handle
  265. *
  266. * Deallocate TSO descriptor buffers
  267. *
  268. * Return: QDF_STATUS_E_FAILURE on failure or
  269. * QDF_STATUS_SUCCESS on success
  270. */
  271. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  272. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  273. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc, uint8_t vdev_id,
  274. qdf_nbuf_t nbuf);
  275. qdf_nbuf_t dp_tx_send_exception(struct cdp_soc_t *soc, uint8_t vdev_id,
  276. qdf_nbuf_t nbuf,
  277. struct cdp_tx_exception_metadata *tx_exc);
  278. qdf_nbuf_t dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc,
  279. uint8_t vdev_id,
  280. qdf_nbuf_t nbuf,
  281. struct cdp_tx_exception_metadata *tx_exc);
  282. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  283. qdf_nbuf_t nbuf);
  284. qdf_nbuf_t
  285. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  286. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  287. struct cdp_tx_exception_metadata *tx_exc_metadata);
  288. #if QDF_LOCK_STATS
  289. noinline qdf_nbuf_t
  290. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  291. struct dp_tx_msdu_info_s *msdu_info);
  292. #else
  293. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  294. struct dp_tx_msdu_info_s *msdu_info);
  295. #endif
  296. #ifdef FEATURE_WLAN_TDLS
  297. /**
  298. * dp_tx_non_std() - Allow the control-path SW to send data frames
  299. * @soc_hdl: Datapath soc handle
  300. * @vdev_id: id of vdev
  301. * @tx_spec: what non-standard handling to apply to the tx data frames
  302. * @msdu_list: NULL-terminated list of tx MSDUs
  303. *
  304. * Return: NULL on success,
  305. * nbuf when it fails to send
  306. */
  307. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  308. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  309. #endif
  310. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  311. /**
  312. * dp_tx_comp_handler() - Tx completion handler
  313. * @int_ctx: pointer to DP interrupt context
  314. * @soc: core txrx main context
  315. * @hal_srng: Opaque HAL SRNG pointer
  316. * @ring_id: completion ring id
  317. * @quota: No. of packets/descriptors that can be serviced in one loop
  318. *
  319. * This function will collect hardware release ring element contents and
  320. * handle descriptor contents. Based on contents, free packet or handle error
  321. * conditions
  322. *
  323. * Return: Number of TX completions processed
  324. */
  325. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  326. hal_ring_handle_t hal_srng, uint8_t ring_id,
  327. uint32_t quota);
  328. QDF_STATUS
  329. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  330. QDF_STATUS
  331. dp_tx_prepare_send_igmp_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  332. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  333. #if defined(QCA_HOST_MODE_WIFI_DISABLED) || !defined(ATH_SUPPORT_IQUE)
  334. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  335. {
  336. return;
  337. }
  338. #endif
  339. /**
  340. * dp_tx_pdev_init() - dp tx pdev init
  341. * @pdev: physical device instance
  342. *
  343. * Return: QDF_STATUS_SUCCESS: success
  344. * QDF_STATUS_E_RESOURCES: Error return
  345. */
  346. static inline QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev)
  347. {
  348. struct dp_soc *soc = pdev->soc;
  349. /* Initialize Flow control counters */
  350. qdf_atomic_init(&pdev->num_tx_outstanding);
  351. pdev->tx_descs_max = 0;
  352. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  353. /* Initialize descriptors in TCL Ring */
  354. hal_tx_init_data_ring(soc->hal_soc,
  355. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  356. }
  357. return QDF_STATUS_SUCCESS;
  358. }
  359. /**
  360. * dp_tx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
  361. * @soc: Handle to HAL Soc structure
  362. * @hal_soc: HAL SOC handle
  363. * @num_avail_for_reap: descriptors available for reap
  364. * @hal_ring_hdl: ring pointer
  365. * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
  366. * @last_prefetched_sw_desc: pointer to last prefetch SW desc
  367. *
  368. * Return: None
  369. */
  370. #ifdef QCA_DP_TX_HW_SW_NBUF_DESC_PREFETCH
  371. static inline
  372. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  373. hal_soc_handle_t hal_soc,
  374. uint32_t num_avail_for_reap,
  375. hal_ring_handle_t hal_ring_hdl,
  376. void **last_prefetched_hw_desc,
  377. struct dp_tx_desc_s
  378. **last_prefetched_sw_desc)
  379. {
  380. if (*last_prefetched_sw_desc) {
  381. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf);
  382. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf + 64);
  383. }
  384. if (num_avail_for_reap && *last_prefetched_hw_desc) {
  385. dp_tx_comp_get_prefetched_params_from_hal_desc(
  386. soc,
  387. *last_prefetched_hw_desc,
  388. last_prefetched_sw_desc);
  389. *last_prefetched_hw_desc =
  390. hal_srng_dst_prefetch_next_cached_desc(
  391. hal_soc,
  392. hal_ring_hdl,
  393. (uint8_t *)*last_prefetched_hw_desc);
  394. }
  395. }
  396. #else
  397. static inline
  398. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  399. hal_soc_handle_t hal_soc,
  400. uint32_t num_avail_for_reap,
  401. hal_ring_handle_t hal_ring_hdl,
  402. void **last_prefetched_hw_desc,
  403. struct dp_tx_desc_s
  404. **last_prefetched_sw_desc)
  405. {
  406. }
  407. #endif
  408. #ifndef FEATURE_WDS
  409. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  410. {
  411. return;
  412. }
  413. #endif
  414. #ifndef QCA_MULTIPASS_SUPPORT
  415. static inline
  416. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  417. qdf_nbuf_t nbuf,
  418. struct dp_tx_msdu_info_s *msdu_info)
  419. {
  420. return true;
  421. }
  422. static inline
  423. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  424. {
  425. }
  426. #else
  427. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  428. qdf_nbuf_t nbuf,
  429. struct dp_tx_msdu_info_s *msdu_info);
  430. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  431. #endif
  432. /**
  433. * dp_tx_hw_to_qdf()- convert hw status to qdf status
  434. * @status: hw status
  435. *
  436. * Return: qdf tx rx status
  437. */
  438. static inline enum qdf_dp_tx_rx_status dp_tx_hw_to_qdf(uint16_t status)
  439. {
  440. switch (status) {
  441. case HAL_TX_TQM_RR_FRAME_ACKED:
  442. return QDF_TX_RX_STATUS_OK;
  443. case HAL_TX_TQM_RR_REM_CMD_TX:
  444. return QDF_TX_RX_STATUS_NO_ACK;
  445. case HAL_TX_TQM_RR_REM_CMD_REM:
  446. case HAL_TX_TQM_RR_REM_CMD_NOTX:
  447. case HAL_TX_TQM_RR_REM_CMD_AGED:
  448. return QDF_TX_RX_STATUS_FW_DISCARD;
  449. default:
  450. return QDF_TX_RX_STATUS_DEFAULT;
  451. }
  452. }
  453. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  454. /**
  455. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  456. * @vdev: DP Virtual device handle
  457. * @nbuf: Buffer pointer
  458. * @queue: queue ids container for nbuf
  459. *
  460. * TX packet queue has 2 instances, software descriptors id and dma ring id
  461. * Based on tx feature and hardware configuration queue id combination could be
  462. * different.
  463. * For example -
  464. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  465. * With no XPS,lock based resource protection, Descriptor pool ids are different
  466. * for each vdev, dma ring id will be same as single pdev id
  467. *
  468. * Return: None
  469. */
  470. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  471. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  472. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  473. {
  474. uint16_t queue_offset = qdf_nbuf_get_queue_mapping(nbuf) &
  475. DP_TX_QUEUE_MASK;
  476. queue->desc_pool_id = queue_offset;
  477. queue->ring_id = qdf_get_cpu();
  478. dp_tx_debug("pool_id:%d ring_id: %d",
  479. queue->desc_pool_id, queue->ring_id);
  480. }
  481. /*
  482. * dp_tx_get_hal_ring_hdl()- Get the hal_tx_ring_hdl for data transmission
  483. * @dp_soc - DP soc structure pointer
  484. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  485. *
  486. * Return - HAL ring handle
  487. */
  488. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  489. uint8_t ring_id)
  490. {
  491. if (ring_id == soc->num_tcl_data_rings)
  492. return soc->tcl_cmd_credit_ring.hal_srng;
  493. return soc->tcl_data_ring[ring_id].hal_srng;
  494. }
  495. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  496. #ifdef TX_MULTI_TCL
  497. #ifdef IPA_OFFLOAD
  498. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  499. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  500. {
  501. /* get flow id */
  502. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  503. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  504. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  505. else
  506. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  507. vdev->pdev->soc->num_tcl_data_rings);
  508. }
  509. #else
  510. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  511. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  512. {
  513. /* get flow id */
  514. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  515. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  516. vdev->pdev->soc->num_tcl_data_rings);
  517. }
  518. #endif
  519. #else
  520. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  521. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  522. {
  523. /* get flow id */
  524. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  525. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  526. }
  527. #endif
  528. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  529. uint8_t ring_id)
  530. {
  531. return soc->tcl_data_ring[ring_id].hal_srng;
  532. }
  533. #endif
  534. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  535. /*
  536. * dp_tx_hal_ring_access_start()- hal_tx_ring access for data transmission
  537. * @dp_soc - DP soc structure pointer
  538. * @hal_ring_hdl - HAL ring handle
  539. *
  540. * Return - None
  541. */
  542. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  543. hal_ring_handle_t hal_ring_hdl)
  544. {
  545. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  546. }
  547. /*
  548. * dp_tx_hal_ring_access_end()- hal_tx_ring access for data transmission
  549. * @dp_soc - DP soc structure pointer
  550. * @hal_ring_hdl - HAL ring handle
  551. *
  552. * Return - None
  553. */
  554. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  555. hal_ring_handle_t hal_ring_hdl)
  556. {
  557. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  558. }
  559. /*
  560. * dp_tx_hal_ring_access_reap()- hal_tx_ring access for data transmission
  561. * @dp_soc - DP soc structure pointer
  562. * @hal_ring_hdl - HAL ring handle
  563. *
  564. * Return - None
  565. */
  566. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  567. hal_ring_handle_t
  568. hal_ring_hdl)
  569. {
  570. }
  571. #else
  572. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  573. hal_ring_handle_t hal_ring_hdl)
  574. {
  575. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  576. }
  577. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  578. hal_ring_handle_t hal_ring_hdl)
  579. {
  580. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  581. }
  582. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  583. hal_ring_handle_t
  584. hal_ring_hdl)
  585. {
  586. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  587. }
  588. #endif
  589. #ifdef ATH_TX_PRI_OVERRIDE
  590. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  591. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  592. #else
  593. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  594. #endif
  595. /* TODO TX_FEATURE_NOT_YET */
  596. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  597. {
  598. return;
  599. }
  600. /* TODO TX_FEATURE_NOT_YET */
  601. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  602. bool force_free);
  603. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  604. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  605. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  606. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  607. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  608. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  609. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  610. void
  611. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  612. uint32_t buf_type);
  613. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  614. static inline
  615. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  616. {
  617. return QDF_STATUS_SUCCESS;
  618. }
  619. static inline
  620. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  621. {
  622. return QDF_STATUS_SUCCESS;
  623. }
  624. static inline void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  625. {
  626. }
  627. static inline void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  628. {
  629. }
  630. static inline
  631. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  632. bool force_free)
  633. {
  634. }
  635. static inline QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  636. {
  637. return QDF_STATUS_SUCCESS;
  638. }
  639. static inline QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  640. {
  641. return QDF_STATUS_SUCCESS;
  642. }
  643. static inline void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  644. {
  645. }
  646. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  647. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  648. defined(QCA_TX_CAPTURE_SUPPORT) || \
  649. defined(QCA_MCOPY_SUPPORT)
  650. #ifdef FEATURE_PERPKT_INFO
  651. QDF_STATUS
  652. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  653. struct dp_pdev *pdev,
  654. struct dp_txrx_peer *peer,
  655. struct hal_tx_completion_status *ts,
  656. qdf_nbuf_t netbuf,
  657. uint64_t time_latency);
  658. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  659. uint16_t peer_id, uint32_t ppdu_id,
  660. qdf_nbuf_t netbuf);
  661. #endif
  662. #else
  663. static inline
  664. QDF_STATUS dp_get_completion_indication_for_stack(struct dp_soc *soc,
  665. struct dp_pdev *pdev,
  666. struct dp_txrx_peer *peer,
  667. struct hal_tx_completion_status *ts,
  668. qdf_nbuf_t netbuf,
  669. uint64_t time_latency)
  670. {
  671. return QDF_STATUS_E_NOSUPPORT;
  672. }
  673. static inline
  674. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  675. uint16_t peer_id, uint32_t ppdu_id,
  676. qdf_nbuf_t netbuf)
  677. {
  678. }
  679. #endif
  680. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  681. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  682. struct dp_tx_desc_s *desc,
  683. struct hal_tx_completion_status *ts);
  684. #else
  685. static inline void
  686. dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  687. struct dp_tx_desc_s *desc,
  688. struct hal_tx_completion_status *ts)
  689. {
  690. }
  691. #endif
  692. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  693. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  694. /**
  695. * dp_tx_update_stats() - Update soc level tx stats
  696. * @soc: DP soc handle
  697. * @nbuf: packet being transmitted
  698. *
  699. * Returns: none
  700. */
  701. void dp_tx_update_stats(struct dp_soc *soc,
  702. qdf_nbuf_t nbuf);
  703. /**
  704. * dp_tx_attempt_coalescing() - Check and attempt TCL register write coalescing
  705. * @soc: Datapath soc handle
  706. * @tx_desc: tx packet descriptor
  707. * @tid: TID for pkt transmission
  708. * @msdu_info: MSDU info of tx packet
  709. *
  710. * Returns: 1, if coalescing is to be done
  711. * 0, if coalescing is not to be done
  712. */
  713. int
  714. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  715. struct dp_tx_desc_s *tx_desc,
  716. uint8_t tid, struct dp_tx_msdu_info_s *msdu_info);
  717. /**
  718. * dp_tx_ring_access_end() - HAL ring access end for data transmission
  719. * @soc: Datapath soc handle
  720. * @hal_ring_hdl: HAL ring handle
  721. * @coalesce: Coalesce the current write or not
  722. *
  723. * Returns: none
  724. */
  725. void
  726. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  727. int coalesce);
  728. #else
  729. /**
  730. * dp_tx_update_stats() - Update soc level tx stats
  731. * @soc: DP soc handle
  732. * @nbuf: packet being transmitted
  733. *
  734. * Returns: none
  735. */
  736. static inline void dp_tx_update_stats(struct dp_soc *soc,
  737. qdf_nbuf_t nbuf) { }
  738. static inline void
  739. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  740. int coalesce)
  741. {
  742. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  743. }
  744. static inline int
  745. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  746. struct dp_tx_desc_s *tx_desc,
  747. uint8_t tid,
  748. struct dp_tx_msdu_info_s *msdu_info)
  749. {
  750. return 0;
  751. }
  752. #endif /* WLAN_DP_FEATURE_SW_LATENCY_MGR */
  753. #ifdef FEATURE_RUNTIME_PM
  754. /**
  755. * dp_set_rtpm_tput_policy_requirement() - Update RTPM throughput policy
  756. * @soc_hdl: DP soc handle
  757. * @is_high_tput: flag to indicate whether throughput is high
  758. *
  759. * Returns: none
  760. */
  761. static inline
  762. void dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  763. bool is_high_tput)
  764. {
  765. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  766. qdf_atomic_set(&soc->rtpm_high_tput_flag, is_high_tput);
  767. }
  768. void
  769. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  770. hal_ring_handle_t hal_ring_hdl,
  771. int coalesce);
  772. #else
  773. #ifdef DP_POWER_SAVE
  774. void
  775. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  776. hal_ring_handle_t hal_ring_hdl,
  777. int coalesce);
  778. #else
  779. static inline void
  780. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  781. hal_ring_handle_t hal_ring_hdl,
  782. int coalesce)
  783. {
  784. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  785. }
  786. #endif
  787. static inline void
  788. dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  789. bool is_high_tput)
  790. { }
  791. #endif
  792. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  793. #ifdef DP_TX_HW_DESC_HISTORY
  794. static inline void
  795. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  796. hal_ring_handle_t hal_ring_hdl,
  797. struct dp_soc *soc)
  798. {
  799. struct dp_tx_hw_desc_evt *evt;
  800. uint64_t idx = 0;
  801. if (!soc->tx_hw_desc_history)
  802. return;
  803. idx = ++soc->tx_hw_desc_history->index;
  804. if (idx == DP_TX_HW_DESC_HIST_MAX)
  805. soc->tx_hw_desc_history->index = 0;
  806. idx = qdf_do_div_rem(idx, DP_TX_HW_DESC_HIST_MAX);
  807. evt = &soc->tx_hw_desc_history->entry[idx];
  808. qdf_mem_copy(evt->tcl_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  809. evt->posted = qdf_get_log_timestamp();
  810. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &evt->tp, &evt->hp);
  811. }
  812. #else
  813. static inline void
  814. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  815. hal_ring_handle_t hal_ring_hdl,
  816. struct dp_soc *soc)
  817. {
  818. }
  819. #endif
  820. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(CONFIG_SAWF)
  821. /**
  822. * dp_set_delta_tsf() - Set delta_tsf to dp_soc structure
  823. * @soc_hdl: cdp soc pointer
  824. * @vdev_id: vdev id
  825. * @delta_tsf: difference between TSF clock and qtimer
  826. *
  827. * Return: None
  828. */
  829. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  830. uint32_t delta_tsf);
  831. #endif
  832. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  833. /**
  834. * dp_set_tsf_report_ul_delay() - Enable or disable reporting uplink delay
  835. * @soc_hdl: cdp soc pointer
  836. * @vdev_id: vdev id
  837. * @enable: true to enable and false to disable
  838. *
  839. * Return: QDF_STATUS
  840. */
  841. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  842. uint8_t vdev_id, bool enable);
  843. /**
  844. * dp_get_uplink_delay() - Get uplink delay value
  845. * @soc_hdl: cdp soc pointer
  846. * @vdev_id: vdev id
  847. * @val: pointer to save uplink delay value
  848. *
  849. * Return: QDF_STATUS
  850. */
  851. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  852. uint32_t *val);
  853. #endif /* WLAN_FEATURE_TSF_UPLINK_TSF */
  854. /**
  855. * dp_tx_pkt_tracepoints_enabled() - Get the state of tx pkt tracepoint
  856. *
  857. * Return: True if any tx pkt tracepoint is enabled else false
  858. */
  859. static inline
  860. bool dp_tx_pkt_tracepoints_enabled(void)
  861. {
  862. return (qdf_trace_dp_tx_comp_tcp_pkt_enabled() ||
  863. qdf_trace_dp_tx_comp_udp_pkt_enabled() ||
  864. qdf_trace_dp_tx_comp_pkt_enabled());
  865. }
  866. #ifdef DP_TX_TRACKING
  867. /**
  868. * dp_tx_desc_set_timestamp() - set timestamp in tx descriptor
  869. * @tx_desc - tx descriptor
  870. *
  871. * Return: None
  872. */
  873. static inline
  874. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  875. {
  876. tx_desc->timestamp = qdf_system_ticks();
  877. }
  878. /**
  879. * dp_tx_desc_check_corruption() - Verify magic pattern in tx descriptor
  880. * @tx_desc: tx descriptor
  881. *
  882. * Check for corruption in tx descriptor, if magic pattern is not matching
  883. * trigger self recovery
  884. *
  885. * Return: none
  886. */
  887. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc);
  888. #else
  889. static inline
  890. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  891. {
  892. }
  893. static inline
  894. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  895. {
  896. }
  897. #endif
  898. #ifndef CONFIG_SAWF
  899. static inline bool dp_sawf_tag_valid_get(qdf_nbuf_t nbuf)
  900. {
  901. return false;
  902. }
  903. #endif
  904. #endif