dp_rx_mon.h 25 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_MON_H_
  19. #define _DP_RX_MON_H_
  20. /*
  21. * MON_BUF_MIN_ENTRIES macro defines minimum number of network buffers
  22. * to be refilled in the RXDMA monitor buffer ring at init, remaining
  23. * buffers are replenished at the time of monitor vap creation
  24. */
  25. #define MON_BUF_MIN_ENTRIES 64
  26. /* The maxinum buffer length allocated for radio tap */
  27. #ifdef DP_RX_MON_MEM_FRAG
  28. /*
  29. *----------------------------------
  30. *| Reserve | PF Tag | Radiotap hdr|
  31. *| 64B | 64B | 128B |
  32. *----------------------------------
  33. * Reserved 64B is used to fill Protocol & Flow tag before writing into
  34. * actual offset, data gets written to actual offset after updating
  35. * radiotap HDR.
  36. */
  37. #define MAX_MONITOR_HEADER (256)
  38. #else
  39. #define MAX_MONITOR_HEADER (512)
  40. #endif
  41. /* l2 header pad byte in case of Raw frame is Zero and 2 in non raw */
  42. #define DP_RX_MON_RAW_L2_HDR_PAD_BYTE (0)
  43. #define DP_RX_MON_NONRAW_L2_HDR_PAD_BYTE (2)
  44. /**
  45. * enum dp_mon_reap_status - monitor status ring ppdu status
  46. *
  47. * @DP_MON_STATUS_NO_DMA - DMA not done for status ring entry
  48. * @DP_MON_STATUS_MATCH - status and dest ppdu id mathes
  49. * @DP_MON_STATUS_LAG - status ppdu id is lagging
  50. * @DP_MON_STATUS_LEAD - status ppdu id is leading
  51. * @DP_MON_STATUS_REPLENISH - status ring entry is NULL
  52. */
  53. enum dp_mon_reap_status {
  54. DP_MON_STATUS_NO_DMA,
  55. DP_MON_STATUS_MATCH,
  56. DP_MON_STATUS_LAG,
  57. DP_MON_STATUS_LEAD,
  58. DP_MON_STATUS_REPLENISH
  59. };
  60. /*
  61. * dp_rx_mon_status_process() - Process monitor status ring and
  62. * TLV in status ring.
  63. *
  64. * @soc: core txrx main context
  65. * @int_ctx: interrupt context
  66. * @mac_id: mac_id which is one of 3 mac_ids
  67. * @quota: No. of ring entry that can be serviced in one shot.
  68. * Return: uint32_t: No. of ring entry that is processed.
  69. */
  70. uint32_t
  71. dp_rx_mon_status_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  72. uint32_t mac_id, uint32_t quota);
  73. /**
  74. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  75. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  76. * @soc: core txrx main contex
  77. * @int_ctx: interrupt context
  78. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  79. * @quota: No. of units (packets) that can be serviced in one shot.
  80. *
  81. * This function implements the core of Rx functionality. This is
  82. * expected to handle only non-error frames.
  83. *
  84. * Return: none
  85. */
  86. void dp_rx_mon_dest_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  87. uint32_t mac_id, uint32_t quota);
  88. QDF_STATUS dp_rx_pdev_mon_desc_pool_alloc(struct dp_pdev *pdev);
  89. QDF_STATUS dp_rx_pdev_mon_buffers_alloc(struct dp_pdev *pdev);
  90. void dp_rx_pdev_mon_buffers_free(struct dp_pdev *pdev);
  91. void dp_rx_pdev_mon_desc_pool_init(struct dp_pdev *pdev);
  92. void dp_rx_pdev_mon_desc_pool_deinit(struct dp_pdev *pdev);
  93. void dp_rx_pdev_mon_desc_pool_free(struct dp_pdev *pdev);
  94. void dp_rx_pdev_mon_buf_buffers_free(struct dp_pdev *pdev, uint32_t mac_id);
  95. QDF_STATUS dp_rx_pdev_mon_status_buffers_alloc(struct dp_pdev *pdev,
  96. uint32_t mac_id);
  97. QDF_STATUS dp_rx_pdev_mon_status_desc_pool_alloc(struct dp_pdev *pdev,
  98. uint32_t mac_id);
  99. void dp_rx_pdev_mon_status_desc_pool_init(struct dp_pdev *pdev,
  100. uint32_t mac_id);
  101. void dp_rx_pdev_mon_status_desc_pool_deinit(struct dp_pdev *pdev,
  102. uint32_t mac_id);
  103. void dp_rx_pdev_mon_status_desc_pool_free(struct dp_pdev *pdev,
  104. uint32_t mac_id);
  105. void dp_rx_pdev_mon_status_buffers_free(struct dp_pdev *pdev, uint32_t mac_id);
  106. QDF_STATUS
  107. dp_rx_pdev_mon_buf_buffers_alloc(struct dp_pdev *pdev, uint32_t mac_id,
  108. bool delayed_replenish);
  109. /**
  110. * dp_rx_mon_handle_status_buf_done () - Handle DMA not done case for
  111. * monitor status ring
  112. *
  113. * @pdev: DP pdev handle
  114. * @mon_status_srng: Monitor status SRNG
  115. *
  116. * Return: enum dp_mon_reap_status
  117. */
  118. enum dp_mon_reap_status
  119. dp_rx_mon_handle_status_buf_done(struct dp_pdev *pdev,
  120. void *mon_status_srng);
  121. #ifdef QCA_SUPPORT_FULL_MON
  122. /**
  123. * dp_full_mon_attach() - Full monitor mode attach
  124. * This API initilises full monitor mode resources
  125. *
  126. * @pdev: dp pdev object
  127. *
  128. * Return: void
  129. *
  130. */
  131. void dp_full_mon_attach(struct dp_pdev *pdev);
  132. /**
  133. * dp_full_mon_detach() - Full monitor mode attach
  134. * This API deinitilises full monitor mode resources
  135. *
  136. * @pdev: dp pdev object
  137. *
  138. * Return: void
  139. *
  140. */
  141. void dp_full_mon_detach(struct dp_pdev *pdev);
  142. /**
  143. * dp_rx_mon_process ()- API to process monitor destination ring for
  144. * full monitor mode
  145. *
  146. * @soc: dp soc handle
  147. * @int_ctx: interrupt context
  148. * @mac_id: lmac id
  149. * @quota: No. of ring entry that can be serviced in one shot.
  150. */
  151. uint32_t dp_rx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  152. uint32_t mac_id, uint32_t quota);
  153. #else
  154. /**
  155. * dp_full_mon_attach() - attach full monitor mode resources
  156. * @pdev: Datapath PDEV handle
  157. *
  158. * Return: void
  159. */
  160. static inline void dp_full_mon_attach(struct dp_pdev *pdev)
  161. {
  162. }
  163. /**
  164. * dp_full_mon_detach() - detach full monitor mode resources
  165. * @pdev: Datapath PDEV handle
  166. *
  167. * Return: void
  168. *
  169. */
  170. static inline void dp_full_mon_detach(struct dp_pdev *pdev)
  171. {
  172. }
  173. #endif
  174. /**
  175. * dp_reset_monitor_mode() - Disable monitor mode
  176. * @pdev_handle: Datapath PDEV handle
  177. *
  178. * Return: QDF_STATUS
  179. */
  180. QDF_STATUS dp_reset_monitor_mode(struct cdp_soc_t *soc_hdl,
  181. uint8_t pdev_id,
  182. uint8_t smart_monitor);
  183. /**
  184. * dp_mon_link_free() - free monitor link desc pool
  185. * @pdev: core txrx pdev context
  186. *
  187. * This function will release DP link desc pool for monitor mode from
  188. * main device context.
  189. *
  190. * Return: QDF_STATUS_SUCCESS: success
  191. * QDF_STATUS_E_RESOURCES: Error return
  192. */
  193. QDF_STATUS dp_mon_link_free(struct dp_pdev *pdev);
  194. /**
  195. * dp_mon_process() - Main monitor mode processing roution.
  196. * @soc: core txrx main context
  197. * @int_ctx: interrupt context
  198. * @mac_id: mac_id which is one of 3 mac_ids
  199. * @quota: No. of status ring entry that can be serviced in one shot.
  200. *
  201. * This call monitor status ring process then monitor
  202. * destination ring process.
  203. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  204. *
  205. * Return: uint32_t: No. of ring entry that is processed.
  206. */
  207. uint32_t dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  208. uint32_t mac_id, uint32_t quota);
  209. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  210. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu);
  211. /*
  212. * dp_rx_mon_deliver_non_std() - deliver frames for non standard path
  213. * @soc: core txrx main contex
  214. * @mac_id: MAC ID
  215. *
  216. * This function delivers the radio tap and dummy MSDU
  217. * into user layer application for preamble only PPDU.
  218. *
  219. * Return: Operation status
  220. */
  221. QDF_STATUS dp_rx_mon_deliver_non_std(struct dp_soc *soc, uint32_t mac_id);
  222. /**
  223. * dp_rxdma_err_process() - RxDMA error processing functionality
  224. * @soc: core txrx main contex
  225. * @mac_id: mac id which is one of 3 mac_ids
  226. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  227. * @quota: No. of units (packets) that can be serviced in one shot.
  228. *
  229. * Return: num of buffers processed
  230. */
  231. uint32_t dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  232. uint32_t mac_id, uint32_t quota);
  233. /**
  234. * dp_mon_buf_delayed_replenish() - Helper routine to replenish monitor dest buf
  235. * @pdev: DP pdev object
  236. *
  237. * Return: None
  238. */
  239. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev);
  240. /**
  241. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  242. * (WBM), following error handling
  243. *
  244. * @dp_pdev: core txrx pdev context
  245. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  246. * Return: QDF_STATUS
  247. */
  248. QDF_STATUS
  249. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  250. hal_buff_addrinfo_t buf_addr_info,
  251. int mac_id);
  252. /**
  253. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  254. * multiple nbufs. This function
  255. * is to return data length in
  256. * fragmented buffer
  257. *
  258. * @total_len: pointer to remaining data length.
  259. * @frag_len: pointer to data length in this fragment.
  260. */
  261. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  262. uint32_t *frag_len)
  263. {
  264. if (*total_len >= (RX_MONITOR_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  265. *frag_len = RX_MONITOR_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  266. *total_len -= *frag_len;
  267. } else {
  268. *frag_len = *total_len;
  269. *total_len = 0;
  270. }
  271. }
  272. /**
  273. * dp_rx_mon_frag_adjust_frag_len() - MPDU and MSDU may spread across
  274. * multiple nbufs. This function is to return data length in
  275. * fragmented buffer.
  276. * It takes input as max_limit for any buffer(as it changes based
  277. * on decap type and buffer sequence in MSDU.
  278. *
  279. * If MSDU is divided into multiple buffer then below format will
  280. * be max limit.
  281. * Decap type Non-Raw
  282. *--------------------------------
  283. *| 1st | 2nd | ... | Last |
  284. *| 1662 | 1664 | 1664 | <=1664 |
  285. *--------------------------------
  286. * Decap type Raw
  287. *--------------------------------
  288. *| 1st | 2nd | ... | Last |
  289. *| 1664 | 1664 | 1664 | <=1664 |
  290. *--------------------------------
  291. *
  292. * It also calculate if current buffer has placeholder to keep padding byte.
  293. * --------------------------------
  294. * | MAX LIMIT(1662/1664) |
  295. * --------------------------------
  296. * | Actual Data | Pad byte Pholder |
  297. * --------------------------------
  298. *
  299. * @total_len: Remaining data length.
  300. * @frag_len: Data length in this fragment.
  301. * @max_limit: Max limit of current buffer/MSDU.
  302. */
  303. #ifdef DP_RX_MON_MEM_FRAG
  304. static inline
  305. void dp_rx_mon_frag_adjust_frag_len(uint32_t *total_len, uint32_t *frag_len,
  306. uint32_t max_limit)
  307. {
  308. if (*total_len >= max_limit) {
  309. *frag_len = max_limit;
  310. *total_len -= *frag_len;
  311. } else {
  312. *frag_len = *total_len;
  313. *total_len = 0;
  314. }
  315. }
  316. /**
  317. * DP_RX_MON_GET_NBUF_FROM_DESC() - Get nbuf from desc
  318. */
  319. #define DP_RX_MON_GET_NBUF_FROM_DESC(rx_desc) \
  320. NULL
  321. /**
  322. * dp_rx_mon_get_paddr_from_desc() - Get paddr from desc
  323. */
  324. static inline
  325. qdf_dma_addr_t dp_rx_mon_get_paddr_from_desc(struct dp_rx_desc *rx_desc)
  326. {
  327. return rx_desc->paddr_buf_start;
  328. }
  329. /**
  330. * DP_RX_MON_IS_BUFFER_ADDR_NULL() - Is Buffer received from hw is NULL
  331. */
  332. #define DP_RX_MON_IS_BUFFER_ADDR_NULL(rx_desc) \
  333. (!(rx_desc->rx_buf_start))
  334. #define DP_RX_MON_IS_MSDU_NOT_NULL(msdu) \
  335. true
  336. /**
  337. * dp_rx_mon_buffer_free() - Free nbuf or frag memory
  338. * Free nbuf if feature is disabled, else free frag.
  339. *
  340. * @rx_desc: Rx desc
  341. */
  342. static inline void
  343. dp_rx_mon_buffer_free(struct dp_rx_desc *rx_desc)
  344. {
  345. qdf_frag_free(rx_desc->rx_buf_start);
  346. }
  347. /**
  348. * dp_rx_mon_buffer_unmap() - Unmap nbuf or frag memory
  349. * Unmap nbuf if feature is disabled, else unmap frag.
  350. *
  351. * @soc: struct dp_soc *
  352. * @rx_desc: struct dp_rx_desc *
  353. * @size: Size to be unmapped
  354. */
  355. static inline void
  356. dp_rx_mon_buffer_unmap(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  357. uint16_t size)
  358. {
  359. qdf_mem_unmap_page(soc->osdev, rx_desc->paddr_buf_start,
  360. size, QDF_DMA_FROM_DEVICE);
  361. }
  362. /**
  363. * dp_rx_mon_alloc_parent_buffer() - Allocate parent buffer to hold
  364. * radiotap header and accommodate all frag memory in nr_frag.
  365. *
  366. * @head_msdu: Ptr to hold allocated Msdu
  367. *
  368. * Return: QDF_STATUS
  369. */
  370. static inline
  371. QDF_STATUS dp_rx_mon_alloc_parent_buffer(qdf_nbuf_t *head_msdu)
  372. {
  373. /* Headroom should accommodate radiotap header
  374. * and protocol and flow tag for all frag
  375. */
  376. /* --------------------------------------
  377. * | Protocol & Flow TAG | Radiotap header|
  378. * | 64 B | Length(128 B) |
  379. * --------------------------------------
  380. */
  381. *head_msdu = qdf_nbuf_alloc_no_recycler(MAX_MONITOR_HEADER,
  382. MAX_MONITOR_HEADER, 4);
  383. if (!(*head_msdu))
  384. return QDF_STATUS_E_FAILURE;
  385. /* Set *head_msdu->next as NULL as all msdus are
  386. * mapped via nr frags
  387. */
  388. qdf_nbuf_set_next(*head_msdu, NULL);
  389. return QDF_STATUS_SUCCESS;
  390. }
  391. /**
  392. * dp_rx_mon_parse_desc_buffer() - Parse desc buffer based.
  393. *
  394. * Below code will parse desc buffer, handle continuation frame,
  395. * adjust frag length and update l2_hdr_padding
  396. *
  397. * @soc : struct dp_soc*
  398. * @msdu_info : struct hal_rx_msdu_desc_info*
  399. * @is_frag_p : is_frag *
  400. * @total_frag_len_p : Remaining frag len to be updated
  401. * @frag_len_p : frag len
  402. * @l2_hdr_offset_p : l2 hdr offset
  403. * @rx_desc_tlv : rx_desc_tlv
  404. * @is_frag_non_raw_p : Non raw frag
  405. * @data : NBUF Data
  406. */
  407. static inline void
  408. dp_rx_mon_parse_desc_buffer(struct dp_soc *dp_soc,
  409. struct hal_rx_msdu_desc_info *msdu_info,
  410. bool *is_frag_p, uint32_t *total_frag_len_p,
  411. uint32_t *frag_len_p, uint16_t *l2_hdr_offset_p,
  412. qdf_frag_t rx_desc_tlv,
  413. bool *is_frag_non_raw_p, void *data)
  414. {
  415. struct hal_rx_mon_dest_buf_info frame_info;
  416. uint16_t tot_payload_len =
  417. RX_MONITOR_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  418. if (msdu_info->msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION) {
  419. /* First buffer of MSDU */
  420. if (!(*is_frag_p)) {
  421. /* Set total frag_len from msdu_len */
  422. *total_frag_len_p = msdu_info->msdu_len;
  423. *is_frag_p = true;
  424. if (HAL_HW_RX_DECAP_FORMAT_RAW ==
  425. HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc_tlv)) {
  426. *l2_hdr_offset_p =
  427. DP_RX_MON_RAW_L2_HDR_PAD_BYTE;
  428. frame_info.is_decap_raw = 1;
  429. } else {
  430. *l2_hdr_offset_p =
  431. DP_RX_MON_NONRAW_L2_HDR_PAD_BYTE;
  432. frame_info.is_decap_raw = 0;
  433. *is_frag_non_raw_p = true;
  434. }
  435. dp_rx_mon_frag_adjust_frag_len(total_frag_len_p,
  436. frag_len_p,
  437. tot_payload_len -
  438. *l2_hdr_offset_p);
  439. frame_info.first_buffer = 1;
  440. frame_info.last_buffer = 0;
  441. hal_rx_mon_dest_set_buffer_info_to_tlv(rx_desc_tlv,
  442. &frame_info);
  443. } else {
  444. /*
  445. * Continuation Middle frame
  446. * Here max limit will be same for Raw and Non raw case.
  447. */
  448. *l2_hdr_offset_p = DP_RX_MON_RAW_L2_HDR_PAD_BYTE;
  449. dp_rx_mon_frag_adjust_frag_len(total_frag_len_p,
  450. frag_len_p,
  451. tot_payload_len);
  452. /* Update frame info if is non raw frame */
  453. if (*is_frag_non_raw_p)
  454. frame_info.is_decap_raw = 0;
  455. else
  456. frame_info.is_decap_raw = 1;
  457. frame_info.first_buffer = 0;
  458. frame_info.last_buffer = 0;
  459. hal_rx_mon_dest_set_buffer_info_to_tlv(rx_desc_tlv,
  460. &frame_info);
  461. }
  462. } else {
  463. /**
  464. * Last buffer of MSDU spread among multiple buffer
  465. * Here max limit will be same for Raw and Non raw case.
  466. */
  467. if (*is_frag_p) {
  468. *l2_hdr_offset_p = DP_RX_MON_RAW_L2_HDR_PAD_BYTE;
  469. dp_rx_mon_frag_adjust_frag_len(total_frag_len_p,
  470. frag_len_p,
  471. tot_payload_len);
  472. /* Update frame info if is non raw frame */
  473. if (*is_frag_non_raw_p)
  474. frame_info.is_decap_raw = 0;
  475. else
  476. frame_info.is_decap_raw = 1;
  477. frame_info.first_buffer = 0;
  478. frame_info.last_buffer = 1;
  479. hal_rx_mon_dest_set_buffer_info_to_tlv(rx_desc_tlv,
  480. &frame_info);
  481. } else {
  482. /* MSDU with single buffer */
  483. *frag_len_p = msdu_info->msdu_len;
  484. if (HAL_HW_RX_DECAP_FORMAT_RAW ==
  485. HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc_tlv)) {
  486. *l2_hdr_offset_p =
  487. DP_RX_MON_RAW_L2_HDR_PAD_BYTE;
  488. frame_info.is_decap_raw = 1;
  489. } else {
  490. *l2_hdr_offset_p =
  491. DP_RX_MON_NONRAW_L2_HDR_PAD_BYTE;
  492. frame_info.is_decap_raw = 0;
  493. }
  494. frame_info.first_buffer = 1;
  495. frame_info.last_buffer = 1;
  496. hal_rx_mon_dest_set_buffer_info_to_tlv(
  497. rx_desc_tlv, &frame_info);
  498. }
  499. /* Reset bool after complete processing of MSDU */
  500. *is_frag_p = false;
  501. *is_frag_non_raw_p = false;
  502. }
  503. }
  504. /**
  505. * dp_rx_mon_buffer_set_pktlen() - set pktlen for buffer
  506. */
  507. static inline void dp_rx_mon_buffer_set_pktlen(qdf_nbuf_t msdu, uint32_t size)
  508. {
  509. }
  510. /**
  511. * dp_rx_mon_add_msdu_to_list()- Add msdu to list and update head_msdu
  512. * It will add reaped buffer frag to nr frag of parent msdu.
  513. *
  514. * @head_msdu: NULL if first time called else &msdu
  515. * @msdu: Msdu where frag address needs to be added via nr_frag
  516. * @last: Used to traverse in list if this feature is disabled.
  517. * @rx_desc_tlv: Frag address
  518. * @frag_len: Frag len
  519. * @l2_hdr_offset: l2 hdr padding
  520. */
  521. static inline
  522. void dp_rx_mon_add_msdu_to_list(qdf_nbuf_t *head_msdu, qdf_nbuf_t msdu,
  523. qdf_nbuf_t *last, qdf_frag_t rx_desc_tlv,
  524. uint32_t frag_len, uint32_t l2_hdr_offset)
  525. {
  526. qdf_nbuf_add_rx_frag(rx_desc_tlv, *head_msdu, SIZE_OF_MONITOR_TLV,
  527. frag_len + l2_hdr_offset, RX_MONITOR_BUFFER_SIZE,
  528. false);
  529. }
  530. /**
  531. * dp_rx_mon_init_tail_msdu() - Initialize tail msdu
  532. *
  533. * @msdu: Msdu to be updated in tail_msdu
  534. * @last: last msdu
  535. * @tail_msdu: Last msdu
  536. */
  537. static inline
  538. void dp_rx_mon_init_tail_msdu(qdf_nbuf_t msdu, qdf_nbuf_t last,
  539. qdf_nbuf_t *tail_msdu)
  540. {
  541. }
  542. /**
  543. * dp_rx_mon_remove_raw_frame_fcs_len() - Remove FCS length for Raw Frame
  544. *
  545. * If feature is disabled, then removal happens in restitch logic.
  546. *
  547. * @head_msdu: Head msdu
  548. */
  549. static inline
  550. void dp_rx_mon_remove_raw_frame_fcs_len(qdf_nbuf_t *head_msdu)
  551. {
  552. qdf_frag_t addr;
  553. /* Strip FCS_LEN for Raw frame */
  554. if (head_msdu && *head_msdu) {
  555. addr = qdf_nbuf_get_frag_addr(*head_msdu, 0);
  556. addr -= SIZE_OF_MONITOR_TLV;
  557. if (HAL_RX_DESC_GET_DECAP_FORMAT(addr) ==
  558. HAL_HW_RX_DECAP_FORMAT_RAW) {
  559. qdf_nbuf_trim_add_frag_size(*head_msdu,
  560. qdf_nbuf_get_nr_frags(*head_msdu) - 1,
  561. -HAL_RX_FCS_LEN, 0);
  562. }
  563. }
  564. }
  565. /**
  566. * dp_rx_mon_get_buffer_data()- Get data from desc buffer
  567. * @rx_desc: desc
  568. *
  569. * Return address containing actual tlv content
  570. */
  571. static inline
  572. uint8_t *dp_rx_mon_get_buffer_data(struct dp_rx_desc *rx_desc)
  573. {
  574. return rx_desc->rx_buf_start;
  575. }
  576. #else
  577. #define DP_RX_MON_GET_NBUF_FROM_DESC(rx_desc) \
  578. (rx_desc->nbuf)
  579. static inline
  580. qdf_dma_addr_t dp_rx_mon_get_paddr_from_desc(struct dp_rx_desc *rx_desc)
  581. {
  582. qdf_dma_addr_t paddr = 0;
  583. qdf_nbuf_t msdu = NULL;
  584. msdu = rx_desc->nbuf;
  585. if (msdu)
  586. paddr = qdf_nbuf_get_frag_paddr(msdu, 0);
  587. return paddr;
  588. }
  589. #define DP_RX_MON_IS_BUFFER_ADDR_NULL(rx_desc) \
  590. (!(rx_desc->nbuf))
  591. #define DP_RX_MON_IS_MSDU_NOT_NULL(msdu) \
  592. (msdu)
  593. static inline void
  594. dp_rx_mon_buffer_free(struct dp_rx_desc *rx_desc)
  595. {
  596. qdf_nbuf_free(rx_desc->nbuf);
  597. }
  598. static inline void
  599. dp_rx_mon_buffer_unmap(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  600. uint16_t size)
  601. {
  602. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  603. QDF_DMA_FROM_DEVICE, size);
  604. }
  605. static inline
  606. QDF_STATUS dp_rx_mon_alloc_parent_buffer(qdf_nbuf_t *head_msdu)
  607. {
  608. return QDF_STATUS_SUCCESS;
  609. }
  610. static inline void
  611. dp_rx_mon_parse_desc_buffer(struct dp_soc *dp_soc,
  612. struct hal_rx_msdu_desc_info *msdu_info,
  613. bool *is_frag_p, uint32_t *total_frag_len_p,
  614. uint32_t *frag_len_p, uint16_t *l2_hdr_offset_p,
  615. qdf_frag_t rx_desc_tlv,
  616. bool *is_frag_non_raw_p, void *data)
  617. {
  618. if (msdu_info->msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION) {
  619. if (!*(is_frag_p)) {
  620. *total_frag_len_p = msdu_info->msdu_len;
  621. *is_frag_p = true;
  622. }
  623. dp_mon_adjust_frag_len(total_frag_len_p, frag_len_p);
  624. } else {
  625. if (*is_frag_p) {
  626. dp_mon_adjust_frag_len(
  627. total_frag_len_p, frag_len_p);
  628. } else {
  629. *frag_len_p = msdu_info->msdu_len;
  630. }
  631. *is_frag_p = false;
  632. }
  633. /*
  634. * HW structures call this L3 header padding
  635. * -- even though this is actually the offset
  636. * from the buffer beginning where the L2
  637. * header begins.
  638. */
  639. *l2_hdr_offset_p =
  640. hal_rx_msdu_end_l3_hdr_padding_get(dp_soc->hal_soc, data);
  641. }
  642. static inline void dp_rx_mon_buffer_set_pktlen(qdf_nbuf_t msdu, uint32_t size)
  643. {
  644. qdf_nbuf_set_pktlen(msdu, size);
  645. }
  646. static inline
  647. void dp_rx_mon_add_msdu_to_list(qdf_nbuf_t *head_msdu, qdf_nbuf_t msdu,
  648. qdf_nbuf_t *last, qdf_frag_t rx_desc_tlv,
  649. uint32_t frag_len, uint32_t l2_hdr_offset)
  650. {
  651. if (head_msdu && !*head_msdu) {
  652. *head_msdu = msdu;
  653. } else {
  654. if (*last)
  655. qdf_nbuf_set_next(*last, msdu);
  656. }
  657. *last = msdu;
  658. }
  659. static inline
  660. void dp_rx_mon_init_tail_msdu(qdf_nbuf_t msdu, qdf_nbuf_t last,
  661. qdf_nbuf_t *tail_msdu)
  662. {
  663. if (last)
  664. qdf_nbuf_set_next(last, NULL);
  665. *tail_msdu = msdu;
  666. }
  667. static inline
  668. void dp_rx_mon_remove_raw_frame_fcs_len(qdf_nbuf_t *head_msdu)
  669. {
  670. }
  671. static inline
  672. uint8_t *dp_rx_mon_get_buffer_data(struct dp_rx_desc *rx_desc)
  673. {
  674. qdf_nbuf_t msdu = NULL;
  675. uint8_t *data = NULL;
  676. msdu = rx_desc->nbuf;
  677. if (qdf_likely(msdu))
  678. data = qdf_nbuf_data(msdu);
  679. return data;
  680. }
  681. #endif
  682. /**
  683. * dp_rx_cookie_2_mon_link_desc() - Retrieve Link descriptor based on target
  684. * @pdev: core physical device context
  685. * @hal_buf_info: structure holding the buffer info
  686. * mac_id: mac number
  687. *
  688. * Return: link descriptor address
  689. */
  690. static inline
  691. void *dp_rx_cookie_2_mon_link_desc(struct dp_pdev *pdev,
  692. struct hal_buf_info buf_info,
  693. uint8_t mac_id)
  694. {
  695. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  696. return dp_rx_cookie_2_mon_link_desc_va(pdev, &buf_info,
  697. mac_id);
  698. return dp_rx_cookie_2_link_desc_va(pdev->soc, &buf_info);
  699. }
  700. /**
  701. * dp_rx_monitor_link_desc_return() - Return Link descriptor based on target
  702. * @pdev: core physical device context
  703. * @p_last_buf_addr_info: MPDU Link descriptor
  704. * mac_id: mac number
  705. *
  706. * Return: QDF_STATUS
  707. */
  708. static inline
  709. QDF_STATUS dp_rx_monitor_link_desc_return(struct dp_pdev *pdev,
  710. hal_buff_addrinfo_t
  711. p_last_buf_addr_info,
  712. uint8_t mac_id, uint8_t bm_action)
  713. {
  714. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  715. return dp_rx_mon_link_desc_return(pdev, p_last_buf_addr_info,
  716. mac_id);
  717. return dp_rx_link_desc_return_by_addr(pdev->soc, p_last_buf_addr_info,
  718. bm_action);
  719. }
  720. /**
  721. * dp_rxdma_get_mon_dst_ring() - Return the pointer to rxdma_err_dst_ring
  722. * or mon_dst_ring based on the target
  723. * @pdev: core physical device context
  724. * @mac_for_pdev: mac_id number
  725. *
  726. * Return: ring address
  727. */
  728. static inline
  729. void *dp_rxdma_get_mon_dst_ring(struct dp_pdev *pdev,
  730. uint8_t mac_for_pdev)
  731. {
  732. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  733. return pdev->soc->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  734. return pdev->soc->rxdma_err_dst_ring[mac_for_pdev].hal_srng;
  735. }
  736. /**
  737. * dp_rxdma_get_mon_buf_ring() - Return monitor buf ring address
  738. * based on target
  739. * @pdev: core physical device context
  740. * @mac_for_pdev: mac id number
  741. *
  742. * Return: ring address
  743. */
  744. static inline
  745. struct dp_srng *dp_rxdma_get_mon_buf_ring(struct dp_pdev *pdev,
  746. uint8_t mac_for_pdev)
  747. {
  748. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  749. return &pdev->soc->rxdma_mon_buf_ring[mac_for_pdev];
  750. /* For MCL there is only 1 rx refill ring */
  751. return &pdev->soc->rx_refill_buf_ring[0];
  752. }
  753. /**
  754. * dp_rx_get_mon_desc_pool() - Return monitor descriptor pool
  755. * based on target
  756. * @soc: soc handle
  757. * @mac_id: mac id number
  758. * @pdev_id: pdev id number
  759. *
  760. * Return: descriptor pool address
  761. */
  762. static inline
  763. struct rx_desc_pool *dp_rx_get_mon_desc_pool(struct dp_soc *soc,
  764. uint8_t mac_id,
  765. uint8_t pdev_id)
  766. {
  767. if (soc->wlan_cfg_ctx->rxdma1_enable)
  768. return &soc->rx_desc_mon[mac_id];
  769. return &soc->rx_desc_buf[pdev_id];
  770. }
  771. /**
  772. * dp_rx_get_mon_desc() - Return Rx descriptor based on target
  773. * @soc: soc handle
  774. * @cookie: cookie value
  775. *
  776. * Return: Rx descriptor
  777. */
  778. static inline
  779. struct dp_rx_desc *dp_rx_get_mon_desc(struct dp_soc *soc,
  780. uint32_t cookie)
  781. {
  782. if (soc->wlan_cfg_ctx->rxdma1_enable)
  783. return dp_rx_cookie_2_va_mon_buf(soc, cookie);
  784. return dp_rx_cookie_2_va_rxdma_buf(soc, cookie);
  785. }
  786. #ifndef REMOVE_MON_DBG_STATS
  787. /*
  788. * dp_rx_mon_update_dbg_ppdu_stats() - Update status ring TLV count
  789. * @ppdu_info: HAL RX PPDU info retrieved from status ring TLV
  790. * @rx_mon_stats: monitor mode status/destination ring PPDU and MPDU count
  791. *
  792. * Update status ring PPDU start and end count. Keep track TLV state on
  793. * PPDU start and end to find out if start and end is matching. Keep
  794. * track missing PPDU start and end count. Keep track matching PPDU
  795. * start and end count.
  796. *
  797. * Return: None
  798. */
  799. static inline void
  800. dp_rx_mon_update_dbg_ppdu_stats(struct hal_rx_ppdu_info *ppdu_info,
  801. struct cdp_pdev_mon_stats *rx_mon_stats)
  802. {
  803. if (ppdu_info->rx_state ==
  804. HAL_RX_MON_PPDU_START) {
  805. rx_mon_stats->status_ppdu_start++;
  806. if (rx_mon_stats->status_ppdu_state
  807. != CDP_MON_PPDU_END)
  808. rx_mon_stats->status_ppdu_end_mis++;
  809. rx_mon_stats->status_ppdu_state
  810. = CDP_MON_PPDU_START;
  811. ppdu_info->rx_state = HAL_RX_MON_PPDU_RESET;
  812. } else if (ppdu_info->rx_state ==
  813. HAL_RX_MON_PPDU_END) {
  814. rx_mon_stats->status_ppdu_end++;
  815. if (rx_mon_stats->status_ppdu_state
  816. != CDP_MON_PPDU_START)
  817. rx_mon_stats->status_ppdu_start_mis++;
  818. else
  819. rx_mon_stats->status_ppdu_compl++;
  820. rx_mon_stats->status_ppdu_state
  821. = CDP_MON_PPDU_END;
  822. ppdu_info->rx_state = HAL_RX_MON_PPDU_RESET;
  823. }
  824. }
  825. /*
  826. * dp_rx_mon_init_dbg_ppdu_stats() - initialization for monitor mode stats
  827. * @ppdu_info: HAL RX PPDU info retrieved from status ring TLV
  828. * @rx_mon_stats: monitor mode status/destination ring PPDU and MPDU count
  829. *
  830. * Return: None
  831. */
  832. static inline void
  833. dp_rx_mon_init_dbg_ppdu_stats(struct hal_rx_ppdu_info *ppdu_info,
  834. struct cdp_pdev_mon_stats *rx_mon_stats)
  835. {
  836. ppdu_info->rx_state = HAL_RX_MON_PPDU_END;
  837. rx_mon_stats->status_ppdu_state
  838. = CDP_MON_PPDU_END;
  839. }
  840. #else
  841. static inline void
  842. dp_rx_mon_update_dbg_ppdu_stats(struct hal_rx_ppdu_info *ppdu_info,
  843. struct cdp_pdev_mon_stats *rx_mon_stats)
  844. {
  845. }
  846. static inline void
  847. dp_rx_mon_init_dbg_ppdu_stats(struct hal_rx_ppdu_info *ppdu_info,
  848. struct cdp_pdev_mon_stats *rx_mon_stats)
  849. {
  850. }
  851. #endif
  852. #endif