dp_rx_mon_dest.c 36 KB

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  1. /*
  2. * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. #include "dp_internal.h"
  30. /* The maxinum buffer length allocated for radio tap */
  31. #define MAX_MONITOR_HEADER (512)
  32. /*
  33. * PPDU id is from 0 to 64k-1. PPDU id read from status ring and PPDU id
  34. * read from destination ring shall track each other. If the distance of
  35. * two ppdu id is less than 20000. It is assume no wrap around. Otherwise,
  36. * It is assume wrap around.
  37. */
  38. #define NOT_PPDU_ID_WRAP_AROUND 20000
  39. /**
  40. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  41. * (WBM), following error handling
  42. *
  43. * @dp_pdev: core txrx pdev context
  44. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  45. * Return: QDF_STATUS
  46. */
  47. static QDF_STATUS
  48. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  49. void *buf_addr_info, int mac_id)
  50. {
  51. struct dp_srng *dp_srng;
  52. void *hal_srng;
  53. void *hal_soc;
  54. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  55. void *src_srng_desc;
  56. int mac_for_pdev = dp_get_mac_id_for_mac(dp_pdev->soc, mac_id);
  57. hal_soc = dp_pdev->soc->hal_soc;
  58. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  59. hal_srng = dp_srng->hal_srng;
  60. qdf_assert(hal_srng);
  61. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  62. /* TODO */
  63. /*
  64. * Need API to convert from hal_ring pointer to
  65. * Ring Type / Ring Id combo
  66. */
  67. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  68. "%s %d : \
  69. HAL RING Access For WBM Release SRNG Failed -- %pK",
  70. __func__, __LINE__, hal_srng);
  71. goto done;
  72. }
  73. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  74. if (qdf_likely(src_srng_desc)) {
  75. /* Return link descriptor through WBM ring (SW2WBM)*/
  76. hal_rx_mon_msdu_link_desc_set(hal_soc,
  77. src_srng_desc, buf_addr_info);
  78. status = QDF_STATUS_SUCCESS;
  79. } else {
  80. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  81. "%s %d -- Monitor Link Desc WBM Release Ring Full",
  82. __func__, __LINE__);
  83. }
  84. done:
  85. hal_srng_access_end(hal_soc, hal_srng);
  86. return status;
  87. }
  88. /**
  89. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  90. * multiple nbufs. This function
  91. * is to return data length in
  92. * fragmented buffer
  93. *
  94. * @total_len: pointer to remaining data length.
  95. * @frag_len: pointer to data length in this fragment.
  96. */
  97. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  98. uint32_t *frag_len)
  99. {
  100. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  101. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  102. *total_len -= *frag_len;
  103. } else {
  104. *frag_len = *total_len;
  105. *total_len = 0;
  106. }
  107. }
  108. /**
  109. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  110. * (WBM), following error handling
  111. *
  112. * @soc: core DP main context
  113. * @mac_id: mac id which is one of 3 mac_ids
  114. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  115. * @head_msdu: head of msdu to be popped
  116. * @tail_msdu: tail of msdu to be popped
  117. * @npackets: number of packet to be popped
  118. * @ppdu_id: ppdu id of processing ppdu
  119. * @head: head of descs list to be freed
  120. * @tail: tail of decs list to be freed
  121. * Return: number of msdu in MPDU to be popped
  122. */
  123. static inline uint32_t
  124. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  125. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  126. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  127. union dp_rx_desc_list_elem_t **head,
  128. union dp_rx_desc_list_elem_t **tail)
  129. {
  130. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  131. void *rx_desc_tlv;
  132. void *rx_msdu_link_desc;
  133. qdf_nbuf_t msdu;
  134. qdf_nbuf_t last;
  135. struct hal_rx_msdu_list msdu_list;
  136. uint16_t num_msdus;
  137. uint32_t rx_buf_size, rx_pkt_offset;
  138. struct hal_buf_info buf_info;
  139. void *p_buf_addr_info;
  140. void *p_last_buf_addr_info;
  141. uint32_t rx_bufs_used = 0;
  142. uint32_t msdu_ppdu_id, msdu_cnt;
  143. uint8_t *data;
  144. uint32_t i;
  145. uint32_t total_frag_len = 0, frag_len = 0;
  146. bool is_frag, is_first_msdu;
  147. bool drop_mpdu = false;
  148. msdu = 0;
  149. last = NULL;
  150. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  151. &p_last_buf_addr_info, &msdu_cnt);
  152. if ((hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc) ==
  153. HAL_RX_WBM_RXDMA_PSH_RSN_ERROR)) {
  154. uint8_t rxdma_err =
  155. hal_rx_reo_ent_rxdma_error_code_get(
  156. rxdma_dst_ring_desc);
  157. if (qdf_unlikely((rxdma_err == HAL_RXDMA_ERR_FLUSH_REQUEST) ||
  158. (rxdma_err == HAL_RXDMA_ERR_MPDU_LENGTH) ||
  159. (rxdma_err == HAL_RXDMA_ERR_OVERFLOW))) {
  160. drop_mpdu = true;
  161. dp_pdev->rx_mon_stats.dest_mpdu_drop++;
  162. }
  163. }
  164. is_frag = false;
  165. is_first_msdu = true;
  166. do {
  167. rx_msdu_link_desc =
  168. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info,
  169. mac_id);
  170. qdf_assert(rx_msdu_link_desc);
  171. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  172. &msdu_list, &num_msdus);
  173. for (i = 0; i < num_msdus; i++) {
  174. uint32_t l2_hdr_offset;
  175. struct dp_rx_desc *rx_desc =
  176. dp_rx_cookie_2_va_mon_buf(soc,
  177. msdu_list.sw_cookie[i]);
  178. qdf_assert(rx_desc);
  179. msdu = rx_desc->nbuf;
  180. if (rx_desc->unmapped == 0) {
  181. qdf_nbuf_unmap_single(soc->osdev, msdu,
  182. QDF_DMA_FROM_DEVICE);
  183. rx_desc->unmapped = 1;
  184. }
  185. if (drop_mpdu) {
  186. qdf_nbuf_free(msdu);
  187. msdu = NULL;
  188. goto next_msdu;
  189. }
  190. data = qdf_nbuf_data(msdu);
  191. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  192. QDF_TRACE(QDF_MODULE_ID_DP,
  193. QDF_TRACE_LEVEL_DEBUG,
  194. "[%s] i=%d, ppdu_id=%x, num_msdus = %u\n",
  195. __func__, i, *ppdu_id,
  196. num_msdus);
  197. if (is_first_msdu) {
  198. if (!HAL_RX_HW_DESC_MPDU_VALID(
  199. rx_desc_tlv)) {
  200. drop_mpdu = true;
  201. qdf_nbuf_free(msdu);
  202. msdu = NULL;
  203. goto next_msdu;
  204. }
  205. msdu_ppdu_id = HAL_RX_HW_DESC_GET_PPDUID_GET(
  206. rx_desc_tlv);
  207. is_first_msdu = false;
  208. QDF_TRACE(QDF_MODULE_ID_DP,
  209. QDF_TRACE_LEVEL_DEBUG,
  210. "[%s] msdu_ppdu_id=%x",
  211. __func__, msdu_ppdu_id);
  212. if (*ppdu_id > msdu_ppdu_id)
  213. QDF_TRACE(QDF_MODULE_ID_DP,
  214. QDF_TRACE_LEVEL_DEBUG,
  215. "[%s][%d] ppdu_id=%d "
  216. "msdu_ppdu_id=%d",
  217. __func__, __LINE__, *ppdu_id,
  218. msdu_ppdu_id);
  219. if ((*ppdu_id < msdu_ppdu_id) && (
  220. (msdu_ppdu_id - *ppdu_id) <
  221. NOT_PPDU_ID_WRAP_AROUND)) {
  222. *ppdu_id = msdu_ppdu_id;
  223. return rx_bufs_used;
  224. } else if ((*ppdu_id > msdu_ppdu_id) && (
  225. (*ppdu_id - msdu_ppdu_id) >
  226. NOT_PPDU_ID_WRAP_AROUND)) {
  227. *ppdu_id = msdu_ppdu_id;
  228. return rx_bufs_used;
  229. }
  230. }
  231. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  232. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc,
  233. rx_desc_tlv,
  234. &(dp_pdev->ppdu_info.rx_status));
  235. if (msdu_list.msdu_info[i].msdu_flags &
  236. HAL_MSDU_F_MSDU_CONTINUATION) {
  237. if (!is_frag) {
  238. total_frag_len =
  239. msdu_list.msdu_info[i].msdu_len;
  240. is_frag = true;
  241. }
  242. dp_mon_adjust_frag_len(
  243. &total_frag_len, &frag_len);
  244. } else {
  245. if (is_frag) {
  246. dp_mon_adjust_frag_len(
  247. &total_frag_len, &frag_len);
  248. } else {
  249. frag_len =
  250. msdu_list.msdu_info[i].msdu_len;
  251. }
  252. is_frag = false;
  253. msdu_cnt--;
  254. }
  255. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  256. "%s total_len %u frag_len %u flags %u",
  257. __func__, total_frag_len, frag_len,
  258. msdu_list.msdu_info[i].msdu_flags);
  259. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  260. /*
  261. * HW structures call this L3 header padding
  262. * -- even though this is actually the offset
  263. * from the buffer beginning where the L2
  264. * header begins.
  265. */
  266. l2_hdr_offset =
  267. hal_rx_msdu_end_l3_hdr_padding_get(data);
  268. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  269. + frag_len;
  270. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  271. #if 0
  272. /* Disble it.see packet on msdu done set to 0 */
  273. /*
  274. * Check if DMA completed -- msdu_done is the
  275. * last bit to be written
  276. */
  277. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  278. QDF_TRACE(QDF_MODULE_ID_DP,
  279. QDF_TRACE_LEVEL_ERROR,
  280. "%s:%d: Pkt Desc",
  281. __func__, __LINE__);
  282. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  283. QDF_TRACE_LEVEL_ERROR,
  284. rx_desc_tlv, 128);
  285. qdf_assert_always(0);
  286. }
  287. #endif
  288. QDF_TRACE(QDF_MODULE_ID_DP,
  289. QDF_TRACE_LEVEL_DEBUG,
  290. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%pK skb->len %lu",
  291. __func__, rx_pkt_offset, l2_hdr_offset,
  292. msdu_list.msdu_info[i].msdu_len,
  293. qdf_nbuf_data(msdu), qdf_nbuf_len(msdu));
  294. if (head_msdu && *head_msdu == NULL) {
  295. *head_msdu = msdu;
  296. } else {
  297. if (last)
  298. qdf_nbuf_set_next(last, msdu);
  299. }
  300. last = msdu;
  301. next_msdu:
  302. rx_bufs_used++;
  303. dp_rx_add_to_free_desc_list(head,
  304. tail, rx_desc);
  305. }
  306. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  307. &p_buf_addr_info);
  308. if (dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info,
  309. mac_id) != QDF_STATUS_SUCCESS)
  310. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  311. "dp_rx_mon_link_desc_return failed");
  312. p_last_buf_addr_info = p_buf_addr_info;
  313. } while (buf_info.paddr && msdu_cnt);
  314. if (last)
  315. qdf_nbuf_set_next(last, NULL);
  316. *tail_msdu = msdu;
  317. return rx_bufs_used;
  318. }
  319. static inline
  320. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  321. {
  322. uint8_t *data;
  323. uint32_t rx_pkt_offset, l2_hdr_offset;
  324. data = qdf_nbuf_data(msdu);
  325. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  326. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  327. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  328. }
  329. static inline
  330. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  331. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  332. struct cdp_mon_status *rx_status)
  333. {
  334. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  335. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  336. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  337. is_amsdu, is_first_frag, amsdu_pad;
  338. void *rx_desc;
  339. char *hdr_desc;
  340. unsigned char *dest;
  341. struct ieee80211_frame *wh;
  342. struct ieee80211_qoscntl *qos;
  343. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  344. head_frag_list = NULL;
  345. mpdu_buf = NULL;
  346. /* The nbuf has been pulled just beyond the status and points to the
  347. * payload
  348. */
  349. if (!head_msdu)
  350. goto mpdu_stitch_fail;
  351. msdu_orig = head_msdu;
  352. rx_desc = qdf_nbuf_data(msdu_orig);
  353. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  354. /* It looks like there is some issue on MPDU len err */
  355. /* Need further investigate if drop the packet */
  356. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  357. return NULL;
  358. }
  359. rx_desc = qdf_nbuf_data(last_msdu);
  360. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  361. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  362. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  363. /* Fill out the rx_status from the PPDU start and end fields */
  364. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  365. rx_desc = qdf_nbuf_data(head_msdu);
  366. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  367. /* Easy case - The MSDU status indicates that this is a non-decapped
  368. * packet in RAW mode.
  369. */
  370. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  371. /* Note that this path might suffer from headroom unavailabilty
  372. * - but the RX status is usually enough
  373. */
  374. dp_rx_msdus_set_payload(head_msdu);
  375. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  376. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  377. __func__, __LINE__, head_msdu, head_msdu->next,
  378. last_msdu, last_msdu->next);
  379. mpdu_buf = head_msdu;
  380. prev_buf = mpdu_buf;
  381. frag_list_sum_len = 0;
  382. msdu = qdf_nbuf_next(head_msdu);
  383. is_first_frag = 1;
  384. while (msdu) {
  385. dp_rx_msdus_set_payload(msdu);
  386. if (is_first_frag) {
  387. is_first_frag = 0;
  388. head_frag_list = msdu;
  389. }
  390. frag_list_sum_len += qdf_nbuf_len(msdu);
  391. /* Maintain the linking of the cloned MSDUS */
  392. qdf_nbuf_set_next_ext(prev_buf, msdu);
  393. /* Move to the next */
  394. prev_buf = msdu;
  395. msdu = qdf_nbuf_next(msdu);
  396. }
  397. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  398. /* If there were more fragments to this RAW frame */
  399. if (head_frag_list) {
  400. if (frag_list_sum_len <
  401. sizeof(struct ieee80211_frame_min_one)) {
  402. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  403. return NULL;
  404. }
  405. frag_list_sum_len -= HAL_RX_FCS_LEN;
  406. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  407. frag_list_sum_len);
  408. qdf_nbuf_set_next(mpdu_buf, NULL);
  409. }
  410. goto mpdu_stitch_done;
  411. }
  412. /* Decap mode:
  413. * Calculate the amount of header in decapped packet to knock off based
  414. * on the decap type and the corresponding number of raw bytes to copy
  415. * status header
  416. */
  417. rx_desc = qdf_nbuf_data(head_msdu);
  418. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  419. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  420. "[%s][%d] decap format not raw",
  421. __func__, __LINE__);
  422. /* Base size */
  423. wifi_hdr_len = sizeof(struct ieee80211_frame);
  424. wh = (struct ieee80211_frame *)hdr_desc;
  425. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  426. if (dir == IEEE80211_FC1_DIR_DSTODS)
  427. wifi_hdr_len += 6;
  428. is_amsdu = 0;
  429. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  430. qos = (struct ieee80211_qoscntl *)
  431. (hdr_desc + wifi_hdr_len);
  432. wifi_hdr_len += 2;
  433. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  434. }
  435. /*Calculate security header length based on 'Protected'
  436. * and 'EXT_IV' flag
  437. * */
  438. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  439. char *iv = (char *)wh + wifi_hdr_len;
  440. if (iv[3] & KEY_EXTIV)
  441. sec_hdr_len = 8;
  442. else
  443. sec_hdr_len = 4;
  444. } else {
  445. sec_hdr_len = 0;
  446. }
  447. wifi_hdr_len += sec_hdr_len;
  448. /* MSDU related stuff LLC - AMSDU subframe header etc */
  449. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  450. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  451. /* "Decap" header to remove from MSDU buffer */
  452. decap_hdr_pull_bytes = 14;
  453. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  454. * status of the now decapped first msdu. Leave enough headroom for
  455. * accomodating any radio-tap /prism like PHY header
  456. */
  457. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  458. MAX_MONITOR_HEADER + mpdu_buf_len,
  459. MAX_MONITOR_HEADER, 4, FALSE);
  460. if (!mpdu_buf)
  461. goto mpdu_stitch_done;
  462. /* Copy the MPDU related header and enc headers into the first buffer
  463. * - Note that there can be a 2 byte pad between heaader and enc header
  464. */
  465. prev_buf = mpdu_buf;
  466. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  467. if (!dest)
  468. goto mpdu_stitch_fail;
  469. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  470. hdr_desc += wifi_hdr_len;
  471. #if 0
  472. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  473. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  474. hdr_desc += sec_hdr_len;
  475. #endif
  476. /* The first LLC len is copied into the MPDU buffer */
  477. frag_list_sum_len = 0;
  478. msdu_orig = head_msdu;
  479. is_first_frag = 1;
  480. amsdu_pad = 0;
  481. while (msdu_orig) {
  482. /* TODO: intra AMSDU padding - do we need it ??? */
  483. msdu = msdu_orig;
  484. if (is_first_frag) {
  485. head_frag_list = msdu;
  486. } else {
  487. /* Reload the hdr ptr only on non-first MSDUs */
  488. rx_desc = qdf_nbuf_data(msdu_orig);
  489. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  490. }
  491. /* Copy this buffers MSDU related status into the prev buffer */
  492. if (is_first_frag) {
  493. is_first_frag = 0;
  494. }
  495. dest = qdf_nbuf_put_tail(prev_buf,
  496. msdu_llc_len + amsdu_pad);
  497. if (!dest)
  498. goto mpdu_stitch_fail;
  499. dest += amsdu_pad;
  500. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  501. dp_rx_msdus_set_payload(msdu);
  502. /* Push the MSDU buffer beyond the decap header */
  503. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  504. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  505. + amsdu_pad;
  506. /* Set up intra-AMSDU pad to be added to start of next buffer -
  507. * AMSDU pad is 4 byte pad on AMSDU subframe */
  508. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  509. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  510. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  511. * probably iterate all the frags cloning them along the way and
  512. * and also updating the prev_buf pointer
  513. */
  514. /* Move to the next */
  515. prev_buf = msdu;
  516. msdu_orig = qdf_nbuf_next(msdu_orig);
  517. }
  518. #if 0
  519. /* Add in the trailer section - encryption trailer + FCS */
  520. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  521. frag_list_sum_len += HAL_RX_FCS_LEN;
  522. #endif
  523. frag_list_sum_len -= msdu_llc_len;
  524. /* TODO: Convert this to suitable adf routines */
  525. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  526. frag_list_sum_len);
  527. mpdu_stitch_done:
  528. /* Check if this buffer contains the PPDU end status for TSF */
  529. /* Need revist this code to see where we can get tsf timestamp */
  530. #if 0
  531. /* PPDU end TLV will be retrieved from monitor status ring */
  532. last_mpdu =
  533. (*(((u_int32_t *)&rx_desc->attention)) &
  534. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  535. RX_ATTENTION_0_LAST_MPDU_LSB;
  536. if (last_mpdu)
  537. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  538. #endif
  539. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  540. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  541. __func__, __LINE__,
  542. mpdu_buf, mpdu_buf->len);
  543. return mpdu_buf;
  544. mpdu_stitch_fail:
  545. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  546. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  547. "%s mpdu_stitch_fail mpdu_buf %pK",
  548. __func__, mpdu_buf);
  549. /* Free the head buffer */
  550. qdf_nbuf_free(mpdu_buf);
  551. }
  552. return NULL;
  553. }
  554. /**
  555. * dp_rx_extract_radiotap_info(): Extract and populate information in
  556. * struct mon_rx_status type
  557. * @rx_status: Receive status
  558. * @mon_rx_status: Monitor mode status
  559. *
  560. * Returns: None
  561. */
  562. static inline
  563. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  564. struct mon_rx_status *rx_mon_status)
  565. {
  566. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  567. rx_mon_status->chan_freq = rx_status->rs_freq;
  568. rx_mon_status->chan_num = rx_status->rs_channel;
  569. rx_mon_status->chan_flags = rx_status->rs_flags;
  570. rx_mon_status->rate = rx_status->rs_datarate;
  571. /* TODO: rx_mon_status->ant_signal_db */
  572. /* TODO: rx_mon_status->nr_ant */
  573. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  574. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  575. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  576. /* TODO: rx_mon_status->ldpc */
  577. /* TODO: rx_mon_status->beamformed */
  578. /* TODO: rx_mon_status->vht_flags */
  579. /* TODO: rx_mon_status->vht_flag_values1 */
  580. }
  581. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  582. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  583. {
  584. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  585. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  586. qdf_nbuf_t mon_skb, skb_next;
  587. qdf_nbuf_t mon_mpdu = NULL;
  588. if ((pdev->monitor_vdev == NULL) ||
  589. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  590. goto mon_deliver_fail;
  591. }
  592. /* restitch mon MPDU for delivery via monitor interface */
  593. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  594. tail_msdu, rs);
  595. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  596. pdev->ppdu_info.rx_status.ppdu_id =
  597. pdev->ppdu_info.com_info.ppdu_id;
  598. pdev->ppdu_info.rx_status.device_id = soc->device_id;
  599. pdev->ppdu_info.rx_status.chan_noise_floor =
  600. pdev->chan_noise_floor;
  601. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  602. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  603. pdev->monitor_vdev->osif_rx_mon(
  604. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  605. } else {
  606. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  607. "[%s][%d] mon_mpdu=%pK pdev->monitor_vdev %pK osif_vdev %pK",
  608. __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  609. pdev->monitor_vdev->osif_vdev);
  610. goto mon_deliver_fail;
  611. }
  612. return QDF_STATUS_SUCCESS;
  613. mon_deliver_fail:
  614. mon_skb = head_msdu;
  615. while (mon_skb) {
  616. skb_next = qdf_nbuf_next(mon_skb);
  617. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  618. "[%s][%d] mon_skb=%pK len %u", __func__,
  619. __LINE__, mon_skb, mon_skb->len);
  620. qdf_nbuf_free(mon_skb);
  621. mon_skb = skb_next;
  622. }
  623. return QDF_STATUS_E_INVAL;
  624. }
  625. /**
  626. * dp_rx_mon_deliver_non_std()
  627. * @soc: core txrx main contex
  628. * @mac_id: MAC ID
  629. *
  630. * This function delivers the radio tap and dummy MSDU
  631. * into user layer application for preamble only PPDU.
  632. *
  633. * Return: QDF_STATUS
  634. */
  635. QDF_STATUS dp_rx_mon_deliver_non_std(struct dp_soc *soc,
  636. uint32_t mac_id)
  637. {
  638. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  639. ol_txrx_rx_mon_fp osif_rx_mon;
  640. qdf_nbuf_t dummy_msdu;
  641. /* Sanity checking */
  642. if ((!pdev->monitor_vdev) || (!pdev->monitor_vdev->osif_rx_mon))
  643. goto mon_deliver_non_std_fail;
  644. /* Generate a dummy skb_buff */
  645. osif_rx_mon = pdev->monitor_vdev->osif_rx_mon;
  646. dummy_msdu = qdf_nbuf_alloc(soc->osdev, MAX_MONITOR_HEADER,
  647. MAX_MONITOR_HEADER, 4, FALSE);
  648. if (!dummy_msdu)
  649. goto allocate_dummy_msdu_fail;
  650. qdf_nbuf_set_pktlen(dummy_msdu, 0);
  651. qdf_nbuf_set_next(dummy_msdu, NULL);
  652. pdev->ppdu_info.rx_status.ppdu_id =
  653. pdev->ppdu_info.com_info.ppdu_id;
  654. /* Apply the radio header to this dummy skb */
  655. qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status,
  656. dummy_msdu, MAX_MONITOR_HEADER);
  657. /* deliver to the user layer application */
  658. osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  659. dummy_msdu, NULL);
  660. /* Clear rx_status*/
  661. qdf_mem_zero(&pdev->ppdu_info.rx_status,
  662. sizeof(pdev->ppdu_info.rx_status));
  663. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  664. return QDF_STATUS_SUCCESS;
  665. allocate_dummy_msdu_fail:
  666. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP, "[%s][%d] mon_skb=%pK ",
  667. __func__, __LINE__, dummy_msdu);
  668. mon_deliver_non_std_fail:
  669. return QDF_STATUS_E_INVAL;
  670. }
  671. /**
  672. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  673. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  674. * @soc: core txrx main contex
  675. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  676. * @quota: No. of units (packets) that can be serviced in one shot.
  677. *
  678. * This function implements the core of Rx functionality. This is
  679. * expected to handle only non-error frames.
  680. *
  681. * Return: none
  682. */
  683. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  684. {
  685. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  686. void *hal_soc;
  687. void *rxdma_dst_ring_desc;
  688. void *mon_dst_srng;
  689. union dp_rx_desc_list_elem_t *head = NULL;
  690. union dp_rx_desc_list_elem_t *tail = NULL;
  691. uint32_t ppdu_id;
  692. uint32_t rx_bufs_used;
  693. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  694. struct cdp_pdev_mon_stats *rx_mon_stats;
  695. mon_dst_srng = pdev->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  696. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  697. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  698. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK",
  699. __func__, __LINE__, mon_dst_srng);
  700. return;
  701. }
  702. hal_soc = soc->hal_soc;
  703. qdf_assert(hal_soc);
  704. qdf_spin_lock_bh(&pdev->mon_lock);
  705. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  706. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  707. "%s %d : HAL Monitor Destination Ring access Failed -- %pK",
  708. __func__, __LINE__, mon_dst_srng);
  709. return;
  710. }
  711. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  712. rx_bufs_used = 0;
  713. rx_mon_stats = &pdev->rx_mon_stats;
  714. while (qdf_likely(rxdma_dst_ring_desc =
  715. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  716. qdf_nbuf_t head_msdu, tail_msdu;
  717. uint32_t npackets;
  718. head_msdu = (qdf_nbuf_t) NULL;
  719. tail_msdu = (qdf_nbuf_t) NULL;
  720. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  721. rxdma_dst_ring_desc,
  722. &head_msdu, &tail_msdu,
  723. &npackets, &ppdu_id,
  724. &head, &tail);
  725. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  726. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  727. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  728. sizeof(pdev->ppdu_info.rx_status));
  729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  730. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  731. __func__, __LINE__,
  732. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  733. break;
  734. }
  735. if (qdf_likely((head_msdu != NULL) && (tail_msdu != NULL))) {
  736. rx_mon_stats->dest_mpdu_done++;
  737. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  738. }
  739. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  740. mon_dst_srng);
  741. }
  742. hal_srng_access_end(hal_soc, mon_dst_srng);
  743. qdf_spin_unlock_bh(&pdev->mon_lock);
  744. if (rx_bufs_used) {
  745. rx_mon_stats->dest_ppdu_done++;
  746. dp_rx_buffers_replenish(soc, mac_id,
  747. &pdev->rxdma_mon_buf_ring[mac_for_pdev],
  748. &soc->rx_desc_mon[mac_id], rx_bufs_used, &head, &tail);
  749. }
  750. }
  751. #ifndef QCA_WIFI_QCA6390
  752. static QDF_STATUS
  753. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
  754. uint8_t pdev_id = pdev->pdev_id;
  755. struct dp_soc *soc = pdev->soc;
  756. union dp_rx_desc_list_elem_t *desc_list = NULL;
  757. union dp_rx_desc_list_elem_t *tail = NULL;
  758. struct dp_srng *rxdma_srng;
  759. uint32_t rxdma_entries;
  760. struct rx_desc_pool *rx_desc_pool;
  761. QDF_STATUS status;
  762. uint8_t mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  763. rxdma_srng = &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  764. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  765. soc->hal_soc,
  766. RXDMA_MONITOR_BUF);
  767. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  768. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  769. "%s: Mon RX Desc Pool[%d] allocation size=%d"
  770. , __func__, pdev_id, rxdma_entries*3);
  771. status = dp_rx_desc_pool_alloc(soc, mac_id,
  772. rxdma_entries*3, rx_desc_pool);
  773. if (!QDF_IS_STATUS_SUCCESS(status)) {
  774. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  775. "%s: dp_rx_desc_pool_alloc() failed ", __func__);
  776. return status;
  777. }
  778. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  780. "%s: Mon RX Buffers Replenish pdev_id=%d",
  781. __func__, pdev_id);
  782. status = dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  783. rxdma_entries, &desc_list, &tail);
  784. if (!QDF_IS_STATUS_SUCCESS(status)) {
  785. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  786. "%s: dp_rx_buffers_replenish() failed",
  787. __func__);
  788. return status;
  789. }
  790. return QDF_STATUS_SUCCESS;
  791. }
  792. static QDF_STATUS
  793. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  794. {
  795. struct dp_soc *soc = pdev->soc;
  796. struct rx_desc_pool *rx_desc_pool;
  797. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  798. if (rx_desc_pool->pool_size != 0)
  799. dp_rx_desc_pool_free(soc, mac_id, rx_desc_pool);
  800. return QDF_STATUS_SUCCESS;
  801. }
  802. /*
  803. * Allocate and setup link descriptor pool that will be used by HW for
  804. * various link and queue descriptors and managed by WBM
  805. */
  806. static
  807. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  808. {
  809. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  810. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  811. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  812. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  813. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  814. uint32_t total_link_descs, total_mem_size;
  815. uint32_t num_link_desc_banks;
  816. uint32_t last_bank_size = 0;
  817. uint32_t entry_size, num_entries;
  818. void *mon_desc_srng;
  819. uint32_t num_replenish_buf;
  820. struct dp_srng *dp_srng;
  821. int i;
  822. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  823. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  824. soc->hal_soc, RXDMA_MONITOR_DESC);
  825. /* Round up to power of 2 */
  826. total_link_descs = 1;
  827. while (total_link_descs < num_entries)
  828. total_link_descs <<= 1;
  829. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  830. "%s: total_link_descs: %u, link_desc_size: %d",
  831. __func__, total_link_descs, link_desc_size);
  832. total_mem_size = total_link_descs * link_desc_size;
  833. total_mem_size += link_desc_align;
  834. if (total_mem_size <= max_alloc_size) {
  835. num_link_desc_banks = 0;
  836. last_bank_size = total_mem_size;
  837. } else {
  838. num_link_desc_banks = (total_mem_size) /
  839. (max_alloc_size - link_desc_align);
  840. last_bank_size = total_mem_size %
  841. (max_alloc_size - link_desc_align);
  842. }
  843. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  844. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  845. max_alloc_size: %d last_bank_size: %d",
  846. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  847. last_bank_size);
  848. for (i = 0; i < num_link_desc_banks; i++) {
  849. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr_unaligned =
  850. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  851. max_alloc_size,
  852. &(dp_pdev->link_desc_banks[mac_for_pdev][i].
  853. base_paddr_unaligned));
  854. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  855. base_vaddr_unaligned) {
  856. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  857. "%s: Link desc memory allocation failed",
  858. __func__);
  859. goto fail;
  860. }
  861. dp_pdev->link_desc_banks[mac_for_pdev][i].size = max_alloc_size;
  862. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  863. (void *)((unsigned long)
  864. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  865. base_vaddr_unaligned) +
  866. ((unsigned long)
  867. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  868. base_vaddr_unaligned) %
  869. link_desc_align));
  870. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  871. (unsigned long)
  872. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  873. base_paddr_unaligned) +
  874. ((unsigned long)
  875. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  876. (unsigned long)
  877. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  878. base_vaddr_unaligned));
  879. }
  880. if (last_bank_size) {
  881. /* Allocate last bank in case total memory required is not exact
  882. * multiple of max_alloc_size
  883. */
  884. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr_unaligned =
  885. qdf_mem_alloc_consistent(soc->osdev,
  886. soc->osdev->dev, last_bank_size,
  887. &(dp_pdev->link_desc_banks[mac_for_pdev][i].
  888. base_paddr_unaligned));
  889. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  890. base_vaddr_unaligned == NULL) {
  891. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  892. "%s: allocation failed for mon link desc pool",
  893. __func__);
  894. goto fail;
  895. }
  896. dp_pdev->link_desc_banks[mac_for_pdev][i].size = last_bank_size;
  897. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  898. (void *)((unsigned long)
  899. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  900. base_vaddr_unaligned) +
  901. ((unsigned long)
  902. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  903. base_vaddr_unaligned) %
  904. link_desc_align));
  905. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  906. (unsigned long)
  907. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  908. base_paddr_unaligned) +
  909. ((unsigned long)
  910. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  911. (unsigned long)
  912. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  913. base_vaddr_unaligned));
  914. }
  915. /* Allocate and setup link descriptor idle list for HW internal use */
  916. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  917. total_mem_size = entry_size * total_link_descs;
  918. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring[mac_for_pdev].hal_srng;
  919. num_replenish_buf = 0;
  920. if (total_mem_size <= max_alloc_size) {
  921. void *desc;
  922. for (i = 0;
  923. i < MAX_MON_LINK_DESC_BANKS &&
  924. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr;
  925. i++) {
  926. uint32_t num_entries =
  927. (dp_pdev->link_desc_banks[mac_for_pdev][i].size -
  928. (unsigned long)
  929. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  930. (unsigned long)
  931. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  932. base_vaddr_unaligned)) / link_desc_size;
  933. unsigned long paddr =
  934. (unsigned long)
  935. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr);
  936. unsigned long vaddr =
  937. (unsigned long)
  938. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr);
  939. hal_srng_access_start_unlocked(soc->hal_soc,
  940. mon_desc_srng);
  941. while (num_entries && (desc =
  942. hal_srng_src_get_next(soc->hal_soc,
  943. mon_desc_srng))) {
  944. hal_set_link_desc_addr(desc, i, paddr);
  945. num_entries--;
  946. num_replenish_buf++;
  947. paddr += link_desc_size;
  948. vaddr += link_desc_size;
  949. }
  950. hal_srng_access_end_unlocked(soc->hal_soc,
  951. mon_desc_srng);
  952. }
  953. } else {
  954. qdf_assert(0);
  955. }
  956. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  957. "%s: successfully replenished %d buffer",
  958. __func__, num_replenish_buf);
  959. return QDF_STATUS_SUCCESS;
  960. fail:
  961. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  962. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  963. base_vaddr_unaligned) {
  964. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  965. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  966. dp_pdev->link_desc_banks[mac_for_pdev][i].
  967. base_vaddr_unaligned,
  968. dp_pdev->link_desc_banks[mac_for_pdev][i].
  969. base_paddr_unaligned, 0);
  970. dp_pdev->link_desc_banks[mac_for_pdev][i].
  971. base_vaddr_unaligned = NULL;
  972. }
  973. }
  974. return QDF_STATUS_E_FAILURE;
  975. }
  976. /*
  977. * Free link descriptor pool that was setup HW
  978. */
  979. static
  980. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  981. {
  982. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  983. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  984. int i;
  985. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  986. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  987. base_vaddr_unaligned) {
  988. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  989. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  990. dp_pdev->link_desc_banks[mac_for_pdev][i].
  991. base_vaddr_unaligned,
  992. dp_pdev->link_desc_banks[mac_for_pdev][i].
  993. base_paddr_unaligned, 0);
  994. dp_pdev->link_desc_banks[mac_for_pdev][i].
  995. base_vaddr_unaligned = NULL;
  996. }
  997. }
  998. }
  999. /**
  1000. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  1001. * @pdev: core txrx pdev context
  1002. *
  1003. * This function will attach a DP RX for monitor mode instance into
  1004. * the main device (SOC) context. Will allocate dp rx resource and
  1005. * initialize resources.
  1006. *
  1007. * Return: QDF_STATUS_SUCCESS: success
  1008. * QDF_STATUS_E_RESOURCES: Error return
  1009. */
  1010. #ifndef DISABLE_MON_CONFIG
  1011. QDF_STATUS
  1012. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1013. struct dp_soc *soc = pdev->soc;
  1014. QDF_STATUS status;
  1015. uint8_t pdev_id = pdev->pdev_id;
  1016. int mac_id;
  1017. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1018. "%s: pdev attach id=%d", __func__, pdev_id);
  1019. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1020. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1021. status = dp_rx_pdev_mon_buf_attach(pdev, mac_for_pdev);
  1022. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1023. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1024. "%s: dp_rx_pdev_mon_buf_attach() failed",
  1025. __func__);
  1026. return status;
  1027. }
  1028. status = dp_rx_pdev_mon_status_attach(pdev, mac_for_pdev);
  1029. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1030. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1031. "%s: dp_rx_pdev_mon_status_attach() failed",
  1032. __func__);
  1033. return status;
  1034. }
  1035. status = dp_mon_link_desc_pool_setup(soc, mac_for_pdev);
  1036. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1037. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1038. "%s: dp_mon_link_desc_pool_setup() failed",
  1039. __func__);
  1040. return status;
  1041. }
  1042. }
  1043. qdf_spinlock_create(&pdev->mon_lock);
  1044. return QDF_STATUS_SUCCESS;
  1045. }
  1046. #else
  1047. QDF_STATUS
  1048. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1049. return QDF_STATUS_SUCCESS;
  1050. }
  1051. #endif
  1052. /**
  1053. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  1054. * @pdev: core txrx pdev context
  1055. *
  1056. * This function will detach DP RX for monitor mode from
  1057. * main device context. will free DP Rx resources for
  1058. * monitor mode
  1059. *
  1060. * Return: QDF_STATUS_SUCCESS: success
  1061. * QDF_STATUS_E_RESOURCES: Error return
  1062. */
  1063. #ifndef DISABLE_MON_CONFIG
  1064. QDF_STATUS
  1065. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1066. uint8_t pdev_id = pdev->pdev_id;
  1067. struct dp_soc *soc = pdev->soc;
  1068. int mac_id;
  1069. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1070. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1071. qdf_spinlock_destroy(&pdev->mon_lock);
  1072. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1073. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1074. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1075. }
  1076. return QDF_STATUS_SUCCESS;
  1077. }
  1078. #else
  1079. QDF_STATUS
  1080. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1081. return QDF_STATUS_SUCCESS;
  1082. }
  1083. #endif /* DISABLE_MON_CONFIG */
  1084. #endif