dp_rx.c 67 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  41. {
  42. return vdev->ap_bridge_enabled;
  43. }
  44. #ifdef DUP_RX_DESC_WAR
  45. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  46. void *ring_desc, struct dp_rx_desc *rx_desc)
  47. {
  48. void *hal_soc = soc->hal_soc;
  49. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  50. dp_rx_desc_dump(rx_desc);
  51. }
  52. #else
  53. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  54. hal_ring_handle_t hal_ring_hdl,
  55. hal_ring_desc_t ring_desc,
  56. struct dp_rx_desc *rx_desc)
  57. {
  58. void *hal_soc = soc->hal_soc;
  59. dp_rx_desc_dump(rx_desc);
  60. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  61. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  62. qdf_assert_always(0);
  63. }
  64. #endif
  65. /*
  66. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  67. * called during dp rx initialization
  68. * and at the end of dp_rx_process.
  69. *
  70. * @soc: core txrx main context
  71. * @mac_id: mac_id which is one of 3 mac_ids
  72. * @dp_rxdma_srng: dp rxdma circular ring
  73. * @rx_desc_pool: Pointer to free Rx descriptor pool
  74. * @num_req_buffers: number of buffer to be replenished
  75. * @desc_list: list of descs if called from dp_rx_process
  76. * or NULL during dp rx initialization or out of buffer
  77. * interrupt.
  78. * @tail: tail of descs list
  79. * Return: return success or failure
  80. */
  81. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  82. struct dp_srng *dp_rxdma_srng,
  83. struct rx_desc_pool *rx_desc_pool,
  84. uint32_t num_req_buffers,
  85. union dp_rx_desc_list_elem_t **desc_list,
  86. union dp_rx_desc_list_elem_t **tail)
  87. {
  88. uint32_t num_alloc_desc;
  89. uint16_t num_desc_to_free = 0;
  90. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  91. uint32_t num_entries_avail;
  92. uint32_t count;
  93. int sync_hw_ptr = 1;
  94. qdf_dma_addr_t paddr;
  95. qdf_nbuf_t rx_netbuf;
  96. void *rxdma_ring_entry;
  97. union dp_rx_desc_list_elem_t *next;
  98. QDF_STATUS ret;
  99. void *rxdma_srng;
  100. rxdma_srng = dp_rxdma_srng->hal_srng;
  101. if (!rxdma_srng) {
  102. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  103. "rxdma srng not initialized");
  104. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  105. return QDF_STATUS_E_FAILURE;
  106. }
  107. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  108. "requested %d buffers for replenish", num_req_buffers);
  109. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  110. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  111. rxdma_srng,
  112. sync_hw_ptr);
  113. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  114. "no of available entries in rxdma ring: %d",
  115. num_entries_avail);
  116. if (!(*desc_list) && (num_entries_avail >
  117. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  118. num_req_buffers = num_entries_avail;
  119. } else if (num_entries_avail < num_req_buffers) {
  120. num_desc_to_free = num_req_buffers - num_entries_avail;
  121. num_req_buffers = num_entries_avail;
  122. }
  123. if (qdf_unlikely(!num_req_buffers)) {
  124. num_desc_to_free = num_req_buffers;
  125. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  126. goto free_descs;
  127. }
  128. /*
  129. * if desc_list is NULL, allocate the descs from freelist
  130. */
  131. if (!(*desc_list)) {
  132. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  133. rx_desc_pool,
  134. num_req_buffers,
  135. desc_list,
  136. tail);
  137. if (!num_alloc_desc) {
  138. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  139. "no free rx_descs in freelist");
  140. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  141. num_req_buffers);
  142. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  143. return QDF_STATUS_E_NOMEM;
  144. }
  145. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  146. "%d rx desc allocated", num_alloc_desc);
  147. num_req_buffers = num_alloc_desc;
  148. }
  149. count = 0;
  150. while (count < num_req_buffers) {
  151. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  152. RX_BUFFER_SIZE,
  153. RX_BUFFER_RESERVATION,
  154. RX_BUFFER_ALIGNMENT,
  155. FALSE);
  156. if (qdf_unlikely(!rx_netbuf)) {
  157. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  158. break;
  159. }
  160. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  161. QDF_DMA_FROM_DEVICE);
  162. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  163. qdf_nbuf_free(rx_netbuf);
  164. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  165. continue;
  166. }
  167. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  168. /*
  169. * check if the physical address of nbuf->data is
  170. * less then 0x50000000 then free the nbuf and try
  171. * allocating new nbuf. We can try for 100 times.
  172. * this is a temp WAR till we fix it properly.
  173. */
  174. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  175. if (ret == QDF_STATUS_E_FAILURE) {
  176. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  177. break;
  178. }
  179. count++;
  180. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  181. rxdma_srng);
  182. qdf_assert_always(rxdma_ring_entry);
  183. next = (*desc_list)->next;
  184. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  185. /* rx_desc.in_use should be zero at this time*/
  186. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  187. (*desc_list)->rx_desc.in_use = 1;
  188. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  189. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  190. (unsigned long long)paddr,
  191. (*desc_list)->rx_desc.cookie);
  192. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  193. (*desc_list)->rx_desc.cookie,
  194. rx_desc_pool->owner);
  195. *desc_list = next;
  196. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  197. }
  198. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  199. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  200. count, num_desc_to_free);
  201. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  202. (RX_BUFFER_SIZE * count));
  203. free_descs:
  204. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  205. /*
  206. * add any available free desc back to the free list
  207. */
  208. if (*desc_list)
  209. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  210. mac_id, rx_desc_pool);
  211. return QDF_STATUS_SUCCESS;
  212. }
  213. /*
  214. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  215. * pkts to RAW mode simulation to
  216. * decapsulate the pkt.
  217. *
  218. * @vdev: vdev on which RAW mode is enabled
  219. * @nbuf_list: list of RAW pkts to process
  220. * @peer: peer object from which the pkt is rx
  221. *
  222. * Return: void
  223. */
  224. void
  225. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  226. struct dp_peer *peer)
  227. {
  228. qdf_nbuf_t deliver_list_head = NULL;
  229. qdf_nbuf_t deliver_list_tail = NULL;
  230. qdf_nbuf_t nbuf;
  231. nbuf = nbuf_list;
  232. while (nbuf) {
  233. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  234. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  235. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  236. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  237. /*
  238. * reset the chfrag_start and chfrag_end bits in nbuf cb
  239. * as this is a non-amsdu pkt and RAW mode simulation expects
  240. * these bit s to be 0 for non-amsdu pkt.
  241. */
  242. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  243. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  244. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  245. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  246. }
  247. nbuf = next;
  248. }
  249. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  250. &deliver_list_tail, (struct cdp_peer*) peer);
  251. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  252. }
  253. #ifdef DP_LFR
  254. /*
  255. * In case of LFR, data of a new peer might be sent up
  256. * even before peer is added.
  257. */
  258. static inline struct dp_vdev *
  259. dp_get_vdev_from_peer(struct dp_soc *soc,
  260. uint16_t peer_id,
  261. struct dp_peer *peer,
  262. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  263. {
  264. struct dp_vdev *vdev;
  265. uint8_t vdev_id;
  266. if (unlikely(!peer)) {
  267. if (peer_id != HTT_INVALID_PEER) {
  268. vdev_id = DP_PEER_METADATA_ID_GET(
  269. mpdu_desc_info.peer_meta_data);
  270. QDF_TRACE(QDF_MODULE_ID_DP,
  271. QDF_TRACE_LEVEL_DEBUG,
  272. FL("PeerID %d not found use vdevID %d"),
  273. peer_id, vdev_id);
  274. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  275. vdev_id);
  276. } else {
  277. QDF_TRACE(QDF_MODULE_ID_DP,
  278. QDF_TRACE_LEVEL_DEBUG,
  279. FL("Invalid PeerID %d"),
  280. peer_id);
  281. return NULL;
  282. }
  283. } else {
  284. vdev = peer->vdev;
  285. }
  286. return vdev;
  287. }
  288. #else
  289. static inline struct dp_vdev *
  290. dp_get_vdev_from_peer(struct dp_soc *soc,
  291. uint16_t peer_id,
  292. struct dp_peer *peer,
  293. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  294. {
  295. if (unlikely(!peer)) {
  296. QDF_TRACE(QDF_MODULE_ID_DP,
  297. QDF_TRACE_LEVEL_DEBUG,
  298. FL("Peer not found for peerID %d"),
  299. peer_id);
  300. return NULL;
  301. } else {
  302. return peer->vdev;
  303. }
  304. }
  305. #endif
  306. #ifndef FEATURE_WDS
  307. static void
  308. dp_rx_da_learn(struct dp_soc *soc,
  309. uint8_t *rx_tlv_hdr,
  310. struct dp_peer *ta_peer,
  311. qdf_nbuf_t nbuf)
  312. {
  313. }
  314. #endif
  315. /*
  316. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  317. *
  318. * @soc: core txrx main context
  319. * @ta_peer : source peer entry
  320. * @rx_tlv_hdr : start address of rx tlvs
  321. * @nbuf : nbuf that has to be intrabss forwarded
  322. *
  323. * Return: bool: true if it is forwarded else false
  324. */
  325. static bool
  326. dp_rx_intrabss_fwd(struct dp_soc *soc,
  327. struct dp_peer *ta_peer,
  328. uint8_t *rx_tlv_hdr,
  329. qdf_nbuf_t nbuf)
  330. {
  331. uint16_t da_idx;
  332. uint16_t len;
  333. uint8_t is_frag;
  334. struct dp_peer *da_peer;
  335. struct dp_ast_entry *ast_entry;
  336. qdf_nbuf_t nbuf_copy;
  337. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  338. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  339. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  340. tid_stats.tid_rx_stats[ring_id][tid];
  341. /* check if the destination peer is available in peer table
  342. * and also check if the source peer and destination peer
  343. * belong to the same vap and destination peer is not bss peer.
  344. */
  345. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  346. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  347. ast_entry = soc->ast_table[da_idx];
  348. if (!ast_entry)
  349. return false;
  350. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  351. ast_entry->is_active = TRUE;
  352. return false;
  353. }
  354. da_peer = ast_entry->peer;
  355. if (!da_peer)
  356. return false;
  357. /* TA peer cannot be same as peer(DA) on which AST is present
  358. * this indicates a change in topology and that AST entries
  359. * are yet to be updated.
  360. */
  361. if (da_peer == ta_peer)
  362. return false;
  363. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  364. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  365. is_frag = qdf_nbuf_is_frag(nbuf);
  366. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  367. /* linearize the nbuf just before we send to
  368. * dp_tx_send()
  369. */
  370. if (qdf_unlikely(is_frag)) {
  371. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  372. return false;
  373. nbuf = qdf_nbuf_unshare(nbuf);
  374. if (!nbuf) {
  375. DP_STATS_INC_PKT(ta_peer,
  376. rx.intra_bss.fail,
  377. 1,
  378. len);
  379. /* return true even though the pkt is
  380. * not forwarded. Basically skb_unshare
  381. * failed and we want to continue with
  382. * next nbuf.
  383. */
  384. tid_stats->fail_cnt[INTRABSS_DROP]++;
  385. return true;
  386. }
  387. }
  388. if (!dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev),
  389. nbuf)) {
  390. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  391. len);
  392. return true;
  393. } else {
  394. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  395. len);
  396. tid_stats->fail_cnt[INTRABSS_DROP]++;
  397. return false;
  398. }
  399. }
  400. }
  401. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  402. * source, then clone the pkt and send the cloned pkt for
  403. * intra BSS forwarding and original pkt up the network stack
  404. * Note: how do we handle multicast pkts. do we forward
  405. * all multicast pkts as is or let a higher layer module
  406. * like igmpsnoop decide whether to forward or not with
  407. * Mcast enhancement.
  408. */
  409. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  410. !ta_peer->bss_peer))) {
  411. nbuf_copy = qdf_nbuf_copy(nbuf);
  412. if (!nbuf_copy)
  413. return false;
  414. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  415. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  416. if (dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev), nbuf_copy)) {
  417. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  418. tid_stats->fail_cnt[INTRABSS_DROP]++;
  419. qdf_nbuf_free(nbuf_copy);
  420. } else {
  421. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  422. tid_stats->intrabss_cnt++;
  423. }
  424. }
  425. /* return false as we have to still send the original pkt
  426. * up the stack
  427. */
  428. return false;
  429. }
  430. #ifdef MESH_MODE_SUPPORT
  431. /**
  432. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  433. *
  434. * @vdev: DP Virtual device handle
  435. * @nbuf: Buffer pointer
  436. * @rx_tlv_hdr: start of rx tlv header
  437. * @peer: pointer to peer
  438. *
  439. * This function allocated memory for mesh receive stats and fill the
  440. * required stats. Stores the memory address in skb cb.
  441. *
  442. * Return: void
  443. */
  444. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  445. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  446. {
  447. struct mesh_recv_hdr_s *rx_info = NULL;
  448. uint32_t pkt_type;
  449. uint32_t nss;
  450. uint32_t rate_mcs;
  451. uint32_t bw;
  452. /* fill recv mesh stats */
  453. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  454. /* upper layers are resposible to free this memory */
  455. if (!rx_info) {
  456. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  457. "Memory allocation failed for mesh rx stats");
  458. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  459. return;
  460. }
  461. rx_info->rs_flags = MESH_RXHDR_VER1;
  462. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  463. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  464. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  465. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  466. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  467. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  468. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  469. if (vdev->osif_get_key)
  470. vdev->osif_get_key(vdev->osif_vdev,
  471. &rx_info->rs_decryptkey[0],
  472. &peer->mac_addr.raw[0],
  473. rx_info->rs_keyix);
  474. }
  475. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  476. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  477. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  478. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  479. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  480. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  481. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  482. (bw << 24);
  483. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  484. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  485. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  486. rx_info->rs_flags,
  487. rx_info->rs_rssi,
  488. rx_info->rs_channel,
  489. rx_info->rs_ratephy1,
  490. rx_info->rs_keyix);
  491. }
  492. /**
  493. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  494. *
  495. * @vdev: DP Virtual device handle
  496. * @nbuf: Buffer pointer
  497. * @rx_tlv_hdr: start of rx tlv header
  498. *
  499. * This checks if the received packet is matching any filter out
  500. * catogery and and drop the packet if it matches.
  501. *
  502. * Return: status(0 indicates drop, 1 indicate to no drop)
  503. */
  504. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  505. uint8_t *rx_tlv_hdr)
  506. {
  507. union dp_align_mac_addr mac_addr;
  508. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  509. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  510. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  511. return QDF_STATUS_SUCCESS;
  512. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  513. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  514. return QDF_STATUS_SUCCESS;
  515. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  516. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  517. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  518. return QDF_STATUS_SUCCESS;
  519. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  520. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  521. &mac_addr.raw[0]))
  522. return QDF_STATUS_E_FAILURE;
  523. if (!qdf_mem_cmp(&mac_addr.raw[0],
  524. &vdev->mac_addr.raw[0],
  525. QDF_MAC_ADDR_SIZE))
  526. return QDF_STATUS_SUCCESS;
  527. }
  528. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  529. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  530. &mac_addr.raw[0]))
  531. return QDF_STATUS_E_FAILURE;
  532. if (!qdf_mem_cmp(&mac_addr.raw[0],
  533. &vdev->mac_addr.raw[0],
  534. QDF_MAC_ADDR_SIZE))
  535. return QDF_STATUS_SUCCESS;
  536. }
  537. }
  538. return QDF_STATUS_E_FAILURE;
  539. }
  540. #else
  541. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  542. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  543. {
  544. }
  545. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  546. uint8_t *rx_tlv_hdr)
  547. {
  548. return QDF_STATUS_E_FAILURE;
  549. }
  550. #endif
  551. #ifdef FEATURE_NAC_RSSI
  552. /**
  553. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  554. * clients
  555. * @pdev: DP pdev handle
  556. * @rx_pkt_hdr: Rx packet Header
  557. *
  558. * return: dp_vdev*
  559. */
  560. static
  561. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  562. uint8_t *rx_pkt_hdr)
  563. {
  564. struct ieee80211_frame *wh;
  565. struct dp_neighbour_peer *peer = NULL;
  566. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  567. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  568. return NULL;
  569. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  570. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  571. neighbour_peer_list_elem) {
  572. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  573. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  574. QDF_TRACE(
  575. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  576. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  577. peer->neighbour_peers_macaddr.raw[0],
  578. peer->neighbour_peers_macaddr.raw[1],
  579. peer->neighbour_peers_macaddr.raw[2],
  580. peer->neighbour_peers_macaddr.raw[3],
  581. peer->neighbour_peers_macaddr.raw[4],
  582. peer->neighbour_peers_macaddr.raw[5]);
  583. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  584. return pdev->monitor_vdev;
  585. }
  586. }
  587. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  588. return NULL;
  589. }
  590. /**
  591. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  592. * @soc: DP SOC handle
  593. * @mpdu: mpdu for which peer is invalid
  594. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  595. * pool_id has same mapping)
  596. *
  597. * return: integer type
  598. */
  599. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  600. uint8_t mac_id)
  601. {
  602. struct dp_invalid_peer_msg msg;
  603. struct dp_vdev *vdev = NULL;
  604. struct dp_pdev *pdev = NULL;
  605. struct ieee80211_frame *wh;
  606. qdf_nbuf_t curr_nbuf, next_nbuf;
  607. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  608. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  609. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  610. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  611. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  612. "Drop decapped frames");
  613. goto free;
  614. }
  615. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  616. if (!DP_FRAME_IS_DATA(wh)) {
  617. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  618. "NAWDS valid only for data frames");
  619. goto free;
  620. }
  621. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  622. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  623. "Invalid nbuf length");
  624. goto free;
  625. }
  626. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  627. if (!pdev) {
  628. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  629. "PDEV not found");
  630. goto free;
  631. }
  632. if (pdev->filter_neighbour_peers) {
  633. /* Next Hop scenario not yet handle */
  634. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  635. if (vdev) {
  636. dp_rx_mon_deliver(soc, pdev->pdev_id,
  637. pdev->invalid_peer_head_msdu,
  638. pdev->invalid_peer_tail_msdu);
  639. pdev->invalid_peer_head_msdu = NULL;
  640. pdev->invalid_peer_tail_msdu = NULL;
  641. return 0;
  642. }
  643. }
  644. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  645. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  646. QDF_MAC_ADDR_SIZE) == 0) {
  647. goto out;
  648. }
  649. }
  650. if (!vdev) {
  651. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  652. "VDEV not found");
  653. goto free;
  654. }
  655. out:
  656. msg.wh = wh;
  657. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  658. msg.nbuf = mpdu;
  659. msg.vdev_id = vdev->vdev_id;
  660. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  661. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  662. &msg);
  663. free:
  664. /* Drop and free packet */
  665. curr_nbuf = mpdu;
  666. while (curr_nbuf) {
  667. next_nbuf = qdf_nbuf_next(curr_nbuf);
  668. qdf_nbuf_free(curr_nbuf);
  669. curr_nbuf = next_nbuf;
  670. }
  671. return 0;
  672. }
  673. /**
  674. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  675. * @soc: DP SOC handle
  676. * @mpdu: mpdu for which peer is invalid
  677. * @mpdu_done: if an mpdu is completed
  678. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  679. * pool_id has same mapping)
  680. *
  681. * return: integer type
  682. */
  683. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  684. qdf_nbuf_t mpdu, bool mpdu_done,
  685. uint8_t mac_id)
  686. {
  687. /* Only trigger the process when mpdu is completed */
  688. if (mpdu_done)
  689. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  690. }
  691. #else
  692. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  693. uint8_t mac_id)
  694. {
  695. qdf_nbuf_t curr_nbuf, next_nbuf;
  696. struct dp_pdev *pdev;
  697. struct dp_vdev *vdev = NULL;
  698. struct ieee80211_frame *wh;
  699. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  700. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  701. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  702. if (!DP_FRAME_IS_DATA(wh)) {
  703. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  704. "only for data frames");
  705. goto free;
  706. }
  707. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  708. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  709. "Invalid nbuf length");
  710. goto free;
  711. }
  712. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  713. if (!pdev) {
  714. QDF_TRACE(QDF_MODULE_ID_DP,
  715. QDF_TRACE_LEVEL_ERROR,
  716. "PDEV not found");
  717. goto free;
  718. }
  719. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  720. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  721. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  722. QDF_MAC_ADDR_SIZE) == 0) {
  723. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  724. goto out;
  725. }
  726. }
  727. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  728. if (!vdev) {
  729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  730. "VDEV not found");
  731. goto free;
  732. }
  733. out:
  734. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  735. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  736. free:
  737. /* reset the head and tail pointers */
  738. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  739. if (pdev) {
  740. pdev->invalid_peer_head_msdu = NULL;
  741. pdev->invalid_peer_tail_msdu = NULL;
  742. }
  743. /* Drop and free packet */
  744. curr_nbuf = mpdu;
  745. while (curr_nbuf) {
  746. next_nbuf = qdf_nbuf_next(curr_nbuf);
  747. qdf_nbuf_free(curr_nbuf);
  748. curr_nbuf = next_nbuf;
  749. }
  750. return 0;
  751. }
  752. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  753. qdf_nbuf_t mpdu, bool mpdu_done,
  754. uint8_t mac_id)
  755. {
  756. /* Process the nbuf */
  757. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  758. }
  759. #endif
  760. #ifdef RECEIVE_OFFLOAD
  761. /**
  762. * dp_rx_print_offload_info() - Print offload info from RX TLV
  763. * @rx_tlv: RX TLV for which offload information is to be printed
  764. *
  765. * Return: None
  766. */
  767. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  768. {
  769. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  770. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  771. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  772. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  773. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  774. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  775. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  776. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  777. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  778. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  779. dp_verbose_debug("---------------------------------------------------------");
  780. }
  781. /**
  782. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  783. * @soc: DP SOC handle
  784. * @rx_tlv: RX TLV received for the msdu
  785. * @msdu: msdu for which GRO info needs to be filled
  786. *
  787. * Return: None
  788. */
  789. static
  790. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  791. qdf_nbuf_t msdu)
  792. {
  793. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  794. return;
  795. /* Filling up RX offload info only for TCP packets */
  796. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  797. return;
  798. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  799. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  800. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  801. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  802. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  803. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  804. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  805. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  806. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  807. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  808. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  809. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  810. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  811. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  812. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  813. HAL_RX_TLV_GET_IPV6(rx_tlv);
  814. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  815. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  816. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  817. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  818. dp_rx_print_offload_info(rx_tlv);
  819. }
  820. #else
  821. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  822. qdf_nbuf_t msdu)
  823. {
  824. }
  825. #endif /* RECEIVE_OFFLOAD */
  826. /**
  827. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  828. *
  829. * @nbuf: pointer to msdu.
  830. * @mpdu_len: mpdu length
  831. *
  832. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  833. */
  834. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  835. {
  836. bool last_nbuf;
  837. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  838. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  839. last_nbuf = false;
  840. } else {
  841. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  842. last_nbuf = true;
  843. }
  844. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  845. return last_nbuf;
  846. }
  847. /**
  848. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  849. * multiple nbufs.
  850. * @nbuf: pointer to the first msdu of an amsdu.
  851. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  852. *
  853. *
  854. * This function implements the creation of RX frag_list for cases
  855. * where an MSDU is spread across multiple nbufs.
  856. *
  857. * Return: returns the head nbuf which contains complete frag_list.
  858. */
  859. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  860. {
  861. qdf_nbuf_t parent, next, frag_list;
  862. uint16_t frag_list_len = 0;
  863. uint16_t mpdu_len;
  864. bool last_nbuf;
  865. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  866. /*
  867. * this is a case where the complete msdu fits in one single nbuf.
  868. * in this case HW sets both start and end bit and we only need to
  869. * reset these bits for RAW mode simulator to decap the pkt
  870. */
  871. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  872. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  873. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  874. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  875. return nbuf;
  876. }
  877. /*
  878. * This is a case where we have multiple msdus (A-MSDU) spread across
  879. * multiple nbufs. here we create a fraglist out of these nbufs.
  880. *
  881. * the moment we encounter a nbuf with continuation bit set we
  882. * know for sure we have an MSDU which is spread across multiple
  883. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  884. */
  885. parent = nbuf;
  886. frag_list = nbuf->next;
  887. nbuf = nbuf->next;
  888. /*
  889. * set the start bit in the first nbuf we encounter with continuation
  890. * bit set. This has the proper mpdu length set as it is the first
  891. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  892. * nbufs will form the frag_list of the parent nbuf.
  893. */
  894. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  895. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  896. /*
  897. * this is where we set the length of the fragments which are
  898. * associated to the parent nbuf. We iterate through the frag_list
  899. * till we hit the last_nbuf of the list.
  900. */
  901. do {
  902. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  903. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  904. frag_list_len += qdf_nbuf_len(nbuf);
  905. if (last_nbuf) {
  906. next = nbuf->next;
  907. nbuf->next = NULL;
  908. break;
  909. }
  910. nbuf = nbuf->next;
  911. } while (!last_nbuf);
  912. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  913. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  914. parent->next = next;
  915. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  916. return parent;
  917. }
  918. /**
  919. * dp_rx_compute_delay() - Compute and fill in all timestamps
  920. * to pass in correct fields
  921. *
  922. * @vdev: pdev handle
  923. * @tx_desc: tx descriptor
  924. * @tid: tid value
  925. * Return: none
  926. */
  927. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  928. {
  929. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  930. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  931. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  932. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  933. uint32_t interframe_delay =
  934. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  935. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  936. CDP_DELAY_STATS_REAP_STACK, ring_id);
  937. /*
  938. * Update interframe delay stats calculated at deliver_data_ol point.
  939. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  940. * interframe delay will not be calculate correctly for 1st frame.
  941. * On the other side, this will help in avoiding extra per packet check
  942. * of vdev->prev_rx_deliver_tstamp.
  943. */
  944. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  945. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  946. vdev->prev_rx_deliver_tstamp = current_ts;
  947. }
  948. /**
  949. * dp_rx_drop_nbuf_list() - drop an nbuf list
  950. * @pdev: dp pdev reference
  951. * @buf_list: buffer list to be dropepd
  952. *
  953. * Return: int (number of bufs dropped)
  954. */
  955. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  956. qdf_nbuf_t buf_list)
  957. {
  958. struct cdp_tid_rx_stats *stats = NULL;
  959. uint8_t tid = 0, ring_id = 0;
  960. int num_dropped = 0;
  961. qdf_nbuf_t buf, next_buf;
  962. buf = buf_list;
  963. while (buf) {
  964. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  965. next_buf = qdf_nbuf_queue_next(buf);
  966. tid = qdf_nbuf_get_tid_val(buf);
  967. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  968. stats->fail_cnt[INVALID_PEER_VDEV]++;
  969. stats->delivered_to_stack--;
  970. qdf_nbuf_free(buf);
  971. buf = next_buf;
  972. num_dropped++;
  973. }
  974. return num_dropped;
  975. }
  976. #ifdef PEER_CACHE_RX_PKTS
  977. /**
  978. * dp_rx_flush_rx_cached() - flush cached rx frames
  979. * @peer: peer
  980. * @drop: flag to drop frames or forward to net stack
  981. *
  982. * Return: None
  983. */
  984. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  985. {
  986. struct dp_peer_cached_bufq *bufqi;
  987. struct dp_rx_cached_buf *cache_buf = NULL;
  988. ol_txrx_rx_fp data_rx = NULL;
  989. int num_buff_elem;
  990. QDF_STATUS status;
  991. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  992. qdf_atomic_dec(&peer->flush_in_progress);
  993. return;
  994. }
  995. qdf_spin_lock_bh(&peer->peer_info_lock);
  996. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  997. data_rx = peer->vdev->osif_rx;
  998. else
  999. drop = true;
  1000. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1001. bufqi = &peer->bufq_info;
  1002. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1003. qdf_list_remove_front(&bufqi->cached_bufq,
  1004. (qdf_list_node_t **)&cache_buf);
  1005. while (cache_buf) {
  1006. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1007. cache_buf->buf);
  1008. bufqi->entries -= num_buff_elem;
  1009. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1010. if (drop) {
  1011. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1012. cache_buf->buf);
  1013. } else {
  1014. /* Flush the cached frames to OSIF DEV */
  1015. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1016. if (status != QDF_STATUS_SUCCESS)
  1017. bufqi->dropped = dp_rx_drop_nbuf_list(
  1018. peer->vdev->pdev,
  1019. cache_buf->buf);
  1020. }
  1021. qdf_mem_free(cache_buf);
  1022. cache_buf = NULL;
  1023. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1024. qdf_list_remove_front(&bufqi->cached_bufq,
  1025. (qdf_list_node_t **)&cache_buf);
  1026. }
  1027. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1028. qdf_atomic_dec(&peer->flush_in_progress);
  1029. }
  1030. /**
  1031. * dp_rx_enqueue_rx() - cache rx frames
  1032. * @peer: peer
  1033. * @rx_buf_list: cache buffer list
  1034. *
  1035. * Return: None
  1036. */
  1037. static QDF_STATUS
  1038. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1039. {
  1040. struct dp_rx_cached_buf *cache_buf;
  1041. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1042. int num_buff_elem;
  1043. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1044. bufqi->entries, bufqi->dropped);
  1045. if (!peer->valid) {
  1046. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1047. rx_buf_list);
  1048. return QDF_STATUS_E_INVAL;
  1049. }
  1050. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1051. if (bufqi->entries >= bufqi->thresh) {
  1052. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1053. rx_buf_list);
  1054. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1055. return QDF_STATUS_E_RESOURCES;
  1056. }
  1057. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1058. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1059. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1060. if (!cache_buf) {
  1061. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1062. "Failed to allocate buf to cache rx frames");
  1063. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1064. rx_buf_list);
  1065. return QDF_STATUS_E_NOMEM;
  1066. }
  1067. cache_buf->buf = rx_buf_list;
  1068. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1069. qdf_list_insert_back(&bufqi->cached_bufq,
  1070. &cache_buf->node);
  1071. bufqi->entries += num_buff_elem;
  1072. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1073. return QDF_STATUS_SUCCESS;
  1074. }
  1075. static inline
  1076. bool dp_rx_is_peer_cache_bufq_supported(void)
  1077. {
  1078. return true;
  1079. }
  1080. #else
  1081. static inline
  1082. bool dp_rx_is_peer_cache_bufq_supported(void)
  1083. {
  1084. return false;
  1085. }
  1086. static inline QDF_STATUS
  1087. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1088. {
  1089. return QDF_STATUS_SUCCESS;
  1090. }
  1091. #endif
  1092. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1093. struct dp_peer *peer,
  1094. qdf_nbuf_t nbuf_head,
  1095. qdf_nbuf_t nbuf_tail)
  1096. {
  1097. /*
  1098. * highly unlikely to have a vdev without a registered rx
  1099. * callback function. if so let us free the nbuf_list.
  1100. */
  1101. if (qdf_unlikely(!vdev->osif_rx)) {
  1102. if (dp_rx_is_peer_cache_bufq_supported())
  1103. dp_rx_enqueue_rx(peer, nbuf_head);
  1104. else
  1105. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1106. return;
  1107. }
  1108. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1109. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1110. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1111. &nbuf_tail, (struct cdp_peer *) peer);
  1112. }
  1113. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1114. }
  1115. /**
  1116. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1117. * @nbuf: pointer to the first msdu of an amsdu.
  1118. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1119. *
  1120. * The ipsumed field of the skb is set based on whether HW validated the
  1121. * IP/TCP/UDP checksum.
  1122. *
  1123. * Return: void
  1124. */
  1125. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1126. qdf_nbuf_t nbuf,
  1127. uint8_t *rx_tlv_hdr)
  1128. {
  1129. qdf_nbuf_rx_cksum_t cksum = {0};
  1130. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1131. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1132. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1133. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1134. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1135. } else {
  1136. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1137. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1138. }
  1139. }
  1140. /**
  1141. * dp_rx_msdu_stats_update() - update per msdu stats.
  1142. * @soc: core txrx main context
  1143. * @nbuf: pointer to the first msdu of an amsdu.
  1144. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1145. * @peer: pointer to the peer object.
  1146. * @ring_id: reo dest ring number on which pkt is reaped.
  1147. * @tid_stats: per tid rx stats.
  1148. *
  1149. * update all the per msdu stats for that nbuf.
  1150. * Return: void
  1151. */
  1152. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1153. qdf_nbuf_t nbuf,
  1154. uint8_t *rx_tlv_hdr,
  1155. struct dp_peer *peer,
  1156. uint8_t ring_id,
  1157. struct cdp_tid_rx_stats *tid_stats)
  1158. {
  1159. bool is_ampdu, is_not_amsdu;
  1160. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1161. struct dp_vdev *vdev = peer->vdev;
  1162. qdf_ether_header_t *eh;
  1163. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1164. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1165. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1166. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1167. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1168. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1169. tid_stats->msdu_cnt++;
  1170. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1171. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1172. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1173. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1174. tid_stats->mcast_msdu_cnt++;
  1175. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1176. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1177. tid_stats->bcast_msdu_cnt++;
  1178. }
  1179. }
  1180. /*
  1181. * currently we can return from here as we have similar stats
  1182. * updated at per ppdu level instead of msdu level
  1183. */
  1184. if (!soc->process_rx_status)
  1185. return;
  1186. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1187. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1188. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1189. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1190. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1191. tid = qdf_nbuf_get_tid_val(nbuf);
  1192. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1193. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1194. rx_tlv_hdr);
  1195. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1196. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1197. DP_STATS_INC(peer, rx.bw[bw], 1);
  1198. /*
  1199. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1200. * then increase index [nss - 1] in array counter.
  1201. */
  1202. if (nss > 0 && (pkt_type == DOT11_N ||
  1203. pkt_type == DOT11_AC ||
  1204. pkt_type == DOT11_AX))
  1205. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1206. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1207. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1208. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1209. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1210. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1211. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1212. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1213. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1214. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1215. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1216. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1217. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1218. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1219. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1220. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1221. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1222. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1223. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1224. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1225. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1226. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1227. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1228. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1229. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1230. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1231. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1232. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1233. if ((soc->process_rx_status) &&
  1234. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1235. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1236. if (!vdev->pdev)
  1237. return;
  1238. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1239. &peer->stats, peer->peer_ids[0],
  1240. UPDATE_PEER_STATS,
  1241. vdev->pdev->pdev_id);
  1242. #endif
  1243. }
  1244. }
  1245. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1246. uint8_t *rx_tlv_hdr,
  1247. qdf_nbuf_t nbuf)
  1248. {
  1249. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1250. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1251. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1252. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1253. qdf_nbuf_is_da_valid(nbuf) &&
  1254. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1255. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1256. return false;
  1257. return true;
  1258. }
  1259. #ifndef WDS_VENDOR_EXTENSION
  1260. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1261. struct dp_vdev *vdev,
  1262. struct dp_peer *peer)
  1263. {
  1264. return 1;
  1265. }
  1266. #endif
  1267. #ifdef RX_DESC_DEBUG_CHECK
  1268. /**
  1269. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1270. * corruption
  1271. *
  1272. * @ring_desc: REO ring descriptor
  1273. * @rx_desc: Rx descriptor
  1274. *
  1275. * Return: NONE
  1276. */
  1277. static inline
  1278. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1279. struct dp_rx_desc *rx_desc)
  1280. {
  1281. struct hal_buf_info hbi;
  1282. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1283. /* Sanity check for possible buffer paddr corruption */
  1284. qdf_assert_always((&hbi)->paddr ==
  1285. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1286. }
  1287. #else
  1288. static inline
  1289. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1290. struct dp_rx_desc *rx_desc)
  1291. {
  1292. }
  1293. #endif
  1294. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1295. static inline
  1296. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1297. {
  1298. bool limit_hit = false;
  1299. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1300. limit_hit =
  1301. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1302. if (limit_hit)
  1303. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1304. return limit_hit;
  1305. }
  1306. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1307. {
  1308. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1309. }
  1310. #else
  1311. static inline
  1312. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1313. {
  1314. return false;
  1315. }
  1316. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1317. {
  1318. return false;
  1319. }
  1320. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1321. /**
  1322. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1323. *
  1324. * @nbuf: pkt skb pointer
  1325. *
  1326. * Return: true if matched, false if not
  1327. */
  1328. static inline
  1329. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1330. {
  1331. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1332. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1333. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1334. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1335. return true;
  1336. else
  1337. return false;
  1338. }
  1339. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1340. /**
  1341. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1342. * no corresbonding peer found
  1343. * @soc: core txrx main context
  1344. * @nbuf: pkt skb pointer
  1345. *
  1346. * This function will try to deliver some RX special frames to stack
  1347. * even there is no peer matched found. for instance, LFR case, some
  1348. * eapol data will be sent to host before peer_map done.
  1349. *
  1350. * Return: None
  1351. */
  1352. static inline
  1353. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1354. {
  1355. uint32_t peer_mdata;
  1356. uint16_t peer_id;
  1357. uint8_t vdev_id;
  1358. struct dp_vdev *vdev;
  1359. uint32_t l2_hdr_offset = 0;
  1360. uint16_t msdu_len = 0;
  1361. uint32_t pkt_len = 0;
  1362. uint8_t *rx_tlv_hdr;
  1363. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1364. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1365. if (peer_id > soc->max_peers)
  1366. goto deliver_fail;
  1367. vdev_id = DP_PEER_METADATA_ID_GET(peer_mdata);
  1368. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1369. if (!vdev || !vdev->osif_rx)
  1370. goto deliver_fail;
  1371. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1372. l2_hdr_offset =
  1373. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1374. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1375. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1376. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1377. qdf_nbuf_pull_head(nbuf,
  1378. RX_PKT_TLVS_LEN +
  1379. l2_hdr_offset);
  1380. /* only allow special frames */
  1381. if (!dp_is_special_data(nbuf))
  1382. goto deliver_fail;
  1383. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1384. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1385. return;
  1386. deliver_fail:
  1387. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1388. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1389. qdf_nbuf_free(nbuf);
  1390. }
  1391. #else
  1392. static inline
  1393. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1394. {
  1395. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1396. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1397. qdf_nbuf_free(nbuf);
  1398. }
  1399. #endif
  1400. /**
  1401. * dp_rx_process() - Brain of the Rx processing functionality
  1402. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1403. * @soc: core txrx main context
  1404. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1405. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1406. * @quota: No. of units (packets) that can be serviced in one shot.
  1407. *
  1408. * This function implements the core of Rx functionality. This is
  1409. * expected to handle only non-error frames.
  1410. *
  1411. * Return: uint32_t: No. of elements processed
  1412. */
  1413. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1414. uint8_t reo_ring_num, uint32_t quota)
  1415. {
  1416. void *hal_soc;
  1417. hal_ring_desc_t ring_desc;
  1418. struct dp_rx_desc *rx_desc = NULL;
  1419. qdf_nbuf_t nbuf, next;
  1420. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1421. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1422. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1423. uint32_t l2_hdr_offset = 0;
  1424. uint16_t msdu_len = 0;
  1425. uint16_t peer_id;
  1426. struct dp_peer *peer;
  1427. struct dp_vdev *vdev;
  1428. uint32_t pkt_len = 0;
  1429. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1430. struct hal_rx_msdu_desc_info msdu_desc_info;
  1431. enum hal_reo_error_status error;
  1432. uint32_t peer_mdata;
  1433. uint8_t *rx_tlv_hdr;
  1434. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1435. uint8_t mac_id = 0;
  1436. struct dp_pdev *pdev;
  1437. struct dp_pdev *rx_pdev;
  1438. struct dp_srng *dp_rxdma_srng;
  1439. struct rx_desc_pool *rx_desc_pool;
  1440. struct dp_soc *soc = int_ctx->soc;
  1441. uint8_t ring_id = 0;
  1442. uint8_t core_id = 0;
  1443. struct cdp_tid_rx_stats *tid_stats;
  1444. qdf_nbuf_t nbuf_head;
  1445. qdf_nbuf_t nbuf_tail;
  1446. qdf_nbuf_t deliver_list_head;
  1447. qdf_nbuf_t deliver_list_tail;
  1448. uint32_t num_rx_bufs_reaped = 0;
  1449. uint32_t intr_id;
  1450. struct hif_opaque_softc *scn;
  1451. int32_t tid = 0;
  1452. bool is_prev_msdu_last = true;
  1453. uint32_t num_entries_avail = 0;
  1454. DP_HIST_INIT();
  1455. qdf_assert_always(soc && hal_ring_hdl);
  1456. hal_soc = soc->hal_soc;
  1457. qdf_assert_always(hal_soc);
  1458. scn = soc->hif_handle;
  1459. hif_pm_runtime_mark_last_busy(scn);
  1460. intr_id = int_ctx->dp_intr_id;
  1461. more_data:
  1462. /* reset local variables here to be re-used in the function */
  1463. nbuf_head = NULL;
  1464. nbuf_tail = NULL;
  1465. deliver_list_head = NULL;
  1466. deliver_list_tail = NULL;
  1467. peer = NULL;
  1468. vdev = NULL;
  1469. num_rx_bufs_reaped = 0;
  1470. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1471. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1472. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1473. qdf_mem_zero(head, sizeof(head));
  1474. qdf_mem_zero(tail, sizeof(tail));
  1475. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1476. /*
  1477. * Need API to convert from hal_ring pointer to
  1478. * Ring Type / Ring Id combo
  1479. */
  1480. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1481. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1482. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1483. goto done;
  1484. }
  1485. /*
  1486. * start reaping the buffers from reo ring and queue
  1487. * them in per vdev queue.
  1488. * Process the received pkts in a different per vdev loop.
  1489. */
  1490. while (qdf_likely(quota &&
  1491. (ring_desc = hal_srng_dst_peek(hal_soc,
  1492. hal_ring_hdl)))) {
  1493. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1494. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1495. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1496. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1497. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1498. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1499. /* Don't know how to deal with this -- assert */
  1500. qdf_assert(0);
  1501. }
  1502. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1503. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1504. qdf_assert(rx_desc);
  1505. /*
  1506. * this is a unlikely scenario where the host is reaping
  1507. * a descriptor which it already reaped just a while ago
  1508. * but is yet to replenish it back to HW.
  1509. * In this case host will dump the last 128 descriptors
  1510. * including the software descriptor rx_desc and assert.
  1511. */
  1512. if (qdf_unlikely(!rx_desc->in_use)) {
  1513. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1514. dp_info_rl("Reaping rx_desc not in use!");
  1515. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1516. ring_desc, rx_desc);
  1517. /* ignore duplicate RX desc and continue to process */
  1518. /* Pop out the descriptor */
  1519. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1520. continue;
  1521. }
  1522. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1523. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1524. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1525. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1526. ring_desc, rx_desc);
  1527. }
  1528. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1529. /* TODO */
  1530. /*
  1531. * Need a separate API for unmapping based on
  1532. * phyiscal address
  1533. */
  1534. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1535. QDF_DMA_FROM_DEVICE);
  1536. rx_desc->unmapped = 1;
  1537. core_id = smp_processor_id();
  1538. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1539. /* Get MPDU DESC info */
  1540. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1541. /* Get MSDU DESC info */
  1542. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1543. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1544. HAL_MPDU_F_RAW_AMPDU)) {
  1545. /* previous msdu has end bit set, so current one is
  1546. * the new MPDU
  1547. */
  1548. if (is_prev_msdu_last) {
  1549. is_prev_msdu_last = false;
  1550. /* Get number of entries available in HW ring */
  1551. num_entries_avail =
  1552. hal_srng_dst_num_valid(hal_soc,
  1553. hal_ring_hdl, 1);
  1554. /* For new MPDU check if we can read complete
  1555. * MPDU by comparing the number of buffers
  1556. * available and number of buffers needed to
  1557. * reap this MPDU
  1558. */
  1559. if (((msdu_desc_info.msdu_len /
  1560. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1561. num_entries_avail)
  1562. break;
  1563. } else {
  1564. if (msdu_desc_info.msdu_flags &
  1565. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1566. is_prev_msdu_last = true;
  1567. }
  1568. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1569. }
  1570. /* Pop out the descriptor*/
  1571. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1572. rx_bufs_reaped[rx_desc->pool_id]++;
  1573. peer_mdata = mpdu_desc_info.peer_meta_data;
  1574. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1575. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1576. /*
  1577. * save msdu flags first, last and continuation msdu in
  1578. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1579. * length to nbuf->cb. This ensures the info required for
  1580. * per pkt processing is always in the same cache line.
  1581. * This helps in improving throughput for smaller pkt
  1582. * sizes.
  1583. */
  1584. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1585. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1586. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1587. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1588. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1589. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1590. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1591. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1592. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1593. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1594. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1595. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1596. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1597. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1598. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1599. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1600. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1601. /*
  1602. * if continuation bit is set then we have MSDU spread
  1603. * across multiple buffers, let us not decrement quota
  1604. * till we reap all buffers of that MSDU.
  1605. */
  1606. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1607. quota -= 1;
  1608. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1609. &tail[rx_desc->pool_id],
  1610. rx_desc);
  1611. num_rx_bufs_reaped++;
  1612. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1613. break;
  1614. }
  1615. done:
  1616. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1617. if (nbuf_tail)
  1618. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1619. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1620. /*
  1621. * continue with next mac_id if no pkts were reaped
  1622. * from that pool
  1623. */
  1624. if (!rx_bufs_reaped[mac_id])
  1625. continue;
  1626. pdev = soc->pdev_list[mac_id];
  1627. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1628. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1629. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1630. rx_desc_pool, rx_bufs_reaped[mac_id],
  1631. &head[mac_id], &tail[mac_id]);
  1632. }
  1633. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1634. /* Peer can be NULL is case of LFR */
  1635. if (qdf_likely(peer))
  1636. vdev = NULL;
  1637. /*
  1638. * BIG loop where each nbuf is dequeued from global queue,
  1639. * processed and queued back on a per vdev basis. These nbufs
  1640. * are sent to stack as and when we run out of nbufs
  1641. * or a new nbuf dequeued from global queue has a different
  1642. * vdev when compared to previous nbuf.
  1643. */
  1644. nbuf = nbuf_head;
  1645. while (nbuf) {
  1646. next = nbuf->next;
  1647. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1648. /* Get TID from struct cb->tid_val, save to tid */
  1649. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1650. tid = qdf_nbuf_get_tid_val(nbuf);
  1651. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1652. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1653. peer = dp_peer_find_by_id(soc, peer_id);
  1654. if (peer) {
  1655. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1656. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1657. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1658. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1659. QDF_NBUF_RX_PKT_DATA_TRACK;
  1660. }
  1661. rx_bufs_used++;
  1662. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1663. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1664. deliver_list_tail);
  1665. deliver_list_head = NULL;
  1666. deliver_list_tail = NULL;
  1667. }
  1668. if (qdf_likely(peer)) {
  1669. vdev = peer->vdev;
  1670. } else {
  1671. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1672. nbuf = next;
  1673. continue;
  1674. }
  1675. if (qdf_unlikely(!vdev)) {
  1676. qdf_nbuf_free(nbuf);
  1677. nbuf = next;
  1678. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1679. dp_peer_unref_del_find_by_id(peer);
  1680. continue;
  1681. }
  1682. rx_pdev = vdev->pdev;
  1683. DP_RX_TID_SAVE(nbuf, tid);
  1684. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1685. qdf_nbuf_set_timestamp(nbuf);
  1686. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1687. tid_stats =
  1688. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1689. /*
  1690. * Check if DMA completed -- msdu_done is the last bit
  1691. * to be written
  1692. */
  1693. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1694. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1695. dp_err("MSDU DONE failure");
  1696. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1697. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1698. QDF_TRACE_LEVEL_INFO);
  1699. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1700. qdf_nbuf_free(nbuf);
  1701. qdf_assert(0);
  1702. nbuf = next;
  1703. continue;
  1704. }
  1705. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1706. /*
  1707. * First IF condition:
  1708. * 802.11 Fragmented pkts are reinjected to REO
  1709. * HW block as SG pkts and for these pkts we only
  1710. * need to pull the RX TLVS header length.
  1711. * Second IF condition:
  1712. * The below condition happens when an MSDU is spread
  1713. * across multiple buffers. This can happen in two cases
  1714. * 1. The nbuf size is smaller then the received msdu.
  1715. * ex: we have set the nbuf size to 2048 during
  1716. * nbuf_alloc. but we received an msdu which is
  1717. * 2304 bytes in size then this msdu is spread
  1718. * across 2 nbufs.
  1719. *
  1720. * 2. AMSDUs when RAW mode is enabled.
  1721. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1722. * across 1st nbuf and 2nd nbuf and last MSDU is
  1723. * spread across 2nd nbuf and 3rd nbuf.
  1724. *
  1725. * for these scenarios let us create a skb frag_list and
  1726. * append these buffers till the last MSDU of the AMSDU
  1727. * Third condition:
  1728. * This is the most likely case, we receive 802.3 pkts
  1729. * decapsulated by HW, here we need to set the pkt length.
  1730. */
  1731. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1732. bool is_mcbc, is_sa_vld, is_da_vld;
  1733. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1734. is_sa_vld = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  1735. is_da_vld = hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr);
  1736. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1737. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1738. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1739. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1740. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1741. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1742. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1743. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1744. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1745. next = nbuf->next;
  1746. } else {
  1747. l2_hdr_offset =
  1748. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1749. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1750. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1751. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1752. qdf_nbuf_pull_head(nbuf,
  1753. RX_PKT_TLVS_LEN +
  1754. l2_hdr_offset);
  1755. }
  1756. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1757. QDF_TRACE(QDF_MODULE_ID_DP,
  1758. QDF_TRACE_LEVEL_ERROR,
  1759. FL("Policy Check Drop pkt"));
  1760. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1761. /* Drop & free packet */
  1762. qdf_nbuf_free(nbuf);
  1763. /* Statistics */
  1764. nbuf = next;
  1765. dp_peer_unref_del_find_by_id(peer);
  1766. continue;
  1767. }
  1768. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1769. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1770. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) ==
  1771. false))) {
  1772. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1773. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1774. qdf_nbuf_free(nbuf);
  1775. nbuf = next;
  1776. dp_peer_unref_del_find_by_id(peer);
  1777. continue;
  1778. }
  1779. if (soc->process_rx_status)
  1780. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1781. /* Update the protocol tag in SKB based on CCE metadata */
  1782. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1783. reo_ring_num, false, true);
  1784. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1785. ring_id, tid_stats);
  1786. if (qdf_unlikely(vdev->mesh_vdev)) {
  1787. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1788. == QDF_STATUS_SUCCESS) {
  1789. QDF_TRACE(QDF_MODULE_ID_DP,
  1790. QDF_TRACE_LEVEL_INFO_MED,
  1791. FL("mesh pkt filtered"));
  1792. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1793. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1794. 1);
  1795. qdf_nbuf_free(nbuf);
  1796. nbuf = next;
  1797. dp_peer_unref_del_find_by_id(peer);
  1798. continue;
  1799. }
  1800. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1801. }
  1802. if (qdf_likely(vdev->rx_decap_type ==
  1803. htt_cmn_pkt_type_ethernet) &&
  1804. qdf_likely(!vdev->mesh_vdev)) {
  1805. /* WDS Destination Address Learning */
  1806. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1807. /* Due to HW issue, sometimes we see that the sa_idx
  1808. * and da_idx are invalid with sa_valid and da_valid
  1809. * bits set
  1810. *
  1811. * in this case we also see that value of
  1812. * sa_sw_peer_id is set as 0
  1813. *
  1814. * Drop the packet if sa_idx and da_idx OOB or
  1815. * sa_sw_peerid is 0
  1816. */
  1817. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1818. qdf_nbuf_free(nbuf);
  1819. nbuf = next;
  1820. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1821. dp_peer_unref_del_find_by_id(peer);
  1822. continue;
  1823. }
  1824. /* WDS Source Port Learning */
  1825. if (qdf_likely(vdev->wds_enabled))
  1826. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1827. peer, nbuf);
  1828. /* Intrabss-fwd */
  1829. if (dp_rx_check_ap_bridge(vdev))
  1830. if (dp_rx_intrabss_fwd(soc,
  1831. peer,
  1832. rx_tlv_hdr,
  1833. nbuf)) {
  1834. nbuf = next;
  1835. dp_peer_unref_del_find_by_id(peer);
  1836. tid_stats->intrabss_cnt++;
  1837. continue; /* Get next desc */
  1838. }
  1839. }
  1840. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1841. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1842. DP_RX_LIST_APPEND(deliver_list_head,
  1843. deliver_list_tail,
  1844. nbuf);
  1845. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1846. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1847. tid_stats->delivered_to_stack++;
  1848. nbuf = next;
  1849. dp_peer_unref_del_find_by_id(peer);
  1850. }
  1851. if (deliver_list_head && peer)
  1852. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1853. deliver_list_tail);
  1854. if (dp_rx_enable_eol_data_check(soc)) {
  1855. if (quota &&
  1856. hal_srng_dst_peek_sync_locked(soc, hal_ring_hdl)) {
  1857. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1858. if (!hif_exec_should_yield(scn, intr_id))
  1859. goto more_data;
  1860. }
  1861. }
  1862. /* Update histogram statistics by looping through pdev's */
  1863. DP_RX_HIST_STATS_PER_PDEV();
  1864. return rx_bufs_used; /* Assume no scale factor for now */
  1865. }
  1866. /**
  1867. * dp_rx_detach() - detach dp rx
  1868. * @pdev: core txrx pdev context
  1869. *
  1870. * This function will detach DP RX into main device context
  1871. * will free DP Rx resources.
  1872. *
  1873. * Return: void
  1874. */
  1875. void
  1876. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1877. {
  1878. uint8_t pdev_id = pdev->pdev_id;
  1879. struct dp_soc *soc = pdev->soc;
  1880. struct rx_desc_pool *rx_desc_pool;
  1881. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1882. if (rx_desc_pool->pool_size != 0) {
  1883. if (!dp_is_soc_reinit(soc))
  1884. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  1885. rx_desc_pool);
  1886. else
  1887. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1888. }
  1889. return;
  1890. }
  1891. static QDF_STATUS
  1892. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  1893. struct dp_pdev *dp_pdev)
  1894. {
  1895. qdf_dma_addr_t paddr;
  1896. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1897. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1898. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  1899. FALSE);
  1900. if (!(*nbuf)) {
  1901. dp_err("nbuf alloc failed");
  1902. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1903. return ret;
  1904. }
  1905. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  1906. QDF_DMA_FROM_DEVICE);
  1907. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1908. qdf_nbuf_free(*nbuf);
  1909. dp_err("nbuf map failed");
  1910. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1911. return ret;
  1912. }
  1913. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  1914. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  1915. if (ret == QDF_STATUS_E_FAILURE) {
  1916. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  1917. QDF_DMA_FROM_DEVICE);
  1918. qdf_nbuf_free(*nbuf);
  1919. dp_err("nbuf check x86 failed");
  1920. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1921. return ret;
  1922. }
  1923. return QDF_STATUS_SUCCESS;
  1924. }
  1925. QDF_STATUS
  1926. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1927. struct dp_srng *dp_rxdma_srng,
  1928. struct rx_desc_pool *rx_desc_pool,
  1929. uint32_t num_req_buffers)
  1930. {
  1931. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1932. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  1933. union dp_rx_desc_list_elem_t *next;
  1934. void *rxdma_ring_entry;
  1935. qdf_dma_addr_t paddr;
  1936. qdf_nbuf_t *rx_nbuf_arr;
  1937. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  1938. uint32_t buffer_index, nbuf_ptrs_per_page;
  1939. qdf_nbuf_t nbuf;
  1940. QDF_STATUS ret;
  1941. int page_idx, total_pages;
  1942. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1943. union dp_rx_desc_list_elem_t *tail = NULL;
  1944. if (qdf_unlikely(!rxdma_srng)) {
  1945. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1946. return QDF_STATUS_E_FAILURE;
  1947. }
  1948. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  1949. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1950. num_req_buffers, &desc_list, &tail);
  1951. if (!nr_descs) {
  1952. dp_err("no free rx_descs in freelist");
  1953. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1954. return QDF_STATUS_E_NOMEM;
  1955. }
  1956. dp_debug("got %u RX descs for driver attach", nr_descs);
  1957. /*
  1958. * Try to allocate pointers to the nbuf one page at a time.
  1959. * Take pointers that can fit in one page of memory and
  1960. * iterate through the total descriptors that need to be
  1961. * allocated in order of pages. Reuse the pointers that
  1962. * have been allocated to fit in one page across each
  1963. * iteration to index into the nbuf.
  1964. */
  1965. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  1966. /*
  1967. * Add an extra page to store the remainder if any
  1968. */
  1969. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  1970. total_pages++;
  1971. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  1972. if (!rx_nbuf_arr) {
  1973. dp_err("failed to allocate nbuf array");
  1974. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1975. QDF_BUG(0);
  1976. return QDF_STATUS_E_NOMEM;
  1977. }
  1978. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  1979. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  1980. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  1981. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  1982. /*
  1983. * The last page of buffer pointers may not be required
  1984. * completely based on the number of descriptors. Below
  1985. * check will ensure we are allocating only the
  1986. * required number of descriptors.
  1987. */
  1988. if (nr_nbuf_total >= nr_descs)
  1989. break;
  1990. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  1991. &rx_nbuf_arr[nr_nbuf],
  1992. dp_pdev);
  1993. if (QDF_IS_STATUS_ERROR(ret))
  1994. break;
  1995. nr_nbuf_total++;
  1996. }
  1997. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1998. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  1999. rxdma_ring_entry =
  2000. hal_srng_src_get_next(dp_soc->hal_soc,
  2001. rxdma_srng);
  2002. qdf_assert_always(rxdma_ring_entry);
  2003. next = desc_list->next;
  2004. nbuf = rx_nbuf_arr[buffer_index];
  2005. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2006. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2007. desc_list->rx_desc.in_use = 1;
  2008. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2009. desc_list->rx_desc.cookie,
  2010. rx_desc_pool->owner);
  2011. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2012. desc_list = next;
  2013. }
  2014. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2015. }
  2016. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2017. qdf_mem_free(rx_nbuf_arr);
  2018. if (!nr_nbuf_total) {
  2019. dp_err("No nbuf's allocated");
  2020. QDF_BUG(0);
  2021. return QDF_STATUS_E_RESOURCES;
  2022. }
  2023. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  2024. RX_BUFFER_SIZE * nr_nbuf_total);
  2025. return QDF_STATUS_SUCCESS;
  2026. }
  2027. /**
  2028. * dp_rx_attach() - attach DP RX
  2029. * @pdev: core txrx pdev context
  2030. *
  2031. * This function will attach a DP RX instance into the main
  2032. * device (SOC) context. Will allocate dp rx resource and
  2033. * initialize resources.
  2034. *
  2035. * Return: QDF_STATUS_SUCCESS: success
  2036. * QDF_STATUS_E_RESOURCES: Error return
  2037. */
  2038. QDF_STATUS
  2039. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2040. {
  2041. uint8_t pdev_id = pdev->pdev_id;
  2042. struct dp_soc *soc = pdev->soc;
  2043. uint32_t rxdma_entries;
  2044. struct dp_srng *dp_rxdma_srng;
  2045. struct rx_desc_pool *rx_desc_pool;
  2046. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2047. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2048. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2049. return QDF_STATUS_SUCCESS;
  2050. }
  2051. pdev = soc->pdev_list[pdev_id];
  2052. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2053. rxdma_entries = dp_rxdma_srng->num_entries;
  2054. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2055. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2056. dp_rx_desc_pool_alloc(soc, pdev_id,
  2057. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  2058. rx_desc_pool);
  2059. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2060. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2061. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2062. rx_desc_pool, rxdma_entries - 1);
  2063. }
  2064. /*
  2065. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2066. * @soc: core txrx main context
  2067. * @pdev: core txrx pdev context
  2068. *
  2069. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2070. * until retry times reaches max threshold or succeeded.
  2071. *
  2072. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2073. */
  2074. qdf_nbuf_t
  2075. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2076. {
  2077. uint8_t *buf;
  2078. int32_t nbuf_retry_count;
  2079. QDF_STATUS ret;
  2080. qdf_nbuf_t nbuf = NULL;
  2081. for (nbuf_retry_count = 0; nbuf_retry_count <
  2082. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2083. nbuf_retry_count++) {
  2084. /* Allocate a new skb */
  2085. nbuf = qdf_nbuf_alloc(soc->osdev,
  2086. RX_BUFFER_SIZE,
  2087. RX_BUFFER_RESERVATION,
  2088. RX_BUFFER_ALIGNMENT,
  2089. FALSE);
  2090. if (!nbuf) {
  2091. DP_STATS_INC(pdev,
  2092. replenish.nbuf_alloc_fail, 1);
  2093. continue;
  2094. }
  2095. buf = qdf_nbuf_data(nbuf);
  2096. memset(buf, 0, RX_BUFFER_SIZE);
  2097. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2098. QDF_DMA_FROM_DEVICE);
  2099. /* nbuf map failed */
  2100. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2101. qdf_nbuf_free(nbuf);
  2102. DP_STATS_INC(pdev, replenish.map_err, 1);
  2103. continue;
  2104. }
  2105. /* qdf_nbuf alloc and map succeeded */
  2106. break;
  2107. }
  2108. /* qdf_nbuf still alloc or map failed */
  2109. if (qdf_unlikely(nbuf_retry_count >=
  2110. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2111. return NULL;
  2112. return nbuf;
  2113. }