hal_rh_generic_api.c 26 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_rh_api.h"
  20. #include "hal_rx.h"
  21. #include "hal_rh_rx.h"
  22. #include "hal_tx.h"
  23. #include <hal_api_mon.h>
  24. static uint32_t hal_get_reo_qdesc_size_rh(uint32_t ba_window_size,
  25. int tid)
  26. {
  27. return 0;
  28. }
  29. static uint16_t hal_get_rx_max_ba_window_rh(int tid)
  30. {
  31. return 0;
  32. }
  33. static void hal_set_link_desc_addr_rh(void *desc, uint32_t cookie,
  34. qdf_dma_addr_t link_desc_paddr,
  35. uint8_t bm_id)
  36. {
  37. uint32_t *buf_addr = (uint32_t *)desc;
  38. HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_0, BUFFER_ADDR_31_0,
  39. link_desc_paddr & 0xffffffff);
  40. HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, BUFFER_ADDR_39_32,
  41. (uint64_t)link_desc_paddr >> 32);
  42. HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, RETURN_BUFFER_MANAGER,
  43. bm_id);
  44. HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, SW_BUFFER_COOKIE,
  45. cookie);
  46. }
  47. static void hal_tx_init_data_ring_rh(hal_soc_handle_t hal_soc_hdl,
  48. hal_ring_handle_t hal_ring_hdl)
  49. {
  50. }
  51. static void hal_get_ba_aging_timeout_rh(hal_soc_handle_t hal_soc_hdl,
  52. uint8_t ac, uint32_t *value)
  53. {
  54. }
  55. static void hal_set_ba_aging_timeout_rh(hal_soc_handle_t hal_soc_hdl,
  56. uint8_t ac, uint32_t value)
  57. {
  58. }
  59. static uint32_t hal_get_reo_reg_base_offset_rh(void)
  60. {
  61. return 0;
  62. }
  63. static void hal_rx_reo_buf_paddr_get_rh(hal_ring_desc_t rx_desc,
  64. struct hal_buf_info *buf_info)
  65. {
  66. }
  67. static void
  68. hal_rx_msdu_link_desc_set_rh(hal_soc_handle_t hal_soc_hdl,
  69. void *src_srng_desc,
  70. hal_buff_addrinfo_t buf_addr_info,
  71. uint8_t bm_action)
  72. {
  73. }
  74. static uint8_t hal_rx_ret_buf_manager_get_rh(hal_ring_desc_t ring_desc)
  75. {
  76. return HAL_RX_BUF_RBM_GET(ring_desc);
  77. }
  78. static
  79. void hal_rx_buf_cookie_rbm_get_rh(uint32_t *buf_addr_info_hdl,
  80. hal_buf_info_t buf_info_hdl)
  81. {
  82. struct hal_buf_info *buf_info =
  83. (struct hal_buf_info *)buf_info_hdl;
  84. struct buffer_addr_info *buf_addr_info =
  85. (struct buffer_addr_info *)buf_addr_info_hdl;
  86. buf_info->sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info);
  87. /*
  88. * buffer addr info is the first member of ring desc, so the typecast
  89. * can be done.
  90. */
  91. buf_info->rbm =
  92. hal_rx_ret_buf_manager_get_rh((hal_ring_desc_t)buf_addr_info);
  93. }
  94. static uint32_t hal_rx_get_reo_error_code_rh(hal_ring_desc_t rx_desc)
  95. {
  96. return 0;
  97. }
  98. static uint32_t
  99. hal_gen_reo_remap_val_generic_rh(enum hal_reo_remap_reg remap_reg,
  100. uint8_t *ix0_map)
  101. {
  102. return 0;
  103. }
  104. static void hal_rx_mpdu_desc_info_get_rh(void *desc_addr,
  105. void *mpdu_desc_info_hdl)
  106. {
  107. }
  108. static uint8_t hal_rx_err_status_get_rh(hal_ring_desc_t rx_desc)
  109. {
  110. return 0;
  111. }
  112. static uint8_t hal_rx_reo_buf_type_get_rh(hal_ring_desc_t rx_desc)
  113. {
  114. return 0;
  115. }
  116. static uint32_t hal_rx_wbm_err_src_get_rh(hal_ring_desc_t ring_desc)
  117. {
  118. return 0;
  119. }
  120. static void
  121. hal_rx_wbm_rel_buf_paddr_get_rh(hal_ring_desc_t rx_desc,
  122. struct hal_buf_info *buf_info)
  123. {
  124. }
  125. static int hal_reo_send_cmd_rh(hal_soc_handle_t hal_soc_hdl,
  126. hal_ring_handle_t hal_ring_hdl,
  127. enum hal_reo_cmd_type cmd,
  128. void *params)
  129. {
  130. return 0;
  131. }
  132. static void
  133. hal_reo_qdesc_setup_rh(hal_soc_handle_t hal_soc_hdl, int tid,
  134. uint32_t ba_window_size,
  135. uint32_t start_seq, void *hw_qdesc_vaddr,
  136. qdf_dma_addr_t hw_qdesc_paddr,
  137. int pn_type, uint8_t vdev_stats_id)
  138. {
  139. }
  140. static inline uint32_t
  141. hal_rx_msdu_reo_dst_ind_get_rh(hal_soc_handle_t hal_soc_hdl,
  142. void *msdu_link_desc)
  143. {
  144. return 0;
  145. }
  146. static inline void
  147. hal_msdu_desc_info_set_rh(hal_soc_handle_t hal_soc_hdl,
  148. void *msdu_desc, uint32_t dst_ind,
  149. uint32_t nbuf_len)
  150. {
  151. }
  152. static inline void
  153. hal_mpdu_desc_info_set_rh(hal_soc_handle_t hal_soc_hdl, void *ent_desc,
  154. void *mpdu_desc, uint32_t seq_no)
  155. {
  156. }
  157. static QDF_STATUS hal_reo_status_update_rh(hal_soc_handle_t hal_soc_hdl,
  158. hal_ring_desc_t reo_desc,
  159. void *st_handle,
  160. uint32_t tlv, int *num_ref)
  161. {
  162. return QDF_STATUS_SUCCESS;
  163. }
  164. static uint8_t hal_get_tlv_hdr_size_rh(void)
  165. {
  166. return sizeof(struct tlv_32_hdr);
  167. }
  168. static inline
  169. uint8_t *hal_get_reo_ent_desc_qdesc_addr_rh(uint8_t *desc)
  170. {
  171. return 0;
  172. }
  173. static inline
  174. void hal_set_reo_ent_desc_reo_dest_ind_rh(uint8_t *desc,
  175. uint32_t dst_ind)
  176. {
  177. }
  178. static uint64_t hal_rx_get_qdesc_addr_rh(uint8_t *dst_ring_desc,
  179. uint8_t *buf)
  180. {
  181. return 0;
  182. }
  183. static uint8_t hal_get_idle_link_bm_id_rh(uint8_t chip_id)
  184. {
  185. return 0;
  186. }
  187. /*
  188. * hal_rx_msdu_is_wlan_mcast_generic_rh(): Check if the buffer is for multicast
  189. * address
  190. * @nbuf: Network buffer
  191. *
  192. * Returns: flag to indicate whether the nbuf has MC/BC address
  193. */
  194. static uint32_t hal_rx_msdu_is_wlan_mcast_generic_rh(qdf_nbuf_t nbuf)
  195. {
  196. uint8_t *buf = qdf_nbuf_data(nbuf);
  197. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  198. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  199. return rx_attn->mcast_bcast;
  200. }
  201. /**
  202. * hal_rx_tlv_decap_format_get_rh() - Get packet decap format from the TLV
  203. * @hw_desc_addr: rx tlv desc
  204. *
  205. * Return: pkt decap format
  206. */
  207. static uint32_t hal_rx_tlv_decap_format_get_rh(void *hw_desc_addr)
  208. {
  209. struct rx_msdu_start *rx_msdu_start;
  210. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
  211. rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
  212. return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT);
  213. }
  214. /**
  215. * hal_rx_dump_pkt_tlvs_rh(): API to print all member elements of
  216. * RX TLVs
  217. * @hal_soc_hdl: HAL SOC handle
  218. * @buf: pointer the pkt buffer
  219. * @dbg_level: log level
  220. *
  221. * Return: void
  222. */
  223. static void hal_rx_dump_pkt_tlvs_rh(hal_soc_handle_t hal_soc_hdl,
  224. uint8_t *buf, uint8_t dbg_level)
  225. {
  226. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  227. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  228. hal_rx_dump_msdu_end_tlv(hal_soc, pkt_tlvs, dbg_level);
  229. hal_rx_dump_rx_attention_tlv(hal_soc, pkt_tlvs, dbg_level);
  230. hal_rx_dump_msdu_start_tlv(hal_soc, pkt_tlvs, dbg_level);
  231. hal_rx_dump_mpdu_start_tlv(hal_soc, pkt_tlvs, dbg_level);
  232. hal_rx_dump_mpdu_end_tlv(hal_soc, pkt_tlvs, dbg_level);
  233. hal_rx_dump_pkt_hdr_tlv(hal_soc, pkt_tlvs, dbg_level);
  234. }
  235. /**
  236. * hal_rx_tlv_get_offload_info_rh() - Get the offload info from TLV
  237. * @rx_tlv: RX tlv start address in buffer
  238. * @offload_info: Buffer to store the offload info
  239. *
  240. * Return: 0 on success, -EINVAL on failure.
  241. */
  242. static int
  243. hal_rx_tlv_get_offload_info_rh(uint8_t *rx_tlv,
  244. struct hal_offload_info *offload_info)
  245. {
  246. offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  247. offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_tlv);
  248. offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  249. offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  250. if (offload_info->tcp_proto) {
  251. offload_info->tcp_pure_ack =
  252. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  253. offload_info->tcp_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  254. offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  255. offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  256. offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  257. }
  258. return 0;
  259. }
  260. /*
  261. * hal_rx_attn_phy_ppdu_id_get_rh(): get phy_ppdu_id value
  262. * from rx attention
  263. * @buf: pointer to rx_pkt_tlvs
  264. *
  265. * Return: phy_ppdu_id
  266. */
  267. static uint16_t hal_rx_attn_phy_ppdu_id_get_rh(uint8_t *buf)
  268. {
  269. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  270. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  271. uint16_t phy_ppdu_id;
  272. phy_ppdu_id = HAL_RX_ATTN_PHY_PPDU_ID_GET(rx_attn);
  273. return phy_ppdu_id;
  274. }
  275. /**
  276. * hal_rx_msdu_start_msdu_len_get_rh(): API to get the MSDU length
  277. * from rx_msdu_start TLV
  278. *
  279. * @buf: pointer to the start of RX PKT TLV headers
  280. *
  281. * Return: msdu length
  282. */
  283. static uint32_t hal_rx_msdu_start_msdu_len_get_rh(uint8_t *buf)
  284. {
  285. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  286. struct rx_msdu_start *msdu_start =
  287. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  288. uint32_t msdu_len;
  289. msdu_len = HAL_RX_MSDU_START_MSDU_LEN_GET(msdu_start);
  290. return msdu_len;
  291. }
  292. /**
  293. * hal_rx_get_proto_params_rh() - Get l4 proto values from TLV
  294. * @buf: rx tlv address
  295. * @proto_params: Buffer to store proto parameters
  296. *
  297. * Return: 0 on success.
  298. */
  299. static int hal_rx_get_proto_params_rh(uint8_t *buf, void *proto_params)
  300. {
  301. struct hal_proto_params *param =
  302. (struct hal_proto_params *)proto_params;
  303. param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(buf);
  304. param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(buf);
  305. param->ipv6_proto = HAL_RX_TLV_GET_IPV6(buf);
  306. return 0;
  307. }
  308. /**
  309. * hal_rx_get_l3_l4_offsets_rh() - Get l3/l4 header offset from TLV
  310. * @buf: rx tlv start address
  311. * @l3_hdr_offset: buffer to store l3 offset
  312. * @l4_hdr_offset: buffer to store l4 offset
  313. *
  314. * Return: 0 on success.
  315. */
  316. static int hal_rx_get_l3_l4_offsets_rh(uint8_t *buf, uint32_t *l3_hdr_offset,
  317. uint32_t *l4_hdr_offset)
  318. {
  319. *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(buf);
  320. *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(buf);
  321. return 0;
  322. }
  323. /**
  324. * hal_rx_tlv_get_pn_num_rh() - Get packet number from RX TLV
  325. * @buf: rx tlv address
  326. * @pn_num: buffer to store packet number
  327. *
  328. * Return: None
  329. */
  330. static inline void hal_rx_tlv_get_pn_num_rh(uint8_t *buf, uint64_t *pn_num)
  331. {
  332. struct rx_pkt_tlvs *rx_pkt_tlv =
  333. (struct rx_pkt_tlvs *)buf;
  334. struct rx_mpdu_info *rx_mpdu_info_details =
  335. &rx_pkt_tlv->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details;
  336. pn_num[0] = rx_mpdu_info_details->pn_31_0;
  337. pn_num[0] |=
  338. ((uint64_t)rx_mpdu_info_details->pn_63_32 << 32);
  339. pn_num[1] = rx_mpdu_info_details->pn_95_64;
  340. pn_num[1] |=
  341. ((uint64_t)rx_mpdu_info_details->pn_127_96 << 32);
  342. }
  343. #ifdef NO_RX_PKT_HDR_TLV
  344. /**
  345. * hal_rx_pkt_hdr_get_rh() - Get rx packet header start address.
  346. * @buf: packet start address
  347. *
  348. * Return: packet data start address.
  349. */
  350. static inline uint8_t *hal_rx_pkt_hdr_get_rh(uint8_t *buf)
  351. {
  352. return buf + RX_PKT_TLVS_LEN;
  353. }
  354. #else
  355. static inline uint8_t *hal_rx_pkt_hdr_get_rh(uint8_t *buf)
  356. {
  357. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  358. return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr;
  359. }
  360. #endif
  361. /**
  362. * hal_rx_priv_info_set_in_tlv_rh(): Save the private info to
  363. * the reserved bytes of rx_tlv_hdr
  364. * @buf: start of rx_tlv_hdr
  365. * @priv_data: hal_wbm_err_desc_info structure
  366. * @len: length of the private data
  367. * Return: void
  368. */
  369. static inline void
  370. hal_rx_priv_info_set_in_tlv_rh(uint8_t *buf, uint8_t *priv_data,
  371. uint32_t len)
  372. {
  373. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  374. uint32_t copy_len = (len > RX_PADDING0_BYTES) ?
  375. RX_PADDING0_BYTES : len;
  376. qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len);
  377. }
  378. /**
  379. * hal_rx_priv_info_get_from_tlv_rh(): retrieve the private data from
  380. * the reserved bytes of rx_tlv_hdr.
  381. * @buf: start of rx_tlv_hdr
  382. * @priv_data: hal_wbm_err_desc_info structure
  383. * @len: length of the private data
  384. * Return: void
  385. */
  386. static inline void
  387. hal_rx_priv_info_get_from_tlv_rh(uint8_t *buf, uint8_t *priv_data,
  388. uint32_t len)
  389. {
  390. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  391. uint32_t copy_len = (len > RX_PADDING0_BYTES) ?
  392. RX_PADDING0_BYTES : len;
  393. qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len);
  394. }
  395. /**
  396. * hal_rx_get_tlv_size_generic_rh() - Get rx packet tlv size
  397. * @rx_pkt_tlv_size: TLV size for regular RX packets
  398. * @rx_mon_pkt_tlv_size: TLV size for monitor mode packets
  399. *
  400. * Return: size of rx pkt tlv before the actual data
  401. */
  402. static void hal_rx_get_tlv_size_generic_rh(uint16_t *rx_pkt_tlv_size,
  403. uint16_t *rx_mon_pkt_tlv_size)
  404. {
  405. *rx_pkt_tlv_size = RX_PKT_TLVS_LEN;
  406. *rx_mon_pkt_tlv_size = SIZE_OF_MONITOR_TLV;
  407. }
  408. /*
  409. * hal_rxdma_buff_addr_info_set() - set the buffer_addr_info of the
  410. * rxdma ring entry.
  411. * @rxdma_entry: descriptor entry
  412. * @paddr: physical address of nbuf data pointer.
  413. * @cookie: SW cookie used as a index to SW rx desc.
  414. * @manager: who owns the nbuf (host, NSS, etc...).
  415. *
  416. */
  417. static void
  418. hal_rxdma_buff_addr_info_set_rh(void *rxdma_entry, qdf_dma_addr_t paddr,
  419. uint32_t cookie, uint8_t manager)
  420. {
  421. uint32_t paddr_lo = ((u64)paddr & 0x00000000ffffffff);
  422. uint32_t paddr_hi = ((u64)paddr & 0xffffffff00000000) >> 32;
  423. HAL_RXDMA_PADDR_LO_SET(rxdma_entry, paddr_lo);
  424. HAL_RXDMA_PADDR_HI_SET(rxdma_entry, paddr_hi);
  425. HAL_RXDMA_COOKIE_SET(rxdma_entry, cookie);
  426. HAL_RXDMA_MANAGER_SET(rxdma_entry, manager);
  427. }
  428. /**
  429. * hal_rx_tlv_csum_err_get_rh() - Get IP and tcp-udp checksum fail flag
  430. * @rx_tlv_hdr: start address of rx_tlv_hdr
  431. * @ip_csum_err: buffer to return ip_csum_fail flag
  432. * @tcp_udp_csum_err: placeholder to return tcp-udp checksum fail flag
  433. *
  434. * Return: None
  435. */
  436. static inline void
  437. hal_rx_tlv_csum_err_get_rh(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err,
  438. uint32_t *tcp_udp_csum_err)
  439. {
  440. *ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  441. *tcp_udp_csum_err = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  442. }
  443. static void
  444. hal_rx_tlv_get_pkt_capture_flags_rh(uint8_t *rx_tlv_pkt_hdr,
  445. struct hal_rx_pkt_capture_flags *flags)
  446. {
  447. struct rx_pkt_tlvs *rx_tlv_hdr = (struct rx_pkt_tlvs *)rx_tlv_pkt_hdr;
  448. struct rx_attention *rx_attn = &rx_tlv_hdr->attn_tlv.rx_attn;
  449. struct rx_mpdu_start *mpdu_start =
  450. &rx_tlv_hdr->mpdu_start_tlv.rx_mpdu_start;
  451. struct rx_mpdu_end *mpdu_end = &rx_tlv_hdr->mpdu_end_tlv.rx_mpdu_end;
  452. struct rx_msdu_start *msdu_start =
  453. &rx_tlv_hdr->msdu_start_tlv.rx_msdu_start;
  454. flags->encrypt_type = mpdu_start->rx_mpdu_info_details.encrypt_type;
  455. flags->fcs_err = mpdu_end->fcs_err;
  456. flags->fragment_flag = rx_attn->fragment_flag;
  457. flags->chan_freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start);
  458. flags->rssi_comb = HAL_RX_MSDU_START_RSSI_GET(msdu_start);
  459. flags->tsft = msdu_start->ppdu_start_timestamp;
  460. }
  461. static inline bool
  462. hal_rx_mpdu_info_ampdu_flag_get_rh(uint8_t *buf)
  463. {
  464. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  465. struct rx_mpdu_start *mpdu_start =
  466. &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
  467. struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
  468. bool ampdu_flag;
  469. ampdu_flag = HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(mpdu_info);
  470. return ampdu_flag;
  471. }
  472. static
  473. uint32_t hal_rx_tlv_mpdu_len_err_get_rh(void *hw_desc_addr)
  474. {
  475. struct rx_attention *rx_attn;
  476. struct rx_mon_pkt_tlvs *rx_desc =
  477. (struct rx_mon_pkt_tlvs *)hw_desc_addr;
  478. rx_attn = &rx_desc->attn_tlv.rx_attn;
  479. return HAL_RX_GET(rx_attn, RX_ATTENTION_1, MPDU_LENGTH_ERR);
  480. }
  481. static
  482. uint32_t hal_rx_tlv_mpdu_fcs_err_get_rh(void *hw_desc_addr)
  483. {
  484. struct rx_attention *rx_attn;
  485. struct rx_mon_pkt_tlvs *rx_desc =
  486. (struct rx_mon_pkt_tlvs *)hw_desc_addr;
  487. rx_attn = &rx_desc->attn_tlv.rx_attn;
  488. return HAL_RX_GET(rx_attn, RX_ATTENTION_1, FCS_ERR);
  489. }
  490. #ifdef NO_RX_PKT_HDR_TLV
  491. static uint8_t *hal_rx_desc_get_80211_hdr_rh(void *hw_desc_addr)
  492. {
  493. uint8_t *rx_pkt_hdr;
  494. struct rx_mon_pkt_tlvs *rx_desc =
  495. (struct rx_mon_pkt_tlvs *)hw_desc_addr;
  496. rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0];
  497. return rx_pkt_hdr;
  498. }
  499. #else
  500. static uint8_t *hal_rx_desc_get_80211_hdr_rh(void *hw_desc_addr)
  501. {
  502. uint8_t *rx_pkt_hdr;
  503. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
  504. rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0];
  505. return rx_pkt_hdr;
  506. }
  507. #endif
  508. static uint32_t hal_rx_hw_desc_mpdu_user_id_rh(void *hw_desc_addr)
  509. {
  510. struct rx_mon_pkt_tlvs *rx_desc =
  511. (struct rx_mon_pkt_tlvs *)hw_desc_addr;
  512. uint32_t user_id;
  513. user_id = HAL_RX_GET_USER_TLV32_USERID(
  514. &rx_desc->mpdu_start_tlv);
  515. return user_id;
  516. }
  517. /**
  518. * hal_rx_msdu_start_msdu_len_set_rh(): API to set the MSDU length
  519. * from rx_msdu_start TLV
  520. *
  521. * @buf: pointer to the start of RX PKT TLV headers
  522. * @len: msdu length
  523. *
  524. * Return: none
  525. */
  526. static inline void
  527. hal_rx_msdu_start_msdu_len_set_rh(uint8_t *buf, uint32_t len)
  528. {
  529. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  530. struct rx_msdu_start *msdu_start =
  531. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  532. void *wrd1;
  533. wrd1 = (uint8_t *)msdu_start + RX_MSDU_START_1_MSDU_LENGTH_OFFSET;
  534. *(uint32_t *)wrd1 &= (~RX_MSDU_START_1_MSDU_LENGTH_MASK);
  535. *(uint32_t *)wrd1 |= len;
  536. }
  537. /*
  538. * hal_rx_tlv_bw_get_rh(): API to get the Bandwidth
  539. * Interval from rx_msdu_start
  540. *
  541. * @buf: pointer to the start of RX PKT TLV header
  542. * Return: uint32_t(bw)
  543. */
  544. static inline uint32_t hal_rx_tlv_bw_get_rh(uint8_t *buf)
  545. {
  546. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  547. struct rx_msdu_start *msdu_start =
  548. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  549. uint32_t bw;
  550. bw = HAL_RX_MSDU_START_BW_GET(msdu_start);
  551. return bw;
  552. }
  553. /*
  554. * hal_rx_tlv_get_freq_rh(): API to get the frequency of operating channel
  555. * from rx_msdu_start
  556. *
  557. * @buf: pointer to the start of RX PKT TLV header
  558. * Return: uint32_t(frequency)
  559. */
  560. static inline uint32_t
  561. hal_rx_tlv_get_freq_rh(uint8_t *buf)
  562. {
  563. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  564. struct rx_msdu_start *msdu_start =
  565. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  566. uint32_t freq;
  567. freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start);
  568. return freq;
  569. }
  570. /**
  571. * hal_rx_tlv_sgi_get_rh(): API to get the Short Guard
  572. * Interval from rx_msdu_start TLV
  573. *
  574. * @buf: pointer to the start of RX PKT TLV headers
  575. * Return: uint32_t(sgi)
  576. */
  577. static inline uint32_t
  578. hal_rx_tlv_sgi_get_rh(uint8_t *buf)
  579. {
  580. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  581. struct rx_msdu_start *msdu_start =
  582. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  583. uint32_t sgi;
  584. sgi = HAL_RX_MSDU_START_SGI_GET(msdu_start);
  585. return sgi;
  586. }
  587. /**
  588. * hal_rx_tlv_rate_mcs_get_rh(): API to get the MCS rate
  589. * from rx_msdu_start TLV
  590. *
  591. * @buf: pointer to the start of RX PKT TLV headers
  592. * Return: uint32_t(rate_mcs)
  593. */
  594. static inline uint32_t
  595. hal_rx_tlv_rate_mcs_get_rh(uint8_t *buf)
  596. {
  597. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  598. struct rx_msdu_start *msdu_start =
  599. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  600. uint32_t rate_mcs;
  601. rate_mcs = HAL_RX_MSDU_START_RATE_MCS_GET(msdu_start);
  602. return rate_mcs;
  603. }
  604. /*
  605. * hal_rx_tlv_get_pkt_type_rh(): API to get the pkt type
  606. * from rx_msdu_start
  607. *
  608. * @buf: pointer to the start of RX PKT TLV header
  609. * Return: uint32_t(pkt type)
  610. */
  611. static inline uint32_t hal_rx_tlv_get_pkt_type_rh(uint8_t *buf)
  612. {
  613. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  614. struct rx_msdu_start *msdu_start =
  615. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  616. uint32_t pkt_type;
  617. pkt_type = HAL_RX_MSDU_START_PKT_TYPE_GET(msdu_start);
  618. return pkt_type;
  619. }
  620. /**
  621. * hal_rx_tlv_mic_err_get_rh(): API to get the MIC ERR
  622. * from rx_mpdu_end TLV
  623. *
  624. * @buf: pointer to the start of RX PKT TLV headers
  625. * Return: uint32_t(mic_err)
  626. */
  627. static inline uint32_t
  628. hal_rx_tlv_mic_err_get_rh(uint8_t *buf)
  629. {
  630. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  631. struct rx_mpdu_end *mpdu_end =
  632. &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
  633. uint32_t mic_err;
  634. mic_err = HAL_RX_MPDU_END_MIC_ERR_GET(mpdu_end);
  635. return mic_err;
  636. }
  637. /**
  638. * hal_rx_tlv_decrypt_err_get_rh(): API to get the Decrypt ERR
  639. * from rx_mpdu_end TLV
  640. *
  641. * @buf: pointer to the start of RX PKT TLV headers
  642. * Return: uint32_t(decrypt_err)
  643. */
  644. static inline uint32_t
  645. hal_rx_tlv_decrypt_err_get_rh(uint8_t *buf)
  646. {
  647. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  648. struct rx_mpdu_end *mpdu_end =
  649. &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
  650. uint32_t decrypt_err;
  651. decrypt_err = HAL_RX_MPDU_END_DECRYPT_ERR_GET(mpdu_end);
  652. return decrypt_err;
  653. }
  654. /*
  655. * hal_rx_tlv_first_mpdu_get_rh(): get fist_mpdu bit from rx attention
  656. * @buf: pointer to rx_pkt_tlvs
  657. *
  658. * reutm: uint32_t(first_msdu)
  659. */
  660. static inline uint32_t
  661. hal_rx_tlv_first_mpdu_get_rh(uint8_t *buf)
  662. {
  663. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  664. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  665. uint32_t first_mpdu;
  666. first_mpdu = HAL_RX_ATTN_FIRST_MPDU_GET(rx_attn);
  667. return first_mpdu;
  668. }
  669. /*
  670. * hal_rx_msdu_get_keyid_rh(): API to get the key id if the decrypted packet
  671. * from rx_msdu_end
  672. *
  673. * @buf: pointer to the start of RX PKT TLV header
  674. * Return: uint32_t(key id)
  675. */
  676. static inline uint8_t
  677. hal_rx_msdu_get_keyid_rh(uint8_t *buf)
  678. {
  679. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  680. struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
  681. uint32_t keyid_octet;
  682. keyid_octet = HAL_RX_MSDU_END_KEYID_OCTET_GET(msdu_end);
  683. return keyid_octet & 0x3;
  684. }
  685. /*
  686. * hal_rx_tlv_get_is_decrypted_rh(): API to get the decrypt status of the
  687. * packet from rx_attention
  688. *
  689. * @buf: pointer to the start of RX PKT TLV header
  690. * Return: uint32_t(decryt status)
  691. */
  692. static inline uint32_t
  693. hal_rx_tlv_get_is_decrypted_rh(uint8_t *buf)
  694. {
  695. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  696. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  697. uint32_t is_decrypt = 0;
  698. uint32_t decrypt_status;
  699. decrypt_status = HAL_RX_ATTN_DECRYPT_STATUS_GET(rx_attn);
  700. if (!decrypt_status)
  701. is_decrypt = 1;
  702. return is_decrypt;
  703. }
  704. static inline uint8_t hal_rx_get_phy_ppdu_id_size_rh(void)
  705. {
  706. return sizeof(uint32_t);
  707. }
  708. /**
  709. * hal_hw_txrx_default_ops_attach_rh() - Attach the default hal ops for
  710. * Rh arch chipsets.
  711. * @hal_soc: HAL soc handle
  712. *
  713. * Return: None
  714. */
  715. void hal_hw_txrx_default_ops_attach_rh(struct hal_soc *hal_soc)
  716. {
  717. hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_rh;
  718. hal_soc->ops->hal_get_rx_max_ba_window =
  719. hal_get_rx_max_ba_window_rh;
  720. hal_soc->ops->hal_set_link_desc_addr = hal_set_link_desc_addr_rh;
  721. hal_soc->ops->hal_tx_init_data_ring = hal_tx_init_data_ring_rh;
  722. hal_soc->ops->hal_get_ba_aging_timeout = hal_get_ba_aging_timeout_rh;
  723. hal_soc->ops->hal_set_ba_aging_timeout = hal_set_ba_aging_timeout_rh;
  724. hal_soc->ops->hal_get_reo_reg_base_offset =
  725. hal_get_reo_reg_base_offset_rh;
  726. hal_soc->ops->hal_rx_get_tlv_size = hal_rx_get_tlv_size_generic_rh;
  727. hal_soc->ops->hal_rx_msdu_is_wlan_mcast =
  728. hal_rx_msdu_is_wlan_mcast_generic_rh;
  729. hal_soc->ops->hal_rx_tlv_decap_format_get =
  730. hal_rx_tlv_decap_format_get_rh;
  731. hal_soc->ops->hal_rx_dump_pkt_tlvs = hal_rx_dump_pkt_tlvs_rh;
  732. hal_soc->ops->hal_rx_tlv_get_offload_info =
  733. hal_rx_tlv_get_offload_info_rh;
  734. hal_soc->ops->hal_rx_tlv_phy_ppdu_id_get =
  735. hal_rx_attn_phy_ppdu_id_get_rh;
  736. hal_soc->ops->hal_rx_tlv_msdu_done_get = hal_rx_attn_msdu_done_get_rh;
  737. hal_soc->ops->hal_rx_tlv_msdu_len_get =
  738. hal_rx_msdu_start_msdu_len_get_rh;
  739. hal_soc->ops->hal_rx_get_proto_params = hal_rx_get_proto_params_rh;
  740. hal_soc->ops->hal_rx_get_l3_l4_offsets = hal_rx_get_l3_l4_offsets_rh;
  741. hal_soc->ops->hal_rx_reo_buf_paddr_get = hal_rx_reo_buf_paddr_get_rh;
  742. hal_soc->ops->hal_rx_msdu_link_desc_set = hal_rx_msdu_link_desc_set_rh;
  743. hal_soc->ops->hal_rx_buf_cookie_rbm_get = hal_rx_buf_cookie_rbm_get_rh;
  744. hal_soc->ops->hal_rx_ret_buf_manager_get =
  745. hal_rx_ret_buf_manager_get_rh;
  746. hal_soc->ops->hal_rxdma_buff_addr_info_set =
  747. hal_rxdma_buff_addr_info_set_rh;
  748. hal_soc->ops->hal_rx_msdu_flags_get = hal_rx_msdu_flags_get_rh;
  749. hal_soc->ops->hal_rx_get_reo_error_code = hal_rx_get_reo_error_code_rh;
  750. hal_soc->ops->hal_gen_reo_remap_val =
  751. hal_gen_reo_remap_val_generic_rh;
  752. hal_soc->ops->hal_rx_tlv_csum_err_get =
  753. hal_rx_tlv_csum_err_get_rh;
  754. hal_soc->ops->hal_rx_mpdu_desc_info_get =
  755. hal_rx_mpdu_desc_info_get_rh;
  756. hal_soc->ops->hal_rx_err_status_get = hal_rx_err_status_get_rh;
  757. hal_soc->ops->hal_rx_reo_buf_type_get = hal_rx_reo_buf_type_get_rh;
  758. hal_soc->ops->hal_rx_pkt_hdr_get = hal_rx_pkt_hdr_get_rh;
  759. hal_soc->ops->hal_rx_wbm_err_src_get = hal_rx_wbm_err_src_get_rh;
  760. hal_soc->ops->hal_rx_wbm_rel_buf_paddr_get =
  761. hal_rx_wbm_rel_buf_paddr_get_rh;
  762. hal_soc->ops->hal_rx_priv_info_set_in_tlv =
  763. hal_rx_priv_info_set_in_tlv_rh;
  764. hal_soc->ops->hal_rx_priv_info_get_from_tlv =
  765. hal_rx_priv_info_get_from_tlv_rh;
  766. hal_soc->ops->hal_rx_mpdu_info_ampdu_flag_get =
  767. hal_rx_mpdu_info_ampdu_flag_get_rh;
  768. hal_soc->ops->hal_rx_tlv_mpdu_len_err_get =
  769. hal_rx_tlv_mpdu_len_err_get_rh;
  770. hal_soc->ops->hal_rx_tlv_mpdu_fcs_err_get =
  771. hal_rx_tlv_mpdu_fcs_err_get_rh;
  772. hal_soc->ops->hal_reo_send_cmd = hal_reo_send_cmd_rh;
  773. hal_soc->ops->hal_rx_tlv_get_pkt_capture_flags =
  774. hal_rx_tlv_get_pkt_capture_flags_rh;
  775. hal_soc->ops->hal_rx_desc_get_80211_hdr = hal_rx_desc_get_80211_hdr_rh;
  776. hal_soc->ops->hal_rx_hw_desc_mpdu_user_id =
  777. hal_rx_hw_desc_mpdu_user_id_rh;
  778. hal_soc->ops->hal_reo_qdesc_setup = hal_reo_qdesc_setup_rh;
  779. hal_soc->ops->hal_rx_tlv_msdu_len_set =
  780. hal_rx_msdu_start_msdu_len_set_rh;
  781. hal_soc->ops->hal_rx_tlv_bw_get = hal_rx_tlv_bw_get_rh;
  782. hal_soc->ops->hal_rx_tlv_get_freq = hal_rx_tlv_get_freq_rh;
  783. hal_soc->ops->hal_rx_tlv_sgi_get = hal_rx_tlv_sgi_get_rh;
  784. hal_soc->ops->hal_rx_tlv_rate_mcs_get = hal_rx_tlv_rate_mcs_get_rh;
  785. hal_soc->ops->hal_rx_tlv_get_pkt_type = hal_rx_tlv_get_pkt_type_rh;
  786. hal_soc->ops->hal_rx_tlv_get_pn_num = hal_rx_tlv_get_pn_num_rh;
  787. hal_soc->ops->hal_rx_tlv_mic_err_get = hal_rx_tlv_mic_err_get_rh;
  788. hal_soc->ops->hal_rx_tlv_decrypt_err_get =
  789. hal_rx_tlv_decrypt_err_get_rh;
  790. hal_soc->ops->hal_rx_tlv_first_mpdu_get = hal_rx_tlv_first_mpdu_get_rh;
  791. hal_soc->ops->hal_rx_tlv_get_is_decrypted =
  792. hal_rx_tlv_get_is_decrypted_rh;
  793. hal_soc->ops->hal_rx_msdu_get_keyid = hal_rx_msdu_get_keyid_rh;
  794. hal_soc->ops->hal_rx_msdu_reo_dst_ind_get =
  795. hal_rx_msdu_reo_dst_ind_get_rh;
  796. hal_soc->ops->hal_msdu_desc_info_set = hal_msdu_desc_info_set_rh;
  797. hal_soc->ops->hal_mpdu_desc_info_set = hal_mpdu_desc_info_set_rh;
  798. hal_soc->ops->hal_reo_status_update = hal_reo_status_update_rh;
  799. hal_soc->ops->hal_get_tlv_hdr_size = hal_get_tlv_hdr_size_rh;
  800. hal_soc->ops->hal_get_reo_ent_desc_qdesc_addr =
  801. hal_get_reo_ent_desc_qdesc_addr_rh;
  802. hal_soc->ops->hal_rx_get_qdesc_addr = hal_rx_get_qdesc_addr_rh;
  803. hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind =
  804. hal_set_reo_ent_desc_reo_dest_ind_rh;
  805. hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_rh;
  806. hal_soc->ops->hal_rx_get_phy_ppdu_id_size =
  807. hal_rx_get_phy_ppdu_id_size_rh;
  808. }