dp_be.c 85 KB

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  1. /*
  2. * Copyright (c) 2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <wlan_utility.h>
  20. #include <dp_internal.h>
  21. #include "dp_rings.h"
  22. #include <dp_htt.h>
  23. #include "dp_be.h"
  24. #include "dp_be_tx.h"
  25. #include "dp_be_rx.h"
  26. #ifdef WIFI_MONITOR_SUPPORT
  27. #if !defined(DISABLE_MON_CONFIG) && (defined(WLAN_PKT_CAPTURE_TX_2_0) || \
  28. defined(WLAN_PKT_CAPTURE_RX_2_0))
  29. #include "dp_mon_2.0.h"
  30. #endif
  31. #include "dp_mon.h"
  32. #endif
  33. #include <hal_be_api.h>
  34. #ifdef WLAN_SUPPORT_PPEDS
  35. #include "be/dp_ppeds.h"
  36. #include <ppe_vp_public.h>
  37. #include <ppe_drv_sc.h>
  38. #endif
  39. /* Generic AST entry aging timer value */
  40. #define DP_AST_AGING_TIMER_DEFAULT_MS 5000
  41. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  42. #define DP_TX_VDEV_ID_CHECK_ENABLE 0
  43. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  44. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  45. {1, 4, HAL_BE_WBM_SW4_BM_ID, 0},
  46. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  47. #ifdef QCA_WIFI_KIWI_V2
  48. {3, 5, HAL_BE_WBM_SW5_BM_ID, 0},
  49. {4, 6, HAL_BE_WBM_SW6_BM_ID, 0}
  50. #else
  51. {3, 6, HAL_BE_WBM_SW5_BM_ID, 0},
  52. {4, 7, HAL_BE_WBM_SW6_BM_ID, 0}
  53. #endif
  54. };
  55. #else
  56. #define DP_TX_VDEV_ID_CHECK_ENABLE 1
  57. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  58. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  59. {1, 1, HAL_BE_WBM_SW1_BM_ID, 0},
  60. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  61. {3, 3, HAL_BE_WBM_SW3_BM_ID, 0},
  62. {4, 4, HAL_BE_WBM_SW4_BM_ID, 0}
  63. };
  64. #endif
  65. #ifdef WLAN_SUPPORT_PPEDS
  66. static struct cdp_ppeds_txrx_ops dp_ops_ppeds_be = {
  67. .ppeds_entry_attach = dp_ppeds_attach_vdev_be,
  68. .ppeds_entry_detach = dp_ppeds_detach_vdev_be,
  69. .ppeds_set_int_pri2tid = dp_ppeds_set_int_pri2tid_be,
  70. .ppeds_update_int_pri2tid = dp_ppeds_update_int_pri2tid_be,
  71. .ppeds_entry_dump = dp_ppeds_dump_ppe_vp_tbl_be,
  72. .ppeds_enable_pri2tid = dp_ppeds_vdev_enable_pri2tid_be,
  73. .ppeds_vp_setup_recovery = dp_ppeds_vp_setup_on_fw_recovery,
  74. .ppeds_stats_sync = dp_ppeds_stats_sync_be,
  75. };
  76. static void dp_ppeds_rings_status(struct dp_soc *soc)
  77. {
  78. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  79. dp_print_ring_stat_from_hal(soc, &be_soc->reo2ppe_ring, REO2PPE);
  80. dp_print_ring_stat_from_hal(soc, &be_soc->ppe2tcl_ring, PPE2TCL);
  81. dp_print_ring_stat_from_hal(soc, &be_soc->ppeds_wbm_release_ring,
  82. WBM2SW_RELEASE);
  83. }
  84. static void dp_ppeds_inuse_desc(struct dp_soc *soc)
  85. {
  86. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  87. DP_PRINT_STATS("PPE-DS Tx Descriptors in Use = %u num_free %u",
  88. be_soc->ppeds_tx_desc.num_allocated,
  89. be_soc->ppeds_tx_desc.num_free);
  90. }
  91. #endif
  92. static void dp_soc_cfg_attach_be(struct dp_soc *soc)
  93. {
  94. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  95. dp_soc_cfg_attach(soc);
  96. wlan_cfg_set_rx_rel_ring_id(soc_cfg_ctx, WBM2SW_REL_ERR_RING_NUM);
  97. soc->wlan_cfg_ctx->tcl_wbm_map_array = g_tcl_wbm_map_array;
  98. /* this is used only when dmac mode is enabled */
  99. soc->num_rx_refill_buf_rings = 1;
  100. soc->wlan_cfg_ctx->notify_frame_support =
  101. DP_MARK_NOTIFY_FRAME_SUPPORT;
  102. }
  103. qdf_size_t dp_get_context_size_be(enum dp_context_type context_type)
  104. {
  105. switch (context_type) {
  106. case DP_CONTEXT_TYPE_SOC:
  107. return sizeof(struct dp_soc_be);
  108. case DP_CONTEXT_TYPE_PDEV:
  109. return sizeof(struct dp_pdev_be);
  110. case DP_CONTEXT_TYPE_VDEV:
  111. return sizeof(struct dp_vdev_be);
  112. case DP_CONTEXT_TYPE_PEER:
  113. return sizeof(struct dp_peer_be);
  114. default:
  115. return 0;
  116. }
  117. }
  118. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  119. static uint64_t dp_get_cmem_chunk(struct dp_soc *soc, uint64_t size,
  120. enum CMEM_MEM_CLIENTS client)
  121. {
  122. uint64_t cmem_chunk;
  123. dp_info("cmem base 0x%llx, total size 0x%llx avail_size 0x%llx",
  124. soc->cmem_base, soc->cmem_total_size, soc->cmem_avail_size);
  125. /* Check if requested cmem space is available */
  126. if (soc->cmem_avail_size < size) {
  127. dp_err("cmem_size 0x%llx bytes < requested size 0x%llx bytes",
  128. soc->cmem_avail_size, size);
  129. return 0;
  130. }
  131. cmem_chunk = soc->cmem_base +
  132. (soc->cmem_total_size - soc->cmem_avail_size);
  133. soc->cmem_avail_size -= size;
  134. dp_info("Reserved cmem space 0x%llx, size 0x%llx for client %d",
  135. cmem_chunk, size, client);
  136. return cmem_chunk;
  137. }
  138. #endif
  139. #if defined(WLAN_SUPPORT_RX_FISA)
  140. static inline QDF_STATUS dp_fisa_fst_cmem_addr_init(struct dp_soc *soc)
  141. {
  142. soc->fst_cmem_size = DP_CMEM_FST_SIZE;
  143. soc->fst_cmem_base = dp_get_cmem_chunk(soc, soc->fst_cmem_size,
  144. FISA_FST);
  145. return QDF_STATUS_SUCCESS;
  146. }
  147. #else /* !WLAN_SUPPORT_RX_FISA */
  148. static inline QDF_STATUS dp_fisa_fst_cmem_addr_init(struct dp_soc *soc)
  149. {
  150. return QDF_STATUS_SUCCESS;
  151. }
  152. #endif
  153. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  154. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  155. /**
  156. * dp_cc_wbm_sw_en_cfg() - configure HW cookie conversion enablement
  157. * per wbm2sw ring
  158. *
  159. * @cc_cfg: HAL HW cookie conversion configuration structure pointer
  160. *
  161. * Return: None
  162. */
  163. #ifdef IPA_OPT_WIFI_DP
  164. static inline
  165. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  166. {
  167. cc_cfg->wbm2sw6_cc_en = 1;
  168. cc_cfg->wbm2sw5_cc_en = 0;
  169. cc_cfg->wbm2sw4_cc_en = 1;
  170. cc_cfg->wbm2sw3_cc_en = 1;
  171. cc_cfg->wbm2sw2_cc_en = 1;
  172. /* disable wbm2sw1 hw cc as it's for FW */
  173. cc_cfg->wbm2sw1_cc_en = 0;
  174. cc_cfg->wbm2sw0_cc_en = 1;
  175. cc_cfg->wbm2fw_cc_en = 0;
  176. }
  177. #else
  178. static inline
  179. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  180. {
  181. cc_cfg->wbm2sw6_cc_en = 1;
  182. cc_cfg->wbm2sw5_cc_en = 1;
  183. cc_cfg->wbm2sw4_cc_en = 1;
  184. cc_cfg->wbm2sw3_cc_en = 1;
  185. cc_cfg->wbm2sw2_cc_en = 1;
  186. /* disable wbm2sw1 hw cc as it's for FW */
  187. cc_cfg->wbm2sw1_cc_en = 0;
  188. cc_cfg->wbm2sw0_cc_en = 1;
  189. cc_cfg->wbm2fw_cc_en = 0;
  190. }
  191. #endif
  192. #else
  193. static inline
  194. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  195. {
  196. cc_cfg->wbm2sw6_cc_en = 1;
  197. cc_cfg->wbm2sw5_cc_en = 1;
  198. cc_cfg->wbm2sw4_cc_en = 1;
  199. cc_cfg->wbm2sw3_cc_en = 1;
  200. cc_cfg->wbm2sw2_cc_en = 1;
  201. cc_cfg->wbm2sw1_cc_en = 1;
  202. cc_cfg->wbm2sw0_cc_en = 1;
  203. cc_cfg->wbm2fw_cc_en = 0;
  204. }
  205. #endif
  206. /**
  207. * dp_cc_reg_cfg_init() - initialize and configure HW cookie
  208. * conversion register
  209. *
  210. * @soc: SOC handle
  211. * @is_4k_align: page address 4k aligned
  212. *
  213. * Return: None
  214. */
  215. static void dp_cc_reg_cfg_init(struct dp_soc *soc,
  216. bool is_4k_align)
  217. {
  218. struct hal_hw_cc_config cc_cfg = { 0 };
  219. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  220. if (soc->cdp_soc.ol_ops->get_con_mode &&
  221. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_FTM_MODE)
  222. return;
  223. if (!soc->wlan_cfg_ctx->hw_cc_enabled) {
  224. dp_info("INI skip HW CC register setting");
  225. return;
  226. }
  227. cc_cfg.lut_base_addr_31_0 = be_soc->cc_cmem_base;
  228. cc_cfg.cc_global_en = true;
  229. cc_cfg.page_4k_align = is_4k_align;
  230. cc_cfg.cookie_offset_msb = DP_CC_DESC_ID_SPT_VA_OS_MSB;
  231. cc_cfg.cookie_page_msb = DP_CC_DESC_ID_PPT_PAGE_OS_MSB;
  232. /* 36th bit should be 1 then HW know this is CMEM address */
  233. cc_cfg.lut_base_addr_39_32 = 0x10;
  234. cc_cfg.error_path_cookie_conv_en = true;
  235. cc_cfg.release_path_cookie_conv_en = true;
  236. dp_cc_wbm_sw_en_cfg(&cc_cfg);
  237. hal_cookie_conversion_reg_cfg_be(soc->hal_soc, &cc_cfg);
  238. }
  239. /**
  240. * dp_hw_cc_cmem_write() - DP wrapper function for CMEM buffer writing
  241. * @hal_soc_hdl: HAL SOC handle
  242. * @offset: CMEM address
  243. * @value: value to write
  244. *
  245. * Return: None.
  246. */
  247. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  248. uint32_t offset,
  249. uint32_t value)
  250. {
  251. hal_cmem_write(hal_soc_hdl, offset, value);
  252. }
  253. /**
  254. * dp_hw_cc_cmem_addr_init() - Check and initialize CMEM base address for
  255. * HW cookie conversion
  256. *
  257. * @soc: SOC handle
  258. *
  259. * Return: 0 in case of success, else error value
  260. */
  261. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  262. {
  263. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  264. be_soc->cc_cmem_base = dp_get_cmem_chunk(soc, DP_CC_PPT_MEM_SIZE,
  265. COOKIE_CONVERSION);
  266. return QDF_STATUS_SUCCESS;
  267. }
  268. #else
  269. static inline void dp_cc_reg_cfg_init(struct dp_soc *soc,
  270. bool is_4k_align) {}
  271. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  272. uint32_t offset,
  273. uint32_t value)
  274. { }
  275. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  276. {
  277. return QDF_STATUS_SUCCESS;
  278. }
  279. #endif
  280. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  281. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  282. uint8_t for_feature)
  283. {
  284. QDF_STATUS status = QDF_STATUS_E_NOMEM;
  285. switch (for_feature) {
  286. case COOKIE_CONVERSION:
  287. status = dp_hw_cc_cmem_addr_init(soc);
  288. break;
  289. case FISA_FST:
  290. status = dp_fisa_fst_cmem_addr_init(soc);
  291. break;
  292. default:
  293. dp_err("Invalid CMEM request");
  294. }
  295. return status;
  296. }
  297. #else
  298. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  299. uint8_t for_feature)
  300. {
  301. return QDF_STATUS_SUCCESS;
  302. }
  303. #endif
  304. QDF_STATUS
  305. dp_hw_cookie_conversion_attach(struct dp_soc_be *be_soc,
  306. struct dp_hw_cookie_conversion_t *cc_ctx,
  307. uint32_t num_descs,
  308. enum qdf_dp_desc_type desc_type,
  309. uint8_t desc_pool_id)
  310. {
  311. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  312. uint32_t num_spt_pages, i = 0;
  313. struct dp_spt_page_desc *spt_desc;
  314. struct qdf_mem_dma_page_t *dma_page;
  315. uint8_t chip_id;
  316. /* estimate how many SPT DDR pages needed */
  317. num_spt_pages = num_descs / DP_CC_SPT_PAGE_MAX_ENTRIES;
  318. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  319. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  320. dp_info("num_spt_pages needed %d", num_spt_pages);
  321. dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  322. &cc_ctx->page_pool, qdf_page_size,
  323. num_spt_pages, 0, false);
  324. if (!cc_ctx->page_pool.dma_pages) {
  325. dp_err("spt ddr pages allocation failed");
  326. return QDF_STATUS_E_RESOURCES;
  327. }
  328. cc_ctx->page_desc_base = qdf_mem_malloc(
  329. num_spt_pages * sizeof(struct dp_spt_page_desc));
  330. if (!cc_ctx->page_desc_base) {
  331. dp_err("spt page descs allocation failed");
  332. goto fail_0;
  333. }
  334. chip_id = dp_mlo_get_chip_id(soc);
  335. cc_ctx->cmem_offset = dp_desc_pool_get_cmem_base(chip_id, desc_pool_id,
  336. desc_type);
  337. /* initial page desc */
  338. spt_desc = cc_ctx->page_desc_base;
  339. dma_page = cc_ctx->page_pool.dma_pages;
  340. while (i < num_spt_pages) {
  341. /* check if page address 4K aligned */
  342. if (qdf_unlikely(dma_page[i].page_p_addr & 0xFFF)) {
  343. dp_err("non-4k aligned pages addr %pK",
  344. (void *)dma_page[i].page_p_addr);
  345. goto fail_1;
  346. }
  347. spt_desc[i].page_v_addr =
  348. dma_page[i].page_v_addr_start;
  349. spt_desc[i].page_p_addr =
  350. dma_page[i].page_p_addr;
  351. i++;
  352. }
  353. cc_ctx->total_page_num = num_spt_pages;
  354. qdf_spinlock_create(&cc_ctx->cc_lock);
  355. return QDF_STATUS_SUCCESS;
  356. fail_1:
  357. qdf_mem_free(cc_ctx->page_desc_base);
  358. fail_0:
  359. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  360. &cc_ctx->page_pool, 0, false);
  361. return QDF_STATUS_E_FAILURE;
  362. }
  363. QDF_STATUS
  364. dp_hw_cookie_conversion_detach(struct dp_soc_be *be_soc,
  365. struct dp_hw_cookie_conversion_t *cc_ctx)
  366. {
  367. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  368. qdf_mem_free(cc_ctx->page_desc_base);
  369. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  370. &cc_ctx->page_pool, 0, false);
  371. qdf_spinlock_destroy(&cc_ctx->cc_lock);
  372. return QDF_STATUS_SUCCESS;
  373. }
  374. QDF_STATUS
  375. dp_hw_cookie_conversion_init(struct dp_soc_be *be_soc,
  376. struct dp_hw_cookie_conversion_t *cc_ctx)
  377. {
  378. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  379. uint32_t i = 0;
  380. struct dp_spt_page_desc *spt_desc;
  381. uint32_t ppt_index;
  382. uint32_t ppt_id_start;
  383. if (!cc_ctx->total_page_num) {
  384. dp_err("total page num is 0");
  385. return QDF_STATUS_E_INVAL;
  386. }
  387. ppt_id_start = DP_CMEM_OFFSET_TO_PPT_ID(cc_ctx->cmem_offset);
  388. spt_desc = cc_ctx->page_desc_base;
  389. while (i < cc_ctx->total_page_num) {
  390. /* write page PA to CMEM */
  391. dp_hw_cc_cmem_write(soc->hal_soc,
  392. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  393. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  394. (spt_desc[i].page_p_addr >>
  395. DP_CC_PPT_ENTRY_HW_APEND_BITS_4K_ALIGNED));
  396. ppt_index = ppt_id_start + i;
  397. if (ppt_index >= DP_CC_PPT_MAX_ENTRIES)
  398. qdf_assert_always(0);
  399. spt_desc[i].ppt_index = ppt_index;
  400. be_soc->page_desc_base[ppt_index].page_v_addr =
  401. spt_desc[i].page_v_addr;
  402. i++;
  403. }
  404. return QDF_STATUS_SUCCESS;
  405. }
  406. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  407. QDF_STATUS
  408. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  409. struct dp_hw_cookie_conversion_t *cc_ctx)
  410. {
  411. uint32_t ppt_index;
  412. struct dp_spt_page_desc *spt_desc;
  413. int i = 0;
  414. spt_desc = cc_ctx->page_desc_base;
  415. while (i < cc_ctx->total_page_num) {
  416. ppt_index = spt_desc[i].ppt_index;
  417. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  418. i++;
  419. }
  420. return QDF_STATUS_SUCCESS;
  421. }
  422. #else
  423. QDF_STATUS
  424. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  425. struct dp_hw_cookie_conversion_t *cc_ctx)
  426. {
  427. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  428. uint32_t ppt_index;
  429. struct dp_spt_page_desc *spt_desc;
  430. int i = 0;
  431. spt_desc = cc_ctx->page_desc_base;
  432. while (i < cc_ctx->total_page_num) {
  433. /* reset PA in CMEM to NULL */
  434. dp_hw_cc_cmem_write(soc->hal_soc,
  435. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  436. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  437. 0);
  438. ppt_index = spt_desc[i].ppt_index;
  439. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  440. i++;
  441. }
  442. return QDF_STATUS_SUCCESS;
  443. }
  444. #endif
  445. #ifdef WLAN_SUPPORT_PPEDS
  446. static QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  447. {
  448. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  449. int target_type = hal_get_target_type(soc->hal_soc);
  450. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  451. /*
  452. * Check if PPE DS is enabled and wlan soc supports it.
  453. */
  454. if (!wlan_cfg_get_dp_soc_ppeds_enable(soc->wlan_cfg_ctx) ||
  455. !dp_ppeds_target_supported(target_type))
  456. return QDF_STATUS_SUCCESS;
  457. if (dp_ppeds_attach_soc_be(be_soc) != QDF_STATUS_SUCCESS)
  458. return QDF_STATUS_SUCCESS;
  459. cdp_ops->ppeds_ops = &dp_ops_ppeds_be;
  460. return QDF_STATUS_SUCCESS;
  461. }
  462. static QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  463. {
  464. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  465. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  466. if (!be_soc->ppeds_handle)
  467. return QDF_STATUS_E_FAILURE;
  468. dp_ppeds_detach_soc_be(be_soc);
  469. cdp_ops->ppeds_ops = NULL;
  470. return QDF_STATUS_SUCCESS;
  471. }
  472. static QDF_STATUS dp_peer_ppeds_default_route_be(struct dp_soc *soc,
  473. struct dp_peer_be *be_peer,
  474. uint8_t vdev_id,
  475. uint16_t src_info)
  476. {
  477. uint16_t service_code;
  478. uint8_t priority_valid;
  479. uint8_t use_ppe_ds = PEER_ROUTING_USE_PPE;
  480. uint8_t peer_routing_enabled = PEER_ROUTING_ENABLED;
  481. QDF_STATUS status = QDF_STATUS_SUCCESS;
  482. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  483. struct dp_vdev_be *be_vdev;
  484. be_vdev = dp_get_be_vdev_from_dp_vdev(be_peer->peer.vdev);
  485. /*
  486. * Program service code bypass to avoid L2 new mac address
  487. * learning exception when fdb learning is disabled.
  488. */
  489. service_code = PPE_DRV_SC_SPF_BYPASS;
  490. priority_valid = be_peer->priority_valid;
  491. /*
  492. * if FST is enabled then let flow rule take the decision of
  493. * routing the pkt to DS or host
  494. */
  495. if (wlan_cfg_is_rx_flow_tag_enabled(cfg))
  496. use_ppe_ds = 0;
  497. if (soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing) {
  498. status =
  499. soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing
  500. (soc->ctrl_psoc,
  501. be_peer->peer.mac_addr.raw,
  502. service_code, priority_valid,
  503. src_info, vdev_id, use_ppe_ds,
  504. peer_routing_enabled);
  505. if (status != QDF_STATUS_SUCCESS) {
  506. dp_err("vdev_id: %d, PPE peer routing mac:"
  507. QDF_MAC_ADDR_FMT, vdev_id,
  508. QDF_MAC_ADDR_REF(be_peer->peer.mac_addr.raw));
  509. return QDF_STATUS_E_FAILURE;
  510. }
  511. }
  512. return QDF_STATUS_SUCCESS;
  513. }
  514. #ifdef WLAN_FEATURE_11BE_MLO
  515. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  516. struct dp_peer *peer,
  517. struct dp_vdev_be *be_vdev,
  518. void *args)
  519. {
  520. struct dp_peer *mld_peer;
  521. struct dp_soc *mld_soc;
  522. struct dp_soc_be *be_soc;
  523. struct cdp_soc_t *cdp_soc;
  524. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  525. struct cdp_ds_vp_params vp_params = {0};
  526. struct dp_ppe_vp_profile *ppe_vp_profile = (struct dp_ppe_vp_profile *)args;
  527. uint16_t src_info = ppe_vp_profile->vp_num;
  528. uint8_t vdev_id = be_vdev->vdev.vdev_id;
  529. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  530. if (!be_peer) {
  531. dp_err("BE peer is null");
  532. return QDF_STATUS_E_NULL_VALUE;
  533. }
  534. if (IS_DP_LEGACY_PEER(peer)) {
  535. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  536. vdev_id, src_info);
  537. } else if (IS_MLO_DP_MLD_PEER(peer)) {
  538. int i;
  539. struct dp_peer *link_peer = NULL;
  540. struct dp_mld_link_peers link_peers_info;
  541. /* get link peers with reference */
  542. dp_get_link_peers_ref_from_mld_peer(soc, peer, &link_peers_info,
  543. DP_MOD_ID_DS);
  544. for (i = 0; i < link_peers_info.num_links; i++) {
  545. link_peer = link_peers_info.link_peers[i];
  546. be_peer = dp_get_be_peer_from_dp_peer(link_peer);
  547. if (!be_peer) {
  548. dp_err("BE peer is null");
  549. continue;
  550. }
  551. be_vdev = dp_get_be_vdev_from_dp_vdev(link_peer->vdev);
  552. if (!be_vdev) {
  553. dp_err("BE vap is null for peer id %d ",
  554. link_peer->peer_id);
  555. continue;
  556. }
  557. vdev_id = be_vdev->vdev.vdev_id;
  558. soc = link_peer->vdev->pdev->soc;
  559. qdf_status = dp_peer_ppeds_default_route_be(soc,
  560. be_peer,
  561. vdev_id,
  562. src_info);
  563. }
  564. dp_release_link_peers_ref(&link_peers_info, DP_MOD_ID_DS);
  565. } else {
  566. mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
  567. if (!mld_peer)
  568. return qdf_status;
  569. /*
  570. * In case of MLO link peer,
  571. * Fetch the VP profile from the mld vdev.
  572. */
  573. be_vdev = dp_get_be_vdev_from_dp_vdev(mld_peer->vdev);
  574. if (!be_vdev) {
  575. dp_err("BE vap is null");
  576. return QDF_STATUS_E_NULL_VALUE;
  577. }
  578. /*
  579. * Extract the VP profile from the vap
  580. * in case of MLO peer, we have to get the profile from
  581. * the MLD vdev's osif handle and not the link peer.
  582. */
  583. mld_soc = mld_peer->vdev->pdev->soc;
  584. cdp_soc = &mld_soc->cdp_soc;
  585. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  586. dp_err("%pK: Register PPEDS profile info API before use", cdp_soc);
  587. return QDF_STATUS_E_NULL_VALUE;
  588. }
  589. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(mld_soc->ctrl_psoc,
  590. mld_peer->vdev->vdev_id,
  591. &vp_params);
  592. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  593. dp_err("%pK: Failed to get ppeds profile for mld soc", mld_soc);
  594. return qdf_status;
  595. }
  596. /*
  597. * Check if PPE DS routing is enabled on
  598. * the associated vap.
  599. */
  600. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  601. return qdf_status;
  602. be_soc = dp_get_be_soc_from_dp_soc(mld_soc);
  603. ppe_vp_profile = &be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx];
  604. src_info = ppe_vp_profile->vp_num;
  605. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  606. vdev_id, src_info);
  607. }
  608. return qdf_status;
  609. }
  610. #else
  611. static QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  612. struct dp_peer *peer,
  613. struct dp_vdev_be *be_vdev
  614. void *args)
  615. {
  616. struct dp_ppe_vp_profile *vp_profile = (struct dp_ppe_vp_profile *)args;
  617. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  618. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  619. if (!be_peer) {
  620. dp_err("BE peer is null");
  621. return QDF_STATUS_E_NULL_VALUE;
  622. }
  623. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  624. be_vdev->vdev.vdev_id,
  625. vp_profile->vp_num);
  626. return qdf_status;
  627. }
  628. #endif
  629. #else
  630. static QDF_STATUS dp_ppeds_init_soc_be(struct dp_soc *soc)
  631. {
  632. return QDF_STATUS_SUCCESS;
  633. }
  634. static QDF_STATUS dp_ppeds_deinit_soc_be(struct dp_soc *soc)
  635. {
  636. return QDF_STATUS_SUCCESS;
  637. }
  638. static inline QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  639. {
  640. return QDF_STATUS_SUCCESS;
  641. }
  642. static inline QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  643. {
  644. return QDF_STATUS_SUCCESS;
  645. }
  646. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc, struct dp_peer *peer,
  647. struct dp_vdev_be *be_vdev,
  648. void *args)
  649. {
  650. return QDF_STATUS_SUCCESS;
  651. }
  652. static inline void dp_ppeds_stop_soc_be(struct dp_soc *soc)
  653. {
  654. }
  655. #endif /* WLAN_SUPPORT_PPEDS */
  656. void dp_reo_shared_qaddr_detach(struct dp_soc *soc)
  657. {
  658. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  659. REO_QUEUE_REF_ML_TABLE_SIZE,
  660. soc->reo_qref.mlo_reo_qref_table_vaddr,
  661. soc->reo_qref.mlo_reo_qref_table_paddr, 0);
  662. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  663. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  664. soc->reo_qref.non_mlo_reo_qref_table_vaddr,
  665. soc->reo_qref.non_mlo_reo_qref_table_paddr, 0);
  666. }
  667. static QDF_STATUS dp_soc_detach_be(struct dp_soc *soc)
  668. {
  669. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  670. int i = 0;
  671. dp_soc_ppeds_detach_be(soc);
  672. dp_reo_shared_qaddr_detach(soc);
  673. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  674. dp_hw_cookie_conversion_detach(be_soc,
  675. &be_soc->tx_cc_ctx[i]);
  676. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  677. dp_hw_cookie_conversion_detach(be_soc,
  678. &be_soc->rx_cc_ctx[i]);
  679. qdf_mem_free(be_soc->page_desc_base);
  680. be_soc->page_desc_base = NULL;
  681. return QDF_STATUS_SUCCESS;
  682. }
  683. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  684. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  685. {
  686. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  687. if (dp_global)
  688. dp_global->fst_ctx = fst;
  689. }
  690. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  691. {
  692. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  693. if (dp_global)
  694. return dp_global->fst_ctx;
  695. return NULL;
  696. }
  697. static uint32_t dp_rx_fst_release_ref_be(void)
  698. {
  699. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  700. uint32_t rx_fst_ref_cnt;
  701. if (dp_global) {
  702. rx_fst_ref_cnt = qdf_atomic_read(&dp_global->rx_fst_ref_cnt);
  703. qdf_atomic_dec(&dp_global->rx_fst_ref_cnt);
  704. return rx_fst_ref_cnt;
  705. }
  706. return 1;
  707. }
  708. static void dp_rx_fst_get_ref_be(void)
  709. {
  710. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  711. if (dp_global)
  712. qdf_atomic_inc(&dp_global->rx_fst_ref_cnt);
  713. }
  714. #else
  715. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  716. {
  717. }
  718. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  719. {
  720. return NULL;
  721. }
  722. static uint32_t dp_rx_fst_release_ref_be(void)
  723. {
  724. return 1;
  725. }
  726. static void dp_rx_fst_get_ref_be(void)
  727. {
  728. }
  729. #endif
  730. #ifdef WLAN_MLO_MULTI_CHIP
  731. #ifdef WLAN_MCAST_MLO
  732. static inline void
  733. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  734. {
  735. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  736. be_vdev->mcast_primary = false;
  737. be_vdev->seq_num = 0;
  738. hal_tx_mcast_mlo_reinject_routing_set(
  739. soc->hal_soc,
  740. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  741. if (vdev->opmode == wlan_op_mode_ap) {
  742. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  743. vdev->vdev_id,
  744. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  745. }
  746. }
  747. static inline void
  748. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  749. {
  750. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  751. be_vdev->seq_num = 0;
  752. be_vdev->mcast_primary = false;
  753. vdev->mlo_vdev = false;
  754. }
  755. #else
  756. static inline void
  757. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  758. {
  759. }
  760. static inline void
  761. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  762. {
  763. }
  764. #endif
  765. static void dp_mlo_init_ptnr_list(struct dp_vdev *vdev)
  766. {
  767. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  768. qdf_mem_set(be_vdev->partner_vdev_list,
  769. WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
  770. CDP_INVALID_VDEV_ID);
  771. }
  772. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  773. struct cdp_lro_hash_config *lro_hash)
  774. {
  775. dp_mlo_get_rx_hash_key(soc, lro_hash);
  776. }
  777. #else
  778. static inline void
  779. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  780. {
  781. }
  782. static inline void
  783. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  784. {
  785. }
  786. static void dp_mlo_init_ptnr_list(struct dp_vdev *vdev)
  787. {
  788. }
  789. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  790. struct cdp_lro_hash_config *lro_hash)
  791. {
  792. dp_get_rx_hash_key_bytes(lro_hash);
  793. }
  794. #endif
  795. static QDF_STATUS dp_soc_attach_be(struct dp_soc *soc,
  796. struct cdp_soc_attach_params *params)
  797. {
  798. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  799. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  800. uint32_t max_tx_rx_desc_num, num_spt_pages;
  801. uint32_t num_entries;
  802. int i = 0;
  803. max_tx_rx_desc_num = WLAN_CFG_NUM_TX_DESC_MAX * MAX_TXDESC_POOLS +
  804. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX * MAX_RXDESC_POOLS +
  805. WLAN_CFG_NUM_PPEDS_TX_DESC_MAX * MAX_PPE_TXDESC_POOLS;
  806. /* estimate how many SPT DDR pages needed */
  807. num_spt_pages = max_tx_rx_desc_num / DP_CC_SPT_PAGE_MAX_ENTRIES;
  808. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  809. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  810. be_soc->page_desc_base = qdf_mem_malloc(
  811. DP_CC_PPT_MAX_ENTRIES * sizeof(struct dp_spt_page_desc));
  812. if (!be_soc->page_desc_base) {
  813. dp_err("spt page descs allocation failed");
  814. return QDF_STATUS_E_NOMEM;
  815. }
  816. soc->wbm_sw0_bm_id = hal_tx_get_wbm_sw0_bm_id();
  817. qdf_status = dp_get_cmem_allocation(soc, COOKIE_CONVERSION);
  818. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  819. goto fail;
  820. dp_soc_mlo_fill_params(soc, params);
  821. qdf_status = dp_soc_ppeds_attach_be(soc);
  822. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  823. goto fail;
  824. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  825. num_entries = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  826. qdf_status =
  827. dp_hw_cookie_conversion_attach(be_soc,
  828. &be_soc->tx_cc_ctx[i],
  829. num_entries,
  830. QDF_DP_TX_DESC_TYPE, i);
  831. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  832. goto fail;
  833. }
  834. qdf_status = dp_get_cmem_allocation(soc, FISA_FST);
  835. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  836. goto fail;
  837. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  838. num_entries =
  839. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  840. qdf_status =
  841. dp_hw_cookie_conversion_attach(be_soc,
  842. &be_soc->rx_cc_ctx[i],
  843. num_entries,
  844. QDF_DP_RX_DESC_BUF_TYPE,
  845. i);
  846. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  847. goto fail;
  848. }
  849. return qdf_status;
  850. fail:
  851. dp_soc_detach_be(soc);
  852. return qdf_status;
  853. }
  854. static QDF_STATUS dp_soc_deinit_be(struct dp_soc *soc)
  855. {
  856. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  857. int i = 0;
  858. qdf_atomic_set(&soc->cmn_init_done, 0);
  859. dp_ppeds_stop_soc_be(soc);
  860. dp_tx_deinit_bank_profiles(be_soc);
  861. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  862. dp_hw_cookie_conversion_deinit(be_soc,
  863. &be_soc->tx_cc_ctx[i]);
  864. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  865. dp_hw_cookie_conversion_deinit(be_soc,
  866. &be_soc->rx_cc_ctx[i]);
  867. dp_ppeds_deinit_soc_be(soc);
  868. return QDF_STATUS_SUCCESS;
  869. }
  870. static QDF_STATUS dp_soc_deinit_be_wrapper(struct dp_soc *soc)
  871. {
  872. QDF_STATUS qdf_status;
  873. qdf_status = dp_soc_deinit_be(soc);
  874. if (QDF_IS_STATUS_ERROR(qdf_status))
  875. return qdf_status;
  876. dp_soc_deinit(soc);
  877. return QDF_STATUS_SUCCESS;
  878. }
  879. static void *dp_soc_init_be(struct dp_soc *soc, HTC_HANDLE htc_handle,
  880. struct hif_opaque_softc *hif_handle)
  881. {
  882. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  883. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  884. int i = 0;
  885. void *ret_addr;
  886. wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
  887. WLAN_MD_DP_SOC, "dp_soc");
  888. soc->hif_handle = hif_handle;
  889. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  890. if (!soc->hal_soc)
  891. return NULL;
  892. dp_ppeds_init_soc_be(soc);
  893. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  894. qdf_status =
  895. dp_hw_cookie_conversion_init(be_soc,
  896. &be_soc->tx_cc_ctx[i]);
  897. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  898. goto fail;
  899. }
  900. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  901. qdf_status =
  902. dp_hw_cookie_conversion_init(be_soc,
  903. &be_soc->rx_cc_ctx[i]);
  904. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  905. goto fail;
  906. }
  907. /* route vdev_id mismatch notification via FW completion */
  908. hal_tx_vdev_mismatch_routing_set(soc->hal_soc,
  909. HAL_TX_VDEV_MISMATCH_FW_NOTIFY);
  910. qdf_status = dp_tx_init_bank_profiles(be_soc);
  911. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  912. goto fail;
  913. /* write WBM/REO cookie conversion CFG register */
  914. dp_cc_reg_cfg_init(soc, true);
  915. ret_addr = dp_soc_init(soc, htc_handle, hif_handle);
  916. if (!ret_addr)
  917. goto fail;
  918. return ret_addr;
  919. fail:
  920. dp_soc_deinit_be(soc);
  921. return NULL;
  922. }
  923. static QDF_STATUS dp_pdev_attach_be(struct dp_pdev *pdev,
  924. struct cdp_pdev_attach_params *params)
  925. {
  926. dp_pdev_mlo_fill_params(pdev, params);
  927. return QDF_STATUS_SUCCESS;
  928. }
  929. static QDF_STATUS dp_pdev_detach_be(struct dp_pdev *pdev)
  930. {
  931. dp_mlo_update_link_to_pdev_unmap(pdev->soc, pdev);
  932. return QDF_STATUS_SUCCESS;
  933. }
  934. #ifdef INTRA_BSS_FWD_OFFLOAD
  935. static
  936. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  937. {
  938. soc->cdp_soc.ol_ops->vdev_set_intra_bss(soc->ctrl_psoc, vdev_id,
  939. enable);
  940. }
  941. #else
  942. static
  943. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  944. {
  945. }
  946. #endif
  947. static QDF_STATUS dp_vdev_attach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  948. {
  949. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  950. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  951. struct dp_pdev *pdev = vdev->pdev;
  952. if (vdev->opmode == wlan_op_mode_monitor)
  953. return QDF_STATUS_SUCCESS;
  954. be_vdev->vdev_id_check_en = DP_TX_VDEV_ID_CHECK_ENABLE;
  955. be_vdev->bank_id = dp_tx_get_bank_profile(be_soc, be_vdev);
  956. vdev->bank_id = be_vdev->bank_id;
  957. if (be_vdev->bank_id == DP_BE_INVALID_BANK_ID) {
  958. QDF_BUG(0);
  959. return QDF_STATUS_E_FAULT;
  960. }
  961. if (vdev->opmode == wlan_op_mode_sta) {
  962. if (soc->cdp_soc.ol_ops->set_mec_timer)
  963. soc->cdp_soc.ol_ops->set_mec_timer(
  964. soc->ctrl_psoc,
  965. vdev->vdev_id,
  966. DP_AST_AGING_TIMER_DEFAULT_MS);
  967. if (pdev->isolation)
  968. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  969. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  970. else
  971. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  972. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  973. } else if (vdev->ap_bridge_enabled) {
  974. dp_vdev_set_intra_bss(soc, vdev->vdev_id, true);
  975. }
  976. dp_mlo_mcast_init(soc, vdev);
  977. dp_mlo_init_ptnr_list(vdev);
  978. return QDF_STATUS_SUCCESS;
  979. }
  980. static QDF_STATUS dp_vdev_detach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  981. {
  982. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  983. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  984. if (vdev->opmode == wlan_op_mode_monitor)
  985. return QDF_STATUS_SUCCESS;
  986. if (vdev->opmode == wlan_op_mode_ap)
  987. dp_mlo_mcast_deinit(soc, vdev);
  988. dp_tx_put_bank_profile(be_soc, be_vdev);
  989. dp_clr_mlo_ptnr_list(soc, vdev);
  990. return QDF_STATUS_SUCCESS;
  991. }
  992. #ifdef WLAN_SUPPORT_PPEDS
  993. static void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  994. uint8_t *peer_mac)
  995. {
  996. struct dp_vdev_be *be_vdev;
  997. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  998. struct dp_soc_be *be_soc;
  999. struct cdp_ds_vp_params vp_params = {0};
  1000. struct cdp_soc_t *cdp_soc;
  1001. enum wlan_op_mode vdev_opmode;
  1002. struct dp_peer *peer;
  1003. struct dp_peer *tgt_peer = NULL;
  1004. struct dp_soc *tgt_soc = NULL;
  1005. peer = dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id, DP_MOD_ID_CDP);
  1006. if (!peer)
  1007. return;
  1008. vdev_opmode = peer->vdev->opmode;
  1009. if (vdev_opmode != wlan_op_mode_ap &&
  1010. vdev_opmode != wlan_op_mode_sta) {
  1011. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1012. return;
  1013. }
  1014. tgt_peer = dp_get_tgt_peer_from_peer(peer);
  1015. tgt_soc = tgt_peer->vdev->pdev->soc;
  1016. be_soc = dp_get_be_soc_from_dp_soc(tgt_soc);
  1017. cdp_soc = &tgt_soc->cdp_soc;
  1018. be_vdev = dp_get_be_vdev_from_dp_vdev(tgt_peer->vdev);
  1019. if (!be_vdev) {
  1020. qdf_err("BE vap is null");
  1021. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1022. goto fail;
  1023. }
  1024. /*
  1025. * Extract the VP profile from the VAP
  1026. */
  1027. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  1028. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  1029. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1030. goto fail;
  1031. }
  1032. /*
  1033. * Check if PPE DS routing is enabled on the associated vap.
  1034. */
  1035. qdf_status =
  1036. cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(tgt_soc->ctrl_psoc,
  1037. tgt_peer->vdev->vdev_id,
  1038. &vp_params);
  1039. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  1040. dp_err("%pK: Could not find ppeds profile info vdev", be_vdev);
  1041. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1042. goto fail;
  1043. }
  1044. if (vp_params.ppe_vp_type == PPE_VP_USER_TYPE_DS) {
  1045. qdf_status = dp_peer_setup_ppeds_be(tgt_soc, tgt_peer, be_vdev,
  1046. (void *)&be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx]);
  1047. }
  1048. fail:
  1049. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1050. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1051. dp_err("Unable to do ppeds peer setup");
  1052. qdf_assert_always(0);
  1053. }
  1054. }
  1055. #else
  1056. static inline
  1057. void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1058. uint8_t *peer_mac)
  1059. {
  1060. }
  1061. #endif
  1062. static QDF_STATUS dp_peer_setup_be(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1063. uint8_t *peer_mac,
  1064. struct cdp_peer_setup_info *setup_info)
  1065. {
  1066. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  1067. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1068. qdf_status = dp_peer_setup_wifi3(soc_hdl, vdev_id, peer_mac,
  1069. setup_info);
  1070. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1071. dp_err("Unable to dp peer setup");
  1072. return qdf_status;
  1073. }
  1074. dp_soc_txrx_peer_setup_be(soc, vdev_id, peer_mac);
  1075. return QDF_STATUS_SUCCESS;
  1076. }
  1077. qdf_size_t dp_get_soc_context_size_be(void)
  1078. {
  1079. return sizeof(struct dp_soc_be);
  1080. }
  1081. #ifdef CONFIG_WORD_BASED_TLV
  1082. /**
  1083. * dp_rxdma_ring_wmask_cfg_be() - Setup RXDMA ring word mask config
  1084. * @soc: Common DP soc handle
  1085. * @htt_tlv_filter: Rx SRNG TLV and filter setting
  1086. *
  1087. * Return: none
  1088. */
  1089. static inline void
  1090. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1091. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1092. {
  1093. htt_tlv_filter->rx_msdu_end_wmask =
  1094. hal_rx_msdu_end_wmask_get(soc->hal_soc);
  1095. htt_tlv_filter->rx_mpdu_start_wmask =
  1096. hal_rx_mpdu_start_wmask_get(soc->hal_soc);
  1097. }
  1098. #else
  1099. static inline void
  1100. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1101. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1102. {
  1103. }
  1104. #endif
  1105. #ifdef WLAN_SUPPORT_PPEDS
  1106. static
  1107. void dp_free_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1108. int ring_type, int ring_num)
  1109. {
  1110. if (srng->irq >= 0) {
  1111. qdf_dev_clear_irq_status_flags(srng->irq, IRQ_DISABLE_UNLAZY);
  1112. if (ring_type == WBM2SW_RELEASE &&
  1113. ring_num == WBM2_SW_PPE_REL_RING_ID)
  1114. pld_pfrm_free_irq(soc->osdev->dev, srng->irq, soc);
  1115. else if (ring_type == REO2PPE || ring_type == PPE2TCL)
  1116. pld_pfrm_free_irq(soc->osdev->dev, srng->irq,
  1117. dp_get_ppe_ds_ctxt(soc));
  1118. }
  1119. }
  1120. static
  1121. int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1122. int vector, int ring_type, int ring_num)
  1123. {
  1124. int irq = -1, ret = 0;
  1125. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1126. int pci_slot = pld_get_pci_slot(soc->osdev->dev);
  1127. srng->irq = -1;
  1128. irq = pld_get_msi_irq(soc->osdev->dev, vector);
  1129. qdf_dev_set_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1130. if (ring_type == WBM2SW_RELEASE &&
  1131. ring_num == WBM2_SW_PPE_REL_RING_ID) {
  1132. snprintf(be_soc->irq_name[2], DP_PPE_INTR_STRNG_LEN,
  1133. "pci%d_ppe_wbm_rel", pci_slot);
  1134. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1135. dp_ppeds_handle_tx_comp,
  1136. IRQF_SHARED | IRQF_NO_SUSPEND,
  1137. be_soc->irq_name[2], (void *)soc);
  1138. if (ret)
  1139. goto fail;
  1140. } else if (ring_type == REO2PPE && be_soc->ppeds_int_mode_enabled) {
  1141. snprintf(be_soc->irq_name[0], DP_PPE_INTR_STRNG_LEN,
  1142. "pci%d_reo2ppe", pci_slot);
  1143. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1144. dp_ppe_ds_reo2ppe_irq_handler,
  1145. IRQF_SHARED | IRQF_NO_SUSPEND,
  1146. be_soc->irq_name[0],
  1147. dp_get_ppe_ds_ctxt(soc));
  1148. if (ret)
  1149. goto fail;
  1150. } else if (ring_type == PPE2TCL && be_soc->ppeds_int_mode_enabled) {
  1151. snprintf(be_soc->irq_name[1], DP_PPE_INTR_STRNG_LEN,
  1152. "pci%d_ppe2tcl", pci_slot);
  1153. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1154. dp_ppe_ds_ppe2tcl_irq_handler,
  1155. IRQF_NO_SUSPEND,
  1156. be_soc->irq_name[1],
  1157. dp_get_ppe_ds_ctxt(soc));
  1158. if (ret)
  1159. goto fail;
  1160. pld_pfrm_disable_irq_nosync(soc->osdev->dev, irq);
  1161. } else {
  1162. return 0;
  1163. }
  1164. srng->irq = irq;
  1165. dp_info("Registered irq %d for soc %pK ring type %d",
  1166. irq, soc, ring_type);
  1167. return 0;
  1168. fail:
  1169. dp_err("Unable to config irq : ring type %d irq %d vector %d",
  1170. ring_type, irq, vector);
  1171. qdf_dev_clear_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1172. return ret;
  1173. }
  1174. void dp_ppeds_disable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1175. {
  1176. if (srng->irq >= 0)
  1177. pld_pfrm_disable_irq_nosync(soc->osdev->dev, srng->irq);
  1178. }
  1179. void dp_ppeds_enable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1180. {
  1181. if (srng->irq >= 0)
  1182. pld_pfrm_enable_irq(soc->osdev->dev, srng->irq);
  1183. }
  1184. #endif
  1185. #ifdef NO_RX_PKT_HDR_TLV
  1186. /**
  1187. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1188. * @soc: Common DP soc handle
  1189. *
  1190. * Return: QDF_STATUS
  1191. */
  1192. static QDF_STATUS
  1193. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1194. {
  1195. int i;
  1196. int mac_id;
  1197. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1198. struct dp_srng *rx_mac_srng;
  1199. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1200. /*
  1201. * In Beryllium chipset msdu_start, mpdu_end
  1202. * and rx_attn are part of msdu_end/mpdu_start
  1203. */
  1204. htt_tlv_filter.msdu_start = 0;
  1205. htt_tlv_filter.mpdu_end = 0;
  1206. htt_tlv_filter.attention = 0;
  1207. htt_tlv_filter.mpdu_start = 1;
  1208. htt_tlv_filter.msdu_end = 1;
  1209. htt_tlv_filter.packet = 1;
  1210. htt_tlv_filter.packet_header = 0;
  1211. htt_tlv_filter.ppdu_start = 0;
  1212. htt_tlv_filter.ppdu_end = 0;
  1213. htt_tlv_filter.ppdu_end_user_stats = 0;
  1214. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1215. htt_tlv_filter.ppdu_end_status_done = 0;
  1216. htt_tlv_filter.enable_fp = 1;
  1217. htt_tlv_filter.enable_md = 0;
  1218. htt_tlv_filter.enable_md = 0;
  1219. htt_tlv_filter.enable_mo = 0;
  1220. htt_tlv_filter.fp_mgmt_filter = 0;
  1221. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1222. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1223. FILTER_DATA_DATA);
  1224. htt_tlv_filter.fp_data_filter |=
  1225. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1226. FILTER_DATA_MCAST : 0;
  1227. htt_tlv_filter.mo_mgmt_filter = 0;
  1228. htt_tlv_filter.mo_ctrl_filter = 0;
  1229. htt_tlv_filter.mo_data_filter = 0;
  1230. htt_tlv_filter.md_data_filter = 0;
  1231. htt_tlv_filter.offset_valid = true;
  1232. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1233. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1234. htt_tlv_filter.rx_msdu_start_offset = 0;
  1235. htt_tlv_filter.rx_attn_offset = 0;
  1236. /*
  1237. * For monitor mode, the packet hdr tlv is enabled later during
  1238. * filter update
  1239. */
  1240. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1241. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1242. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1243. else
  1244. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1245. /*Not subscribing rx_pkt_header*/
  1246. htt_tlv_filter.rx_header_offset = 0;
  1247. htt_tlv_filter.rx_mpdu_start_offset =
  1248. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1249. htt_tlv_filter.rx_msdu_end_offset =
  1250. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1251. dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
  1252. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1253. struct dp_pdev *pdev = soc->pdev_list[i];
  1254. if (!pdev)
  1255. continue;
  1256. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1257. int mac_for_pdev =
  1258. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1259. /*
  1260. * Obtain lmac id from pdev to access the LMAC ring
  1261. * in soc context
  1262. */
  1263. int lmac_id =
  1264. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1265. pdev->pdev_id);
  1266. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1267. if (!rx_mac_srng->hal_srng)
  1268. continue;
  1269. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1270. rx_mac_srng->hal_srng,
  1271. RXDMA_BUF, RX_DATA_BUFFER_SIZE,
  1272. &htt_tlv_filter);
  1273. }
  1274. }
  1275. return status;
  1276. }
  1277. #else
  1278. /**
  1279. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1280. * @soc: Common DP soc handle
  1281. *
  1282. * Return: QDF_STATUS
  1283. */
  1284. static QDF_STATUS
  1285. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1286. {
  1287. int i;
  1288. int mac_id;
  1289. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1290. struct dp_srng *rx_mac_srng;
  1291. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1292. /*
  1293. * In Beryllium chipset msdu_start, mpdu_end
  1294. * and rx_attn are part of msdu_end/mpdu_start
  1295. */
  1296. htt_tlv_filter.msdu_start = 0;
  1297. htt_tlv_filter.mpdu_end = 0;
  1298. htt_tlv_filter.attention = 0;
  1299. htt_tlv_filter.mpdu_start = 1;
  1300. htt_tlv_filter.msdu_end = 1;
  1301. htt_tlv_filter.packet = 1;
  1302. htt_tlv_filter.packet_header = 1;
  1303. htt_tlv_filter.ppdu_start = 0;
  1304. htt_tlv_filter.ppdu_end = 0;
  1305. htt_tlv_filter.ppdu_end_user_stats = 0;
  1306. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1307. htt_tlv_filter.ppdu_end_status_done = 0;
  1308. htt_tlv_filter.enable_fp = 1;
  1309. htt_tlv_filter.enable_md = 0;
  1310. htt_tlv_filter.enable_md = 0;
  1311. htt_tlv_filter.enable_mo = 0;
  1312. htt_tlv_filter.fp_mgmt_filter = 0;
  1313. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1314. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1315. FILTER_DATA_DATA);
  1316. htt_tlv_filter.fp_data_filter |=
  1317. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1318. FILTER_DATA_MCAST : 0;
  1319. htt_tlv_filter.mo_mgmt_filter = 0;
  1320. htt_tlv_filter.mo_ctrl_filter = 0;
  1321. htt_tlv_filter.mo_data_filter = 0;
  1322. htt_tlv_filter.md_data_filter = 0;
  1323. htt_tlv_filter.offset_valid = true;
  1324. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1325. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1326. htt_tlv_filter.rx_msdu_start_offset = 0;
  1327. htt_tlv_filter.rx_attn_offset = 0;
  1328. /*
  1329. * For monitor mode, the packet hdr tlv is enabled later during
  1330. * filter update
  1331. */
  1332. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1333. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1334. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1335. else
  1336. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1337. htt_tlv_filter.rx_header_offset =
  1338. hal_rx_pkt_tlv_offset_get(soc->hal_soc);
  1339. htt_tlv_filter.rx_mpdu_start_offset =
  1340. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1341. htt_tlv_filter.rx_msdu_end_offset =
  1342. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1343. dp_info("TLV subscription\n"
  1344. "msdu_start %d, mpdu_end %d, attention %d"
  1345. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n"
  1346. "TLV offsets\n"
  1347. "msdu_start %d, mpdu_end %d, attention %d"
  1348. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n",
  1349. htt_tlv_filter.msdu_start,
  1350. htt_tlv_filter.mpdu_end,
  1351. htt_tlv_filter.attention,
  1352. htt_tlv_filter.mpdu_start,
  1353. htt_tlv_filter.msdu_end,
  1354. htt_tlv_filter.packet_header,
  1355. htt_tlv_filter.packet,
  1356. htt_tlv_filter.rx_msdu_start_offset,
  1357. htt_tlv_filter.rx_mpdu_end_offset,
  1358. htt_tlv_filter.rx_attn_offset,
  1359. htt_tlv_filter.rx_mpdu_start_offset,
  1360. htt_tlv_filter.rx_msdu_end_offset,
  1361. htt_tlv_filter.rx_header_offset,
  1362. htt_tlv_filter.rx_packet_offset);
  1363. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1364. struct dp_pdev *pdev = soc->pdev_list[i];
  1365. if (!pdev)
  1366. continue;
  1367. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1368. int mac_for_pdev =
  1369. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1370. /*
  1371. * Obtain lmac id from pdev to access the LMAC ring
  1372. * in soc context
  1373. */
  1374. int lmac_id =
  1375. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1376. pdev->pdev_id);
  1377. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1378. if (!rx_mac_srng->hal_srng)
  1379. continue;
  1380. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1381. rx_mac_srng->hal_srng,
  1382. RXDMA_BUF, RX_DATA_BUFFER_SIZE,
  1383. &htt_tlv_filter);
  1384. }
  1385. }
  1386. return status;
  1387. }
  1388. #endif
  1389. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1390. /**
  1391. * dp_service_near_full_srngs_be() - Main bottom half callback for the
  1392. * near-full IRQs.
  1393. * @soc: Datapath SoC handle
  1394. * @int_ctx: Interrupt context
  1395. * @dp_budget: Budget of the work that can be done in the bottom half
  1396. *
  1397. * Return: work done in the handler
  1398. */
  1399. static uint32_t
  1400. dp_service_near_full_srngs_be(struct dp_soc *soc, struct dp_intr *int_ctx,
  1401. uint32_t dp_budget)
  1402. {
  1403. int ring = 0;
  1404. int budget = dp_budget;
  1405. uint32_t work_done = 0;
  1406. uint32_t remaining_quota = dp_budget;
  1407. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  1408. int tx_ring_near_full_mask = int_ctx->tx_ring_near_full_mask;
  1409. int rx_near_full_grp_1_mask = int_ctx->rx_near_full_grp_1_mask;
  1410. int rx_near_full_grp_2_mask = int_ctx->rx_near_full_grp_2_mask;
  1411. int rx_near_full_mask = rx_near_full_grp_1_mask |
  1412. rx_near_full_grp_2_mask;
  1413. dp_verbose_debug("rx_ring_near_full 0x%x tx_ring_near_full 0x%x",
  1414. rx_near_full_mask,
  1415. tx_ring_near_full_mask);
  1416. if (rx_near_full_mask) {
  1417. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1418. if (!(rx_near_full_mask & (1 << ring)))
  1419. continue;
  1420. work_done = dp_rx_nf_process(int_ctx,
  1421. soc->reo_dest_ring[ring].hal_srng,
  1422. ring, remaining_quota);
  1423. if (work_done) {
  1424. intr_stats->num_rx_ring_near_full_masks[ring]++;
  1425. dp_verbose_debug("rx NF mask 0x%x ring %d, work_done %d budget %d",
  1426. rx_near_full_mask, ring,
  1427. work_done,
  1428. budget);
  1429. budget -= work_done;
  1430. if (budget <= 0)
  1431. goto budget_done;
  1432. remaining_quota = budget;
  1433. }
  1434. }
  1435. }
  1436. if (tx_ring_near_full_mask) {
  1437. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  1438. if (!(tx_ring_near_full_mask & (1 << ring)))
  1439. continue;
  1440. work_done = dp_tx_comp_nf_handler(int_ctx, soc,
  1441. soc->tx_comp_ring[ring].hal_srng,
  1442. ring, remaining_quota);
  1443. if (work_done) {
  1444. intr_stats->num_tx_comp_ring_near_full_masks[ring]++;
  1445. dp_verbose_debug("tx NF mask 0x%x ring %d, work_done %d budget %d",
  1446. tx_ring_near_full_mask, ring,
  1447. work_done, budget);
  1448. budget -= work_done;
  1449. if (budget <= 0)
  1450. break;
  1451. remaining_quota = budget;
  1452. }
  1453. }
  1454. }
  1455. intr_stats->num_near_full_masks++;
  1456. budget_done:
  1457. return dp_budget - budget;
  1458. }
  1459. /**
  1460. * dp_srng_test_and_update_nf_params_be() - Check if the srng is in near full
  1461. * state and set the reap_limit appropriately
  1462. * as per the near full state
  1463. * @soc: Datapath soc handle
  1464. * @dp_srng: Datapath handle for SRNG
  1465. * @max_reap_limit: [Output Buffer] Buffer to set the max reap limit as per
  1466. * the srng near-full state
  1467. *
  1468. * Return: 1, if the srng is in near-full state
  1469. * 0, if the srng is not in near-full state
  1470. */
  1471. static int
  1472. dp_srng_test_and_update_nf_params_be(struct dp_soc *soc,
  1473. struct dp_srng *dp_srng,
  1474. int *max_reap_limit)
  1475. {
  1476. return _dp_srng_test_and_update_nf_params(soc, dp_srng, max_reap_limit);
  1477. }
  1478. /**
  1479. * dp_init_near_full_arch_ops_be() - Initialize the arch ops handler for the
  1480. * near full IRQ handling operations.
  1481. * @arch_ops: arch ops handle
  1482. *
  1483. * Return: none
  1484. */
  1485. static inline void
  1486. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1487. {
  1488. arch_ops->dp_service_near_full_srngs = dp_service_near_full_srngs_be;
  1489. arch_ops->dp_srng_test_and_update_nf_params =
  1490. dp_srng_test_and_update_nf_params_be;
  1491. }
  1492. #else
  1493. static inline void
  1494. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1495. {
  1496. }
  1497. #endif
  1498. static inline
  1499. QDF_STATUS dp_srng_init_be(struct dp_soc *soc, struct dp_srng *srng,
  1500. int ring_type, int ring_num, int mac_id)
  1501. {
  1502. return dp_srng_init_idx(soc, srng, ring_type, ring_num, mac_id, 0);
  1503. }
  1504. #ifdef WLAN_SUPPORT_PPEDS
  1505. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1506. {
  1507. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1508. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1509. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1510. if (!be_soc->ppeds_handle)
  1511. return;
  1512. dp_srng_deinit(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0);
  1513. wlan_minidump_remove(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1514. be_soc->ppe2tcl_ring.alloc_size,
  1515. soc->ctrl_psoc,
  1516. WLAN_MD_DP_SRNG_PPE2TCL,
  1517. "ppe2tcl_ring");
  1518. dp_srng_deinit(soc, &be_soc->reo2ppe_ring, REO2PPE, 0);
  1519. wlan_minidump_remove(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1520. be_soc->reo2ppe_ring.alloc_size,
  1521. soc->ctrl_psoc,
  1522. WLAN_MD_DP_SRNG_REO2PPE,
  1523. "reo2ppe_ring");
  1524. dp_srng_deinit(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1525. WBM2_SW_PPE_REL_RING_ID);
  1526. wlan_minidump_remove(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1527. be_soc->ppeds_wbm_release_ring.alloc_size,
  1528. soc->ctrl_psoc,
  1529. WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1530. "ppeds_wbm_release_ring");
  1531. }
  1532. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1533. {
  1534. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1535. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1536. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1537. dp_srng_free(soc, &be_soc->ppeds_wbm_release_ring);
  1538. dp_srng_free(soc, &be_soc->ppe2tcl_ring);
  1539. dp_srng_free(soc, &be_soc->reo2ppe_ring);
  1540. }
  1541. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1542. {
  1543. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1544. uint32_t entries;
  1545. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1546. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1547. if (!be_soc->ppeds_handle)
  1548. return QDF_STATUS_SUCCESS;
  1549. entries = wlan_cfg_get_dp_soc_reo2ppe_ring_size(soc_cfg_ctx);
  1550. if (dp_srng_alloc(soc, &be_soc->reo2ppe_ring, REO2PPE,
  1551. entries, 0)) {
  1552. dp_err("%pK: dp_srng_alloc failed for reo2ppe", soc);
  1553. goto fail;
  1554. }
  1555. entries = wlan_cfg_get_dp_soc_ppe2tcl_ring_size(soc_cfg_ctx);
  1556. if (dp_srng_alloc(soc, &be_soc->ppe2tcl_ring, PPE2TCL,
  1557. entries, 0)) {
  1558. dp_err("%pK: dp_srng_alloc failed for ppe2tcl_ring", soc);
  1559. goto fail;
  1560. }
  1561. entries = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  1562. if (dp_srng_alloc(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1563. entries, 1)) {
  1564. dp_err("%pK: dp_srng_alloc failed for ppeds_wbm_release_ring",
  1565. soc);
  1566. goto fail;
  1567. }
  1568. return QDF_STATUS_SUCCESS;
  1569. fail:
  1570. dp_soc_ppeds_srng_free(soc);
  1571. return QDF_STATUS_E_NOMEM;
  1572. }
  1573. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1574. {
  1575. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1576. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1577. hal_soc_handle_t hal_soc = soc->hal_soc;
  1578. struct dp_ppe_ds_idxs idx = {0};
  1579. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1580. if (!be_soc->ppeds_handle)
  1581. return QDF_STATUS_SUCCESS;
  1582. if (dp_ppeds_register_soc_be(be_soc, &idx)) {
  1583. dp_err("%pK: ppeds registration failed", soc);
  1584. goto fail;
  1585. }
  1586. if (dp_srng_init_idx(soc, &be_soc->reo2ppe_ring, REO2PPE, 0, 0,
  1587. idx.reo2ppe_start_idx)) {
  1588. dp_err("%pK: dp_srng_init failed for reo2ppe", soc);
  1589. goto fail;
  1590. }
  1591. wlan_minidump_log(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1592. be_soc->reo2ppe_ring.alloc_size,
  1593. soc->ctrl_psoc,
  1594. WLAN_MD_DP_SRNG_REO2PPE,
  1595. "reo2ppe_ring");
  1596. hal_reo_config_reo2ppe_dest_info(hal_soc);
  1597. if (dp_srng_init_idx(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0, 0,
  1598. idx.ppe2tcl_start_idx)) {
  1599. dp_err("%pK: dp_srng_init failed for ppe2tcl_ring", soc);
  1600. goto fail;
  1601. }
  1602. wlan_minidump_log(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1603. be_soc->ppe2tcl_ring.alloc_size,
  1604. soc->ctrl_psoc,
  1605. WLAN_MD_DP_SRNG_PPE2TCL,
  1606. "ppe2tcl_ring");
  1607. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  1608. be_soc->ppe2tcl_ring.hal_srng,
  1609. WBM2_SW_PPE_REL_MAP_ID);
  1610. if (dp_srng_init(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1611. WBM2_SW_PPE_REL_RING_ID, 0)) {
  1612. dp_err("%pK: dp_srng_init failed for ppeds_wbm_release_ring",
  1613. soc);
  1614. goto fail;
  1615. }
  1616. wlan_minidump_log(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1617. be_soc->ppeds_wbm_release_ring.alloc_size,
  1618. soc->ctrl_psoc, WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1619. "ppeds_wbm_release_ring");
  1620. return QDF_STATUS_SUCCESS;
  1621. fail:
  1622. dp_soc_ppeds_srng_deinit(soc);
  1623. return QDF_STATUS_E_NOMEM;
  1624. }
  1625. #else
  1626. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1627. {
  1628. }
  1629. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1630. {
  1631. }
  1632. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1633. {
  1634. return QDF_STATUS_SUCCESS;
  1635. }
  1636. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1637. {
  1638. return QDF_STATUS_SUCCESS;
  1639. }
  1640. #endif
  1641. static void dp_soc_srng_deinit_be(struct dp_soc *soc)
  1642. {
  1643. uint32_t i;
  1644. dp_soc_ppeds_srng_deinit(soc);
  1645. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1646. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1647. dp_srng_deinit(soc, &soc->rx_refill_buf_ring[i],
  1648. RXDMA_BUF, 0);
  1649. }
  1650. }
  1651. }
  1652. static void dp_soc_srng_free_be(struct dp_soc *soc)
  1653. {
  1654. uint32_t i;
  1655. dp_soc_ppeds_srng_free(soc);
  1656. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1657. for (i = 0; i < soc->num_rx_refill_buf_rings; i++)
  1658. dp_srng_free(soc, &soc->rx_refill_buf_ring[i]);
  1659. }
  1660. }
  1661. static QDF_STATUS dp_soc_srng_alloc_be(struct dp_soc *soc)
  1662. {
  1663. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1664. uint32_t ring_size;
  1665. uint32_t i;
  1666. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1667. ring_size = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  1668. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1669. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1670. if (dp_srng_alloc(soc, &soc->rx_refill_buf_ring[i],
  1671. RXDMA_BUF, ring_size, 0)) {
  1672. dp_err("%pK: dp_srng_alloc failed refill ring",
  1673. soc);
  1674. goto fail;
  1675. }
  1676. }
  1677. }
  1678. if (dp_soc_ppeds_srng_alloc(soc)) {
  1679. dp_err("%pK: ppe rings alloc failed",
  1680. soc);
  1681. goto fail;
  1682. }
  1683. return QDF_STATUS_SUCCESS;
  1684. fail:
  1685. dp_soc_srng_free_be(soc);
  1686. return QDF_STATUS_E_NOMEM;
  1687. }
  1688. static QDF_STATUS dp_soc_srng_init_be(struct dp_soc *soc)
  1689. {
  1690. int i = 0;
  1691. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1692. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1693. if (dp_srng_init(soc, &soc->rx_refill_buf_ring[i],
  1694. RXDMA_BUF, 0, 0)) {
  1695. dp_err("%pK: dp_srng_init failed refill ring",
  1696. soc);
  1697. goto fail;
  1698. }
  1699. }
  1700. }
  1701. if (dp_soc_ppeds_srng_init(soc)) {
  1702. dp_err("%pK: ppe ds rings init failed",
  1703. soc);
  1704. goto fail;
  1705. }
  1706. return QDF_STATUS_SUCCESS;
  1707. fail:
  1708. dp_soc_srng_deinit_be(soc);
  1709. return QDF_STATUS_E_NOMEM;
  1710. }
  1711. #ifdef WLAN_FEATURE_11BE_MLO
  1712. static inline unsigned
  1713. dp_mlo_peer_find_hash_index(dp_mld_peer_hash_obj_t mld_hash_obj,
  1714. union dp_align_mac_addr *mac_addr)
  1715. {
  1716. uint32_t index;
  1717. index =
  1718. mac_addr->align2.bytes_ab ^
  1719. mac_addr->align2.bytes_cd ^
  1720. mac_addr->align2.bytes_ef;
  1721. index ^= index >> mld_hash_obj->mld_peer_hash.idx_bits;
  1722. index &= mld_hash_obj->mld_peer_hash.mask;
  1723. return index;
  1724. }
  1725. QDF_STATUS
  1726. dp_mlo_peer_find_hash_attach_be(dp_mld_peer_hash_obj_t mld_hash_obj,
  1727. int hash_elems)
  1728. {
  1729. int i, log2;
  1730. if (!mld_hash_obj)
  1731. return QDF_STATUS_E_FAILURE;
  1732. hash_elems *= DP_PEER_HASH_LOAD_MULT;
  1733. hash_elems >>= DP_PEER_HASH_LOAD_SHIFT;
  1734. log2 = dp_log2_ceil(hash_elems);
  1735. hash_elems = 1 << log2;
  1736. mld_hash_obj->mld_peer_hash.mask = hash_elems - 1;
  1737. mld_hash_obj->mld_peer_hash.idx_bits = log2;
  1738. /* allocate an array of TAILQ peer object lists */
  1739. mld_hash_obj->mld_peer_hash.bins = qdf_mem_malloc(
  1740. hash_elems * sizeof(TAILQ_HEAD(anonymous_tail_q, dp_peer)));
  1741. if (!mld_hash_obj->mld_peer_hash.bins)
  1742. return QDF_STATUS_E_NOMEM;
  1743. for (i = 0; i < hash_elems; i++)
  1744. TAILQ_INIT(&mld_hash_obj->mld_peer_hash.bins[i]);
  1745. qdf_spinlock_create(&mld_hash_obj->mld_peer_hash_lock);
  1746. return QDF_STATUS_SUCCESS;
  1747. }
  1748. void
  1749. dp_mlo_peer_find_hash_detach_be(dp_mld_peer_hash_obj_t mld_hash_obj)
  1750. {
  1751. if (!mld_hash_obj)
  1752. return;
  1753. if (mld_hash_obj->mld_peer_hash.bins) {
  1754. qdf_mem_free(mld_hash_obj->mld_peer_hash.bins);
  1755. mld_hash_obj->mld_peer_hash.bins = NULL;
  1756. qdf_spinlock_destroy(&mld_hash_obj->mld_peer_hash_lock);
  1757. }
  1758. }
  1759. #ifdef WLAN_MLO_MULTI_CHIP
  1760. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  1761. {
  1762. /* In case of MULTI chip MLO peer hash table when MLO global object
  1763. * is created, avoid from SOC attach path
  1764. */
  1765. return QDF_STATUS_SUCCESS;
  1766. }
  1767. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  1768. {
  1769. }
  1770. #else
  1771. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  1772. {
  1773. dp_mld_peer_hash_obj_t mld_hash_obj;
  1774. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1775. if (!mld_hash_obj)
  1776. return QDF_STATUS_E_FAILURE;
  1777. return dp_mlo_peer_find_hash_attach_be(mld_hash_obj, soc->max_peers);
  1778. }
  1779. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  1780. {
  1781. dp_mld_peer_hash_obj_t mld_hash_obj;
  1782. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1783. if (!mld_hash_obj)
  1784. return;
  1785. return dp_mlo_peer_find_hash_detach_be(mld_hash_obj);
  1786. }
  1787. #endif
  1788. #ifdef QCA_ENHANCED_STATS_SUPPORT
  1789. static uint8_t
  1790. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  1791. {
  1792. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  1793. return be_pdev->mlo_link_id;
  1794. }
  1795. #else
  1796. static uint8_t
  1797. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  1798. {
  1799. return 0;
  1800. }
  1801. #endif /* QCA_ENHANCED_STATS_SUPPORT */
  1802. static struct dp_peer *
  1803. dp_mlo_peer_find_hash_find_be(struct dp_soc *soc,
  1804. uint8_t *peer_mac_addr,
  1805. int mac_addr_is_aligned,
  1806. enum dp_mod_id mod_id,
  1807. uint8_t vdev_id)
  1808. {
  1809. union dp_align_mac_addr local_mac_addr_aligned, *mac_addr;
  1810. uint32_t index;
  1811. struct dp_peer *peer;
  1812. struct dp_vdev *vdev;
  1813. dp_mld_peer_hash_obj_t mld_hash_obj;
  1814. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1815. if (!mld_hash_obj)
  1816. return NULL;
  1817. if (!mld_hash_obj->mld_peer_hash.bins)
  1818. return NULL;
  1819. if (mac_addr_is_aligned) {
  1820. mac_addr = (union dp_align_mac_addr *)peer_mac_addr;
  1821. } else {
  1822. qdf_mem_copy(
  1823. &local_mac_addr_aligned.raw[0],
  1824. peer_mac_addr, QDF_MAC_ADDR_SIZE);
  1825. mac_addr = &local_mac_addr_aligned;
  1826. }
  1827. if (vdev_id != DP_VDEV_ALL) {
  1828. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, mod_id);
  1829. if (!vdev) {
  1830. dp_err("vdev is null");
  1831. return NULL;
  1832. }
  1833. } else {
  1834. vdev = NULL;
  1835. }
  1836. /* search mld peer table if no link peer for given mac address */
  1837. index = dp_mlo_peer_find_hash_index(mld_hash_obj, mac_addr);
  1838. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1839. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  1840. hash_list_elem) {
  1841. if (dp_peer_find_mac_addr_cmp(mac_addr, &peer->mac_addr) == 0) {
  1842. if ((vdev_id == DP_VDEV_ALL) || (
  1843. dp_peer_find_mac_addr_cmp(
  1844. &peer->vdev->mld_mac_addr,
  1845. &vdev->mld_mac_addr) == 0)) {
  1846. /* take peer reference before returning */
  1847. if (dp_peer_get_ref(NULL, peer, mod_id) !=
  1848. QDF_STATUS_SUCCESS)
  1849. peer = NULL;
  1850. if (vdev)
  1851. dp_vdev_unref_delete(soc, vdev, mod_id);
  1852. qdf_spin_unlock_bh(
  1853. &mld_hash_obj->mld_peer_hash_lock);
  1854. return peer;
  1855. }
  1856. }
  1857. }
  1858. if (vdev)
  1859. dp_vdev_unref_delete(soc, vdev, mod_id);
  1860. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1861. return NULL; /* failure */
  1862. }
  1863. static void
  1864. dp_mlo_peer_find_hash_remove_be(struct dp_soc *soc, struct dp_peer *peer)
  1865. {
  1866. uint32_t index;
  1867. struct dp_peer *tmppeer = NULL;
  1868. int found = 0;
  1869. dp_mld_peer_hash_obj_t mld_hash_obj;
  1870. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1871. if (!mld_hash_obj)
  1872. return;
  1873. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  1874. QDF_ASSERT(!TAILQ_EMPTY(&mld_hash_obj->mld_peer_hash.bins[index]));
  1875. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1876. TAILQ_FOREACH(tmppeer, &mld_hash_obj->mld_peer_hash.bins[index],
  1877. hash_list_elem) {
  1878. if (tmppeer == peer) {
  1879. found = 1;
  1880. break;
  1881. }
  1882. }
  1883. QDF_ASSERT(found);
  1884. TAILQ_REMOVE(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  1885. hash_list_elem);
  1886. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") removed. (found %u)",
  1887. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw), found);
  1888. dp_peer_unref_delete(peer, DP_MOD_ID_CONFIG);
  1889. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1890. }
  1891. static void
  1892. dp_mlo_peer_find_hash_add_be(struct dp_soc *soc, struct dp_peer *peer)
  1893. {
  1894. uint32_t index;
  1895. dp_mld_peer_hash_obj_t mld_hash_obj;
  1896. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1897. if (!mld_hash_obj)
  1898. return;
  1899. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  1900. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1901. if (QDF_IS_STATUS_ERROR(dp_peer_get_ref(NULL, peer,
  1902. DP_MOD_ID_CONFIG))) {
  1903. dp_err("fail to get peer ref:" QDF_MAC_ADDR_FMT,
  1904. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1905. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1906. return;
  1907. }
  1908. TAILQ_INSERT_TAIL(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  1909. hash_list_elem);
  1910. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1911. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") added",
  1912. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1913. }
  1914. void dp_print_mlo_ast_stats_be(struct dp_soc *soc)
  1915. {
  1916. uint32_t index;
  1917. struct dp_peer *peer;
  1918. dp_mld_peer_hash_obj_t mld_hash_obj;
  1919. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1920. if (!mld_hash_obj)
  1921. return;
  1922. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1923. for (index = 0; index < mld_hash_obj->mld_peer_hash.mask; index++) {
  1924. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  1925. hash_list_elem) {
  1926. dp_print_peer_ast_entries(soc, peer, NULL);
  1927. }
  1928. }
  1929. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1930. }
  1931. #endif
  1932. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  1933. static void dp_reconfig_tx_vdev_mcast_ctrl_be(struct dp_soc *soc,
  1934. struct dp_vdev *vdev)
  1935. {
  1936. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1937. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1938. hal_soc_handle_t hal_soc = soc->hal_soc;
  1939. uint8_t vdev_id = vdev->vdev_id;
  1940. if (vdev->opmode == wlan_op_mode_sta) {
  1941. if (vdev->pdev->isolation)
  1942. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  1943. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1944. else
  1945. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  1946. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  1947. } else if (vdev->opmode == wlan_op_mode_ap) {
  1948. hal_tx_mcast_mlo_reinject_routing_set(
  1949. hal_soc,
  1950. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  1951. if (vdev->mlo_vdev) {
  1952. hal_tx_vdev_mcast_ctrl_set(
  1953. hal_soc,
  1954. vdev_id,
  1955. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  1956. } else {
  1957. hal_tx_vdev_mcast_ctrl_set(hal_soc,
  1958. vdev_id,
  1959. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1960. }
  1961. }
  1962. }
  1963. static void dp_bank_reconfig_be(struct dp_soc *soc, struct dp_vdev *vdev)
  1964. {
  1965. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1966. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1967. union hal_tx_bank_config *bank_config;
  1968. if (!be_vdev || be_vdev->bank_id == DP_BE_INVALID_BANK_ID)
  1969. return;
  1970. bank_config = &be_soc->bank_profiles[be_vdev->bank_id].bank_config;
  1971. hal_tx_populate_bank_register(be_soc->soc.hal_soc, bank_config,
  1972. be_vdev->bank_id);
  1973. }
  1974. #endif
  1975. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1976. defined(WLAN_MCAST_MLO)
  1977. static void dp_mlo_mcast_reset_pri_mcast(struct dp_vdev_be *be_vdev,
  1978. struct dp_vdev *ptnr_vdev,
  1979. void *arg)
  1980. {
  1981. struct dp_vdev_be *be_ptnr_vdev =
  1982. dp_get_be_vdev_from_dp_vdev(ptnr_vdev);
  1983. be_ptnr_vdev->mcast_primary = false;
  1984. }
  1985. #if defined(CONFIG_MLO_SINGLE_DEV)
  1986. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  1987. struct dp_vdev *vdev,
  1988. cdp_config_param_type val)
  1989. {
  1990. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1991. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  1992. be_vdev->vdev.pdev->soc);
  1993. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  1994. vdev->mlo_vdev = true;
  1995. if (be_vdev->mcast_primary) {
  1996. struct cdp_txrx_peer_params_update params = {0};
  1997. params.chip_id = be_soc->mlo_chip_id;
  1998. params.pdev_id = be_vdev->vdev.pdev->pdev_id;
  1999. params.osif_vdev = be_vdev->vdev.osif_vdev;
  2000. dp_wdi_event_handler(
  2001. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2002. be_vdev->vdev.pdev->soc,
  2003. (void *)&params, CDP_INVALID_PEER,
  2004. WDI_NO_VAL, params.pdev_id);
  2005. }
  2006. }
  2007. static
  2008. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2009. struct dp_peer *peer,
  2010. struct cdp_vdev_stats **vdev_stats)
  2011. {
  2012. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2013. if (!IS_DP_LEGACY_PEER(peer))
  2014. *vdev_stats = &be_vdev->mlo_stats;
  2015. }
  2016. #else
  2017. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2018. struct dp_vdev *vdev,
  2019. cdp_config_param_type val)
  2020. {
  2021. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2022. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2023. be_vdev->vdev.pdev->soc);
  2024. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2025. vdev->mlo_vdev = true;
  2026. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2027. vdev->vdev_id,
  2028. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  2029. if (be_vdev->mcast_primary) {
  2030. struct cdp_txrx_peer_params_update params = {0};
  2031. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2032. dp_mlo_mcast_reset_pri_mcast,
  2033. (void *)&be_vdev->mcast_primary,
  2034. DP_MOD_ID_TX_MCAST);
  2035. params.chip_id = be_soc->mlo_chip_id;
  2036. params.pdev_id = vdev->pdev->pdev_id;
  2037. params.osif_vdev = vdev->osif_vdev;
  2038. dp_wdi_event_handler(
  2039. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2040. vdev->pdev->soc,
  2041. (void *)&params, CDP_INVALID_PEER,
  2042. WDI_NO_VAL, params.pdev_id);
  2043. }
  2044. }
  2045. #endif
  2046. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2047. struct dp_vdev *vdev,
  2048. cdp_config_param_type val)
  2049. {
  2050. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2051. be_vdev->mcast_primary = false;
  2052. vdev->mlo_vdev = false;
  2053. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2054. vdev->vdev_id,
  2055. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2056. }
  2057. /**
  2058. * dp_txrx_get_vdev_mcast_param_be() - Target specific ops for getting vdev
  2059. * params related to multicast
  2060. * @soc: DP soc handle
  2061. * @vdev: pointer to vdev structure
  2062. * @val: buffer address
  2063. *
  2064. * Return: QDF_STATUS
  2065. */
  2066. static
  2067. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2068. struct dp_vdev *vdev,
  2069. cdp_config_param_type *val)
  2070. {
  2071. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2072. if (be_vdev->mcast_primary)
  2073. val->cdp_vdev_param_mcast_vdev = true;
  2074. else
  2075. val->cdp_vdev_param_mcast_vdev = false;
  2076. return QDF_STATUS_SUCCESS;
  2077. }
  2078. #else
  2079. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2080. struct dp_vdev *vdev,
  2081. cdp_config_param_type val)
  2082. {
  2083. }
  2084. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2085. struct dp_vdev *vdev,
  2086. cdp_config_param_type val)
  2087. {
  2088. }
  2089. static
  2090. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2091. struct dp_vdev *vdev,
  2092. cdp_config_param_type *val)
  2093. {
  2094. return QDF_STATUS_SUCCESS;
  2095. }
  2096. static
  2097. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2098. struct dp_peer *peer,
  2099. struct cdp_vdev_stats **vdev_stats)
  2100. {
  2101. }
  2102. #endif
  2103. #ifdef DP_TX_IMPLICIT_RBM_MAPPING
  2104. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2105. uint8_t tx_ring_id,
  2106. uint8_t bm_id)
  2107. {
  2108. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  2109. soc->tcl_data_ring[tx_ring_id].hal_srng,
  2110. bm_id);
  2111. }
  2112. #else
  2113. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2114. uint8_t tx_ring_id,
  2115. uint8_t bm_id)
  2116. {
  2117. }
  2118. #endif
  2119. /**
  2120. * dp_txrx_set_vdev_param_be() - Target specific ops while setting vdev params
  2121. * @soc: DP soc handle
  2122. * @vdev: pointer to vdev structure
  2123. * @param: parameter type to get value
  2124. * @val: value
  2125. *
  2126. * Return: QDF_STATUS
  2127. */
  2128. static
  2129. QDF_STATUS dp_txrx_set_vdev_param_be(struct dp_soc *soc,
  2130. struct dp_vdev *vdev,
  2131. enum cdp_vdev_param_type param,
  2132. cdp_config_param_type val)
  2133. {
  2134. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2135. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2136. switch (param) {
  2137. case CDP_TX_ENCAP_TYPE:
  2138. case CDP_UPDATE_DSCP_TO_TID_MAP:
  2139. case CDP_UPDATE_TDLS_FLAGS:
  2140. dp_tx_update_bank_profile(be_soc, be_vdev);
  2141. break;
  2142. case CDP_ENABLE_CIPHER:
  2143. if (vdev->tx_encap_type == htt_cmn_pkt_type_raw)
  2144. dp_tx_update_bank_profile(be_soc, be_vdev);
  2145. break;
  2146. case CDP_SET_MCAST_VDEV:
  2147. dp_txrx_set_mlo_mcast_primary_vdev_param_be(vdev, val);
  2148. break;
  2149. case CDP_RESET_MLO_MCAST_VDEV:
  2150. dp_txrx_reset_mlo_mcast_primary_vdev_param_be(vdev, val);
  2151. break;
  2152. default:
  2153. dp_warn("invalid param %d", param);
  2154. break;
  2155. }
  2156. return QDF_STATUS_SUCCESS;
  2157. }
  2158. #ifdef WLAN_FEATURE_11BE_MLO
  2159. #ifdef DP_USE_REDUCED_PEER_ID_FIELD_WIDTH
  2160. static inline void
  2161. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2162. {
  2163. soc->peer_id_shift = dp_log2_ceil(soc->max_peers);
  2164. soc->peer_id_mask = (1 << soc->peer_id_shift) - 1;
  2165. /*
  2166. * Double the peers since we use ML indication bit
  2167. * alongwith peer_id to find peers.
  2168. */
  2169. soc->max_peer_id = 1 << (soc->peer_id_shift + 1);
  2170. }
  2171. #else
  2172. static inline void
  2173. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2174. {
  2175. soc->max_peer_id =
  2176. (1 << (HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_S + 1)) - 1;
  2177. }
  2178. #endif /* DP_USE_REDUCED_PEER_ID_FIELD_WIDTH */
  2179. #else
  2180. static inline void
  2181. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2182. {
  2183. soc->max_peer_id = soc->max_peers;
  2184. }
  2185. #endif /* WLAN_FEATURE_11BE_MLO */
  2186. static void dp_peer_map_detach_be(struct dp_soc *soc)
  2187. {
  2188. if (soc->host_ast_db_enable)
  2189. dp_peer_ast_hash_detach(soc);
  2190. }
  2191. static QDF_STATUS dp_peer_map_attach_be(struct dp_soc *soc)
  2192. {
  2193. QDF_STATUS status;
  2194. if (soc->host_ast_db_enable) {
  2195. status = dp_peer_ast_hash_attach(soc);
  2196. if (QDF_IS_STATUS_ERROR(status))
  2197. return status;
  2198. }
  2199. dp_soc_max_peer_id_set(soc);
  2200. return QDF_STATUS_SUCCESS;
  2201. }
  2202. static struct dp_peer *dp_find_peer_by_destmac_be(struct dp_soc *soc,
  2203. uint8_t *dest_mac,
  2204. uint8_t vdev_id)
  2205. {
  2206. struct dp_peer *peer = NULL;
  2207. struct dp_peer *tgt_peer = NULL;
  2208. struct dp_ast_entry *ast_entry = NULL;
  2209. uint16_t peer_id;
  2210. qdf_spin_lock_bh(&soc->ast_lock);
  2211. ast_entry = dp_peer_ast_hash_find_soc(soc, dest_mac);
  2212. if (!ast_entry) {
  2213. qdf_spin_unlock_bh(&soc->ast_lock);
  2214. dp_err("NULL ast entry");
  2215. return NULL;
  2216. }
  2217. peer_id = ast_entry->peer_id;
  2218. qdf_spin_unlock_bh(&soc->ast_lock);
  2219. if (peer_id == HTT_INVALID_PEER)
  2220. return NULL;
  2221. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_SAWF);
  2222. if (!peer) {
  2223. dp_err("NULL peer for peer_id:%d", peer_id);
  2224. return NULL;
  2225. }
  2226. tgt_peer = dp_get_tgt_peer_from_peer(peer);
  2227. /*
  2228. * Once tgt_peer is obtained,
  2229. * release the ref taken for original peer.
  2230. */
  2231. dp_peer_get_ref(NULL, tgt_peer, DP_MOD_ID_SAWF);
  2232. dp_peer_unref_delete(peer, DP_MOD_ID_SAWF);
  2233. return tgt_peer;
  2234. }
  2235. #ifdef WLAN_FEATURE_11BE_MLO
  2236. #ifdef WLAN_MCAST_MLO
  2237. static inline void
  2238. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2239. {
  2240. arch_ops->dp_tx_mcast_handler = dp_tx_mlo_mcast_handler_be;
  2241. arch_ops->dp_rx_mcast_handler = dp_rx_mlo_igmp_handler;
  2242. arch_ops->dp_tx_is_mcast_primary = dp_tx_mlo_is_mcast_primary_be;
  2243. }
  2244. #else /* WLAN_MCAST_MLO */
  2245. static inline void
  2246. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2247. {
  2248. }
  2249. #endif /* WLAN_MCAST_MLO */
  2250. #ifdef WLAN_MLO_MULTI_CHIP
  2251. static inline void
  2252. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2253. {
  2254. arch_ops->dp_partner_chips_map = dp_mlo_partner_chips_map;
  2255. arch_ops->dp_partner_chips_unmap = dp_mlo_partner_chips_unmap;
  2256. arch_ops->dp_soc_get_by_idle_bm_id = dp_soc_get_by_idle_bm_id;
  2257. }
  2258. #else
  2259. static inline void
  2260. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2261. {
  2262. }
  2263. #endif
  2264. static inline void
  2265. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2266. {
  2267. dp_initialize_arch_ops_be_mcast_mlo(arch_ops);
  2268. dp_initialize_arch_ops_be_mlo_multi_chip(arch_ops);
  2269. arch_ops->mlo_peer_find_hash_detach =
  2270. dp_mlo_peer_find_hash_detach_wrapper;
  2271. arch_ops->mlo_peer_find_hash_attach =
  2272. dp_mlo_peer_find_hash_attach_wrapper;
  2273. arch_ops->mlo_peer_find_hash_add = dp_mlo_peer_find_hash_add_be;
  2274. arch_ops->mlo_peer_find_hash_remove = dp_mlo_peer_find_hash_remove_be;
  2275. arch_ops->mlo_peer_find_hash_find = dp_mlo_peer_find_hash_find_be;
  2276. arch_ops->get_hw_link_id = dp_get_hw_link_id_be;
  2277. }
  2278. #else /* WLAN_FEATURE_11BE_MLO */
  2279. static inline void
  2280. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2281. {
  2282. }
  2283. #endif /* WLAN_FEATURE_11BE_MLO */
  2284. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  2285. #define DP_LMAC_PEER_ID_MSB_LEGACY 2
  2286. #define DP_LMAC_PEER_ID_MSB_MLO 3
  2287. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2288. struct cdp_peer_setup_info *setup_info,
  2289. enum cdp_host_reo_dest_ring *reo_dest,
  2290. bool *hash_based,
  2291. uint8_t *lmac_peer_id_msb)
  2292. {
  2293. struct dp_soc *soc = vdev->pdev->soc;
  2294. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2295. if (!be_soc->mlo_enabled)
  2296. return dp_vdev_get_default_reo_hash(vdev, reo_dest,
  2297. hash_based);
  2298. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2299. *reo_dest = vdev->pdev->reo_dest;
  2300. /* Not a ML link peer use non-mlo */
  2301. if (!setup_info) {
  2302. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2303. return;
  2304. }
  2305. /* For STA ML VAP we do not have num links info at this point
  2306. * use MLO case always
  2307. */
  2308. if (vdev->opmode == wlan_op_mode_sta) {
  2309. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2310. return;
  2311. }
  2312. /* For AP ML VAP consider the peer as ML only it associates with
  2313. * multiple links
  2314. */
  2315. if (setup_info->num_links == 1) {
  2316. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2317. return;
  2318. }
  2319. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2320. }
  2321. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2322. uint32_t *remap0,
  2323. uint32_t *remap1,
  2324. uint32_t *remap2)
  2325. {
  2326. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2327. uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
  2328. uint32_t reo_mlo_config =
  2329. wlan_cfg_mlo_rx_ring_map_get(soc->wlan_cfg_ctx);
  2330. if (!be_soc->mlo_enabled)
  2331. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  2332. *remap0 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  2333. *remap1 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_config);
  2334. *remap2 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  2335. return true;
  2336. }
  2337. #else
  2338. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2339. struct cdp_peer_setup_info *setup_info,
  2340. enum cdp_host_reo_dest_ring *reo_dest,
  2341. bool *hash_based,
  2342. uint8_t *lmac_peer_id_msb)
  2343. {
  2344. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  2345. }
  2346. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2347. uint32_t *remap0,
  2348. uint32_t *remap1,
  2349. uint32_t *remap2)
  2350. {
  2351. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  2352. }
  2353. #endif
  2354. #ifdef CONFIG_MLO_SINGLE_DEV
  2355. static inline
  2356. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  2357. {
  2358. arch_ops->dp_tx_mlo_mcast_send = dp_tx_mlo_mcast_send_be;
  2359. }
  2360. #else
  2361. static inline
  2362. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  2363. {
  2364. }
  2365. #endif
  2366. #ifdef IPA_OFFLOAD
  2367. static int8_t dp_ipa_get_bank_id_be(struct dp_soc *soc)
  2368. {
  2369. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2370. return be_soc->ipa_bank_id;
  2371. }
  2372. #ifdef QCA_IPA_LL_TX_FLOW_CONTROL
  2373. static void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  2374. {
  2375. *wdi_ver = IPA_WDI_4;
  2376. }
  2377. #else
  2378. static inline void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  2379. {
  2380. }
  2381. #endif
  2382. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  2383. {
  2384. arch_ops->ipa_get_bank_id = dp_ipa_get_bank_id_be;
  2385. arch_ops->ipa_get_wdi_ver = dp_ipa_get_wdi_version_be;
  2386. }
  2387. #else /* !IPA_OFFLOAD */
  2388. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  2389. {
  2390. }
  2391. #endif /* IPA_OFFLOAD */
  2392. void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
  2393. {
  2394. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2395. arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_be;
  2396. arch_ops->dp_rx_process = dp_rx_process_be;
  2397. arch_ops->dp_tx_send_fast = dp_tx_fast_send_be;
  2398. arch_ops->tx_comp_get_params_from_hal_desc =
  2399. dp_tx_comp_get_params_from_hal_desc_be;
  2400. arch_ops->dp_tx_process_htt_completion =
  2401. dp_tx_process_htt_completion_be;
  2402. arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_be;
  2403. arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_be;
  2404. arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_be;
  2405. arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_be;
  2406. arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_be;
  2407. arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_be;
  2408. arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
  2409. dp_wbm_get_rx_desc_from_hal_desc_be;
  2410. arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_be;
  2411. arch_ops->dp_rx_chain_msdus = dp_rx_chain_msdus_be;
  2412. arch_ops->dp_rx_wbm_err_reap_desc = dp_rx_wbm_err_reap_desc_be;
  2413. arch_ops->dp_rx_null_q_desc_handle = dp_rx_null_q_desc_handle_be;
  2414. #endif
  2415. arch_ops->txrx_get_context_size = dp_get_context_size_be;
  2416. #ifdef WIFI_MONITOR_SUPPORT
  2417. arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_be;
  2418. #endif
  2419. arch_ops->dp_rx_desc_cookie_2_va =
  2420. dp_rx_desc_cookie_2_va_be;
  2421. arch_ops->dp_rx_intrabss_mcast_handler =
  2422. dp_rx_intrabss_mcast_handler_be;
  2423. arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_be;
  2424. arch_ops->txrx_soc_attach = dp_soc_attach_be;
  2425. arch_ops->txrx_soc_detach = dp_soc_detach_be;
  2426. arch_ops->txrx_soc_init = dp_soc_init_be;
  2427. arch_ops->txrx_soc_deinit = dp_soc_deinit_be_wrapper;
  2428. arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_be;
  2429. arch_ops->txrx_soc_srng_init = dp_soc_srng_init_be;
  2430. arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_be;
  2431. arch_ops->txrx_soc_srng_free = dp_soc_srng_free_be;
  2432. arch_ops->txrx_pdev_attach = dp_pdev_attach_be;
  2433. arch_ops->txrx_pdev_detach = dp_pdev_detach_be;
  2434. arch_ops->txrx_vdev_attach = dp_vdev_attach_be;
  2435. arch_ops->txrx_vdev_detach = dp_vdev_detach_be;
  2436. arch_ops->txrx_peer_setup = dp_peer_setup_be;
  2437. arch_ops->txrx_peer_map_attach = dp_peer_map_attach_be;
  2438. arch_ops->txrx_peer_map_detach = dp_peer_map_detach_be;
  2439. arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_be;
  2440. arch_ops->dp_rx_peer_metadata_peer_id_get =
  2441. dp_rx_peer_metadata_peer_id_get_be;
  2442. arch_ops->soc_cfg_attach = dp_soc_cfg_attach_be;
  2443. arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_be;
  2444. arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_be;
  2445. dp_initialize_arch_ops_be_mlo(arch_ops);
  2446. #ifdef WLAN_MLO_MULTI_CHIP
  2447. arch_ops->dp_get_soc_by_chip_id = dp_get_soc_by_chip_id_be;
  2448. #endif
  2449. arch_ops->dp_soc_get_num_soc = dp_soc_get_num_soc_be;
  2450. arch_ops->dp_peer_rx_reorder_queue_setup =
  2451. dp_peer_rx_reorder_queue_setup_be;
  2452. arch_ops->dp_rx_peer_set_link_id = dp_rx_set_link_id_be;
  2453. arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_be;
  2454. arch_ops->dp_find_peer_by_destmac = dp_find_peer_by_destmac_be;
  2455. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  2456. arch_ops->dp_bank_reconfig = dp_bank_reconfig_be;
  2457. arch_ops->dp_reconfig_tx_vdev_mcast_ctrl =
  2458. dp_reconfig_tx_vdev_mcast_ctrl_be;
  2459. arch_ops->dp_cc_reg_cfg_init = dp_cc_reg_cfg_init;
  2460. #endif
  2461. #ifdef WLAN_SUPPORT_PPEDS
  2462. arch_ops->ppeds_handle_attached = dp_ppeds_handle_attached;
  2463. arch_ops->dp_txrx_ppeds_rings_status = dp_ppeds_rings_status;
  2464. arch_ops->txrx_soc_ppeds_start = dp_ppeds_start_soc_be;
  2465. arch_ops->txrx_soc_ppeds_stop = dp_ppeds_stop_soc_be;
  2466. arch_ops->dp_register_ppeds_interrupts = dp_register_ppeds_interrupts;
  2467. arch_ops->dp_free_ppeds_interrupts = dp_free_ppeds_interrupts;
  2468. arch_ops->dp_tx_ppeds_inuse_desc = dp_ppeds_inuse_desc;
  2469. arch_ops->dp_tx_ppeds_cfg_astidx_cache_mapping =
  2470. dp_tx_ppeds_cfg_astidx_cache_mapping;
  2471. #ifdef DP_UMAC_HW_RESET_SUPPORT
  2472. arch_ops->txrx_soc_ppeds_interrupt_stop = dp_ppeds_interrupt_stop_be;
  2473. arch_ops->txrx_soc_ppeds_interrupt_start = dp_ppeds_interrupt_start_be;
  2474. arch_ops->txrx_soc_ppeds_service_status_update =
  2475. dp_ppeds_service_status_update_be;
  2476. arch_ops->txrx_soc_ppeds_enabled_check = dp_ppeds_is_enabled_on_soc;
  2477. arch_ops->txrx_soc_ppeds_txdesc_pool_reset =
  2478. dp_ppeds_tx_desc_pool_reset;
  2479. #endif
  2480. #endif
  2481. dp_init_near_full_arch_ops_be(arch_ops);
  2482. arch_ops->get_reo_qdesc_addr = dp_rx_get_reo_qdesc_addr_be;
  2483. arch_ops->get_rx_hash_key = dp_get_rx_hash_key_be;
  2484. arch_ops->dp_set_rx_fst = dp_set_rx_fst_be;
  2485. arch_ops->dp_get_rx_fst = dp_get_rx_fst_be;
  2486. arch_ops->dp_rx_fst_deref = dp_rx_fst_release_ref_be;
  2487. arch_ops->dp_rx_fst_ref = dp_rx_fst_get_ref_be;
  2488. arch_ops->print_mlo_ast_stats = dp_print_mlo_ast_stats_be;
  2489. arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_be;
  2490. arch_ops->reo_remap_config = dp_reo_remap_config_be;
  2491. arch_ops->txrx_get_vdev_mcast_param = dp_txrx_get_vdev_mcast_param_be;
  2492. arch_ops->txrx_srng_init = dp_srng_init_be;
  2493. arch_ops->dp_get_vdev_stats_for_unmap_peer =
  2494. dp_get_vdev_stats_for_unmap_peer_be;
  2495. #ifdef WLAN_MLO_MULTI_CHIP
  2496. arch_ops->dp_get_interface_stats = dp_get_interface_stats_be;
  2497. #endif
  2498. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  2499. arch_ops->dp_update_ring_hptp = dp_update_ring_hptp;
  2500. #endif
  2501. dp_initialize_arch_ops_be_ipa(arch_ops);
  2502. dp_initialize_arch_ops_be_single_dev(arch_ops);
  2503. }
  2504. #ifdef QCA_SUPPORT_PRIMARY_LINK_MIGRATE
  2505. static void
  2506. dp_primary_link_migration(struct dp_soc *soc, void *cb_ctxt,
  2507. union hal_reo_status *reo_status)
  2508. {
  2509. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2510. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  2511. struct dp_soc *pr_soc = NULL;
  2512. struct dp_peer_info *pr_peer_info = (struct dp_peer_info *)cb_ctxt;
  2513. struct dp_peer *new_primary_peer = NULL;
  2514. struct dp_peer *mld_peer = NULL;
  2515. uint8_t primary_vdev_id;
  2516. struct cdp_txrx_peer_params_update params = {0};
  2517. uint8_t tid;
  2518. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, pr_peer_info->chip_id);
  2519. if (!pr_soc) {
  2520. dp_htt_err("Invalid soc");
  2521. qdf_mem_free(pr_peer_info);
  2522. return;
  2523. }
  2524. new_primary_peer = pr_soc->peer_id_to_obj_map[
  2525. pr_peer_info->primary_peer_id];
  2526. mld_peer = DP_GET_MLD_PEER_FROM_PEER(new_primary_peer);
  2527. if (!mld_peer) {
  2528. dp_htt_err("MLD peer is NULL");
  2529. qdf_mem_free(pr_peer_info);
  2530. return;
  2531. }
  2532. new_primary_peer->primary_link = 1;
  2533. /*
  2534. * Check if reo_qref_table_en is set and if
  2535. * rx_tid qdesc for tid 0 is already setup and perform
  2536. * qref write to LUT for Tid 0 and 16.
  2537. *
  2538. */
  2539. if (hal_reo_shared_qaddr_is_enable(pr_soc->hal_soc) &&
  2540. mld_peer->rx_tid[0].hw_qdesc_vaddr_unaligned) {
  2541. for (tid = 0; tid < DP_MAX_TIDS; tid++)
  2542. hal_reo_shared_qaddr_write(pr_soc->hal_soc,
  2543. mld_peer->peer_id,
  2544. tid,
  2545. mld_peer->rx_tid[tid].hw_qdesc_paddr);
  2546. }
  2547. if (pr_soc && pr_soc->cdp_soc.ol_ops->update_primary_link)
  2548. pr_soc->cdp_soc.ol_ops->update_primary_link(pr_soc->ctrl_psoc,
  2549. new_primary_peer->mac_addr.raw);
  2550. primary_vdev_id = new_primary_peer->vdev->vdev_id;
  2551. dp_vdev_unref_delete(soc, mld_peer->vdev, DP_MOD_ID_CHILD);
  2552. mld_peer->vdev = dp_vdev_get_ref_by_id(pr_soc, primary_vdev_id,
  2553. DP_MOD_ID_CHILD);
  2554. mld_peer->txrx_peer->vdev = mld_peer->vdev;
  2555. params.osif_vdev = (void *)new_primary_peer->vdev->osif_vdev;
  2556. params.peer_mac = mld_peer->mac_addr.raw;
  2557. params.chip_id = pr_peer_info->chip_id;
  2558. params.pdev_id = new_primary_peer->vdev->pdev->pdev_id;
  2559. if (new_primary_peer->vdev->opmode == wlan_op_mode_sta) {
  2560. dp_wdi_event_handler(
  2561. WDI_EVENT_STA_PRIMARY_UMAC_UPDATE,
  2562. pr_soc, (void *)&params,
  2563. new_primary_peer->peer_id,
  2564. WDI_NO_VAL, params.pdev_id);
  2565. } else {
  2566. dp_wdi_event_handler(
  2567. WDI_EVENT_PEER_PRIMARY_UMAC_UPDATE,
  2568. pr_soc, (void *)&params,
  2569. new_primary_peer->peer_id,
  2570. WDI_NO_VAL, params.pdev_id);
  2571. }
  2572. qdf_mem_free(pr_peer_info);
  2573. }
  2574. #ifdef WLAN_SUPPORT_PPEDS
  2575. static QDF_STATUS dp_get_ppe_info_for_vap(struct cdp_soc_t *cdp_soc,
  2576. struct dp_soc *mld_soc,
  2577. struct dp_peer *pr_peer,
  2578. uint16_t *src_info)
  2579. {
  2580. struct dp_soc_be *be_soc_mld = NULL;
  2581. struct cdp_ds_vp_params vp_params = {0};
  2582. struct dp_ppe_vp_profile *ppe_vp_profile;
  2583. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  2584. /*
  2585. * Extract the VP profile from the VAP
  2586. */
  2587. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  2588. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  2589. return QDF_STATUS_E_NULL_VALUE;
  2590. }
  2591. /*
  2592. * Check if PPE DS routing is enabled on the associated vap.
  2593. */
  2594. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(
  2595. mld_soc->ctrl_psoc,
  2596. pr_peer->vdev->vdev_id,
  2597. &vp_params);
  2598. if (QDF_IS_STATUS_ERROR(qdf_status)) {
  2599. dp_err("Could not find ppeds profile info");
  2600. return QDF_STATUS_E_NULL_VALUE;
  2601. }
  2602. /* Check if PPE DS routing is enabled on
  2603. * the associated vap.
  2604. */
  2605. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  2606. return qdf_status;
  2607. be_soc_mld = dp_get_be_soc_from_dp_soc(mld_soc);
  2608. ppe_vp_profile = &be_soc_mld->ppe_vp_profile[
  2609. vp_params.ppe_vp_profile_idx];
  2610. *src_info = ppe_vp_profile->vp_num;
  2611. return qdf_status;
  2612. }
  2613. #else
  2614. static QDF_STATUS dp_get_ppe_info_for_vap(struct cdp_soc_t *cdp_soc,
  2615. struct dp_soc *mld_soc,
  2616. struct dp_peer *pr_peer,
  2617. uint16_t *src_info)
  2618. {
  2619. return QDF_STATUS_E_NOSUPPORT;
  2620. }
  2621. #endif
  2622. QDF_STATUS dp_htt_reo_migration(struct dp_soc *soc, uint16_t peer_id,
  2623. uint16_t ml_peer_id, uint16_t vdev_id,
  2624. uint8_t pdev_id, uint8_t chip_id)
  2625. {
  2626. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2627. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  2628. uint16_t mld_peer_id = dp_gen_ml_peer_id(soc, ml_peer_id);
  2629. struct dp_soc *pr_soc = NULL;
  2630. struct dp_soc *current_pr_soc = NULL;
  2631. struct hal_reo_cmd_params params;
  2632. struct dp_rx_tid *rx_tid;
  2633. struct dp_peer *pr_peer = NULL;
  2634. struct dp_peer *mld_peer = NULL;
  2635. struct dp_soc *mld_soc = NULL;
  2636. struct dp_peer *current_pr_peer = NULL;
  2637. struct dp_peer_info *peer_info;
  2638. struct dp_vdev_be *be_vdev;
  2639. struct cdp_soc_t *cdp_soc;
  2640. uint16_t src_info = 0;
  2641. QDF_STATUS status;
  2642. if (!dp_mlo) {
  2643. dp_htt_err("Invalid dp_mlo ctxt");
  2644. return QDF_STATUS_E_FAILURE;
  2645. }
  2646. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, chip_id);
  2647. if (!pr_soc) {
  2648. dp_htt_err("Invalid soc");
  2649. return QDF_STATUS_E_FAILURE;
  2650. }
  2651. pr_peer = pr_soc->peer_id_to_obj_map[peer_id];
  2652. if (!pr_peer || !(IS_MLO_DP_LINK_PEER(pr_peer))) {
  2653. dp_htt_err("Invalid peer");
  2654. return QDF_STATUS_E_FAILURE;
  2655. }
  2656. mld_peer = DP_GET_MLD_PEER_FROM_PEER(pr_peer);
  2657. if (!mld_peer || (mld_peer->peer_id != mld_peer_id)) {
  2658. dp_htt_err("Invalid mld peer");
  2659. return QDF_STATUS_E_FAILURE;
  2660. }
  2661. current_pr_peer = dp_get_primary_link_peer_by_id(
  2662. pr_soc,
  2663. mld_peer->peer_id,
  2664. DP_MOD_ID_HTT);
  2665. if (!current_pr_peer || (current_pr_peer == pr_peer)) {
  2666. dp_htt_err("Invalid peer");
  2667. return QDF_STATUS_E_FAILURE;
  2668. }
  2669. be_vdev = dp_get_be_vdev_from_dp_vdev(pr_peer->vdev);
  2670. if (!be_vdev) {
  2671. dp_htt_err("Invalid be vdev");
  2672. return QDF_STATUS_E_FAILURE;
  2673. }
  2674. mld_soc = mld_peer->vdev->pdev->soc;
  2675. cdp_soc = &mld_soc->cdp_soc;
  2676. status = dp_get_ppe_info_for_vap(cdp_soc, mld_soc, pr_peer, &src_info);
  2677. if (status == QDF_STATUS_E_NULL_VALUE) {
  2678. dp_htt_err("Invalid ppe info for the vdev");
  2679. return QDF_STATUS_E_FAILURE;
  2680. }
  2681. current_pr_soc = current_pr_peer->vdev->pdev->soc;
  2682. /* Making existing primary peer as non primary */
  2683. current_pr_peer->primary_link = 0;
  2684. dp_peer_unref_delete(current_pr_peer, DP_MOD_ID_HTT);
  2685. dp_peer_rx_reo_shared_qaddr_delete(current_pr_soc, mld_peer);
  2686. peer_info = qdf_mem_malloc(sizeof(struct dp_peer_info));
  2687. if (!peer_info) {
  2688. dp_htt_err("Malloc failed");
  2689. return QDF_STATUS_E_FAILURE;
  2690. }
  2691. peer_info->primary_peer_id = peer_id;
  2692. peer_info->chip_id = chip_id;
  2693. qdf_mem_zero(&params, sizeof(params));
  2694. rx_tid = &mld_peer->rx_tid[0];
  2695. params.std.need_status = 1;
  2696. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  2697. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  2698. params.u.fl_cache_params.flush_no_inval = 0;
  2699. params.u.fl_cache_params.flush_entire_cache = 1;
  2700. status = dp_reo_send_cmd(current_pr_soc, CMD_FLUSH_CACHE, &params,
  2701. dp_primary_link_migration,
  2702. (void *)peer_info);
  2703. if (status != QDF_STATUS_SUCCESS) {
  2704. dp_htt_err("Reo flush failed");
  2705. qdf_mem_free(peer_info);
  2706. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  2707. chip_id, peer_id, ml_peer_id,
  2708. src_info, QDF_STATUS_E_FAILURE);
  2709. }
  2710. qdf_mem_zero(&params, sizeof(params));
  2711. params.std.need_status = 0;
  2712. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  2713. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  2714. params.u.unblk_cache_params.type = UNBLOCK_CACHE;
  2715. dp_reo_send_cmd(current_pr_soc, CMD_UNBLOCK_CACHE, &params, NULL, NULL);
  2716. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  2717. chip_id, peer_id, ml_peer_id,
  2718. src_info, QDF_STATUS_SUCCESS);
  2719. return QDF_STATUS_SUCCESS;
  2720. }
  2721. #endif