rouleur.c 67 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #define DRV_NAME "rouleur_codec"
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define ROULEUR_VERSION_1_0 1
  31. #define ROULEUR_VERSION_ENTRY_SIZE 32
  32. #define NUM_ATTEMPTS 5
  33. enum {
  34. CODEC_TX = 0,
  35. CODEC_RX,
  36. };
  37. enum {
  38. ALLOW_VPOS_DISABLE,
  39. HPH_COMP_DELAY,
  40. HPH_PA_DELAY,
  41. AMIC2_BCS_ENABLE,
  42. };
  43. /* TODO: Check on the step values */
  44. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  45. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  46. static int rouleur_handle_post_irq(void *data);
  47. static int rouleur_reset(struct device *dev, int val);
  48. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  49. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  50. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  51. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  52. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  53. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  66. };
  67. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  68. .name = "rouleur",
  69. .irqs = ROULEUR_IRQs,
  70. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  71. .num_regs = 3,
  72. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  73. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  74. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  75. .use_ack = 1,
  76. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  77. .runtime_pm = false,
  78. .handle_post_irq = rouleur_handle_post_irq,
  79. .irq_drv_data = NULL,
  80. };
  81. static int rouleur_handle_post_irq(void *data)
  82. {
  83. struct rouleur_priv *rouleur = data;
  84. u32 status1 = 0, status2 = 0, status3 = 0;
  85. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  86. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  87. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  88. rouleur->tx_swr_dev->slave_irq_pending =
  89. ((status1 || status2 || status3) ? true : false);
  90. return IRQ_HANDLED;
  91. }
  92. static int rouleur_init_reg(struct snd_soc_component *component)
  93. {
  94. /* Enable surge protection */
  95. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  96. 0xC0, 0xC0);
  97. return 0;
  98. }
  99. static int rouleur_set_port_params(struct snd_soc_component *component,
  100. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  101. u8 *ch_mask, u32 *ch_rate,
  102. u8 *port_type, u8 path)
  103. {
  104. int i, j;
  105. u8 num_ports = 0;
  106. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  107. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  108. switch (path) {
  109. case CODEC_RX:
  110. map = &rouleur->rx_port_mapping;
  111. num_ports = rouleur->num_rx_ports;
  112. break;
  113. case CODEC_TX:
  114. map = &rouleur->tx_port_mapping;
  115. num_ports = rouleur->num_tx_ports;
  116. break;
  117. default:
  118. dev_err(component->dev, "%s Invalid path: %d\n",
  119. __func__, path);
  120. return -EINVAL;
  121. }
  122. for (i = 0; i <= num_ports; i++) {
  123. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  124. if ((*map)[i][j].slave_port_type == slv_prt_type)
  125. goto found;
  126. }
  127. }
  128. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  129. __func__, slv_prt_type);
  130. return -EINVAL;
  131. found:
  132. *port_id = i;
  133. *num_ch = (*map)[i][j].num_ch;
  134. *ch_mask = (*map)[i][j].ch_mask;
  135. *ch_rate = (*map)[i][j].ch_rate;
  136. *port_type = (*map)[i][j].master_port_type;
  137. return 0;
  138. }
  139. static int rouleur_parse_port_mapping(struct device *dev,
  140. char *prop, u8 path)
  141. {
  142. u32 *dt_array, map_size, map_length;
  143. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  144. u32 slave_port_type, master_port_type;
  145. u32 i, ch_iter = 0;
  146. int ret = 0;
  147. u8 *num_ports = NULL;
  148. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  149. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  150. switch (path) {
  151. case CODEC_RX:
  152. map = &rouleur->rx_port_mapping;
  153. num_ports = &rouleur->num_rx_ports;
  154. break;
  155. case CODEC_TX:
  156. map = &rouleur->tx_port_mapping;
  157. num_ports = &rouleur->num_tx_ports;
  158. break;
  159. default:
  160. dev_err(dev, "%s Invalid path: %d\n",
  161. __func__, path);
  162. return -EINVAL;
  163. }
  164. if (!of_find_property(dev->of_node, prop,
  165. &map_size)) {
  166. dev_err(dev, "missing port mapping prop %s\n", prop);
  167. ret = -EINVAL;
  168. goto err;
  169. }
  170. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  171. dt_array = kzalloc(map_size, GFP_KERNEL);
  172. if (!dt_array) {
  173. ret = -ENOMEM;
  174. goto err;
  175. }
  176. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  177. NUM_SWRS_DT_PARAMS * map_length);
  178. if (ret) {
  179. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  180. __func__, prop);
  181. ret = -EINVAL;
  182. goto err_pdata_fail;
  183. }
  184. for (i = 0; i < map_length; i++) {
  185. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  186. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  187. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  188. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  189. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  190. if (port_num != old_port_num)
  191. ch_iter = 0;
  192. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  193. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  194. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  195. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  196. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  197. old_port_num = port_num;
  198. }
  199. *num_ports = port_num;
  200. err_pdata_fail:
  201. kfree(dt_array);
  202. err:
  203. return ret;
  204. }
  205. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  206. u8 slv_port_type, u8 enable)
  207. {
  208. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  209. u8 port_id;
  210. u8 num_ch;
  211. u8 ch_mask;
  212. u32 ch_rate;
  213. u8 port_type;
  214. u8 num_port = 1;
  215. int ret = 0;
  216. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  217. &num_ch, &ch_mask, &ch_rate,
  218. &port_type, CODEC_TX);
  219. if (ret) {
  220. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  221. __func__, ret);
  222. return ret;
  223. }
  224. if (enable)
  225. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  226. num_port, &ch_mask, &ch_rate,
  227. &num_ch, &port_type);
  228. else
  229. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  230. num_port, &ch_mask, &port_type);
  231. return ret;
  232. }
  233. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  234. u8 slv_port_type, u8 enable)
  235. {
  236. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  237. u8 port_id;
  238. u8 num_ch;
  239. u8 ch_mask;
  240. u32 ch_rate;
  241. u8 port_type;
  242. u8 num_port = 1;
  243. int ret = 0;
  244. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  245. &num_ch, &ch_mask, &ch_rate,
  246. &port_type, CODEC_RX);
  247. if (ret) {
  248. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  249. __func__, ret);
  250. return ret;
  251. }
  252. if (enable)
  253. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  254. num_port, &ch_mask, &ch_rate,
  255. &num_ch, &port_type);
  256. else
  257. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  258. num_port, &ch_mask, &port_type);
  259. return ret;
  260. }
  261. static int rouleur_global_mbias_enable(struct snd_soc_component *component)
  262. {
  263. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  264. mutex_lock(&rouleur->main_bias_lock);
  265. if (rouleur->mbias_cnt == 0) {
  266. snd_soc_component_update_bits(component,
  267. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  268. snd_soc_component_update_bits(component,
  269. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  270. usleep_range(1000, 1100);
  271. }
  272. rouleur->mbias_cnt++;
  273. mutex_unlock(&rouleur->main_bias_lock);
  274. return 0;
  275. }
  276. static int rouleur_global_mbias_disable(struct snd_soc_component *component)
  277. {
  278. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  279. mutex_lock(&rouleur->main_bias_lock);
  280. if (rouleur->mbias_cnt == 0) {
  281. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  282. mutex_unlock(&rouleur->main_bias_lock);
  283. return 0;
  284. }
  285. rouleur->mbias_cnt--;
  286. if (rouleur->mbias_cnt == 0) {
  287. snd_soc_component_update_bits(component,
  288. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  289. snd_soc_component_update_bits(component,
  290. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  291. }
  292. mutex_unlock(&rouleur->main_bias_lock);
  293. return 0;
  294. }
  295. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  296. {
  297. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  298. mutex_lock(&rouleur->rx_clk_lock);
  299. if (rouleur->rx_clk_cnt == 0) {
  300. snd_soc_component_update_bits(component,
  301. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  302. snd_soc_component_update_bits(component,
  303. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  304. usleep_range(5000, 5100);
  305. rouleur_global_mbias_enable(component);
  306. snd_soc_component_update_bits(component,
  307. ROULEUR_ANA_HPHPA_FSM_CLK, 0x11, 0x11);
  308. snd_soc_component_update_bits(component,
  309. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  310. snd_soc_component_update_bits(component,
  311. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  312. usleep_range(500, 510);
  313. }
  314. rouleur->rx_clk_cnt++;
  315. mutex_unlock(&rouleur->rx_clk_lock);
  316. return 0;
  317. }
  318. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  319. {
  320. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  321. mutex_lock(&rouleur->rx_clk_lock);
  322. if (rouleur->rx_clk_cnt == 0) {
  323. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  324. mutex_unlock(&rouleur->rx_clk_lock);
  325. return 0;
  326. }
  327. rouleur->rx_clk_cnt--;
  328. if (rouleur->rx_clk_cnt == 0) {
  329. snd_soc_component_update_bits(component,
  330. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  331. snd_soc_component_update_bits(component,
  332. ROULEUR_ANA_HPHPA_FSM_CLK, 0x11, 0x00);
  333. snd_soc_component_update_bits(component,
  334. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  335. rouleur_global_mbias_disable(component);
  336. snd_soc_component_update_bits(component,
  337. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  338. snd_soc_component_update_bits(component,
  339. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  340. }
  341. mutex_unlock(&rouleur->rx_clk_lock);
  342. return 0;
  343. }
  344. /*
  345. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  346. * @component: handle to snd_soc_component *
  347. *
  348. * return rouleur_mbhc handle or error code in case of failure
  349. */
  350. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  351. {
  352. struct rouleur_priv *rouleur;
  353. if (!component) {
  354. pr_err("%s: Invalid params, NULL component\n", __func__);
  355. return NULL;
  356. }
  357. rouleur = snd_soc_component_get_drvdata(component);
  358. if (!rouleur) {
  359. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  360. return NULL;
  361. }
  362. return rouleur->mbhc;
  363. }
  364. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  365. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  366. struct snd_kcontrol *kcontrol,
  367. int event)
  368. {
  369. struct snd_soc_component *component =
  370. snd_soc_dapm_to_component(w->dapm);
  371. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  372. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  373. w->name, event);
  374. switch (event) {
  375. case SND_SOC_DAPM_PRE_PMU:
  376. rouleur_rx_clk_enable(component);
  377. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  378. break;
  379. case SND_SOC_DAPM_POST_PMU:
  380. if (rouleur->comp1_enable) {
  381. snd_soc_component_update_bits(component,
  382. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  383. 0x02, 0x02);
  384. if (rouleur->comp2_enable)
  385. snd_soc_component_update_bits(component,
  386. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  387. 0x01, 0x01);
  388. /*
  389. * 5ms sleep is required after COMP is enabled as per
  390. * HW requirement
  391. */
  392. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  393. usleep_range(5000, 5100);
  394. clear_bit(HPH_COMP_DELAY,
  395. &rouleur->status_mask);
  396. }
  397. } else {
  398. snd_soc_component_update_bits(component,
  399. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  400. 0x02, 0x00);
  401. }
  402. snd_soc_component_update_bits(component,
  403. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  404. 0x7C, 0x7C);
  405. snd_soc_component_update_bits(component,
  406. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  407. 0x04, 0x04);
  408. snd_soc_component_update_bits(component,
  409. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  410. snd_soc_component_update_bits(component,
  411. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  412. 0x03, 0x03);
  413. break;
  414. case SND_SOC_DAPM_POST_PMD:
  415. snd_soc_component_update_bits(component,
  416. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  417. 0x03, 0x00);
  418. snd_soc_component_update_bits(component,
  419. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  420. 0x01, 0x00);
  421. break;
  422. }
  423. return 0;
  424. }
  425. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  426. struct snd_kcontrol *kcontrol,
  427. int event)
  428. {
  429. struct snd_soc_component *component =
  430. snd_soc_dapm_to_component(w->dapm);
  431. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  432. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  433. w->name, event);
  434. switch (event) {
  435. case SND_SOC_DAPM_PRE_PMU:
  436. rouleur_rx_clk_enable(component);
  437. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  438. break;
  439. case SND_SOC_DAPM_POST_PMU:
  440. if (rouleur->comp2_enable) {
  441. snd_soc_component_update_bits(component,
  442. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  443. 0x01, 0x01);
  444. if (rouleur->comp1_enable)
  445. snd_soc_component_update_bits(component,
  446. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  447. 0x02, 0x02);
  448. /*
  449. * 5ms sleep is required after COMP is enabled as per
  450. * HW requirement
  451. */
  452. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  453. usleep_range(5000, 5100);
  454. clear_bit(HPH_COMP_DELAY,
  455. &rouleur->status_mask);
  456. }
  457. } else {
  458. snd_soc_component_update_bits(component,
  459. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  460. 0x01, 0x00);
  461. }
  462. snd_soc_component_update_bits(component,
  463. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  464. 0x7C, 0x7C);
  465. snd_soc_component_update_bits(component,
  466. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  467. 0x08, 0x08);
  468. snd_soc_component_update_bits(component,
  469. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  470. snd_soc_component_update_bits(component,
  471. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  472. 0x03, 0x03);
  473. break;
  474. case SND_SOC_DAPM_POST_PMD:
  475. snd_soc_component_update_bits(component,
  476. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  477. 0x03, 0x00);
  478. snd_soc_component_update_bits(component,
  479. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  480. break;
  481. }
  482. return 0;
  483. }
  484. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  485. struct snd_kcontrol *kcontrol,
  486. int event)
  487. {
  488. struct snd_soc_component *component =
  489. snd_soc_dapm_to_component(w->dapm);
  490. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  491. w->name, event);
  492. switch (event) {
  493. case SND_SOC_DAPM_PRE_PMU:
  494. rouleur_rx_clk_enable(component);
  495. snd_soc_component_update_bits(component,
  496. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  497. 0x7C, 0x7C);
  498. snd_soc_component_update_bits(component,
  499. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  500. 0x01, 0x01);
  501. snd_soc_component_update_bits(component,
  502. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  503. 0x03, 0x03);
  504. snd_soc_component_update_bits(component,
  505. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  506. 0x04, 0x04);
  507. break;
  508. case SND_SOC_DAPM_POST_PMD:
  509. snd_soc_component_update_bits(component,
  510. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  511. 0x03, 0x00);
  512. snd_soc_component_update_bits(component,
  513. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  514. 0x01, 0x00);
  515. break;
  516. };
  517. return 0;
  518. }
  519. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  520. struct snd_kcontrol *kcontrol,
  521. int event)
  522. {
  523. struct snd_soc_component *component =
  524. snd_soc_dapm_to_component(w->dapm);
  525. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  526. int ret = 0;
  527. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  528. w->name, event);
  529. switch (event) {
  530. case SND_SOC_DAPM_PRE_PMU:
  531. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  532. rouleur->rx_swr_dev->dev_num,
  533. true);
  534. snd_soc_component_update_bits(component,
  535. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  536. 0x40, 0x40);
  537. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  538. /* TODO: WHY SECOND TIME */
  539. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  540. rouleur->rx_swr_dev->dev_num,
  541. true);
  542. break;
  543. case SND_SOC_DAPM_POST_PMU:
  544. /*
  545. * 5ms sleep is required after PA is enabled as per
  546. * HW requirement.
  547. */
  548. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  549. usleep_range(5000, 5100);
  550. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  551. }
  552. if (rouleur->update_wcd_event)
  553. rouleur->update_wcd_event(rouleur->handle,
  554. WCD_BOLERO_EVT_RX_MUTE,
  555. (WCD_RX2 << 0x10));
  556. wcd_enable_irq(&rouleur->irq_info,
  557. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  558. break;
  559. case SND_SOC_DAPM_PRE_PMD:
  560. wcd_disable_irq(&rouleur->irq_info,
  561. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  562. if (rouleur->update_wcd_event)
  563. rouleur->update_wcd_event(rouleur->handle,
  564. WCD_BOLERO_EVT_RX_MUTE,
  565. (WCD_RX2 << 0x10 | 0x1));
  566. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  567. WCD_EVENT_PRE_HPHR_PA_OFF,
  568. &rouleur->mbhc->wcd_mbhc);
  569. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  570. break;
  571. case SND_SOC_DAPM_POST_PMD:
  572. /*
  573. * 7ms sleep is required after PA is disabled as per
  574. * HW requirement. If compander is disabled, then
  575. * 20ms delay is required.
  576. */
  577. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  578. usleep_range(5000, 5100);
  579. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  580. }
  581. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  582. WCD_EVENT_POST_HPHR_PA_OFF,
  583. &rouleur->mbhc->wcd_mbhc);
  584. snd_soc_component_update_bits(component,
  585. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  586. 0x40, 0x00);
  587. break;
  588. };
  589. return ret;
  590. }
  591. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  592. struct snd_kcontrol *kcontrol,
  593. int event)
  594. {
  595. struct snd_soc_component *component =
  596. snd_soc_dapm_to_component(w->dapm);
  597. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  598. int ret = 0;
  599. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  600. w->name, event);
  601. switch (event) {
  602. case SND_SOC_DAPM_PRE_PMU:
  603. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  604. rouleur->rx_swr_dev->dev_num,
  605. true);
  606. snd_soc_component_update_bits(component,
  607. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  608. 0x80, 0x80);
  609. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  610. break;
  611. case SND_SOC_DAPM_POST_PMU:
  612. /*
  613. * 5ms sleep is required after PA is enabled as per
  614. * HW requirement.
  615. */
  616. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  617. usleep_range(5000, 5100);
  618. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  619. }
  620. if (rouleur->update_wcd_event)
  621. rouleur->update_wcd_event(rouleur->handle,
  622. WCD_BOLERO_EVT_RX_MUTE,
  623. (WCD_RX1 << 0x10));
  624. wcd_enable_irq(&rouleur->irq_info,
  625. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  626. break;
  627. case SND_SOC_DAPM_PRE_PMD:
  628. wcd_disable_irq(&rouleur->irq_info,
  629. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  630. if (rouleur->update_wcd_event)
  631. rouleur->update_wcd_event(rouleur->handle,
  632. WCD_BOLERO_EVT_RX_MUTE,
  633. (WCD_RX1 << 0x10 | 0x1));
  634. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  635. WCD_EVENT_PRE_HPHL_PA_OFF,
  636. &rouleur->mbhc->wcd_mbhc);
  637. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  638. break;
  639. case SND_SOC_DAPM_POST_PMD:
  640. /*
  641. * 5ms sleep is required after PA is disabled as per
  642. * HW requirement.
  643. */
  644. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  645. usleep_range(5000, 5100);
  646. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  647. }
  648. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  649. WCD_EVENT_POST_HPHL_PA_OFF,
  650. &rouleur->mbhc->wcd_mbhc);
  651. snd_soc_component_update_bits(component,
  652. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  653. 0x80, 0x00);
  654. break;
  655. };
  656. return ret;
  657. }
  658. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  659. struct snd_kcontrol *kcontrol,
  660. int event)
  661. {
  662. struct snd_soc_component *component =
  663. snd_soc_dapm_to_component(w->dapm);
  664. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  665. int ret = 0;
  666. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  667. w->name, event);
  668. switch (event) {
  669. case SND_SOC_DAPM_PRE_PMU:
  670. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  671. rouleur->rx_swr_dev->dev_num,
  672. true);
  673. snd_soc_component_update_bits(component,
  674. ROULEUR_ANA_COMBOPA_CTL,
  675. 0x80, 0x80);
  676. usleep_range(5000, 5100);
  677. break;
  678. case SND_SOC_DAPM_POST_PMU:
  679. if (rouleur->update_wcd_event)
  680. rouleur->update_wcd_event(rouleur->handle,
  681. WCD_BOLERO_EVT_RX_MUTE,
  682. (WCD_RX1 << 0x10));
  683. wcd_enable_irq(&rouleur->irq_info,
  684. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  685. break;
  686. case SND_SOC_DAPM_PRE_PMD:
  687. wcd_disable_irq(&rouleur->irq_info,
  688. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  689. if (rouleur->update_wcd_event)
  690. rouleur->update_wcd_event(rouleur->handle,
  691. WCD_BOLERO_EVT_RX_MUTE,
  692. (WCD_RX1 << 0x10 | 0x1));
  693. break;
  694. case SND_SOC_DAPM_POST_PMD:
  695. snd_soc_component_update_bits(component,
  696. ROULEUR_ANA_COMBOPA_CTL,
  697. 0x80, 0x00);
  698. usleep_range(5000, 5100);
  699. };
  700. return ret;
  701. }
  702. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  703. struct snd_kcontrol *kcontrol,
  704. int event)
  705. {
  706. struct snd_soc_component *component =
  707. snd_soc_dapm_to_component(w->dapm);
  708. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  709. int ret = 0;
  710. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  711. w->name, event);
  712. switch (event) {
  713. case SND_SOC_DAPM_PRE_PMU:
  714. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  715. rouleur->rx_swr_dev->dev_num,
  716. true);
  717. snd_soc_component_update_bits(component,
  718. ROULEUR_ANA_COMBOPA_CTL,
  719. 0x40, 0x40);
  720. snd_soc_component_update_bits(component,
  721. ROULEUR_ANA_COMBOPA_CTL,
  722. 0x80, 0x80);
  723. usleep_range(5000, 5100);
  724. break;
  725. case SND_SOC_DAPM_POST_PMU:
  726. if (rouleur->update_wcd_event)
  727. rouleur->update_wcd_event(rouleur->handle,
  728. WCD_BOLERO_EVT_RX_MUTE,
  729. (WCD_RX1 << 0x10));
  730. wcd_enable_irq(&rouleur->irq_info,
  731. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  732. break;
  733. case SND_SOC_DAPM_PRE_PMD:
  734. wcd_disable_irq(&rouleur->irq_info,
  735. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  736. if (rouleur->update_wcd_event)
  737. rouleur->update_wcd_event(rouleur->handle,
  738. WCD_BOLERO_EVT_RX_MUTE,
  739. (WCD_RX1 << 0x10 | 0x1));
  740. break;
  741. case SND_SOC_DAPM_POST_PMD:
  742. snd_soc_component_update_bits(component,
  743. ROULEUR_ANA_COMBOPA_CTL,
  744. 0x80, 0x00);
  745. snd_soc_component_update_bits(component,
  746. ROULEUR_ANA_COMBOPA_CTL,
  747. 0x40, 0x00);
  748. usleep_range(5000, 5100);
  749. };
  750. return ret;
  751. }
  752. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  753. struct snd_kcontrol *kcontrol,
  754. int event)
  755. {
  756. struct snd_soc_component *component =
  757. snd_soc_dapm_to_component(w->dapm);
  758. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  759. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  760. w->name, event);
  761. switch (event) {
  762. case SND_SOC_DAPM_PRE_PMU:
  763. rouleur_rx_connect_port(component, HPH_L, true);
  764. if (rouleur->comp1_enable)
  765. rouleur_rx_connect_port(component, COMP_L, true);
  766. break;
  767. case SND_SOC_DAPM_POST_PMD:
  768. rouleur_rx_connect_port(component, HPH_L, false);
  769. if (rouleur->comp1_enable)
  770. rouleur_rx_connect_port(component, COMP_L, false);
  771. rouleur_rx_clk_disable(component);
  772. break;
  773. };
  774. return 0;
  775. }
  776. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  777. struct snd_kcontrol *kcontrol, int event)
  778. {
  779. struct snd_soc_component *component =
  780. snd_soc_dapm_to_component(w->dapm);
  781. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  782. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  783. w->name, event);
  784. switch (event) {
  785. case SND_SOC_DAPM_PRE_PMU:
  786. rouleur_rx_connect_port(component, HPH_R, true);
  787. if (rouleur->comp2_enable)
  788. rouleur_rx_connect_port(component, COMP_R, true);
  789. break;
  790. case SND_SOC_DAPM_POST_PMD:
  791. rouleur_rx_connect_port(component, HPH_R, false);
  792. if (rouleur->comp2_enable)
  793. rouleur_rx_connect_port(component, COMP_R, false);
  794. rouleur_rx_clk_disable(component);
  795. break;
  796. };
  797. return 0;
  798. }
  799. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  800. struct snd_kcontrol *kcontrol,
  801. int event)
  802. {
  803. struct snd_soc_component *component =
  804. snd_soc_dapm_to_component(w->dapm);
  805. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  806. u16 dmic_clk_reg;
  807. s32 *dmic_clk_cnt;
  808. unsigned int dmic;
  809. char *wname;
  810. int ret = 0;
  811. wname = strpbrk(w->name, "01");
  812. if (!wname) {
  813. dev_err(component->dev, "%s: widget not found\n", __func__);
  814. return -EINVAL;
  815. }
  816. ret = kstrtouint(wname, 10, &dmic);
  817. if (ret < 0) {
  818. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  819. __func__);
  820. return -EINVAL;
  821. }
  822. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  823. w->name, event);
  824. switch (dmic) {
  825. case 0:
  826. case 1:
  827. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  828. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  829. break;
  830. default:
  831. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  832. __func__);
  833. return -EINVAL;
  834. };
  835. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  836. __func__, event, dmic, *dmic_clk_cnt);
  837. switch (event) {
  838. case SND_SOC_DAPM_PRE_PMU:
  839. snd_soc_component_update_bits(component,
  840. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  841. snd_soc_component_update_bits(component,
  842. dmic_clk_reg, 0x08, 0x08);
  843. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  844. break;
  845. case SND_SOC_DAPM_POST_PMD:
  846. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  847. snd_soc_component_update_bits(component,
  848. dmic_clk_reg, 0x08, 0x00);
  849. snd_soc_component_update_bits(component,
  850. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  851. break;
  852. };
  853. return 0;
  854. }
  855. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  856. struct snd_kcontrol *kcontrol,
  857. int event)
  858. {
  859. struct snd_soc_component *component =
  860. snd_soc_dapm_to_component(w->dapm);
  861. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  862. int ret = 0;
  863. switch (event) {
  864. case SND_SOC_DAPM_PRE_PMU:
  865. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  866. rouleur->tx_swr_dev->dev_num,
  867. true);
  868. break;
  869. case SND_SOC_DAPM_POST_PMD:
  870. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  871. rouleur->tx_swr_dev->dev_num,
  872. false);
  873. break;
  874. };
  875. return ret;
  876. }
  877. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  878. struct snd_kcontrol *kcontrol,
  879. int event)
  880. {
  881. struct snd_soc_component *component =
  882. snd_soc_dapm_to_component(w->dapm);
  883. struct rouleur_priv *rouleur =
  884. snd_soc_component_get_drvdata(component);
  885. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  886. w->name, event);
  887. switch (event) {
  888. case SND_SOC_DAPM_PRE_PMU:
  889. /* Enable BCS for Headset mic */
  890. if (w->shift == 1 && !(snd_soc_component_read32(component,
  891. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  892. rouleur_tx_connect_port(component, MBHC, true);
  893. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  894. }
  895. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  896. rouleur_global_mbias_enable(component);
  897. if (w->shift)
  898. snd_soc_component_update_bits(component,
  899. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  900. 0x30, 0x30);
  901. else
  902. snd_soc_component_update_bits(component,
  903. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  904. 0x03, 0x03);
  905. break;
  906. case SND_SOC_DAPM_POST_PMD:
  907. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  908. if (w->shift == 1 &&
  909. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  910. rouleur_tx_connect_port(component, MBHC, false);
  911. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  912. }
  913. if (w->shift)
  914. snd_soc_component_update_bits(component,
  915. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  916. 0x30, 0x00);
  917. else
  918. snd_soc_component_update_bits(component,
  919. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  920. 0x03, 0x00);
  921. rouleur_global_mbias_disable(component);
  922. break;
  923. };
  924. return 0;
  925. }
  926. /*
  927. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  928. * @micb_mv: micbias in mv
  929. *
  930. * return register value converted
  931. */
  932. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  933. {
  934. /* min micbias voltage is 1.6V and maximum is 2.85V */
  935. if (micb_mv < 1600 || micb_mv > 2850) {
  936. pr_err("%s: unsupported micbias voltage\n", __func__);
  937. return -EINVAL;
  938. }
  939. return (micb_mv - 1600) / 50;
  940. }
  941. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  942. /*
  943. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  944. * @component: handle to snd_soc_component *
  945. * @req_volt: micbias voltage to be set
  946. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  947. *
  948. * return 0 if adjustment is success or error code in case of failure
  949. */
  950. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  951. int req_volt, int micb_num)
  952. {
  953. struct rouleur_priv *rouleur =
  954. snd_soc_component_get_drvdata(component);
  955. int cur_vout_ctl, req_vout_ctl;
  956. int micb_reg, micb_val, micb_en;
  957. int ret = 0;
  958. int pullup_mask;
  959. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  960. switch (micb_num) {
  961. case MIC_BIAS_1:
  962. micb_val = snd_soc_component_read32(component, micb_reg);
  963. micb_en = (micb_val & 0x40) >> 6;
  964. pullup_mask = 0x20;
  965. break;
  966. case MIC_BIAS_2:
  967. micb_val = snd_soc_component_read32(component, micb_reg);
  968. micb_en = (micb_val & 0x04) >> 2;
  969. pullup_mask = 0x02;
  970. break;
  971. case MIC_BIAS_3:
  972. default:
  973. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  974. __func__, micb_num);
  975. return -EINVAL;
  976. }
  977. mutex_lock(&rouleur->micb_lock);
  978. /*
  979. * If requested micbias voltage is same as current micbias
  980. * voltage, then just return. Otherwise, adjust voltage as
  981. * per requested value. If micbias is already enabled, then
  982. * to avoid slow micbias ramp-up or down enable pull-up
  983. * momentarily, change the micbias value and then re-enable
  984. * micbias.
  985. */
  986. cur_vout_ctl = (snd_soc_component_read32(component,
  987. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  988. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  989. if (req_vout_ctl < 0) {
  990. ret = -EINVAL;
  991. goto exit;
  992. }
  993. if (cur_vout_ctl == req_vout_ctl) {
  994. ret = 0;
  995. goto exit;
  996. }
  997. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  998. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  999. req_volt, micb_en);
  1000. if (micb_en == 0x1)
  1001. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1002. pullup_mask);
  1003. snd_soc_component_update_bits(component,
  1004. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl);
  1005. if (micb_en == 0x1) {
  1006. snd_soc_component_update_bits(component, micb_reg,
  1007. pullup_mask, 0x00);
  1008. /*
  1009. * Add 2ms delay as per HW requirement after enabling
  1010. * micbias
  1011. */
  1012. usleep_range(2000, 2100);
  1013. }
  1014. exit:
  1015. mutex_unlock(&rouleur->micb_lock);
  1016. return ret;
  1017. }
  1018. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1019. int rouleur_micbias_control(struct snd_soc_component *component,
  1020. int micb_num, int req, bool is_dapm)
  1021. {
  1022. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1023. int micb_index = micb_num - 1;
  1024. u16 micb_reg;
  1025. int pre_off_event = 0, post_off_event = 0;
  1026. int post_on_event = 0, post_dapm_off = 0;
  1027. int post_dapm_on = 0;
  1028. u8 pullup_mask = 0, enable_mask = 0;
  1029. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1030. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1031. __func__, micb_index);
  1032. return -EINVAL;
  1033. }
  1034. switch (micb_num) {
  1035. case MIC_BIAS_1:
  1036. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1037. pullup_mask = 0x20;
  1038. enable_mask = 0x40;
  1039. break;
  1040. case MIC_BIAS_2:
  1041. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1042. pullup_mask = 0x02;
  1043. enable_mask = 0x04;
  1044. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1045. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1046. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1047. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1048. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1049. break;
  1050. case MIC_BIAS_3:
  1051. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1052. pullup_mask = 0x02;
  1053. break;
  1054. default:
  1055. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1056. __func__, micb_num);
  1057. return -EINVAL;
  1058. };
  1059. mutex_lock(&rouleur->micb_lock);
  1060. switch (req) {
  1061. case MICB_PULLUP_ENABLE:
  1062. rouleur->pullup_ref[micb_index]++;
  1063. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1064. (rouleur->micb_ref[micb_index] == 0))
  1065. snd_soc_component_update_bits(component, micb_reg,
  1066. pullup_mask, pullup_mask);
  1067. break;
  1068. case MICB_PULLUP_DISABLE:
  1069. if (rouleur->pullup_ref[micb_index] > 0)
  1070. rouleur->pullup_ref[micb_index]--;
  1071. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1072. (rouleur->micb_ref[micb_index] == 0))
  1073. snd_soc_component_update_bits(component, micb_reg,
  1074. pullup_mask, 0x00);
  1075. break;
  1076. case MICB_ENABLE:
  1077. rouleur->micb_ref[micb_index]++;
  1078. if (rouleur->micb_ref[micb_index] == 1) {
  1079. rouleur_global_mbias_enable(component);
  1080. snd_soc_component_update_bits(component,
  1081. micb_reg, enable_mask, enable_mask);
  1082. if (post_on_event)
  1083. blocking_notifier_call_chain(
  1084. &rouleur->mbhc->notifier, post_on_event,
  1085. &rouleur->mbhc->wcd_mbhc);
  1086. }
  1087. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1088. blocking_notifier_call_chain(
  1089. &rouleur->mbhc->notifier, post_dapm_on,
  1090. &rouleur->mbhc->wcd_mbhc);
  1091. break;
  1092. case MICB_DISABLE:
  1093. if (rouleur->micb_ref[micb_index] > 0)
  1094. rouleur->micb_ref[micb_index]--;
  1095. if ((rouleur->micb_ref[micb_index] == 0) &&
  1096. (rouleur->pullup_ref[micb_index] == 0)) {
  1097. if (pre_off_event && rouleur->mbhc)
  1098. blocking_notifier_call_chain(
  1099. &rouleur->mbhc->notifier, pre_off_event,
  1100. &rouleur->mbhc->wcd_mbhc);
  1101. snd_soc_component_update_bits(component, micb_reg,
  1102. enable_mask, 0x00);
  1103. rouleur_global_mbias_disable(component);
  1104. if (post_off_event && rouleur->mbhc)
  1105. blocking_notifier_call_chain(
  1106. &rouleur->mbhc->notifier,
  1107. post_off_event,
  1108. &rouleur->mbhc->wcd_mbhc);
  1109. }
  1110. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1111. blocking_notifier_call_chain(
  1112. &rouleur->mbhc->notifier, post_dapm_off,
  1113. &rouleur->mbhc->wcd_mbhc);
  1114. break;
  1115. };
  1116. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1117. __func__, micb_num, rouleur->micb_ref[micb_index],
  1118. rouleur->pullup_ref[micb_index]);
  1119. mutex_unlock(&rouleur->micb_lock);
  1120. return 0;
  1121. }
  1122. EXPORT_SYMBOL(rouleur_micbias_control);
  1123. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1124. bool bcs_disable)
  1125. {
  1126. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1127. if (rouleur->update_wcd_event) {
  1128. if (bcs_disable)
  1129. rouleur->update_wcd_event(rouleur->handle,
  1130. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1131. else
  1132. rouleur->update_wcd_event(rouleur->handle,
  1133. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1134. }
  1135. }
  1136. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1137. {
  1138. int ret = 0;
  1139. uint8_t devnum = 0;
  1140. int num_retry = NUM_ATTEMPTS;
  1141. do {
  1142. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1143. if (ret) {
  1144. dev_err(&swr_dev->dev,
  1145. "%s get devnum %d for dev addr %lx failed\n",
  1146. __func__, devnum, swr_dev->addr);
  1147. /* retry after 1ms */
  1148. usleep_range(1000, 1010);
  1149. }
  1150. } while (ret && --num_retry);
  1151. swr_dev->dev_num = devnum;
  1152. return 0;
  1153. }
  1154. static int rouleur_event_notify(struct notifier_block *block,
  1155. unsigned long val,
  1156. void *data)
  1157. {
  1158. u16 event = (val & 0xffff);
  1159. int ret = 0;
  1160. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1161. struct snd_soc_component *component = rouleur->component;
  1162. struct wcd_mbhc *mbhc;
  1163. switch (event) {
  1164. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1165. snd_soc_component_update_bits(component,
  1166. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1167. 0xC0, 0x00);
  1168. snd_soc_component_update_bits(component,
  1169. ROULEUR_ANA_COMBOPA_CTL,
  1170. 0x40, 0x00);
  1171. snd_soc_component_update_bits(component,
  1172. ROULEUR_ANA_COMBOPA_CTL,
  1173. 0x80, 0x00);
  1174. snd_soc_component_update_bits(component,
  1175. ROULEUR_ANA_COMBOPA_CTL,
  1176. 0x40, 0x40);
  1177. snd_soc_component_update_bits(component,
  1178. ROULEUR_ANA_COMBOPA_CTL,
  1179. 0x80, 0x00);
  1180. break;
  1181. case BOLERO_WCD_EVT_SSR_DOWN:
  1182. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1183. mbhc = &rouleur->mbhc->wcd_mbhc;
  1184. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1185. rouleur_reset(rouleur->dev, 0x01);
  1186. break;
  1187. case BOLERO_WCD_EVT_SSR_UP:
  1188. rouleur_reset(rouleur->dev, 0x00);
  1189. /* allow reset to take effect */
  1190. usleep_range(10000, 10010);
  1191. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1192. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1193. rouleur_init_reg(component);
  1194. regcache_mark_dirty(rouleur->regmap);
  1195. regcache_sync(rouleur->regmap);
  1196. /* Initialize MBHC module */
  1197. mbhc = &rouleur->mbhc->wcd_mbhc;
  1198. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1199. if (ret) {
  1200. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1201. __func__);
  1202. } else {
  1203. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1204. }
  1205. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1206. break;
  1207. default:
  1208. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1209. event);
  1210. break;
  1211. }
  1212. return 0;
  1213. }
  1214. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1215. int event)
  1216. {
  1217. struct snd_soc_component *component =
  1218. snd_soc_dapm_to_component(w->dapm);
  1219. int micb_num;
  1220. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1221. __func__, w->name, event);
  1222. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1223. micb_num = MIC_BIAS_1;
  1224. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1225. micb_num = MIC_BIAS_2;
  1226. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1227. micb_num = MIC_BIAS_3;
  1228. else
  1229. return -EINVAL;
  1230. switch (event) {
  1231. case SND_SOC_DAPM_PRE_PMU:
  1232. /* Micbias LD0 enable not supported for MicBias 3*/
  1233. if (micb_num == MIC_BIAS_3)
  1234. rouleur_micbias_control(component, micb_num,
  1235. MICB_PULLUP_ENABLE, true);
  1236. else
  1237. rouleur_micbias_control(component, micb_num,
  1238. MICB_ENABLE, true);
  1239. break;
  1240. case SND_SOC_DAPM_POST_PMU:
  1241. usleep_range(1000, 1100);
  1242. break;
  1243. case SND_SOC_DAPM_POST_PMD:
  1244. if (micb_num == MIC_BIAS_3)
  1245. rouleur_micbias_control(component, micb_num,
  1246. MICB_PULLUP_DISABLE, true);
  1247. else
  1248. rouleur_micbias_control(component, micb_num,
  1249. MICB_DISABLE, true);
  1250. break;
  1251. };
  1252. return 0;
  1253. }
  1254. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1255. struct snd_kcontrol *kcontrol,
  1256. int event)
  1257. {
  1258. return __rouleur_codec_enable_micbias(w, event);
  1259. }
  1260. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1261. int event)
  1262. {
  1263. struct snd_soc_component *component =
  1264. snd_soc_dapm_to_component(w->dapm);
  1265. int micb_num;
  1266. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1267. __func__, w->name, event);
  1268. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1269. micb_num = MIC_BIAS_1;
  1270. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1271. micb_num = MIC_BIAS_2;
  1272. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1273. micb_num = MIC_BIAS_3;
  1274. else
  1275. return -EINVAL;
  1276. switch (event) {
  1277. case SND_SOC_DAPM_PRE_PMU:
  1278. rouleur_micbias_control(component, micb_num,
  1279. MICB_PULLUP_ENABLE, true);
  1280. break;
  1281. case SND_SOC_DAPM_POST_PMU:
  1282. /* 1 msec delay as per HW requirement */
  1283. usleep_range(1000, 1100);
  1284. break;
  1285. case SND_SOC_DAPM_POST_PMD:
  1286. rouleur_micbias_control(component, micb_num,
  1287. MICB_PULLUP_DISABLE, true);
  1288. break;
  1289. };
  1290. return 0;
  1291. }
  1292. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1293. struct snd_kcontrol *kcontrol,
  1294. int event)
  1295. {
  1296. return __rouleur_codec_enable_micbias_pullup(w, event);
  1297. }
  1298. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1299. struct snd_ctl_elem_value *ucontrol)
  1300. {
  1301. struct snd_soc_component *component =
  1302. snd_soc_kcontrol_component(kcontrol);
  1303. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1304. bool hphr;
  1305. struct soc_multi_mixer_control *mc;
  1306. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1307. hphr = mc->shift;
  1308. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1309. rouleur->comp1_enable;
  1310. return 0;
  1311. }
  1312. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1313. struct snd_ctl_elem_value *ucontrol)
  1314. {
  1315. struct snd_soc_component *component =
  1316. snd_soc_kcontrol_component(kcontrol);
  1317. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1318. int value = ucontrol->value.integer.value[0];
  1319. bool hphr;
  1320. struct soc_multi_mixer_control *mc;
  1321. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1322. hphr = mc->shift;
  1323. if (hphr)
  1324. rouleur->comp2_enable = value;
  1325. else
  1326. rouleur->comp1_enable = value;
  1327. return 0;
  1328. }
  1329. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1330. struct snd_kcontrol *kcontrol,
  1331. int event)
  1332. {
  1333. struct snd_soc_component *component =
  1334. snd_soc_dapm_to_component(w->dapm);
  1335. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1336. struct rouleur_pdata *pdata = NULL;
  1337. int ret = 0;
  1338. pdata = dev_get_platdata(rouleur->dev);
  1339. if (!pdata) {
  1340. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1341. return -EINVAL;
  1342. }
  1343. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1344. w->name, event);
  1345. switch (event) {
  1346. case SND_SOC_DAPM_PRE_PMU:
  1347. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1348. dev_dbg(component->dev,
  1349. "%s: vpos already in enabled state\n",
  1350. __func__);
  1351. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1352. return 0;
  1353. }
  1354. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1355. rouleur->supplies,
  1356. pdata->regulator,
  1357. pdata->num_supplies,
  1358. "cdc-pa-vpos");
  1359. if (ret == -EINVAL) {
  1360. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1361. __func__);
  1362. return ret;
  1363. }
  1364. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1365. /*
  1366. * 200us sleep is required after LDO15 is enabled as per
  1367. * HW requirement
  1368. */
  1369. usleep_range(200, 250);
  1370. break;
  1371. case SND_SOC_DAPM_POST_PMD:
  1372. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1373. break;
  1374. }
  1375. return 0;
  1376. }
  1377. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1378. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1379. rouleur_get_compander, rouleur_set_compander),
  1380. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1381. rouleur_get_compander, rouleur_set_compander),
  1382. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1383. line_gain),
  1384. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1385. line_gain),
  1386. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1387. analog_gain),
  1388. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1389. analog_gain),
  1390. };
  1391. static const struct snd_kcontrol_new adc1_switch[] = {
  1392. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1393. };
  1394. static const struct snd_kcontrol_new adc2_switch[] = {
  1395. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1396. };
  1397. static const struct snd_kcontrol_new dmic1_switch[] = {
  1398. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1399. };
  1400. static const struct snd_kcontrol_new dmic2_switch[] = {
  1401. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1402. };
  1403. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1404. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1405. };
  1406. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1407. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1408. };
  1409. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1410. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1411. };
  1412. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1413. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1414. };
  1415. static const char * const adc2_mux_text[] = {
  1416. "INP2", "INP3"
  1417. };
  1418. static const struct soc_enum adc2_enum =
  1419. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1420. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1421. static const struct snd_kcontrol_new tx_adc2_mux =
  1422. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1423. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1424. /*input widgets*/
  1425. SND_SOC_DAPM_INPUT("AMIC1"),
  1426. SND_SOC_DAPM_INPUT("AMIC2"),
  1427. SND_SOC_DAPM_INPUT("AMIC3"),
  1428. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1429. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1430. /*tx widgets*/
  1431. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1432. rouleur_codec_enable_adc,
  1433. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1434. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1435. rouleur_codec_enable_adc,
  1436. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1437. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1438. &tx_adc2_mux),
  1439. /*tx mixers*/
  1440. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1441. adc1_switch, ARRAY_SIZE(adc1_switch),
  1442. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1443. SND_SOC_DAPM_POST_PMD),
  1444. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1445. adc2_switch, ARRAY_SIZE(adc2_switch),
  1446. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1447. SND_SOC_DAPM_POST_PMD),
  1448. /* micbias widgets*/
  1449. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1450. rouleur_codec_enable_micbias,
  1451. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1452. SND_SOC_DAPM_POST_PMD),
  1453. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1454. rouleur_codec_enable_micbias,
  1455. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1456. SND_SOC_DAPM_POST_PMD),
  1457. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1458. rouleur_codec_enable_micbias,
  1459. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1460. SND_SOC_DAPM_POST_PMD),
  1461. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1462. rouleur_codec_enable_pa_vpos,
  1463. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1464. /*rx widgets*/
  1465. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1466. rouleur_codec_enable_ear_pa,
  1467. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1468. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1469. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1470. rouleur_codec_enable_lo_pa,
  1471. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1472. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1473. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1474. 0, rouleur_codec_enable_hphl_pa,
  1475. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1476. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1477. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1478. 0, rouleur_codec_enable_hphr_pa,
  1479. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1480. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1481. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1482. rouleur_codec_hphl_dac_event,
  1483. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1484. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1485. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1486. rouleur_codec_hphr_dac_event,
  1487. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1488. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1489. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1490. rouleur_codec_ear_lo_dac_event,
  1491. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1492. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1493. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1494. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1495. SND_SOC_DAPM_POST_PMD),
  1496. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1497. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1498. SND_SOC_DAPM_POST_PMD),
  1499. /* rx mixer widgets*/
  1500. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1501. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1502. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1503. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1504. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1505. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1506. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1507. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1508. /*output widgets tx*/
  1509. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1510. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1511. /*output widgets rx*/
  1512. SND_SOC_DAPM_OUTPUT("EAR"),
  1513. SND_SOC_DAPM_OUTPUT("LO"),
  1514. SND_SOC_DAPM_OUTPUT("HPHL"),
  1515. SND_SOC_DAPM_OUTPUT("HPHR"),
  1516. /* micbias pull up widgets*/
  1517. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1518. rouleur_codec_enable_micbias_pullup,
  1519. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1520. SND_SOC_DAPM_POST_PMD),
  1521. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1522. rouleur_codec_enable_micbias_pullup,
  1523. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1524. SND_SOC_DAPM_POST_PMD),
  1525. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1526. rouleur_codec_enable_micbias_pullup,
  1527. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1528. SND_SOC_DAPM_POST_PMD),
  1529. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1530. rouleur_codec_enable_dmic,
  1531. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1532. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1533. rouleur_codec_enable_dmic,
  1534. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1535. /*tx mixer widgets*/
  1536. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1537. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1538. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1539. SND_SOC_DAPM_POST_PMD),
  1540. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1541. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1542. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1543. SND_SOC_DAPM_POST_PMD),
  1544. /*output widgets*/
  1545. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1546. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1547. };
  1548. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1549. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1550. {"ADC1_MIXER", "Switch", "ADC1"},
  1551. {"ADC1", NULL, "AMIC1"},
  1552. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1553. {"ADC2_MIXER", "Switch", "ADC2"},
  1554. {"ADC2", NULL, "ADC2 MUX"},
  1555. {"ADC2 MUX", "INP3", "AMIC3"},
  1556. {"ADC2 MUX", "INP2", "AMIC2"},
  1557. {"IN1_HPHL", NULL, "PA_VPOS"},
  1558. {"RX1", NULL, "IN1_HPHL"},
  1559. {"RDAC1", NULL, "RX1"},
  1560. {"HPHL_RDAC", "Switch", "RDAC1"},
  1561. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1562. {"HPHL", NULL, "HPHL PGA"},
  1563. {"IN2_HPHR", NULL, "PA_VPOS"},
  1564. {"RX2", NULL, "IN2_HPHR"},
  1565. {"RDAC2", NULL, "RX2"},
  1566. {"HPHR_RDAC", "Switch", "RDAC2"},
  1567. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1568. {"HPHR", NULL, "HPHR PGA"},
  1569. {"RDAC3", NULL, "RX1"},
  1570. {"EAR_RDAC", "Switch", "RDAC3"},
  1571. {"EAR PGA", NULL, "EAR_RDAC"},
  1572. {"EAR", NULL, "EAR PGA"},
  1573. {"RDAC3", NULL, "RX1"},
  1574. {"LO_RDAC", "Switch", "RDAC3"},
  1575. {"LO PGA", NULL, "LO_RDAC"},
  1576. {"LO", NULL, "LO PGA"},
  1577. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1578. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1579. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1580. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1581. };
  1582. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1583. void *file_private_data,
  1584. struct file *file,
  1585. char __user *buf, size_t count,
  1586. loff_t pos)
  1587. {
  1588. struct rouleur_priv *priv;
  1589. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1590. int len = 0;
  1591. priv = (struct rouleur_priv *) entry->private_data;
  1592. if (!priv) {
  1593. pr_err("%s: rouleur priv is null\n", __func__);
  1594. return -EINVAL;
  1595. }
  1596. switch (priv->version) {
  1597. case ROULEUR_VERSION_1_0:
  1598. len = snprintf(buffer, sizeof(buffer), "rouleur_1_0\n");
  1599. break;
  1600. default:
  1601. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1602. }
  1603. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1604. }
  1605. static struct snd_info_entry_ops rouleur_info_ops = {
  1606. .read = rouleur_version_read,
  1607. };
  1608. /*
  1609. * rouleur_info_create_codec_entry - creates rouleur module
  1610. * @codec_root: The parent directory
  1611. * @component: component instance
  1612. *
  1613. * Creates rouleur module and version entry under the given
  1614. * parent directory.
  1615. *
  1616. * Return: 0 on success or negative error code on failure.
  1617. */
  1618. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1619. struct snd_soc_component *component)
  1620. {
  1621. struct snd_info_entry *version_entry;
  1622. struct rouleur_priv *priv;
  1623. struct snd_soc_card *card;
  1624. if (!codec_root || !component)
  1625. return -EINVAL;
  1626. priv = snd_soc_component_get_drvdata(component);
  1627. if (priv->entry) {
  1628. dev_dbg(priv->dev,
  1629. "%s:rouleur module already created\n", __func__);
  1630. return 0;
  1631. }
  1632. card = component->card;
  1633. priv->entry = snd_info_create_subdir(codec_root->module,
  1634. "rouleur", codec_root);
  1635. if (!priv->entry) {
  1636. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1637. __func__);
  1638. return -ENOMEM;
  1639. }
  1640. version_entry = snd_info_create_card_entry(card->snd_card,
  1641. "version",
  1642. priv->entry);
  1643. if (!version_entry) {
  1644. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1645. __func__);
  1646. return -ENOMEM;
  1647. }
  1648. version_entry->private_data = priv;
  1649. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1650. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1651. version_entry->c.ops = &rouleur_info_ops;
  1652. if (snd_info_register(version_entry) < 0) {
  1653. snd_info_free_entry(version_entry);
  1654. return -ENOMEM;
  1655. }
  1656. priv->version_entry = version_entry;
  1657. return 0;
  1658. }
  1659. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1660. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1661. struct rouleur_pdata *pdata)
  1662. {
  1663. int vout_ctl = 0;
  1664. int rc = 0;
  1665. if (!pdata) {
  1666. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1667. return -ENODEV;
  1668. }
  1669. /* set micbias voltage */
  1670. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1671. if (vout_ctl < 0) {
  1672. rc = -EINVAL;
  1673. goto done;
  1674. }
  1675. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1676. 0xF8, vout_ctl);
  1677. done:
  1678. return rc;
  1679. }
  1680. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1681. {
  1682. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1683. struct snd_soc_dapm_context *dapm =
  1684. snd_soc_component_get_dapm(component);
  1685. int ret = -EINVAL;
  1686. dev_info(component->dev, "%s()\n", __func__);
  1687. rouleur = snd_soc_component_get_drvdata(component);
  1688. if (!rouleur)
  1689. return -EINVAL;
  1690. rouleur->component = component;
  1691. snd_soc_component_init_regmap(component, rouleur->regmap);
  1692. rouleur->fw_data = devm_kzalloc(component->dev,
  1693. sizeof(*(rouleur->fw_data)),
  1694. GFP_KERNEL);
  1695. if (!rouleur->fw_data) {
  1696. dev_err(component->dev, "Failed to allocate fw_data\n");
  1697. ret = -ENOMEM;
  1698. goto done;
  1699. }
  1700. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1701. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1702. WCD9XXX_CODEC_HWDEP_NODE, component);
  1703. if (ret < 0) {
  1704. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1705. goto done;
  1706. }
  1707. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1708. if (ret) {
  1709. pr_err("%s: mbhc initialization failed\n", __func__);
  1710. goto done;
  1711. }
  1712. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1713. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1714. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1715. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1716. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1717. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1718. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1719. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1720. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1721. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1722. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1723. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1724. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1725. snd_soc_dapm_sync(dapm);
  1726. rouleur_init_reg(component);
  1727. rouleur->version = ROULEUR_VERSION_1_0;
  1728. /* Register event notifier */
  1729. rouleur->nblock.notifier_call = rouleur_event_notify;
  1730. if (rouleur->register_notifier) {
  1731. ret = rouleur->register_notifier(rouleur->handle,
  1732. &rouleur->nblock,
  1733. true);
  1734. if (ret) {
  1735. dev_err(component->dev,
  1736. "%s: Failed to register notifier %d\n",
  1737. __func__, ret);
  1738. return ret;
  1739. }
  1740. }
  1741. done:
  1742. return ret;
  1743. }
  1744. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1745. {
  1746. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1747. if (!rouleur)
  1748. return;
  1749. if (rouleur->register_notifier)
  1750. rouleur->register_notifier(rouleur->handle,
  1751. &rouleur->nblock,
  1752. false);
  1753. }
  1754. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  1755. .name = DRV_NAME,
  1756. .probe = rouleur_soc_codec_probe,
  1757. .remove = rouleur_soc_codec_remove,
  1758. .controls = rouleur_snd_controls,
  1759. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  1760. .dapm_widgets = rouleur_dapm_widgets,
  1761. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  1762. .dapm_routes = rouleur_audio_map,
  1763. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  1764. };
  1765. #ifdef CONFIG_PM_SLEEP
  1766. static int rouleur_suspend(struct device *dev)
  1767. {
  1768. struct rouleur_priv *rouleur = NULL;
  1769. int ret = 0;
  1770. struct rouleur_pdata *pdata = NULL;
  1771. if (!dev)
  1772. return -ENODEV;
  1773. rouleur = dev_get_drvdata(dev);
  1774. if (!rouleur)
  1775. return -EINVAL;
  1776. pdata = dev_get_platdata(rouleur->dev);
  1777. if (!pdata) {
  1778. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1779. return -EINVAL;
  1780. }
  1781. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1782. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  1783. rouleur->supplies,
  1784. pdata->regulator,
  1785. pdata->num_supplies,
  1786. "cdc-pa-vpos");
  1787. if (ret == -EINVAL) {
  1788. dev_err(dev, "%s: pa vpos is not disabled\n",
  1789. __func__);
  1790. return 0;
  1791. }
  1792. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1793. }
  1794. return 0;
  1795. }
  1796. static int rouleur_resume(struct device *dev)
  1797. {
  1798. return 0;
  1799. }
  1800. #endif
  1801. static int rouleur_reset(struct device *dev, int reset_val)
  1802. {
  1803. struct rouleur_priv *rouleur = NULL;
  1804. if (!dev)
  1805. return -ENODEV;
  1806. rouleur = dev_get_drvdata(dev);
  1807. if (!rouleur)
  1808. return -EINVAL;
  1809. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  1810. return 0;
  1811. }
  1812. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  1813. u32 *val)
  1814. {
  1815. int rc = 0;
  1816. rc = of_property_read_u32(dev->of_node, name, val);
  1817. if (rc)
  1818. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1819. __func__, name, dev->of_node->full_name);
  1820. return rc;
  1821. }
  1822. static void rouleur_dt_parse_micbias_info(struct device *dev,
  1823. struct rouleur_micbias_setting *mb)
  1824. {
  1825. u32 prop_val = 0;
  1826. int rc = 0;
  1827. /* MB1 */
  1828. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1829. NULL)) {
  1830. rc = rouleur_read_of_property_u32(dev,
  1831. "qcom,cdc-micbias1-mv",
  1832. &prop_val);
  1833. if (!rc)
  1834. mb->micb1_mv = prop_val;
  1835. } else {
  1836. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1837. __func__);
  1838. }
  1839. /* MB2 */
  1840. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1841. NULL)) {
  1842. rc = rouleur_read_of_property_u32(dev,
  1843. "qcom,cdc-micbias2-mv",
  1844. &prop_val);
  1845. if (!rc)
  1846. mb->micb2_mv = prop_val;
  1847. } else {
  1848. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1849. __func__);
  1850. }
  1851. /* MB3 */
  1852. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1853. NULL)) {
  1854. rc = rouleur_read_of_property_u32(dev,
  1855. "qcom,cdc-micbias3-mv",
  1856. &prop_val);
  1857. if (!rc)
  1858. mb->micb3_mv = prop_val;
  1859. } else {
  1860. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1861. __func__);
  1862. }
  1863. }
  1864. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  1865. {
  1866. struct rouleur_pdata *pdata = NULL;
  1867. u32 reg;
  1868. int ret = 0;
  1869. pdata = kzalloc(sizeof(struct rouleur_pdata),
  1870. GFP_KERNEL);
  1871. if (!pdata)
  1872. return NULL;
  1873. pdata->spmi_np = of_parse_phandle(dev->of_node,
  1874. "qcom,pmic-spmi-node", 0);
  1875. if (!pdata->spmi_np) {
  1876. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1877. __func__, "qcom,pmic-spmi-node",
  1878. dev->of_node->full_name);
  1879. kfree(pdata);
  1880. return NULL;
  1881. }
  1882. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  1883. if (ret) {
  1884. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  1885. __func__, ret);
  1886. kfree(pdata);
  1887. return NULL;
  1888. }
  1889. pdata->reset_reg = reg;
  1890. /* Parse power supplies */
  1891. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1892. &pdata->num_supplies);
  1893. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1894. dev_err(dev, "%s: no power supplies defined for codec\n",
  1895. __func__);
  1896. kfree(pdata);
  1897. return NULL;
  1898. }
  1899. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1900. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1901. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  1902. return pdata;
  1903. }
  1904. static int rouleur_wakeup(void *handle, bool enable)
  1905. {
  1906. struct rouleur_priv *priv;
  1907. if (!handle) {
  1908. pr_err("%s: NULL handle\n", __func__);
  1909. return -EINVAL;
  1910. }
  1911. priv = (struct rouleur_priv *)handle;
  1912. if (!priv->tx_swr_dev) {
  1913. pr_err("%s: tx swr dev is NULL\n", __func__);
  1914. return -EINVAL;
  1915. }
  1916. if (enable)
  1917. return swr_device_wakeup_vote(priv->tx_swr_dev);
  1918. else
  1919. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  1920. }
  1921. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  1922. {
  1923. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  1924. __func__, irq);
  1925. return IRQ_HANDLED;
  1926. }
  1927. static int rouleur_bind(struct device *dev)
  1928. {
  1929. int ret = 0, i = 0;
  1930. struct rouleur_priv *rouleur = NULL;
  1931. struct rouleur_pdata *pdata = NULL;
  1932. struct wcd_ctrl_platform_data *plat_data = NULL;
  1933. struct platform_device *pdev = NULL;
  1934. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  1935. if (!rouleur)
  1936. return -ENOMEM;
  1937. dev_set_drvdata(dev, rouleur);
  1938. pdata = rouleur_populate_dt_data(dev);
  1939. if (!pdata) {
  1940. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1941. kfree(rouleur);
  1942. return -EINVAL;
  1943. }
  1944. rouleur->dev = dev;
  1945. rouleur->dev->platform_data = pdata;
  1946. pdev = of_find_device_by_node(pdata->spmi_np);
  1947. if (!pdev) {
  1948. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  1949. __func__);
  1950. ret = -EINVAL;
  1951. goto err_bind_all;
  1952. }
  1953. rouleur->spmi_dev = &pdev->dev;
  1954. rouleur->reset_reg = pdata->reset_reg;
  1955. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  1956. pdata->regulator, pdata->num_supplies);
  1957. if (!rouleur->supplies) {
  1958. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1959. __func__);
  1960. goto err_bind_all;
  1961. }
  1962. plat_data = dev_get_platdata(dev->parent);
  1963. if (!plat_data) {
  1964. dev_err(dev, "%s: platform data from parent is NULL\n",
  1965. __func__);
  1966. ret = -EINVAL;
  1967. goto err_bind_all;
  1968. }
  1969. rouleur->handle = (void *)plat_data->handle;
  1970. if (!rouleur->handle) {
  1971. dev_err(dev, "%s: handle is NULL\n", __func__);
  1972. ret = -EINVAL;
  1973. goto err_bind_all;
  1974. }
  1975. rouleur->update_wcd_event = plat_data->update_wcd_event;
  1976. if (!rouleur->update_wcd_event) {
  1977. dev_err(dev, "%s: update_wcd_event api is null!\n",
  1978. __func__);
  1979. ret = -EINVAL;
  1980. goto err_bind_all;
  1981. }
  1982. rouleur->register_notifier = plat_data->register_notifier;
  1983. if (!rouleur->register_notifier) {
  1984. dev_err(dev, "%s: register_notifier api is null!\n",
  1985. __func__);
  1986. ret = -EINVAL;
  1987. goto err_bind_all;
  1988. }
  1989. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  1990. pdata->regulator,
  1991. pdata->num_supplies);
  1992. if (ret) {
  1993. dev_err(dev, "%s: wcd static supply enable failed!\n",
  1994. __func__);
  1995. goto err_bind_all;
  1996. }
  1997. rouleur_reset(dev, 0x01);
  1998. usleep_range(20, 30);
  1999. rouleur_reset(dev, 0x00);
  2000. /*
  2001. * Add 5msec delay to provide sufficient time for
  2002. * soundwire auto enumeration of slave devices as
  2003. * as per HW requirement.
  2004. */
  2005. usleep_range(5000, 5010);
  2006. rouleur->wakeup = rouleur_wakeup;
  2007. ret = component_bind_all(dev, rouleur);
  2008. if (ret) {
  2009. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2010. __func__, ret);
  2011. goto err_bind_all;
  2012. }
  2013. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2014. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2015. if (ret) {
  2016. dev_err(dev, "Failed to read port mapping\n");
  2017. goto err;
  2018. }
  2019. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2020. if (!rouleur->rx_swr_dev) {
  2021. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2022. __func__);
  2023. ret = -ENODEV;
  2024. goto err;
  2025. }
  2026. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2027. if (!rouleur->tx_swr_dev) {
  2028. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2029. __func__);
  2030. ret = -ENODEV;
  2031. goto err;
  2032. }
  2033. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2034. &rouleur_regmap_config);
  2035. if (!rouleur->regmap) {
  2036. dev_err(dev, "%s: Regmap init failed\n",
  2037. __func__);
  2038. goto err;
  2039. }
  2040. /* Set all interupts as edge triggered */
  2041. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2042. regmap_write(rouleur->regmap,
  2043. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2044. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2045. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2046. rouleur->irq_info.codec_name = "rouleur";
  2047. rouleur->irq_info.regmap = rouleur->regmap;
  2048. rouleur->irq_info.dev = dev;
  2049. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2050. if (ret) {
  2051. dev_err(dev, "%s: IRQ init failed: %d\n",
  2052. __func__, ret);
  2053. goto err;
  2054. }
  2055. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2056. mutex_init(&rouleur->micb_lock);
  2057. mutex_init(&rouleur->main_bias_lock);
  2058. mutex_init(&rouleur->rx_clk_lock);
  2059. ret = rouleur_set_micbias_data(rouleur, pdata);
  2060. if (ret < 0) {
  2061. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2062. goto err_irq;
  2063. }
  2064. /* Request for watchdog interrupt */
  2065. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2066. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2067. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2068. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2069. /* Disable watchdog interrupt for HPH */
  2070. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2071. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2072. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2073. NULL, 0);
  2074. if (ret) {
  2075. dev_err(dev, "%s: Codec registration failed\n",
  2076. __func__);
  2077. goto err_irq;
  2078. }
  2079. return ret;
  2080. err_irq:
  2081. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2082. mutex_destroy(&rouleur->micb_lock);
  2083. mutex_destroy(&rouleur->main_bias_lock);
  2084. mutex_destroy(&rouleur->rx_clk_lock);
  2085. err:
  2086. component_unbind_all(dev, rouleur);
  2087. err_bind_all:
  2088. dev_set_drvdata(dev, NULL);
  2089. kfree(pdata);
  2090. kfree(rouleur);
  2091. return ret;
  2092. }
  2093. static void rouleur_unbind(struct device *dev)
  2094. {
  2095. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2096. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2097. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2098. snd_soc_unregister_component(dev);
  2099. component_unbind_all(dev, rouleur);
  2100. mutex_destroy(&rouleur->micb_lock);
  2101. mutex_destroy(&rouleur->main_bias_lock);
  2102. mutex_destroy(&rouleur->rx_clk_lock);
  2103. dev_set_drvdata(dev, NULL);
  2104. kfree(pdata);
  2105. kfree(rouleur);
  2106. }
  2107. static const struct of_device_id rouleur_dt_match[] = {
  2108. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2109. {}
  2110. };
  2111. static const struct component_master_ops rouleur_comp_ops = {
  2112. .bind = rouleur_bind,
  2113. .unbind = rouleur_unbind,
  2114. };
  2115. static int rouleur_compare_of(struct device *dev, void *data)
  2116. {
  2117. return dev->of_node == data;
  2118. }
  2119. static void rouleur_release_of(struct device *dev, void *data)
  2120. {
  2121. of_node_put(data);
  2122. }
  2123. static int rouleur_add_slave_components(struct device *dev,
  2124. struct component_match **matchptr)
  2125. {
  2126. struct device_node *np, *rx_node, *tx_node;
  2127. np = dev->of_node;
  2128. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2129. if (!rx_node) {
  2130. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2131. return -ENODEV;
  2132. }
  2133. of_node_get(rx_node);
  2134. component_match_add_release(dev, matchptr,
  2135. rouleur_release_of,
  2136. rouleur_compare_of,
  2137. rx_node);
  2138. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2139. if (!tx_node) {
  2140. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2141. return -ENODEV;
  2142. }
  2143. of_node_get(tx_node);
  2144. component_match_add_release(dev, matchptr,
  2145. rouleur_release_of,
  2146. rouleur_compare_of,
  2147. tx_node);
  2148. return 0;
  2149. }
  2150. static int rouleur_probe(struct platform_device *pdev)
  2151. {
  2152. struct component_match *match = NULL;
  2153. int ret;
  2154. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2155. if (ret)
  2156. return ret;
  2157. return component_master_add_with_match(&pdev->dev,
  2158. &rouleur_comp_ops, match);
  2159. }
  2160. static int rouleur_remove(struct platform_device *pdev)
  2161. {
  2162. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2163. dev_set_drvdata(&pdev->dev, NULL);
  2164. return 0;
  2165. }
  2166. #ifdef CONFIG_PM_SLEEP
  2167. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2168. SET_SYSTEM_SLEEP_PM_OPS(
  2169. rouleur_suspend,
  2170. rouleur_resume
  2171. )
  2172. };
  2173. #endif
  2174. static struct platform_driver rouleur_codec_driver = {
  2175. .probe = rouleur_probe,
  2176. .remove = rouleur_remove,
  2177. .driver = {
  2178. .name = "rouleur_codec",
  2179. .owner = THIS_MODULE,
  2180. .of_match_table = of_match_ptr(rouleur_dt_match),
  2181. #ifdef CONFIG_PM_SLEEP
  2182. .pm = &rouleur_dev_pm_ops,
  2183. #endif
  2184. .suppress_bind_attrs = true,
  2185. },
  2186. };
  2187. module_platform_driver(rouleur_codec_driver);
  2188. MODULE_DESCRIPTION("Rouleur Codec driver");
  2189. MODULE_LICENSE("GPL v2");