sm6150.c 243 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/soc/qcom/fsa4480-i2c.h>
  17. #include <sound/core.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/info.h>
  23. #include <soc/snd_event.h>
  24. #include <soc/qcom/socinfo.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include "codecs/msm-cdc-pinctrl.h"
  30. #include "codecs/wcd934x/wcd934x.h"
  31. #include "codecs/wcd934x/wcd934x-mbhc.h"
  32. #include "codecs/wcd937x/wcd937x-mbhc.h"
  33. #include "codecs/wsa881x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "codecs/wcd937x/wcd937x.h"
  38. #define DRV_NAME "sm6150-asoc-snd"
  39. #define __CHIPSET__ "SM6150 "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  55. #define WCD9XXX_MBHC_DEF_RLOADS 5
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WSA8810_NAME_1 "wsa881x.20170211"
  60. #define WSA8810_NAME_2 "wsa881x.20170212"
  61. #define WCN_CDC_SLIM_RX_CH_MAX 2
  62. #define WCN_CDC_SLIM_TX_CH_MAX 3
  63. #define TDM_CHANNEL_MAX 8
  64. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  65. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  66. #define MSM_HIFI_ON 1
  67. #define SM6150_SOC_VERSION_1_0 0x00010000
  68. #define SM6150_SOC_MSM_ID 0x163
  69. enum {
  70. SLIM_RX_0 = 0,
  71. SLIM_RX_1,
  72. SLIM_RX_2,
  73. SLIM_RX_3,
  74. SLIM_RX_4,
  75. SLIM_RX_5,
  76. SLIM_RX_6,
  77. SLIM_RX_7,
  78. SLIM_RX_MAX,
  79. };
  80. enum {
  81. SLIM_TX_0 = 0,
  82. SLIM_TX_1,
  83. SLIM_TX_2,
  84. SLIM_TX_3,
  85. SLIM_TX_4,
  86. SLIM_TX_5,
  87. SLIM_TX_6,
  88. SLIM_TX_7,
  89. SLIM_TX_8,
  90. SLIM_TX_MAX,
  91. };
  92. enum {
  93. PRIM_MI2S = 0,
  94. SEC_MI2S,
  95. TERT_MI2S,
  96. QUAT_MI2S,
  97. QUIN_MI2S,
  98. MI2S_MAX,
  99. };
  100. enum {
  101. PRIM_AUX_PCM = 0,
  102. SEC_AUX_PCM,
  103. TERT_AUX_PCM,
  104. QUAT_AUX_PCM,
  105. QUIN_AUX_PCM,
  106. AUX_PCM_MAX,
  107. };
  108. enum {
  109. WSA_CDC_DMA_RX_0 = 0,
  110. WSA_CDC_DMA_RX_1,
  111. RX_CDC_DMA_RX_0,
  112. RX_CDC_DMA_RX_1,
  113. RX_CDC_DMA_RX_2,
  114. RX_CDC_DMA_RX_3,
  115. RX_CDC_DMA_RX_5,
  116. CDC_DMA_RX_MAX,
  117. };
  118. enum {
  119. WSA_CDC_DMA_TX_0 = 0,
  120. WSA_CDC_DMA_TX_1,
  121. WSA_CDC_DMA_TX_2,
  122. TX_CDC_DMA_TX_0,
  123. TX_CDC_DMA_TX_3,
  124. TX_CDC_DMA_TX_4,
  125. CDC_DMA_TX_MAX,
  126. };
  127. struct mi2s_conf {
  128. struct mutex lock;
  129. u32 ref_cnt;
  130. u32 msm_is_mi2s_master;
  131. };
  132. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  133. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  134. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  135. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  136. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  137. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  138. };
  139. struct dev_config {
  140. u32 sample_rate;
  141. u32 bit_format;
  142. u32 channels;
  143. };
  144. enum {
  145. DP_RX_IDX = 0,
  146. EXT_DISP_RX_IDX_MAX,
  147. };
  148. struct msm_wsa881x_dev_info {
  149. struct device_node *of_node;
  150. u32 index;
  151. };
  152. struct aux_codec_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. enum pinctrl_pin_state {
  157. STATE_DISABLE = 0, /* All pins are in sleep state */
  158. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  159. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  160. };
  161. struct msm_pinctrl_info {
  162. struct pinctrl *pinctrl;
  163. struct pinctrl_state *mi2s_disable;
  164. struct pinctrl_state *tdm_disable;
  165. struct pinctrl_state *mi2s_active;
  166. struct pinctrl_state *tdm_active;
  167. enum pinctrl_pin_state curr_state;
  168. };
  169. struct msm_asoc_mach_data {
  170. struct snd_info_entry *codec_root;
  171. struct msm_pinctrl_info pinctrl_info;
  172. int usbc_en2_gpio; /* used by gpio driver API */
  173. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  174. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  175. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  176. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  177. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  178. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  179. bool is_afe_config_done;
  180. struct device_node *fsa_handle;
  181. };
  182. struct msm_asoc_wcd93xx_codec {
  183. void* (*get_afe_config_fn)(struct snd_soc_component *component,
  184. enum afe_config_type config_type);
  185. };
  186. static const char *const pin_states[] = {"sleep", "i2s-active",
  187. "tdm-active"};
  188. static struct snd_soc_card snd_soc_card_sm6150_msm;
  189. enum {
  190. TDM_0 = 0,
  191. TDM_1,
  192. TDM_2,
  193. TDM_3,
  194. TDM_4,
  195. TDM_5,
  196. TDM_6,
  197. TDM_7,
  198. TDM_PORT_MAX,
  199. };
  200. enum {
  201. TDM_PRI = 0,
  202. TDM_SEC,
  203. TDM_TERT,
  204. TDM_QUAT,
  205. TDM_QUIN,
  206. TDM_INTERFACE_MAX,
  207. };
  208. struct tdm_port {
  209. u32 mode;
  210. u32 channel;
  211. };
  212. /* TDM default config */
  213. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  214. { /* PRI TDM */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  223. },
  224. { /* SEC TDM */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  233. },
  234. { /* TERT TDM */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  243. },
  244. { /* QUAT TDM */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  253. },
  254. { /* QUIN TDM */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  263. }
  264. };
  265. /* TDM default config */
  266. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  267. { /* PRI TDM */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  276. },
  277. { /* SEC TDM */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  286. },
  287. { /* TERT TDM */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  296. },
  297. { /* QUAT TDM */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  306. },
  307. { /* QUIN TDM */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  316. }
  317. };
  318. /* Default configuration of slimbus channels */
  319. static struct dev_config slim_rx_cfg[] = {
  320. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. };
  329. static struct dev_config slim_tx_cfg[] = {
  330. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  339. };
  340. /* Default configuration of Codec DMA Interface Tx */
  341. static struct dev_config cdc_dma_rx_cfg[] = {
  342. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  343. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. };
  350. /* Default configuration of Codec DMA Interface Rx */
  351. static struct dev_config cdc_dma_tx_cfg[] = {
  352. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. };
  359. /* Default configuration of external display BE */
  360. static struct dev_config ext_disp_rx_cfg[] = {
  361. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  362. };
  363. static struct dev_config usb_rx_cfg = {
  364. .sample_rate = SAMPLING_RATE_48KHZ,
  365. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  366. .channels = 2,
  367. };
  368. static struct dev_config usb_tx_cfg = {
  369. .sample_rate = SAMPLING_RATE_48KHZ,
  370. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  371. .channels = 1,
  372. };
  373. static struct dev_config proxy_rx_cfg = {
  374. .sample_rate = SAMPLING_RATE_48KHZ,
  375. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  376. .channels = 2,
  377. };
  378. /* Default configuration of MI2S channels */
  379. static struct dev_config mi2s_rx_cfg[] = {
  380. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  381. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  382. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. };
  386. static struct dev_config mi2s_tx_cfg[] = {
  387. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  388. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  389. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. };
  393. static struct dev_config aux_pcm_rx_cfg[] = {
  394. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  396. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. };
  400. static struct dev_config aux_pcm_tx_cfg[] = {
  401. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  403. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. };
  407. static int msm_vi_feed_tx_ch = 2;
  408. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  409. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  410. "Five", "Six", "Seven",
  411. "Eight"};
  412. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  413. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  414. "S32_LE"};
  415. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  416. "S24_3LE"};
  417. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  418. "KHZ_32", "KHZ_44P1", "KHZ_48",
  419. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  420. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  421. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  422. "KHZ_44P1", "KHZ_48",
  423. "KHZ_88P2", "KHZ_96"};
  424. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  425. "KHZ_44P1", "KHZ_48",
  426. "KHZ_88P2", "KHZ_96"};
  427. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  428. "KHZ_44P1", "KHZ_48",
  429. "KHZ_88P2", "KHZ_96"};
  430. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  431. "Five", "Six", "Seven",
  432. "Eight"};
  433. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  434. "Six", "Seven", "Eight"};
  435. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  436. "KHZ_16", "KHZ_22P05",
  437. "KHZ_32", "KHZ_44P1", "KHZ_48",
  438. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  439. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  440. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  441. "KHZ_192", "KHZ_32", "KHZ_44P1",
  442. "KHZ_88P2", "KHZ_176P4" };
  443. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  444. "Five", "Six", "Seven", "Eight"};
  445. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  446. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  447. "KHZ_48", "KHZ_176P4",
  448. "KHZ_352P8"};
  449. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  450. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  451. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  452. "KHZ_48", "KHZ_96", "KHZ_192"};
  453. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  454. "Five", "Six", "Seven",
  455. "Eight"};
  456. static const char *const hifi_text[] = {"Off", "On"};
  457. static const char *const qos_text[] = {"Disable", "Enable"};
  458. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  459. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  460. "Five", "Six", "Seven",
  461. "Eight"};
  462. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  463. "KHZ_16", "KHZ_22P05",
  464. "KHZ_32", "KHZ_44P1", "KHZ_48",
  465. "KHZ_88P2", "KHZ_96",
  466. "KHZ_176P4", "KHZ_192",
  467. "KHZ_352P8", "KHZ_384"};
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  497. ext_disp_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  565. cdc_dma_sample_rate_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  567. cdc_dma_sample_rate_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  569. cdc_dma_sample_rate_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  571. cdc_dma_sample_rate_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  577. cdc_dma_sample_rate_text);
  578. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  579. cdc_dma_sample_rate_text);
  580. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  581. cdc_dma_sample_rate_text);
  582. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  583. cdc_dma_sample_rate_text);
  584. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  585. cdc_dma_sample_rate_text);
  586. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  587. cdc_dma_sample_rate_text);
  588. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  589. cdc_dma_sample_rate_text);
  590. static int msm_hifi_control;
  591. static bool codec_reg_done;
  592. static struct snd_soc_aux_dev *msm_aux_dev;
  593. static struct snd_soc_codec_conf *msm_codec_conf;
  594. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  595. static int dmic_0_1_gpio_cnt;
  596. static int dmic_2_3_gpio_cnt;
  597. static void *def_wcd_mbhc_cal(void);
  598. static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
  599. int enable, bool dapm);
  600. static int msm_wsa881x_init(struct snd_soc_component *component);
  601. static int msm_aux_codec_init(struct snd_soc_component *component);
  602. /*
  603. * Need to report LINEIN
  604. * if R/L channel impedance is larger than 5K ohm
  605. */
  606. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  607. .read_fw_bin = false,
  608. .calibration = NULL,
  609. .detect_extn_cable = true,
  610. .mono_stero_detection = false,
  611. .swap_gnd_mic = NULL,
  612. .hs_ext_micbias = true,
  613. .key_code[0] = KEY_MEDIA,
  614. .key_code[1] = KEY_VOICECOMMAND,
  615. .key_code[2] = KEY_VOLUMEUP,
  616. .key_code[3] = KEY_VOLUMEDOWN,
  617. .key_code[4] = 0,
  618. .key_code[5] = 0,
  619. .key_code[6] = 0,
  620. .key_code[7] = 0,
  621. .linein_th = 5000,
  622. .moisture_en = true,
  623. .mbhc_micbias = MIC_BIAS_2,
  624. .anc_micbias = MIC_BIAS_2,
  625. .enable_anc_mic_detect = false,
  626. };
  627. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  628. {"MIC BIAS1", NULL, "MCLK TX"},
  629. {"MIC BIAS2", NULL, "MCLK TX"},
  630. {"MIC BIAS3", NULL, "MCLK TX"},
  631. {"MIC BIAS4", NULL, "MCLK TX"},
  632. };
  633. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  634. {
  635. AFE_API_VERSION_I2S_CONFIG,
  636. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  637. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  638. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  639. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  640. 0,
  641. },
  642. {
  643. AFE_API_VERSION_I2S_CONFIG,
  644. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  645. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  646. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  647. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  648. 0,
  649. },
  650. {
  651. AFE_API_VERSION_I2S_CONFIG,
  652. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  653. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  654. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  655. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  656. 0,
  657. },
  658. {
  659. AFE_API_VERSION_I2S_CONFIG,
  660. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  661. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  662. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  663. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  664. 0,
  665. },
  666. {
  667. AFE_API_VERSION_I2S_CONFIG,
  668. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  669. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  670. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  671. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  672. 0,
  673. }
  674. };
  675. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  676. static int slim_get_sample_rate_val(int sample_rate)
  677. {
  678. int sample_rate_val = 0;
  679. switch (sample_rate) {
  680. case SAMPLING_RATE_8KHZ:
  681. sample_rate_val = 0;
  682. break;
  683. case SAMPLING_RATE_16KHZ:
  684. sample_rate_val = 1;
  685. break;
  686. case SAMPLING_RATE_32KHZ:
  687. sample_rate_val = 2;
  688. break;
  689. case SAMPLING_RATE_44P1KHZ:
  690. sample_rate_val = 3;
  691. break;
  692. case SAMPLING_RATE_48KHZ:
  693. sample_rate_val = 4;
  694. break;
  695. case SAMPLING_RATE_88P2KHZ:
  696. sample_rate_val = 5;
  697. break;
  698. case SAMPLING_RATE_96KHZ:
  699. sample_rate_val = 6;
  700. break;
  701. case SAMPLING_RATE_176P4KHZ:
  702. sample_rate_val = 7;
  703. break;
  704. case SAMPLING_RATE_192KHZ:
  705. sample_rate_val = 8;
  706. break;
  707. case SAMPLING_RATE_352P8KHZ:
  708. sample_rate_val = 9;
  709. break;
  710. case SAMPLING_RATE_384KHZ:
  711. sample_rate_val = 10;
  712. break;
  713. default:
  714. sample_rate_val = 4;
  715. break;
  716. }
  717. return sample_rate_val;
  718. }
  719. static int slim_get_sample_rate(int value)
  720. {
  721. int sample_rate = 0;
  722. switch (value) {
  723. case 0:
  724. sample_rate = SAMPLING_RATE_8KHZ;
  725. break;
  726. case 1:
  727. sample_rate = SAMPLING_RATE_16KHZ;
  728. break;
  729. case 2:
  730. sample_rate = SAMPLING_RATE_32KHZ;
  731. break;
  732. case 3:
  733. sample_rate = SAMPLING_RATE_44P1KHZ;
  734. break;
  735. case 4:
  736. sample_rate = SAMPLING_RATE_48KHZ;
  737. break;
  738. case 5:
  739. sample_rate = SAMPLING_RATE_88P2KHZ;
  740. break;
  741. case 6:
  742. sample_rate = SAMPLING_RATE_96KHZ;
  743. break;
  744. case 7:
  745. sample_rate = SAMPLING_RATE_176P4KHZ;
  746. break;
  747. case 8:
  748. sample_rate = SAMPLING_RATE_192KHZ;
  749. break;
  750. case 9:
  751. sample_rate = SAMPLING_RATE_352P8KHZ;
  752. break;
  753. case 10:
  754. sample_rate = SAMPLING_RATE_384KHZ;
  755. break;
  756. default:
  757. sample_rate = SAMPLING_RATE_48KHZ;
  758. break;
  759. }
  760. return sample_rate;
  761. }
  762. static int slim_get_bit_format_val(int bit_format)
  763. {
  764. int val = 0;
  765. switch (bit_format) {
  766. case SNDRV_PCM_FORMAT_S32_LE:
  767. val = 3;
  768. break;
  769. case SNDRV_PCM_FORMAT_S24_3LE:
  770. val = 2;
  771. break;
  772. case SNDRV_PCM_FORMAT_S24_LE:
  773. val = 1;
  774. break;
  775. case SNDRV_PCM_FORMAT_S16_LE:
  776. default:
  777. val = 0;
  778. break;
  779. }
  780. return val;
  781. }
  782. static int slim_get_bit_format(int val)
  783. {
  784. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  785. switch (val) {
  786. case 0:
  787. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  788. break;
  789. case 1:
  790. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  791. break;
  792. case 2:
  793. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  794. break;
  795. case 3:
  796. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  797. break;
  798. default:
  799. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  800. break;
  801. }
  802. return bit_fmt;
  803. }
  804. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  805. {
  806. int port_id = 0;
  807. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  808. port_id = SLIM_RX_0;
  809. } else if (strnstr(kcontrol->id.name,
  810. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  811. port_id = SLIM_RX_2;
  812. } else if (strnstr(kcontrol->id.name,
  813. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  814. port_id = SLIM_RX_5;
  815. } else if (strnstr(kcontrol->id.name,
  816. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  817. port_id = SLIM_RX_6;
  818. } else if (strnstr(kcontrol->id.name,
  819. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  820. port_id = SLIM_TX_0;
  821. } else if (strnstr(kcontrol->id.name,
  822. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  823. port_id = SLIM_TX_1;
  824. } else {
  825. pr_err("%s: unsupported channel: %s\n",
  826. __func__, kcontrol->id.name);
  827. return -EINVAL;
  828. }
  829. return port_id;
  830. }
  831. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  832. struct snd_ctl_elem_value *ucontrol)
  833. {
  834. int ch_num = slim_get_port_idx(kcontrol);
  835. if (ch_num < 0)
  836. return ch_num;
  837. ucontrol->value.enumerated.item[0] =
  838. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  839. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  840. ch_num, slim_rx_cfg[ch_num].sample_rate,
  841. ucontrol->value.enumerated.item[0]);
  842. return 0;
  843. }
  844. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  845. struct snd_ctl_elem_value *ucontrol)
  846. {
  847. int ch_num = slim_get_port_idx(kcontrol);
  848. if (ch_num < 0)
  849. return ch_num;
  850. slim_rx_cfg[ch_num].sample_rate =
  851. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  852. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  853. ch_num, slim_rx_cfg[ch_num].sample_rate,
  854. ucontrol->value.enumerated.item[0]);
  855. return 0;
  856. }
  857. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  858. struct snd_ctl_elem_value *ucontrol)
  859. {
  860. int ch_num = slim_get_port_idx(kcontrol);
  861. if (ch_num < 0)
  862. return ch_num;
  863. ucontrol->value.enumerated.item[0] =
  864. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  865. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  866. ch_num, slim_tx_cfg[ch_num].sample_rate,
  867. ucontrol->value.enumerated.item[0]);
  868. return 0;
  869. }
  870. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  871. struct snd_ctl_elem_value *ucontrol)
  872. {
  873. int sample_rate = 0;
  874. int ch_num = slim_get_port_idx(kcontrol);
  875. if (ch_num < 0)
  876. return ch_num;
  877. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  878. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  879. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  880. __func__, sample_rate);
  881. return -EINVAL;
  882. }
  883. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  884. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  885. ch_num, slim_tx_cfg[ch_num].sample_rate,
  886. ucontrol->value.enumerated.item[0]);
  887. return 0;
  888. }
  889. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  890. struct snd_ctl_elem_value *ucontrol)
  891. {
  892. int ch_num = slim_get_port_idx(kcontrol);
  893. if (ch_num < 0)
  894. return ch_num;
  895. ucontrol->value.enumerated.item[0] =
  896. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  897. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  898. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  899. ucontrol->value.enumerated.item[0]);
  900. return 0;
  901. }
  902. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  903. struct snd_ctl_elem_value *ucontrol)
  904. {
  905. int ch_num = slim_get_port_idx(kcontrol);
  906. if (ch_num < 0)
  907. return ch_num;
  908. slim_rx_cfg[ch_num].bit_format =
  909. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  910. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  911. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  912. ucontrol->value.enumerated.item[0]);
  913. return 0;
  914. }
  915. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  916. struct snd_ctl_elem_value *ucontrol)
  917. {
  918. int ch_num = slim_get_port_idx(kcontrol);
  919. if (ch_num < 0)
  920. return ch_num;
  921. ucontrol->value.enumerated.item[0] =
  922. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  923. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  924. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  925. ucontrol->value.enumerated.item[0]);
  926. return 0;
  927. }
  928. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  929. struct snd_ctl_elem_value *ucontrol)
  930. {
  931. int ch_num = slim_get_port_idx(kcontrol);
  932. if (ch_num < 0)
  933. return ch_num;
  934. slim_tx_cfg[ch_num].bit_format =
  935. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  936. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  937. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  938. ucontrol->value.enumerated.item[0]);
  939. return 0;
  940. }
  941. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  942. struct snd_ctl_elem_value *ucontrol)
  943. {
  944. int ch_num = slim_get_port_idx(kcontrol);
  945. if (ch_num < 0)
  946. return ch_num;
  947. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  948. ch_num, slim_rx_cfg[ch_num].channels);
  949. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  950. return 0;
  951. }
  952. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  953. struct snd_ctl_elem_value *ucontrol)
  954. {
  955. int ch_num = slim_get_port_idx(kcontrol);
  956. if (ch_num < 0)
  957. return ch_num;
  958. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  959. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  960. ch_num, slim_rx_cfg[ch_num].channels);
  961. return 1;
  962. }
  963. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  964. struct snd_ctl_elem_value *ucontrol)
  965. {
  966. int ch_num = slim_get_port_idx(kcontrol);
  967. if (ch_num < 0)
  968. return ch_num;
  969. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  970. ch_num, slim_tx_cfg[ch_num].channels);
  971. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  972. return 0;
  973. }
  974. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  975. struct snd_ctl_elem_value *ucontrol)
  976. {
  977. int ch_num = slim_get_port_idx(kcontrol);
  978. if (ch_num < 0)
  979. return ch_num;
  980. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  981. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  982. ch_num, slim_tx_cfg[ch_num].channels);
  983. return 1;
  984. }
  985. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  986. struct snd_ctl_elem_value *ucontrol)
  987. {
  988. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  989. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  990. ucontrol->value.integer.value[0]);
  991. return 0;
  992. }
  993. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  994. struct snd_ctl_elem_value *ucontrol)
  995. {
  996. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  997. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  998. return 1;
  999. }
  1000. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  1001. struct snd_ctl_elem_value *ucontrol)
  1002. {
  1003. /*
  1004. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1005. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1006. * value.
  1007. */
  1008. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1009. case SAMPLING_RATE_96KHZ:
  1010. ucontrol->value.integer.value[0] = 5;
  1011. break;
  1012. case SAMPLING_RATE_88P2KHZ:
  1013. ucontrol->value.integer.value[0] = 4;
  1014. break;
  1015. case SAMPLING_RATE_48KHZ:
  1016. ucontrol->value.integer.value[0] = 3;
  1017. break;
  1018. case SAMPLING_RATE_44P1KHZ:
  1019. ucontrol->value.integer.value[0] = 2;
  1020. break;
  1021. case SAMPLING_RATE_16KHZ:
  1022. ucontrol->value.integer.value[0] = 1;
  1023. break;
  1024. case SAMPLING_RATE_8KHZ:
  1025. default:
  1026. ucontrol->value.integer.value[0] = 0;
  1027. break;
  1028. }
  1029. pr_debug("%s: sample rate = %d\n", __func__,
  1030. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1031. return 0;
  1032. }
  1033. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1034. struct snd_ctl_elem_value *ucontrol)
  1035. {
  1036. switch (ucontrol->value.integer.value[0]) {
  1037. case 1:
  1038. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1039. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1040. break;
  1041. case 2:
  1042. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1043. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1044. break;
  1045. case 3:
  1046. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1047. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1048. break;
  1049. case 4:
  1050. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1051. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1052. break;
  1053. case 5:
  1054. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1055. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1056. break;
  1057. case 0:
  1058. default:
  1059. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1060. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1061. break;
  1062. }
  1063. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1064. __func__,
  1065. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1066. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1067. ucontrol->value.enumerated.item[0]);
  1068. return 0;
  1069. }
  1070. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  1071. struct snd_ctl_elem_value *ucontrol)
  1072. {
  1073. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1074. case SAMPLING_RATE_96KHZ:
  1075. ucontrol->value.integer.value[0] = 5;
  1076. break;
  1077. case SAMPLING_RATE_88P2KHZ:
  1078. ucontrol->value.integer.value[0] = 4;
  1079. break;
  1080. case SAMPLING_RATE_48KHZ:
  1081. ucontrol->value.integer.value[0] = 3;
  1082. break;
  1083. case SAMPLING_RATE_44P1KHZ:
  1084. ucontrol->value.integer.value[0] = 2;
  1085. break;
  1086. case SAMPLING_RATE_16KHZ:
  1087. ucontrol->value.integer.value[0] = 1;
  1088. break;
  1089. case SAMPLING_RATE_8KHZ:
  1090. default:
  1091. ucontrol->value.integer.value[0] = 0;
  1092. break;
  1093. }
  1094. pr_debug("%s: sample rate rx = %d", __func__,
  1095. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1096. return 0;
  1097. }
  1098. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  1099. struct snd_ctl_elem_value *ucontrol)
  1100. {
  1101. switch (ucontrol->value.integer.value[0]) {
  1102. case 1:
  1103. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1104. break;
  1105. case 2:
  1106. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1107. break;
  1108. case 3:
  1109. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1110. break;
  1111. case 4:
  1112. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1113. break;
  1114. case 5:
  1115. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1116. break;
  1117. case 0:
  1118. default:
  1119. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1120. break;
  1121. }
  1122. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  1123. __func__,
  1124. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1125. ucontrol->value.enumerated.item[0]);
  1126. return 0;
  1127. }
  1128. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  1129. struct snd_ctl_elem_value *ucontrol)
  1130. {
  1131. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  1132. case SAMPLING_RATE_96KHZ:
  1133. ucontrol->value.integer.value[0] = 5;
  1134. break;
  1135. case SAMPLING_RATE_88P2KHZ:
  1136. ucontrol->value.integer.value[0] = 4;
  1137. break;
  1138. case SAMPLING_RATE_48KHZ:
  1139. ucontrol->value.integer.value[0] = 3;
  1140. break;
  1141. case SAMPLING_RATE_44P1KHZ:
  1142. ucontrol->value.integer.value[0] = 2;
  1143. break;
  1144. case SAMPLING_RATE_16KHZ:
  1145. ucontrol->value.integer.value[0] = 1;
  1146. break;
  1147. case SAMPLING_RATE_8KHZ:
  1148. default:
  1149. ucontrol->value.integer.value[0] = 0;
  1150. break;
  1151. }
  1152. pr_debug("%s: sample rate tx = %d", __func__,
  1153. slim_tx_cfg[SLIM_TX_7].sample_rate);
  1154. return 0;
  1155. }
  1156. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  1157. struct snd_ctl_elem_value *ucontrol)
  1158. {
  1159. switch (ucontrol->value.integer.value[0]) {
  1160. case 1:
  1161. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1162. break;
  1163. case 2:
  1164. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1165. break;
  1166. case 3:
  1167. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1168. break;
  1169. case 4:
  1170. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1171. break;
  1172. case 5:
  1173. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1174. break;
  1175. case 0:
  1176. default:
  1177. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1178. break;
  1179. }
  1180. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  1181. __func__,
  1182. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1183. ucontrol->value.enumerated.item[0]);
  1184. return 0;
  1185. }
  1186. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1187. {
  1188. int idx = 0;
  1189. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1190. sizeof("WSA_CDC_DMA_RX_0")))
  1191. idx = WSA_CDC_DMA_RX_0;
  1192. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1193. sizeof("WSA_CDC_DMA_RX_0")))
  1194. idx = WSA_CDC_DMA_RX_1;
  1195. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1196. sizeof("RX_CDC_DMA_RX_0")))
  1197. idx = RX_CDC_DMA_RX_0;
  1198. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1199. sizeof("RX_CDC_DMA_RX_1")))
  1200. idx = RX_CDC_DMA_RX_1;
  1201. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1202. sizeof("RX_CDC_DMA_RX_2")))
  1203. idx = RX_CDC_DMA_RX_2;
  1204. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1205. sizeof("RX_CDC_DMA_RX_3")))
  1206. idx = RX_CDC_DMA_RX_3;
  1207. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1208. sizeof("RX_CDC_DMA_RX_5")))
  1209. idx = RX_CDC_DMA_RX_5;
  1210. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1211. sizeof("WSA_CDC_DMA_TX_0")))
  1212. idx = WSA_CDC_DMA_TX_0;
  1213. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1214. sizeof("WSA_CDC_DMA_TX_1")))
  1215. idx = WSA_CDC_DMA_TX_1;
  1216. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1217. sizeof("WSA_CDC_DMA_TX_2")))
  1218. idx = WSA_CDC_DMA_TX_2;
  1219. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1220. sizeof("TX_CDC_DMA_TX_0")))
  1221. idx = TX_CDC_DMA_TX_0;
  1222. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1223. sizeof("TX_CDC_DMA_TX_3")))
  1224. idx = TX_CDC_DMA_TX_3;
  1225. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1226. sizeof("TX_CDC_DMA_TX_4")))
  1227. idx = TX_CDC_DMA_TX_4;
  1228. else {
  1229. pr_err("%s: unsupported channel: %s\n",
  1230. __func__, kcontrol->id.name);
  1231. return -EINVAL;
  1232. }
  1233. return idx;
  1234. }
  1235. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1236. struct snd_ctl_elem_value *ucontrol)
  1237. {
  1238. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1239. if (ch_num < 0) {
  1240. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1241. return ch_num;
  1242. }
  1243. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1244. cdc_dma_rx_cfg[ch_num].channels - 1);
  1245. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1246. return 0;
  1247. }
  1248. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1249. struct snd_ctl_elem_value *ucontrol)
  1250. {
  1251. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1252. if (ch_num < 0) {
  1253. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1254. return ch_num;
  1255. }
  1256. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1257. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1258. cdc_dma_rx_cfg[ch_num].channels);
  1259. return 1;
  1260. }
  1261. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1262. struct snd_ctl_elem_value *ucontrol)
  1263. {
  1264. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1265. if (ch_num < 0) {
  1266. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1267. return ch_num;
  1268. }
  1269. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1270. case SNDRV_PCM_FORMAT_S32_LE:
  1271. ucontrol->value.integer.value[0] = 3;
  1272. break;
  1273. case SNDRV_PCM_FORMAT_S24_3LE:
  1274. ucontrol->value.integer.value[0] = 2;
  1275. break;
  1276. case SNDRV_PCM_FORMAT_S24_LE:
  1277. ucontrol->value.integer.value[0] = 1;
  1278. break;
  1279. case SNDRV_PCM_FORMAT_S16_LE:
  1280. default:
  1281. ucontrol->value.integer.value[0] = 0;
  1282. break;
  1283. }
  1284. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1285. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1286. ucontrol->value.integer.value[0]);
  1287. return 0;
  1288. }
  1289. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1290. struct snd_ctl_elem_value *ucontrol)
  1291. {
  1292. int rc = 0;
  1293. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1294. if (ch_num < 0) {
  1295. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1296. return ch_num;
  1297. }
  1298. switch (ucontrol->value.integer.value[0]) {
  1299. case 3:
  1300. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1301. break;
  1302. case 2:
  1303. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1304. break;
  1305. case 1:
  1306. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1307. break;
  1308. case 0:
  1309. default:
  1310. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1311. break;
  1312. }
  1313. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1314. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1315. ucontrol->value.integer.value[0]);
  1316. return rc;
  1317. }
  1318. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1319. {
  1320. int sample_rate_val = 0;
  1321. switch (sample_rate) {
  1322. case SAMPLING_RATE_8KHZ:
  1323. sample_rate_val = 0;
  1324. break;
  1325. case SAMPLING_RATE_11P025KHZ:
  1326. sample_rate_val = 1;
  1327. break;
  1328. case SAMPLING_RATE_16KHZ:
  1329. sample_rate_val = 2;
  1330. break;
  1331. case SAMPLING_RATE_22P05KHZ:
  1332. sample_rate_val = 3;
  1333. break;
  1334. case SAMPLING_RATE_32KHZ:
  1335. sample_rate_val = 4;
  1336. break;
  1337. case SAMPLING_RATE_44P1KHZ:
  1338. sample_rate_val = 5;
  1339. break;
  1340. case SAMPLING_RATE_48KHZ:
  1341. sample_rate_val = 6;
  1342. break;
  1343. case SAMPLING_RATE_88P2KHZ:
  1344. sample_rate_val = 7;
  1345. break;
  1346. case SAMPLING_RATE_96KHZ:
  1347. sample_rate_val = 8;
  1348. break;
  1349. case SAMPLING_RATE_176P4KHZ:
  1350. sample_rate_val = 9;
  1351. break;
  1352. case SAMPLING_RATE_192KHZ:
  1353. sample_rate_val = 10;
  1354. break;
  1355. case SAMPLING_RATE_352P8KHZ:
  1356. sample_rate_val = 11;
  1357. break;
  1358. case SAMPLING_RATE_384KHZ:
  1359. sample_rate_val = 12;
  1360. break;
  1361. default:
  1362. sample_rate_val = 6;
  1363. break;
  1364. }
  1365. return sample_rate_val;
  1366. }
  1367. static int cdc_dma_get_sample_rate(int value)
  1368. {
  1369. int sample_rate = 0;
  1370. switch (value) {
  1371. case 0:
  1372. sample_rate = SAMPLING_RATE_8KHZ;
  1373. break;
  1374. case 1:
  1375. sample_rate = SAMPLING_RATE_11P025KHZ;
  1376. break;
  1377. case 2:
  1378. sample_rate = SAMPLING_RATE_16KHZ;
  1379. break;
  1380. case 3:
  1381. sample_rate = SAMPLING_RATE_22P05KHZ;
  1382. break;
  1383. case 4:
  1384. sample_rate = SAMPLING_RATE_32KHZ;
  1385. break;
  1386. case 5:
  1387. sample_rate = SAMPLING_RATE_44P1KHZ;
  1388. break;
  1389. case 6:
  1390. sample_rate = SAMPLING_RATE_48KHZ;
  1391. break;
  1392. case 7:
  1393. sample_rate = SAMPLING_RATE_88P2KHZ;
  1394. break;
  1395. case 8:
  1396. sample_rate = SAMPLING_RATE_96KHZ;
  1397. break;
  1398. case 9:
  1399. sample_rate = SAMPLING_RATE_176P4KHZ;
  1400. break;
  1401. case 10:
  1402. sample_rate = SAMPLING_RATE_192KHZ;
  1403. break;
  1404. case 11:
  1405. sample_rate = SAMPLING_RATE_352P8KHZ;
  1406. break;
  1407. case 12:
  1408. sample_rate = SAMPLING_RATE_384KHZ;
  1409. break;
  1410. default:
  1411. sample_rate = SAMPLING_RATE_48KHZ;
  1412. break;
  1413. }
  1414. return sample_rate;
  1415. }
  1416. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1417. struct snd_ctl_elem_value *ucontrol)
  1418. {
  1419. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1420. if (ch_num < 0) {
  1421. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1422. return ch_num;
  1423. }
  1424. ucontrol->value.enumerated.item[0] =
  1425. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1426. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1427. cdc_dma_rx_cfg[ch_num].sample_rate);
  1428. return 0;
  1429. }
  1430. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1431. struct snd_ctl_elem_value *ucontrol)
  1432. {
  1433. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1434. if (ch_num < 0) {
  1435. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1436. return ch_num;
  1437. }
  1438. cdc_dma_rx_cfg[ch_num].sample_rate =
  1439. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1440. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1441. __func__, ucontrol->value.enumerated.item[0],
  1442. cdc_dma_rx_cfg[ch_num].sample_rate);
  1443. return 0;
  1444. }
  1445. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1446. struct snd_ctl_elem_value *ucontrol)
  1447. {
  1448. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1449. if (ch_num < 0) {
  1450. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1451. return ch_num;
  1452. }
  1453. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1454. cdc_dma_tx_cfg[ch_num].channels);
  1455. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1456. return 0;
  1457. }
  1458. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1459. struct snd_ctl_elem_value *ucontrol)
  1460. {
  1461. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1462. if (ch_num < 0) {
  1463. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1464. return ch_num;
  1465. }
  1466. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1467. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1468. cdc_dma_tx_cfg[ch_num].channels);
  1469. return 1;
  1470. }
  1471. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1472. struct snd_ctl_elem_value *ucontrol)
  1473. {
  1474. int sample_rate_val;
  1475. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1476. if (ch_num < 0) {
  1477. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1478. return ch_num;
  1479. }
  1480. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1481. case SAMPLING_RATE_384KHZ:
  1482. sample_rate_val = 12;
  1483. break;
  1484. case SAMPLING_RATE_352P8KHZ:
  1485. sample_rate_val = 11;
  1486. break;
  1487. case SAMPLING_RATE_192KHZ:
  1488. sample_rate_val = 10;
  1489. break;
  1490. case SAMPLING_RATE_176P4KHZ:
  1491. sample_rate_val = 9;
  1492. break;
  1493. case SAMPLING_RATE_96KHZ:
  1494. sample_rate_val = 8;
  1495. break;
  1496. case SAMPLING_RATE_88P2KHZ:
  1497. sample_rate_val = 7;
  1498. break;
  1499. case SAMPLING_RATE_48KHZ:
  1500. sample_rate_val = 6;
  1501. break;
  1502. case SAMPLING_RATE_44P1KHZ:
  1503. sample_rate_val = 5;
  1504. break;
  1505. case SAMPLING_RATE_32KHZ:
  1506. sample_rate_val = 4;
  1507. break;
  1508. case SAMPLING_RATE_22P05KHZ:
  1509. sample_rate_val = 3;
  1510. break;
  1511. case SAMPLING_RATE_16KHZ:
  1512. sample_rate_val = 2;
  1513. break;
  1514. case SAMPLING_RATE_11P025KHZ:
  1515. sample_rate_val = 1;
  1516. break;
  1517. case SAMPLING_RATE_8KHZ:
  1518. sample_rate_val = 0;
  1519. break;
  1520. default:
  1521. sample_rate_val = 6;
  1522. break;
  1523. }
  1524. ucontrol->value.integer.value[0] = sample_rate_val;
  1525. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1526. cdc_dma_tx_cfg[ch_num].sample_rate);
  1527. return 0;
  1528. }
  1529. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1530. struct snd_ctl_elem_value *ucontrol)
  1531. {
  1532. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1533. if (ch_num < 0) {
  1534. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1535. return ch_num;
  1536. }
  1537. switch (ucontrol->value.integer.value[0]) {
  1538. case 12:
  1539. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1540. break;
  1541. case 11:
  1542. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1543. break;
  1544. case 10:
  1545. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1546. break;
  1547. case 9:
  1548. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1549. break;
  1550. case 8:
  1551. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1552. break;
  1553. case 7:
  1554. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1555. break;
  1556. case 6:
  1557. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1558. break;
  1559. case 5:
  1560. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1561. break;
  1562. case 4:
  1563. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1564. break;
  1565. case 3:
  1566. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1567. break;
  1568. case 2:
  1569. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1570. break;
  1571. case 1:
  1572. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1573. break;
  1574. case 0:
  1575. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1576. break;
  1577. default:
  1578. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1579. break;
  1580. }
  1581. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1582. __func__, ucontrol->value.integer.value[0],
  1583. cdc_dma_tx_cfg[ch_num].sample_rate);
  1584. return 0;
  1585. }
  1586. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1587. struct snd_ctl_elem_value *ucontrol)
  1588. {
  1589. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1590. if (ch_num < 0) {
  1591. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1592. return ch_num;
  1593. }
  1594. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1595. case SNDRV_PCM_FORMAT_S32_LE:
  1596. ucontrol->value.integer.value[0] = 3;
  1597. break;
  1598. case SNDRV_PCM_FORMAT_S24_3LE:
  1599. ucontrol->value.integer.value[0] = 2;
  1600. break;
  1601. case SNDRV_PCM_FORMAT_S24_LE:
  1602. ucontrol->value.integer.value[0] = 1;
  1603. break;
  1604. case SNDRV_PCM_FORMAT_S16_LE:
  1605. default:
  1606. ucontrol->value.integer.value[0] = 0;
  1607. break;
  1608. }
  1609. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1610. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1611. ucontrol->value.integer.value[0]);
  1612. return 0;
  1613. }
  1614. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1615. struct snd_ctl_elem_value *ucontrol)
  1616. {
  1617. int rc = 0;
  1618. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1619. if (ch_num < 0) {
  1620. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1621. return ch_num;
  1622. }
  1623. switch (ucontrol->value.integer.value[0]) {
  1624. case 3:
  1625. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1626. break;
  1627. case 2:
  1628. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1629. break;
  1630. case 1:
  1631. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1632. break;
  1633. case 0:
  1634. default:
  1635. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1636. break;
  1637. }
  1638. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1639. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1640. ucontrol->value.integer.value[0]);
  1641. return rc;
  1642. }
  1643. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1644. struct snd_ctl_elem_value *ucontrol)
  1645. {
  1646. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1647. usb_rx_cfg.channels);
  1648. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1649. return 0;
  1650. }
  1651. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1652. struct snd_ctl_elem_value *ucontrol)
  1653. {
  1654. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1655. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1656. return 1;
  1657. }
  1658. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1659. struct snd_ctl_elem_value *ucontrol)
  1660. {
  1661. int sample_rate_val;
  1662. switch (usb_rx_cfg.sample_rate) {
  1663. case SAMPLING_RATE_384KHZ:
  1664. sample_rate_val = 12;
  1665. break;
  1666. case SAMPLING_RATE_352P8KHZ:
  1667. sample_rate_val = 11;
  1668. break;
  1669. case SAMPLING_RATE_192KHZ:
  1670. sample_rate_val = 10;
  1671. break;
  1672. case SAMPLING_RATE_176P4KHZ:
  1673. sample_rate_val = 9;
  1674. break;
  1675. case SAMPLING_RATE_96KHZ:
  1676. sample_rate_val = 8;
  1677. break;
  1678. case SAMPLING_RATE_88P2KHZ:
  1679. sample_rate_val = 7;
  1680. break;
  1681. case SAMPLING_RATE_48KHZ:
  1682. sample_rate_val = 6;
  1683. break;
  1684. case SAMPLING_RATE_44P1KHZ:
  1685. sample_rate_val = 5;
  1686. break;
  1687. case SAMPLING_RATE_32KHZ:
  1688. sample_rate_val = 4;
  1689. break;
  1690. case SAMPLING_RATE_22P05KHZ:
  1691. sample_rate_val = 3;
  1692. break;
  1693. case SAMPLING_RATE_16KHZ:
  1694. sample_rate_val = 2;
  1695. break;
  1696. case SAMPLING_RATE_11P025KHZ:
  1697. sample_rate_val = 1;
  1698. break;
  1699. case SAMPLING_RATE_8KHZ:
  1700. default:
  1701. sample_rate_val = 0;
  1702. break;
  1703. }
  1704. ucontrol->value.integer.value[0] = sample_rate_val;
  1705. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1706. usb_rx_cfg.sample_rate);
  1707. return 0;
  1708. }
  1709. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1710. struct snd_ctl_elem_value *ucontrol)
  1711. {
  1712. switch (ucontrol->value.integer.value[0]) {
  1713. case 12:
  1714. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1715. break;
  1716. case 11:
  1717. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1718. break;
  1719. case 10:
  1720. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1721. break;
  1722. case 9:
  1723. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1724. break;
  1725. case 8:
  1726. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1727. break;
  1728. case 7:
  1729. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1730. break;
  1731. case 6:
  1732. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1733. break;
  1734. case 5:
  1735. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1736. break;
  1737. case 4:
  1738. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1739. break;
  1740. case 3:
  1741. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1742. break;
  1743. case 2:
  1744. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1745. break;
  1746. case 1:
  1747. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1748. break;
  1749. case 0:
  1750. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1751. break;
  1752. default:
  1753. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1754. break;
  1755. }
  1756. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1757. __func__, ucontrol->value.integer.value[0],
  1758. usb_rx_cfg.sample_rate);
  1759. return 0;
  1760. }
  1761. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1762. struct snd_ctl_elem_value *ucontrol)
  1763. {
  1764. switch (usb_rx_cfg.bit_format) {
  1765. case SNDRV_PCM_FORMAT_S32_LE:
  1766. ucontrol->value.integer.value[0] = 3;
  1767. break;
  1768. case SNDRV_PCM_FORMAT_S24_3LE:
  1769. ucontrol->value.integer.value[0] = 2;
  1770. break;
  1771. case SNDRV_PCM_FORMAT_S24_LE:
  1772. ucontrol->value.integer.value[0] = 1;
  1773. break;
  1774. case SNDRV_PCM_FORMAT_S16_LE:
  1775. default:
  1776. ucontrol->value.integer.value[0] = 0;
  1777. break;
  1778. }
  1779. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1780. __func__, usb_rx_cfg.bit_format,
  1781. ucontrol->value.integer.value[0]);
  1782. return 0;
  1783. }
  1784. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1785. struct snd_ctl_elem_value *ucontrol)
  1786. {
  1787. int rc = 0;
  1788. switch (ucontrol->value.integer.value[0]) {
  1789. case 3:
  1790. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1791. break;
  1792. case 2:
  1793. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1794. break;
  1795. case 1:
  1796. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1797. break;
  1798. case 0:
  1799. default:
  1800. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1801. break;
  1802. }
  1803. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1804. __func__, usb_rx_cfg.bit_format,
  1805. ucontrol->value.integer.value[0]);
  1806. return rc;
  1807. }
  1808. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1809. struct snd_ctl_elem_value *ucontrol)
  1810. {
  1811. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1812. usb_tx_cfg.channels);
  1813. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1814. return 0;
  1815. }
  1816. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1817. struct snd_ctl_elem_value *ucontrol)
  1818. {
  1819. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1820. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1821. return 1;
  1822. }
  1823. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1824. struct snd_ctl_elem_value *ucontrol)
  1825. {
  1826. int sample_rate_val;
  1827. switch (usb_tx_cfg.sample_rate) {
  1828. case SAMPLING_RATE_384KHZ:
  1829. sample_rate_val = 12;
  1830. break;
  1831. case SAMPLING_RATE_352P8KHZ:
  1832. sample_rate_val = 11;
  1833. break;
  1834. case SAMPLING_RATE_192KHZ:
  1835. sample_rate_val = 10;
  1836. break;
  1837. case SAMPLING_RATE_176P4KHZ:
  1838. sample_rate_val = 9;
  1839. break;
  1840. case SAMPLING_RATE_96KHZ:
  1841. sample_rate_val = 8;
  1842. break;
  1843. case SAMPLING_RATE_88P2KHZ:
  1844. sample_rate_val = 7;
  1845. break;
  1846. case SAMPLING_RATE_48KHZ:
  1847. sample_rate_val = 6;
  1848. break;
  1849. case SAMPLING_RATE_44P1KHZ:
  1850. sample_rate_val = 5;
  1851. break;
  1852. case SAMPLING_RATE_32KHZ:
  1853. sample_rate_val = 4;
  1854. break;
  1855. case SAMPLING_RATE_22P05KHZ:
  1856. sample_rate_val = 3;
  1857. break;
  1858. case SAMPLING_RATE_16KHZ:
  1859. sample_rate_val = 2;
  1860. break;
  1861. case SAMPLING_RATE_11P025KHZ:
  1862. sample_rate_val = 1;
  1863. break;
  1864. case SAMPLING_RATE_8KHZ:
  1865. sample_rate_val = 0;
  1866. break;
  1867. default:
  1868. sample_rate_val = 6;
  1869. break;
  1870. }
  1871. ucontrol->value.integer.value[0] = sample_rate_val;
  1872. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1873. usb_tx_cfg.sample_rate);
  1874. return 0;
  1875. }
  1876. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1877. struct snd_ctl_elem_value *ucontrol)
  1878. {
  1879. switch (ucontrol->value.integer.value[0]) {
  1880. case 12:
  1881. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1882. break;
  1883. case 11:
  1884. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1885. break;
  1886. case 10:
  1887. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1888. break;
  1889. case 9:
  1890. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1891. break;
  1892. case 8:
  1893. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1894. break;
  1895. case 7:
  1896. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1897. break;
  1898. case 6:
  1899. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1900. break;
  1901. case 5:
  1902. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1903. break;
  1904. case 4:
  1905. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1906. break;
  1907. case 3:
  1908. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1909. break;
  1910. case 2:
  1911. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1912. break;
  1913. case 1:
  1914. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1915. break;
  1916. case 0:
  1917. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1918. break;
  1919. default:
  1920. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1921. break;
  1922. }
  1923. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1924. __func__, ucontrol->value.integer.value[0],
  1925. usb_tx_cfg.sample_rate);
  1926. return 0;
  1927. }
  1928. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1929. struct snd_ctl_elem_value *ucontrol)
  1930. {
  1931. switch (usb_tx_cfg.bit_format) {
  1932. case SNDRV_PCM_FORMAT_S32_LE:
  1933. ucontrol->value.integer.value[0] = 3;
  1934. break;
  1935. case SNDRV_PCM_FORMAT_S24_3LE:
  1936. ucontrol->value.integer.value[0] = 2;
  1937. break;
  1938. case SNDRV_PCM_FORMAT_S24_LE:
  1939. ucontrol->value.integer.value[0] = 1;
  1940. break;
  1941. case SNDRV_PCM_FORMAT_S16_LE:
  1942. default:
  1943. ucontrol->value.integer.value[0] = 0;
  1944. break;
  1945. }
  1946. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1947. __func__, usb_tx_cfg.bit_format,
  1948. ucontrol->value.integer.value[0]);
  1949. return 0;
  1950. }
  1951. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1952. struct snd_ctl_elem_value *ucontrol)
  1953. {
  1954. int rc = 0;
  1955. switch (ucontrol->value.integer.value[0]) {
  1956. case 3:
  1957. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1958. break;
  1959. case 2:
  1960. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1961. break;
  1962. case 1:
  1963. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1964. break;
  1965. case 0:
  1966. default:
  1967. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1968. break;
  1969. }
  1970. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1971. __func__, usb_tx_cfg.bit_format,
  1972. ucontrol->value.integer.value[0]);
  1973. return rc;
  1974. }
  1975. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1976. {
  1977. int idx;
  1978. if (strnstr(kcontrol->id.name, "Display Port RX",
  1979. sizeof("Display Port RX"))) {
  1980. idx = DP_RX_IDX;
  1981. } else {
  1982. pr_err("%s: unsupported BE: %s\n",
  1983. __func__, kcontrol->id.name);
  1984. idx = -EINVAL;
  1985. }
  1986. return idx;
  1987. }
  1988. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1989. struct snd_ctl_elem_value *ucontrol)
  1990. {
  1991. int idx = ext_disp_get_port_idx(kcontrol);
  1992. if (idx < 0)
  1993. return idx;
  1994. switch (ext_disp_rx_cfg[idx].bit_format) {
  1995. case SNDRV_PCM_FORMAT_S24_3LE:
  1996. ucontrol->value.integer.value[0] = 2;
  1997. break;
  1998. case SNDRV_PCM_FORMAT_S24_LE:
  1999. ucontrol->value.integer.value[0] = 1;
  2000. break;
  2001. case SNDRV_PCM_FORMAT_S16_LE:
  2002. default:
  2003. ucontrol->value.integer.value[0] = 0;
  2004. break;
  2005. }
  2006. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2007. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2008. ucontrol->value.integer.value[0]);
  2009. return 0;
  2010. }
  2011. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  2012. struct snd_ctl_elem_value *ucontrol)
  2013. {
  2014. int idx = ext_disp_get_port_idx(kcontrol);
  2015. if (idx < 0)
  2016. return idx;
  2017. switch (ucontrol->value.integer.value[0]) {
  2018. case 2:
  2019. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2020. break;
  2021. case 1:
  2022. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2023. break;
  2024. case 0:
  2025. default:
  2026. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2027. break;
  2028. }
  2029. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2030. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2031. ucontrol->value.integer.value[0]);
  2032. return 0;
  2033. }
  2034. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  2035. struct snd_ctl_elem_value *ucontrol)
  2036. {
  2037. int idx = ext_disp_get_port_idx(kcontrol);
  2038. if (idx < 0)
  2039. return idx;
  2040. ucontrol->value.integer.value[0] =
  2041. ext_disp_rx_cfg[idx].channels - 2;
  2042. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2043. idx, ext_disp_rx_cfg[idx].channels);
  2044. return 0;
  2045. }
  2046. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  2047. struct snd_ctl_elem_value *ucontrol)
  2048. {
  2049. int idx = ext_disp_get_port_idx(kcontrol);
  2050. if (idx < 0)
  2051. return idx;
  2052. ext_disp_rx_cfg[idx].channels =
  2053. ucontrol->value.integer.value[0] + 2;
  2054. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2055. idx, ext_disp_rx_cfg[idx].channels);
  2056. return 1;
  2057. }
  2058. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2059. struct snd_ctl_elem_value *ucontrol)
  2060. {
  2061. int sample_rate_val;
  2062. int idx = ext_disp_get_port_idx(kcontrol);
  2063. if (idx < 0)
  2064. return idx;
  2065. switch (ext_disp_rx_cfg[idx].sample_rate) {
  2066. case SAMPLING_RATE_176P4KHZ:
  2067. sample_rate_val = 6;
  2068. break;
  2069. case SAMPLING_RATE_88P2KHZ:
  2070. sample_rate_val = 5;
  2071. break;
  2072. case SAMPLING_RATE_44P1KHZ:
  2073. sample_rate_val = 4;
  2074. break;
  2075. case SAMPLING_RATE_32KHZ:
  2076. sample_rate_val = 3;
  2077. break;
  2078. case SAMPLING_RATE_192KHZ:
  2079. sample_rate_val = 2;
  2080. break;
  2081. case SAMPLING_RATE_96KHZ:
  2082. sample_rate_val = 1;
  2083. break;
  2084. case SAMPLING_RATE_48KHZ:
  2085. default:
  2086. sample_rate_val = 0;
  2087. break;
  2088. }
  2089. ucontrol->value.integer.value[0] = sample_rate_val;
  2090. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  2091. idx, ext_disp_rx_cfg[idx].sample_rate);
  2092. return 0;
  2093. }
  2094. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2095. struct snd_ctl_elem_value *ucontrol)
  2096. {
  2097. int idx = ext_disp_get_port_idx(kcontrol);
  2098. if (idx < 0)
  2099. return idx;
  2100. switch (ucontrol->value.integer.value[0]) {
  2101. case 6:
  2102. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  2103. break;
  2104. case 5:
  2105. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  2106. break;
  2107. case 4:
  2108. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  2109. break;
  2110. case 3:
  2111. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  2112. break;
  2113. case 2:
  2114. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  2115. break;
  2116. case 1:
  2117. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  2118. break;
  2119. case 0:
  2120. default:
  2121. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2122. break;
  2123. }
  2124. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2125. __func__, ucontrol->value.integer.value[0], idx,
  2126. ext_disp_rx_cfg[idx].sample_rate);
  2127. return 0;
  2128. }
  2129. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2130. struct snd_ctl_elem_value *ucontrol)
  2131. {
  2132. pr_debug("%s: proxy_rx channels = %d\n",
  2133. __func__, proxy_rx_cfg.channels);
  2134. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2135. return 0;
  2136. }
  2137. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2138. struct snd_ctl_elem_value *ucontrol)
  2139. {
  2140. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2141. pr_debug("%s: proxy_rx channels = %d\n",
  2142. __func__, proxy_rx_cfg.channels);
  2143. return 1;
  2144. }
  2145. static int tdm_get_sample_rate(int value)
  2146. {
  2147. int sample_rate = 0;
  2148. switch (value) {
  2149. case 0:
  2150. sample_rate = SAMPLING_RATE_8KHZ;
  2151. break;
  2152. case 1:
  2153. sample_rate = SAMPLING_RATE_16KHZ;
  2154. break;
  2155. case 2:
  2156. sample_rate = SAMPLING_RATE_32KHZ;
  2157. break;
  2158. case 3:
  2159. sample_rate = SAMPLING_RATE_48KHZ;
  2160. break;
  2161. case 4:
  2162. sample_rate = SAMPLING_RATE_176P4KHZ;
  2163. break;
  2164. case 5:
  2165. sample_rate = SAMPLING_RATE_352P8KHZ;
  2166. break;
  2167. default:
  2168. sample_rate = SAMPLING_RATE_48KHZ;
  2169. break;
  2170. }
  2171. return sample_rate;
  2172. }
  2173. static int aux_pcm_get_sample_rate(int value)
  2174. {
  2175. int sample_rate;
  2176. switch (value) {
  2177. case 1:
  2178. sample_rate = SAMPLING_RATE_16KHZ;
  2179. break;
  2180. case 0:
  2181. default:
  2182. sample_rate = SAMPLING_RATE_8KHZ;
  2183. break;
  2184. }
  2185. return sample_rate;
  2186. }
  2187. static int tdm_get_sample_rate_val(int sample_rate)
  2188. {
  2189. int sample_rate_val = 0;
  2190. switch (sample_rate) {
  2191. case SAMPLING_RATE_8KHZ:
  2192. sample_rate_val = 0;
  2193. break;
  2194. case SAMPLING_RATE_16KHZ:
  2195. sample_rate_val = 1;
  2196. break;
  2197. case SAMPLING_RATE_32KHZ:
  2198. sample_rate_val = 2;
  2199. break;
  2200. case SAMPLING_RATE_48KHZ:
  2201. sample_rate_val = 3;
  2202. break;
  2203. case SAMPLING_RATE_176P4KHZ:
  2204. sample_rate_val = 4;
  2205. break;
  2206. case SAMPLING_RATE_352P8KHZ:
  2207. sample_rate_val = 5;
  2208. break;
  2209. default:
  2210. sample_rate_val = 3;
  2211. break;
  2212. }
  2213. return sample_rate_val;
  2214. }
  2215. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2216. {
  2217. int sample_rate_val;
  2218. switch (sample_rate) {
  2219. case SAMPLING_RATE_16KHZ:
  2220. sample_rate_val = 1;
  2221. break;
  2222. case SAMPLING_RATE_8KHZ:
  2223. default:
  2224. sample_rate_val = 0;
  2225. break;
  2226. }
  2227. return sample_rate_val;
  2228. }
  2229. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2230. struct tdm_port *port)
  2231. {
  2232. if (port) {
  2233. if (strnstr(kcontrol->id.name, "PRI",
  2234. sizeof(kcontrol->id.name))) {
  2235. port->mode = TDM_PRI;
  2236. } else if (strnstr(kcontrol->id.name, "SEC",
  2237. sizeof(kcontrol->id.name))) {
  2238. port->mode = TDM_SEC;
  2239. } else if (strnstr(kcontrol->id.name, "TERT",
  2240. sizeof(kcontrol->id.name))) {
  2241. port->mode = TDM_TERT;
  2242. } else if (strnstr(kcontrol->id.name, "QUAT",
  2243. sizeof(kcontrol->id.name))) {
  2244. port->mode = TDM_QUAT;
  2245. } else if (strnstr(kcontrol->id.name, "QUIN",
  2246. sizeof(kcontrol->id.name))) {
  2247. port->mode = TDM_QUIN;
  2248. } else {
  2249. pr_err("%s: unsupported mode in: %s\n",
  2250. __func__, kcontrol->id.name);
  2251. return -EINVAL;
  2252. }
  2253. if (strnstr(kcontrol->id.name, "RX_0",
  2254. sizeof(kcontrol->id.name)) ||
  2255. strnstr(kcontrol->id.name, "TX_0",
  2256. sizeof(kcontrol->id.name))) {
  2257. port->channel = TDM_0;
  2258. } else if (strnstr(kcontrol->id.name, "RX_1",
  2259. sizeof(kcontrol->id.name)) ||
  2260. strnstr(kcontrol->id.name, "TX_1",
  2261. sizeof(kcontrol->id.name))) {
  2262. port->channel = TDM_1;
  2263. } else if (strnstr(kcontrol->id.name, "RX_2",
  2264. sizeof(kcontrol->id.name)) ||
  2265. strnstr(kcontrol->id.name, "TX_2",
  2266. sizeof(kcontrol->id.name))) {
  2267. port->channel = TDM_2;
  2268. } else if (strnstr(kcontrol->id.name, "RX_3",
  2269. sizeof(kcontrol->id.name)) ||
  2270. strnstr(kcontrol->id.name, "TX_3",
  2271. sizeof(kcontrol->id.name))) {
  2272. port->channel = TDM_3;
  2273. } else if (strnstr(kcontrol->id.name, "RX_4",
  2274. sizeof(kcontrol->id.name)) ||
  2275. strnstr(kcontrol->id.name, "TX_4",
  2276. sizeof(kcontrol->id.name))) {
  2277. port->channel = TDM_4;
  2278. } else if (strnstr(kcontrol->id.name, "RX_5",
  2279. sizeof(kcontrol->id.name)) ||
  2280. strnstr(kcontrol->id.name, "TX_5",
  2281. sizeof(kcontrol->id.name))) {
  2282. port->channel = TDM_5;
  2283. } else if (strnstr(kcontrol->id.name, "RX_6",
  2284. sizeof(kcontrol->id.name)) ||
  2285. strnstr(kcontrol->id.name, "TX_6",
  2286. sizeof(kcontrol->id.name))) {
  2287. port->channel = TDM_6;
  2288. } else if (strnstr(kcontrol->id.name, "RX_7",
  2289. sizeof(kcontrol->id.name)) ||
  2290. strnstr(kcontrol->id.name, "TX_7",
  2291. sizeof(kcontrol->id.name))) {
  2292. port->channel = TDM_7;
  2293. } else {
  2294. pr_err("%s: unsupported channel in: %s\n",
  2295. __func__, kcontrol->id.name);
  2296. return -EINVAL;
  2297. }
  2298. } else {
  2299. return -EINVAL;
  2300. }
  2301. return 0;
  2302. }
  2303. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2304. struct snd_ctl_elem_value *ucontrol)
  2305. {
  2306. struct tdm_port port;
  2307. int ret = tdm_get_port_idx(kcontrol, &port);
  2308. if (ret) {
  2309. pr_err("%s: unsupported control: %s\n",
  2310. __func__, kcontrol->id.name);
  2311. } else {
  2312. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2313. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2314. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2315. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2316. ucontrol->value.enumerated.item[0]);
  2317. }
  2318. return ret;
  2319. }
  2320. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2321. struct snd_ctl_elem_value *ucontrol)
  2322. {
  2323. struct tdm_port port;
  2324. int ret = tdm_get_port_idx(kcontrol, &port);
  2325. if (ret) {
  2326. pr_err("%s: unsupported control: %s\n",
  2327. __func__, kcontrol->id.name);
  2328. } else {
  2329. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2330. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2331. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2332. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2333. ucontrol->value.enumerated.item[0]);
  2334. }
  2335. return ret;
  2336. }
  2337. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2338. struct snd_ctl_elem_value *ucontrol)
  2339. {
  2340. struct tdm_port port;
  2341. int ret = tdm_get_port_idx(kcontrol, &port);
  2342. if (ret) {
  2343. pr_err("%s: unsupported control: %s\n",
  2344. __func__, kcontrol->id.name);
  2345. } else {
  2346. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2347. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2348. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2349. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2350. ucontrol->value.enumerated.item[0]);
  2351. }
  2352. return ret;
  2353. }
  2354. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2355. struct snd_ctl_elem_value *ucontrol)
  2356. {
  2357. struct tdm_port port;
  2358. int ret = tdm_get_port_idx(kcontrol, &port);
  2359. if (ret) {
  2360. pr_err("%s: unsupported control: %s\n",
  2361. __func__, kcontrol->id.name);
  2362. } else {
  2363. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2364. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2365. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2366. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2367. ucontrol->value.enumerated.item[0]);
  2368. }
  2369. return ret;
  2370. }
  2371. static int tdm_get_format(int value)
  2372. {
  2373. int format = 0;
  2374. switch (value) {
  2375. case 0:
  2376. format = SNDRV_PCM_FORMAT_S16_LE;
  2377. break;
  2378. case 1:
  2379. format = SNDRV_PCM_FORMAT_S24_LE;
  2380. break;
  2381. case 2:
  2382. format = SNDRV_PCM_FORMAT_S32_LE;
  2383. break;
  2384. default:
  2385. format = SNDRV_PCM_FORMAT_S16_LE;
  2386. break;
  2387. }
  2388. return format;
  2389. }
  2390. static int tdm_get_format_val(int format)
  2391. {
  2392. int value = 0;
  2393. switch (format) {
  2394. case SNDRV_PCM_FORMAT_S16_LE:
  2395. value = 0;
  2396. break;
  2397. case SNDRV_PCM_FORMAT_S24_LE:
  2398. value = 1;
  2399. break;
  2400. case SNDRV_PCM_FORMAT_S32_LE:
  2401. value = 2;
  2402. break;
  2403. default:
  2404. value = 0;
  2405. break;
  2406. }
  2407. return value;
  2408. }
  2409. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2410. struct snd_ctl_elem_value *ucontrol)
  2411. {
  2412. struct tdm_port port;
  2413. int ret = tdm_get_port_idx(kcontrol, &port);
  2414. if (ret) {
  2415. pr_err("%s: unsupported control: %s\n",
  2416. __func__, kcontrol->id.name);
  2417. } else {
  2418. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2419. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2420. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2421. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2422. ucontrol->value.enumerated.item[0]);
  2423. }
  2424. return ret;
  2425. }
  2426. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2427. struct snd_ctl_elem_value *ucontrol)
  2428. {
  2429. struct tdm_port port;
  2430. int ret = tdm_get_port_idx(kcontrol, &port);
  2431. if (ret) {
  2432. pr_err("%s: unsupported control: %s\n",
  2433. __func__, kcontrol->id.name);
  2434. } else {
  2435. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2436. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2437. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2438. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2439. ucontrol->value.enumerated.item[0]);
  2440. }
  2441. return ret;
  2442. }
  2443. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2444. struct snd_ctl_elem_value *ucontrol)
  2445. {
  2446. struct tdm_port port;
  2447. int ret = tdm_get_port_idx(kcontrol, &port);
  2448. if (ret) {
  2449. pr_err("%s: unsupported control: %s\n",
  2450. __func__, kcontrol->id.name);
  2451. } else {
  2452. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2453. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2454. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2455. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2456. ucontrol->value.enumerated.item[0]);
  2457. }
  2458. return ret;
  2459. }
  2460. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2461. struct snd_ctl_elem_value *ucontrol)
  2462. {
  2463. struct tdm_port port;
  2464. int ret = tdm_get_port_idx(kcontrol, &port);
  2465. if (ret) {
  2466. pr_err("%s: unsupported control: %s\n",
  2467. __func__, kcontrol->id.name);
  2468. } else {
  2469. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2470. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2471. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2472. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2473. ucontrol->value.enumerated.item[0]);
  2474. }
  2475. return ret;
  2476. }
  2477. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2478. struct snd_ctl_elem_value *ucontrol)
  2479. {
  2480. struct tdm_port port;
  2481. int ret = tdm_get_port_idx(kcontrol, &port);
  2482. if (ret) {
  2483. pr_err("%s: unsupported control: %s\n",
  2484. __func__, kcontrol->id.name);
  2485. } else {
  2486. ucontrol->value.enumerated.item[0] =
  2487. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2488. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2489. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2490. ucontrol->value.enumerated.item[0]);
  2491. }
  2492. return ret;
  2493. }
  2494. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2495. struct snd_ctl_elem_value *ucontrol)
  2496. {
  2497. struct tdm_port port;
  2498. int ret = tdm_get_port_idx(kcontrol, &port);
  2499. if (ret) {
  2500. pr_err("%s: unsupported control: %s\n",
  2501. __func__, kcontrol->id.name);
  2502. } else {
  2503. tdm_rx_cfg[port.mode][port.channel].channels =
  2504. ucontrol->value.enumerated.item[0] + 1;
  2505. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2506. tdm_rx_cfg[port.mode][port.channel].channels,
  2507. ucontrol->value.enumerated.item[0] + 1);
  2508. }
  2509. return ret;
  2510. }
  2511. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2512. struct snd_ctl_elem_value *ucontrol)
  2513. {
  2514. struct tdm_port port;
  2515. int ret = tdm_get_port_idx(kcontrol, &port);
  2516. if (ret) {
  2517. pr_err("%s: unsupported control: %s\n",
  2518. __func__, kcontrol->id.name);
  2519. } else {
  2520. ucontrol->value.enumerated.item[0] =
  2521. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2522. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2523. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2524. ucontrol->value.enumerated.item[0]);
  2525. }
  2526. return ret;
  2527. }
  2528. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2529. struct snd_ctl_elem_value *ucontrol)
  2530. {
  2531. struct tdm_port port;
  2532. int ret = tdm_get_port_idx(kcontrol, &port);
  2533. if (ret) {
  2534. pr_err("%s: unsupported control: %s\n",
  2535. __func__, kcontrol->id.name);
  2536. } else {
  2537. tdm_tx_cfg[port.mode][port.channel].channels =
  2538. ucontrol->value.enumerated.item[0] + 1;
  2539. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2540. tdm_tx_cfg[port.mode][port.channel].channels,
  2541. ucontrol->value.enumerated.item[0] + 1);
  2542. }
  2543. return ret;
  2544. }
  2545. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2546. {
  2547. int idx;
  2548. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2549. sizeof("PRIM_AUX_PCM"))) {
  2550. idx = PRIM_AUX_PCM;
  2551. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2552. sizeof("SEC_AUX_PCM"))) {
  2553. idx = SEC_AUX_PCM;
  2554. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2555. sizeof("TERT_AUX_PCM"))) {
  2556. idx = TERT_AUX_PCM;
  2557. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2558. sizeof("QUAT_AUX_PCM"))) {
  2559. idx = QUAT_AUX_PCM;
  2560. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2561. sizeof("QUIN_AUX_PCM"))) {
  2562. idx = QUIN_AUX_PCM;
  2563. } else {
  2564. pr_err("%s: unsupported port: %s\n",
  2565. __func__, kcontrol->id.name);
  2566. idx = -EINVAL;
  2567. }
  2568. return idx;
  2569. }
  2570. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2571. struct snd_ctl_elem_value *ucontrol)
  2572. {
  2573. int idx = aux_pcm_get_port_idx(kcontrol);
  2574. if (idx < 0)
  2575. return idx;
  2576. aux_pcm_rx_cfg[idx].sample_rate =
  2577. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2578. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2579. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2580. ucontrol->value.enumerated.item[0]);
  2581. return 0;
  2582. }
  2583. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2584. struct snd_ctl_elem_value *ucontrol)
  2585. {
  2586. int idx = aux_pcm_get_port_idx(kcontrol);
  2587. if (idx < 0)
  2588. return idx;
  2589. ucontrol->value.enumerated.item[0] =
  2590. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2591. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2592. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2593. ucontrol->value.enumerated.item[0]);
  2594. return 0;
  2595. }
  2596. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2597. struct snd_ctl_elem_value *ucontrol)
  2598. {
  2599. int idx = aux_pcm_get_port_idx(kcontrol);
  2600. if (idx < 0)
  2601. return idx;
  2602. aux_pcm_tx_cfg[idx].sample_rate =
  2603. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2604. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2605. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2606. ucontrol->value.enumerated.item[0]);
  2607. return 0;
  2608. }
  2609. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2610. struct snd_ctl_elem_value *ucontrol)
  2611. {
  2612. int idx = aux_pcm_get_port_idx(kcontrol);
  2613. if (idx < 0)
  2614. return idx;
  2615. ucontrol->value.enumerated.item[0] =
  2616. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2617. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2618. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2619. ucontrol->value.enumerated.item[0]);
  2620. return 0;
  2621. }
  2622. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2623. {
  2624. int idx;
  2625. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2626. sizeof("PRIM_MI2S_RX"))) {
  2627. idx = PRIM_MI2S;
  2628. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2629. sizeof("SEC_MI2S_RX"))) {
  2630. idx = SEC_MI2S;
  2631. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2632. sizeof("TERT_MI2S_RX"))) {
  2633. idx = TERT_MI2S;
  2634. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2635. sizeof("QUAT_MI2S_RX"))) {
  2636. idx = QUAT_MI2S;
  2637. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2638. sizeof("QUIN_MI2S_RX"))) {
  2639. idx = QUIN_MI2S;
  2640. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2641. sizeof("PRIM_MI2S_TX"))) {
  2642. idx = PRIM_MI2S;
  2643. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2644. sizeof("SEC_MI2S_TX"))) {
  2645. idx = SEC_MI2S;
  2646. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2647. sizeof("TERT_MI2S_TX"))) {
  2648. idx = TERT_MI2S;
  2649. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2650. sizeof("QUAT_MI2S_TX"))) {
  2651. idx = QUAT_MI2S;
  2652. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2653. sizeof("QUIN_MI2S_TX"))) {
  2654. idx = QUIN_MI2S;
  2655. } else {
  2656. pr_err("%s: unsupported channel: %s\n",
  2657. __func__, kcontrol->id.name);
  2658. idx = -EINVAL;
  2659. }
  2660. return idx;
  2661. }
  2662. static int mi2s_get_sample_rate_val(int sample_rate)
  2663. {
  2664. int sample_rate_val;
  2665. switch (sample_rate) {
  2666. case SAMPLING_RATE_8KHZ:
  2667. sample_rate_val = 0;
  2668. break;
  2669. case SAMPLING_RATE_11P025KHZ:
  2670. sample_rate_val = 1;
  2671. break;
  2672. case SAMPLING_RATE_16KHZ:
  2673. sample_rate_val = 2;
  2674. break;
  2675. case SAMPLING_RATE_22P05KHZ:
  2676. sample_rate_val = 3;
  2677. break;
  2678. case SAMPLING_RATE_32KHZ:
  2679. sample_rate_val = 4;
  2680. break;
  2681. case SAMPLING_RATE_44P1KHZ:
  2682. sample_rate_val = 5;
  2683. break;
  2684. case SAMPLING_RATE_48KHZ:
  2685. sample_rate_val = 6;
  2686. break;
  2687. case SAMPLING_RATE_96KHZ:
  2688. sample_rate_val = 7;
  2689. break;
  2690. case SAMPLING_RATE_192KHZ:
  2691. sample_rate_val = 8;
  2692. break;
  2693. default:
  2694. sample_rate_val = 6;
  2695. break;
  2696. }
  2697. return sample_rate_val;
  2698. }
  2699. static int mi2s_get_sample_rate(int value)
  2700. {
  2701. int sample_rate;
  2702. switch (value) {
  2703. case 0:
  2704. sample_rate = SAMPLING_RATE_8KHZ;
  2705. break;
  2706. case 1:
  2707. sample_rate = SAMPLING_RATE_11P025KHZ;
  2708. break;
  2709. case 2:
  2710. sample_rate = SAMPLING_RATE_16KHZ;
  2711. break;
  2712. case 3:
  2713. sample_rate = SAMPLING_RATE_22P05KHZ;
  2714. break;
  2715. case 4:
  2716. sample_rate = SAMPLING_RATE_32KHZ;
  2717. break;
  2718. case 5:
  2719. sample_rate = SAMPLING_RATE_44P1KHZ;
  2720. break;
  2721. case 6:
  2722. sample_rate = SAMPLING_RATE_48KHZ;
  2723. break;
  2724. case 7:
  2725. sample_rate = SAMPLING_RATE_96KHZ;
  2726. break;
  2727. case 8:
  2728. sample_rate = SAMPLING_RATE_192KHZ;
  2729. break;
  2730. default:
  2731. sample_rate = SAMPLING_RATE_48KHZ;
  2732. break;
  2733. }
  2734. return sample_rate;
  2735. }
  2736. static int mi2s_auxpcm_get_format(int value)
  2737. {
  2738. int format;
  2739. switch (value) {
  2740. case 0:
  2741. format = SNDRV_PCM_FORMAT_S16_LE;
  2742. break;
  2743. case 1:
  2744. format = SNDRV_PCM_FORMAT_S24_LE;
  2745. break;
  2746. case 2:
  2747. format = SNDRV_PCM_FORMAT_S24_3LE;
  2748. break;
  2749. case 3:
  2750. format = SNDRV_PCM_FORMAT_S32_LE;
  2751. break;
  2752. default:
  2753. format = SNDRV_PCM_FORMAT_S16_LE;
  2754. break;
  2755. }
  2756. return format;
  2757. }
  2758. static int mi2s_auxpcm_get_format_value(int format)
  2759. {
  2760. int value;
  2761. switch (format) {
  2762. case SNDRV_PCM_FORMAT_S16_LE:
  2763. value = 0;
  2764. break;
  2765. case SNDRV_PCM_FORMAT_S24_LE:
  2766. value = 1;
  2767. break;
  2768. case SNDRV_PCM_FORMAT_S24_3LE:
  2769. value = 2;
  2770. break;
  2771. case SNDRV_PCM_FORMAT_S32_LE:
  2772. value = 3;
  2773. break;
  2774. default:
  2775. value = 0;
  2776. break;
  2777. }
  2778. return value;
  2779. }
  2780. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2781. struct snd_ctl_elem_value *ucontrol)
  2782. {
  2783. int idx = mi2s_get_port_idx(kcontrol);
  2784. if (idx < 0)
  2785. return idx;
  2786. mi2s_rx_cfg[idx].sample_rate =
  2787. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2788. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2789. idx, mi2s_rx_cfg[idx].sample_rate,
  2790. ucontrol->value.enumerated.item[0]);
  2791. return 0;
  2792. }
  2793. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2794. struct snd_ctl_elem_value *ucontrol)
  2795. {
  2796. int idx = mi2s_get_port_idx(kcontrol);
  2797. if (idx < 0)
  2798. return idx;
  2799. ucontrol->value.enumerated.item[0] =
  2800. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2801. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2802. idx, mi2s_rx_cfg[idx].sample_rate,
  2803. ucontrol->value.enumerated.item[0]);
  2804. return 0;
  2805. }
  2806. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2807. struct snd_ctl_elem_value *ucontrol)
  2808. {
  2809. int idx = mi2s_get_port_idx(kcontrol);
  2810. if (idx < 0)
  2811. return idx;
  2812. mi2s_tx_cfg[idx].sample_rate =
  2813. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2814. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2815. idx, mi2s_tx_cfg[idx].sample_rate,
  2816. ucontrol->value.enumerated.item[0]);
  2817. return 0;
  2818. }
  2819. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2820. struct snd_ctl_elem_value *ucontrol)
  2821. {
  2822. int idx = mi2s_get_port_idx(kcontrol);
  2823. if (idx < 0)
  2824. return idx;
  2825. ucontrol->value.enumerated.item[0] =
  2826. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2827. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2828. idx, mi2s_tx_cfg[idx].sample_rate,
  2829. ucontrol->value.enumerated.item[0]);
  2830. return 0;
  2831. }
  2832. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2833. struct snd_ctl_elem_value *ucontrol)
  2834. {
  2835. int idx = mi2s_get_port_idx(kcontrol);
  2836. if (idx < 0)
  2837. return idx;
  2838. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2839. idx, mi2s_rx_cfg[idx].channels);
  2840. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2841. return 0;
  2842. }
  2843. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2844. struct snd_ctl_elem_value *ucontrol)
  2845. {
  2846. int idx = mi2s_get_port_idx(kcontrol);
  2847. if (idx < 0)
  2848. return idx;
  2849. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2850. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2851. idx, mi2s_rx_cfg[idx].channels);
  2852. return 1;
  2853. }
  2854. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2855. struct snd_ctl_elem_value *ucontrol)
  2856. {
  2857. int idx = mi2s_get_port_idx(kcontrol);
  2858. if (idx < 0)
  2859. return idx;
  2860. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2861. idx, mi2s_tx_cfg[idx].channels);
  2862. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2863. return 0;
  2864. }
  2865. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2866. struct snd_ctl_elem_value *ucontrol)
  2867. {
  2868. int idx = mi2s_get_port_idx(kcontrol);
  2869. if (idx < 0)
  2870. return idx;
  2871. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2872. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2873. idx, mi2s_tx_cfg[idx].channels);
  2874. return 1;
  2875. }
  2876. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2877. struct snd_ctl_elem_value *ucontrol)
  2878. {
  2879. int idx = mi2s_get_port_idx(kcontrol);
  2880. if (idx < 0)
  2881. return idx;
  2882. ucontrol->value.enumerated.item[0] =
  2883. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2884. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2885. idx, mi2s_rx_cfg[idx].bit_format,
  2886. ucontrol->value.enumerated.item[0]);
  2887. return 0;
  2888. }
  2889. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2890. struct snd_ctl_elem_value *ucontrol)
  2891. {
  2892. int idx = mi2s_get_port_idx(kcontrol);
  2893. if (idx < 0)
  2894. return idx;
  2895. mi2s_rx_cfg[idx].bit_format =
  2896. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2897. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2898. idx, mi2s_rx_cfg[idx].bit_format,
  2899. ucontrol->value.enumerated.item[0]);
  2900. return 0;
  2901. }
  2902. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2903. struct snd_ctl_elem_value *ucontrol)
  2904. {
  2905. int idx = mi2s_get_port_idx(kcontrol);
  2906. if (idx < 0)
  2907. return idx;
  2908. ucontrol->value.enumerated.item[0] =
  2909. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2910. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2911. idx, mi2s_tx_cfg[idx].bit_format,
  2912. ucontrol->value.enumerated.item[0]);
  2913. return 0;
  2914. }
  2915. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2916. struct snd_ctl_elem_value *ucontrol)
  2917. {
  2918. int idx = mi2s_get_port_idx(kcontrol);
  2919. if (idx < 0)
  2920. return idx;
  2921. mi2s_tx_cfg[idx].bit_format =
  2922. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2923. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2924. idx, mi2s_tx_cfg[idx].bit_format,
  2925. ucontrol->value.enumerated.item[0]);
  2926. return 0;
  2927. }
  2928. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2929. struct snd_ctl_elem_value *ucontrol)
  2930. {
  2931. int idx = aux_pcm_get_port_idx(kcontrol);
  2932. if (idx < 0)
  2933. return idx;
  2934. ucontrol->value.enumerated.item[0] =
  2935. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2936. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2937. idx, aux_pcm_rx_cfg[idx].bit_format,
  2938. ucontrol->value.enumerated.item[0]);
  2939. return 0;
  2940. }
  2941. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2942. struct snd_ctl_elem_value *ucontrol)
  2943. {
  2944. int idx = aux_pcm_get_port_idx(kcontrol);
  2945. if (idx < 0)
  2946. return idx;
  2947. aux_pcm_rx_cfg[idx].bit_format =
  2948. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2949. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2950. idx, aux_pcm_rx_cfg[idx].bit_format,
  2951. ucontrol->value.enumerated.item[0]);
  2952. return 0;
  2953. }
  2954. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2955. struct snd_ctl_elem_value *ucontrol)
  2956. {
  2957. int idx = aux_pcm_get_port_idx(kcontrol);
  2958. if (idx < 0)
  2959. return idx;
  2960. ucontrol->value.enumerated.item[0] =
  2961. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2962. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2963. idx, aux_pcm_tx_cfg[idx].bit_format,
  2964. ucontrol->value.enumerated.item[0]);
  2965. return 0;
  2966. }
  2967. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2968. struct snd_ctl_elem_value *ucontrol)
  2969. {
  2970. int idx = aux_pcm_get_port_idx(kcontrol);
  2971. if (idx < 0)
  2972. return idx;
  2973. aux_pcm_tx_cfg[idx].bit_format =
  2974. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2975. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2976. idx, aux_pcm_tx_cfg[idx].bit_format,
  2977. ucontrol->value.enumerated.item[0]);
  2978. return 0;
  2979. }
  2980. static int msm_hifi_ctrl(struct snd_soc_component *component)
  2981. {
  2982. struct snd_soc_dapm_context *dapm =
  2983. snd_soc_component_get_dapm(component);
  2984. struct snd_soc_card *card = component->card;
  2985. struct msm_asoc_mach_data *pdata =
  2986. snd_soc_card_get_drvdata(card);
  2987. dev_dbg(component->dev, "%s: msm_hifi_control = %d\n", __func__,
  2988. msm_hifi_control);
  2989. if (!pdata || !pdata->hph_en1_gpio_p) {
  2990. dev_err(component->dev, "%s: hph_en1_gpio is invalid\n",
  2991. __func__);
  2992. return -EINVAL;
  2993. }
  2994. if (msm_hifi_control == MSM_HIFI_ON) {
  2995. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2996. /* 5msec delay needed as per HW requirement */
  2997. usleep_range(5000, 5010);
  2998. } else {
  2999. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  3000. }
  3001. snd_soc_dapm_sync(dapm);
  3002. return 0;
  3003. }
  3004. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  3005. struct snd_ctl_elem_value *ucontrol)
  3006. {
  3007. pr_debug("%s: msm_hifi_control = %d\n",
  3008. __func__, msm_hifi_control);
  3009. ucontrol->value.integer.value[0] = msm_hifi_control;
  3010. return 0;
  3011. }
  3012. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  3013. struct snd_ctl_elem_value *ucontrol)
  3014. {
  3015. struct snd_soc_component *component =
  3016. snd_soc_kcontrol_component(kcontrol);
  3017. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  3018. __func__, ucontrol->value.integer.value[0]);
  3019. msm_hifi_control = ucontrol->value.integer.value[0];
  3020. msm_hifi_ctrl(component);
  3021. return 0;
  3022. }
  3023. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  3024. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  3025. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3026. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  3027. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3028. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  3029. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3030. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  3031. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3032. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  3033. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3034. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  3035. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3036. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  3037. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3038. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  3039. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3040. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  3041. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3042. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  3043. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3044. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  3045. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3046. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  3047. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3048. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  3049. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3050. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  3051. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3052. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  3053. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3054. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  3055. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3056. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  3057. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3058. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  3059. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3060. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  3061. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3062. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  3063. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3064. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  3065. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3066. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  3067. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3068. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  3069. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3070. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  3071. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3072. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  3073. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3074. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  3075. wsa_cdc_dma_rx_0_sample_rate,
  3076. cdc_dma_rx_sample_rate_get,
  3077. cdc_dma_rx_sample_rate_put),
  3078. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  3079. wsa_cdc_dma_rx_1_sample_rate,
  3080. cdc_dma_rx_sample_rate_get,
  3081. cdc_dma_rx_sample_rate_put),
  3082. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  3083. rx_cdc_dma_rx_0_sample_rate,
  3084. cdc_dma_rx_sample_rate_get,
  3085. cdc_dma_rx_sample_rate_put),
  3086. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  3087. rx_cdc_dma_rx_1_sample_rate,
  3088. cdc_dma_rx_sample_rate_get,
  3089. cdc_dma_rx_sample_rate_put),
  3090. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  3091. rx_cdc_dma_rx_2_sample_rate,
  3092. cdc_dma_rx_sample_rate_get,
  3093. cdc_dma_rx_sample_rate_put),
  3094. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  3095. rx_cdc_dma_rx_3_sample_rate,
  3096. cdc_dma_rx_sample_rate_get,
  3097. cdc_dma_rx_sample_rate_put),
  3098. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  3099. rx_cdc_dma_rx_5_sample_rate,
  3100. cdc_dma_rx_sample_rate_get,
  3101. cdc_dma_rx_sample_rate_put),
  3102. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  3103. wsa_cdc_dma_tx_0_sample_rate,
  3104. cdc_dma_tx_sample_rate_get,
  3105. cdc_dma_tx_sample_rate_put),
  3106. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  3107. wsa_cdc_dma_tx_1_sample_rate,
  3108. cdc_dma_tx_sample_rate_get,
  3109. cdc_dma_tx_sample_rate_put),
  3110. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  3111. wsa_cdc_dma_tx_2_sample_rate,
  3112. cdc_dma_tx_sample_rate_get,
  3113. cdc_dma_tx_sample_rate_put),
  3114. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  3115. tx_cdc_dma_tx_0_sample_rate,
  3116. cdc_dma_tx_sample_rate_get,
  3117. cdc_dma_tx_sample_rate_put),
  3118. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  3119. tx_cdc_dma_tx_3_sample_rate,
  3120. cdc_dma_tx_sample_rate_get,
  3121. cdc_dma_tx_sample_rate_put),
  3122. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3123. tx_cdc_dma_tx_4_sample_rate,
  3124. cdc_dma_tx_sample_rate_get,
  3125. cdc_dma_tx_sample_rate_put),
  3126. };
  3127. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  3128. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3129. slim_rx_ch_get, slim_rx_ch_put),
  3130. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3131. slim_rx_ch_get, slim_rx_ch_put),
  3132. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3133. slim_tx_ch_get, slim_tx_ch_put),
  3134. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3135. slim_tx_ch_get, slim_tx_ch_put),
  3136. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3137. slim_rx_ch_get, slim_rx_ch_put),
  3138. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3139. slim_rx_ch_get, slim_rx_ch_put),
  3140. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3141. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3142. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3143. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3144. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3145. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3146. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3147. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3148. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3149. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3150. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3151. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3152. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3153. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3154. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3155. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3156. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3157. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3158. };
  3159. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3160. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3161. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3162. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3163. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3164. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3165. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3166. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3167. proxy_rx_ch_get, proxy_rx_ch_put),
  3168. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3169. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3170. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3171. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3172. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3173. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3174. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3175. usb_audio_rx_sample_rate_get,
  3176. usb_audio_rx_sample_rate_put),
  3177. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3178. usb_audio_tx_sample_rate_get,
  3179. usb_audio_tx_sample_rate_put),
  3180. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3181. ext_disp_rx_sample_rate_get,
  3182. ext_disp_rx_sample_rate_put),
  3183. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3184. tdm_rx_sample_rate_get,
  3185. tdm_rx_sample_rate_put),
  3186. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3187. tdm_tx_sample_rate_get,
  3188. tdm_tx_sample_rate_put),
  3189. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3190. tdm_rx_format_get,
  3191. tdm_rx_format_put),
  3192. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3193. tdm_tx_format_get,
  3194. tdm_tx_format_put),
  3195. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3196. tdm_rx_ch_get,
  3197. tdm_rx_ch_put),
  3198. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3199. tdm_tx_ch_get,
  3200. tdm_tx_ch_put),
  3201. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3202. tdm_rx_sample_rate_get,
  3203. tdm_rx_sample_rate_put),
  3204. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3205. tdm_tx_sample_rate_get,
  3206. tdm_tx_sample_rate_put),
  3207. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3208. tdm_rx_format_get,
  3209. tdm_rx_format_put),
  3210. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3211. tdm_tx_format_get,
  3212. tdm_tx_format_put),
  3213. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3214. tdm_rx_ch_get,
  3215. tdm_rx_ch_put),
  3216. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3217. tdm_tx_ch_get,
  3218. tdm_tx_ch_put),
  3219. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3220. tdm_rx_sample_rate_get,
  3221. tdm_rx_sample_rate_put),
  3222. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3223. tdm_tx_sample_rate_get,
  3224. tdm_tx_sample_rate_put),
  3225. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3226. tdm_rx_format_get,
  3227. tdm_rx_format_put),
  3228. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3229. tdm_tx_format_get,
  3230. tdm_tx_format_put),
  3231. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3232. tdm_rx_ch_get,
  3233. tdm_rx_ch_put),
  3234. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3235. tdm_tx_ch_get,
  3236. tdm_tx_ch_put),
  3237. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3238. tdm_rx_sample_rate_get,
  3239. tdm_rx_sample_rate_put),
  3240. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3241. tdm_tx_sample_rate_get,
  3242. tdm_tx_sample_rate_put),
  3243. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3244. tdm_rx_format_get,
  3245. tdm_rx_format_put),
  3246. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3247. tdm_tx_format_get,
  3248. tdm_tx_format_put),
  3249. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3250. tdm_rx_ch_get,
  3251. tdm_rx_ch_put),
  3252. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3253. tdm_tx_ch_get,
  3254. tdm_tx_ch_put),
  3255. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3256. tdm_rx_sample_rate_get,
  3257. tdm_rx_sample_rate_put),
  3258. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3259. tdm_tx_sample_rate_get,
  3260. tdm_tx_sample_rate_put),
  3261. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3262. tdm_rx_format_get,
  3263. tdm_rx_format_put),
  3264. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3265. tdm_tx_format_get,
  3266. tdm_tx_format_put),
  3267. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3268. tdm_rx_ch_get,
  3269. tdm_rx_ch_put),
  3270. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3271. tdm_tx_ch_get,
  3272. tdm_tx_ch_put),
  3273. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3274. aux_pcm_rx_sample_rate_get,
  3275. aux_pcm_rx_sample_rate_put),
  3276. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3277. aux_pcm_rx_sample_rate_get,
  3278. aux_pcm_rx_sample_rate_put),
  3279. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3280. aux_pcm_rx_sample_rate_get,
  3281. aux_pcm_rx_sample_rate_put),
  3282. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3283. aux_pcm_rx_sample_rate_get,
  3284. aux_pcm_rx_sample_rate_put),
  3285. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3286. aux_pcm_rx_sample_rate_get,
  3287. aux_pcm_rx_sample_rate_put),
  3288. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3289. aux_pcm_tx_sample_rate_get,
  3290. aux_pcm_tx_sample_rate_put),
  3291. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3292. aux_pcm_tx_sample_rate_get,
  3293. aux_pcm_tx_sample_rate_put),
  3294. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3295. aux_pcm_tx_sample_rate_get,
  3296. aux_pcm_tx_sample_rate_put),
  3297. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3298. aux_pcm_tx_sample_rate_get,
  3299. aux_pcm_tx_sample_rate_put),
  3300. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3301. aux_pcm_tx_sample_rate_get,
  3302. aux_pcm_tx_sample_rate_put),
  3303. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3304. mi2s_rx_sample_rate_get,
  3305. mi2s_rx_sample_rate_put),
  3306. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3307. mi2s_rx_sample_rate_get,
  3308. mi2s_rx_sample_rate_put),
  3309. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3310. mi2s_rx_sample_rate_get,
  3311. mi2s_rx_sample_rate_put),
  3312. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3313. mi2s_rx_sample_rate_get,
  3314. mi2s_rx_sample_rate_put),
  3315. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3316. mi2s_rx_sample_rate_get,
  3317. mi2s_rx_sample_rate_put),
  3318. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3319. mi2s_tx_sample_rate_get,
  3320. mi2s_tx_sample_rate_put),
  3321. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3322. mi2s_tx_sample_rate_get,
  3323. mi2s_tx_sample_rate_put),
  3324. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3325. mi2s_tx_sample_rate_get,
  3326. mi2s_tx_sample_rate_put),
  3327. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3328. mi2s_tx_sample_rate_get,
  3329. mi2s_tx_sample_rate_put),
  3330. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3331. mi2s_tx_sample_rate_get,
  3332. mi2s_tx_sample_rate_put),
  3333. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3334. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3335. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3336. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3337. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3338. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3339. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3340. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3341. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3342. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3343. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3344. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3345. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3346. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3347. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3348. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3349. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3350. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3351. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3352. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3353. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3354. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3355. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3356. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3357. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3358. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3359. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3360. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3361. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3362. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3363. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3364. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3365. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3366. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3367. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3368. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3369. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3370. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3371. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3372. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3373. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3374. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3375. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3376. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3377. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3378. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3379. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3380. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3381. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3382. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3383. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3384. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3385. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3386. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3387. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3388. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3389. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3390. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3391. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3392. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3393. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3394. msm_hifi_put),
  3395. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3396. msm_bt_sample_rate_get,
  3397. msm_bt_sample_rate_put),
  3398. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  3399. msm_bt_sample_rate_rx_get,
  3400. msm_bt_sample_rate_rx_put),
  3401. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  3402. msm_bt_sample_rate_tx_get,
  3403. msm_bt_sample_rate_tx_put),
  3404. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3405. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3406. };
  3407. static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
  3408. int enable, bool dapm)
  3409. {
  3410. int ret = 0;
  3411. if (!strcmp(component->name, "tavil_codec")) {
  3412. ret = tavil_cdc_mclk_enable(component, enable);
  3413. } else {
  3414. dev_err(component->dev, "%s: unknown codec to enable ext clk\n",
  3415. __func__);
  3416. ret = -EINVAL;
  3417. }
  3418. return ret;
  3419. }
  3420. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component,
  3421. int enable, bool dapm)
  3422. {
  3423. int ret = 0;
  3424. if (!strcmp(component->name, "tavil_codec")) {
  3425. ret = tavil_cdc_mclk_tx_enable(component, enable);
  3426. } else {
  3427. dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n",
  3428. __func__);
  3429. ret = -EINVAL;
  3430. }
  3431. return ret;
  3432. }
  3433. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3434. struct snd_kcontrol *kcontrol, int event)
  3435. {
  3436. struct snd_soc_component *component =
  3437. snd_soc_dapm_to_component(w->dapm);
  3438. pr_debug("%s: event = %d\n", __func__, event);
  3439. switch (event) {
  3440. case SND_SOC_DAPM_PRE_PMU:
  3441. return msm_snd_enable_codec_ext_tx_clk(component, 1, true);
  3442. case SND_SOC_DAPM_POST_PMD:
  3443. return msm_snd_enable_codec_ext_tx_clk(component, 0, true);
  3444. }
  3445. return 0;
  3446. }
  3447. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3448. struct snd_kcontrol *kcontrol, int event)
  3449. {
  3450. struct snd_soc_component *component =
  3451. snd_soc_dapm_to_component(w->dapm);
  3452. pr_debug("%s: event = %d\n", __func__, event);
  3453. switch (event) {
  3454. case SND_SOC_DAPM_PRE_PMU:
  3455. return msm_snd_enable_codec_ext_clk(component, 1, true);
  3456. case SND_SOC_DAPM_POST_PMD:
  3457. return msm_snd_enable_codec_ext_clk(component, 0, true);
  3458. }
  3459. return 0;
  3460. }
  3461. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3462. struct snd_kcontrol *k, int event)
  3463. {
  3464. struct snd_soc_component *component =
  3465. snd_soc_dapm_to_component(w->dapm);
  3466. struct snd_soc_card *card = component->card;
  3467. struct msm_asoc_mach_data *pdata =
  3468. snd_soc_card_get_drvdata(card);
  3469. dev_dbg(component->dev, "%s: msm_hifi_control = %d\n",
  3470. __func__, msm_hifi_control);
  3471. if (!pdata || !pdata->hph_en0_gpio_p) {
  3472. dev_err(component->dev, "%s: hph_en0_gpio is invalid\n",
  3473. __func__);
  3474. return -EINVAL;
  3475. }
  3476. if (msm_hifi_control != MSM_HIFI_ON) {
  3477. dev_dbg(component->dev, "%s: HiFi mixer control is not set\n",
  3478. __func__);
  3479. return 0;
  3480. }
  3481. switch (event) {
  3482. case SND_SOC_DAPM_POST_PMU:
  3483. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3484. break;
  3485. case SND_SOC_DAPM_PRE_PMD:
  3486. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3487. break;
  3488. }
  3489. return 0;
  3490. }
  3491. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3492. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3493. msm_mclk_event,
  3494. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3495. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3496. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3497. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3498. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3499. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3500. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3501. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3502. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3503. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3504. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3505. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3506. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3507. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3508. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3509. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3510. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3511. };
  3512. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3513. struct snd_kcontrol *kcontrol, int event)
  3514. {
  3515. struct msm_asoc_mach_data *pdata = NULL;
  3516. struct snd_soc_component *component =
  3517. snd_soc_dapm_to_component(w->dapm);
  3518. int ret = 0;
  3519. u32 dmic_idx;
  3520. int *dmic_gpio_cnt;
  3521. struct device_node *dmic_gpio;
  3522. char *wname;
  3523. wname = strpbrk(w->name, "0123");
  3524. if (!wname) {
  3525. dev_err(component->dev, "%s: widget not found\n", __func__);
  3526. return -EINVAL;
  3527. }
  3528. ret = kstrtouint(wname, 10, &dmic_idx);
  3529. if (ret < 0) {
  3530. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3531. __func__);
  3532. return -EINVAL;
  3533. }
  3534. pdata = snd_soc_card_get_drvdata(component->card);
  3535. switch (dmic_idx) {
  3536. case 0:
  3537. case 1:
  3538. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3539. dmic_gpio = pdata->dmic01_gpio_p;
  3540. break;
  3541. case 2:
  3542. case 3:
  3543. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3544. dmic_gpio = pdata->dmic23_gpio_p;
  3545. break;
  3546. default:
  3547. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3548. __func__);
  3549. return -EINVAL;
  3550. }
  3551. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3552. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3553. switch (event) {
  3554. case SND_SOC_DAPM_PRE_PMU:
  3555. (*dmic_gpio_cnt)++;
  3556. if (*dmic_gpio_cnt == 1) {
  3557. ret = msm_cdc_pinctrl_select_active_state(
  3558. dmic_gpio);
  3559. if (ret < 0) {
  3560. pr_err("%s: gpio set cannot be activated %sd",
  3561. __func__, "dmic_gpio");
  3562. return ret;
  3563. }
  3564. }
  3565. break;
  3566. case SND_SOC_DAPM_POST_PMD:
  3567. (*dmic_gpio_cnt)--;
  3568. if (*dmic_gpio_cnt == 0) {
  3569. ret = msm_cdc_pinctrl_select_sleep_state(
  3570. dmic_gpio);
  3571. if (ret < 0) {
  3572. pr_err("%s: gpio set cannot be de-activated %sd",
  3573. __func__, "dmic_gpio");
  3574. return ret;
  3575. }
  3576. }
  3577. break;
  3578. default:
  3579. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3580. return -EINVAL;
  3581. }
  3582. return 0;
  3583. }
  3584. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3585. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3586. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3587. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3588. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3589. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3590. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3591. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3592. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3593. };
  3594. static inline int param_is_mask(int p)
  3595. {
  3596. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3597. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3598. }
  3599. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3600. int n)
  3601. {
  3602. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3603. }
  3604. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3605. unsigned int bit)
  3606. {
  3607. if (bit >= SNDRV_MASK_MAX)
  3608. return;
  3609. if (param_is_mask(n)) {
  3610. struct snd_mask *m = param_to_mask(p, n);
  3611. m->bits[0] = 0;
  3612. m->bits[1] = 0;
  3613. m->bits[bit >> 5] |= (1 << (bit & 31));
  3614. }
  3615. }
  3616. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3617. {
  3618. int ch_id = 0;
  3619. switch (be_id) {
  3620. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3621. ch_id = SLIM_RX_0;
  3622. break;
  3623. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3624. ch_id = SLIM_RX_1;
  3625. break;
  3626. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3627. ch_id = SLIM_RX_2;
  3628. break;
  3629. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3630. ch_id = SLIM_RX_3;
  3631. break;
  3632. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3633. ch_id = SLIM_RX_4;
  3634. break;
  3635. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3636. ch_id = SLIM_RX_6;
  3637. break;
  3638. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3639. ch_id = SLIM_TX_0;
  3640. break;
  3641. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3642. ch_id = SLIM_TX_3;
  3643. break;
  3644. default:
  3645. ch_id = SLIM_RX_0;
  3646. break;
  3647. }
  3648. return ch_id;
  3649. }
  3650. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3651. {
  3652. int idx = 0;
  3653. switch (be_id) {
  3654. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3655. idx = WSA_CDC_DMA_RX_0;
  3656. break;
  3657. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3658. idx = WSA_CDC_DMA_TX_0;
  3659. break;
  3660. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3661. idx = WSA_CDC_DMA_RX_1;
  3662. break;
  3663. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3664. idx = WSA_CDC_DMA_TX_1;
  3665. break;
  3666. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3667. idx = WSA_CDC_DMA_TX_2;
  3668. break;
  3669. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3670. idx = RX_CDC_DMA_RX_0;
  3671. break;
  3672. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3673. idx = RX_CDC_DMA_RX_1;
  3674. break;
  3675. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3676. idx = RX_CDC_DMA_RX_2;
  3677. break;
  3678. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3679. idx = RX_CDC_DMA_RX_3;
  3680. break;
  3681. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3682. idx = RX_CDC_DMA_RX_5;
  3683. break;
  3684. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3685. idx = TX_CDC_DMA_TX_0;
  3686. break;
  3687. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3688. idx = TX_CDC_DMA_TX_3;
  3689. break;
  3690. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3691. idx = TX_CDC_DMA_TX_4;
  3692. break;
  3693. default:
  3694. idx = RX_CDC_DMA_RX_0;
  3695. break;
  3696. }
  3697. return idx;
  3698. }
  3699. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3700. {
  3701. int idx = -EINVAL;
  3702. switch (be_id) {
  3703. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3704. idx = DP_RX_IDX;
  3705. break;
  3706. default:
  3707. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3708. idx = -EINVAL;
  3709. break;
  3710. }
  3711. return idx;
  3712. }
  3713. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3714. struct snd_pcm_hw_params *params)
  3715. {
  3716. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3717. struct snd_interval *rate = hw_param_interval(params,
  3718. SNDRV_PCM_HW_PARAM_RATE);
  3719. struct snd_interval *channels = hw_param_interval(params,
  3720. SNDRV_PCM_HW_PARAM_CHANNELS);
  3721. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3722. int rc = 0;
  3723. int idx;
  3724. void *config = NULL;
  3725. struct snd_soc_component *component = NULL;
  3726. pr_debug("%s: format = %d, rate = %d\n",
  3727. __func__, params_format(params), params_rate(params));
  3728. switch (dai_link->id) {
  3729. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3730. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3731. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3732. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3733. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3734. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3735. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3736. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3737. slim_rx_cfg[idx].bit_format);
  3738. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3739. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3740. break;
  3741. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3742. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3743. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3744. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3745. slim_tx_cfg[idx].bit_format);
  3746. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3747. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3748. break;
  3749. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3750. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3751. slim_tx_cfg[1].bit_format);
  3752. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3753. channels->min = channels->max = slim_tx_cfg[1].channels;
  3754. break;
  3755. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3756. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3757. SNDRV_PCM_FORMAT_S32_LE);
  3758. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3759. channels->min = channels->max = msm_vi_feed_tx_ch;
  3760. break;
  3761. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3762. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3763. slim_rx_cfg[5].bit_format);
  3764. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3765. channels->min = channels->max = slim_rx_cfg[5].channels;
  3766. break;
  3767. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3768. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  3769. if (!component) {
  3770. pr_err("%s: component is NULL\n", __func__);
  3771. rc = -EINVAL;
  3772. goto done;
  3773. }
  3774. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3775. channels->min = channels->max = 1;
  3776. config = msm_codec_fn.get_afe_config_fn(component,
  3777. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3778. if (config) {
  3779. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3780. config, SLIMBUS_5_TX);
  3781. if (rc)
  3782. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3783. __func__, rc);
  3784. }
  3785. break;
  3786. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3787. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3788. slim_rx_cfg[SLIM_RX_7].bit_format);
  3789. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3790. channels->min = channels->max =
  3791. slim_rx_cfg[SLIM_RX_7].channels;
  3792. break;
  3793. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3794. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3795. channels->min = channels->max =
  3796. slim_tx_cfg[SLIM_TX_7].channels;
  3797. break;
  3798. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3799. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3800. channels->min = channels->max =
  3801. slim_tx_cfg[SLIM_TX_8].channels;
  3802. break;
  3803. case MSM_BACKEND_DAI_USB_RX:
  3804. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3805. usb_rx_cfg.bit_format);
  3806. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3807. channels->min = channels->max = usb_rx_cfg.channels;
  3808. break;
  3809. case MSM_BACKEND_DAI_USB_TX:
  3810. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3811. usb_tx_cfg.bit_format);
  3812. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3813. channels->min = channels->max = usb_tx_cfg.channels;
  3814. break;
  3815. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3816. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3817. if (idx < 0) {
  3818. pr_err("%s: Incorrect ext disp idx %d\n",
  3819. __func__, idx);
  3820. rc = idx;
  3821. goto done;
  3822. }
  3823. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3824. ext_disp_rx_cfg[idx].bit_format);
  3825. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3826. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3827. break;
  3828. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3829. channels->min = channels->max = proxy_rx_cfg.channels;
  3830. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3831. break;
  3832. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3833. channels->min = channels->max =
  3834. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3835. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3836. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3837. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3838. break;
  3839. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3840. channels->min = channels->max =
  3841. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3842. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3843. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3844. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3845. break;
  3846. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3847. channels->min = channels->max =
  3848. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3849. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3850. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3851. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3852. break;
  3853. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3854. channels->min = channels->max =
  3855. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3856. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3857. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3858. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3859. break;
  3860. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3861. channels->min = channels->max =
  3862. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3863. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3864. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3865. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3866. break;
  3867. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3868. channels->min = channels->max =
  3869. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3870. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3871. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3872. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3873. break;
  3874. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3875. channels->min = channels->max =
  3876. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3877. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3878. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3879. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3880. break;
  3881. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3882. channels->min = channels->max =
  3883. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3884. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3885. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3886. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3887. break;
  3888. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3889. channels->min = channels->max =
  3890. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3891. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3892. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3893. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3894. break;
  3895. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3896. channels->min = channels->max =
  3897. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3898. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3899. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3900. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3901. break;
  3902. case MSM_BACKEND_DAI_AUXPCM_RX:
  3903. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3904. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3905. rate->min = rate->max =
  3906. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3907. channels->min = channels->max =
  3908. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3909. break;
  3910. case MSM_BACKEND_DAI_AUXPCM_TX:
  3911. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3912. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3913. rate->min = rate->max =
  3914. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3915. channels->min = channels->max =
  3916. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3917. break;
  3918. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3919. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3920. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3921. rate->min = rate->max =
  3922. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3923. channels->min = channels->max =
  3924. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3925. break;
  3926. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3927. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3928. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3929. rate->min = rate->max =
  3930. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3931. channels->min = channels->max =
  3932. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3933. break;
  3934. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3935. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3936. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3937. rate->min = rate->max =
  3938. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3939. channels->min = channels->max =
  3940. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3941. break;
  3942. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3943. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3944. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3945. rate->min = rate->max =
  3946. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3947. channels->min = channels->max =
  3948. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3949. break;
  3950. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3951. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3952. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3953. rate->min = rate->max =
  3954. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3955. channels->min = channels->max =
  3956. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3957. break;
  3958. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3959. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3960. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3961. rate->min = rate->max =
  3962. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3963. channels->min = channels->max =
  3964. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3965. break;
  3966. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3967. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3968. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3969. rate->min = rate->max =
  3970. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3971. channels->min = channels->max =
  3972. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3973. break;
  3974. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3975. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3976. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3977. rate->min = rate->max =
  3978. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3979. channels->min = channels->max =
  3980. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3981. break;
  3982. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3983. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3984. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3985. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3986. channels->min = channels->max =
  3987. mi2s_rx_cfg[PRIM_MI2S].channels;
  3988. break;
  3989. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3990. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3991. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3992. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3993. channels->min = channels->max =
  3994. mi2s_tx_cfg[PRIM_MI2S].channels;
  3995. break;
  3996. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3997. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3998. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3999. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  4000. channels->min = channels->max =
  4001. mi2s_rx_cfg[SEC_MI2S].channels;
  4002. break;
  4003. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4004. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4005. mi2s_tx_cfg[SEC_MI2S].bit_format);
  4006. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  4007. channels->min = channels->max =
  4008. mi2s_tx_cfg[SEC_MI2S].channels;
  4009. break;
  4010. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4011. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4012. mi2s_rx_cfg[TERT_MI2S].bit_format);
  4013. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  4014. channels->min = channels->max =
  4015. mi2s_rx_cfg[TERT_MI2S].channels;
  4016. break;
  4017. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4018. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4019. mi2s_tx_cfg[TERT_MI2S].bit_format);
  4020. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  4021. channels->min = channels->max =
  4022. mi2s_tx_cfg[TERT_MI2S].channels;
  4023. break;
  4024. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4025. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4026. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  4027. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  4028. channels->min = channels->max =
  4029. mi2s_rx_cfg[QUAT_MI2S].channels;
  4030. break;
  4031. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4032. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4033. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  4034. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  4035. channels->min = channels->max =
  4036. mi2s_tx_cfg[QUAT_MI2S].channels;
  4037. break;
  4038. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4039. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4040. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  4041. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  4042. channels->min = channels->max =
  4043. mi2s_rx_cfg[QUIN_MI2S].channels;
  4044. break;
  4045. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4046. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4047. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  4048. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  4049. channels->min = channels->max =
  4050. mi2s_tx_cfg[QUIN_MI2S].channels;
  4051. break;
  4052. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4053. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4054. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4055. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4056. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4057. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4058. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4059. cdc_dma_rx_cfg[idx].bit_format);
  4060. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  4061. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  4062. break;
  4063. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4064. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4065. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4066. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4067. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4068. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4069. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4070. cdc_dma_tx_cfg[idx].bit_format);
  4071. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  4072. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  4073. break;
  4074. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4075. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4076. SNDRV_PCM_FORMAT_S32_LE);
  4077. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  4078. channels->min = channels->max = msm_vi_feed_tx_ch;
  4079. break;
  4080. default:
  4081. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  4082. break;
  4083. }
  4084. done:
  4085. return rc;
  4086. }
  4087. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
  4088. bool active)
  4089. {
  4090. struct snd_soc_card *card = component->card;
  4091. struct msm_asoc_mach_data *pdata =
  4092. snd_soc_card_get_drvdata(card);
  4093. if (!pdata->fsa_handle)
  4094. return false;
  4095. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  4096. }
  4097. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  4098. {
  4099. int value = 0;
  4100. bool ret = false;
  4101. struct snd_soc_card *card;
  4102. struct msm_asoc_mach_data *pdata;
  4103. if (!component) {
  4104. pr_err("%s component is NULL\n", __func__);
  4105. return false;
  4106. }
  4107. card = component->card;
  4108. pdata = snd_soc_card_get_drvdata(card);
  4109. if (!pdata)
  4110. return false;
  4111. if (wcd_mbhc_cfg.enable_usbc_analog)
  4112. return msm_usbc_swap_gnd_mic(component, active);
  4113. /* if usbc is not defined, swap using us_euro_gpio_p */
  4114. if (pdata->us_euro_gpio_p) {
  4115. value = msm_cdc_pinctrl_get_state(
  4116. pdata->us_euro_gpio_p);
  4117. if (value)
  4118. msm_cdc_pinctrl_select_sleep_state(
  4119. pdata->us_euro_gpio_p);
  4120. else
  4121. msm_cdc_pinctrl_select_active_state(
  4122. pdata->us_euro_gpio_p);
  4123. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  4124. __func__, value, !value);
  4125. ret = true;
  4126. }
  4127. return ret;
  4128. }
  4129. static int msm_afe_set_config(struct snd_soc_component *component)
  4130. {
  4131. int ret = 0;
  4132. void *config_data = NULL;
  4133. if (!msm_codec_fn.get_afe_config_fn) {
  4134. dev_err(component->dev, "%s: codec get afe config not init'ed\n",
  4135. __func__);
  4136. return -EINVAL;
  4137. }
  4138. config_data = msm_codec_fn.get_afe_config_fn(component,
  4139. AFE_CDC_REGISTERS_CONFIG);
  4140. if (config_data) {
  4141. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4142. if (ret) {
  4143. dev_err(component->dev,
  4144. "%s: Failed to set codec registers config %d\n",
  4145. __func__, ret);
  4146. return ret;
  4147. }
  4148. }
  4149. config_data = msm_codec_fn.get_afe_config_fn(component,
  4150. AFE_CDC_REGISTER_PAGE_CONFIG);
  4151. if (config_data) {
  4152. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4153. 0);
  4154. if (ret)
  4155. dev_err(component->dev,
  4156. "%s: Failed to set cdc register page config\n",
  4157. __func__);
  4158. }
  4159. config_data = msm_codec_fn.get_afe_config_fn(component,
  4160. AFE_SLIMBUS_SLAVE_CONFIG);
  4161. if (config_data) {
  4162. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4163. if (ret) {
  4164. dev_err(component->dev,
  4165. "%s: Failed to set slimbus slave config %d\n",
  4166. __func__, ret);
  4167. return ret;
  4168. }
  4169. }
  4170. return 0;
  4171. }
  4172. static void msm_afe_clear_config(void)
  4173. {
  4174. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4175. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4176. }
  4177. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4178. {
  4179. int ret = 0;
  4180. void *config_data;
  4181. struct snd_soc_component *component = NULL;
  4182. struct snd_soc_dapm_context *dapm;
  4183. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4184. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4185. struct snd_soc_component *aux_comp;
  4186. struct snd_card *card = rtd->card->snd_card;
  4187. struct snd_info_entry *entry;
  4188. struct msm_asoc_mach_data *pdata =
  4189. snd_soc_card_get_drvdata(rtd->card);
  4190. /*
  4191. * Codec SLIMBUS configuration
  4192. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4193. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4194. * TX14, TX15, TX16
  4195. */
  4196. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4197. 150, 151};
  4198. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4199. 134, 135, 136, 137, 138, 139,
  4200. 140, 141, 142, 143};
  4201. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4202. rtd->pmdown_time = 0;
  4203. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  4204. if (!component) {
  4205. pr_err("%s: component is NULL\n", __func__);
  4206. return -EINVAL;
  4207. }
  4208. dapm = snd_soc_component_get_dapm(component);
  4209. ret = snd_soc_add_component_controls(component, msm_tavil_snd_controls,
  4210. ARRAY_SIZE(msm_tavil_snd_controls));
  4211. if (ret < 0) {
  4212. pr_err("%s: add_codec_controls failed, err %d\n",
  4213. __func__, ret);
  4214. return ret;
  4215. }
  4216. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4217. ARRAY_SIZE(msm_common_snd_controls));
  4218. if (ret < 0) {
  4219. pr_err("%s: add_codec_controls failed, err %d\n",
  4220. __func__, ret);
  4221. return ret;
  4222. }
  4223. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4224. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4225. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4226. ARRAY_SIZE(wcd_audio_paths_tavil));
  4227. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4228. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4229. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4230. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4231. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4232. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4233. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4234. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4235. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4236. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4237. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4238. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4239. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4240. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4241. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4242. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4243. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4244. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4245. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4246. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4247. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4248. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4249. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4250. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4251. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4252. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4253. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4254. snd_soc_dapm_sync(dapm);
  4255. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4256. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4257. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4258. ret = msm_afe_set_config(component);
  4259. if (ret) {
  4260. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4261. goto err;
  4262. }
  4263. pdata->is_afe_config_done = true;
  4264. config_data = msm_codec_fn.get_afe_config_fn(component,
  4265. AFE_AANC_VERSION);
  4266. if (config_data) {
  4267. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4268. if (ret) {
  4269. pr_err("%s: Failed to set aanc version %d\n",
  4270. __func__, ret);
  4271. goto err;
  4272. }
  4273. }
  4274. /*
  4275. * Send speaker configuration only for WSA8810.
  4276. * Default configuration is for WSA8815.
  4277. */
  4278. pr_debug("%s: Number of aux devices: %d\n",
  4279. __func__, rtd->card->num_aux_devs);
  4280. if (rtd->card->num_aux_devs &&
  4281. !list_empty(&rtd->card->aux_comp_list)) {
  4282. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4283. struct snd_soc_component, card_aux_list);
  4284. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4285. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4286. tavil_set_spkr_mode(component, WCD934X_SPKR_MODE_1);
  4287. tavil_set_spkr_gain_offset(component,
  4288. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4289. }
  4290. }
  4291. card = rtd->card->snd_card;
  4292. entry = snd_info_create_subdir(card->module, "codecs",
  4293. card->proc_root);
  4294. if (!entry) {
  4295. pr_debug("%s: Cannot create codecs module entry\n",
  4296. __func__);
  4297. ret = 0;
  4298. goto err;
  4299. }
  4300. pdata->codec_root = entry;
  4301. tavil_codec_info_create_codec_entry(pdata->codec_root, component);
  4302. codec_reg_done = true;
  4303. return 0;
  4304. err:
  4305. return ret;
  4306. }
  4307. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4308. {
  4309. int ret = 0;
  4310. struct snd_soc_component *component;
  4311. struct snd_soc_dapm_context *dapm;
  4312. struct snd_card *card;
  4313. struct snd_info_entry *entry;
  4314. struct snd_soc_component *aux_comp;
  4315. struct msm_asoc_mach_data *pdata =
  4316. snd_soc_card_get_drvdata(rtd->card);
  4317. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4318. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  4319. if (!component) {
  4320. pr_err("%s: component is NULL\n", __func__);
  4321. return -EINVAL;
  4322. }
  4323. dapm = snd_soc_component_get_dapm(component);
  4324. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  4325. ARRAY_SIZE(msm_int_snd_controls));
  4326. if (ret < 0) {
  4327. pr_err("%s: add_component_controls failed: %d\n",
  4328. __func__, ret);
  4329. return ret;
  4330. }
  4331. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4332. ARRAY_SIZE(msm_common_snd_controls));
  4333. if (ret < 0) {
  4334. pr_err("%s: add common snd controls failed: %d\n",
  4335. __func__, ret);
  4336. return ret;
  4337. }
  4338. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4339. ARRAY_SIZE(msm_int_dapm_widgets));
  4340. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4341. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4342. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4343. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4344. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4345. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4346. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4347. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4348. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4349. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4350. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4351. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4352. snd_soc_dapm_sync(dapm);
  4353. /*
  4354. * Send speaker configuration only for WSA8810.
  4355. * Default configuration is for WSA8815.
  4356. */
  4357. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  4358. __func__, rtd->card->num_aux_devs);
  4359. if (rtd->card->num_aux_devs &&
  4360. !list_empty(&rtd->card->component_dev_list)) {
  4361. aux_comp = list_first_entry(
  4362. &rtd->card->component_dev_list,
  4363. struct snd_soc_component,
  4364. card_aux_list);
  4365. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4366. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4367. wsa_macro_set_spkr_mode(component,
  4368. WSA_MACRO_SPKR_MODE_1);
  4369. wsa_macro_set_spkr_gain_offset(component,
  4370. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4371. }
  4372. }
  4373. card = rtd->card->snd_card;
  4374. if (!pdata->codec_root) {
  4375. entry = snd_info_create_subdir(card->module, "codecs",
  4376. card->proc_root);
  4377. if (!entry) {
  4378. pr_debug("%s: Cannot create codecs module entry\n",
  4379. __func__);
  4380. ret = 0;
  4381. goto err;
  4382. }
  4383. pdata->codec_root = entry;
  4384. }
  4385. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4386. /*
  4387. * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
  4388. * from AOSS to APSS. So, it uses SW workaround and listens to
  4389. * interrupt from AFE over IPC.
  4390. * Check for MSM version and MSM ID and register wake irq
  4391. * accordingly to provide compatibility to all chipsets.
  4392. */
  4393. if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
  4394. socinfo_get_version() == SM6150_SOC_VERSION_1_0)
  4395. bolero_register_wake_irq(component, true);
  4396. else
  4397. bolero_register_wake_irq(component, false);
  4398. codec_reg_done = true;
  4399. return 0;
  4400. err:
  4401. return ret;
  4402. }
  4403. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4404. {
  4405. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4406. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4407. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4408. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4409. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4410. }
  4411. static void *def_wcd_mbhc_cal(void)
  4412. {
  4413. void *wcd_mbhc_cal;
  4414. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4415. u16 *btn_high;
  4416. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4417. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4418. if (!wcd_mbhc_cal)
  4419. return NULL;
  4420. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4421. S(v_hs_max, 1600);
  4422. #undef S
  4423. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4424. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4425. #undef S
  4426. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4427. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4428. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4429. btn_high[0] = 75;
  4430. btn_high[1] = 150;
  4431. btn_high[2] = 237;
  4432. btn_high[3] = 500;
  4433. btn_high[4] = 500;
  4434. btn_high[5] = 500;
  4435. btn_high[6] = 500;
  4436. btn_high[7] = 500;
  4437. return wcd_mbhc_cal;
  4438. }
  4439. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4440. struct snd_pcm_hw_params *params)
  4441. {
  4442. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4443. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4444. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4445. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4446. int ret = 0;
  4447. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4448. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4449. u32 user_set_tx_ch = 0;
  4450. u32 rx_ch_count;
  4451. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4452. ret = snd_soc_dai_get_channel_map(codec_dai,
  4453. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4454. if (ret < 0) {
  4455. pr_err("%s: failed to get codec chan map, err:%d\n",
  4456. __func__, ret);
  4457. goto err;
  4458. }
  4459. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4460. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4461. slim_rx_cfg[5].channels);
  4462. rx_ch_count = slim_rx_cfg[5].channels;
  4463. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4464. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4465. slim_rx_cfg[2].channels);
  4466. rx_ch_count = slim_rx_cfg[2].channels;
  4467. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4468. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4469. slim_rx_cfg[6].channels);
  4470. rx_ch_count = slim_rx_cfg[6].channels;
  4471. } else {
  4472. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4473. slim_rx_cfg[0].channels);
  4474. rx_ch_count = slim_rx_cfg[0].channels;
  4475. }
  4476. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4477. rx_ch_count, rx_ch);
  4478. if (ret < 0) {
  4479. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4480. __func__, ret);
  4481. goto err;
  4482. }
  4483. } else {
  4484. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4485. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4486. ret = snd_soc_dai_get_channel_map(codec_dai,
  4487. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4488. if (ret < 0) {
  4489. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4490. __func__, ret);
  4491. goto err;
  4492. }
  4493. /* For <codec>_tx1 case */
  4494. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4495. user_set_tx_ch = slim_tx_cfg[0].channels;
  4496. /* For <codec>_tx3 case */
  4497. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4498. user_set_tx_ch = slim_tx_cfg[1].channels;
  4499. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4500. user_set_tx_ch = msm_vi_feed_tx_ch;
  4501. else
  4502. user_set_tx_ch = tx_ch_cnt;
  4503. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4504. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4505. tx_ch_cnt, dai_link->id);
  4506. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4507. user_set_tx_ch, tx_ch, 0, 0);
  4508. if (ret < 0)
  4509. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4510. __func__, ret);
  4511. }
  4512. err:
  4513. return ret;
  4514. }
  4515. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4516. struct snd_pcm_hw_params *params)
  4517. {
  4518. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4519. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4520. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4521. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4522. int ret = 0;
  4523. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4524. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4525. u32 user_set_tx_ch = 0;
  4526. u32 user_set_rx_ch = 0;
  4527. u32 ch_id;
  4528. ret = snd_soc_dai_get_channel_map(codec_dai,
  4529. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4530. &rx_ch_cdc_dma);
  4531. if (ret < 0) {
  4532. pr_err("%s: failed to get codec chan map, err:%d\n",
  4533. __func__, ret);
  4534. goto err;
  4535. }
  4536. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4537. switch (dai_link->id) {
  4538. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4539. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4540. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4541. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4542. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4543. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4544. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4545. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4546. {
  4547. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4548. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4549. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4550. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4551. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4552. user_set_rx_ch, &rx_ch_cdc_dma);
  4553. if (ret < 0) {
  4554. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4555. __func__, ret);
  4556. goto err;
  4557. }
  4558. }
  4559. break;
  4560. }
  4561. } else {
  4562. switch (dai_link->id) {
  4563. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4564. {
  4565. user_set_tx_ch = msm_vi_feed_tx_ch;
  4566. }
  4567. break;
  4568. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4569. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4570. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4571. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4572. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4573. {
  4574. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4575. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4576. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4577. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4578. }
  4579. break;
  4580. }
  4581. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4582. &tx_ch_cdc_dma, 0, 0);
  4583. if (ret < 0) {
  4584. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4585. __func__, ret);
  4586. goto err;
  4587. }
  4588. }
  4589. err:
  4590. return ret;
  4591. }
  4592. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4593. struct snd_pcm_hw_params *params)
  4594. {
  4595. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4596. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4597. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4598. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4599. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4600. unsigned int num_tx_ch = 0;
  4601. unsigned int num_rx_ch = 0;
  4602. int ret = 0;
  4603. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4604. num_rx_ch = params_channels(params);
  4605. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4606. codec_dai->name, codec_dai->id, num_rx_ch);
  4607. ret = snd_soc_dai_get_channel_map(codec_dai,
  4608. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4609. if (ret < 0) {
  4610. pr_err("%s: failed to get codec chan map, err:%d\n",
  4611. __func__, ret);
  4612. goto err;
  4613. }
  4614. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4615. num_rx_ch, rx_ch);
  4616. if (ret < 0) {
  4617. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4618. __func__, ret);
  4619. goto err;
  4620. }
  4621. } else {
  4622. num_tx_ch = params_channels(params);
  4623. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4624. codec_dai->name, codec_dai->id, num_tx_ch);
  4625. ret = snd_soc_dai_get_channel_map(codec_dai,
  4626. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4627. if (ret < 0) {
  4628. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4629. __func__, ret);
  4630. goto err;
  4631. }
  4632. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4633. num_tx_ch, tx_ch, 0, 0);
  4634. if (ret < 0) {
  4635. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4636. __func__, ret);
  4637. goto err;
  4638. }
  4639. }
  4640. err:
  4641. return ret;
  4642. }
  4643. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4644. struct snd_pcm_hw_params *params)
  4645. {
  4646. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4647. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4648. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4649. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4650. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4651. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4652. int ret;
  4653. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4654. codec_dai->name, codec_dai->id);
  4655. ret = snd_soc_dai_get_channel_map(codec_dai,
  4656. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4657. if (ret) {
  4658. dev_err(rtd->dev,
  4659. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4660. __func__, ret);
  4661. goto err;
  4662. }
  4663. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4664. __func__, tx_ch_cnt, dai_link->id);
  4665. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4666. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4667. if (ret)
  4668. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4669. __func__, ret);
  4670. err:
  4671. return ret;
  4672. }
  4673. static int msm_get_port_id(int be_id)
  4674. {
  4675. int afe_port_id;
  4676. switch (be_id) {
  4677. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4678. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4679. break;
  4680. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4681. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4682. break;
  4683. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4684. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4685. break;
  4686. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4687. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4688. break;
  4689. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4690. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4691. break;
  4692. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4693. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4694. break;
  4695. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4696. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4697. break;
  4698. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4699. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4700. break;
  4701. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4702. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4703. break;
  4704. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4705. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4706. break;
  4707. default:
  4708. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4709. afe_port_id = -EINVAL;
  4710. }
  4711. return afe_port_id;
  4712. }
  4713. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4714. {
  4715. u32 bit_per_sample;
  4716. switch (bit_format) {
  4717. case SNDRV_PCM_FORMAT_S32_LE:
  4718. case SNDRV_PCM_FORMAT_S24_3LE:
  4719. case SNDRV_PCM_FORMAT_S24_LE:
  4720. bit_per_sample = 32;
  4721. break;
  4722. case SNDRV_PCM_FORMAT_S16_LE:
  4723. default:
  4724. bit_per_sample = 16;
  4725. break;
  4726. }
  4727. return bit_per_sample;
  4728. }
  4729. static void update_mi2s_clk_val(int dai_id, int stream)
  4730. {
  4731. u32 bit_per_sample;
  4732. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4733. bit_per_sample =
  4734. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4735. mi2s_clk[dai_id].clk_freq_in_hz =
  4736. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4737. } else {
  4738. bit_per_sample =
  4739. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4740. mi2s_clk[dai_id].clk_freq_in_hz =
  4741. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4742. }
  4743. }
  4744. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4745. {
  4746. int ret = 0;
  4747. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4748. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4749. int port_id = 0;
  4750. int index = cpu_dai->id;
  4751. port_id = msm_get_port_id(rtd->dai_link->id);
  4752. if (port_id < 0) {
  4753. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4754. ret = port_id;
  4755. goto err;
  4756. }
  4757. if (enable) {
  4758. update_mi2s_clk_val(index, substream->stream);
  4759. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4760. mi2s_clk[index].clk_freq_in_hz);
  4761. }
  4762. mi2s_clk[index].enable = enable;
  4763. ret = afe_set_lpass_clock_v2(port_id,
  4764. &mi2s_clk[index]);
  4765. if (ret < 0) {
  4766. dev_err(rtd->card->dev,
  4767. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4768. __func__, port_id, ret);
  4769. goto err;
  4770. }
  4771. err:
  4772. return ret;
  4773. }
  4774. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4775. enum pinctrl_pin_state new_state)
  4776. {
  4777. int ret = 0;
  4778. int curr_state = 0;
  4779. if (pinctrl_info == NULL) {
  4780. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4781. ret = -EINVAL;
  4782. goto err;
  4783. }
  4784. if (pinctrl_info->pinctrl == NULL) {
  4785. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4786. ret = -EINVAL;
  4787. goto err;
  4788. }
  4789. curr_state = pinctrl_info->curr_state;
  4790. pinctrl_info->curr_state = new_state;
  4791. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4792. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4793. if (curr_state == pinctrl_info->curr_state) {
  4794. pr_debug("%s: Already in same state\n", __func__);
  4795. goto err;
  4796. }
  4797. if (curr_state != STATE_DISABLE &&
  4798. pinctrl_info->curr_state != STATE_DISABLE) {
  4799. pr_debug("%s: state already active cannot switch\n", __func__);
  4800. ret = -EIO;
  4801. goto err;
  4802. }
  4803. switch (pinctrl_info->curr_state) {
  4804. case STATE_MI2S_ACTIVE:
  4805. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4806. pinctrl_info->mi2s_active);
  4807. if (ret) {
  4808. pr_err("%s: MI2S state select failed with %d\n",
  4809. __func__, ret);
  4810. ret = -EIO;
  4811. goto err;
  4812. }
  4813. break;
  4814. case STATE_TDM_ACTIVE:
  4815. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4816. pinctrl_info->tdm_active);
  4817. if (ret) {
  4818. pr_err("%s: TDM state select failed with %d\n",
  4819. __func__, ret);
  4820. ret = -EIO;
  4821. goto err;
  4822. }
  4823. break;
  4824. case STATE_DISABLE:
  4825. if (curr_state == STATE_MI2S_ACTIVE) {
  4826. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4827. pinctrl_info->mi2s_disable);
  4828. } else {
  4829. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4830. pinctrl_info->tdm_disable);
  4831. }
  4832. if (ret) {
  4833. pr_err("%s: state disable failed with %d\n",
  4834. __func__, ret);
  4835. ret = -EIO;
  4836. goto err;
  4837. }
  4838. break;
  4839. default:
  4840. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4841. return -EINVAL;
  4842. }
  4843. err:
  4844. return ret;
  4845. }
  4846. static int msm_get_pinctrl(struct platform_device *pdev)
  4847. {
  4848. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4849. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4850. struct msm_pinctrl_info *pinctrl_info = NULL;
  4851. struct pinctrl *pinctrl;
  4852. int ret = 0;
  4853. pinctrl_info = &pdata->pinctrl_info;
  4854. if (pinctrl_info == NULL) {
  4855. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4856. return -EINVAL;
  4857. }
  4858. pinctrl = devm_pinctrl_get(&pdev->dev);
  4859. if (IS_ERR_OR_NULL(pinctrl)) {
  4860. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4861. return -EINVAL;
  4862. }
  4863. pinctrl_info->pinctrl = pinctrl;
  4864. /* get all the states handles from Device Tree */
  4865. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4866. "quat-mi2s-sleep");
  4867. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4868. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4869. goto err;
  4870. }
  4871. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4872. "quat-mi2s-active");
  4873. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4874. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4875. goto err;
  4876. }
  4877. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4878. "quat-tdm-sleep");
  4879. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4880. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4881. goto err;
  4882. }
  4883. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4884. "quat-tdm-active");
  4885. if (IS_ERR(pinctrl_info->tdm_active)) {
  4886. pr_err("%s: could not get tdm_active pinstate\n",
  4887. __func__);
  4888. goto err;
  4889. }
  4890. /* Reset the TLMM pins to a default state */
  4891. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4892. pinctrl_info->mi2s_disable);
  4893. if (ret != 0) {
  4894. pr_err("%s: Disable TLMM pins failed with %d\n",
  4895. __func__, ret);
  4896. ret = -EIO;
  4897. goto err;
  4898. }
  4899. pinctrl_info->curr_state = STATE_DISABLE;
  4900. return 0;
  4901. err:
  4902. devm_pinctrl_put(pinctrl);
  4903. pinctrl_info->pinctrl = NULL;
  4904. return -EINVAL;
  4905. }
  4906. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4907. struct snd_pcm_hw_params *params)
  4908. {
  4909. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4910. struct snd_interval *rate = hw_param_interval(params,
  4911. SNDRV_PCM_HW_PARAM_RATE);
  4912. struct snd_interval *channels = hw_param_interval(params,
  4913. SNDRV_PCM_HW_PARAM_CHANNELS);
  4914. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4915. channels->min = channels->max =
  4916. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4917. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4918. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4919. rate->min = rate->max =
  4920. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4921. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4922. channels->min = channels->max =
  4923. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4924. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4925. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4926. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4927. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4928. channels->min = channels->max =
  4929. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4930. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4931. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4932. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4933. } else {
  4934. pr_err("%s: dai id 0x%x not supported\n",
  4935. __func__, cpu_dai->id);
  4936. return -EINVAL;
  4937. }
  4938. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4939. __func__, cpu_dai->id, channels->max, rate->max,
  4940. params_format(params));
  4941. return 0;
  4942. }
  4943. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4944. struct snd_pcm_hw_params *params)
  4945. {
  4946. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4947. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4948. int ret = 0;
  4949. int slot_width = 32;
  4950. int channels, slots;
  4951. unsigned int slot_mask, rate, clk_freq;
  4952. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4953. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4954. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4955. switch (cpu_dai->id) {
  4956. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4957. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4958. break;
  4959. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4960. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4961. break;
  4962. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4963. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4964. break;
  4965. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4966. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4967. break;
  4968. case AFE_PORT_ID_QUINARY_TDM_RX:
  4969. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4970. break;
  4971. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4972. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4973. break;
  4974. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4975. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4976. break;
  4977. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4978. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4979. break;
  4980. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4981. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4982. break;
  4983. case AFE_PORT_ID_QUINARY_TDM_TX:
  4984. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4985. break;
  4986. default:
  4987. pr_err("%s: dai id 0x%x not supported\n",
  4988. __func__, cpu_dai->id);
  4989. return -EINVAL;
  4990. }
  4991. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4992. /*2 slot config - bits 0 and 1 set for the first two slots */
  4993. slot_mask = 0x0000FFFF >> (16-slots);
  4994. channels = slots;
  4995. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4996. __func__, slot_width, slots);
  4997. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4998. slots, slot_width);
  4999. if (ret < 0) {
  5000. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  5001. __func__, ret);
  5002. goto end;
  5003. }
  5004. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5005. 0, NULL, channels, slot_offset);
  5006. if (ret < 0) {
  5007. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  5008. __func__, ret);
  5009. goto end;
  5010. }
  5011. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  5012. /*2 slot config - bits 0 and 1 set for the first two slots */
  5013. slot_mask = 0x0000FFFF >> (16-slots);
  5014. channels = slots;
  5015. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  5016. __func__, slot_width, slots);
  5017. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  5018. slots, slot_width);
  5019. if (ret < 0) {
  5020. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  5021. __func__, ret);
  5022. goto end;
  5023. }
  5024. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5025. channels, slot_offset, 0, NULL);
  5026. if (ret < 0) {
  5027. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  5028. __func__, ret);
  5029. goto end;
  5030. }
  5031. } else {
  5032. ret = -EINVAL;
  5033. pr_err("%s: invalid use case, err:%d\n",
  5034. __func__, ret);
  5035. goto end;
  5036. }
  5037. rate = params_rate(params);
  5038. clk_freq = rate * slot_width * slots;
  5039. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5040. if (ret < 0)
  5041. pr_err("%s: failed to set tdm clk, err:%d\n",
  5042. __func__, ret);
  5043. end:
  5044. return ret;
  5045. }
  5046. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5047. {
  5048. int ret = 0;
  5049. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5050. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5051. struct snd_soc_card *card = rtd->card;
  5052. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5053. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5054. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5055. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5056. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5057. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5058. if (ret)
  5059. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5060. __func__, ret);
  5061. }
  5062. return ret;
  5063. }
  5064. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5065. {
  5066. int ret = 0;
  5067. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5068. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5069. struct snd_soc_card *card = rtd->card;
  5070. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5071. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5072. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5073. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5074. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5075. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5076. if (ret)
  5077. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5078. __func__, ret);
  5079. }
  5080. }
  5081. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5082. .hw_params = sm6150_tdm_snd_hw_params,
  5083. .startup = sm6150_tdm_snd_startup,
  5084. .shutdown = sm6150_tdm_snd_shutdown
  5085. };
  5086. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5087. {
  5088. cpumask_t mask;
  5089. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5090. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5091. cpumask_clear(&mask);
  5092. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5093. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5094. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5095. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5096. pm_qos_add_request(&substream->latency_pm_qos_req,
  5097. PM_QOS_CPU_DMA_LATENCY,
  5098. MSM_LL_QOS_VALUE);
  5099. return 0;
  5100. }
  5101. static struct snd_soc_ops msm_fe_qos_ops = {
  5102. .prepare = msm_fe_qos_prepare,
  5103. };
  5104. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5105. {
  5106. int ret = 0;
  5107. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5108. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5109. int index = cpu_dai->id;
  5110. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5111. struct snd_soc_card *card = rtd->card;
  5112. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5113. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5114. int ret_pinctrl = 0;
  5115. dev_dbg(rtd->card->dev,
  5116. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5117. __func__, substream->name, substream->stream,
  5118. cpu_dai->name, cpu_dai->id);
  5119. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5120. ret = -EINVAL;
  5121. dev_err(rtd->card->dev,
  5122. "%s: CPU DAI id (%d) out of range\n",
  5123. __func__, cpu_dai->id);
  5124. goto err;
  5125. }
  5126. /*
  5127. * Mutex protection in case the same MI2S
  5128. * interface using for both TX and RX so
  5129. * that the same clock won't be enable twice.
  5130. */
  5131. mutex_lock(&mi2s_intf_conf[index].lock);
  5132. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5133. /* Check if msm needs to provide the clock to the interface */
  5134. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5135. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5136. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5137. }
  5138. ret = msm_mi2s_set_sclk(substream, true);
  5139. if (ret < 0) {
  5140. dev_err(rtd->card->dev,
  5141. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5142. __func__, ret);
  5143. goto clean_up;
  5144. }
  5145. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5146. if (ret < 0) {
  5147. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5148. __func__, index, ret);
  5149. goto clk_off;
  5150. }
  5151. if (index == QUAT_MI2S) {
  5152. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5153. STATE_MI2S_ACTIVE);
  5154. if (ret_pinctrl)
  5155. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5156. __func__, ret_pinctrl);
  5157. }
  5158. }
  5159. clk_off:
  5160. if (ret < 0)
  5161. msm_mi2s_set_sclk(substream, false);
  5162. clean_up:
  5163. if (ret < 0)
  5164. mi2s_intf_conf[index].ref_cnt--;
  5165. mutex_unlock(&mi2s_intf_conf[index].lock);
  5166. err:
  5167. return ret;
  5168. }
  5169. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5170. {
  5171. int ret;
  5172. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5173. int index = rtd->cpu_dai->id;
  5174. struct snd_soc_card *card = rtd->card;
  5175. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5176. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5177. int ret_pinctrl = 0;
  5178. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5179. substream->name, substream->stream);
  5180. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5181. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5182. return;
  5183. }
  5184. mutex_lock(&mi2s_intf_conf[index].lock);
  5185. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5186. ret = msm_mi2s_set_sclk(substream, false);
  5187. if (ret < 0)
  5188. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5189. __func__, index, ret);
  5190. if (index == QUAT_MI2S) {
  5191. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5192. STATE_DISABLE);
  5193. if (ret_pinctrl)
  5194. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5195. __func__, ret_pinctrl);
  5196. }
  5197. }
  5198. mutex_unlock(&mi2s_intf_conf[index].lock);
  5199. }
  5200. static struct snd_soc_ops msm_mi2s_be_ops = {
  5201. .startup = msm_mi2s_snd_startup,
  5202. .shutdown = msm_mi2s_snd_shutdown,
  5203. };
  5204. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5205. .hw_params = msm_snd_cdc_dma_hw_params,
  5206. };
  5207. static struct snd_soc_ops msm_be_ops = {
  5208. .hw_params = msm_snd_hw_params,
  5209. };
  5210. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5211. .hw_params = msm_slimbus_2_hw_params,
  5212. };
  5213. static struct snd_soc_ops msm_wcn_ops = {
  5214. .hw_params = msm_wcn_hw_params,
  5215. };
  5216. /* Digital audio interface glue - connects codec <---> CPU */
  5217. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5218. /* FrontEnd DAI Links */
  5219. {/* hw:x,0 */
  5220. .name = MSM_DAILINK_NAME(Media1),
  5221. .stream_name = "MultiMedia1",
  5222. .cpu_dai_name = "MultiMedia1",
  5223. .platform_name = "msm-pcm-dsp.0",
  5224. .dynamic = 1,
  5225. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5226. .dpcm_playback = 1,
  5227. .dpcm_capture = 1,
  5228. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5229. SND_SOC_DPCM_TRIGGER_POST},
  5230. .codec_dai_name = "snd-soc-dummy-dai",
  5231. .codec_name = "snd-soc-dummy",
  5232. .ignore_suspend = 1,
  5233. /* this dainlink has playback support */
  5234. .ignore_pmdown_time = 1,
  5235. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5236. },
  5237. {/* hw:x,1 */
  5238. .name = MSM_DAILINK_NAME(Media2),
  5239. .stream_name = "MultiMedia2",
  5240. .cpu_dai_name = "MultiMedia2",
  5241. .platform_name = "msm-pcm-dsp.0",
  5242. .dynamic = 1,
  5243. .dpcm_playback = 1,
  5244. .dpcm_capture = 1,
  5245. .codec_dai_name = "snd-soc-dummy-dai",
  5246. .codec_name = "snd-soc-dummy",
  5247. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5248. SND_SOC_DPCM_TRIGGER_POST},
  5249. .ignore_suspend = 1,
  5250. /* this dainlink has playback support */
  5251. .ignore_pmdown_time = 1,
  5252. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5253. },
  5254. {/* hw:x,2 */
  5255. .name = "VoiceMMode1",
  5256. .stream_name = "VoiceMMode1",
  5257. .cpu_dai_name = "VoiceMMode1",
  5258. .platform_name = "msm-pcm-voice",
  5259. .dynamic = 1,
  5260. .dpcm_playback = 1,
  5261. .dpcm_capture = 1,
  5262. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5263. SND_SOC_DPCM_TRIGGER_POST},
  5264. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5265. .ignore_suspend = 1,
  5266. .ignore_pmdown_time = 1,
  5267. .codec_dai_name = "snd-soc-dummy-dai",
  5268. .codec_name = "snd-soc-dummy",
  5269. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5270. },
  5271. {/* hw:x,3 */
  5272. .name = "MSM VoIP",
  5273. .stream_name = "VoIP",
  5274. .cpu_dai_name = "VoIP",
  5275. .platform_name = "msm-voip-dsp",
  5276. .dynamic = 1,
  5277. .dpcm_playback = 1,
  5278. .dpcm_capture = 1,
  5279. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5280. SND_SOC_DPCM_TRIGGER_POST},
  5281. .codec_dai_name = "snd-soc-dummy-dai",
  5282. .codec_name = "snd-soc-dummy",
  5283. .ignore_suspend = 1,
  5284. /* this dainlink has playback support */
  5285. .ignore_pmdown_time = 1,
  5286. .id = MSM_FRONTEND_DAI_VOIP,
  5287. },
  5288. {/* hw:x,4 */
  5289. .name = MSM_DAILINK_NAME(ULL),
  5290. .stream_name = "MultiMedia3",
  5291. .cpu_dai_name = "MultiMedia3",
  5292. .platform_name = "msm-pcm-dsp.2",
  5293. .dynamic = 1,
  5294. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5295. .dpcm_playback = 1,
  5296. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5297. SND_SOC_DPCM_TRIGGER_POST},
  5298. .codec_dai_name = "snd-soc-dummy-dai",
  5299. .codec_name = "snd-soc-dummy",
  5300. .ignore_suspend = 1,
  5301. /* this dainlink has playback support */
  5302. .ignore_pmdown_time = 1,
  5303. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5304. },
  5305. /* Hostless PCM purpose */
  5306. {/* hw:x,5 */
  5307. .name = "SLIMBUS_0 Hostless",
  5308. .stream_name = "SLIMBUS_0 Hostless",
  5309. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5310. .platform_name = "msm-pcm-hostless",
  5311. .dynamic = 1,
  5312. .dpcm_playback = 1,
  5313. .dpcm_capture = 1,
  5314. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5315. SND_SOC_DPCM_TRIGGER_POST},
  5316. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5317. .ignore_suspend = 1,
  5318. /* this dailink has playback support */
  5319. .ignore_pmdown_time = 1,
  5320. .codec_dai_name = "snd-soc-dummy-dai",
  5321. .codec_name = "snd-soc-dummy",
  5322. },
  5323. {/* hw:x,6 */
  5324. .name = "MSM AFE-PCM RX",
  5325. .stream_name = "AFE-PROXY RX",
  5326. .cpu_dai_name = "msm-dai-q6-dev.241",
  5327. .codec_name = "msm-stub-codec.1",
  5328. .codec_dai_name = "msm-stub-rx",
  5329. .platform_name = "msm-pcm-afe",
  5330. .dpcm_playback = 1,
  5331. .ignore_suspend = 1,
  5332. /* this dainlink has playback support */
  5333. .ignore_pmdown_time = 1,
  5334. },
  5335. {/* hw:x,7 */
  5336. .name = "MSM AFE-PCM TX",
  5337. .stream_name = "AFE-PROXY TX",
  5338. .cpu_dai_name = "msm-dai-q6-dev.240",
  5339. .codec_name = "msm-stub-codec.1",
  5340. .codec_dai_name = "msm-stub-tx",
  5341. .platform_name = "msm-pcm-afe",
  5342. .dpcm_capture = 1,
  5343. .ignore_suspend = 1,
  5344. },
  5345. {/* hw:x,8 */
  5346. .name = MSM_DAILINK_NAME(Compress1),
  5347. .stream_name = "Compress1",
  5348. .cpu_dai_name = "MultiMedia4",
  5349. .platform_name = "msm-compress-dsp",
  5350. .dynamic = 1,
  5351. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5352. .dpcm_playback = 1,
  5353. .dpcm_capture = 1,
  5354. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5355. SND_SOC_DPCM_TRIGGER_POST},
  5356. .codec_dai_name = "snd-soc-dummy-dai",
  5357. .codec_name = "snd-soc-dummy",
  5358. .ignore_suspend = 1,
  5359. .ignore_pmdown_time = 1,
  5360. /* this dainlink has playback support */
  5361. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5362. },
  5363. {/* hw:x,9 */
  5364. .name = "AUXPCM Hostless",
  5365. .stream_name = "AUXPCM Hostless",
  5366. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5367. .platform_name = "msm-pcm-hostless",
  5368. .dynamic = 1,
  5369. .dpcm_playback = 1,
  5370. .dpcm_capture = 1,
  5371. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5372. SND_SOC_DPCM_TRIGGER_POST},
  5373. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5374. .ignore_suspend = 1,
  5375. /* this dainlink has playback support */
  5376. .ignore_pmdown_time = 1,
  5377. .codec_dai_name = "snd-soc-dummy-dai",
  5378. .codec_name = "snd-soc-dummy",
  5379. },
  5380. {/* hw:x,10 */
  5381. .name = "SLIMBUS_1 Hostless",
  5382. .stream_name = "SLIMBUS_1 Hostless",
  5383. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5384. .platform_name = "msm-pcm-hostless",
  5385. .dynamic = 1,
  5386. .dpcm_playback = 1,
  5387. .dpcm_capture = 1,
  5388. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5389. SND_SOC_DPCM_TRIGGER_POST},
  5390. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5391. .ignore_suspend = 1,
  5392. /* this dailink has playback support */
  5393. .ignore_pmdown_time = 1,
  5394. .codec_dai_name = "snd-soc-dummy-dai",
  5395. .codec_name = "snd-soc-dummy",
  5396. },
  5397. {/* hw:x,11 */
  5398. .name = "SLIMBUS_3 Hostless",
  5399. .stream_name = "SLIMBUS_3 Hostless",
  5400. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5401. .platform_name = "msm-pcm-hostless",
  5402. .dynamic = 1,
  5403. .dpcm_playback = 1,
  5404. .dpcm_capture = 1,
  5405. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5406. SND_SOC_DPCM_TRIGGER_POST},
  5407. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5408. .ignore_suspend = 1,
  5409. /* this dailink has playback support */
  5410. .ignore_pmdown_time = 1,
  5411. .codec_dai_name = "snd-soc-dummy-dai",
  5412. .codec_name = "snd-soc-dummy",
  5413. },
  5414. {/* hw:x,12 */
  5415. .name = "SLIMBUS_7 Hostless",
  5416. .stream_name = "SLIMBUS_7 Hostless",
  5417. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5418. .platform_name = "msm-pcm-hostless",
  5419. .dynamic = 1,
  5420. .dpcm_playback = 1,
  5421. .dpcm_capture = 1,
  5422. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5423. SND_SOC_DPCM_TRIGGER_POST},
  5424. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5425. .ignore_suspend = 1,
  5426. /* this dailink has playback support */
  5427. .ignore_pmdown_time = 1,
  5428. .codec_dai_name = "snd-soc-dummy-dai",
  5429. .codec_name = "snd-soc-dummy",
  5430. },
  5431. {/* hw:x,13 */
  5432. .name = MSM_DAILINK_NAME(LowLatency),
  5433. .stream_name = "MultiMedia5",
  5434. .cpu_dai_name = "MultiMedia5",
  5435. .platform_name = "msm-pcm-dsp.1",
  5436. .dynamic = 1,
  5437. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5438. .dpcm_playback = 1,
  5439. .dpcm_capture = 1,
  5440. .codec_dai_name = "snd-soc-dummy-dai",
  5441. .codec_name = "snd-soc-dummy",
  5442. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5443. SND_SOC_DPCM_TRIGGER_POST},
  5444. .ignore_suspend = 1,
  5445. /* this dainlink has playback support */
  5446. .ignore_pmdown_time = 1,
  5447. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5448. .ops = &msm_fe_qos_ops,
  5449. },
  5450. {/* hw:x,14 */
  5451. .name = "Listen 1 Audio Service",
  5452. .stream_name = "Listen 1 Audio Service",
  5453. .cpu_dai_name = "LSM1",
  5454. .platform_name = "msm-lsm-client",
  5455. .dynamic = 1,
  5456. .dpcm_capture = 1,
  5457. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5458. SND_SOC_DPCM_TRIGGER_POST },
  5459. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5460. .ignore_suspend = 1,
  5461. .codec_dai_name = "snd-soc-dummy-dai",
  5462. .codec_name = "snd-soc-dummy",
  5463. .id = MSM_FRONTEND_DAI_LSM1,
  5464. },
  5465. /* Multiple Tunnel instances */
  5466. {/* hw:x,15 */
  5467. .name = MSM_DAILINK_NAME(Compress2),
  5468. .stream_name = "Compress2",
  5469. .cpu_dai_name = "MultiMedia7",
  5470. .platform_name = "msm-compress-dsp",
  5471. .dynamic = 1,
  5472. .dpcm_playback = 1,
  5473. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5474. SND_SOC_DPCM_TRIGGER_POST},
  5475. .codec_dai_name = "snd-soc-dummy-dai",
  5476. .codec_name = "snd-soc-dummy",
  5477. .ignore_suspend = 1,
  5478. .ignore_pmdown_time = 1,
  5479. /* this dainlink has playback support */
  5480. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5481. },
  5482. {/* hw:x,16 */
  5483. .name = MSM_DAILINK_NAME(MultiMedia10),
  5484. .stream_name = "MultiMedia10",
  5485. .cpu_dai_name = "MultiMedia10",
  5486. .platform_name = "msm-pcm-dsp.1",
  5487. .dynamic = 1,
  5488. .dpcm_playback = 1,
  5489. .dpcm_capture = 1,
  5490. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5491. SND_SOC_DPCM_TRIGGER_POST},
  5492. .codec_dai_name = "snd-soc-dummy-dai",
  5493. .codec_name = "snd-soc-dummy",
  5494. .ignore_suspend = 1,
  5495. .ignore_pmdown_time = 1,
  5496. /* this dainlink has playback support */
  5497. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5498. },
  5499. {/* hw:x,17 */
  5500. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5501. .stream_name = "MM_NOIRQ",
  5502. .cpu_dai_name = "MultiMedia8",
  5503. .platform_name = "msm-pcm-dsp-noirq",
  5504. .dynamic = 1,
  5505. .dpcm_playback = 1,
  5506. .dpcm_capture = 1,
  5507. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5508. SND_SOC_DPCM_TRIGGER_POST},
  5509. .codec_dai_name = "snd-soc-dummy-dai",
  5510. .codec_name = "snd-soc-dummy",
  5511. .ignore_suspend = 1,
  5512. .ignore_pmdown_time = 1,
  5513. /* this dainlink has playback support */
  5514. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5515. .ops = &msm_fe_qos_ops,
  5516. },
  5517. /* HDMI Hostless */
  5518. {/* hw:x,18 */
  5519. .name = "HDMI_RX_HOSTLESS",
  5520. .stream_name = "HDMI_RX_HOSTLESS",
  5521. .cpu_dai_name = "HDMI_HOSTLESS",
  5522. .platform_name = "msm-pcm-hostless",
  5523. .dynamic = 1,
  5524. .dpcm_playback = 1,
  5525. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5526. SND_SOC_DPCM_TRIGGER_POST},
  5527. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5528. .ignore_suspend = 1,
  5529. .ignore_pmdown_time = 1,
  5530. .codec_dai_name = "snd-soc-dummy-dai",
  5531. .codec_name = "snd-soc-dummy",
  5532. },
  5533. {/* hw:x,19 */
  5534. .name = "VoiceMMode2",
  5535. .stream_name = "VoiceMMode2",
  5536. .cpu_dai_name = "VoiceMMode2",
  5537. .platform_name = "msm-pcm-voice",
  5538. .dynamic = 1,
  5539. .dpcm_playback = 1,
  5540. .dpcm_capture = 1,
  5541. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5542. SND_SOC_DPCM_TRIGGER_POST},
  5543. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5544. .ignore_suspend = 1,
  5545. .ignore_pmdown_time = 1,
  5546. .codec_dai_name = "snd-soc-dummy-dai",
  5547. .codec_name = "snd-soc-dummy",
  5548. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5549. },
  5550. /* LSM FE */
  5551. {/* hw:x,20 */
  5552. .name = "Listen 2 Audio Service",
  5553. .stream_name = "Listen 2 Audio Service",
  5554. .cpu_dai_name = "LSM2",
  5555. .platform_name = "msm-lsm-client",
  5556. .dynamic = 1,
  5557. .dpcm_capture = 1,
  5558. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5559. SND_SOC_DPCM_TRIGGER_POST },
  5560. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5561. .ignore_suspend = 1,
  5562. .codec_dai_name = "snd-soc-dummy-dai",
  5563. .codec_name = "snd-soc-dummy",
  5564. .id = MSM_FRONTEND_DAI_LSM2,
  5565. },
  5566. {/* hw:x,21 */
  5567. .name = "Listen 3 Audio Service",
  5568. .stream_name = "Listen 3 Audio Service",
  5569. .cpu_dai_name = "LSM3",
  5570. .platform_name = "msm-lsm-client",
  5571. .dynamic = 1,
  5572. .dpcm_capture = 1,
  5573. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5574. SND_SOC_DPCM_TRIGGER_POST },
  5575. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5576. .ignore_suspend = 1,
  5577. .codec_dai_name = "snd-soc-dummy-dai",
  5578. .codec_name = "snd-soc-dummy",
  5579. .id = MSM_FRONTEND_DAI_LSM3,
  5580. },
  5581. {/* hw:x,22 */
  5582. .name = "Listen 4 Audio Service",
  5583. .stream_name = "Listen 4 Audio Service",
  5584. .cpu_dai_name = "LSM4",
  5585. .platform_name = "msm-lsm-client",
  5586. .dynamic = 1,
  5587. .dpcm_capture = 1,
  5588. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5589. SND_SOC_DPCM_TRIGGER_POST },
  5590. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5591. .ignore_suspend = 1,
  5592. .codec_dai_name = "snd-soc-dummy-dai",
  5593. .codec_name = "snd-soc-dummy",
  5594. .id = MSM_FRONTEND_DAI_LSM4,
  5595. },
  5596. {/* hw:x,23 */
  5597. .name = "Listen 5 Audio Service",
  5598. .stream_name = "Listen 5 Audio Service",
  5599. .cpu_dai_name = "LSM5",
  5600. .platform_name = "msm-lsm-client",
  5601. .dynamic = 1,
  5602. .dpcm_capture = 1,
  5603. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5604. SND_SOC_DPCM_TRIGGER_POST },
  5605. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5606. .ignore_suspend = 1,
  5607. .codec_dai_name = "snd-soc-dummy-dai",
  5608. .codec_name = "snd-soc-dummy",
  5609. .id = MSM_FRONTEND_DAI_LSM5,
  5610. },
  5611. {/* hw:x,24 */
  5612. .name = "Listen 6 Audio Service",
  5613. .stream_name = "Listen 6 Audio Service",
  5614. .cpu_dai_name = "LSM6",
  5615. .platform_name = "msm-lsm-client",
  5616. .dynamic = 1,
  5617. .dpcm_capture = 1,
  5618. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5619. SND_SOC_DPCM_TRIGGER_POST },
  5620. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5621. .ignore_suspend = 1,
  5622. .codec_dai_name = "snd-soc-dummy-dai",
  5623. .codec_name = "snd-soc-dummy",
  5624. .id = MSM_FRONTEND_DAI_LSM6,
  5625. },
  5626. {/* hw:x,25 */
  5627. .name = "Listen 7 Audio Service",
  5628. .stream_name = "Listen 7 Audio Service",
  5629. .cpu_dai_name = "LSM7",
  5630. .platform_name = "msm-lsm-client",
  5631. .dynamic = 1,
  5632. .dpcm_capture = 1,
  5633. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5634. SND_SOC_DPCM_TRIGGER_POST },
  5635. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5636. .ignore_suspend = 1,
  5637. .codec_dai_name = "snd-soc-dummy-dai",
  5638. .codec_name = "snd-soc-dummy",
  5639. .id = MSM_FRONTEND_DAI_LSM7,
  5640. },
  5641. {/* hw:x,26 */
  5642. .name = "Listen 8 Audio Service",
  5643. .stream_name = "Listen 8 Audio Service",
  5644. .cpu_dai_name = "LSM8",
  5645. .platform_name = "msm-lsm-client",
  5646. .dynamic = 1,
  5647. .dpcm_capture = 1,
  5648. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5649. SND_SOC_DPCM_TRIGGER_POST },
  5650. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5651. .ignore_suspend = 1,
  5652. .codec_dai_name = "snd-soc-dummy-dai",
  5653. .codec_name = "snd-soc-dummy",
  5654. .id = MSM_FRONTEND_DAI_LSM8,
  5655. },
  5656. {/* hw:x,27 */
  5657. .name = MSM_DAILINK_NAME(Media9),
  5658. .stream_name = "MultiMedia9",
  5659. .cpu_dai_name = "MultiMedia9",
  5660. .platform_name = "msm-pcm-dsp.0",
  5661. .dynamic = 1,
  5662. .dpcm_playback = 1,
  5663. .dpcm_capture = 1,
  5664. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5665. SND_SOC_DPCM_TRIGGER_POST},
  5666. .codec_dai_name = "snd-soc-dummy-dai",
  5667. .codec_name = "snd-soc-dummy",
  5668. .ignore_suspend = 1,
  5669. /* this dainlink has playback support */
  5670. .ignore_pmdown_time = 1,
  5671. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5672. },
  5673. {/* hw:x,28 */
  5674. .name = MSM_DAILINK_NAME(Compress4),
  5675. .stream_name = "Compress4",
  5676. .cpu_dai_name = "MultiMedia11",
  5677. .platform_name = "msm-compress-dsp",
  5678. .dynamic = 1,
  5679. .dpcm_playback = 1,
  5680. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5681. SND_SOC_DPCM_TRIGGER_POST},
  5682. .codec_dai_name = "snd-soc-dummy-dai",
  5683. .codec_name = "snd-soc-dummy",
  5684. .ignore_suspend = 1,
  5685. .ignore_pmdown_time = 1,
  5686. /* this dainlink has playback support */
  5687. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5688. },
  5689. {/* hw:x,29 */
  5690. .name = MSM_DAILINK_NAME(Compress5),
  5691. .stream_name = "Compress5",
  5692. .cpu_dai_name = "MultiMedia12",
  5693. .platform_name = "msm-compress-dsp",
  5694. .dynamic = 1,
  5695. .dpcm_playback = 1,
  5696. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5697. SND_SOC_DPCM_TRIGGER_POST},
  5698. .codec_dai_name = "snd-soc-dummy-dai",
  5699. .codec_name = "snd-soc-dummy",
  5700. .ignore_suspend = 1,
  5701. .ignore_pmdown_time = 1,
  5702. /* this dainlink has playback support */
  5703. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5704. },
  5705. {/* hw:x,30 */
  5706. .name = MSM_DAILINK_NAME(Compress6),
  5707. .stream_name = "Compress6",
  5708. .cpu_dai_name = "MultiMedia13",
  5709. .platform_name = "msm-compress-dsp",
  5710. .dynamic = 1,
  5711. .dpcm_playback = 1,
  5712. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5713. SND_SOC_DPCM_TRIGGER_POST},
  5714. .codec_dai_name = "snd-soc-dummy-dai",
  5715. .codec_name = "snd-soc-dummy",
  5716. .ignore_suspend = 1,
  5717. .ignore_pmdown_time = 1,
  5718. /* this dainlink has playback support */
  5719. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5720. },
  5721. {/* hw:x,31 */
  5722. .name = MSM_DAILINK_NAME(Compress7),
  5723. .stream_name = "Compress7",
  5724. .cpu_dai_name = "MultiMedia14",
  5725. .platform_name = "msm-compress-dsp",
  5726. .dynamic = 1,
  5727. .dpcm_playback = 1,
  5728. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5729. SND_SOC_DPCM_TRIGGER_POST},
  5730. .codec_dai_name = "snd-soc-dummy-dai",
  5731. .codec_name = "snd-soc-dummy",
  5732. .ignore_suspend = 1,
  5733. .ignore_pmdown_time = 1,
  5734. /* this dainlink has playback support */
  5735. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5736. },
  5737. {/* hw:x,32 */
  5738. .name = MSM_DAILINK_NAME(Compress8),
  5739. .stream_name = "Compress8",
  5740. .cpu_dai_name = "MultiMedia15",
  5741. .platform_name = "msm-compress-dsp",
  5742. .dynamic = 1,
  5743. .dpcm_playback = 1,
  5744. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5745. SND_SOC_DPCM_TRIGGER_POST},
  5746. .codec_dai_name = "snd-soc-dummy-dai",
  5747. .codec_name = "snd-soc-dummy",
  5748. .ignore_suspend = 1,
  5749. .ignore_pmdown_time = 1,
  5750. /* this dainlink has playback support */
  5751. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5752. },
  5753. {/* hw:x,33 */
  5754. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5755. .stream_name = "MM_NOIRQ_2",
  5756. .cpu_dai_name = "MultiMedia16",
  5757. .platform_name = "msm-pcm-dsp-noirq",
  5758. .dynamic = 1,
  5759. .dpcm_playback = 1,
  5760. .dpcm_capture = 1,
  5761. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5762. SND_SOC_DPCM_TRIGGER_POST},
  5763. .codec_dai_name = "snd-soc-dummy-dai",
  5764. .codec_name = "snd-soc-dummy",
  5765. .ignore_suspend = 1,
  5766. .ignore_pmdown_time = 1,
  5767. /* this dainlink has playback support */
  5768. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5769. },
  5770. {/* hw:x,34 */
  5771. .name = "SLIMBUS_8 Hostless",
  5772. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5773. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5774. .platform_name = "msm-pcm-hostless",
  5775. .dynamic = 1,
  5776. .dpcm_capture = 1,
  5777. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5778. SND_SOC_DPCM_TRIGGER_POST},
  5779. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5780. .ignore_suspend = 1,
  5781. .codec_dai_name = "snd-soc-dummy-dai",
  5782. .codec_name = "snd-soc-dummy",
  5783. },
  5784. {/* hw:x,35 */
  5785. .name = "CDC_DMA Hostless",
  5786. .stream_name = "CDC_DMA Hostless",
  5787. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5788. .platform_name = "msm-pcm-hostless",
  5789. .dynamic = 1,
  5790. .dpcm_playback = 1,
  5791. .dpcm_capture = 1,
  5792. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5793. SND_SOC_DPCM_TRIGGER_POST},
  5794. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5795. .ignore_suspend = 1,
  5796. /* this dailink has playback support */
  5797. .ignore_pmdown_time = 1,
  5798. .codec_dai_name = "snd-soc-dummy-dai",
  5799. .codec_name = "snd-soc-dummy",
  5800. },
  5801. {/* hw:x,36 */
  5802. .name = "TX3_CDC_DMA Hostless",
  5803. .stream_name = "TX3_CDC_DMA Hostless",
  5804. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5805. .platform_name = "msm-pcm-hostless",
  5806. .dynamic = 1,
  5807. .dpcm_capture = 1,
  5808. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5809. SND_SOC_DPCM_TRIGGER_POST},
  5810. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5811. .ignore_suspend = 1,
  5812. .codec_dai_name = "snd-soc-dummy-dai",
  5813. .codec_name = "snd-soc-dummy",
  5814. },
  5815. };
  5816. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5817. {/* hw:x,37 */
  5818. .name = LPASS_BE_SLIMBUS_4_TX,
  5819. .stream_name = "Slimbus4 Capture",
  5820. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5821. .platform_name = "msm-pcm-hostless",
  5822. .codec_name = "tavil_codec",
  5823. .codec_dai_name = "tavil_vifeedback",
  5824. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5825. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5826. .ops = &msm_be_ops,
  5827. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5828. .ignore_suspend = 1,
  5829. },
  5830. /* Ultrasound RX DAI Link */
  5831. {/* hw:x,38 */
  5832. .name = "SLIMBUS_2 Hostless Playback",
  5833. .stream_name = "SLIMBUS_2 Hostless Playback",
  5834. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5835. .platform_name = "msm-pcm-hostless",
  5836. .codec_name = "tavil_codec",
  5837. .codec_dai_name = "tavil_rx2",
  5838. .ignore_suspend = 1,
  5839. .ignore_pmdown_time = 1,
  5840. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5841. .ops = &msm_slimbus_2_be_ops,
  5842. },
  5843. /* Ultrasound TX DAI Link */
  5844. {/* hw:x,39 */
  5845. .name = "SLIMBUS_2 Hostless Capture",
  5846. .stream_name = "SLIMBUS_2 Hostless Capture",
  5847. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5848. .platform_name = "msm-pcm-hostless",
  5849. .codec_name = "tavil_codec",
  5850. .codec_dai_name = "tavil_tx2",
  5851. .ignore_suspend = 1,
  5852. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5853. .ops = &msm_slimbus_2_be_ops,
  5854. },
  5855. };
  5856. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5857. {/* hw:x,37 */
  5858. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5859. .stream_name = "WSA CDC DMA0 Capture",
  5860. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5861. .platform_name = "msm-pcm-hostless",
  5862. .codec_name = "bolero_codec",
  5863. .codec_dai_name = "wsa_macro_vifeedback",
  5864. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5865. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5866. .ignore_suspend = 1,
  5867. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5868. .ops = &msm_cdc_dma_be_ops,
  5869. },
  5870. };
  5871. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5872. {
  5873. .name = MSM_DAILINK_NAME(ASM Loopback),
  5874. .stream_name = "MultiMedia6",
  5875. .cpu_dai_name = "MultiMedia6",
  5876. .platform_name = "msm-pcm-loopback",
  5877. .dynamic = 1,
  5878. .dpcm_playback = 1,
  5879. .dpcm_capture = 1,
  5880. .codec_dai_name = "snd-soc-dummy-dai",
  5881. .codec_name = "snd-soc-dummy",
  5882. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5883. SND_SOC_DPCM_TRIGGER_POST},
  5884. .ignore_suspend = 1,
  5885. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5886. .ignore_pmdown_time = 1,
  5887. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5888. },
  5889. {
  5890. .name = "USB Audio Hostless",
  5891. .stream_name = "USB Audio Hostless",
  5892. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5893. .platform_name = "msm-pcm-hostless",
  5894. .dynamic = 1,
  5895. .dpcm_playback = 1,
  5896. .dpcm_capture = 1,
  5897. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5898. SND_SOC_DPCM_TRIGGER_POST},
  5899. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5900. .ignore_suspend = 1,
  5901. .ignore_pmdown_time = 1,
  5902. .codec_dai_name = "snd-soc-dummy-dai",
  5903. .codec_name = "snd-soc-dummy",
  5904. },
  5905. };
  5906. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5907. /* Backend AFE DAI Links */
  5908. {
  5909. .name = LPASS_BE_AFE_PCM_RX,
  5910. .stream_name = "AFE Playback",
  5911. .cpu_dai_name = "msm-dai-q6-dev.224",
  5912. .platform_name = "msm-pcm-routing",
  5913. .codec_name = "msm-stub-codec.1",
  5914. .codec_dai_name = "msm-stub-rx",
  5915. .no_pcm = 1,
  5916. .dpcm_playback = 1,
  5917. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5918. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5919. /* this dainlink has playback support */
  5920. .ignore_pmdown_time = 1,
  5921. .ignore_suspend = 1,
  5922. },
  5923. {
  5924. .name = LPASS_BE_AFE_PCM_TX,
  5925. .stream_name = "AFE Capture",
  5926. .cpu_dai_name = "msm-dai-q6-dev.225",
  5927. .platform_name = "msm-pcm-routing",
  5928. .codec_name = "msm-stub-codec.1",
  5929. .codec_dai_name = "msm-stub-tx",
  5930. .no_pcm = 1,
  5931. .dpcm_capture = 1,
  5932. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5933. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5934. .ignore_suspend = 1,
  5935. },
  5936. /* Incall Record Uplink BACK END DAI Link */
  5937. {
  5938. .name = LPASS_BE_INCALL_RECORD_TX,
  5939. .stream_name = "Voice Uplink Capture",
  5940. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5941. .platform_name = "msm-pcm-routing",
  5942. .codec_name = "msm-stub-codec.1",
  5943. .codec_dai_name = "msm-stub-tx",
  5944. .no_pcm = 1,
  5945. .dpcm_capture = 1,
  5946. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5947. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5948. .ignore_suspend = 1,
  5949. },
  5950. /* Incall Record Downlink BACK END DAI Link */
  5951. {
  5952. .name = LPASS_BE_INCALL_RECORD_RX,
  5953. .stream_name = "Voice Downlink Capture",
  5954. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5955. .platform_name = "msm-pcm-routing",
  5956. .codec_name = "msm-stub-codec.1",
  5957. .codec_dai_name = "msm-stub-tx",
  5958. .no_pcm = 1,
  5959. .dpcm_capture = 1,
  5960. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5961. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5962. .ignore_suspend = 1,
  5963. },
  5964. /* Incall Music BACK END DAI Link */
  5965. {
  5966. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5967. .stream_name = "Voice Farend Playback",
  5968. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5969. .platform_name = "msm-pcm-routing",
  5970. .codec_name = "msm-stub-codec.1",
  5971. .codec_dai_name = "msm-stub-rx",
  5972. .no_pcm = 1,
  5973. .dpcm_playback = 1,
  5974. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5975. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5976. .ignore_suspend = 1,
  5977. .ignore_pmdown_time = 1,
  5978. },
  5979. /* Incall Music 2 BACK END DAI Link */
  5980. {
  5981. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5982. .stream_name = "Voice2 Farend Playback",
  5983. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5984. .platform_name = "msm-pcm-routing",
  5985. .codec_name = "msm-stub-codec.1",
  5986. .codec_dai_name = "msm-stub-rx",
  5987. .no_pcm = 1,
  5988. .dpcm_playback = 1,
  5989. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5990. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5991. .ignore_suspend = 1,
  5992. .ignore_pmdown_time = 1,
  5993. },
  5994. {
  5995. .name = LPASS_BE_USB_AUDIO_RX,
  5996. .stream_name = "USB Audio Playback",
  5997. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5998. .platform_name = "msm-pcm-routing",
  5999. .codec_name = "msm-stub-codec.1",
  6000. .codec_dai_name = "msm-stub-rx",
  6001. .no_pcm = 1,
  6002. .dpcm_playback = 1,
  6003. .id = MSM_BACKEND_DAI_USB_RX,
  6004. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6005. .ignore_pmdown_time = 1,
  6006. .ignore_suspend = 1,
  6007. },
  6008. {
  6009. .name = LPASS_BE_USB_AUDIO_TX,
  6010. .stream_name = "USB Audio Capture",
  6011. .cpu_dai_name = "msm-dai-q6-dev.28673",
  6012. .platform_name = "msm-pcm-routing",
  6013. .codec_name = "msm-stub-codec.1",
  6014. .codec_dai_name = "msm-stub-tx",
  6015. .no_pcm = 1,
  6016. .dpcm_capture = 1,
  6017. .id = MSM_BACKEND_DAI_USB_TX,
  6018. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6019. .ignore_suspend = 1,
  6020. },
  6021. {
  6022. .name = LPASS_BE_PRI_TDM_RX_0,
  6023. .stream_name = "Primary TDM0 Playback",
  6024. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  6025. .platform_name = "msm-pcm-routing",
  6026. .codec_name = "msm-stub-codec.1",
  6027. .codec_dai_name = "msm-stub-rx",
  6028. .no_pcm = 1,
  6029. .dpcm_playback = 1,
  6030. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  6031. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6032. .ops = &sm6150_tdm_be_ops,
  6033. .ignore_suspend = 1,
  6034. .ignore_pmdown_time = 1,
  6035. },
  6036. {
  6037. .name = LPASS_BE_PRI_TDM_TX_0,
  6038. .stream_name = "Primary TDM0 Capture",
  6039. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6040. .platform_name = "msm-pcm-routing",
  6041. .codec_name = "msm-stub-codec.1",
  6042. .codec_dai_name = "msm-stub-tx",
  6043. .no_pcm = 1,
  6044. .dpcm_capture = 1,
  6045. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6046. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6047. .ops = &sm6150_tdm_be_ops,
  6048. .ignore_suspend = 1,
  6049. },
  6050. {
  6051. .name = LPASS_BE_SEC_TDM_RX_0,
  6052. .stream_name = "Secondary TDM0 Playback",
  6053. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6054. .platform_name = "msm-pcm-routing",
  6055. .codec_name = "msm-stub-codec.1",
  6056. .codec_dai_name = "msm-stub-rx",
  6057. .no_pcm = 1,
  6058. .dpcm_playback = 1,
  6059. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6060. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6061. .ops = &sm6150_tdm_be_ops,
  6062. .ignore_suspend = 1,
  6063. .ignore_pmdown_time = 1,
  6064. },
  6065. {
  6066. .name = LPASS_BE_SEC_TDM_TX_0,
  6067. .stream_name = "Secondary TDM0 Capture",
  6068. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6069. .platform_name = "msm-pcm-routing",
  6070. .codec_name = "msm-stub-codec.1",
  6071. .codec_dai_name = "msm-stub-tx",
  6072. .no_pcm = 1,
  6073. .dpcm_capture = 1,
  6074. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6075. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6076. .ops = &sm6150_tdm_be_ops,
  6077. .ignore_suspend = 1,
  6078. },
  6079. {
  6080. .name = LPASS_BE_TERT_TDM_RX_0,
  6081. .stream_name = "Tertiary TDM0 Playback",
  6082. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6083. .platform_name = "msm-pcm-routing",
  6084. .codec_name = "msm-stub-codec.1",
  6085. .codec_dai_name = "msm-stub-rx",
  6086. .no_pcm = 1,
  6087. .dpcm_playback = 1,
  6088. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6089. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6090. .ops = &sm6150_tdm_be_ops,
  6091. .ignore_suspend = 1,
  6092. .ignore_pmdown_time = 1,
  6093. },
  6094. {
  6095. .name = LPASS_BE_TERT_TDM_TX_0,
  6096. .stream_name = "Tertiary TDM0 Capture",
  6097. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6098. .platform_name = "msm-pcm-routing",
  6099. .codec_name = "msm-stub-codec.1",
  6100. .codec_dai_name = "msm-stub-tx",
  6101. .no_pcm = 1,
  6102. .dpcm_capture = 1,
  6103. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6104. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6105. .ops = &sm6150_tdm_be_ops,
  6106. .ignore_suspend = 1,
  6107. },
  6108. {
  6109. .name = LPASS_BE_QUAT_TDM_RX_0,
  6110. .stream_name = "Quaternary TDM0 Playback",
  6111. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6112. .platform_name = "msm-pcm-routing",
  6113. .codec_name = "msm-stub-codec.1",
  6114. .codec_dai_name = "msm-stub-rx",
  6115. .no_pcm = 1,
  6116. .dpcm_playback = 1,
  6117. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6118. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6119. .ops = &sm6150_tdm_be_ops,
  6120. .ignore_suspend = 1,
  6121. .ignore_pmdown_time = 1,
  6122. },
  6123. {
  6124. .name = LPASS_BE_QUAT_TDM_TX_0,
  6125. .stream_name = "Quaternary TDM0 Capture",
  6126. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6127. .platform_name = "msm-pcm-routing",
  6128. .codec_name = "msm-stub-codec.1",
  6129. .codec_dai_name = "msm-stub-tx",
  6130. .no_pcm = 1,
  6131. .dpcm_capture = 1,
  6132. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6133. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6134. .ops = &sm6150_tdm_be_ops,
  6135. .ignore_suspend = 1,
  6136. },
  6137. };
  6138. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6139. {
  6140. .name = LPASS_BE_SLIMBUS_0_RX,
  6141. .stream_name = "Slimbus Playback",
  6142. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6143. .platform_name = "msm-pcm-routing",
  6144. .codec_name = "tavil_codec",
  6145. .codec_dai_name = "tavil_rx1",
  6146. .no_pcm = 1,
  6147. .dpcm_playback = 1,
  6148. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6149. .init = &msm_audrx_tavil_init,
  6150. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6151. /* this dainlink has playback support */
  6152. .ignore_pmdown_time = 1,
  6153. .ignore_suspend = 1,
  6154. .ops = &msm_be_ops,
  6155. },
  6156. {
  6157. .name = LPASS_BE_SLIMBUS_0_TX,
  6158. .stream_name = "Slimbus Capture",
  6159. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6160. .platform_name = "msm-pcm-routing",
  6161. .codec_name = "tavil_codec",
  6162. .codec_dai_name = "tavil_tx1",
  6163. .no_pcm = 1,
  6164. .dpcm_capture = 1,
  6165. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6166. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6167. .ignore_suspend = 1,
  6168. .ops = &msm_be_ops,
  6169. },
  6170. {
  6171. .name = LPASS_BE_SLIMBUS_1_RX,
  6172. .stream_name = "Slimbus1 Playback",
  6173. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6174. .platform_name = "msm-pcm-routing",
  6175. .codec_name = "tavil_codec",
  6176. .codec_dai_name = "tavil_rx1",
  6177. .no_pcm = 1,
  6178. .dpcm_playback = 1,
  6179. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6180. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6181. .ops = &msm_be_ops,
  6182. /* dai link has playback support */
  6183. .ignore_pmdown_time = 1,
  6184. .ignore_suspend = 1,
  6185. },
  6186. {
  6187. .name = LPASS_BE_SLIMBUS_1_TX,
  6188. .stream_name = "Slimbus1 Capture",
  6189. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6190. .platform_name = "msm-pcm-routing",
  6191. .codec_name = "tavil_codec",
  6192. .codec_dai_name = "tavil_tx3",
  6193. .no_pcm = 1,
  6194. .dpcm_capture = 1,
  6195. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6196. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6197. .ops = &msm_be_ops,
  6198. .ignore_suspend = 1,
  6199. },
  6200. {
  6201. .name = LPASS_BE_SLIMBUS_2_RX,
  6202. .stream_name = "Slimbus2 Playback",
  6203. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6204. .platform_name = "msm-pcm-routing",
  6205. .codec_name = "tavil_codec",
  6206. .codec_dai_name = "tavil_rx2",
  6207. .no_pcm = 1,
  6208. .dpcm_playback = 1,
  6209. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6210. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6211. .ops = &msm_be_ops,
  6212. .ignore_pmdown_time = 1,
  6213. .ignore_suspend = 1,
  6214. },
  6215. {
  6216. .name = LPASS_BE_SLIMBUS_3_RX,
  6217. .stream_name = "Slimbus3 Playback",
  6218. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6219. .platform_name = "msm-pcm-routing",
  6220. .codec_name = "tavil_codec",
  6221. .codec_dai_name = "tavil_rx1",
  6222. .no_pcm = 1,
  6223. .dpcm_playback = 1,
  6224. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6225. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6226. .ops = &msm_be_ops,
  6227. /* dai link has playback support */
  6228. .ignore_pmdown_time = 1,
  6229. .ignore_suspend = 1,
  6230. },
  6231. {
  6232. .name = LPASS_BE_SLIMBUS_3_TX,
  6233. .stream_name = "Slimbus3 Capture",
  6234. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6235. .platform_name = "msm-pcm-routing",
  6236. .codec_name = "tavil_codec",
  6237. .codec_dai_name = "tavil_tx1",
  6238. .no_pcm = 1,
  6239. .dpcm_capture = 1,
  6240. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6241. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6242. .ops = &msm_be_ops,
  6243. .ignore_suspend = 1,
  6244. },
  6245. {
  6246. .name = LPASS_BE_SLIMBUS_4_RX,
  6247. .stream_name = "Slimbus4 Playback",
  6248. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6249. .platform_name = "msm-pcm-routing",
  6250. .codec_name = "tavil_codec",
  6251. .codec_dai_name = "tavil_rx1",
  6252. .no_pcm = 1,
  6253. .dpcm_playback = 1,
  6254. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6255. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6256. .ops = &msm_be_ops,
  6257. /* dai link has playback support */
  6258. .ignore_pmdown_time = 1,
  6259. .ignore_suspend = 1,
  6260. },
  6261. {
  6262. .name = LPASS_BE_SLIMBUS_5_RX,
  6263. .stream_name = "Slimbus5 Playback",
  6264. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6265. .platform_name = "msm-pcm-routing",
  6266. .codec_name = "tavil_codec",
  6267. .codec_dai_name = "tavil_rx3",
  6268. .no_pcm = 1,
  6269. .dpcm_playback = 1,
  6270. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6271. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6272. .ops = &msm_be_ops,
  6273. /* dai link has playback support */
  6274. .ignore_pmdown_time = 1,
  6275. .ignore_suspend = 1,
  6276. },
  6277. /* MAD BE */
  6278. {
  6279. .name = LPASS_BE_SLIMBUS_5_TX,
  6280. .stream_name = "Slimbus5 Capture",
  6281. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6282. .platform_name = "msm-pcm-routing",
  6283. .codec_name = "tavil_codec",
  6284. .codec_dai_name = "tavil_mad1",
  6285. .no_pcm = 1,
  6286. .dpcm_capture = 1,
  6287. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6288. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6289. .ops = &msm_be_ops,
  6290. .ignore_suspend = 1,
  6291. },
  6292. {
  6293. .name = LPASS_BE_SLIMBUS_6_RX,
  6294. .stream_name = "Slimbus6 Playback",
  6295. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6296. .platform_name = "msm-pcm-routing",
  6297. .codec_name = "tavil_codec",
  6298. .codec_dai_name = "tavil_rx4",
  6299. .no_pcm = 1,
  6300. .dpcm_playback = 1,
  6301. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6302. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6303. .ops = &msm_be_ops,
  6304. /* dai link has playback support */
  6305. .ignore_pmdown_time = 1,
  6306. .ignore_suspend = 1,
  6307. },
  6308. /* Slimbus VI Recording */
  6309. {
  6310. .name = LPASS_BE_SLIMBUS_TX_VI,
  6311. .stream_name = "Slimbus4 Capture",
  6312. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6313. .platform_name = "msm-pcm-routing",
  6314. .codec_name = "tavil_codec",
  6315. .codec_dai_name = "tavil_vifeedback",
  6316. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6317. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6318. .ops = &msm_be_ops,
  6319. .ignore_suspend = 1,
  6320. .no_pcm = 1,
  6321. .dpcm_capture = 1,
  6322. },
  6323. };
  6324. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6325. {
  6326. .name = LPASS_BE_SLIMBUS_7_RX,
  6327. .stream_name = "Slimbus7 Playback",
  6328. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6329. .platform_name = "msm-pcm-routing",
  6330. .codec_name = "btfmslim_slave",
  6331. /* BT codec driver determines capabilities based on
  6332. * dai name, bt codecdai name should always contains
  6333. * supported usecase information
  6334. */
  6335. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6336. .no_pcm = 1,
  6337. .dpcm_playback = 1,
  6338. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6339. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6340. .ops = &msm_wcn_ops,
  6341. /* dai link has playback support */
  6342. .ignore_pmdown_time = 1,
  6343. .ignore_suspend = 1,
  6344. },
  6345. {
  6346. .name = LPASS_BE_SLIMBUS_7_TX,
  6347. .stream_name = "Slimbus7 Capture",
  6348. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6349. .platform_name = "msm-pcm-routing",
  6350. .codec_name = "btfmslim_slave",
  6351. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6352. .no_pcm = 1,
  6353. .dpcm_capture = 1,
  6354. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6355. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6356. .ops = &msm_wcn_ops,
  6357. .ignore_suspend = 1,
  6358. },
  6359. {
  6360. .name = LPASS_BE_SLIMBUS_8_TX,
  6361. .stream_name = "Slimbus8 Capture",
  6362. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6363. .platform_name = "msm-pcm-routing",
  6364. .codec_name = "btfmslim_slave",
  6365. .codec_dai_name = "btfm_fm_slim_tx",
  6366. .no_pcm = 1,
  6367. .dpcm_capture = 1,
  6368. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6369. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6370. .init = &msm_wcn_init,
  6371. .ops = &msm_wcn_ops,
  6372. .ignore_suspend = 1,
  6373. },
  6374. };
  6375. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6376. /* DISP PORT BACK END DAI Link */
  6377. {
  6378. .name = LPASS_BE_DISPLAY_PORT,
  6379. .stream_name = "Display Port Playback",
  6380. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6381. .platform_name = "msm-pcm-routing",
  6382. .codec_name = "msm-ext-disp-audio-codec-rx",
  6383. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6384. .no_pcm = 1,
  6385. .dpcm_playback = 1,
  6386. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6387. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6388. .ignore_pmdown_time = 1,
  6389. .ignore_suspend = 1,
  6390. },
  6391. };
  6392. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6393. {
  6394. .name = LPASS_BE_PRI_MI2S_RX,
  6395. .stream_name = "Primary MI2S Playback",
  6396. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6397. .platform_name = "msm-pcm-routing",
  6398. .codec_name = "msm-stub-codec.1",
  6399. .codec_dai_name = "msm-stub-rx",
  6400. .no_pcm = 1,
  6401. .dpcm_playback = 1,
  6402. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6403. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6404. .ops = &msm_mi2s_be_ops,
  6405. .ignore_suspend = 1,
  6406. .ignore_pmdown_time = 1,
  6407. },
  6408. {
  6409. .name = LPASS_BE_PRI_MI2S_TX,
  6410. .stream_name = "Primary MI2S Capture",
  6411. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6412. .platform_name = "msm-pcm-routing",
  6413. .codec_name = "msm-stub-codec.1",
  6414. .codec_dai_name = "msm-stub-tx",
  6415. .no_pcm = 1,
  6416. .dpcm_capture = 1,
  6417. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6418. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6419. .ops = &msm_mi2s_be_ops,
  6420. .ignore_suspend = 1,
  6421. },
  6422. {
  6423. .name = LPASS_BE_SEC_MI2S_RX,
  6424. .stream_name = "Secondary MI2S Playback",
  6425. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6426. .platform_name = "msm-pcm-routing",
  6427. .codec_name = "msm-stub-codec.1",
  6428. .codec_dai_name = "msm-stub-rx",
  6429. .no_pcm = 1,
  6430. .dpcm_playback = 1,
  6431. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6432. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6433. .ops = &msm_mi2s_be_ops,
  6434. .ignore_suspend = 1,
  6435. .ignore_pmdown_time = 1,
  6436. },
  6437. {
  6438. .name = LPASS_BE_SEC_MI2S_TX,
  6439. .stream_name = "Secondary MI2S Capture",
  6440. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6441. .platform_name = "msm-pcm-routing",
  6442. .codec_name = "msm-stub-codec.1",
  6443. .codec_dai_name = "msm-stub-tx",
  6444. .no_pcm = 1,
  6445. .dpcm_capture = 1,
  6446. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6447. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6448. .ops = &msm_mi2s_be_ops,
  6449. .ignore_suspend = 1,
  6450. },
  6451. {
  6452. .name = LPASS_BE_TERT_MI2S_RX,
  6453. .stream_name = "Tertiary MI2S Playback",
  6454. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6455. .platform_name = "msm-pcm-routing",
  6456. .codec_name = "msm-stub-codec.1",
  6457. .codec_dai_name = "msm-stub-rx",
  6458. .no_pcm = 1,
  6459. .dpcm_playback = 1,
  6460. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6461. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6462. .ops = &msm_mi2s_be_ops,
  6463. .ignore_suspend = 1,
  6464. .ignore_pmdown_time = 1,
  6465. },
  6466. {
  6467. .name = LPASS_BE_TERT_MI2S_TX,
  6468. .stream_name = "Tertiary MI2S Capture",
  6469. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6470. .platform_name = "msm-pcm-routing",
  6471. .codec_name = "msm-stub-codec.1",
  6472. .codec_dai_name = "msm-stub-tx",
  6473. .no_pcm = 1,
  6474. .dpcm_capture = 1,
  6475. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6476. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6477. .ops = &msm_mi2s_be_ops,
  6478. .ignore_suspend = 1,
  6479. },
  6480. {
  6481. .name = LPASS_BE_QUAT_MI2S_RX,
  6482. .stream_name = "Quaternary MI2S Playback",
  6483. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6484. .platform_name = "msm-pcm-routing",
  6485. .codec_name = "msm-stub-codec.1",
  6486. .codec_dai_name = "msm-stub-rx",
  6487. .no_pcm = 1,
  6488. .dpcm_playback = 1,
  6489. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6490. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6491. .ops = &msm_mi2s_be_ops,
  6492. .ignore_suspend = 1,
  6493. .ignore_pmdown_time = 1,
  6494. },
  6495. {
  6496. .name = LPASS_BE_QUAT_MI2S_TX,
  6497. .stream_name = "Quaternary MI2S Capture",
  6498. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6499. .platform_name = "msm-pcm-routing",
  6500. .codec_name = "msm-stub-codec.1",
  6501. .codec_dai_name = "msm-stub-tx",
  6502. .no_pcm = 1,
  6503. .dpcm_capture = 1,
  6504. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6505. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6506. .ops = &msm_mi2s_be_ops,
  6507. .ignore_suspend = 1,
  6508. },
  6509. {
  6510. .name = LPASS_BE_QUIN_MI2S_RX,
  6511. .stream_name = "Quinary MI2S Playback",
  6512. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6513. .platform_name = "msm-pcm-routing",
  6514. .codec_name = "msm-stub-codec.1",
  6515. .codec_dai_name = "msm-stub-rx",
  6516. .no_pcm = 1,
  6517. .dpcm_playback = 1,
  6518. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6519. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6520. .ops = &msm_mi2s_be_ops,
  6521. .ignore_suspend = 1,
  6522. .ignore_pmdown_time = 1,
  6523. },
  6524. {
  6525. .name = LPASS_BE_QUIN_MI2S_TX,
  6526. .stream_name = "Quinary MI2S Capture",
  6527. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6528. .platform_name = "msm-pcm-routing",
  6529. .codec_name = "msm-stub-codec.1",
  6530. .codec_dai_name = "msm-stub-tx",
  6531. .no_pcm = 1,
  6532. .dpcm_capture = 1,
  6533. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6534. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6535. .ops = &msm_mi2s_be_ops,
  6536. .ignore_suspend = 1,
  6537. },
  6538. };
  6539. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6540. /* Primary AUX PCM Backend DAI Links */
  6541. {
  6542. .name = LPASS_BE_AUXPCM_RX,
  6543. .stream_name = "AUX PCM Playback",
  6544. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6545. .platform_name = "msm-pcm-routing",
  6546. .codec_name = "msm-stub-codec.1",
  6547. .codec_dai_name = "msm-stub-rx",
  6548. .no_pcm = 1,
  6549. .dpcm_playback = 1,
  6550. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6551. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6552. .ignore_pmdown_time = 1,
  6553. .ignore_suspend = 1,
  6554. },
  6555. {
  6556. .name = LPASS_BE_AUXPCM_TX,
  6557. .stream_name = "AUX PCM Capture",
  6558. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6559. .platform_name = "msm-pcm-routing",
  6560. .codec_name = "msm-stub-codec.1",
  6561. .codec_dai_name = "msm-stub-tx",
  6562. .no_pcm = 1,
  6563. .dpcm_capture = 1,
  6564. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6565. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6566. .ignore_suspend = 1,
  6567. },
  6568. /* Secondary AUX PCM Backend DAI Links */
  6569. {
  6570. .name = LPASS_BE_SEC_AUXPCM_RX,
  6571. .stream_name = "Sec AUX PCM Playback",
  6572. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6573. .platform_name = "msm-pcm-routing",
  6574. .codec_name = "msm-stub-codec.1",
  6575. .codec_dai_name = "msm-stub-rx",
  6576. .no_pcm = 1,
  6577. .dpcm_playback = 1,
  6578. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6579. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6580. .ignore_pmdown_time = 1,
  6581. .ignore_suspend = 1,
  6582. },
  6583. {
  6584. .name = LPASS_BE_SEC_AUXPCM_TX,
  6585. .stream_name = "Sec AUX PCM Capture",
  6586. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6587. .platform_name = "msm-pcm-routing",
  6588. .codec_name = "msm-stub-codec.1",
  6589. .codec_dai_name = "msm-stub-tx",
  6590. .no_pcm = 1,
  6591. .dpcm_capture = 1,
  6592. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6593. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6594. .ignore_suspend = 1,
  6595. },
  6596. /* Tertiary AUX PCM Backend DAI Links */
  6597. {
  6598. .name = LPASS_BE_TERT_AUXPCM_RX,
  6599. .stream_name = "Tert AUX PCM Playback",
  6600. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6601. .platform_name = "msm-pcm-routing",
  6602. .codec_name = "msm-stub-codec.1",
  6603. .codec_dai_name = "msm-stub-rx",
  6604. .no_pcm = 1,
  6605. .dpcm_playback = 1,
  6606. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6607. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6608. .ignore_suspend = 1,
  6609. },
  6610. {
  6611. .name = LPASS_BE_TERT_AUXPCM_TX,
  6612. .stream_name = "Tert AUX PCM Capture",
  6613. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6614. .platform_name = "msm-pcm-routing",
  6615. .codec_name = "msm-stub-codec.1",
  6616. .codec_dai_name = "msm-stub-tx",
  6617. .no_pcm = 1,
  6618. .dpcm_capture = 1,
  6619. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6620. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6621. .ignore_suspend = 1,
  6622. },
  6623. /* Quaternary AUX PCM Backend DAI Links */
  6624. {
  6625. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6626. .stream_name = "Quat AUX PCM Playback",
  6627. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6628. .platform_name = "msm-pcm-routing",
  6629. .codec_name = "msm-stub-codec.1",
  6630. .codec_dai_name = "msm-stub-rx",
  6631. .no_pcm = 1,
  6632. .dpcm_playback = 1,
  6633. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6634. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6635. .ignore_pmdown_time = 1,
  6636. .ignore_suspend = 1,
  6637. },
  6638. {
  6639. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6640. .stream_name = "Quat AUX PCM Capture",
  6641. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6642. .platform_name = "msm-pcm-routing",
  6643. .codec_name = "msm-stub-codec.1",
  6644. .codec_dai_name = "msm-stub-tx",
  6645. .no_pcm = 1,
  6646. .dpcm_capture = 1,
  6647. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6648. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6649. .ignore_suspend = 1,
  6650. },
  6651. /* Quinary AUX PCM Backend DAI Links */
  6652. {
  6653. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6654. .stream_name = "Quin AUX PCM Playback",
  6655. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6656. .platform_name = "msm-pcm-routing",
  6657. .codec_name = "msm-stub-codec.1",
  6658. .codec_dai_name = "msm-stub-rx",
  6659. .no_pcm = 1,
  6660. .dpcm_playback = 1,
  6661. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6662. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6663. .ignore_pmdown_time = 1,
  6664. .ignore_suspend = 1,
  6665. },
  6666. {
  6667. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6668. .stream_name = "Quin AUX PCM Capture",
  6669. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6670. .platform_name = "msm-pcm-routing",
  6671. .codec_name = "msm-stub-codec.1",
  6672. .codec_dai_name = "msm-stub-tx",
  6673. .no_pcm = 1,
  6674. .dpcm_capture = 1,
  6675. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6676. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6677. .ignore_suspend = 1,
  6678. },
  6679. };
  6680. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6681. /* WSA CDC DMA Backend DAI Links */
  6682. {
  6683. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6684. .stream_name = "WSA CDC DMA0 Playback",
  6685. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6686. .platform_name = "msm-pcm-routing",
  6687. .codec_name = "bolero_codec",
  6688. .codec_dai_name = "wsa_macro_rx1",
  6689. .no_pcm = 1,
  6690. .dpcm_playback = 1,
  6691. .init = &msm_int_audrx_init,
  6692. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6693. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6694. .ignore_pmdown_time = 1,
  6695. .ignore_suspend = 1,
  6696. .ops = &msm_cdc_dma_be_ops,
  6697. },
  6698. {
  6699. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6700. .stream_name = "WSA CDC DMA1 Playback",
  6701. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6702. .platform_name = "msm-pcm-routing",
  6703. .codec_name = "bolero_codec",
  6704. .codec_dai_name = "wsa_macro_rx_mix",
  6705. .no_pcm = 1,
  6706. .dpcm_playback = 1,
  6707. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6708. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6709. .ignore_pmdown_time = 1,
  6710. .ignore_suspend = 1,
  6711. .ops = &msm_cdc_dma_be_ops,
  6712. },
  6713. {
  6714. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6715. .stream_name = "WSA CDC DMA1 Capture",
  6716. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6717. .platform_name = "msm-pcm-routing",
  6718. .codec_name = "bolero_codec",
  6719. .codec_dai_name = "wsa_macro_echo",
  6720. .no_pcm = 1,
  6721. .dpcm_capture = 1,
  6722. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6723. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6724. .ignore_suspend = 1,
  6725. .ops = &msm_cdc_dma_be_ops,
  6726. },
  6727. };
  6728. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6729. /* RX CDC DMA Backend DAI Links */
  6730. {
  6731. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6732. .stream_name = "RX CDC DMA0 Playback",
  6733. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6734. .platform_name = "msm-pcm-routing",
  6735. .codec_name = "bolero_codec",
  6736. .codec_dai_name = "rx_macro_rx1",
  6737. .no_pcm = 1,
  6738. .dpcm_playback = 1,
  6739. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6740. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6741. .ignore_pmdown_time = 1,
  6742. .ignore_suspend = 1,
  6743. .ops = &msm_cdc_dma_be_ops,
  6744. },
  6745. {
  6746. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6747. .stream_name = "RX CDC DMA1 Playback",
  6748. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6749. .platform_name = "msm-pcm-routing",
  6750. .codec_name = "bolero_codec",
  6751. .codec_dai_name = "rx_macro_rx2",
  6752. .no_pcm = 1,
  6753. .dpcm_playback = 1,
  6754. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6755. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6756. .ignore_pmdown_time = 1,
  6757. .ignore_suspend = 1,
  6758. .ops = &msm_cdc_dma_be_ops,
  6759. },
  6760. {
  6761. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6762. .stream_name = "RX CDC DMA2 Playback",
  6763. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6764. .platform_name = "msm-pcm-routing",
  6765. .codec_name = "bolero_codec",
  6766. .codec_dai_name = "rx_macro_rx3",
  6767. .no_pcm = 1,
  6768. .dpcm_playback = 1,
  6769. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6770. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6771. .ignore_pmdown_time = 1,
  6772. .ignore_suspend = 1,
  6773. .ops = &msm_cdc_dma_be_ops,
  6774. },
  6775. {
  6776. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6777. .stream_name = "RX CDC DMA3 Playback",
  6778. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6779. .platform_name = "msm-pcm-routing",
  6780. .codec_name = "bolero_codec",
  6781. .codec_dai_name = "rx_macro_rx4",
  6782. .no_pcm = 1,
  6783. .dpcm_playback = 1,
  6784. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6785. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6786. .ignore_pmdown_time = 1,
  6787. .ignore_suspend = 1,
  6788. .ops = &msm_cdc_dma_be_ops,
  6789. },
  6790. /* TX CDC DMA Backend DAI Links */
  6791. {
  6792. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6793. .stream_name = "TX CDC DMA3 Capture",
  6794. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6795. .platform_name = "msm-pcm-routing",
  6796. .codec_name = "bolero_codec",
  6797. .codec_dai_name = "tx_macro_tx1",
  6798. .no_pcm = 1,
  6799. .dpcm_capture = 1,
  6800. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6801. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6802. .ignore_suspend = 1,
  6803. .ops = &msm_cdc_dma_be_ops,
  6804. },
  6805. {
  6806. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6807. .stream_name = "TX CDC DMA4 Capture",
  6808. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6809. .platform_name = "msm-pcm-routing",
  6810. .codec_name = "bolero_codec",
  6811. .codec_dai_name = "tx_macro_tx2",
  6812. .no_pcm = 1,
  6813. .dpcm_capture = 1,
  6814. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6815. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6816. .ignore_suspend = 1,
  6817. .ops = &msm_cdc_dma_be_ops,
  6818. },
  6819. };
  6820. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6821. ARRAY_SIZE(msm_common_dai_links) +
  6822. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6823. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6824. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6825. ARRAY_SIZE(msm_common_be_dai_links) +
  6826. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6827. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6828. ARRAY_SIZE(ext_disp_be_dai_link) +
  6829. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6830. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6831. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6832. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6833. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6834. {
  6835. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6836. struct snd_soc_pcm_runtime *rtd;
  6837. struct snd_soc_component *component;
  6838. int ret = 0;
  6839. void *mbhc_calibration;
  6840. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6841. if (!rtd) {
  6842. dev_err(card->dev,
  6843. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6844. __func__, be_dl_name);
  6845. ret = -EINVAL;
  6846. goto err_pcm_runtime;
  6847. }
  6848. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  6849. if (!component) {
  6850. pr_err("%s: component is NULL\n", __func__);
  6851. ret = -EINVAL;
  6852. goto err_pcm_runtime;
  6853. }
  6854. mbhc_calibration = def_wcd_mbhc_cal();
  6855. if (!mbhc_calibration) {
  6856. ret = -ENOMEM;
  6857. goto err_mbhc_cal;
  6858. }
  6859. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6860. ret = tavil_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  6861. if (ret) {
  6862. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6863. __func__, ret);
  6864. goto err_hs_detect;
  6865. }
  6866. return 0;
  6867. err_hs_detect:
  6868. kfree(mbhc_calibration);
  6869. err_mbhc_cal:
  6870. err_pcm_runtime:
  6871. return ret;
  6872. }
  6873. static int msm_populate_dai_link_component_of_node(
  6874. struct snd_soc_card *card)
  6875. {
  6876. int i, index, ret = 0;
  6877. struct device *cdev = card->dev;
  6878. struct snd_soc_dai_link *dai_link = card->dai_link;
  6879. struct device_node *np;
  6880. if (!cdev) {
  6881. pr_err("%s: Sound card device memory NULL\n", __func__);
  6882. return -ENODEV;
  6883. }
  6884. for (i = 0; i < card->num_links; i++) {
  6885. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6886. continue;
  6887. /* populate platform_of_node for snd card dai links */
  6888. if (dai_link[i].platform_name &&
  6889. !dai_link[i].platform_of_node) {
  6890. index = of_property_match_string(cdev->of_node,
  6891. "asoc-platform-names",
  6892. dai_link[i].platform_name);
  6893. if (index < 0) {
  6894. pr_err("%s: No match found for platform name: %s\n",
  6895. __func__, dai_link[i].platform_name);
  6896. ret = index;
  6897. goto err;
  6898. }
  6899. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6900. index);
  6901. if (!np) {
  6902. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6903. __func__, dai_link[i].platform_name,
  6904. index);
  6905. ret = -ENODEV;
  6906. goto err;
  6907. }
  6908. dai_link[i].platform_of_node = np;
  6909. dai_link[i].platform_name = NULL;
  6910. }
  6911. /* populate cpu_of_node for snd card dai links */
  6912. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6913. index = of_property_match_string(cdev->of_node,
  6914. "asoc-cpu-names",
  6915. dai_link[i].cpu_dai_name);
  6916. if (index >= 0) {
  6917. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6918. index);
  6919. if (!np) {
  6920. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6921. __func__,
  6922. dai_link[i].cpu_dai_name);
  6923. ret = -ENODEV;
  6924. goto err;
  6925. }
  6926. dai_link[i].cpu_of_node = np;
  6927. dai_link[i].cpu_dai_name = NULL;
  6928. }
  6929. }
  6930. /* populate codec_of_node for snd card dai links */
  6931. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6932. index = of_property_match_string(cdev->of_node,
  6933. "asoc-codec-names",
  6934. dai_link[i].codec_name);
  6935. if (index < 0)
  6936. continue;
  6937. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6938. index);
  6939. if (!np) {
  6940. pr_err("%s: retrieving phandle for codec %s failed\n",
  6941. __func__, dai_link[i].codec_name);
  6942. ret = -ENODEV;
  6943. goto err;
  6944. }
  6945. dai_link[i].codec_of_node = np;
  6946. dai_link[i].codec_name = NULL;
  6947. }
  6948. }
  6949. err:
  6950. return ret;
  6951. }
  6952. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6953. {
  6954. int ret = 0;
  6955. struct snd_soc_component *component =
  6956. snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  6957. ret = snd_soc_add_component_controls(component, msm_tavil_snd_controls,
  6958. ARRAY_SIZE(msm_tavil_snd_controls));
  6959. if (ret < 0) {
  6960. dev_err(component->dev,
  6961. "%s: add_codec_controls failed, err = %d\n",
  6962. __func__, ret);
  6963. return ret;
  6964. }
  6965. return 0;
  6966. }
  6967. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6968. struct snd_pcm_hw_params *params)
  6969. {
  6970. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6971. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6972. int ret = 0;
  6973. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6974. 151};
  6975. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6976. 134, 135, 136, 137, 138, 139,
  6977. 140, 141, 142, 143};
  6978. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6979. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6980. slim_rx_cfg[SLIM_RX_0].channels,
  6981. rx_ch);
  6982. if (ret < 0)
  6983. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6984. __func__, ret);
  6985. } else {
  6986. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6987. slim_tx_cfg[SLIM_TX_0].channels,
  6988. tx_ch, 0, 0);
  6989. if (ret < 0)
  6990. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6991. __func__, ret);
  6992. }
  6993. return ret;
  6994. }
  6995. static struct snd_soc_ops msm_stub_be_ops = {
  6996. .hw_params = msm_snd_stub_hw_params,
  6997. };
  6998. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6999. /* FrontEnd DAI Links */
  7000. {
  7001. .name = "MSMSTUB Media1",
  7002. .stream_name = "MultiMedia1",
  7003. .cpu_dai_name = "MultiMedia1",
  7004. .platform_name = "msm-pcm-dsp.0",
  7005. .dynamic = 1,
  7006. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  7007. .dpcm_playback = 1,
  7008. .dpcm_capture = 1,
  7009. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  7010. SND_SOC_DPCM_TRIGGER_POST},
  7011. .codec_dai_name = "snd-soc-dummy-dai",
  7012. .codec_name = "snd-soc-dummy",
  7013. .ignore_suspend = 1,
  7014. /* this dainlink has playback support */
  7015. .ignore_pmdown_time = 1,
  7016. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  7017. },
  7018. };
  7019. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  7020. /* Backend DAI Links */
  7021. {
  7022. .name = LPASS_BE_SLIMBUS_0_RX,
  7023. .stream_name = "Slimbus Playback",
  7024. .cpu_dai_name = "msm-dai-q6-dev.16384",
  7025. .platform_name = "msm-pcm-routing",
  7026. .codec_name = "msm-stub-codec.1",
  7027. .codec_dai_name = "msm-stub-rx",
  7028. .no_pcm = 1,
  7029. .dpcm_playback = 1,
  7030. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  7031. .init = &msm_audrx_stub_init,
  7032. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7033. .ignore_pmdown_time = 1, /* dai link has playback support */
  7034. .ignore_suspend = 1,
  7035. .ops = &msm_stub_be_ops,
  7036. },
  7037. {
  7038. .name = LPASS_BE_SLIMBUS_0_TX,
  7039. .stream_name = "Slimbus Capture",
  7040. .cpu_dai_name = "msm-dai-q6-dev.16385",
  7041. .platform_name = "msm-pcm-routing",
  7042. .codec_name = "msm-stub-codec.1",
  7043. .codec_dai_name = "msm-stub-tx",
  7044. .no_pcm = 1,
  7045. .dpcm_capture = 1,
  7046. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7047. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7048. .ignore_suspend = 1,
  7049. .ops = &msm_stub_be_ops,
  7050. },
  7051. };
  7052. static struct snd_soc_dai_link msm_stub_dai_links[
  7053. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7054. ARRAY_SIZE(msm_stub_be_dai_links)];
  7055. struct snd_soc_card snd_soc_card_stub_msm = {
  7056. .name = "sm6150-stub-snd-card",
  7057. };
  7058. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7059. { .compatible = "qcom,sm6150-asoc-snd",
  7060. .data = "codec"},
  7061. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7062. .data = "stub_codec"},
  7063. {},
  7064. };
  7065. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7066. {
  7067. struct snd_soc_card *card = NULL;
  7068. struct snd_soc_dai_link *dailink;
  7069. int total_links = 0, rc = 0;
  7070. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7071. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7072. u32 wcn_btfm_intf = 0;
  7073. const struct of_device_id *match;
  7074. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7075. if (!match) {
  7076. dev_err(dev, "%s: No DT match found for sound card\n",
  7077. __func__);
  7078. return NULL;
  7079. }
  7080. if (!strcmp(match->data, "codec")) {
  7081. card = &snd_soc_card_sm6150_msm;
  7082. memcpy(msm_sm6150_dai_links + total_links,
  7083. msm_common_dai_links,
  7084. sizeof(msm_common_dai_links));
  7085. total_links += ARRAY_SIZE(msm_common_dai_links);
  7086. memcpy(msm_sm6150_dai_links + total_links,
  7087. msm_common_misc_fe_dai_links,
  7088. sizeof(msm_common_misc_fe_dai_links));
  7089. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7090. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7091. &tavil_codec);
  7092. if (rc) {
  7093. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7094. __func__);
  7095. } else {
  7096. if (tavil_codec) {
  7097. card->late_probe =
  7098. msm_snd_card_tavil_late_probe;
  7099. memcpy(msm_sm6150_dai_links + total_links,
  7100. msm_tavil_fe_dai_links,
  7101. sizeof(msm_tavil_fe_dai_links));
  7102. total_links +=
  7103. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7104. }
  7105. }
  7106. if (!tavil_codec) {
  7107. memcpy(msm_sm6150_dai_links + total_links,
  7108. msm_bolero_fe_dai_links,
  7109. sizeof(msm_bolero_fe_dai_links));
  7110. total_links +=
  7111. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7112. }
  7113. memcpy(msm_sm6150_dai_links + total_links,
  7114. msm_common_be_dai_links,
  7115. sizeof(msm_common_be_dai_links));
  7116. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7117. if (tavil_codec) {
  7118. memcpy(msm_sm6150_dai_links + total_links,
  7119. msm_tavil_be_dai_links,
  7120. sizeof(msm_tavil_be_dai_links));
  7121. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7122. } else {
  7123. memcpy(msm_sm6150_dai_links + total_links,
  7124. msm_wsa_cdc_dma_be_dai_links,
  7125. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7126. total_links +=
  7127. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7128. memcpy(msm_sm6150_dai_links + total_links,
  7129. msm_rx_tx_cdc_dma_be_dai_links,
  7130. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7131. total_links +=
  7132. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7133. }
  7134. rc = of_property_read_u32(dev->of_node,
  7135. "qcom,ext-disp-audio-rx",
  7136. &ext_disp_audio_intf);
  7137. if (rc) {
  7138. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7139. __func__);
  7140. } else {
  7141. if (ext_disp_audio_intf) {
  7142. memcpy(msm_sm6150_dai_links + total_links,
  7143. ext_disp_be_dai_link,
  7144. sizeof(ext_disp_be_dai_link));
  7145. total_links +=
  7146. ARRAY_SIZE(ext_disp_be_dai_link);
  7147. }
  7148. }
  7149. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7150. &mi2s_audio_intf);
  7151. if (rc) {
  7152. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7153. __func__);
  7154. } else {
  7155. if (mi2s_audio_intf) {
  7156. memcpy(msm_sm6150_dai_links + total_links,
  7157. msm_mi2s_be_dai_links,
  7158. sizeof(msm_mi2s_be_dai_links));
  7159. total_links +=
  7160. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7161. }
  7162. }
  7163. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7164. &wcn_btfm_intf);
  7165. if (rc) {
  7166. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7167. __func__);
  7168. } else {
  7169. if (wcn_btfm_intf) {
  7170. memcpy(msm_sm6150_dai_links + total_links,
  7171. msm_wcn_be_dai_links,
  7172. sizeof(msm_wcn_be_dai_links));
  7173. total_links +=
  7174. ARRAY_SIZE(msm_wcn_be_dai_links);
  7175. }
  7176. }
  7177. rc = of_property_read_u32(dev->of_node,
  7178. "qcom,auxpcm-audio-intf",
  7179. &auxpcm_audio_intf);
  7180. if (rc) {
  7181. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7182. __func__);
  7183. } else {
  7184. if (auxpcm_audio_intf) {
  7185. memcpy(msm_sm6150_dai_links + total_links,
  7186. msm_auxpcm_be_dai_links,
  7187. sizeof(msm_auxpcm_be_dai_links));
  7188. total_links +=
  7189. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7190. }
  7191. }
  7192. dailink = msm_sm6150_dai_links;
  7193. } else if (!strcmp(match->data, "stub_codec")) {
  7194. card = &snd_soc_card_stub_msm;
  7195. memcpy(msm_stub_dai_links + total_links,
  7196. msm_stub_fe_dai_links,
  7197. sizeof(msm_stub_fe_dai_links));
  7198. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7199. memcpy(msm_stub_dai_links + total_links,
  7200. msm_stub_be_dai_links,
  7201. sizeof(msm_stub_be_dai_links));
  7202. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7203. dailink = msm_stub_dai_links;
  7204. }
  7205. if (card) {
  7206. card->dai_link = dailink;
  7207. card->num_links = total_links;
  7208. }
  7209. return card;
  7210. }
  7211. static int msm_wsa881x_init(struct snd_soc_component *component)
  7212. {
  7213. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7214. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7215. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7216. SPKR_L_BOOST, SPKR_L_VI};
  7217. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7218. SPKR_R_BOOST, SPKR_R_VI};
  7219. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7220. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7221. struct msm_asoc_mach_data *pdata;
  7222. struct snd_soc_dapm_context *dapm;
  7223. struct snd_card *card = component->card->snd_card;
  7224. struct snd_info_entry *entry;
  7225. int ret = 0;
  7226. if (!component) {
  7227. pr_err("%s codec is NULL\n", __func__);
  7228. return -EINVAL;
  7229. }
  7230. dapm = snd_soc_component_get_dapm(component);
  7231. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7232. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  7233. __func__, component->name);
  7234. wsa881x_set_channel_map(component, &spkleft_ports[0],
  7235. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7236. &ch_rate[0], &spkleft_port_types[0]);
  7237. if (dapm->component) {
  7238. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7239. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7240. }
  7241. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7242. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  7243. __func__, component->name);
  7244. wsa881x_set_channel_map(component, &spkright_ports[0],
  7245. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7246. &ch_rate[0], &spkright_port_types[0]);
  7247. if (dapm->component) {
  7248. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7249. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7250. }
  7251. } else {
  7252. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  7253. component->name);
  7254. ret = -EINVAL;
  7255. goto err;
  7256. }
  7257. pdata = snd_soc_card_get_drvdata(component->card);
  7258. if (!pdata->codec_root) {
  7259. entry = snd_info_create_subdir(card->module, "codecs",
  7260. card->proc_root);
  7261. if (!entry) {
  7262. pr_err("%s: Cannot create codecs module entry\n",
  7263. __func__);
  7264. ret = 0;
  7265. goto err;
  7266. }
  7267. pdata->codec_root = entry;
  7268. }
  7269. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7270. component);
  7271. err:
  7272. return ret;
  7273. }
  7274. static int msm_aux_codec_init(struct snd_soc_component *component)
  7275. {
  7276. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  7277. int ret = 0;
  7278. void *mbhc_calibration;
  7279. struct snd_info_entry *entry;
  7280. struct snd_card *card = component->card->snd_card;
  7281. struct msm_asoc_mach_data *pdata;
  7282. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7283. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7284. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7285. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7286. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7287. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7288. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7289. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7290. snd_soc_dapm_sync(dapm);
  7291. pdata = snd_soc_card_get_drvdata(component->card);
  7292. if (!pdata->codec_root) {
  7293. entry = snd_info_create_subdir(card->module, "codecs",
  7294. card->proc_root);
  7295. if (!entry) {
  7296. pr_err("%s: Cannot create codecs module entry\n",
  7297. __func__);
  7298. ret = 0;
  7299. goto codec_root_err;
  7300. }
  7301. pdata->codec_root = entry;
  7302. }
  7303. wcd937x_info_create_codec_entry(pdata->codec_root, component);
  7304. codec_root_err:
  7305. mbhc_calibration = def_wcd_mbhc_cal();
  7306. if (!mbhc_calibration) {
  7307. return -ENOMEM;
  7308. }
  7309. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7310. ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  7311. return ret;
  7312. }
  7313. static int msm_init_aux_dev(struct platform_device *pdev,
  7314. struct snd_soc_card *card)
  7315. {
  7316. struct device_node *wsa_of_node;
  7317. struct device_node *aux_codec_of_node;
  7318. u32 wsa_max_devs;
  7319. u32 wsa_dev_cnt;
  7320. u32 codec_max_aux_devs = 0;
  7321. u32 codec_aux_dev_cnt = 0;
  7322. int i;
  7323. struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
  7324. struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
  7325. const char *auxdev_name_prefix[1];
  7326. char *dev_name_str = NULL;
  7327. int found = 0;
  7328. int codecs_found = 0;
  7329. int ret = 0;
  7330. /* Get maximum WSA device count for this platform */
  7331. ret = of_property_read_u32(pdev->dev.of_node,
  7332. "qcom,wsa-max-devs", &wsa_max_devs);
  7333. if (ret) {
  7334. dev_err(&pdev->dev,
  7335. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7336. __func__, pdev->dev.of_node->full_name, ret);
  7337. wsa_max_devs = 0;
  7338. goto codec_aux_dev;
  7339. }
  7340. if (wsa_max_devs == 0) {
  7341. dev_dbg(&pdev->dev,
  7342. "%s: Max WSA devices is 0 for this target?\n",
  7343. __func__);
  7344. goto codec_aux_dev;
  7345. }
  7346. /* Get count of WSA device phandles for this platform */
  7347. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7348. "qcom,wsa-devs", NULL);
  7349. if (wsa_dev_cnt == -ENOENT) {
  7350. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7351. __func__);
  7352. goto err;
  7353. } else if (wsa_dev_cnt <= 0) {
  7354. dev_err(&pdev->dev,
  7355. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7356. __func__, wsa_dev_cnt);
  7357. ret = -EINVAL;
  7358. goto err;
  7359. }
  7360. /*
  7361. * Expect total phandles count to be NOT less than maximum possible
  7362. * WSA count. However, if it is less, then assign same value to
  7363. * max count as well.
  7364. */
  7365. if (wsa_dev_cnt < wsa_max_devs) {
  7366. dev_dbg(&pdev->dev,
  7367. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7368. __func__, wsa_max_devs, wsa_dev_cnt);
  7369. wsa_max_devs = wsa_dev_cnt;
  7370. }
  7371. /* Make sure prefix string passed for each WSA device */
  7372. ret = of_property_count_strings(pdev->dev.of_node,
  7373. "qcom,wsa-aux-dev-prefix");
  7374. if (ret != wsa_dev_cnt) {
  7375. dev_err(&pdev->dev,
  7376. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7377. __func__, wsa_dev_cnt, ret);
  7378. ret = -EINVAL;
  7379. goto err;
  7380. }
  7381. /*
  7382. * Alloc mem to store phandle and index info of WSA device, if already
  7383. * registered with ALSA core
  7384. */
  7385. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7386. sizeof(struct msm_wsa881x_dev_info),
  7387. GFP_KERNEL);
  7388. if (!wsa881x_dev_info) {
  7389. ret = -ENOMEM;
  7390. goto err;
  7391. }
  7392. /*
  7393. * search and check whether all WSA devices are already
  7394. * registered with ALSA core or not. If found a node, store
  7395. * the node and the index in a local array of struct for later
  7396. * use.
  7397. */
  7398. for (i = 0; i < wsa_dev_cnt; i++) {
  7399. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7400. "qcom,wsa-devs", i);
  7401. if (unlikely(!wsa_of_node)) {
  7402. /* we should not be here */
  7403. dev_err(&pdev->dev,
  7404. "%s: wsa dev node is not present\n",
  7405. __func__);
  7406. ret = -EINVAL;
  7407. goto err;
  7408. }
  7409. if (soc_find_component(wsa_of_node, NULL)) {
  7410. /* WSA device registered with ALSA core */
  7411. wsa881x_dev_info[found].of_node = wsa_of_node;
  7412. wsa881x_dev_info[found].index = i;
  7413. found++;
  7414. if (found == wsa_max_devs)
  7415. break;
  7416. }
  7417. }
  7418. if (found < wsa_max_devs) {
  7419. dev_dbg(&pdev->dev,
  7420. "%s: failed to find %d components. Found only %d\n",
  7421. __func__, wsa_max_devs, found);
  7422. return -EPROBE_DEFER;
  7423. }
  7424. dev_info(&pdev->dev,
  7425. "%s: found %d wsa881x devices registered with ALSA core\n",
  7426. __func__, found);
  7427. codec_aux_dev:
  7428. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7429. /* Get maximum aux codec device count for this platform */
  7430. ret = of_property_read_u32(pdev->dev.of_node,
  7431. "qcom,codec-max-aux-devs",
  7432. &codec_max_aux_devs);
  7433. if (ret) {
  7434. dev_err(&pdev->dev,
  7435. "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
  7436. __func__, pdev->dev.of_node->full_name, ret);
  7437. codec_max_aux_devs = 0;
  7438. goto aux_dev_register;
  7439. }
  7440. if (codec_max_aux_devs == 0) {
  7441. dev_dbg(&pdev->dev,
  7442. "%s: Max aux codec devices is 0 for this target?\n",
  7443. __func__);
  7444. goto aux_dev_register;
  7445. }
  7446. /* Get count of aux codec device phandles for this platform */
  7447. codec_aux_dev_cnt = of_count_phandle_with_args(
  7448. pdev->dev.of_node,
  7449. "qcom,codec-aux-devs", NULL);
  7450. if (codec_aux_dev_cnt == -ENOENT) {
  7451. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7452. __func__);
  7453. goto err;
  7454. } else if (codec_aux_dev_cnt <= 0) {
  7455. dev_err(&pdev->dev,
  7456. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7457. __func__, codec_aux_dev_cnt);
  7458. ret = -EINVAL;
  7459. goto err;
  7460. }
  7461. /*
  7462. * Expect total phandles count to be NOT less than maximum possible
  7463. * AUX device count. However, if it is less, then assign same value to
  7464. * max count as well.
  7465. */
  7466. if (codec_aux_dev_cnt < codec_max_aux_devs) {
  7467. dev_dbg(&pdev->dev,
  7468. "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
  7469. __func__, codec_max_aux_devs,
  7470. codec_aux_dev_cnt);
  7471. codec_max_aux_devs = codec_aux_dev_cnt;
  7472. }
  7473. /*
  7474. * Alloc mem to store phandle and index info of aux codec
  7475. * if already registered with ALSA core
  7476. */
  7477. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_max_aux_devs,
  7478. sizeof(struct aux_codec_dev_info),
  7479. GFP_KERNEL);
  7480. if (!aux_cdc_dev_info) {
  7481. ret = -ENOMEM;
  7482. goto err;
  7483. }
  7484. /*
  7485. * search and check whether all aux codecs are already
  7486. * registered with ALSA core or not. If found a node, store
  7487. * the node and the index in a local array of struct for later
  7488. * use.
  7489. */
  7490. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7491. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7492. "qcom,codec-aux-devs", i);
  7493. if (unlikely(!aux_codec_of_node)) {
  7494. /* we should not be here */
  7495. dev_err(&pdev->dev,
  7496. "%s: aux codec dev node is not present\n",
  7497. __func__);
  7498. ret = -EINVAL;
  7499. goto err;
  7500. }
  7501. if (soc_find_component(aux_codec_of_node, NULL)) {
  7502. /* AUX codec registered with ALSA core */
  7503. aux_cdc_dev_info[codecs_found].of_node =
  7504. aux_codec_of_node;
  7505. aux_cdc_dev_info[codecs_found].index = i;
  7506. codecs_found++;
  7507. }
  7508. }
  7509. if (codecs_found < codec_max_aux_devs) {
  7510. dev_dbg(&pdev->dev,
  7511. "%s: failed to find %d components. Found only %d\n",
  7512. __func__, codec_max_aux_devs, codecs_found);
  7513. return -EPROBE_DEFER;
  7514. }
  7515. dev_info(&pdev->dev,
  7516. "%s: found %d AUX codecs registered with ALSA core\n",
  7517. __func__, codecs_found);
  7518. }
  7519. aux_dev_register:
  7520. card->num_aux_devs = wsa_max_devs + codec_max_aux_devs;
  7521. card->num_configs = wsa_max_devs + codec_max_aux_devs;
  7522. /* Alloc array of AUX devs struct */
  7523. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7524. sizeof(struct snd_soc_aux_dev),
  7525. GFP_KERNEL);
  7526. if (!msm_aux_dev) {
  7527. ret = -ENOMEM;
  7528. goto err;
  7529. }
  7530. /* Alloc array of codec conf struct */
  7531. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7532. sizeof(struct snd_soc_codec_conf),
  7533. GFP_KERNEL);
  7534. if (!msm_codec_conf) {
  7535. ret = -ENOMEM;
  7536. goto err;
  7537. }
  7538. for (i = 0; i < wsa_max_devs; i++) {
  7539. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7540. GFP_KERNEL);
  7541. if (!dev_name_str) {
  7542. ret = -ENOMEM;
  7543. goto err;
  7544. }
  7545. ret = of_property_read_string_index(pdev->dev.of_node,
  7546. "qcom,wsa-aux-dev-prefix",
  7547. wsa881x_dev_info[i].index,
  7548. auxdev_name_prefix);
  7549. if (ret) {
  7550. dev_err(&pdev->dev,
  7551. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7552. __func__, ret);
  7553. ret = -EINVAL;
  7554. goto err;
  7555. }
  7556. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7557. msm_aux_dev[i].name = dev_name_str;
  7558. msm_aux_dev[i].codec_name = NULL;
  7559. msm_aux_dev[i].codec_of_node =
  7560. wsa881x_dev_info[i].of_node;
  7561. msm_aux_dev[i].init = msm_wsa881x_init;
  7562. msm_codec_conf[i].dev_name = NULL;
  7563. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7564. msm_codec_conf[i].of_node =
  7565. wsa881x_dev_info[i].of_node;
  7566. }
  7567. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7568. msm_aux_dev[wsa_max_devs + i].name = "aux_codec";
  7569. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7570. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7571. aux_cdc_dev_info[i].of_node;
  7572. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7573. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7574. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7575. NULL;
  7576. msm_codec_conf[wsa_max_devs + i].of_node =
  7577. aux_cdc_dev_info[i].of_node;
  7578. }
  7579. card->codec_conf = msm_codec_conf;
  7580. card->aux_dev = msm_aux_dev;
  7581. err:
  7582. return ret;
  7583. }
  7584. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7585. {
  7586. int count;
  7587. u32 mi2s_master_slave[MI2S_MAX];
  7588. int ret;
  7589. for (count = 0; count < MI2S_MAX; count++) {
  7590. mutex_init(&mi2s_intf_conf[count].lock);
  7591. mi2s_intf_conf[count].ref_cnt = 0;
  7592. }
  7593. ret = of_property_read_u32_array(pdev->dev.of_node,
  7594. "qcom,msm-mi2s-master",
  7595. mi2s_master_slave, MI2S_MAX);
  7596. if (ret) {
  7597. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7598. __func__);
  7599. } else {
  7600. for (count = 0; count < MI2S_MAX; count++) {
  7601. mi2s_intf_conf[count].msm_is_mi2s_master =
  7602. mi2s_master_slave[count];
  7603. }
  7604. }
  7605. }
  7606. static void msm_i2s_auxpcm_deinit(void)
  7607. {
  7608. int count;
  7609. for (count = 0; count < MI2S_MAX; count++) {
  7610. mutex_destroy(&mi2s_intf_conf[count].lock);
  7611. mi2s_intf_conf[count].ref_cnt = 0;
  7612. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7613. }
  7614. }
  7615. static int sm6150_ssr_enable(struct device *dev, void *data)
  7616. {
  7617. struct platform_device *pdev = to_platform_device(dev);
  7618. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7619. struct msm_asoc_mach_data *pdata = NULL;
  7620. struct snd_soc_component *component = NULL;
  7621. int ret = 0;
  7622. if (!card) {
  7623. dev_err(dev, "%s: card is NULL\n", __func__);
  7624. ret = -EINVAL;
  7625. goto err;
  7626. }
  7627. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7628. pdata = snd_soc_card_get_drvdata(card);
  7629. if (!pdata->is_afe_config_done) {
  7630. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7631. struct snd_soc_pcm_runtime *rtd;
  7632. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7633. if (!rtd) {
  7634. dev_err(dev,
  7635. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7636. __func__, be_dl_name);
  7637. ret = -EINVAL;
  7638. goto err;
  7639. }
  7640. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  7641. if (!component) {
  7642. dev_err(dev, "%s: component is NULL\n",
  7643. __func__);
  7644. ret = -EINVAL;
  7645. goto err;
  7646. }
  7647. ret = msm_afe_set_config(component);
  7648. if (ret)
  7649. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  7650. __func__, ret);
  7651. else
  7652. pdata->is_afe_config_done = true;
  7653. }
  7654. }
  7655. snd_soc_card_change_online_state(card, 1);
  7656. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  7657. err:
  7658. return ret;
  7659. }
  7660. static void sm6150_ssr_disable(struct device *dev, void *data)
  7661. {
  7662. struct platform_device *pdev = to_platform_device(dev);
  7663. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7664. struct msm_asoc_mach_data *pdata;
  7665. if (!card) {
  7666. dev_err(dev, "%s: card is NULL\n", __func__);
  7667. return;
  7668. }
  7669. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  7670. snd_soc_card_change_online_state(card, 0);
  7671. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7672. pdata = snd_soc_card_get_drvdata(card);
  7673. msm_afe_clear_config();
  7674. pdata->is_afe_config_done = false;
  7675. }
  7676. }
  7677. static const struct snd_event_ops sm6150_ssr_ops = {
  7678. .enable = sm6150_ssr_enable,
  7679. .disable = sm6150_ssr_disable,
  7680. };
  7681. static int msm_audio_ssr_compare(struct device *dev, void *data)
  7682. {
  7683. struct device_node *node = data;
  7684. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  7685. __func__, dev->of_node, node);
  7686. return (dev->of_node && dev->of_node == node);
  7687. }
  7688. static int msm_audio_ssr_register(struct device *dev)
  7689. {
  7690. struct device_node *np = dev->of_node;
  7691. struct snd_event_clients *ssr_clients = NULL;
  7692. struct device_node *node;
  7693. int ret;
  7694. int i;
  7695. for (i = 0; ; i++) {
  7696. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  7697. if (!node)
  7698. break;
  7699. snd_event_mstr_add_client(&ssr_clients,
  7700. msm_audio_ssr_compare, node);
  7701. }
  7702. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  7703. ssr_clients, NULL);
  7704. if (!ret)
  7705. snd_event_notify(dev, SND_EVENT_UP);
  7706. return ret;
  7707. }
  7708. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7709. {
  7710. struct snd_soc_card *card;
  7711. struct msm_asoc_mach_data *pdata;
  7712. const char *mbhc_audio_jack_type = NULL;
  7713. int ret;
  7714. if (!pdev->dev.of_node) {
  7715. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7716. return -EINVAL;
  7717. }
  7718. pdata = devm_kzalloc(&pdev->dev,
  7719. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7720. if (!pdata)
  7721. return -ENOMEM;
  7722. card = populate_snd_card_dailinks(&pdev->dev);
  7723. if (!card) {
  7724. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7725. ret = -EINVAL;
  7726. goto err;
  7727. }
  7728. card->dev = &pdev->dev;
  7729. platform_set_drvdata(pdev, card);
  7730. snd_soc_card_set_drvdata(card, pdata);
  7731. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7732. if (ret) {
  7733. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7734. ret);
  7735. goto err;
  7736. }
  7737. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7738. if (ret) {
  7739. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7740. ret);
  7741. goto err;
  7742. }
  7743. ret = msm_populate_dai_link_component_of_node(card);
  7744. if (ret) {
  7745. ret = -EPROBE_DEFER;
  7746. goto err;
  7747. }
  7748. ret = msm_init_aux_dev(pdev, card);
  7749. if (ret)
  7750. goto err;
  7751. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7752. if (ret == -EPROBE_DEFER) {
  7753. if (codec_reg_done)
  7754. ret = -EINVAL;
  7755. goto err;
  7756. } else if (ret) {
  7757. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7758. ret);
  7759. goto err;
  7760. }
  7761. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7762. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7763. "qcom,hph-en1-gpio", 0);
  7764. if (!pdata->hph_en1_gpio_p) {
  7765. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7766. "qcom,hph-en1-gpio",
  7767. pdev->dev.of_node->full_name);
  7768. }
  7769. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7770. "qcom,hph-en0-gpio", 0);
  7771. if (!pdata->hph_en0_gpio_p) {
  7772. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7773. "qcom,hph-en0-gpio",
  7774. pdev->dev.of_node->full_name);
  7775. }
  7776. ret = of_property_read_string(pdev->dev.of_node,
  7777. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7778. if (ret) {
  7779. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7780. "qcom,mbhc-audio-jack-type",
  7781. pdev->dev.of_node->full_name);
  7782. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7783. } else {
  7784. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7785. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7786. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7787. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7788. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7789. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7790. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7791. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7792. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7793. } else {
  7794. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7795. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7796. }
  7797. }
  7798. /*
  7799. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7800. * entry is not found in DT file as some targets do not support
  7801. * US-Euro detection
  7802. */
  7803. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7804. "qcom,us-euro-gpios", 0);
  7805. if (!pdata->us_euro_gpio_p) {
  7806. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7807. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7808. } else {
  7809. dev_dbg(&pdev->dev, "%s detected\n",
  7810. "qcom,us-euro-gpios");
  7811. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7812. }
  7813. if (wcd_mbhc_cfg.enable_usbc_analog) {
  7814. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  7815. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  7816. "fsa4480-i2c-handle", 0);
  7817. if (!pdata->fsa_handle)
  7818. dev_err(&pdev->dev,
  7819. "property %s not detected in node %s\n",
  7820. "fsa4480-i2c-handle",
  7821. pdev->dev.of_node->full_name);
  7822. }
  7823. /* Parse pinctrl info from devicetree */
  7824. ret = msm_get_pinctrl(pdev);
  7825. if (!ret) {
  7826. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7827. } else {
  7828. dev_dbg(&pdev->dev,
  7829. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7830. __func__, ret);
  7831. ret = 0;
  7832. }
  7833. msm_i2s_auxpcm_init(pdev);
  7834. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7835. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7836. "qcom,cdc-dmic01-gpios",
  7837. 0);
  7838. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7839. "qcom,cdc-dmic23-gpios",
  7840. 0);
  7841. }
  7842. ret = msm_audio_ssr_register(&pdev->dev);
  7843. if (ret)
  7844. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  7845. __func__, ret);
  7846. err:
  7847. return ret;
  7848. }
  7849. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7850. {
  7851. snd_event_master_deregister(&pdev->dev);
  7852. msm_i2s_auxpcm_deinit();
  7853. return 0;
  7854. }
  7855. static struct platform_driver sm6150_asoc_machine_driver = {
  7856. .driver = {
  7857. .name = DRV_NAME,
  7858. .owner = THIS_MODULE,
  7859. .pm = &snd_soc_pm_ops,
  7860. .of_match_table = sm6150_asoc_machine_of_match,
  7861. },
  7862. .probe = msm_asoc_machine_probe,
  7863. .remove = msm_asoc_machine_remove,
  7864. };
  7865. module_platform_driver(sm6150_asoc_machine_driver);
  7866. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7867. MODULE_LICENSE("GPL v2");
  7868. MODULE_ALIAS("platform:" DRV_NAME);
  7869. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);