dsi_panel.c 103 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "msm-dsi-panel:[%s:%d] " fmt, __func__, __LINE__
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. /**
  16. * topology is currently defined by a set of following 3 values:
  17. * 1. num of layer mixers
  18. * 2. num of compression encoders
  19. * 3. num of interfaces
  20. */
  21. #define TOPOLOGY_SET_LEN 3
  22. #define MAX_TOPOLOGY 5
  23. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  24. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  25. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  26. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  27. #define MAX_PANEL_JITTER 10
  28. #define DEFAULT_PANEL_PREFILL_LINES 25
  29. enum dsi_dsc_ratio_type {
  30. DSC_8BPC_8BPP,
  31. DSC_10BPC_8BPP,
  32. DSC_12BPC_8BPP,
  33. DSC_10BPC_10BPP,
  34. DSC_RATIO_TYPE_MAX
  35. };
  36. static u32 dsi_dsc_rc_buf_thresh[] = {0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54,
  37. 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e};
  38. /*
  39. * DSC 1.1
  40. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  41. */
  42. static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
  43. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
  44. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
  45. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
  46. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  47. };
  48. /*
  49. * DSC 1.1 SCR
  50. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  51. */
  52. static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
  53. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
  54. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
  55. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
  56. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  57. };
  58. /*
  59. * DSC 1.1
  60. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  61. */
  62. static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
  63. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
  64. {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
  65. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
  66. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  67. };
  68. /*
  69. * DSC 1.1 SCR
  70. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  71. */
  72. static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
  73. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
  74. {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
  75. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
  76. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  77. };
  78. /*
  79. * DSC 1.1 and DSC 1.1 SCR
  80. * Rate control - bpg offset values
  81. */
  82. static char dsi_dsc_rc_range_bpg_offset[] = {2, 0, 0, -2, -4, -6, -8, -8,
  83. -8, -10, -10, -12, -12, -12, -12};
  84. int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc, char *buf,
  85. int pps_id)
  86. {
  87. char *bp;
  88. char data;
  89. int i, bpp;
  90. char *dbgbp;
  91. dbgbp = buf;
  92. bp = buf;
  93. /* First 7 bytes are cmd header */
  94. *bp++ = 0x0A;
  95. *bp++ = 1;
  96. *bp++ = 0;
  97. *bp++ = 0;
  98. *bp++ = 10;
  99. *bp++ = 0;
  100. *bp++ = 128;
  101. *bp++ = (dsc->version & 0xff); /* pps0 */
  102. *bp++ = (pps_id & 0xff); /* pps1 */
  103. bp++; /* pps2, reserved */
  104. data = dsc->line_buf_depth & 0x0f;
  105. data |= ((dsc->bpc & 0xf) << 4);
  106. *bp++ = data; /* pps3 */
  107. bpp = dsc->bpp;
  108. bpp <<= 4; /* 4 fraction bits */
  109. data = (bpp >> 8);
  110. data &= 0x03; /* upper two bits */
  111. data |= ((dsc->block_pred_enable & 0x1) << 5);
  112. data |= ((dsc->convert_rgb & 0x1) << 4);
  113. data |= ((dsc->enable_422 & 0x1) << 3);
  114. data |= ((dsc->vbr_enable & 0x1) << 2);
  115. *bp++ = data; /* pps4 */
  116. *bp++ = (bpp & 0xff); /* pps5 */
  117. *bp++ = ((dsc->pic_height >> 8) & 0xff); /* pps6 */
  118. *bp++ = (dsc->pic_height & 0x0ff); /* pps7 */
  119. *bp++ = ((dsc->pic_width >> 8) & 0xff); /* pps8 */
  120. *bp++ = (dsc->pic_width & 0x0ff); /* pps9 */
  121. *bp++ = ((dsc->slice_height >> 8) & 0xff);/* pps10 */
  122. *bp++ = (dsc->slice_height & 0x0ff); /* pps11 */
  123. *bp++ = ((dsc->slice_width >> 8) & 0xff); /* pps12 */
  124. *bp++ = (dsc->slice_width & 0x0ff); /* pps13 */
  125. *bp++ = ((dsc->chunk_size >> 8) & 0xff);/* pps14 */
  126. *bp++ = (dsc->chunk_size & 0x0ff); /* pps15 */
  127. *bp++ = (dsc->initial_xmit_delay >> 8) & 0x3; /* pps16, bit 0, 1 */
  128. *bp++ = (dsc->initial_xmit_delay & 0xff);/* pps17 */
  129. *bp++ = ((dsc->initial_dec_delay >> 8) & 0xff); /* pps18 */
  130. *bp++ = (dsc->initial_dec_delay & 0xff);/* pps19 */
  131. bp++; /* pps20, reserved */
  132. *bp++ = (dsc->initial_scale_value & 0x3f); /* pps21 */
  133. *bp++ = ((dsc->scale_increment_interval >> 8) & 0xff); /* pps22 */
  134. *bp++ = (dsc->scale_increment_interval & 0xff); /* pps23 */
  135. *bp++ = ((dsc->scale_decrement_interval >> 8) & 0xf); /* pps24 */
  136. *bp++ = (dsc->scale_decrement_interval & 0x0ff);/* pps25 */
  137. bp++; /* pps26, reserved */
  138. *bp++ = (dsc->first_line_bpg_offset & 0x1f);/* pps27 */
  139. *bp++ = ((dsc->nfl_bpg_offset >> 8) & 0xff);/* pps28 */
  140. *bp++ = (dsc->nfl_bpg_offset & 0x0ff); /* pps29 */
  141. *bp++ = ((dsc->slice_bpg_offset >> 8) & 0xff);/* pps30 */
  142. *bp++ = (dsc->slice_bpg_offset & 0x0ff);/* pps31 */
  143. *bp++ = ((dsc->initial_offset >> 8) & 0xff);/* pps32 */
  144. *bp++ = (dsc->initial_offset & 0x0ff); /* pps33 */
  145. *bp++ = ((dsc->final_offset >> 8) & 0xff);/* pps34 */
  146. *bp++ = (dsc->final_offset & 0x0ff); /* pps35 */
  147. *bp++ = (dsc->min_qp_flatness & 0x1f); /* pps36 */
  148. *bp++ = (dsc->max_qp_flatness & 0x1f); /* pps37 */
  149. *bp++ = ((dsc->rc_model_size >> 8) & 0xff);/* pps38 */
  150. *bp++ = (dsc->rc_model_size & 0x0ff); /* pps39 */
  151. *bp++ = (dsc->edge_factor & 0x0f); /* pps40 */
  152. *bp++ = (dsc->quant_incr_limit0 & 0x1f); /* pps41 */
  153. *bp++ = (dsc->quant_incr_limit1 & 0x1f); /* pps42 */
  154. data = ((dsc->tgt_offset_hi & 0xf) << 4);
  155. data |= (dsc->tgt_offset_lo & 0x0f);
  156. *bp++ = data; /* pps43 */
  157. for (i = 0; i < 14; i++)
  158. *bp++ = (dsc->buf_thresh[i] & 0xff); /* pps44 - pps57 */
  159. for (i = 0; i < 15; i++) { /* pps58 - pps87 */
  160. data = (dsc->range_min_qp[i] & 0x1f);
  161. data <<= 3;
  162. data |= ((dsc->range_max_qp[i] >> 2) & 0x07);
  163. *bp++ = data;
  164. data = (dsc->range_max_qp[i] & 0x03);
  165. data <<= 6;
  166. data |= (dsc->range_bpg_offset[i] & 0x3f);
  167. *bp++ = data;
  168. }
  169. return 128;
  170. }
  171. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  172. {
  173. int rc = 0;
  174. int i;
  175. struct regulator *vreg = NULL;
  176. for (i = 0; i < panel->power_info.count; i++) {
  177. vreg = devm_regulator_get(panel->parent,
  178. panel->power_info.vregs[i].vreg_name);
  179. rc = PTR_RET(vreg);
  180. if (rc) {
  181. pr_err("failed to get %s regulator\n",
  182. panel->power_info.vregs[i].vreg_name);
  183. goto error_put;
  184. }
  185. panel->power_info.vregs[i].vreg = vreg;
  186. }
  187. return rc;
  188. error_put:
  189. for (i = i - 1; i >= 0; i--) {
  190. devm_regulator_put(panel->power_info.vregs[i].vreg);
  191. panel->power_info.vregs[i].vreg = NULL;
  192. }
  193. return rc;
  194. }
  195. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  196. {
  197. int rc = 0;
  198. int i;
  199. for (i = panel->power_info.count - 1; i >= 0; i--)
  200. devm_regulator_put(panel->power_info.vregs[i].vreg);
  201. return rc;
  202. }
  203. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  204. {
  205. int rc = 0;
  206. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  207. if (gpio_is_valid(r_config->reset_gpio)) {
  208. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  209. if (rc) {
  210. pr_err("request for reset_gpio failed, rc=%d\n", rc);
  211. goto error;
  212. }
  213. }
  214. if (gpio_is_valid(r_config->disp_en_gpio)) {
  215. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  216. if (rc) {
  217. pr_err("request for disp_en_gpio failed, rc=%d\n", rc);
  218. goto error_release_reset;
  219. }
  220. }
  221. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  222. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  223. if (rc) {
  224. pr_err("request for bklt_en_gpio failed, rc=%d\n", rc);
  225. goto error_release_disp_en;
  226. }
  227. }
  228. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  229. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  230. if (rc) {
  231. pr_err("request for mode_gpio failed, rc=%d\n", rc);
  232. goto error_release_mode_sel;
  233. }
  234. }
  235. goto error;
  236. error_release_mode_sel:
  237. if (gpio_is_valid(panel->bl_config.en_gpio))
  238. gpio_free(panel->bl_config.en_gpio);
  239. error_release_disp_en:
  240. if (gpio_is_valid(r_config->disp_en_gpio))
  241. gpio_free(r_config->disp_en_gpio);
  242. error_release_reset:
  243. if (gpio_is_valid(r_config->reset_gpio))
  244. gpio_free(r_config->reset_gpio);
  245. error:
  246. return rc;
  247. }
  248. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  249. {
  250. int rc = 0;
  251. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  252. if (gpio_is_valid(r_config->reset_gpio))
  253. gpio_free(r_config->reset_gpio);
  254. if (gpio_is_valid(r_config->disp_en_gpio))
  255. gpio_free(r_config->disp_en_gpio);
  256. if (gpio_is_valid(panel->bl_config.en_gpio))
  257. gpio_free(panel->bl_config.en_gpio);
  258. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  259. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  260. return rc;
  261. }
  262. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  263. {
  264. struct dsi_panel_reset_config *r_config;
  265. if (!panel) {
  266. pr_err("Invalid panel param\n");
  267. return -EINVAL;
  268. }
  269. r_config = &panel->reset_config;
  270. if (!r_config) {
  271. pr_err("Invalid panel reset configuration\n");
  272. return -EINVAL;
  273. }
  274. if (gpio_is_valid(r_config->reset_gpio)) {
  275. gpio_set_value(r_config->reset_gpio, 0);
  276. pr_info("GPIO pulled low to simulate ESD\n");
  277. return 0;
  278. }
  279. pr_err("failed to pull down gpio\n");
  280. return -EINVAL;
  281. }
  282. static int dsi_panel_reset(struct dsi_panel *panel)
  283. {
  284. int rc = 0;
  285. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  286. int i;
  287. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  288. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  289. if (rc) {
  290. pr_err("unable to set dir for disp gpio rc=%d\n", rc);
  291. goto exit;
  292. }
  293. }
  294. if (r_config->count) {
  295. rc = gpio_direction_output(r_config->reset_gpio,
  296. r_config->sequence[0].level);
  297. if (rc) {
  298. pr_err("unable to set dir for rst gpio rc=%d\n", rc);
  299. goto exit;
  300. }
  301. }
  302. for (i = 0; i < r_config->count; i++) {
  303. gpio_set_value(r_config->reset_gpio,
  304. r_config->sequence[i].level);
  305. if (r_config->sequence[i].sleep_ms)
  306. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  307. (r_config->sequence[i].sleep_ms * 1000) + 100);
  308. }
  309. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  310. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  311. if (rc)
  312. pr_err("unable to set dir for bklt gpio rc=%d\n", rc);
  313. }
  314. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  315. bool out = true;
  316. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  317. || (panel->reset_config.mode_sel_state
  318. == MODE_GPIO_LOW))
  319. out = false;
  320. else if ((panel->reset_config.mode_sel_state
  321. == MODE_SEL_SINGLE_PORT) ||
  322. (panel->reset_config.mode_sel_state
  323. == MODE_GPIO_HIGH))
  324. out = true;
  325. rc = gpio_direction_output(
  326. panel->reset_config.lcd_mode_sel_gpio, out);
  327. if (rc)
  328. pr_err("unable to set dir for mode gpio rc=%d\n", rc);
  329. }
  330. exit:
  331. return rc;
  332. }
  333. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  334. {
  335. int rc = 0;
  336. struct pinctrl_state *state;
  337. if (panel->host_config.ext_bridge_mode)
  338. return 0;
  339. if (enable)
  340. state = panel->pinctrl.active;
  341. else
  342. state = panel->pinctrl.suspend;
  343. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  344. if (rc)
  345. pr_err("[%s] failed to set pin state, rc=%d\n", panel->name,
  346. rc);
  347. return rc;
  348. }
  349. static int dsi_panel_power_on(struct dsi_panel *panel)
  350. {
  351. int rc = 0;
  352. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  353. if (rc) {
  354. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  355. goto exit;
  356. }
  357. rc = dsi_panel_set_pinctrl_state(panel, true);
  358. if (rc) {
  359. pr_err("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  360. goto error_disable_vregs;
  361. }
  362. rc = dsi_panel_reset(panel);
  363. if (rc) {
  364. pr_err("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  365. goto error_disable_gpio;
  366. }
  367. goto exit;
  368. error_disable_gpio:
  369. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  370. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  371. if (gpio_is_valid(panel->bl_config.en_gpio))
  372. gpio_set_value(panel->bl_config.en_gpio, 0);
  373. (void)dsi_panel_set_pinctrl_state(panel, false);
  374. error_disable_vregs:
  375. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  376. exit:
  377. return rc;
  378. }
  379. static int dsi_panel_power_off(struct dsi_panel *panel)
  380. {
  381. int rc = 0;
  382. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  383. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  384. if (gpio_is_valid(panel->reset_config.reset_gpio))
  385. gpio_set_value(panel->reset_config.reset_gpio, 0);
  386. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  387. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  388. rc = dsi_panel_set_pinctrl_state(panel, false);
  389. if (rc) {
  390. pr_err("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  391. rc);
  392. }
  393. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  394. if (rc)
  395. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  396. return rc;
  397. }
  398. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  399. enum dsi_cmd_set_type type)
  400. {
  401. int rc = 0, i = 0;
  402. ssize_t len;
  403. struct dsi_cmd_desc *cmds;
  404. u32 count;
  405. enum dsi_cmd_set_state state;
  406. struct dsi_display_mode *mode;
  407. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  408. if (!panel || !panel->cur_mode)
  409. return -EINVAL;
  410. mode = panel->cur_mode;
  411. cmds = mode->priv_info->cmd_sets[type].cmds;
  412. count = mode->priv_info->cmd_sets[type].count;
  413. state = mode->priv_info->cmd_sets[type].state;
  414. if (count == 0) {
  415. pr_debug("[%s] No commands to be sent for state(%d)\n",
  416. panel->name, type);
  417. goto error;
  418. }
  419. for (i = 0; i < count; i++) {
  420. if (state == DSI_CMD_SET_STATE_LP)
  421. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  422. if (cmds->last_command)
  423. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  424. len = ops->transfer(panel->host, &cmds->msg);
  425. if (len < 0) {
  426. rc = len;
  427. pr_err("failed to set cmds(%d), rc=%d\n", type, rc);
  428. goto error;
  429. }
  430. if (cmds->post_wait_ms)
  431. usleep_range(cmds->post_wait_ms*1000,
  432. ((cmds->post_wait_ms*1000)+10));
  433. cmds++;
  434. }
  435. error:
  436. return rc;
  437. }
  438. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  439. {
  440. int rc = 0;
  441. if (panel->host_config.ext_bridge_mode)
  442. return 0;
  443. devm_pinctrl_put(panel->pinctrl.pinctrl);
  444. return rc;
  445. }
  446. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  447. {
  448. int rc = 0;
  449. if (panel->host_config.ext_bridge_mode)
  450. return 0;
  451. /* TODO: pinctrl is defined in dsi dt node */
  452. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  453. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  454. rc = PTR_ERR(panel->pinctrl.pinctrl);
  455. pr_err("failed to get pinctrl, rc=%d\n", rc);
  456. goto error;
  457. }
  458. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  459. "panel_active");
  460. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  461. rc = PTR_ERR(panel->pinctrl.active);
  462. pr_err("failed to get pinctrl active state, rc=%d\n", rc);
  463. goto error;
  464. }
  465. panel->pinctrl.suspend =
  466. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  467. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  468. rc = PTR_ERR(panel->pinctrl.suspend);
  469. pr_err("failed to get pinctrl suspend state, rc=%d\n", rc);
  470. goto error;
  471. }
  472. error:
  473. return rc;
  474. }
  475. static int dsi_panel_wled_register(struct dsi_panel *panel,
  476. struct dsi_backlight_config *bl)
  477. {
  478. struct backlight_device *bd;
  479. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  480. if (!bd) {
  481. pr_err("[%s] fail raw backlight register\n", panel->name);
  482. return -EPROBE_DEFER;
  483. }
  484. bl->raw_bd = bd;
  485. return 0;
  486. }
  487. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  488. u32 bl_lvl)
  489. {
  490. int rc = 0;
  491. struct mipi_dsi_device *dsi;
  492. if (!panel || (bl_lvl > 0xffff)) {
  493. pr_err("invalid params\n");
  494. return -EINVAL;
  495. }
  496. dsi = &panel->mipi_device;
  497. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  498. if (rc < 0)
  499. pr_err("failed to update dcs backlight:%d\n", bl_lvl);
  500. return rc;
  501. }
  502. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  503. u32 bl_lvl)
  504. {
  505. int rc = 0;
  506. u32 duty = 0;
  507. u32 period_ns = 0;
  508. struct dsi_backlight_config *bl;
  509. if (!panel) {
  510. pr_err("Invalid Params\n");
  511. return -EINVAL;
  512. }
  513. bl = &panel->bl_config;
  514. if (!bl->pwm_bl) {
  515. pr_err("pwm device not found\n");
  516. return -EINVAL;
  517. }
  518. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  519. duty = bl_lvl * period_ns;
  520. duty /= bl->bl_max_level;
  521. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  522. if (rc) {
  523. pr_err("[%s] failed to change pwm config, rc=\n", panel->name,
  524. rc);
  525. goto error;
  526. }
  527. if (bl_lvl == 0 && bl->pwm_enabled) {
  528. pwm_disable(bl->pwm_bl);
  529. bl->pwm_enabled = false;
  530. return 0;
  531. }
  532. if (!bl->pwm_enabled) {
  533. rc = pwm_enable(bl->pwm_bl);
  534. if (rc) {
  535. pr_err("[%s] failed to enable pwm, rc=\n", panel->name,
  536. rc);
  537. goto error;
  538. }
  539. bl->pwm_enabled = true;
  540. }
  541. error:
  542. return rc;
  543. }
  544. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  545. {
  546. int rc = 0;
  547. struct dsi_backlight_config *bl = &panel->bl_config;
  548. if (panel->host_config.ext_bridge_mode)
  549. return 0;
  550. pr_debug("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  551. switch (bl->type) {
  552. case DSI_BACKLIGHT_WLED:
  553. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  554. break;
  555. case DSI_BACKLIGHT_DCS:
  556. rc = dsi_panel_update_backlight(panel, bl_lvl);
  557. break;
  558. case DSI_BACKLIGHT_EXTERNAL:
  559. break;
  560. case DSI_BACKLIGHT_PWM:
  561. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  562. break;
  563. default:
  564. pr_err("Backlight type(%d) not supported\n", bl->type);
  565. rc = -ENOTSUPP;
  566. }
  567. return rc;
  568. }
  569. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  570. {
  571. u32 cur_bl_level;
  572. struct backlight_device *bd = bl->raw_bd;
  573. /* default the brightness level to 50% */
  574. cur_bl_level = bl->bl_max_level >> 1;
  575. switch (bl->type) {
  576. case DSI_BACKLIGHT_WLED:
  577. /* Try to query the backlight level from the backlight device */
  578. if (bd->ops && bd->ops->get_brightness)
  579. cur_bl_level = bd->ops->get_brightness(bd);
  580. break;
  581. case DSI_BACKLIGHT_DCS:
  582. case DSI_BACKLIGHT_EXTERNAL:
  583. case DSI_BACKLIGHT_PWM:
  584. default:
  585. /*
  586. * Ideally, we should read the backlight level from the
  587. * panel. For now, just set it default value.
  588. */
  589. break;
  590. }
  591. pr_debug("cur_bl_level=%d\n", cur_bl_level);
  592. return cur_bl_level;
  593. }
  594. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  595. {
  596. struct dsi_backlight_config *bl = &panel->bl_config;
  597. bl->bl_level = dsi_panel_get_brightness(bl);
  598. }
  599. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  600. {
  601. int rc = 0;
  602. struct dsi_backlight_config *bl = &panel->bl_config;
  603. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  604. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  605. rc = PTR_ERR(bl->pwm_bl);
  606. pr_err("[%s] failed to request pwm, rc=%d\n", panel->name,
  607. rc);
  608. return rc;
  609. }
  610. return 0;
  611. }
  612. static int dsi_panel_bl_register(struct dsi_panel *panel)
  613. {
  614. int rc = 0;
  615. struct dsi_backlight_config *bl = &panel->bl_config;
  616. if (panel->host_config.ext_bridge_mode)
  617. return 0;
  618. switch (bl->type) {
  619. case DSI_BACKLIGHT_WLED:
  620. rc = dsi_panel_wled_register(panel, bl);
  621. break;
  622. case DSI_BACKLIGHT_DCS:
  623. break;
  624. case DSI_BACKLIGHT_EXTERNAL:
  625. break;
  626. case DSI_BACKLIGHT_PWM:
  627. rc = dsi_panel_pwm_register(panel);
  628. break;
  629. default:
  630. pr_err("Backlight type(%d) not supported\n", bl->type);
  631. rc = -ENOTSUPP;
  632. goto error;
  633. }
  634. error:
  635. return rc;
  636. }
  637. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  638. {
  639. struct dsi_backlight_config *bl = &panel->bl_config;
  640. devm_pwm_put(panel->parent, bl->pwm_bl);
  641. }
  642. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  643. {
  644. int rc = 0;
  645. struct dsi_backlight_config *bl = &panel->bl_config;
  646. if (panel->host_config.ext_bridge_mode)
  647. return 0;
  648. switch (bl->type) {
  649. case DSI_BACKLIGHT_WLED:
  650. break;
  651. case DSI_BACKLIGHT_DCS:
  652. break;
  653. case DSI_BACKLIGHT_EXTERNAL:
  654. break;
  655. case DSI_BACKLIGHT_PWM:
  656. dsi_panel_pwm_unregister(panel);
  657. break;
  658. default:
  659. pr_err("Backlight type(%d) not supported\n", bl->type);
  660. rc = -ENOTSUPP;
  661. goto error;
  662. }
  663. error:
  664. return rc;
  665. }
  666. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  667. struct dsi_parser_utils *utils)
  668. {
  669. int rc = 0;
  670. u64 tmp64 = 0;
  671. struct dsi_display_mode *display_mode;
  672. struct dsi_display_mode_priv_info *priv_info;
  673. display_mode = container_of(mode, struct dsi_display_mode, timing);
  674. priv_info = display_mode->priv_info;
  675. rc = utils->read_u64(utils->data,
  676. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  677. if (rc == -EOVERFLOW) {
  678. tmp64 = 0;
  679. rc = utils->read_u32(utils->data,
  680. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  681. }
  682. mode->clk_rate_hz = !rc ? tmp64 : 0;
  683. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  684. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  685. &mode->mdp_transfer_time_us);
  686. if (!rc)
  687. display_mode->priv_info->mdp_transfer_time_us =
  688. mode->mdp_transfer_time_us;
  689. else
  690. display_mode->priv_info->mdp_transfer_time_us = 0;
  691. rc = utils->read_u32(utils->data,
  692. "qcom,mdss-dsi-panel-framerate",
  693. &mode->refresh_rate);
  694. if (rc) {
  695. pr_err("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  696. rc);
  697. goto error;
  698. }
  699. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  700. &mode->h_active);
  701. if (rc) {
  702. pr_err("failed to read qcom,mdss-dsi-panel-width, rc=%d\n", rc);
  703. goto error;
  704. }
  705. rc = utils->read_u32(utils->data,
  706. "qcom,mdss-dsi-h-front-porch",
  707. &mode->h_front_porch);
  708. if (rc) {
  709. pr_err("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  710. rc);
  711. goto error;
  712. }
  713. rc = utils->read_u32(utils->data,
  714. "qcom,mdss-dsi-h-back-porch",
  715. &mode->h_back_porch);
  716. if (rc) {
  717. pr_err("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  718. rc);
  719. goto error;
  720. }
  721. rc = utils->read_u32(utils->data,
  722. "qcom,mdss-dsi-h-pulse-width",
  723. &mode->h_sync_width);
  724. if (rc) {
  725. pr_err("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  726. rc);
  727. goto error;
  728. }
  729. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  730. &mode->h_skew);
  731. if (rc)
  732. pr_err("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n", rc);
  733. pr_debug("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  734. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  735. mode->h_sync_width);
  736. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  737. &mode->v_active);
  738. if (rc) {
  739. pr_err("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  740. rc);
  741. goto error;
  742. }
  743. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  744. &mode->v_back_porch);
  745. if (rc) {
  746. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  747. rc);
  748. goto error;
  749. }
  750. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  751. &mode->v_front_porch);
  752. if (rc) {
  753. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  754. rc);
  755. goto error;
  756. }
  757. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  758. &mode->v_sync_width);
  759. if (rc) {
  760. pr_err("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  761. rc);
  762. goto error;
  763. }
  764. pr_debug("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  765. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  766. mode->v_sync_width);
  767. error:
  768. return rc;
  769. }
  770. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  771. struct dsi_parser_utils *utils,
  772. const char *name)
  773. {
  774. int rc = 0;
  775. u32 bpp = 0;
  776. enum dsi_pixel_format fmt;
  777. const char *packing;
  778. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  779. if (rc) {
  780. pr_err("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  781. name, rc);
  782. return rc;
  783. }
  784. host->bpp = bpp;
  785. switch (bpp) {
  786. case 3:
  787. fmt = DSI_PIXEL_FORMAT_RGB111;
  788. break;
  789. case 8:
  790. fmt = DSI_PIXEL_FORMAT_RGB332;
  791. break;
  792. case 12:
  793. fmt = DSI_PIXEL_FORMAT_RGB444;
  794. break;
  795. case 16:
  796. fmt = DSI_PIXEL_FORMAT_RGB565;
  797. break;
  798. case 18:
  799. fmt = DSI_PIXEL_FORMAT_RGB666;
  800. break;
  801. case 24:
  802. default:
  803. fmt = DSI_PIXEL_FORMAT_RGB888;
  804. break;
  805. }
  806. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  807. packing = utils->get_property(utils->data,
  808. "qcom,mdss-dsi-pixel-packing",
  809. NULL);
  810. if (packing && !strcmp(packing, "loose"))
  811. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  812. }
  813. host->dst_format = fmt;
  814. return rc;
  815. }
  816. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  817. struct dsi_parser_utils *utils,
  818. const char *name)
  819. {
  820. int rc = 0;
  821. bool lane_enabled;
  822. u32 num_of_lanes = 0;
  823. lane_enabled = utils->read_bool(utils->data,
  824. "qcom,mdss-dsi-lane-0-state");
  825. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  826. lane_enabled = utils->read_bool(utils->data,
  827. "qcom,mdss-dsi-lane-1-state");
  828. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  829. lane_enabled = utils->read_bool(utils->data,
  830. "qcom,mdss-dsi-lane-2-state");
  831. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  832. lane_enabled = utils->read_bool(utils->data,
  833. "qcom,mdss-dsi-lane-3-state");
  834. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  835. if (host->data_lanes & DSI_DATA_LANE_0)
  836. num_of_lanes++;
  837. if (host->data_lanes & DSI_DATA_LANE_1)
  838. num_of_lanes++;
  839. if (host->data_lanes & DSI_DATA_LANE_2)
  840. num_of_lanes++;
  841. if (host->data_lanes & DSI_DATA_LANE_3)
  842. num_of_lanes++;
  843. host->num_data_lanes = num_of_lanes;
  844. if (host->data_lanes == 0) {
  845. pr_err("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  846. rc = -EINVAL;
  847. }
  848. return rc;
  849. }
  850. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  851. struct dsi_parser_utils *utils,
  852. const char *name)
  853. {
  854. int rc = 0;
  855. const char *swap_mode;
  856. swap_mode = utils->get_property(utils->data,
  857. "qcom,mdss-dsi-color-order", NULL);
  858. if (swap_mode) {
  859. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  860. host->swap_mode = DSI_COLOR_SWAP_RGB;
  861. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  862. host->swap_mode = DSI_COLOR_SWAP_RBG;
  863. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  864. host->swap_mode = DSI_COLOR_SWAP_BRG;
  865. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  866. host->swap_mode = DSI_COLOR_SWAP_GRB;
  867. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  868. host->swap_mode = DSI_COLOR_SWAP_GBR;
  869. } else {
  870. pr_err("[%s] Unrecognized color order-%s\n",
  871. name, swap_mode);
  872. rc = -EINVAL;
  873. }
  874. } else {
  875. pr_debug("[%s] Falling back to default color order\n", name);
  876. host->swap_mode = DSI_COLOR_SWAP_RGB;
  877. }
  878. /* bit swap on color channel is not defined in dt */
  879. host->bit_swap_red = false;
  880. host->bit_swap_green = false;
  881. host->bit_swap_blue = false;
  882. return rc;
  883. }
  884. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  885. struct dsi_parser_utils *utils,
  886. const char *name)
  887. {
  888. const char *trig;
  889. int rc = 0;
  890. trig = utils->get_property(utils->data,
  891. "qcom,mdss-dsi-mdp-trigger", NULL);
  892. if (trig) {
  893. if (!strcmp(trig, "none")) {
  894. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  895. } else if (!strcmp(trig, "trigger_te")) {
  896. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  897. } else if (!strcmp(trig, "trigger_sw")) {
  898. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  899. } else if (!strcmp(trig, "trigger_sw_te")) {
  900. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  901. } else {
  902. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  903. name, trig);
  904. rc = -EINVAL;
  905. }
  906. } else {
  907. pr_debug("[%s] Falling back to default MDP trigger\n",
  908. name);
  909. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  910. }
  911. trig = utils->get_property(utils->data,
  912. "qcom,mdss-dsi-dma-trigger", NULL);
  913. if (trig) {
  914. if (!strcmp(trig, "none")) {
  915. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  916. } else if (!strcmp(trig, "trigger_te")) {
  917. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  918. } else if (!strcmp(trig, "trigger_sw")) {
  919. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  920. } else if (!strcmp(trig, "trigger_sw_seof")) {
  921. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  922. } else if (!strcmp(trig, "trigger_sw_te")) {
  923. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  924. } else {
  925. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  926. name, trig);
  927. rc = -EINVAL;
  928. }
  929. } else {
  930. pr_debug("[%s] Falling back to default MDP trigger\n", name);
  931. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  932. }
  933. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  934. &host->te_mode);
  935. if (rc) {
  936. pr_warn("[%s] fallback to default te-pin-select\n", name);
  937. host->te_mode = 1;
  938. rc = 0;
  939. }
  940. return rc;
  941. }
  942. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  943. struct dsi_parser_utils *utils,
  944. const char *name)
  945. {
  946. u32 val = 0;
  947. int rc = 0;
  948. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  949. if (!rc) {
  950. host->t_clk_post = val;
  951. pr_debug("[%s] t_clk_post = %d\n", name, val);
  952. }
  953. val = 0;
  954. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  955. if (!rc) {
  956. host->t_clk_pre = val;
  957. pr_debug("[%s] t_clk_pre = %d\n", name, val);
  958. }
  959. host->ignore_rx_eot = utils->read_bool(utils->data,
  960. "qcom,mdss-dsi-rx-eot-ignore");
  961. host->append_tx_eot = utils->read_bool(utils->data,
  962. "qcom,mdss-dsi-tx-eot-append");
  963. host->ext_bridge_mode = utils->read_bool(utils->data,
  964. "qcom,mdss-dsi-ext-bridge-mode");
  965. host->force_hs_clk_lane = utils->read_bool(utils->data,
  966. "qcom,mdss-dsi-force-clock-lane-hs");
  967. return 0;
  968. }
  969. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  970. struct dsi_parser_utils *utils,
  971. const char *name)
  972. {
  973. int rc = 0;
  974. u32 val = 0;
  975. bool supported = false;
  976. struct dsi_split_link_config *split_link = &host->split_link;
  977. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  978. if (!supported) {
  979. pr_debug("[%s] Split link is not supported\n", name);
  980. split_link->split_link_enabled = false;
  981. return;
  982. }
  983. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  984. if (rc || val < 1) {
  985. pr_debug("[%s] Using default sublinks count\n", name);
  986. split_link->num_sublinks = 2;
  987. } else {
  988. split_link->num_sublinks = val;
  989. }
  990. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  991. if (rc || val < 1) {
  992. pr_debug("[%s] Using default lanes per sublink\n", name);
  993. split_link->lanes_per_sublink = 2;
  994. } else {
  995. split_link->lanes_per_sublink = val;
  996. }
  997. pr_debug("[%s] Split link is supported %d-%d\n", name,
  998. split_link->num_sublinks, split_link->lanes_per_sublink);
  999. split_link->split_link_enabled = true;
  1000. }
  1001. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1002. {
  1003. int rc = 0;
  1004. struct dsi_parser_utils *utils = &panel->utils;
  1005. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1006. panel->name);
  1007. if (rc) {
  1008. pr_err("[%s] failed to get pixel format, rc=%d\n",
  1009. panel->name, rc);
  1010. goto error;
  1011. }
  1012. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1013. panel->name);
  1014. if (rc) {
  1015. pr_err("[%s] failed to parse lane states, rc=%d\n",
  1016. panel->name, rc);
  1017. goto error;
  1018. }
  1019. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1020. panel->name);
  1021. if (rc) {
  1022. pr_err("[%s] failed to parse color swap config, rc=%d\n",
  1023. panel->name, rc);
  1024. goto error;
  1025. }
  1026. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1027. panel->name);
  1028. if (rc) {
  1029. pr_err("[%s] failed to parse triggers, rc=%d\n",
  1030. panel->name, rc);
  1031. goto error;
  1032. }
  1033. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1034. panel->name);
  1035. if (rc) {
  1036. pr_err("[%s] failed to parse misc host config, rc=%d\n",
  1037. panel->name, rc);
  1038. goto error;
  1039. }
  1040. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1041. panel->name);
  1042. error:
  1043. return rc;
  1044. }
  1045. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1046. struct device_node *of_node)
  1047. {
  1048. int rc = 0;
  1049. u32 val = 0;
  1050. rc = of_property_read_u32(of_node,
  1051. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1052. &val);
  1053. if (rc)
  1054. pr_err("[%s] qsync min fps not defined rc:%d\n",
  1055. panel->name, rc);
  1056. panel->qsync_min_fps = val;
  1057. return rc;
  1058. }
  1059. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1060. {
  1061. int rc = 0;
  1062. bool supported = false;
  1063. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1064. struct dsi_parser_utils *utils = &panel->utils;
  1065. const char *name = panel->name;
  1066. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1067. if (!supported) {
  1068. dyn_clk_caps->dyn_clk_support = false;
  1069. return rc;
  1070. }
  1071. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1072. "qcom,dsi-dyn-clk-list");
  1073. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1074. pr_err("[%s] failed to get supported bit clk list\n", name);
  1075. return -EINVAL;
  1076. }
  1077. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1078. sizeof(u32), GFP_KERNEL);
  1079. if (!dyn_clk_caps->bit_clk_list)
  1080. return -ENOMEM;
  1081. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1082. dyn_clk_caps->bit_clk_list,
  1083. dyn_clk_caps->bit_clk_list_len);
  1084. if (rc) {
  1085. pr_err("[%s] failed to parse supported bit clk list\n", name);
  1086. return -EINVAL;
  1087. }
  1088. dyn_clk_caps->dyn_clk_support = true;
  1089. return 0;
  1090. }
  1091. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1092. {
  1093. int rc = 0;
  1094. bool supported = false;
  1095. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1096. struct dsi_parser_utils *utils = &panel->utils;
  1097. const char *name = panel->name;
  1098. const char *type;
  1099. u32 i;
  1100. supported = utils->read_bool(utils->data,
  1101. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1102. if (!supported) {
  1103. pr_debug("[%s] DFPS is not supported\n", name);
  1104. dfps_caps->dfps_support = false;
  1105. return rc;
  1106. }
  1107. type = utils->get_property(utils->data,
  1108. "qcom,mdss-dsi-pan-fps-update", NULL);
  1109. if (!type) {
  1110. pr_err("[%s] dfps type not defined\n", name);
  1111. rc = -EINVAL;
  1112. goto error;
  1113. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1114. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1115. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1116. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1117. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1118. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1119. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1120. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1121. } else {
  1122. pr_err("[%s] dfps type is not recognized\n", name);
  1123. rc = -EINVAL;
  1124. goto error;
  1125. }
  1126. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1127. "qcom,dsi-supported-dfps-list");
  1128. if (dfps_caps->dfps_list_len < 1) {
  1129. pr_err("[%s] dfps refresh list not present\n", name);
  1130. rc = -EINVAL;
  1131. goto error;
  1132. }
  1133. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1134. GFP_KERNEL);
  1135. if (!dfps_caps->dfps_list) {
  1136. rc = -ENOMEM;
  1137. goto error;
  1138. }
  1139. rc = utils->read_u32_array(utils->data,
  1140. "qcom,dsi-supported-dfps-list",
  1141. dfps_caps->dfps_list,
  1142. dfps_caps->dfps_list_len);
  1143. if (rc) {
  1144. pr_err("[%s] dfps refresh rate list parse failed\n", name);
  1145. rc = -EINVAL;
  1146. goto error;
  1147. }
  1148. dfps_caps->dfps_support = true;
  1149. /* calculate max and min fps */
  1150. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1151. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1152. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1153. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1154. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1155. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1156. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1157. }
  1158. error:
  1159. return rc;
  1160. }
  1161. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1162. struct dsi_parser_utils *utils,
  1163. const char *name)
  1164. {
  1165. int rc = 0;
  1166. const char *traffic_mode;
  1167. u32 vc_id = 0;
  1168. u32 val = 0;
  1169. u32 line_no = 0;
  1170. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1171. if (rc) {
  1172. pr_debug("[%s] fallback to default h-sync-pulse\n", name);
  1173. cfg->pulse_mode_hsa_he = false;
  1174. } else if (val == 1) {
  1175. cfg->pulse_mode_hsa_he = true;
  1176. } else if (val == 0) {
  1177. cfg->pulse_mode_hsa_he = false;
  1178. } else {
  1179. pr_err("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1180. name);
  1181. rc = -EINVAL;
  1182. goto error;
  1183. }
  1184. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1185. "qcom,mdss-dsi-hfp-power-mode");
  1186. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1187. "qcom,mdss-dsi-hbp-power-mode");
  1188. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1189. "qcom,mdss-dsi-hsa-power-mode");
  1190. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1191. "qcom,mdss-dsi-last-line-interleave");
  1192. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1193. "qcom,mdss-dsi-bllp-eof-power-mode");
  1194. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1195. "qcom,mdss-dsi-bllp-power-mode");
  1196. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1197. "qcom,mdss-dsi-force-clock-lane-hs");
  1198. traffic_mode = utils->get_property(utils->data,
  1199. "qcom,mdss-dsi-traffic-mode",
  1200. NULL);
  1201. if (!traffic_mode) {
  1202. pr_debug("[%s] Falling back to default traffic mode\n", name);
  1203. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1204. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1205. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1206. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1207. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1208. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1209. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1210. } else {
  1211. pr_err("[%s] Unrecognized traffic mode-%s\n", name,
  1212. traffic_mode);
  1213. rc = -EINVAL;
  1214. goto error;
  1215. }
  1216. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1217. &vc_id);
  1218. if (rc) {
  1219. pr_debug("[%s] Fallback to default vc id\n", name);
  1220. cfg->vc_id = 0;
  1221. } else {
  1222. cfg->vc_id = vc_id;
  1223. }
  1224. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1225. &line_no);
  1226. if (rc) {
  1227. pr_debug("[%s] set default dma scheduling line no\n", name);
  1228. cfg->dma_sched_line = 0x1;
  1229. /* do not fail since we have default value */
  1230. rc = 0;
  1231. } else {
  1232. cfg->dma_sched_line = line_no;
  1233. }
  1234. error:
  1235. return rc;
  1236. }
  1237. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1238. struct dsi_parser_utils *utils,
  1239. const char *name)
  1240. {
  1241. u32 val = 0;
  1242. int rc = 0;
  1243. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1244. if (rc) {
  1245. pr_debug("[%s] Fallback to default wr-mem-start\n", name);
  1246. cfg->wr_mem_start = 0x2C;
  1247. } else {
  1248. cfg->wr_mem_start = val;
  1249. }
  1250. val = 0;
  1251. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1252. &val);
  1253. if (rc) {
  1254. pr_debug("[%s] Fallback to default wr-mem-continue\n", name);
  1255. cfg->wr_mem_continue = 0x3C;
  1256. } else {
  1257. cfg->wr_mem_continue = val;
  1258. }
  1259. /* TODO: fix following */
  1260. cfg->max_cmd_packets_interleave = 0;
  1261. val = 0;
  1262. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1263. &val);
  1264. if (rc) {
  1265. pr_debug("[%s] fallback to default te-dcs-cmd\n", name);
  1266. cfg->insert_dcs_command = true;
  1267. } else if (val == 1) {
  1268. cfg->insert_dcs_command = true;
  1269. } else if (val == 0) {
  1270. cfg->insert_dcs_command = false;
  1271. } else {
  1272. pr_err("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1273. name);
  1274. rc = -EINVAL;
  1275. goto error;
  1276. }
  1277. error:
  1278. return rc;
  1279. }
  1280. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1281. {
  1282. int rc = 0;
  1283. struct dsi_parser_utils *utils = &panel->utils;
  1284. bool panel_mode_switch_enabled;
  1285. enum dsi_op_mode panel_mode;
  1286. const char *mode;
  1287. mode = utils->get_property(utils->data,
  1288. "qcom,mdss-dsi-panel-type", NULL);
  1289. if (!mode) {
  1290. pr_debug("[%s] Fallback to default panel mode\n", panel->name);
  1291. panel_mode = DSI_OP_VIDEO_MODE;
  1292. } else if (!strcmp(mode, "dsi_video_mode")) {
  1293. panel_mode = DSI_OP_VIDEO_MODE;
  1294. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1295. panel_mode = DSI_OP_CMD_MODE;
  1296. } else {
  1297. pr_err("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1298. rc = -EINVAL;
  1299. goto error;
  1300. }
  1301. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1302. "qcom,mdss-dsi-panel-mode-switch");
  1303. pr_info("%s: panel operating mode switch feature %s\n", __func__,
  1304. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1305. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1306. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1307. utils,
  1308. panel->name);
  1309. if (rc) {
  1310. pr_err("[%s] Failed to parse video host cfg, rc=%d\n",
  1311. panel->name, rc);
  1312. goto error;
  1313. }
  1314. }
  1315. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1316. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1317. utils,
  1318. panel->name);
  1319. if (rc) {
  1320. pr_err("[%s] Failed to parse cmd host config, rc=%d\n",
  1321. panel->name, rc);
  1322. goto error;
  1323. }
  1324. }
  1325. panel->panel_mode = panel_mode;
  1326. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1327. error:
  1328. return rc;
  1329. }
  1330. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1331. {
  1332. int rc = 0;
  1333. u32 val = 0;
  1334. const char *str;
  1335. struct dsi_panel_phy_props *props = &panel->phy_props;
  1336. struct dsi_parser_utils *utils = &panel->utils;
  1337. const char *name = panel->name;
  1338. rc = utils->read_u32(utils->data,
  1339. "qcom,mdss-pan-physical-width-dimension", &val);
  1340. if (rc) {
  1341. pr_debug("[%s] Physical panel width is not defined\n", name);
  1342. props->panel_width_mm = 0;
  1343. rc = 0;
  1344. } else {
  1345. props->panel_width_mm = val;
  1346. }
  1347. rc = utils->read_u32(utils->data,
  1348. "qcom,mdss-pan-physical-height-dimension",
  1349. &val);
  1350. if (rc) {
  1351. pr_debug("[%s] Physical panel height is not defined\n", name);
  1352. props->panel_height_mm = 0;
  1353. rc = 0;
  1354. } else {
  1355. props->panel_height_mm = val;
  1356. }
  1357. str = utils->get_property(utils->data,
  1358. "qcom,mdss-dsi-panel-orientation", NULL);
  1359. if (!str) {
  1360. props->rotation = DSI_PANEL_ROTATE_NONE;
  1361. } else if (!strcmp(str, "180")) {
  1362. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1363. } else if (!strcmp(str, "hflip")) {
  1364. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1365. } else if (!strcmp(str, "vflip")) {
  1366. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1367. } else {
  1368. pr_err("[%s] Unrecognized panel rotation-%s\n", name, str);
  1369. rc = -EINVAL;
  1370. goto error;
  1371. }
  1372. error:
  1373. return rc;
  1374. }
  1375. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1376. "qcom,mdss-dsi-pre-on-command",
  1377. "qcom,mdss-dsi-on-command",
  1378. "qcom,mdss-dsi-post-panel-on-command",
  1379. "qcom,mdss-dsi-pre-off-command",
  1380. "qcom,mdss-dsi-off-command",
  1381. "qcom,mdss-dsi-post-off-command",
  1382. "qcom,mdss-dsi-pre-res-switch",
  1383. "qcom,mdss-dsi-res-switch",
  1384. "qcom,mdss-dsi-post-res-switch",
  1385. "qcom,cmd-to-video-mode-switch-commands",
  1386. "qcom,cmd-to-video-mode-post-switch-commands",
  1387. "qcom,video-to-cmd-mode-switch-commands",
  1388. "qcom,video-to-cmd-mode-post-switch-commands",
  1389. "qcom,mdss-dsi-panel-status-command",
  1390. "qcom,mdss-dsi-lp1-command",
  1391. "qcom,mdss-dsi-lp2-command",
  1392. "qcom,mdss-dsi-nolp-command",
  1393. "PPS not parsed from DTSI, generated dynamically",
  1394. "ROI not parsed from DTSI, generated dynamically",
  1395. "qcom,mdss-dsi-timing-switch-command",
  1396. "qcom,mdss-dsi-post-mode-switch-on-command",
  1397. "qcom,mdss-dsi-qsync-on-commands",
  1398. "qcom,mdss-dsi-qsync-off-commands",
  1399. };
  1400. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1401. "qcom,mdss-dsi-pre-on-command-state",
  1402. "qcom,mdss-dsi-on-command-state",
  1403. "qcom,mdss-dsi-post-on-command-state",
  1404. "qcom,mdss-dsi-pre-off-command-state",
  1405. "qcom,mdss-dsi-off-command-state",
  1406. "qcom,mdss-dsi-post-off-command-state",
  1407. "qcom,mdss-dsi-pre-res-switch-state",
  1408. "qcom,mdss-dsi-res-switch-state",
  1409. "qcom,mdss-dsi-post-res-switch-state",
  1410. "qcom,cmd-to-video-mode-switch-commands-state",
  1411. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1412. "qcom,video-to-cmd-mode-switch-commands-state",
  1413. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1414. "qcom,mdss-dsi-panel-status-command-state",
  1415. "qcom,mdss-dsi-lp1-command-state",
  1416. "qcom,mdss-dsi-lp2-command-state",
  1417. "qcom,mdss-dsi-nolp-command-state",
  1418. "PPS not parsed from DTSI, generated dynamically",
  1419. "ROI not parsed from DTSI, generated dynamically",
  1420. "qcom,mdss-dsi-timing-switch-command-state",
  1421. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1422. "qcom,mdss-dsi-qsync-on-commands-state",
  1423. "qcom,mdss-dsi-qsync-off-commands-state",
  1424. };
  1425. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1426. {
  1427. const u32 cmd_set_min_size = 7;
  1428. u32 count = 0;
  1429. u32 packet_length;
  1430. u32 tmp;
  1431. while (length >= cmd_set_min_size) {
  1432. packet_length = cmd_set_min_size;
  1433. tmp = ((data[5] << 8) | (data[6]));
  1434. packet_length += tmp;
  1435. if (packet_length > length) {
  1436. pr_err("format error\n");
  1437. return -EINVAL;
  1438. }
  1439. length -= packet_length;
  1440. data += packet_length;
  1441. count++;
  1442. }
  1443. *cnt = count;
  1444. return 0;
  1445. }
  1446. static int dsi_panel_create_cmd_packets(const char *data,
  1447. u32 length,
  1448. u32 count,
  1449. struct dsi_cmd_desc *cmd)
  1450. {
  1451. int rc = 0;
  1452. int i, j;
  1453. u8 *payload;
  1454. for (i = 0; i < count; i++) {
  1455. u32 size;
  1456. cmd[i].msg.type = data[0];
  1457. cmd[i].last_command = (data[1] == 1);
  1458. cmd[i].msg.channel = data[2];
  1459. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1460. cmd[i].msg.ctrl = 0;
  1461. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1462. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1463. size = cmd[i].msg.tx_len * sizeof(u8);
  1464. payload = kzalloc(size, GFP_KERNEL);
  1465. if (!payload) {
  1466. rc = -ENOMEM;
  1467. goto error_free_payloads;
  1468. }
  1469. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1470. payload[j] = data[7 + j];
  1471. cmd[i].msg.tx_buf = payload;
  1472. data += (7 + cmd[i].msg.tx_len);
  1473. }
  1474. return rc;
  1475. error_free_payloads:
  1476. for (i = i - 1; i >= 0; i--) {
  1477. cmd--;
  1478. kfree(cmd->msg.tx_buf);
  1479. }
  1480. return rc;
  1481. }
  1482. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1483. {
  1484. u32 i = 0;
  1485. struct dsi_cmd_desc *cmd;
  1486. for (i = 0; i < set->count; i++) {
  1487. cmd = &set->cmds[i];
  1488. kfree(cmd->msg.tx_buf);
  1489. }
  1490. }
  1491. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1492. {
  1493. kfree(set->cmds);
  1494. }
  1495. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1496. u32 packet_count)
  1497. {
  1498. u32 size;
  1499. size = packet_count * sizeof(*cmd->cmds);
  1500. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1501. if (!cmd->cmds)
  1502. return -ENOMEM;
  1503. cmd->count = packet_count;
  1504. return 0;
  1505. }
  1506. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1507. enum dsi_cmd_set_type type,
  1508. struct dsi_parser_utils *utils)
  1509. {
  1510. int rc = 0;
  1511. u32 length = 0;
  1512. const char *data;
  1513. const char *state;
  1514. u32 packet_count = 0;
  1515. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1516. &length);
  1517. if (!data) {
  1518. pr_debug("%s commands not defined\n", cmd_set_prop_map[type]);
  1519. rc = -ENOTSUPP;
  1520. goto error;
  1521. }
  1522. pr_debug("type=%d, name=%s, length=%d\n", type,
  1523. cmd_set_prop_map[type], length);
  1524. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1525. 8, 1, data, length, false);
  1526. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1527. if (rc) {
  1528. pr_err("commands failed, rc=%d\n", rc);
  1529. goto error;
  1530. }
  1531. pr_debug("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1532. packet_count, length);
  1533. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1534. if (rc) {
  1535. pr_err("failed to allocate cmd packets, rc=%d\n", rc);
  1536. goto error;
  1537. }
  1538. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1539. cmd->cmds);
  1540. if (rc) {
  1541. pr_err("failed to create cmd packets, rc=%d\n", rc);
  1542. goto error_free_mem;
  1543. }
  1544. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1545. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1546. cmd->state = DSI_CMD_SET_STATE_LP;
  1547. } else if (!strcmp(state, "dsi_hs_mode")) {
  1548. cmd->state = DSI_CMD_SET_STATE_HS;
  1549. } else {
  1550. pr_err("[%s] command state unrecognized-%s\n",
  1551. cmd_set_state_map[type], state);
  1552. goto error_free_mem;
  1553. }
  1554. return rc;
  1555. error_free_mem:
  1556. kfree(cmd->cmds);
  1557. cmd->cmds = NULL;
  1558. error:
  1559. return rc;
  1560. }
  1561. static int dsi_panel_parse_cmd_sets(
  1562. struct dsi_display_mode_priv_info *priv_info,
  1563. struct dsi_parser_utils *utils)
  1564. {
  1565. int rc = 0;
  1566. struct dsi_panel_cmd_set *set;
  1567. u32 i;
  1568. if (!priv_info) {
  1569. pr_err("invalid mode priv info\n");
  1570. return -EINVAL;
  1571. }
  1572. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1573. set = &priv_info->cmd_sets[i];
  1574. set->type = i;
  1575. set->count = 0;
  1576. if (i == DSI_CMD_SET_PPS) {
  1577. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1578. if (rc)
  1579. pr_err("failed to allocate cmd set %d, rc = %d\n",
  1580. i, rc);
  1581. set->state = DSI_CMD_SET_STATE_LP;
  1582. } else {
  1583. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1584. if (rc)
  1585. pr_debug("failed to parse set %d\n", i);
  1586. }
  1587. }
  1588. rc = 0;
  1589. return rc;
  1590. }
  1591. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1592. {
  1593. int rc = 0;
  1594. int i;
  1595. u32 length = 0;
  1596. u32 count = 0;
  1597. u32 size = 0;
  1598. u32 *arr_32 = NULL;
  1599. const u32 *arr;
  1600. struct dsi_parser_utils *utils = &panel->utils;
  1601. struct dsi_reset_seq *seq;
  1602. if (panel->host_config.ext_bridge_mode)
  1603. return 0;
  1604. arr = utils->get_property(utils->data,
  1605. "qcom,mdss-dsi-reset-sequence", &length);
  1606. if (!arr) {
  1607. pr_err("[%s] dsi-reset-sequence not found\n", panel->name);
  1608. rc = -EINVAL;
  1609. goto error;
  1610. }
  1611. if (length & 0x1) {
  1612. pr_err("[%s] syntax error for dsi-reset-sequence\n",
  1613. panel->name);
  1614. rc = -EINVAL;
  1615. goto error;
  1616. }
  1617. pr_err("RESET SEQ LENGTH = %d\n", length);
  1618. length = length / sizeof(u32);
  1619. size = length * sizeof(u32);
  1620. arr_32 = kzalloc(size, GFP_KERNEL);
  1621. if (!arr_32) {
  1622. rc = -ENOMEM;
  1623. goto error;
  1624. }
  1625. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1626. arr_32, length);
  1627. if (rc) {
  1628. pr_err("[%s] cannot read dso-reset-seqience\n", panel->name);
  1629. goto error_free_arr_32;
  1630. }
  1631. count = length / 2;
  1632. size = count * sizeof(*seq);
  1633. seq = kzalloc(size, GFP_KERNEL);
  1634. if (!seq) {
  1635. rc = -ENOMEM;
  1636. goto error_free_arr_32;
  1637. }
  1638. panel->reset_config.sequence = seq;
  1639. panel->reset_config.count = count;
  1640. for (i = 0; i < length; i += 2) {
  1641. seq->level = arr_32[i];
  1642. seq->sleep_ms = arr_32[i + 1];
  1643. seq++;
  1644. }
  1645. error_free_arr_32:
  1646. kfree(arr_32);
  1647. error:
  1648. return rc;
  1649. }
  1650. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1651. {
  1652. struct dsi_parser_utils *utils = &panel->utils;
  1653. panel->ulps_feature_enabled =
  1654. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1655. pr_info("%s: ulps feature %s\n", __func__,
  1656. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1657. panel->ulps_suspend_enabled =
  1658. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1659. pr_info("%s: ulps during suspend feature %s\n", __func__,
  1660. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1661. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1662. "qcom,mdss-dsi-te-using-wd");
  1663. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1664. "qcom,cmd-sync-wait-broadcast");
  1665. panel->lp11_init = utils->read_bool(utils->data,
  1666. "qcom,mdss-dsi-lp11-init");
  1667. return 0;
  1668. }
  1669. static int dsi_panel_parse_jitter_config(
  1670. struct dsi_display_mode *mode,
  1671. struct dsi_parser_utils *utils)
  1672. {
  1673. int rc;
  1674. struct dsi_display_mode_priv_info *priv_info;
  1675. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1676. u64 jitter_val = 0;
  1677. priv_info = mode->priv_info;
  1678. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1679. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1680. if (rc) {
  1681. pr_debug("panel jitter not defined rc=%d\n", rc);
  1682. } else {
  1683. jitter_val = jitter[0];
  1684. jitter_val = div_u64(jitter_val, jitter[1]);
  1685. }
  1686. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1687. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1688. priv_info->panel_jitter_denom =
  1689. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1690. } else {
  1691. priv_info->panel_jitter_numer = jitter[0];
  1692. priv_info->panel_jitter_denom = jitter[1];
  1693. }
  1694. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1695. &priv_info->panel_prefill_lines);
  1696. if (rc) {
  1697. pr_debug("panel prefill lines are not defined rc=%d\n", rc);
  1698. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1699. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1700. } else if (priv_info->panel_prefill_lines >=
  1701. DSI_V_TOTAL(&mode->timing)) {
  1702. pr_debug("invalid prefill lines config=%d setting to:%d\n",
  1703. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1704. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1705. }
  1706. return 0;
  1707. }
  1708. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1709. {
  1710. int rc = 0;
  1711. char *supply_name;
  1712. if (panel->host_config.ext_bridge_mode)
  1713. return 0;
  1714. if (!strcmp(panel->type, "primary"))
  1715. supply_name = "qcom,panel-supply-entries";
  1716. else
  1717. supply_name = "qcom,panel-sec-supply-entries";
  1718. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1719. &panel->power_info, supply_name);
  1720. if (rc) {
  1721. pr_err("[%s] failed to parse vregs\n", panel->name);
  1722. goto error;
  1723. }
  1724. error:
  1725. return rc;
  1726. }
  1727. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1728. {
  1729. int rc = 0;
  1730. const char *data;
  1731. struct dsi_parser_utils *utils = &panel->utils;
  1732. char *reset_gpio_name, *mode_set_gpio_name;
  1733. if (!strcmp(panel->type, "primary")) {
  1734. reset_gpio_name = "qcom,platform-reset-gpio";
  1735. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1736. } else {
  1737. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1738. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1739. }
  1740. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1741. reset_gpio_name, 0);
  1742. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1743. !panel->host_config.ext_bridge_mode) {
  1744. rc = panel->reset_config.reset_gpio;
  1745. pr_err("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1746. goto error;
  1747. }
  1748. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1749. "qcom,5v-boost-gpio",
  1750. 0);
  1751. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1752. pr_debug("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1753. panel->name, rc);
  1754. panel->reset_config.disp_en_gpio =
  1755. utils->get_named_gpio(utils->data,
  1756. "qcom,platform-en-gpio", 0);
  1757. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1758. pr_debug("[%s] platform-en-gpio is not set, rc=%d\n",
  1759. panel->name, rc);
  1760. }
  1761. }
  1762. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1763. utils->data, mode_set_gpio_name, 0);
  1764. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1765. pr_debug("%s:%d mode gpio not specified\n", __func__, __LINE__);
  1766. pr_debug("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1767. data = utils->get_property(utils->data,
  1768. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1769. if (data) {
  1770. if (!strcmp(data, "single_port"))
  1771. panel->reset_config.mode_sel_state =
  1772. MODE_SEL_SINGLE_PORT;
  1773. else if (!strcmp(data, "dual_port"))
  1774. panel->reset_config.mode_sel_state =
  1775. MODE_SEL_DUAL_PORT;
  1776. else if (!strcmp(data, "high"))
  1777. panel->reset_config.mode_sel_state =
  1778. MODE_GPIO_HIGH;
  1779. else if (!strcmp(data, "low"))
  1780. panel->reset_config.mode_sel_state =
  1781. MODE_GPIO_LOW;
  1782. } else {
  1783. /* Set default mode as SPLIT mode */
  1784. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1785. }
  1786. /* TODO: release memory */
  1787. rc = dsi_panel_parse_reset_sequence(panel);
  1788. if (rc) {
  1789. pr_err("[%s] failed to parse reset sequence, rc=%d\n",
  1790. panel->name, rc);
  1791. goto error;
  1792. }
  1793. error:
  1794. return rc;
  1795. }
  1796. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1797. {
  1798. int rc = 0;
  1799. u32 val;
  1800. struct dsi_backlight_config *config = &panel->bl_config;
  1801. struct dsi_parser_utils *utils = &panel->utils;
  1802. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1803. &val);
  1804. if (rc) {
  1805. pr_err("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1806. goto error;
  1807. }
  1808. config->pwm_period_usecs = val;
  1809. error:
  1810. return rc;
  1811. }
  1812. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1813. {
  1814. int rc = 0;
  1815. u32 val = 0;
  1816. const char *bl_type;
  1817. const char *data;
  1818. struct dsi_parser_utils *utils = &panel->utils;
  1819. char *bl_name;
  1820. if (!strcmp(panel->type, "primary"))
  1821. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1822. else
  1823. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1824. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1825. if (!bl_type) {
  1826. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1827. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1828. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1829. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1830. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1831. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1832. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1833. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1834. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1835. } else {
  1836. pr_debug("[%s] bl-pmic-control-type unknown-%s\n",
  1837. panel->name, bl_type);
  1838. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1839. }
  1840. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1841. if (!data) {
  1842. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1843. } else if (!strcmp(data, "delay_until_first_frame")) {
  1844. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1845. } else {
  1846. pr_debug("[%s] No valid bl-update-flag: %s\n",
  1847. panel->name, data);
  1848. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1849. }
  1850. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1851. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1852. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1853. if (rc) {
  1854. pr_debug("[%s] bl-min-level unspecified, defaulting to zero\n",
  1855. panel->name);
  1856. panel->bl_config.bl_min_level = 0;
  1857. } else {
  1858. panel->bl_config.bl_min_level = val;
  1859. }
  1860. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1861. if (rc) {
  1862. pr_debug("[%s] bl-max-level unspecified, defaulting to max level\n",
  1863. panel->name);
  1864. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1865. } else {
  1866. panel->bl_config.bl_max_level = val;
  1867. }
  1868. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1869. &val);
  1870. if (rc) {
  1871. pr_debug("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1872. panel->name);
  1873. panel->bl_config.brightness_max_level = 255;
  1874. } else {
  1875. panel->bl_config.brightness_max_level = val;
  1876. }
  1877. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1878. rc = dsi_panel_parse_bl_pwm_config(panel);
  1879. if (rc) {
  1880. pr_err("[%s] failed to parse pwm config, rc=%d\n",
  1881. panel->name, rc);
  1882. goto error;
  1883. }
  1884. }
  1885. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1886. "qcom,platform-bklight-en-gpio",
  1887. 0);
  1888. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1889. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1890. pr_debug("[%s] failed to get bklt gpio, rc=%d\n",
  1891. panel->name, rc);
  1892. rc = -EPROBE_DEFER;
  1893. goto error;
  1894. } else {
  1895. pr_debug("[%s] failed to get bklt gpio, rc=%d\n",
  1896. panel->name, rc);
  1897. rc = 0;
  1898. goto error;
  1899. }
  1900. }
  1901. error:
  1902. return rc;
  1903. }
  1904. void dsi_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, int intf_width)
  1905. {
  1906. int slice_per_pkt, slice_per_intf;
  1907. int bytes_in_slice, total_bytes_per_intf;
  1908. if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt ||
  1909. (intf_width < dsc->slice_width)) {
  1910. pr_err("invalid input, intf_width=%d slice_width=%d\n",
  1911. intf_width, dsc ? dsc->slice_width : -1);
  1912. return;
  1913. }
  1914. slice_per_pkt = dsc->slice_per_pkt;
  1915. slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width);
  1916. /*
  1917. * If slice_per_pkt is greater than slice_per_intf then default to 1.
  1918. * This can happen during partial update.
  1919. */
  1920. if (slice_per_pkt > slice_per_intf)
  1921. slice_per_pkt = 1;
  1922. bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8);
  1923. total_bytes_per_intf = bytes_in_slice * slice_per_intf;
  1924. dsc->eol_byte_num = total_bytes_per_intf % 3;
  1925. dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
  1926. dsc->bytes_in_slice = bytes_in_slice;
  1927. dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
  1928. dsc->pkt_per_line = slice_per_intf / slice_per_pkt;
  1929. }
  1930. int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
  1931. {
  1932. int bpp, bpc;
  1933. int mux_words_size;
  1934. int groups_per_line, groups_total;
  1935. int min_rate_buffer_size;
  1936. int hrd_delay;
  1937. int pre_num_extra_mux_bits, num_extra_mux_bits;
  1938. int slice_bits;
  1939. int data;
  1940. int final_value, final_scale;
  1941. int ratio_index, mod_offset;
  1942. dsc->rc_model_size = 8192;
  1943. if (dsc->version == 0x11 && dsc->scr_rev == 0x1)
  1944. dsc->first_line_bpg_offset = 15;
  1945. else
  1946. dsc->first_line_bpg_offset = 12;
  1947. dsc->edge_factor = 6;
  1948. dsc->tgt_offset_hi = 3;
  1949. dsc->tgt_offset_lo = 3;
  1950. dsc->enable_422 = 0;
  1951. dsc->convert_rgb = 1;
  1952. dsc->vbr_enable = 0;
  1953. dsc->buf_thresh = dsi_dsc_rc_buf_thresh;
  1954. bpp = dsc->bpp;
  1955. bpc = dsc->bpc;
  1956. if ((bpc == 12) && (bpp == 8))
  1957. ratio_index = DSC_12BPC_8BPP;
  1958. else if ((bpc == 10) && (bpp == 8))
  1959. ratio_index = DSC_10BPC_8BPP;
  1960. else if ((bpc == 10) && (bpp == 10))
  1961. ratio_index = DSC_10BPC_10BPP;
  1962. else
  1963. ratio_index = DSC_8BPC_8BPP;
  1964. if (dsc->version == 0x11 && dsc->scr_rev == 0x1) {
  1965. dsc->range_min_qp =
  1966. dsi_dsc_rc_range_min_qp_1_1_scr1[ratio_index];
  1967. dsc->range_max_qp =
  1968. dsi_dsc_rc_range_max_qp_1_1_scr1[ratio_index];
  1969. } else {
  1970. dsc->range_min_qp = dsi_dsc_rc_range_min_qp_1_1[ratio_index];
  1971. dsc->range_max_qp = dsi_dsc_rc_range_max_qp_1_1[ratio_index];
  1972. }
  1973. dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
  1974. if (bpp == 8) {
  1975. dsc->initial_offset = 6144;
  1976. dsc->initial_xmit_delay = 512;
  1977. } else if (bpp == 10) {
  1978. dsc->initial_offset = 5632;
  1979. dsc->initial_xmit_delay = 410;
  1980. } else {
  1981. dsc->initial_offset = 2048;
  1982. dsc->initial_xmit_delay = 341;
  1983. }
  1984. dsc->line_buf_depth = bpc + 1;
  1985. if (bpc == 8) {
  1986. dsc->input_10_bits = 0;
  1987. dsc->min_qp_flatness = 3;
  1988. dsc->max_qp_flatness = 12;
  1989. dsc->quant_incr_limit0 = 11;
  1990. dsc->quant_incr_limit1 = 11;
  1991. mux_words_size = 48;
  1992. } else if (bpc == 10) { /* 10bpc */
  1993. dsc->input_10_bits = 1;
  1994. dsc->min_qp_flatness = 7;
  1995. dsc->max_qp_flatness = 16;
  1996. dsc->quant_incr_limit0 = 15;
  1997. dsc->quant_incr_limit1 = 15;
  1998. mux_words_size = 48;
  1999. } else { /* 12 bpc */
  2000. dsc->input_10_bits = 0;
  2001. dsc->min_qp_flatness = 11;
  2002. dsc->max_qp_flatness = 20;
  2003. dsc->quant_incr_limit0 = 19;
  2004. dsc->quant_incr_limit1 = 19;
  2005. mux_words_size = 64;
  2006. }
  2007. mod_offset = dsc->slice_width % 3;
  2008. switch (mod_offset) {
  2009. case 0:
  2010. dsc->slice_last_group_size = 2;
  2011. break;
  2012. case 1:
  2013. dsc->slice_last_group_size = 0;
  2014. break;
  2015. case 2:
  2016. dsc->slice_last_group_size = 1;
  2017. break;
  2018. default:
  2019. break;
  2020. }
  2021. dsc->det_thresh_flatness = 2 << (bpc - 8);
  2022. groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
  2023. dsc->chunk_size = dsc->slice_width * bpp / 8;
  2024. if ((dsc->slice_width * bpp) % 8)
  2025. dsc->chunk_size++;
  2026. /* rbs-min */
  2027. min_rate_buffer_size = dsc->rc_model_size - dsc->initial_offset +
  2028. dsc->initial_xmit_delay * bpp +
  2029. groups_per_line * dsc->first_line_bpg_offset;
  2030. hrd_delay = DIV_ROUND_UP(min_rate_buffer_size, bpp);
  2031. dsc->initial_dec_delay = hrd_delay - dsc->initial_xmit_delay;
  2032. dsc->initial_scale_value = 8 * dsc->rc_model_size /
  2033. (dsc->rc_model_size - dsc->initial_offset);
  2034. slice_bits = 8 * dsc->chunk_size * dsc->slice_height;
  2035. groups_total = groups_per_line * dsc->slice_height;
  2036. data = dsc->first_line_bpg_offset * 2048;
  2037. dsc->nfl_bpg_offset = DIV_ROUND_UP(data, (dsc->slice_height - 1));
  2038. pre_num_extra_mux_bits = 3 * (mux_words_size + (4 * bpc + 4) - 2);
  2039. num_extra_mux_bits = pre_num_extra_mux_bits - (mux_words_size -
  2040. ((slice_bits - pre_num_extra_mux_bits) % mux_words_size));
  2041. data = 2048 * (dsc->rc_model_size - dsc->initial_offset
  2042. + num_extra_mux_bits);
  2043. dsc->slice_bpg_offset = DIV_ROUND_UP(data, groups_total);
  2044. data = dsc->initial_xmit_delay * bpp;
  2045. final_value = dsc->rc_model_size - data + num_extra_mux_bits;
  2046. final_scale = 8 * dsc->rc_model_size /
  2047. (dsc->rc_model_size - final_value);
  2048. dsc->final_offset = final_value;
  2049. data = (final_scale - 9) * (dsc->nfl_bpg_offset +
  2050. dsc->slice_bpg_offset);
  2051. dsc->scale_increment_interval = (2048 * dsc->final_offset) / data;
  2052. dsc->scale_decrement_interval = groups_per_line /
  2053. (dsc->initial_scale_value - 8);
  2054. return 0;
  2055. }
  2056. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2057. struct dsi_parser_utils *utils)
  2058. {
  2059. const char *data;
  2060. u32 len, i;
  2061. int rc = 0;
  2062. struct dsi_display_mode_priv_info *priv_info;
  2063. struct dsi_mode_info *timing = NULL;
  2064. if (!mode || !mode->priv_info)
  2065. return -EINVAL;
  2066. priv_info = mode->priv_info;
  2067. data = utils->get_property(utils->data,
  2068. "qcom,mdss-dsi-panel-phy-timings", &len);
  2069. if (!data) {
  2070. pr_debug("Unable to read Phy timing settings\n");
  2071. } else {
  2072. priv_info->phy_timing_val =
  2073. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2074. if (!priv_info->phy_timing_val)
  2075. return -EINVAL;
  2076. for (i = 0; i < len; i++)
  2077. priv_info->phy_timing_val[i] = data[i];
  2078. priv_info->phy_timing_len = len;
  2079. }
  2080. timing = &mode->timing;
  2081. mode->pixel_clk_khz = (DSI_H_TOTAL(&mode->timing) *
  2082. DSI_V_TOTAL(&mode->timing) *
  2083. mode->timing.refresh_rate) / 1000;
  2084. return rc;
  2085. }
  2086. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2087. struct dsi_parser_utils *utils)
  2088. {
  2089. u32 data;
  2090. int rc = -EINVAL;
  2091. int intf_width;
  2092. const char *compression;
  2093. struct dsi_display_mode_priv_info *priv_info;
  2094. if (!mode || !mode->priv_info)
  2095. return -EINVAL;
  2096. priv_info = mode->priv_info;
  2097. priv_info->dsc_enabled = false;
  2098. compression = utils->get_property(utils->data,
  2099. "qcom,compression-mode", NULL);
  2100. if (compression && !strcmp(compression, "dsc"))
  2101. priv_info->dsc_enabled = true;
  2102. if (!priv_info->dsc_enabled) {
  2103. pr_debug("dsc compression is not enabled for the mode\n");
  2104. return 0;
  2105. }
  2106. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2107. if (rc) {
  2108. priv_info->dsc.version = 0x11;
  2109. rc = 0;
  2110. } else {
  2111. priv_info->dsc.version = data & 0xff;
  2112. /* only support DSC 1.1 rev */
  2113. if (priv_info->dsc.version != 0x11) {
  2114. pr_err("%s: DSC version:%d not supported\n", __func__,
  2115. priv_info->dsc.version);
  2116. rc = -EINVAL;
  2117. goto error;
  2118. }
  2119. }
  2120. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2121. if (rc) {
  2122. priv_info->dsc.scr_rev = 0x0;
  2123. rc = 0;
  2124. } else {
  2125. priv_info->dsc.scr_rev = data & 0xff;
  2126. /* only one scr rev supported */
  2127. if (priv_info->dsc.scr_rev > 0x1) {
  2128. pr_err("%s: DSC scr version:%d not supported\n",
  2129. __func__, priv_info->dsc.scr_rev);
  2130. rc = -EINVAL;
  2131. goto error;
  2132. }
  2133. }
  2134. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2135. if (rc) {
  2136. pr_err("failed to parse qcom,mdss-dsc-slice-height\n");
  2137. goto error;
  2138. }
  2139. priv_info->dsc.slice_height = data;
  2140. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2141. if (rc) {
  2142. pr_err("failed to parse qcom,mdss-dsc-slice-width\n");
  2143. goto error;
  2144. }
  2145. priv_info->dsc.slice_width = data;
  2146. intf_width = mode->timing.h_active;
  2147. if (intf_width % priv_info->dsc.slice_width) {
  2148. pr_err("invalid slice width for the intf width:%d slice width:%d\n",
  2149. intf_width, priv_info->dsc.slice_width);
  2150. rc = -EINVAL;
  2151. goto error;
  2152. }
  2153. priv_info->dsc.pic_width = mode->timing.h_active;
  2154. priv_info->dsc.pic_height = mode->timing.v_active;
  2155. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2156. if (rc) {
  2157. pr_err("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2158. goto error;
  2159. } else if (!data || (data > 2)) {
  2160. pr_err("invalid dsc slice-per-pkt:%d\n", data);
  2161. goto error;
  2162. }
  2163. priv_info->dsc.slice_per_pkt = data;
  2164. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2165. &data);
  2166. if (rc) {
  2167. pr_err("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2168. goto error;
  2169. }
  2170. priv_info->dsc.bpc = data;
  2171. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2172. &data);
  2173. if (rc) {
  2174. pr_err("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2175. goto error;
  2176. }
  2177. priv_info->dsc.bpp = data;
  2178. priv_info->dsc.block_pred_enable = utils->read_bool(utils->data,
  2179. "qcom,mdss-dsc-block-prediction-enable");
  2180. priv_info->dsc.full_frame_slices = DIV_ROUND_UP(intf_width,
  2181. priv_info->dsc.slice_width);
  2182. dsi_dsc_populate_static_param(&priv_info->dsc);
  2183. dsi_dsc_pclk_param_calc(&priv_info->dsc, intf_width);
  2184. mode->timing.dsc_enabled = true;
  2185. mode->timing.dsc = &priv_info->dsc;
  2186. error:
  2187. return rc;
  2188. }
  2189. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2190. {
  2191. int rc = 0;
  2192. struct drm_panel_hdr_properties *hdr_prop;
  2193. struct dsi_parser_utils *utils = &panel->utils;
  2194. hdr_prop = &panel->hdr_props;
  2195. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2196. "qcom,mdss-dsi-panel-hdr-enabled");
  2197. if (hdr_prop->hdr_enabled) {
  2198. rc = utils->read_u32_array(utils->data,
  2199. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2200. hdr_prop->display_primaries,
  2201. DISPLAY_PRIMARIES_MAX);
  2202. if (rc) {
  2203. pr_err("%s:%d, Unable to read color primaries,rc:%u\n",
  2204. __func__, __LINE__, rc);
  2205. hdr_prop->hdr_enabled = false;
  2206. return rc;
  2207. }
  2208. rc = utils->read_u32(utils->data,
  2209. "qcom,mdss-dsi-panel-peak-brightness",
  2210. &(hdr_prop->peak_brightness));
  2211. if (rc) {
  2212. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2213. __func__, __LINE__, rc);
  2214. hdr_prop->hdr_enabled = false;
  2215. return rc;
  2216. }
  2217. rc = utils->read_u32(utils->data,
  2218. "qcom,mdss-dsi-panel-blackness-level",
  2219. &(hdr_prop->blackness_level));
  2220. if (rc) {
  2221. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2222. __func__, __LINE__, rc);
  2223. hdr_prop->hdr_enabled = false;
  2224. return rc;
  2225. }
  2226. }
  2227. return 0;
  2228. }
  2229. static int dsi_panel_parse_topology(
  2230. struct dsi_display_mode_priv_info *priv_info,
  2231. struct dsi_parser_utils *utils,
  2232. int topology_override)
  2233. {
  2234. struct msm_display_topology *topology;
  2235. u32 top_count, top_sel, *array = NULL;
  2236. int i, len = 0;
  2237. int rc = -EINVAL;
  2238. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2239. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2240. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2241. pr_err("invalid topology list for the panel, rc = %d\n", rc);
  2242. return rc;
  2243. }
  2244. top_count = len / TOPOLOGY_SET_LEN;
  2245. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2246. if (!array)
  2247. return -ENOMEM;
  2248. rc = utils->read_u32_array(utils->data,
  2249. "qcom,display-topology", array, len);
  2250. if (rc) {
  2251. pr_err("unable to read the display topologies, rc = %d\n", rc);
  2252. goto read_fail;
  2253. }
  2254. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2255. if (!topology) {
  2256. rc = -ENOMEM;
  2257. goto read_fail;
  2258. }
  2259. for (i = 0; i < top_count; i++) {
  2260. struct msm_display_topology *top = &topology[i];
  2261. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2262. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2263. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2264. }
  2265. if (topology_override >= 0 && topology_override < top_count) {
  2266. pr_info("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2267. topology_override,
  2268. topology[topology_override].num_lm,
  2269. topology[topology_override].num_enc,
  2270. topology[topology_override].num_intf);
  2271. top_sel = topology_override;
  2272. goto parse_done;
  2273. }
  2274. rc = utils->read_u32(utils->data,
  2275. "qcom,default-topology-index", &top_sel);
  2276. if (rc) {
  2277. pr_err("no default topology selected, rc = %d\n", rc);
  2278. goto parse_fail;
  2279. }
  2280. if (top_sel >= top_count) {
  2281. rc = -EINVAL;
  2282. pr_err("default topology is specified is not valid, rc = %d\n",
  2283. rc);
  2284. goto parse_fail;
  2285. }
  2286. pr_info("default topology: lm: %d comp_enc:%d intf: %d\n",
  2287. topology[top_sel].num_lm,
  2288. topology[top_sel].num_enc,
  2289. topology[top_sel].num_intf);
  2290. parse_done:
  2291. memcpy(&priv_info->topology, &topology[top_sel],
  2292. sizeof(struct msm_display_topology));
  2293. parse_fail:
  2294. kfree(topology);
  2295. read_fail:
  2296. kfree(array);
  2297. return rc;
  2298. }
  2299. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2300. struct msm_roi_alignment *align)
  2301. {
  2302. int len = 0, rc = 0;
  2303. u32 value[6];
  2304. struct property *data;
  2305. if (!align)
  2306. return -EINVAL;
  2307. memset(align, 0, sizeof(*align));
  2308. data = utils->find_property(utils->data,
  2309. "qcom,panel-roi-alignment", &len);
  2310. len /= sizeof(u32);
  2311. if (!data) {
  2312. pr_err("panel roi alignment not found\n");
  2313. rc = -EINVAL;
  2314. } else if (len != 6) {
  2315. pr_err("incorrect roi alignment len %d\n", len);
  2316. rc = -EINVAL;
  2317. } else {
  2318. rc = utils->read_u32_array(utils->data,
  2319. "qcom,panel-roi-alignment", value, len);
  2320. if (rc)
  2321. pr_debug("error reading panel roi alignment values\n");
  2322. else {
  2323. align->xstart_pix_align = value[0];
  2324. align->ystart_pix_align = value[1];
  2325. align->width_pix_align = value[2];
  2326. align->height_pix_align = value[3];
  2327. align->min_width = value[4];
  2328. align->min_height = value[5];
  2329. }
  2330. pr_info("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2331. align->xstart_pix_align,
  2332. align->width_pix_align,
  2333. align->ystart_pix_align,
  2334. align->height_pix_align,
  2335. align->min_width,
  2336. align->min_height);
  2337. }
  2338. return rc;
  2339. }
  2340. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2341. struct dsi_parser_utils *utils)
  2342. {
  2343. struct msm_roi_caps *roi_caps = NULL;
  2344. const char *data;
  2345. int rc = 0;
  2346. if (!mode || !mode->priv_info) {
  2347. pr_err("invalid arguments\n");
  2348. return -EINVAL;
  2349. }
  2350. roi_caps = &mode->priv_info->roi_caps;
  2351. memset(roi_caps, 0, sizeof(*roi_caps));
  2352. data = utils->get_property(utils->data,
  2353. "qcom,partial-update-enabled", NULL);
  2354. if (data) {
  2355. if (!strcmp(data, "dual_roi"))
  2356. roi_caps->num_roi = 2;
  2357. else if (!strcmp(data, "single_roi"))
  2358. roi_caps->num_roi = 1;
  2359. else {
  2360. pr_info(
  2361. "invalid value for qcom,partial-update-enabled: %s\n",
  2362. data);
  2363. return 0;
  2364. }
  2365. } else {
  2366. pr_info("partial update disabled as the property is not set\n");
  2367. return 0;
  2368. }
  2369. roi_caps->merge_rois = utils->read_bool(utils->data,
  2370. "qcom,partial-update-roi-merge");
  2371. roi_caps->enabled = roi_caps->num_roi > 0;
  2372. pr_info("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2373. roi_caps->enabled);
  2374. if (roi_caps->enabled)
  2375. rc = dsi_panel_parse_roi_alignment(utils,
  2376. &roi_caps->align);
  2377. if (rc)
  2378. memset(roi_caps, 0, sizeof(*roi_caps));
  2379. return rc;
  2380. }
  2381. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2382. struct dsi_parser_utils *utils)
  2383. {
  2384. bool vid_mode_support, cmd_mode_support;
  2385. if (!mode || !mode->priv_info) {
  2386. pr_err("invalid arguments\n");
  2387. return -EINVAL;
  2388. }
  2389. vid_mode_support = utils->read_bool(utils->data,
  2390. "qcom,mdss-dsi-video-mode");
  2391. cmd_mode_support = utils->read_bool(utils->data,
  2392. "qcom,mdss-dsi-cmd-mode");
  2393. if (cmd_mode_support)
  2394. mode->panel_mode = DSI_OP_CMD_MODE;
  2395. else if (vid_mode_support)
  2396. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2397. else
  2398. return -EINVAL;
  2399. return 0;
  2400. };
  2401. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2402. {
  2403. int dms_enabled;
  2404. const char *data;
  2405. struct dsi_parser_utils *utils = &panel->utils;
  2406. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2407. dms_enabled = utils->read_bool(utils->data,
  2408. "qcom,dynamic-mode-switch-enabled");
  2409. if (!dms_enabled)
  2410. return 0;
  2411. data = utils->get_property(utils->data,
  2412. "qcom,dynamic-mode-switch-type", NULL);
  2413. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2414. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2415. } else {
  2416. pr_err("[%s] unsupported dynamic switch mode: %s\n",
  2417. panel->name, data);
  2418. return -EINVAL;
  2419. }
  2420. return 0;
  2421. };
  2422. /*
  2423. * The length of all the valid values to be checked should not be greater
  2424. * than the length of returned data from read command.
  2425. */
  2426. static bool
  2427. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2428. {
  2429. int i;
  2430. struct drm_panel_esd_config *config = &panel->esd_config;
  2431. for (i = 0; i < count; ++i) {
  2432. if (config->status_valid_params[i] >
  2433. config->status_cmds_rlen[i]) {
  2434. pr_debug("ignore valid params\n");
  2435. return false;
  2436. }
  2437. }
  2438. return true;
  2439. }
  2440. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2441. char *prop_key, u32 **target, u32 cmd_cnt)
  2442. {
  2443. int tmp;
  2444. if (!utils->find_property(utils->data, prop_key, &tmp))
  2445. return false;
  2446. tmp /= sizeof(u32);
  2447. if (tmp != cmd_cnt) {
  2448. pr_err("request property(%d) do not match cmd count(%d)\n",
  2449. tmp, cmd_cnt);
  2450. return false;
  2451. }
  2452. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2453. if (IS_ERR_OR_NULL(*target)) {
  2454. pr_err("Error allocating memory for property\n");
  2455. return false;
  2456. }
  2457. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2458. pr_err("cannot get values from dts\n");
  2459. kfree(*target);
  2460. *target = NULL;
  2461. return false;
  2462. }
  2463. return true;
  2464. }
  2465. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2466. {
  2467. kfree(esd_config->status_buf);
  2468. kfree(esd_config->return_buf);
  2469. kfree(esd_config->status_value);
  2470. kfree(esd_config->status_valid_params);
  2471. kfree(esd_config->status_cmds_rlen);
  2472. kfree(esd_config->status_cmd.cmds);
  2473. }
  2474. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2475. {
  2476. struct drm_panel_esd_config *esd_config;
  2477. int rc = 0;
  2478. u32 tmp;
  2479. u32 i, status_len, *lenp;
  2480. struct property *data;
  2481. struct dsi_parser_utils *utils = &panel->utils;
  2482. if (!panel) {
  2483. pr_err("Invalid Params\n");
  2484. return -EINVAL;
  2485. }
  2486. esd_config = &panel->esd_config;
  2487. if (!esd_config)
  2488. return -EINVAL;
  2489. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2490. DSI_CMD_SET_PANEL_STATUS, utils);
  2491. if (!esd_config->status_cmd.count) {
  2492. pr_err("panel status command parsing failed\n");
  2493. rc = -EINVAL;
  2494. goto error;
  2495. }
  2496. if (!dsi_panel_parse_esd_status_len(utils,
  2497. "qcom,mdss-dsi-panel-status-read-length",
  2498. &panel->esd_config.status_cmds_rlen,
  2499. esd_config->status_cmd.count)) {
  2500. pr_err("Invalid status read length\n");
  2501. rc = -EINVAL;
  2502. goto error1;
  2503. }
  2504. if (dsi_panel_parse_esd_status_len(utils,
  2505. "qcom,mdss-dsi-panel-status-valid-params",
  2506. &panel->esd_config.status_valid_params,
  2507. esd_config->status_cmd.count)) {
  2508. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2509. esd_config->status_cmd.count)) {
  2510. rc = -EINVAL;
  2511. goto error2;
  2512. }
  2513. }
  2514. status_len = 0;
  2515. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2516. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2517. status_len += lenp[i];
  2518. if (!status_len) {
  2519. rc = -EINVAL;
  2520. goto error2;
  2521. }
  2522. /*
  2523. * Some panel may need multiple read commands to properly
  2524. * check panel status. Do a sanity check for proper status
  2525. * value which will be compared with the value read by dsi
  2526. * controller during ESD check. Also check if multiple read
  2527. * commands are there then, there should be corresponding
  2528. * status check values for each read command.
  2529. */
  2530. data = utils->find_property(utils->data,
  2531. "qcom,mdss-dsi-panel-status-value", &tmp);
  2532. tmp /= sizeof(u32);
  2533. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2534. esd_config->groups = tmp / status_len;
  2535. } else {
  2536. pr_err("error parse panel-status-value\n");
  2537. rc = -EINVAL;
  2538. goto error2;
  2539. }
  2540. esd_config->status_value =
  2541. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2542. GFP_KERNEL);
  2543. if (!esd_config->status_value) {
  2544. rc = -ENOMEM;
  2545. goto error2;
  2546. }
  2547. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2548. sizeof(unsigned char), GFP_KERNEL);
  2549. if (!esd_config->return_buf) {
  2550. rc = -ENOMEM;
  2551. goto error3;
  2552. }
  2553. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2554. if (!esd_config->status_buf) {
  2555. rc = -ENOMEM;
  2556. goto error4;
  2557. }
  2558. rc = utils->read_u32_array(utils->data,
  2559. "qcom,mdss-dsi-panel-status-value",
  2560. esd_config->status_value, esd_config->groups * status_len);
  2561. if (rc) {
  2562. pr_debug("error reading panel status values\n");
  2563. memset(esd_config->status_value, 0,
  2564. esd_config->groups * status_len);
  2565. }
  2566. return 0;
  2567. error4:
  2568. kfree(esd_config->return_buf);
  2569. error3:
  2570. kfree(esd_config->status_value);
  2571. error2:
  2572. kfree(esd_config->status_valid_params);
  2573. kfree(esd_config->status_cmds_rlen);
  2574. error1:
  2575. kfree(esd_config->status_cmd.cmds);
  2576. error:
  2577. return rc;
  2578. }
  2579. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2580. {
  2581. int rc = 0;
  2582. const char *string;
  2583. struct drm_panel_esd_config *esd_config;
  2584. struct dsi_parser_utils *utils = &panel->utils;
  2585. u8 *esd_mode = NULL;
  2586. esd_config = &panel->esd_config;
  2587. esd_config->status_mode = ESD_MODE_MAX;
  2588. esd_config->esd_enabled = utils->read_bool(utils->data,
  2589. "qcom,esd-check-enabled");
  2590. if (!esd_config->esd_enabled)
  2591. return 0;
  2592. rc = utils->read_string(utils->data,
  2593. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2594. if (!rc) {
  2595. if (!strcmp(string, "bta_check")) {
  2596. esd_config->status_mode = ESD_MODE_SW_BTA;
  2597. } else if (!strcmp(string, "reg_read")) {
  2598. esd_config->status_mode = ESD_MODE_REG_READ;
  2599. } else if (!strcmp(string, "te_signal_check")) {
  2600. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2601. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2602. } else {
  2603. pr_err("TE-ESD not valid for video mode\n");
  2604. rc = -EINVAL;
  2605. goto error;
  2606. }
  2607. } else {
  2608. pr_err("No valid panel-status-check-mode string\n");
  2609. rc = -EINVAL;
  2610. goto error;
  2611. }
  2612. } else {
  2613. pr_debug("status check method not defined!\n");
  2614. rc = -EINVAL;
  2615. goto error;
  2616. }
  2617. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2618. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2619. if (rc) {
  2620. pr_err("failed to parse esd reg read mode params, rc=%d\n",
  2621. rc);
  2622. goto error;
  2623. }
  2624. esd_mode = "register_read";
  2625. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2626. esd_mode = "bta_trigger";
  2627. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2628. esd_mode = "te_check";
  2629. }
  2630. pr_info("ESD enabled with mode: %s\n", esd_mode);
  2631. return 0;
  2632. error:
  2633. panel->esd_config.esd_enabled = false;
  2634. return rc;
  2635. }
  2636. static void dsi_panel_update_util(struct dsi_panel *panel,
  2637. struct device_node *parser_node)
  2638. {
  2639. struct dsi_parser_utils *utils = &panel->utils;
  2640. if (parser_node) {
  2641. *utils = *dsi_parser_get_parser_utils();
  2642. utils->data = parser_node;
  2643. pr_debug("switching to parser APIs\n");
  2644. goto end;
  2645. }
  2646. *utils = *dsi_parser_get_of_utils();
  2647. utils->data = panel->panel_of_node;
  2648. end:
  2649. utils->node = panel->panel_of_node;
  2650. }
  2651. struct dsi_panel *dsi_panel_get(struct device *parent,
  2652. struct device_node *of_node,
  2653. struct device_node *parser_node,
  2654. const char *type,
  2655. int topology_override)
  2656. {
  2657. struct dsi_panel *panel;
  2658. struct dsi_parser_utils *utils;
  2659. int rc = 0;
  2660. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2661. if (!panel)
  2662. return ERR_PTR(-ENOMEM);
  2663. panel->panel_of_node = of_node;
  2664. panel->parent = parent;
  2665. panel->type = type;
  2666. dsi_panel_update_util(panel, parser_node);
  2667. utils = &panel->utils;
  2668. panel->name = utils->get_property(utils->data,
  2669. "qcom,mdss-dsi-panel-name", NULL);
  2670. if (!panel->name)
  2671. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2672. rc = dsi_panel_parse_host_config(panel);
  2673. if (rc) {
  2674. pr_err("failed to parse host configuration, rc=%d\n", rc);
  2675. goto error;
  2676. }
  2677. rc = dsi_panel_parse_panel_mode(panel);
  2678. if (rc) {
  2679. pr_err("failed to parse panel mode configuration, rc=%d\n", rc);
  2680. goto error;
  2681. }
  2682. rc = dsi_panel_parse_dfps_caps(panel);
  2683. if (rc)
  2684. pr_err("failed to parse dfps configuration, rc=%d\n", rc);
  2685. if (!(panel->dfps_caps.dfps_support)) {
  2686. /* qsync and dfps are mutually exclusive features */
  2687. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2688. if (rc)
  2689. pr_err("failed to parse qsync features, rc=%d\n", rc);
  2690. }
  2691. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2692. if (rc)
  2693. pr_err("failed to parse dynamic clk config, rc=%d\n", rc);
  2694. rc = dsi_panel_parse_phy_props(panel);
  2695. if (rc) {
  2696. pr_err("failed to parse panel physical dimension, rc=%d\n", rc);
  2697. goto error;
  2698. }
  2699. rc = dsi_panel_parse_gpios(panel);
  2700. if (rc) {
  2701. pr_err("failed to parse panel gpios, rc=%d\n", rc);
  2702. goto error;
  2703. }
  2704. rc = dsi_panel_parse_power_cfg(panel);
  2705. if (rc)
  2706. pr_err("failed to parse power config, rc=%d\n", rc);
  2707. rc = dsi_panel_parse_bl_config(panel);
  2708. if (rc) {
  2709. pr_err("failed to parse backlight config, rc=%d\n", rc);
  2710. if (rc == -EPROBE_DEFER)
  2711. goto error;
  2712. }
  2713. rc = dsi_panel_parse_misc_features(panel);
  2714. if (rc)
  2715. pr_err("failed to parse misc features, rc=%d\n", rc);
  2716. rc = dsi_panel_parse_hdr_config(panel);
  2717. if (rc)
  2718. pr_err("failed to parse hdr config, rc=%d\n", rc);
  2719. rc = dsi_panel_get_mode_count(panel);
  2720. if (rc) {
  2721. pr_err("failed to get mode count, rc=%d\n", rc);
  2722. goto error;
  2723. }
  2724. rc = dsi_panel_parse_dms_info(panel);
  2725. if (rc)
  2726. pr_debug("failed to get dms info, rc=%d\n", rc);
  2727. rc = dsi_panel_parse_esd_config(panel);
  2728. if (rc)
  2729. pr_debug("failed to parse esd config, rc=%d\n", rc);
  2730. drm_panel_init(&panel->drm_panel);
  2731. panel->drm_panel.dev = &panel->mipi_device.dev;
  2732. panel->mipi_device.dev.of_node = of_node;
  2733. rc = drm_panel_add(&panel->drm_panel);
  2734. if (rc)
  2735. goto error;
  2736. mutex_init(&panel->panel_lock);
  2737. return panel;
  2738. error:
  2739. kfree(panel);
  2740. return ERR_PTR(rc);
  2741. }
  2742. void dsi_panel_put(struct dsi_panel *panel)
  2743. {
  2744. drm_panel_remove(&panel->drm_panel);
  2745. /* free resources allocated for ESD check */
  2746. dsi_panel_esd_config_deinit(&panel->esd_config);
  2747. kfree(panel);
  2748. }
  2749. int dsi_panel_drv_init(struct dsi_panel *panel,
  2750. struct mipi_dsi_host *host)
  2751. {
  2752. int rc = 0;
  2753. struct mipi_dsi_device *dev;
  2754. if (!panel || !host) {
  2755. pr_err("invalid params\n");
  2756. return -EINVAL;
  2757. }
  2758. mutex_lock(&panel->panel_lock);
  2759. dev = &panel->mipi_device;
  2760. dev->host = host;
  2761. /*
  2762. * We dont have device structure since panel is not a device node.
  2763. * When using drm panel framework, the device is probed when the host is
  2764. * create.
  2765. */
  2766. dev->channel = 0;
  2767. dev->lanes = 4;
  2768. panel->host = host;
  2769. rc = dsi_panel_vreg_get(panel);
  2770. if (rc) {
  2771. pr_err("[%s] failed to get panel regulators, rc=%d\n",
  2772. panel->name, rc);
  2773. goto exit;
  2774. }
  2775. rc = dsi_panel_pinctrl_init(panel);
  2776. if (rc) {
  2777. pr_err("[%s] failed to init pinctrl, rc=%d\n", panel->name, rc);
  2778. goto error_vreg_put;
  2779. }
  2780. rc = dsi_panel_gpio_request(panel);
  2781. if (rc) {
  2782. pr_err("[%s] failed to request gpios, rc=%d\n", panel->name,
  2783. rc);
  2784. goto error_pinctrl_deinit;
  2785. }
  2786. rc = dsi_panel_bl_register(panel);
  2787. if (rc) {
  2788. if (rc != -EPROBE_DEFER)
  2789. pr_err("[%s] failed to register backlight, rc=%d\n",
  2790. panel->name, rc);
  2791. goto error_gpio_release;
  2792. }
  2793. goto exit;
  2794. error_gpio_release:
  2795. (void)dsi_panel_gpio_release(panel);
  2796. error_pinctrl_deinit:
  2797. (void)dsi_panel_pinctrl_deinit(panel);
  2798. error_vreg_put:
  2799. (void)dsi_panel_vreg_put(panel);
  2800. exit:
  2801. mutex_unlock(&panel->panel_lock);
  2802. return rc;
  2803. }
  2804. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2805. {
  2806. int rc = 0;
  2807. if (!panel) {
  2808. pr_err("invalid params\n");
  2809. return -EINVAL;
  2810. }
  2811. mutex_lock(&panel->panel_lock);
  2812. rc = dsi_panel_bl_unregister(panel);
  2813. if (rc)
  2814. pr_err("[%s] failed to unregister backlight, rc=%d\n",
  2815. panel->name, rc);
  2816. rc = dsi_panel_gpio_release(panel);
  2817. if (rc)
  2818. pr_err("[%s] failed to release gpios, rc=%d\n", panel->name,
  2819. rc);
  2820. rc = dsi_panel_pinctrl_deinit(panel);
  2821. if (rc)
  2822. pr_err("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2823. rc);
  2824. rc = dsi_panel_vreg_put(panel);
  2825. if (rc)
  2826. pr_err("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2827. panel->host = NULL;
  2828. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2829. mutex_unlock(&panel->panel_lock);
  2830. return rc;
  2831. }
  2832. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2833. struct dsi_display_mode *mode)
  2834. {
  2835. return 0;
  2836. }
  2837. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2838. {
  2839. const u32 SINGLE_MODE_SUPPORT = 1;
  2840. struct dsi_parser_utils *utils;
  2841. struct device_node *timings_np;
  2842. int count, rc = 0;
  2843. if (!panel) {
  2844. pr_err("invalid params\n");
  2845. return -EINVAL;
  2846. }
  2847. utils = &panel->utils;
  2848. panel->num_timing_nodes = 0;
  2849. timings_np = utils->get_child_by_name(utils->data,
  2850. "qcom,mdss-dsi-display-timings");
  2851. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2852. pr_err("no display timing nodes defined\n");
  2853. rc = -EINVAL;
  2854. goto error;
  2855. }
  2856. count = utils->get_child_count(timings_np);
  2857. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2858. count > DSI_MODE_MAX) {
  2859. pr_err("invalid count of timing nodes: %d\n", count);
  2860. rc = -EINVAL;
  2861. goto error;
  2862. }
  2863. /* No multiresolution support is available for video mode panels */
  2864. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2865. !panel->host_config.ext_bridge_mode)
  2866. count = SINGLE_MODE_SUPPORT;
  2867. panel->num_timing_nodes = count;
  2868. error:
  2869. return rc;
  2870. }
  2871. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2872. struct dsi_panel_phy_props *phy_props)
  2873. {
  2874. int rc = 0;
  2875. if (!panel || !phy_props) {
  2876. pr_err("invalid params\n");
  2877. return -EINVAL;
  2878. }
  2879. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2880. return rc;
  2881. }
  2882. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2883. struct dsi_dfps_capabilities *dfps_caps)
  2884. {
  2885. int rc = 0;
  2886. if (!panel || !dfps_caps) {
  2887. pr_err("invalid params\n");
  2888. return -EINVAL;
  2889. }
  2890. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2891. return rc;
  2892. }
  2893. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2894. {
  2895. int i;
  2896. if (!mode->priv_info)
  2897. return;
  2898. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2899. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2900. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2901. }
  2902. kfree(mode->priv_info);
  2903. }
  2904. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2905. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2906. {
  2907. u32 frame_time_us,nslices;
  2908. u64 min_bitclk, total_active_pixels, bits_per_line;
  2909. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2910. struct dsi_mode_info *timing = &mode->timing;
  2911. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2912. * + 1 byte dcs data command.
  2913. */
  2914. const u32 packet_overhead = 56;
  2915. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  2916. if (timing->dsc_enabled) {
  2917. nslices = (timing->h_active)/(dsc->slice_width);
  2918. /* (slice width x bit-per-pixel + packet overhead) x
  2919. * number of slices x height x fps / lane
  2920. */
  2921. bits_per_line = ((dsc->slice_width * dsc->bpp) +
  2922. packet_overhead) * nslices;
  2923. bits_per_line = bits_per_line / (config->num_data_lanes);
  2924. min_bitclk = (bits_per_line * timing->v_active *
  2925. timing->refresh_rate);
  2926. } else {
  2927. total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)
  2928. * timing->v_active));
  2929. /* calculate the actual bitclk needed to transfer the frame */
  2930. min_bitclk = (total_active_pixels * (timing->refresh_rate) *
  2931. (config->bpp)) / (config->num_data_lanes);
  2932. }
  2933. timing->min_dsi_clk_hz = min_bitclk;
  2934. if (timing->clk_rate_hz) {
  2935. /* adjust the transfer time proportionately for bit clk*/
  2936. timing->dsi_transfer_time_us = mult_frac(frame_time_us,
  2937. min_bitclk, timing->clk_rate_hz);
  2938. } else if (mode->priv_info->mdp_transfer_time_us) {
  2939. timing->dsi_transfer_time_us =
  2940. mode->priv_info->mdp_transfer_time_us;
  2941. } else {
  2942. timing->dsi_transfer_time_us = frame_time_us -
  2943. frame_threshold_us;
  2944. }
  2945. }
  2946. int dsi_panel_get_mode(struct dsi_panel *panel,
  2947. u32 index, struct dsi_display_mode *mode,
  2948. int topology_override)
  2949. {
  2950. struct device_node *timings_np, *child_np;
  2951. struct dsi_parser_utils *utils;
  2952. struct dsi_display_mode_priv_info *prv_info;
  2953. u32 child_idx = 0;
  2954. int rc = 0, num_timings;
  2955. void *utils_data = NULL;
  2956. if (!panel || !mode) {
  2957. pr_err("invalid params\n");
  2958. return -EINVAL;
  2959. }
  2960. mutex_lock(&panel->panel_lock);
  2961. utils = &panel->utils;
  2962. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  2963. if (!mode->priv_info) {
  2964. rc = -ENOMEM;
  2965. goto done;
  2966. }
  2967. prv_info = mode->priv_info;
  2968. timings_np = utils->get_child_by_name(utils->data,
  2969. "qcom,mdss-dsi-display-timings");
  2970. if (!timings_np) {
  2971. pr_err("no display timing nodes defined\n");
  2972. rc = -EINVAL;
  2973. goto parse_fail;
  2974. }
  2975. num_timings = utils->get_child_count(timings_np);
  2976. if (!num_timings || num_timings > DSI_MODE_MAX) {
  2977. pr_err("invalid count of timing nodes: %d\n", num_timings);
  2978. rc = -EINVAL;
  2979. goto parse_fail;
  2980. }
  2981. utils_data = utils->data;
  2982. dsi_for_each_child_node(timings_np, child_np) {
  2983. if (index != child_idx++)
  2984. continue;
  2985. utils->data = child_np;
  2986. rc = dsi_panel_parse_timing(&mode->timing, utils);
  2987. if (rc) {
  2988. pr_err("failed to parse panel timing, rc=%d\n", rc);
  2989. goto parse_fail;
  2990. }
  2991. rc = dsi_panel_parse_dsc_params(mode, utils);
  2992. if (rc) {
  2993. pr_err("failed to parse dsc params, rc=%d\n", rc);
  2994. goto parse_fail;
  2995. }
  2996. rc = dsi_panel_parse_topology(prv_info, utils,
  2997. topology_override);
  2998. if (rc) {
  2999. pr_err("failed to parse panel topology, rc=%d\n", rc);
  3000. goto parse_fail;
  3001. }
  3002. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3003. if (rc) {
  3004. pr_err("failed to parse command sets, rc=%d\n", rc);
  3005. goto parse_fail;
  3006. }
  3007. rc = dsi_panel_parse_jitter_config(mode, utils);
  3008. if (rc)
  3009. pr_err(
  3010. "failed to parse panel jitter config, rc=%d\n", rc);
  3011. rc = dsi_panel_parse_phy_timing(mode, utils);
  3012. if (rc) {
  3013. pr_err(
  3014. "failed to parse panel phy timings, rc=%d\n", rc);
  3015. goto parse_fail;
  3016. }
  3017. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3018. if (rc)
  3019. pr_err("failed to partial update caps, rc=%d\n", rc);
  3020. if (panel->panel_mode_switch_enabled) {
  3021. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3022. if (rc) {
  3023. pr_err("PMS: failed to parse panel mode\n");
  3024. rc = 0;
  3025. mode->panel_mode = panel->panel_mode;
  3026. }
  3027. } else {
  3028. mode->panel_mode = panel->panel_mode;
  3029. }
  3030. }
  3031. goto done;
  3032. parse_fail:
  3033. kfree(mode->priv_info);
  3034. mode->priv_info = NULL;
  3035. done:
  3036. utils->data = utils_data;
  3037. mutex_unlock(&panel->panel_lock);
  3038. return rc;
  3039. }
  3040. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3041. struct dsi_display_mode *mode,
  3042. struct dsi_host_config *config)
  3043. {
  3044. int rc = 0;
  3045. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3046. if (!panel || !mode || !config) {
  3047. pr_err("invalid params\n");
  3048. return -EINVAL;
  3049. }
  3050. mutex_lock(&panel->panel_lock);
  3051. config->panel_mode = panel->panel_mode;
  3052. memcpy(&config->common_config, &panel->host_config,
  3053. sizeof(config->common_config));
  3054. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3055. memcpy(&config->u.video_engine, &panel->video_config,
  3056. sizeof(config->u.video_engine));
  3057. } else {
  3058. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3059. sizeof(config->u.cmd_engine));
  3060. }
  3061. memcpy(&config->video_timing, &mode->timing,
  3062. sizeof(config->video_timing));
  3063. config->video_timing.mdp_transfer_time_us =
  3064. mode->priv_info->mdp_transfer_time_us;
  3065. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3066. config->video_timing.dsc = &mode->priv_info->dsc;
  3067. if (dyn_clk_caps->dyn_clk_support)
  3068. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3069. else
  3070. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3071. config->esc_clk_rate_hz = 19200000;
  3072. mutex_unlock(&panel->panel_lock);
  3073. return rc;
  3074. }
  3075. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3076. {
  3077. int rc = 0;
  3078. if (!panel) {
  3079. pr_err("invalid params\n");
  3080. return -EINVAL;
  3081. }
  3082. mutex_lock(&panel->panel_lock);
  3083. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3084. if (panel->lp11_init)
  3085. goto error;
  3086. rc = dsi_panel_power_on(panel);
  3087. if (rc) {
  3088. pr_err("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3089. goto error;
  3090. }
  3091. error:
  3092. mutex_unlock(&panel->panel_lock);
  3093. return rc;
  3094. }
  3095. int dsi_panel_update_pps(struct dsi_panel *panel)
  3096. {
  3097. int rc = 0;
  3098. struct dsi_panel_cmd_set *set = NULL;
  3099. struct dsi_display_mode_priv_info *priv_info = NULL;
  3100. if (!panel || !panel->cur_mode) {
  3101. pr_err("invalid params\n");
  3102. return -EINVAL;
  3103. }
  3104. mutex_lock(&panel->panel_lock);
  3105. priv_info = panel->cur_mode->priv_info;
  3106. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3107. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc, panel->dsc_pps_cmd, 0);
  3108. rc = dsi_panel_create_cmd_packets(panel->dsc_pps_cmd,
  3109. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3110. if (rc) {
  3111. pr_err("failed to create cmd packets, rc=%d\n", rc);
  3112. goto error;
  3113. }
  3114. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3115. if (rc) {
  3116. pr_err("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3117. panel->name, rc);
  3118. }
  3119. dsi_panel_destroy_cmd_packets(set);
  3120. error:
  3121. mutex_unlock(&panel->panel_lock);
  3122. return rc;
  3123. }
  3124. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3125. {
  3126. int rc = 0;
  3127. if (!panel) {
  3128. pr_err("invalid params\n");
  3129. return -EINVAL;
  3130. }
  3131. mutex_lock(&panel->panel_lock);
  3132. if (!panel->panel_initialized)
  3133. goto exit;
  3134. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3135. if (rc)
  3136. pr_err("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3137. panel->name, rc);
  3138. exit:
  3139. mutex_unlock(&panel->panel_lock);
  3140. return rc;
  3141. }
  3142. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3143. {
  3144. int rc = 0;
  3145. if (!panel) {
  3146. pr_err("invalid params\n");
  3147. return -EINVAL;
  3148. }
  3149. mutex_lock(&panel->panel_lock);
  3150. if (!panel->panel_initialized)
  3151. goto exit;
  3152. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3153. if (rc)
  3154. pr_err("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3155. panel->name, rc);
  3156. exit:
  3157. mutex_unlock(&panel->panel_lock);
  3158. return rc;
  3159. }
  3160. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3161. {
  3162. int rc = 0;
  3163. if (!panel) {
  3164. pr_err("invalid params\n");
  3165. return -EINVAL;
  3166. }
  3167. mutex_lock(&panel->panel_lock);
  3168. if (!panel->panel_initialized)
  3169. goto exit;
  3170. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3171. if (rc)
  3172. pr_err("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3173. panel->name, rc);
  3174. exit:
  3175. mutex_unlock(&panel->panel_lock);
  3176. return rc;
  3177. }
  3178. int dsi_panel_prepare(struct dsi_panel *panel)
  3179. {
  3180. int rc = 0;
  3181. if (!panel) {
  3182. pr_err("invalid params\n");
  3183. return -EINVAL;
  3184. }
  3185. mutex_lock(&panel->panel_lock);
  3186. if (panel->lp11_init) {
  3187. rc = dsi_panel_power_on(panel);
  3188. if (rc) {
  3189. pr_err("[%s] panel power on failed, rc=%d\n",
  3190. panel->name, rc);
  3191. goto error;
  3192. }
  3193. }
  3194. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3195. if (rc) {
  3196. pr_err("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3197. panel->name, rc);
  3198. goto error;
  3199. }
  3200. error:
  3201. mutex_unlock(&panel->panel_lock);
  3202. return rc;
  3203. }
  3204. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3205. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3206. {
  3207. static const int ROI_CMD_LEN = 5;
  3208. int rc = 0;
  3209. /* DTYPE_DCS_LWRITE */
  3210. static char *caset, *paset;
  3211. set->cmds = NULL;
  3212. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3213. if (!caset) {
  3214. rc = -ENOMEM;
  3215. goto exit;
  3216. }
  3217. caset[0] = 0x2a;
  3218. caset[1] = (roi->x & 0xFF00) >> 8;
  3219. caset[2] = roi->x & 0xFF;
  3220. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3221. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3222. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3223. if (!paset) {
  3224. rc = -ENOMEM;
  3225. goto error_free_mem;
  3226. }
  3227. paset[0] = 0x2b;
  3228. paset[1] = (roi->y & 0xFF00) >> 8;
  3229. paset[2] = roi->y & 0xFF;
  3230. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3231. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3232. set->type = DSI_CMD_SET_ROI;
  3233. set->state = DSI_CMD_SET_STATE_LP;
  3234. set->count = 2; /* send caset + paset together */
  3235. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3236. if (!set->cmds) {
  3237. rc = -ENOMEM;
  3238. goto error_free_mem;
  3239. }
  3240. set->cmds[0].msg.channel = 0;
  3241. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3242. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3243. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3244. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3245. set->cmds[0].msg.tx_buf = caset;
  3246. set->cmds[0].msg.rx_len = 0;
  3247. set->cmds[0].msg.rx_buf = 0;
  3248. set->cmds[0].msg.wait_ms = 0;
  3249. set->cmds[0].last_command = 0;
  3250. set->cmds[0].post_wait_ms = 0;
  3251. set->cmds[1].msg.channel = 0;
  3252. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3253. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3254. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3255. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3256. set->cmds[1].msg.tx_buf = paset;
  3257. set->cmds[1].msg.rx_len = 0;
  3258. set->cmds[1].msg.rx_buf = 0;
  3259. set->cmds[1].msg.wait_ms = 0;
  3260. set->cmds[1].last_command = 1;
  3261. set->cmds[1].post_wait_ms = 0;
  3262. goto exit;
  3263. error_free_mem:
  3264. kfree(caset);
  3265. kfree(paset);
  3266. kfree(set->cmds);
  3267. exit:
  3268. return rc;
  3269. }
  3270. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3271. int ctrl_idx)
  3272. {
  3273. int rc = 0;
  3274. if (!panel) {
  3275. pr_err("invalid params\n");
  3276. return -EINVAL;
  3277. }
  3278. mutex_lock(&panel->panel_lock);
  3279. pr_debug("ctrl:%d qsync on\n", ctrl_idx);
  3280. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3281. if (rc)
  3282. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3283. panel->name, rc);
  3284. mutex_unlock(&panel->panel_lock);
  3285. return rc;
  3286. }
  3287. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3288. int ctrl_idx)
  3289. {
  3290. int rc = 0;
  3291. if (!panel) {
  3292. pr_err("invalid params\n");
  3293. return -EINVAL;
  3294. }
  3295. mutex_lock(&panel->panel_lock);
  3296. pr_debug("ctrl:%d qsync off\n", ctrl_idx);
  3297. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3298. if (rc)
  3299. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3300. panel->name, rc);
  3301. mutex_unlock(&panel->panel_lock);
  3302. return rc;
  3303. }
  3304. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3305. struct dsi_rect *roi)
  3306. {
  3307. int rc = 0;
  3308. struct dsi_panel_cmd_set *set;
  3309. struct dsi_display_mode_priv_info *priv_info;
  3310. if (!panel || !panel->cur_mode) {
  3311. pr_err("Invalid params\n");
  3312. return -EINVAL;
  3313. }
  3314. priv_info = panel->cur_mode->priv_info;
  3315. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3316. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3317. if (rc) {
  3318. pr_err("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3319. panel->name, rc);
  3320. return rc;
  3321. }
  3322. pr_debug("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3323. roi->x, roi->y, roi->w, roi->h);
  3324. mutex_lock(&panel->panel_lock);
  3325. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3326. if (rc)
  3327. pr_err("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3328. panel->name, rc);
  3329. mutex_unlock(&panel->panel_lock);
  3330. dsi_panel_destroy_cmd_packets(set);
  3331. dsi_panel_dealloc_cmd_packets(set);
  3332. return rc;
  3333. }
  3334. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3335. {
  3336. int rc = 0;
  3337. if (!panel) {
  3338. pr_err("Invalid params\n");
  3339. return -EINVAL;
  3340. }
  3341. mutex_lock(&panel->panel_lock);
  3342. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3343. if (rc)
  3344. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3345. panel->name, rc);
  3346. mutex_unlock(&panel->panel_lock);
  3347. return rc;
  3348. }
  3349. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3350. {
  3351. int rc = 0;
  3352. if (!panel) {
  3353. pr_err("Invalid params\n");
  3354. return -EINVAL;
  3355. }
  3356. mutex_lock(&panel->panel_lock);
  3357. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3358. if (rc)
  3359. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3360. panel->name, rc);
  3361. mutex_unlock(&panel->panel_lock);
  3362. return rc;
  3363. }
  3364. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3365. {
  3366. int rc = 0;
  3367. if (!panel) {
  3368. pr_err("Invalid params\n");
  3369. return -EINVAL;
  3370. }
  3371. mutex_lock(&panel->panel_lock);
  3372. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3373. if (rc)
  3374. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3375. panel->name, rc);
  3376. mutex_unlock(&panel->panel_lock);
  3377. return rc;
  3378. }
  3379. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3380. {
  3381. int rc = 0;
  3382. if (!panel) {
  3383. pr_err("Invalid params\n");
  3384. return -EINVAL;
  3385. }
  3386. mutex_lock(&panel->panel_lock);
  3387. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3388. if (rc)
  3389. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3390. panel->name, rc);
  3391. mutex_unlock(&panel->panel_lock);
  3392. return rc;
  3393. }
  3394. int dsi_panel_switch(struct dsi_panel *panel)
  3395. {
  3396. int rc = 0;
  3397. if (!panel) {
  3398. pr_err("Invalid params\n");
  3399. return -EINVAL;
  3400. }
  3401. mutex_lock(&panel->panel_lock);
  3402. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3403. if (rc)
  3404. pr_err("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3405. panel->name, rc);
  3406. mutex_unlock(&panel->panel_lock);
  3407. return rc;
  3408. }
  3409. int dsi_panel_post_switch(struct dsi_panel *panel)
  3410. {
  3411. int rc = 0;
  3412. if (!panel) {
  3413. pr_err("Invalid params\n");
  3414. return -EINVAL;
  3415. }
  3416. mutex_lock(&panel->panel_lock);
  3417. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3418. if (rc)
  3419. pr_err("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3420. panel->name, rc);
  3421. mutex_unlock(&panel->panel_lock);
  3422. return rc;
  3423. }
  3424. int dsi_panel_enable(struct dsi_panel *panel)
  3425. {
  3426. int rc = 0;
  3427. if (!panel) {
  3428. pr_err("Invalid params\n");
  3429. return -EINVAL;
  3430. }
  3431. mutex_lock(&panel->panel_lock);
  3432. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3433. if (rc)
  3434. pr_err("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3435. panel->name, rc);
  3436. else
  3437. panel->panel_initialized = true;
  3438. mutex_unlock(&panel->panel_lock);
  3439. return rc;
  3440. }
  3441. int dsi_panel_post_enable(struct dsi_panel *panel)
  3442. {
  3443. int rc = 0;
  3444. if (!panel) {
  3445. pr_err("invalid params\n");
  3446. return -EINVAL;
  3447. }
  3448. mutex_lock(&panel->panel_lock);
  3449. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3450. if (rc) {
  3451. pr_err("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3452. panel->name, rc);
  3453. goto error;
  3454. }
  3455. error:
  3456. mutex_unlock(&panel->panel_lock);
  3457. return rc;
  3458. }
  3459. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3460. {
  3461. int rc = 0;
  3462. if (!panel) {
  3463. pr_err("invalid params\n");
  3464. return -EINVAL;
  3465. }
  3466. mutex_lock(&panel->panel_lock);
  3467. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3468. if (rc) {
  3469. pr_err("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3470. panel->name, rc);
  3471. goto error;
  3472. }
  3473. error:
  3474. mutex_unlock(&panel->panel_lock);
  3475. return rc;
  3476. }
  3477. int dsi_panel_disable(struct dsi_panel *panel)
  3478. {
  3479. int rc = 0;
  3480. if (!panel) {
  3481. pr_err("invalid params\n");
  3482. return -EINVAL;
  3483. }
  3484. mutex_lock(&panel->panel_lock);
  3485. /* Avoid sending panel off commands when ESD recovery is underway */
  3486. if (!atomic_read(&panel->esd_recovery_pending)) {
  3487. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3488. if (rc) {
  3489. /*
  3490. * Sending panel off commands may fail when DSI
  3491. * controller is in a bad state. These failures can be
  3492. * ignored since controller will go for full reset on
  3493. * subsequent display enable anyway.
  3494. */
  3495. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3496. panel->name, rc);
  3497. rc = 0;
  3498. }
  3499. }
  3500. panel->panel_initialized = false;
  3501. mutex_unlock(&panel->panel_lock);
  3502. return rc;
  3503. }
  3504. int dsi_panel_unprepare(struct dsi_panel *panel)
  3505. {
  3506. int rc = 0;
  3507. if (!panel) {
  3508. pr_err("invalid params\n");
  3509. return -EINVAL;
  3510. }
  3511. mutex_lock(&panel->panel_lock);
  3512. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3513. if (rc) {
  3514. pr_err("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3515. panel->name, rc);
  3516. goto error;
  3517. }
  3518. error:
  3519. mutex_unlock(&panel->panel_lock);
  3520. return rc;
  3521. }
  3522. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3523. {
  3524. int rc = 0;
  3525. if (!panel) {
  3526. pr_err("invalid params\n");
  3527. return -EINVAL;
  3528. }
  3529. mutex_lock(&panel->panel_lock);
  3530. rc = dsi_panel_power_off(panel);
  3531. if (rc) {
  3532. pr_err("[%s] panel power_Off failed, rc=%d\n",
  3533. panel->name, rc);
  3534. goto error;
  3535. }
  3536. error:
  3537. mutex_unlock(&panel->panel_lock);
  3538. return rc;
  3539. }