q6core.c 58 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/module.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/of_device.h>
  9. #include <linux/string.h>
  10. #include <linux/types.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/mutex.h>
  13. #include <linux/sched.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/kobject.h>
  17. #include <linux/delay.h>
  18. #include <dsp/q6core.h>
  19. #include <dsp/audio_cal_utils.h>
  20. #include <dsp/apr_audio-v2.h>
  21. #include <soc/snd_event.h>
  22. #include <ipc/apr.h>
  23. #include "adsp_err.h"
  24. #define TIMEOUT_MS 1000
  25. /*
  26. * AVS bring up in the modem is optimized for the new
  27. * Sub System Restart design and 100 milliseconds timeout
  28. * is sufficient to make sure the Q6 will be ready.
  29. */
  30. #define Q6_READY_TIMEOUT_MS 100
  31. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  32. #define ADSP_MODULES_READY_AVS_STATE 5
  33. #define APR_ENOTREADY 10
  34. #define MEMPOOL_ID_MASK 0xFF
  35. #define MDF_MAP_TOKEN 0xF000
  36. enum {
  37. META_CAL,
  38. CUST_TOP_CAL,
  39. CORE_MAX_CAL
  40. };
  41. enum ver_query_status {
  42. VER_QUERY_UNATTEMPTED,
  43. VER_QUERY_UNSUPPORTED,
  44. VER_QUERY_SUPPORTED
  45. };
  46. struct q6core_avcs_ver_info {
  47. enum ver_query_status status;
  48. struct avcs_fwk_ver_info *ver_info;
  49. };
  50. struct q6core_str {
  51. struct apr_svc *core_handle_q;
  52. wait_queue_head_t bus_bw_req_wait;
  53. wait_queue_head_t mdf_map_resp_wait;
  54. wait_queue_head_t cmd_req_wait;
  55. wait_queue_head_t avcs_fwk_ver_req_wait;
  56. wait_queue_head_t lpass_npa_rsc_wait;
  57. wait_queue_head_t avcs_module_load_unload_wait;
  58. u32 lpass_npa_rsc_rsp_rcvd;
  59. u32 bus_bw_resp_received;
  60. u32 mdf_map_resp_received;
  61. u32 avcs_module_resp_received;
  62. enum cmd_flags {
  63. FLAG_NONE,
  64. FLAG_CMDRSP_LICENSE_RESULT
  65. } cmd_resp_received_flag;
  66. u32 avcs_fwk_ver_resp_received;
  67. struct mutex cmd_lock;
  68. struct mutex ver_lock;
  69. union {
  70. struct avcs_cmdrsp_get_license_validation_result
  71. cmdrsp_license_result;
  72. } cmd_resp_payload;
  73. u32 param;
  74. struct cal_type_data *cal_data[CORE_MAX_CAL];
  75. uint32_t mem_map_cal_handle;
  76. uint32_t mdf_mem_map_cal_handle;
  77. uint32_t npa_client_handle;
  78. int32_t adsp_status;
  79. int32_t avs_state;
  80. struct q6core_avcs_ver_info q6core_avcs_ver_info;
  81. };
  82. static struct q6core_str q6core_lcl;
  83. /* Global payload used for AVCS_CMD_RSP_MODULES command */
  84. static struct avcs_load_unload_modules_payload *rsp_payload;
  85. struct generic_get_data_ {
  86. int valid;
  87. int size_in_ints;
  88. int ints[];
  89. };
  90. static struct generic_get_data_ *generic_get_data;
  91. static DEFINE_MUTEX(kset_lock);
  92. static struct kset *audio_uevent_kset;
  93. static int q6core_init_uevent_kset(void)
  94. {
  95. int ret = 0;
  96. mutex_lock(&kset_lock);
  97. if (audio_uevent_kset)
  98. goto done;
  99. /* Create a kset under /sys/kernel/ */
  100. audio_uevent_kset = kset_create_and_add("q6audio", NULL, kernel_kobj);
  101. if (!audio_uevent_kset) {
  102. pr_err("%s: error creating uevent kernel set", __func__);
  103. ret = -EINVAL;
  104. }
  105. done:
  106. mutex_unlock(&kset_lock);
  107. return ret;
  108. }
  109. static void q6core_destroy_uevent_kset(void)
  110. {
  111. if (audio_uevent_kset) {
  112. kset_unregister(audio_uevent_kset);
  113. audio_uevent_kset = NULL;
  114. }
  115. }
  116. /**
  117. * q6core_init_uevent_data - initialize kernel object required to send uevents.
  118. *
  119. * @uevent_data: uevent data (dynamically allocated memory).
  120. * @name: name of the kernel object.
  121. *
  122. * Returns 0 on success or error otherwise.
  123. */
  124. int q6core_init_uevent_data(struct audio_uevent_data *uevent_data, char *name)
  125. {
  126. int ret = -EINVAL;
  127. if (!uevent_data || !name)
  128. return ret;
  129. ret = q6core_init_uevent_kset();
  130. if (ret)
  131. return ret;
  132. /* Set kset for kobject before initializing the kobject */
  133. uevent_data->kobj.kset = audio_uevent_kset;
  134. /* Initialize kobject and add it to kernel */
  135. ret = kobject_init_and_add(&uevent_data->kobj, &uevent_data->ktype,
  136. NULL, "%s", name);
  137. if (ret) {
  138. pr_err("%s: error initializing uevent kernel object: %d",
  139. __func__, ret);
  140. kobject_put(&uevent_data->kobj);
  141. return ret;
  142. }
  143. /* Send kobject add event to the system */
  144. kobject_uevent(&uevent_data->kobj, KOBJ_ADD);
  145. return ret;
  146. }
  147. EXPORT_SYMBOL(q6core_init_uevent_data);
  148. /**
  149. * q6core_destroy_uevent_data - destroy kernel object.
  150. *
  151. * @uevent_data: uevent data.
  152. */
  153. void q6core_destroy_uevent_data(struct audio_uevent_data *uevent_data)
  154. {
  155. if (uevent_data)
  156. kobject_put(&uevent_data->kobj);
  157. }
  158. EXPORT_SYMBOL(q6core_destroy_uevent_data);
  159. /**
  160. * q6core_send_uevent - send uevent to userspace.
  161. *
  162. * @uevent_data: uevent data.
  163. * @event: event to send.
  164. *
  165. * Returns 0 on success or error otherwise.
  166. */
  167. int q6core_send_uevent(struct audio_uevent_data *uevent_data, char *event)
  168. {
  169. char *env[] = { event, NULL };
  170. if (!event || !uevent_data)
  171. return -EINVAL;
  172. return kobject_uevent_env(&uevent_data->kobj, KOBJ_CHANGE, env);
  173. }
  174. EXPORT_SYMBOL(q6core_send_uevent);
  175. static int parse_fwk_version_info(uint32_t *payload, uint16_t payload_size)
  176. {
  177. size_t ver_size;
  178. int num_services;
  179. pr_debug("%s: Payload info num services %d\n",
  180. __func__, payload[4]);
  181. /*
  182. * payload1[4] is the number of services running on DSP
  183. * Based on this info, we copy the payload into core
  184. * avcs version info structure.
  185. */
  186. if (payload_size < 5 * sizeof(uint32_t)) {
  187. pr_err("%s: payload has invalid size %d\n",
  188. __func__, payload_size);
  189. return -EINVAL;
  190. }
  191. num_services = payload[4];
  192. if (num_services > VSS_MAX_AVCS_NUM_SERVICES) {
  193. pr_err("%s: num_services: %d greater than max services: %d\n",
  194. __func__, num_services, VSS_MAX_AVCS_NUM_SERVICES);
  195. return -EINVAL;
  196. }
  197. /*
  198. * Dynamically allocate memory for all
  199. * the services based on num_services
  200. */
  201. ver_size = sizeof(struct avcs_get_fwk_version) +
  202. num_services * sizeof(struct avs_svc_api_info);
  203. if (payload_size < ver_size) {
  204. pr_err("%s: payload has invalid size %d, expected size %zu\n",
  205. __func__, payload_size, ver_size);
  206. return -EINVAL;
  207. }
  208. q6core_lcl.q6core_avcs_ver_info.ver_info =
  209. kzalloc(ver_size, GFP_ATOMIC);
  210. if (q6core_lcl.q6core_avcs_ver_info.ver_info == NULL)
  211. return -ENOMEM;
  212. memcpy(q6core_lcl.q6core_avcs_ver_info.ver_info, (uint8_t *) payload,
  213. ver_size);
  214. return 0;
  215. }
  216. static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv)
  217. {
  218. uint32_t *payload1;
  219. int ret = 0;
  220. if (data == NULL) {
  221. pr_err("%s: data argument is null\n", __func__);
  222. return -EINVAL;
  223. }
  224. pr_debug("%s: core msg: payload len = %u, apr resp opcode = 0x%x\n",
  225. __func__,
  226. data->payload_size, data->opcode);
  227. switch (data->opcode) {
  228. case APR_BASIC_RSP_RESULT:{
  229. if (data->payload_size == 0) {
  230. pr_err("%s: APR_BASIC_RSP_RESULT No Payload ",
  231. __func__);
  232. return 0;
  233. }
  234. payload1 = data->payload;
  235. if (data->payload_size < 2 * sizeof(uint32_t)) {
  236. pr_err("%s: payload has invalid size %d\n",
  237. __func__, data->payload_size);
  238. return -EINVAL;
  239. }
  240. switch (payload1[0]) {
  241. case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS:
  242. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n",
  243. __func__, payload1[1]);
  244. /* -ADSP status to match Linux error standard */
  245. q6core_lcl.adsp_status = -payload1[1];
  246. q6core_lcl.bus_bw_resp_received = 1;
  247. wake_up(&q6core_lcl.bus_bw_req_wait);
  248. break;
  249. case AVCS_CMD_SHARED_MEM_MAP_REGIONS:
  250. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n",
  251. __func__, payload1[1]);
  252. /* -ADSP status to match Linux error standard */
  253. q6core_lcl.adsp_status = -payload1[1];
  254. q6core_lcl.bus_bw_resp_received = 1;
  255. wake_up(&q6core_lcl.bus_bw_req_wait);
  256. break;
  257. case AVCS_CMD_MAP_MDF_SHARED_MEMORY:
  258. pr_debug("%s: Cmd = AVCS_CMD_MAP_MDF_SHARED_MEMORY status[0x%x]\n",
  259. __func__, payload1[1]);
  260. /* -ADSP status to match Linux error standard */
  261. q6core_lcl.adsp_status = -payload1[1];
  262. q6core_lcl.bus_bw_resp_received = 1;
  263. wake_up(&q6core_lcl.bus_bw_req_wait);
  264. break;
  265. case AVCS_CMD_REGISTER_TOPOLOGIES:
  266. pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n",
  267. __func__, payload1[1]);
  268. /* -ADSP status to match Linux error standard */
  269. q6core_lcl.adsp_status = -payload1[1];
  270. q6core_lcl.bus_bw_resp_received = 1;
  271. wake_up(&q6core_lcl.bus_bw_req_wait);
  272. break;
  273. case AVCS_CMD_DEREGISTER_TOPOLOGIES:
  274. pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n",
  275. __func__, payload1[1]);
  276. q6core_lcl.bus_bw_resp_received = 1;
  277. wake_up(&q6core_lcl.bus_bw_req_wait);
  278. break;
  279. case AVCS_CMD_GET_FWK_VERSION:
  280. pr_debug("%s: Cmd = AVCS_CMD_GET_FWK_VERSION status[%s]\n",
  281. __func__, adsp_err_get_err_str(payload1[1]));
  282. /* ADSP status to match Linux error standard */
  283. q6core_lcl.adsp_status = -payload1[1];
  284. if (payload1[1] == ADSP_EUNSUPPORTED)
  285. q6core_lcl.q6core_avcs_ver_info.status =
  286. VER_QUERY_UNSUPPORTED;
  287. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  288. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  289. break;
  290. case AVCS_CMD_LOAD_TOPO_MODULES:
  291. case AVCS_CMD_UNLOAD_TOPO_MODULES:
  292. pr_debug("%s: Cmd = %s status[%s]\n",
  293. __func__,
  294. (payload1[0] == AVCS_CMD_LOAD_TOPO_MODULES) ?
  295. "AVCS_CMD_LOAD_TOPO_MODULES" :
  296. "AVCS_CMD_UNLOAD_TOPO_MODULES",
  297. adsp_err_get_err_str(payload1[1]));
  298. break;
  299. case AVCS_CMD_DESTROY_LPASS_NPA_CLIENT:
  300. case AVCS_CMD_REQUEST_LPASS_NPA_RESOURCES:
  301. pr_debug("%s: Cmd = AVCS_CMD_CREATE_LPASS_NPA_CLIENT/AVCS_CMD_DESTROY_LPASS_NPA_CLIENT status[%s]\n",
  302. __func__, adsp_err_get_err_str(payload1[1]));
  303. /* ADSP status to match Linux error standard */
  304. q6core_lcl.adsp_status = -payload1[1];
  305. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 1;
  306. wake_up(&q6core_lcl.lpass_npa_rsc_wait);
  307. break;
  308. case AVCS_CMD_LOAD_MODULES:
  309. pr_err("%s: Cmd = %s failed status[%s]\n",
  310. __func__, "AVCS_CMD_LOAD__MODULES",
  311. adsp_err_get_err_str(payload1[1]));
  312. q6core_lcl.avcs_module_resp_received = 1;
  313. q6core_lcl.adsp_status = -payload1[1];
  314. wake_up(&q6core_lcl.avcs_module_load_unload_wait);
  315. break;
  316. case AVCS_CMD_UNLOAD_MODULES:
  317. if (payload1[1] == ADSP_EOK) {
  318. pr_debug("%s: Cmd = %s success status[%s]\n",
  319. __func__, "AVCS_CMD_UNLOAD_MODULES",
  320. "ADSP_EOK");
  321. } else {
  322. pr_err("%s: Cmd = %s failed status[%s]\n",
  323. __func__, "AVCS_CMD_UNLOAD_MODULES",
  324. adsp_err_get_err_str(payload1[1]));
  325. q6core_lcl.adsp_status = -payload1[1];
  326. }
  327. q6core_lcl.avcs_module_resp_received = 1;
  328. wake_up(&q6core_lcl.avcs_module_load_unload_wait);
  329. break;
  330. default:
  331. pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n",
  332. __func__,
  333. payload1[0], payload1[1], data->opcode);
  334. break;
  335. }
  336. break;
  337. }
  338. case RESET_EVENTS:{
  339. pr_debug("%s: Reset event received in Core service\n",
  340. __func__);
  341. /*
  342. * no reset for q6core_avcs_ver_info done as
  343. * the data will not change after SSR
  344. */
  345. apr_reset(q6core_lcl.core_handle_q);
  346. q6core_lcl.core_handle_q = NULL;
  347. break;
  348. }
  349. case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS:
  350. if (data->payload_size < sizeof(uint32_t)) {
  351. pr_err("%s: payload has invalid size %d\n",
  352. __func__, data->payload_size);
  353. return -EINVAL;
  354. }
  355. payload1 = data->payload;
  356. pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n",
  357. __func__, payload1[0]);
  358. if (data->token == MDF_MAP_TOKEN) {
  359. q6core_lcl.mdf_mem_map_cal_handle = payload1[0];
  360. q6core_lcl.mdf_map_resp_received = 1;
  361. wake_up(&q6core_lcl.mdf_map_resp_wait);
  362. } else {
  363. q6core_lcl.mem_map_cal_handle = payload1[0];
  364. q6core_lcl.bus_bw_resp_received = 1;
  365. wake_up(&q6core_lcl.bus_bw_req_wait);
  366. }
  367. break;
  368. case AVCS_CMDRSP_CREATE_LPASS_NPA_CLIENT:
  369. if (data->payload_size < 2 * sizeof(uint32_t)) {
  370. pr_err("%s: payload has invalid size %d\n",
  371. __func__, data->payload_size);
  372. return -EINVAL;
  373. }
  374. payload1 = data->payload;
  375. pr_debug("%s: AVCS_CMDRSP_CREATE_LPASS_NPA_CLIENT handle %d\n",
  376. __func__, payload1[1]);
  377. q6core_lcl.adsp_status = payload1[0];
  378. q6core_lcl.npa_client_handle = payload1[1];
  379. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 1;
  380. wake_up(&q6core_lcl.lpass_npa_rsc_wait);
  381. break;
  382. case AVCS_CMDRSP_ADSP_EVENT_GET_STATE:
  383. if (data->payload_size < sizeof(uint32_t)) {
  384. pr_err("%s: payload has invalid size %d\n",
  385. __func__, data->payload_size);
  386. return -EINVAL;
  387. }
  388. payload1 = data->payload;
  389. q6core_lcl.param = payload1[0];
  390. pr_debug("%s: Received ADSP get state response 0x%x\n",
  391. __func__, q6core_lcl.param);
  392. /* ensure .param is updated prior to .bus_bw_resp_received */
  393. wmb();
  394. q6core_lcl.bus_bw_resp_received = 1;
  395. wake_up(&q6core_lcl.bus_bw_req_wait);
  396. break;
  397. case AVCS_CMDRSP_GET_LICENSE_VALIDATION_RESULT:
  398. if (data->payload_size < sizeof(uint32_t)) {
  399. pr_err("%s: payload has invalid size %d\n",
  400. __func__, data->payload_size);
  401. return -EINVAL;
  402. }
  403. payload1 = data->payload;
  404. pr_debug("%s: cmd = LICENSE_VALIDATION_RESULT, result = 0x%x\n",
  405. __func__, payload1[0]);
  406. q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result
  407. = payload1[0];
  408. q6core_lcl.cmd_resp_received_flag = FLAG_CMDRSP_LICENSE_RESULT;
  409. wake_up(&q6core_lcl.cmd_req_wait);
  410. break;
  411. case AVCS_CMDRSP_GET_FWK_VERSION:
  412. pr_debug("%s: Received AVCS_CMDRSP_GET_FWK_VERSION\n",
  413. __func__);
  414. payload1 = data->payload;
  415. ret = parse_fwk_version_info(payload1, data->payload_size);
  416. if (ret < 0) {
  417. q6core_lcl.adsp_status = ret;
  418. pr_err("%s: Failed to parse payload:%d\n",
  419. __func__, ret);
  420. } else {
  421. q6core_lcl.q6core_avcs_ver_info.status =
  422. VER_QUERY_SUPPORTED;
  423. }
  424. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  425. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  426. break;
  427. case AVCS_CMD_RSP_LOAD_MODULES:
  428. pr_debug("%s: Received AVCS_CMD_RSP_LOAD_MODULES\n",
  429. __func__);
  430. memcpy(rsp_payload, data->payload, data->payload_size);
  431. q6core_lcl.avcs_module_resp_received = 1;
  432. wake_up(&q6core_lcl.avcs_module_load_unload_wait);
  433. break;
  434. default:
  435. pr_err("%s: Message id from adsp core svc: 0x%x\n",
  436. __func__, data->opcode);
  437. if (generic_get_data) {
  438. generic_get_data->valid = 1;
  439. generic_get_data->size_in_ints =
  440. data->payload_size/sizeof(int);
  441. pr_debug("callback size = %i\n",
  442. data->payload_size);
  443. memcpy(generic_get_data->ints, data->payload,
  444. data->payload_size);
  445. q6core_lcl.bus_bw_resp_received = 1;
  446. wake_up(&q6core_lcl.bus_bw_req_wait);
  447. break;
  448. }
  449. break;
  450. }
  451. return 0;
  452. }
  453. void ocm_core_open(void)
  454. {
  455. if (q6core_lcl.core_handle_q == NULL)
  456. q6core_lcl.core_handle_q = apr_register("ADSP", "CORE",
  457. aprv2_core_fn_q, 0xFFFFFFFF, NULL);
  458. pr_debug("%s: Open_q %pK\n", __func__, q6core_lcl.core_handle_q);
  459. if (q6core_lcl.core_handle_q == NULL)
  460. pr_err_ratelimited("%s: Unable to register CORE\n", __func__);
  461. }
  462. struct cal_block_data *cal_utils_get_cal_block_by_key(
  463. struct cal_type_data *cal_type, uint32_t key)
  464. {
  465. struct list_head *ptr, *next;
  466. struct cal_block_data *cal_block = NULL;
  467. struct audio_cal_info_metainfo *metainfo;
  468. list_for_each_safe(ptr, next,
  469. &cal_type->cal_blocks) {
  470. cal_block = list_entry(ptr,
  471. struct cal_block_data, list);
  472. metainfo = (struct audio_cal_info_metainfo *)
  473. cal_block->cal_info;
  474. if (metainfo->nKey != key) {
  475. pr_debug("%s: metainfo key mismatch!!! found:%x, needed:%x\n",
  476. __func__, metainfo->nKey, key);
  477. } else {
  478. pr_debug("%s: metainfo key match found", __func__);
  479. return cal_block;
  480. }
  481. }
  482. return NULL;
  483. }
  484. static int q6core_send_get_avcs_fwk_ver_cmd(void)
  485. {
  486. struct apr_hdr avcs_ver_cmd;
  487. int ret;
  488. mutex_lock(&q6core_lcl.cmd_lock);
  489. avcs_ver_cmd.hdr_field =
  490. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE),
  491. APR_PKT_VER);
  492. avcs_ver_cmd.pkt_size = sizeof(struct apr_hdr);
  493. avcs_ver_cmd.src_port = 0;
  494. avcs_ver_cmd.dest_port = 0;
  495. avcs_ver_cmd.token = 0;
  496. avcs_ver_cmd.opcode = AVCS_CMD_GET_FWK_VERSION;
  497. q6core_lcl.adsp_status = 0;
  498. q6core_lcl.avcs_fwk_ver_resp_received = 0;
  499. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  500. (uint32_t *) &avcs_ver_cmd);
  501. if (ret < 0) {
  502. pr_err("%s: failed to send apr packet, ret=%d\n", __func__,
  503. ret);
  504. goto done;
  505. }
  506. ret = wait_event_timeout(q6core_lcl.avcs_fwk_ver_req_wait,
  507. (q6core_lcl.avcs_fwk_ver_resp_received == 1),
  508. msecs_to_jiffies(TIMEOUT_MS));
  509. if (!ret) {
  510. pr_err("%s: wait_event timeout for AVCS fwk version info\n",
  511. __func__);
  512. ret = -ETIMEDOUT;
  513. goto done;
  514. }
  515. if (q6core_lcl.adsp_status < 0) {
  516. /*
  517. * adsp_err_get_err_str expects a positive value but we store
  518. * the DSP error as negative to match the Linux error standard.
  519. * Pass in the negated value so adsp_err_get_err_str returns
  520. * the correct string.
  521. */
  522. pr_err("%s: DSP returned error[%s]\n", __func__,
  523. adsp_err_get_err_str(-q6core_lcl.adsp_status));
  524. ret = adsp_err_get_lnx_err_code(q6core_lcl.adsp_status);
  525. goto done;
  526. }
  527. ret = 0;
  528. done:
  529. mutex_unlock(&q6core_lcl.cmd_lock);
  530. return ret;
  531. }
  532. int q6core_get_service_version(uint32_t service_id,
  533. struct avcs_fwk_ver_info *ver_info,
  534. size_t size)
  535. {
  536. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  537. int i;
  538. uint32_t num_services;
  539. size_t ver_size;
  540. int ret;
  541. if (ver_info == NULL) {
  542. pr_err("%s: ver_info is NULL\n", __func__);
  543. return -EINVAL;
  544. }
  545. ret = q6core_get_fwk_version_size(service_id);
  546. if (ret < 0) {
  547. pr_err("%s: Failed to get service size for service id %d with error %d\n",
  548. __func__, service_id, ret);
  549. return ret;
  550. }
  551. ver_size = ret;
  552. if (ver_size != size) {
  553. pr_err("%s: Expected size %zu and provided size %zu do not match\n",
  554. __func__, ver_size, size);
  555. return -EINVAL;
  556. }
  557. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  558. num_services = cached_ver_info->avcs_fwk_version.num_services;
  559. if (service_id == AVCS_SERVICE_ID_ALL) {
  560. memcpy(ver_info, cached_ver_info, ver_size);
  561. return 0;
  562. }
  563. ver_info->avcs_fwk_version = cached_ver_info->avcs_fwk_version;
  564. for (i = 0; i < num_services; i++) {
  565. if (cached_ver_info->services[i].service_id == service_id) {
  566. ver_info->services[0] = cached_ver_info->services[i];
  567. return 0;
  568. }
  569. }
  570. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  571. return -EINVAL;
  572. }
  573. EXPORT_SYMBOL(q6core_get_service_version);
  574. static int q6core_get_avcs_fwk_version(void)
  575. {
  576. int ret = 0;
  577. mutex_lock(&(q6core_lcl.ver_lock));
  578. pr_debug("%s: q6core_avcs_ver_info.status(%d)\n", __func__,
  579. q6core_lcl.q6core_avcs_ver_info.status);
  580. switch (q6core_lcl.q6core_avcs_ver_info.status) {
  581. case VER_QUERY_SUPPORTED:
  582. pr_debug("%s: AVCS FWK version query already attempted\n",
  583. __func__);
  584. break;
  585. case VER_QUERY_UNSUPPORTED:
  586. ret = -EOPNOTSUPP;
  587. break;
  588. case VER_QUERY_UNATTEMPTED:
  589. pr_debug("%s: Attempting AVCS FWK version query\n", __func__);
  590. if (q6core_is_adsp_ready()) {
  591. ret = q6core_send_get_avcs_fwk_ver_cmd();
  592. } else {
  593. pr_err("%s: ADSP is not ready to query version\n",
  594. __func__);
  595. ret = -ENODEV;
  596. }
  597. break;
  598. default:
  599. pr_err("%s: Invalid version query status %d\n", __func__,
  600. q6core_lcl.q6core_avcs_ver_info.status);
  601. ret = -EINVAL;
  602. break;
  603. }
  604. mutex_unlock(&(q6core_lcl.ver_lock));
  605. return ret;
  606. }
  607. size_t q6core_get_fwk_version_size(uint32_t service_id)
  608. {
  609. int ret = 0;
  610. uint32_t num_services;
  611. ret = q6core_get_avcs_fwk_version();
  612. if (ret)
  613. goto done;
  614. if (q6core_lcl.q6core_avcs_ver_info.ver_info != NULL) {
  615. num_services = q6core_lcl.q6core_avcs_ver_info.ver_info
  616. ->avcs_fwk_version.num_services;
  617. } else {
  618. pr_err("%s: ver_info is NULL\n", __func__);
  619. ret = -EINVAL;
  620. goto done;
  621. }
  622. ret = sizeof(struct avcs_get_fwk_version);
  623. if (service_id == AVCS_SERVICE_ID_ALL)
  624. ret += num_services * sizeof(struct avs_svc_api_info);
  625. else
  626. ret += sizeof(struct avs_svc_api_info);
  627. done:
  628. return ret;
  629. }
  630. EXPORT_SYMBOL(q6core_get_fwk_version_size);
  631. /**
  632. * q6core_get_avcs_version_per_service -
  633. * to get api version of a particular service
  634. *
  635. * @service_id: id of the service
  636. *
  637. * Returns valid version on success or error (negative value) on failure
  638. */
  639. int q6core_get_avcs_api_version_per_service(uint32_t service_id)
  640. {
  641. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  642. int i;
  643. uint32_t num_services;
  644. int ret = 0;
  645. if (service_id == AVCS_SERVICE_ID_ALL)
  646. return -EINVAL;
  647. ret = q6core_get_avcs_fwk_version();
  648. if (ret < 0) {
  649. pr_err("%s: failure in getting AVCS version\n", __func__);
  650. return ret;
  651. }
  652. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  653. num_services = cached_ver_info->avcs_fwk_version.num_services;
  654. for (i = 0; i < num_services; i++) {
  655. if (cached_ver_info->services[i].service_id == service_id)
  656. return cached_ver_info->services[i].api_version;
  657. }
  658. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  659. return -EINVAL;
  660. }
  661. EXPORT_SYMBOL(q6core_get_avcs_api_version_per_service);
  662. /**
  663. * q6core_get_avcs_avs_build_version_info - Get AVS build version information
  664. *
  665. * @build_major_version - pointer to build major version
  666. * @build_minor_version - pointer to build minor version
  667. * @build_branch_version - pointer to build branch version
  668. *
  669. * Returns 0 on success and error on failure
  670. */
  671. int q6core_get_avcs_avs_build_version_info(
  672. uint32_t *build_major_version, uint32_t *build_minor_version,
  673. uint32_t *build_branch_version)
  674. {
  675. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  676. int ret = 0;
  677. if (!build_major_version || !build_minor_version ||
  678. !build_branch_version)
  679. return -EINVAL;
  680. ret = q6core_get_avcs_fwk_version();
  681. if (ret < 0)
  682. return ret;
  683. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  684. *build_major_version =
  685. cached_ver_info->avcs_fwk_version.build_major_version;
  686. *build_minor_version =
  687. cached_ver_info->avcs_fwk_version.build_minor_version;
  688. *build_branch_version =
  689. cached_ver_info->avcs_fwk_version.build_branch_version;
  690. return ret;
  691. }
  692. EXPORT_SYMBOL(q6core_get_avcs_avs_build_version_info);
  693. /**
  694. * core_set_license -
  695. * command to set license for module
  696. *
  697. * @key: license key hash
  698. * @module_id: DSP Module ID
  699. *
  700. * Returns 0 on success or error on failure
  701. */
  702. int32_t core_set_license(uint32_t key, uint32_t module_id)
  703. {
  704. struct avcs_cmd_set_license *cmd_setl = NULL;
  705. struct cal_block_data *cal_block = NULL;
  706. int rc = 0, packet_size = 0;
  707. pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id);
  708. mutex_lock(&(q6core_lcl.cmd_lock));
  709. if (q6core_lcl.cal_data[META_CAL] == NULL) {
  710. pr_err("%s: cal_data not initialized yet!!\n", __func__);
  711. rc = -EINVAL;
  712. goto cmd_unlock;
  713. }
  714. mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock));
  715. cal_block = cal_utils_get_cal_block_by_key(
  716. q6core_lcl.cal_data[META_CAL], key);
  717. if (cal_block == NULL ||
  718. cal_block->cal_data.kvaddr == NULL ||
  719. cal_block->cal_data.size <= 0) {
  720. pr_err("%s: Invalid cal block to send", __func__);
  721. rc = -EINVAL;
  722. goto cal_data_unlock;
  723. }
  724. packet_size = sizeof(struct avcs_cmd_set_license) +
  725. cal_block->cal_data.size;
  726. /*round up total packet_size to next 4 byte boundary*/
  727. packet_size = ((packet_size + 0x3)>>2)<<2;
  728. cmd_setl = kzalloc(packet_size, GFP_KERNEL);
  729. if (cmd_setl == NULL) {
  730. rc = -ENOMEM;
  731. goto cal_data_unlock;
  732. }
  733. ocm_core_open();
  734. if (q6core_lcl.core_handle_q == NULL) {
  735. pr_err("%s: apr registration for CORE failed\n", __func__);
  736. rc = -ENODEV;
  737. goto fail_cmd;
  738. }
  739. cmd_setl->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  740. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  741. cmd_setl->hdr.pkt_size = packet_size;
  742. cmd_setl->hdr.src_port = 0;
  743. cmd_setl->hdr.dest_port = 0;
  744. cmd_setl->hdr.token = 0;
  745. cmd_setl->hdr.opcode = AVCS_CMD_SET_LICENSE;
  746. cmd_setl->id = module_id;
  747. cmd_setl->overwrite = 1;
  748. cmd_setl->size = cal_block->cal_data.size;
  749. memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license),
  750. cal_block->cal_data.kvaddr,
  751. cal_block->cal_data.size);
  752. pr_info("%s: Set license opcode=0x%x, id =0x%x, size = %d\n",
  753. __func__, cmd_setl->hdr.opcode,
  754. cmd_setl->id, cmd_setl->size);
  755. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)cmd_setl);
  756. if (rc < 0)
  757. pr_err("%s: SET_LICENSE failed op[0x%x]rc[%d]\n",
  758. __func__, cmd_setl->hdr.opcode, rc);
  759. fail_cmd:
  760. kfree(cmd_setl);
  761. cal_data_unlock:
  762. mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock));
  763. cmd_unlock:
  764. mutex_unlock(&(q6core_lcl.cmd_lock));
  765. return rc;
  766. }
  767. EXPORT_SYMBOL(core_set_license);
  768. /**
  769. * core_get_license_status -
  770. * command to retrieve license status for module
  771. *
  772. * @module_id: DSP Module ID
  773. *
  774. * Returns 0 on success or error on failure
  775. */
  776. int32_t core_get_license_status(uint32_t module_id)
  777. {
  778. struct avcs_cmd_get_license_validation_result get_lvr_cmd;
  779. int ret = 0;
  780. pr_debug("%s: module_id 0x%x", __func__, module_id);
  781. mutex_lock(&(q6core_lcl.cmd_lock));
  782. ocm_core_open();
  783. if (q6core_lcl.core_handle_q == NULL) {
  784. pr_err("%s: apr registration for CORE failed\n", __func__);
  785. ret = -ENODEV;
  786. goto fail_cmd;
  787. }
  788. get_lvr_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  789. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  790. get_lvr_cmd.hdr.pkt_size =
  791. sizeof(struct avcs_cmd_get_license_validation_result);
  792. get_lvr_cmd.hdr.src_port = 0;
  793. get_lvr_cmd.hdr.dest_port = 0;
  794. get_lvr_cmd.hdr.token = 0;
  795. get_lvr_cmd.hdr.opcode = AVCS_CMD_GET_LICENSE_VALIDATION_RESULT;
  796. get_lvr_cmd.id = module_id;
  797. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &get_lvr_cmd);
  798. if (ret < 0) {
  799. pr_err("%s: license_validation request failed, err %d\n",
  800. __func__, ret);
  801. ret = -EREMOTE;
  802. goto fail_cmd;
  803. }
  804. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  805. mutex_unlock(&(q6core_lcl.cmd_lock));
  806. ret = wait_event_timeout(q6core_lcl.cmd_req_wait,
  807. (q6core_lcl.cmd_resp_received_flag ==
  808. FLAG_CMDRSP_LICENSE_RESULT),
  809. msecs_to_jiffies(TIMEOUT_MS));
  810. mutex_lock(&(q6core_lcl.cmd_lock));
  811. if (!ret) {
  812. pr_err("%s: wait_event timeout for CMDRSP_LICENSE_RESULT\n",
  813. __func__);
  814. ret = -ETIME;
  815. goto fail_cmd;
  816. }
  817. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  818. ret = q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result;
  819. fail_cmd:
  820. mutex_unlock(&(q6core_lcl.cmd_lock));
  821. pr_info("%s: cmdrsp_license_result.result = 0x%x for module 0x%x\n",
  822. __func__, ret, module_id);
  823. return ret;
  824. }
  825. EXPORT_SYMBOL(core_get_license_status);
  826. /**
  827. * core_set_dolby_manufacturer_id -
  828. * command to set dolby manufacturer id
  829. *
  830. * @manufacturer_id: Dolby manufacturer id
  831. *
  832. * Returns 0 on success or error on failure
  833. */
  834. uint32_t core_set_dolby_manufacturer_id(int manufacturer_id)
  835. {
  836. struct adsp_dolby_manufacturer_id payload;
  837. int rc = 0;
  838. pr_debug("%s: manufacturer_id :%d\n", __func__, manufacturer_id);
  839. mutex_lock(&(q6core_lcl.cmd_lock));
  840. ocm_core_open();
  841. if (q6core_lcl.core_handle_q) {
  842. payload.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  843. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  844. payload.hdr.pkt_size =
  845. sizeof(struct adsp_dolby_manufacturer_id);
  846. payload.hdr.src_port = 0;
  847. payload.hdr.dest_port = 0;
  848. payload.hdr.token = 0;
  849. payload.hdr.opcode = ADSP_CMD_SET_DOLBY_MANUFACTURER_ID;
  850. payload.manufacturer_id = manufacturer_id;
  851. pr_debug("%s: Send Dolby security opcode=0x%x manufacturer ID = %d\n",
  852. __func__,
  853. payload.hdr.opcode, payload.manufacturer_id);
  854. rc = apr_send_pkt(q6core_lcl.core_handle_q,
  855. (uint32_t *)&payload);
  856. if (rc < 0)
  857. pr_err("%s: SET_DOLBY_MANUFACTURER_ID failed op[0x%x]rc[%d]\n",
  858. __func__, payload.hdr.opcode, rc);
  859. }
  860. mutex_unlock(&(q6core_lcl.cmd_lock));
  861. return rc;
  862. }
  863. EXPORT_SYMBOL(core_set_dolby_manufacturer_id);
  864. int32_t q6core_avcs_load_unload_modules(struct avcs_load_unload_modules_payload
  865. *payload, uint32_t preload_type)
  866. {
  867. int ret = 0;
  868. size_t packet_size = 0, payload_size = 0;
  869. struct avcs_cmd_dynamic_modules *mod = NULL;
  870. int num_modules;
  871. unsigned long timeout;
  872. if (payload == NULL) {
  873. pr_err("%s: payload is null\n", __func__);
  874. return -EINVAL;
  875. }
  876. if ((q6core_lcl.avs_state != ADSP_MODULES_READY_AVS_STATE)
  877. && (preload_type == AVCS_LOAD_MODULES)) {
  878. timeout = jiffies +
  879. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  880. do {
  881. q6core_is_adsp_ready();
  882. if (q6core_lcl.param == ADSP_MODULES_READY_AVS_STATE) {
  883. pr_debug("%s: ADSP state up with all modules loaded\n",
  884. __func__);
  885. q6core_lcl.avs_state = ADSP_MODULES_READY_AVS_STATE;
  886. break;
  887. }
  888. /*
  889. * ADSP will be coming up after boot up and AVS might
  890. * not be fully up with all modules when the control reaches here.
  891. * So, wait for 50msec before checking ADSP state again.
  892. */
  893. msleep(50);
  894. } while (time_after(timeout, jiffies));
  895. if (q6core_lcl.param != ADSP_MODULES_READY_AVS_STATE)
  896. pr_err("%s: all modules might be not loaded yet on ADSP\n",
  897. __func__);
  898. }
  899. mutex_lock(&(q6core_lcl.cmd_lock));
  900. num_modules = payload->num_modules;
  901. ocm_core_open();
  902. if (q6core_lcl.core_handle_q == NULL) {
  903. pr_err("%s: apr registration for CORE failed\n", __func__);
  904. mutex_unlock(&(q6core_lcl.cmd_lock));
  905. return -ENODEV;
  906. }
  907. payload_size = (sizeof(struct avcs_load_unload_modules_sec_payload)
  908. * num_modules) + sizeof(uint32_t);
  909. packet_size = sizeof(struct avcs_cmd_dynamic_modules) +
  910. payload_size - sizeof(uint32_t);
  911. mod = kzalloc(packet_size, GFP_KERNEL);
  912. if (!mod) {
  913. mutex_unlock(&(q6core_lcl.cmd_lock));
  914. return -ENOMEM;
  915. }
  916. rsp_payload = kzalloc(payload_size, GFP_KERNEL);
  917. if (!rsp_payload) {
  918. kfree(mod);
  919. mutex_unlock(&(q6core_lcl.cmd_lock));
  920. return -ENOMEM;
  921. }
  922. memcpy((uint8_t *)mod + sizeof(struct apr_hdr) +
  923. sizeof(struct avcs_load_unload_modules_meminfo),
  924. payload, payload_size);
  925. mod->hdr.hdr_field =
  926. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  927. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  928. mod->hdr.pkt_size = packet_size;
  929. mod->hdr.src_port = 0;
  930. mod->hdr.dest_port = 0;
  931. mod->hdr.token = 0;
  932. mod->meminfo.data_payload_addr_lsw = 0;
  933. mod->meminfo.data_payload_addr_msw = 0;
  934. mod->meminfo.mem_map_handle = 0;
  935. mod->meminfo.buffer_size = payload_size;
  936. if (preload_type == AVCS_LOAD_MODULES)
  937. mod->hdr.opcode = AVCS_CMD_LOAD_MODULES;
  938. else
  939. mod->hdr.opcode = AVCS_CMD_UNLOAD_MODULES;
  940. q6core_lcl.adsp_status = 0;
  941. q6core_lcl.avcs_module_resp_received = 0;
  942. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  943. (uint32_t *)mod);
  944. if (ret < 0) {
  945. pr_err("%s: modules load/unload failed ret = %d\n",
  946. __func__, ret);
  947. goto done;
  948. }
  949. ret = wait_event_timeout(q6core_lcl.avcs_module_load_unload_wait,
  950. (q6core_lcl.avcs_module_resp_received == 1),
  951. msecs_to_jiffies(TIMEOUT_MS));
  952. if (!ret) {
  953. pr_err("%s wait event timeout for avcs load/unload module\n",
  954. __func__);
  955. ret = -ETIMEDOUT;
  956. goto done;
  957. }
  958. if (q6core_lcl.adsp_status < 0) {
  959. pr_err("%s: modules load/unload failed %d\n", __func__,
  960. q6core_lcl.adsp_status);
  961. ret = q6core_lcl.adsp_status;
  962. goto done;
  963. } else {
  964. if (mod->hdr.opcode == AVCS_CMD_LOAD_MODULES)
  965. memcpy(payload, rsp_payload, payload_size);
  966. }
  967. done:
  968. kfree(mod);
  969. kfree(rsp_payload);
  970. mutex_unlock(&(q6core_lcl.cmd_lock));
  971. return ret;
  972. }
  973. EXPORT_SYMBOL(q6core_avcs_load_unload_modules);
  974. int32_t q6core_load_unload_topo_modules(uint32_t topo_id,
  975. bool preload_type)
  976. {
  977. struct avcs_cmd_load_unload_topo_modules load_unload_topo_modules;
  978. int ret = 0;
  979. mutex_lock(&(q6core_lcl.cmd_lock));
  980. ocm_core_open();
  981. if (q6core_lcl.core_handle_q == NULL) {
  982. pr_err("%s: apr registration for CORE failed\n", __func__);
  983. ret = -ENODEV;
  984. goto done;
  985. }
  986. memset(&load_unload_topo_modules, 0, sizeof(load_unload_topo_modules));
  987. load_unload_topo_modules.hdr.hdr_field =
  988. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  989. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  990. load_unload_topo_modules.hdr.pkt_size =
  991. sizeof(struct avcs_cmd_load_unload_topo_modules);
  992. load_unload_topo_modules.hdr.src_port = 0;
  993. load_unload_topo_modules.hdr.dest_port = 0;
  994. load_unload_topo_modules.hdr.token = 0;
  995. if (preload_type == CORE_LOAD_TOPOLOGY)
  996. load_unload_topo_modules.hdr.opcode =
  997. AVCS_CMD_LOAD_TOPO_MODULES;
  998. else
  999. load_unload_topo_modules.hdr.opcode =
  1000. AVCS_CMD_UNLOAD_TOPO_MODULES;
  1001. load_unload_topo_modules.topology_id = topo_id;
  1002. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  1003. (uint32_t *) &load_unload_topo_modules);
  1004. if (ret < 0) {
  1005. pr_err("%s: Load/unload topo modules failed for topology = %d ret = %d\n",
  1006. __func__, topo_id, ret);
  1007. ret = -EINVAL;
  1008. }
  1009. done:
  1010. mutex_unlock(&(q6core_lcl.cmd_lock));
  1011. return ret;
  1012. }
  1013. EXPORT_SYMBOL(q6core_load_unload_topo_modules);
  1014. /**
  1015. * q6core_is_adsp_ready - check adsp ready status
  1016. *
  1017. * Returns true if adsp is ready otherwise returns false
  1018. */
  1019. bool q6core_is_adsp_ready(void)
  1020. {
  1021. int rc = 0;
  1022. bool ret = false;
  1023. struct apr_hdr hdr;
  1024. pr_debug("%s: enter\n", __func__);
  1025. memset(&hdr, 0, sizeof(hdr));
  1026. hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1027. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1028. hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, 0);
  1029. hdr.opcode = AVCS_CMD_ADSP_EVENT_GET_STATE;
  1030. mutex_lock(&(q6core_lcl.cmd_lock));
  1031. ocm_core_open();
  1032. if (q6core_lcl.core_handle_q) {
  1033. q6core_lcl.bus_bw_resp_received = 0;
  1034. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)&hdr);
  1035. if (rc < 0) {
  1036. pr_err_ratelimited("%s: Get ADSP state APR packet send event %d\n",
  1037. __func__, rc);
  1038. goto bail;
  1039. }
  1040. rc = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1041. (q6core_lcl.bus_bw_resp_received == 1),
  1042. msecs_to_jiffies(Q6_READY_TIMEOUT_MS));
  1043. if (rc > 0 && q6core_lcl.bus_bw_resp_received) {
  1044. /* ensure to read updated param by callback thread */
  1045. rmb();
  1046. ret = !!q6core_lcl.param;
  1047. }
  1048. }
  1049. bail:
  1050. pr_debug("%s: leave, rc %d, adsp ready %d\n", __func__, rc, ret);
  1051. mutex_unlock(&(q6core_lcl.cmd_lock));
  1052. return ret;
  1053. }
  1054. EXPORT_SYMBOL(q6core_is_adsp_ready);
  1055. int q6core_create_lpass_npa_client(uint32_t node_id, char *client_name,
  1056. uint32_t *client_handle)
  1057. {
  1058. struct avcs_cmd_create_lpass_npa_client_t create_lpass_npa_client;
  1059. struct avcs_cmd_create_lpass_npa_client_t *cmd_ptr =
  1060. &create_lpass_npa_client;
  1061. int ret = 0;
  1062. if (!client_name) {
  1063. pr_err("%s: Invalid params\n", __func__);
  1064. return -EINVAL;
  1065. }
  1066. mutex_lock(&(q6core_lcl.cmd_lock));
  1067. memset(cmd_ptr, 0, sizeof(create_lpass_npa_client));
  1068. cmd_ptr->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1069. APR_HDR_LEN(APR_HDR_SIZE),
  1070. APR_PKT_VER);
  1071. cmd_ptr->hdr.pkt_size = sizeof(create_lpass_npa_client);
  1072. cmd_ptr->hdr.src_port = 0;
  1073. cmd_ptr->hdr.dest_port = 0;
  1074. cmd_ptr->hdr.token = 0;
  1075. cmd_ptr->hdr.opcode = AVCS_CMD_CREATE_LPASS_NPA_CLIENT;
  1076. cmd_ptr->node_id = AVCS_SLEEP_ISLAND_CORE_DRIVER_NODE_ID;
  1077. strlcpy(cmd_ptr->client_name, client_name,
  1078. sizeof(cmd_ptr->client_name));
  1079. pr_debug("%s: create lpass npa client opcode[0x%x] node id[0x%x]\n",
  1080. __func__, cmd_ptr->hdr.opcode, cmd_ptr->node_id);
  1081. *client_handle = 0;
  1082. q6core_lcl.adsp_status = 0;
  1083. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  1084. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  1085. if (ret < 0) {
  1086. pr_err("%s: create lpass npa client failed %d\n",
  1087. __func__, ret);
  1088. ret = -EINVAL;
  1089. goto done;
  1090. }
  1091. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  1092. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  1093. msecs_to_jiffies(TIMEOUT_MS));
  1094. if (!ret) {
  1095. pr_err("%s: timeout. waited for create lpass npa rsc client\n",
  1096. __func__);
  1097. ret = -ETIMEDOUT;
  1098. goto done;
  1099. } else {
  1100. /* set ret to 0 as no timeout happened */
  1101. ret = 0;
  1102. }
  1103. if (q6core_lcl.adsp_status < 0) {
  1104. pr_err("%s: DSP returned error %d\n",
  1105. __func__, q6core_lcl.adsp_status);
  1106. ret = q6core_lcl.adsp_status;
  1107. goto done;
  1108. }
  1109. *client_handle = q6core_lcl.npa_client_handle;
  1110. pr_debug("%s: q6core_lcl.npa_client_handle %d\n", __func__,
  1111. q6core_lcl.npa_client_handle);
  1112. done:
  1113. mutex_unlock(&q6core_lcl.cmd_lock);
  1114. return ret;
  1115. }
  1116. EXPORT_SYMBOL(q6core_create_lpass_npa_client);
  1117. int q6core_destroy_lpass_npa_client(uint32_t client_handle)
  1118. {
  1119. struct avcs_cmd_destroy_lpass_npa_client_t destroy_lpass_npa_client;
  1120. struct avcs_cmd_destroy_lpass_npa_client_t *cmd_ptr =
  1121. &destroy_lpass_npa_client;
  1122. int ret = 0;
  1123. mutex_lock(&(q6core_lcl.cmd_lock));
  1124. memset(cmd_ptr, 0, sizeof(destroy_lpass_npa_client));
  1125. cmd_ptr->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1126. APR_HDR_LEN(APR_HDR_SIZE),
  1127. APR_PKT_VER);
  1128. cmd_ptr->hdr.pkt_size = sizeof(destroy_lpass_npa_client);
  1129. cmd_ptr->hdr.src_port = 0;
  1130. cmd_ptr->hdr.dest_port = 0;
  1131. cmd_ptr->hdr.token = 0;
  1132. cmd_ptr->hdr.opcode = AVCS_CMD_DESTROY_LPASS_NPA_CLIENT;
  1133. cmd_ptr->client_handle = client_handle;
  1134. pr_debug("%s: dstry lpass npa client opcode[0x%x] client hdl[0x%x]\n",
  1135. __func__, cmd_ptr->hdr.opcode, cmd_ptr->client_handle);
  1136. q6core_lcl.adsp_status = 0;
  1137. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  1138. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  1139. if (ret < 0) {
  1140. pr_err("%s: destroy lpass npa client failed %d\n",
  1141. __func__, ret);
  1142. ret = -EINVAL;
  1143. goto done;
  1144. }
  1145. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  1146. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  1147. msecs_to_jiffies(TIMEOUT_MS));
  1148. if (!ret) {
  1149. pr_err("%s: timeout. waited for destroy lpass npa rsc client\n",
  1150. __func__);
  1151. ret = -ETIMEDOUT;
  1152. goto done;
  1153. } else {
  1154. /* set ret to 0 as no timeout happened */
  1155. ret = 0;
  1156. }
  1157. if (q6core_lcl.adsp_status < 0) {
  1158. pr_err("%s: DSP returned error %d\n",
  1159. __func__, q6core_lcl.adsp_status);
  1160. ret = q6core_lcl.adsp_status;
  1161. }
  1162. done:
  1163. mutex_unlock(&q6core_lcl.cmd_lock);
  1164. return ret;
  1165. }
  1166. EXPORT_SYMBOL(q6core_destroy_lpass_npa_client);
  1167. int q6core_request_island_transition(uint32_t client_handle,
  1168. uint32_t island_allow_mode)
  1169. {
  1170. struct avcs_sleep_node_island_transition_config_t island_tsn_cfg;
  1171. struct avcs_sleep_node_island_transition_config_t *cmd_ptr =
  1172. &island_tsn_cfg;
  1173. int ret = 0;
  1174. mutex_lock(&(q6core_lcl.cmd_lock));
  1175. memset(cmd_ptr, 0, sizeof(island_tsn_cfg));
  1176. cmd_ptr->req_lpass_npa_rsc.hdr.hdr_field =
  1177. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1178. APR_HDR_LEN(APR_HDR_SIZE),
  1179. APR_PKT_VER);
  1180. cmd_ptr->req_lpass_npa_rsc.hdr.pkt_size = sizeof(island_tsn_cfg);
  1181. cmd_ptr->req_lpass_npa_rsc.hdr.src_port = 0;
  1182. cmd_ptr->req_lpass_npa_rsc.hdr.dest_port = 0;
  1183. cmd_ptr->req_lpass_npa_rsc.hdr.token = 0;
  1184. cmd_ptr->req_lpass_npa_rsc.hdr.opcode =
  1185. AVCS_CMD_REQUEST_LPASS_NPA_RESOURCES;
  1186. cmd_ptr->req_lpass_npa_rsc.client_handle = client_handle;
  1187. cmd_ptr->req_lpass_npa_rsc.resource_id =
  1188. AVCS_SLEEP_NODE_ISLAND_TRANSITION_RESOURCE_ID;
  1189. cmd_ptr->island_allow_mode = island_allow_mode;
  1190. pr_debug("%s: req islnd tnsn opcode[0x%x] island_allow_mode[0x%x]\n",
  1191. __func__, cmd_ptr->req_lpass_npa_rsc.hdr.opcode,
  1192. cmd_ptr->island_allow_mode);
  1193. q6core_lcl.adsp_status = 0;
  1194. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  1195. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  1196. if (ret < 0) {
  1197. pr_err("%s: island tnsn cmd send failed %d\n",
  1198. __func__, ret);
  1199. ret = -EINVAL;
  1200. goto done;
  1201. }
  1202. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  1203. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  1204. msecs_to_jiffies(TIMEOUT_MS));
  1205. if (!ret) {
  1206. pr_err("%s: timeout. waited for island lpass npa rsc req\n",
  1207. __func__);
  1208. ret = -ETIMEDOUT;
  1209. goto done;
  1210. } else {
  1211. /* set ret to 0 as no timeout happened */
  1212. ret = 0;
  1213. }
  1214. if (q6core_lcl.adsp_status < 0) {
  1215. pr_err("%s: DSP returned error %d\n",
  1216. __func__, q6core_lcl.adsp_status);
  1217. ret = q6core_lcl.adsp_status;
  1218. }
  1219. done:
  1220. mutex_unlock(&q6core_lcl.cmd_lock);
  1221. return ret;
  1222. }
  1223. EXPORT_SYMBOL(q6core_request_island_transition);
  1224. int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id,
  1225. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  1226. {
  1227. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  1228. struct avs_shared_map_region_payload *mregions = NULL;
  1229. void *mmap_region_cmd = NULL;
  1230. void *payload = NULL;
  1231. int ret = 0;
  1232. int i = 0;
  1233. int cmd_size = 0;
  1234. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  1235. + sizeof(struct avs_shared_map_region_payload)
  1236. * bufcnt;
  1237. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1238. if (mmap_region_cmd == NULL)
  1239. return -ENOMEM;
  1240. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  1241. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1242. APR_HDR_LEN(APR_HDR_SIZE),
  1243. APR_PKT_VER);
  1244. mmap_regions->hdr.pkt_size = cmd_size;
  1245. mmap_regions->hdr.src_port = 0;
  1246. mmap_regions->hdr.dest_port = 0;
  1247. mmap_regions->hdr.token = 0;
  1248. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  1249. mmap_regions->mem_pool_id = mempool_id & 0x00ff;
  1250. mmap_regions->num_regions = bufcnt & 0x00ff;
  1251. mmap_regions->property_flag = 0x00;
  1252. payload = ((u8 *) mmap_region_cmd +
  1253. sizeof(struct avs_cmd_shared_mem_map_regions));
  1254. mregions = (struct avs_shared_map_region_payload *)payload;
  1255. for (i = 0; i < bufcnt; i++) {
  1256. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1257. mregions->shm_addr_msw =
  1258. msm_audio_populate_upper_32_bits(buf_add[i]);
  1259. mregions->mem_size_bytes = bufsz[i];
  1260. ++mregions;
  1261. }
  1262. pr_debug("%s: sending memory map, addr %pK, size %d, bufcnt = %d\n",
  1263. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1264. *map_handle = 0;
  1265. q6core_lcl.adsp_status = 0;
  1266. q6core_lcl.bus_bw_resp_received = 0;
  1267. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1268. mmap_regions);
  1269. if (ret < 0) {
  1270. pr_err("%s: mmap regions failed %d\n",
  1271. __func__, ret);
  1272. ret = -EINVAL;
  1273. goto done;
  1274. }
  1275. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1276. (q6core_lcl.bus_bw_resp_received == 1),
  1277. msecs_to_jiffies(TIMEOUT_MS));
  1278. if (!ret) {
  1279. pr_err("%s: timeout. waited for memory map\n", __func__);
  1280. ret = -ETIME;
  1281. goto done;
  1282. } else {
  1283. /* set ret to 0 as no timeout happened */
  1284. ret = 0;
  1285. }
  1286. if (q6core_lcl.adsp_status < 0) {
  1287. pr_err("%s: DSP returned error %d\n",
  1288. __func__, q6core_lcl.adsp_status);
  1289. ret = q6core_lcl.adsp_status;
  1290. goto done;
  1291. }
  1292. *map_handle = q6core_lcl.mem_map_cal_handle;
  1293. done:
  1294. kfree(mmap_region_cmd);
  1295. return ret;
  1296. }
  1297. /**
  1298. * q6core_map_mdf_memory_regions - for sending MDF shared memory map information
  1299. * to ADSP.
  1300. *
  1301. * @buf_add: array of buffers.
  1302. * @mempool_id: memory pool ID
  1303. * @bufsz: size of the buffer
  1304. * @bufcnt: buffers count
  1305. * @map_handle: map handle received from ADSP
  1306. */
  1307. int q6core_map_mdf_memory_regions(uint64_t *buf_add, uint32_t mempool_id,
  1308. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  1309. {
  1310. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  1311. struct avs_shared_map_region_payload *mregions = NULL;
  1312. void *mmap_region_cmd = NULL;
  1313. void *payload = NULL;
  1314. int ret = 0;
  1315. int i = 0;
  1316. int cmd_size = 0;
  1317. mutex_lock(&q6core_lcl.cmd_lock);
  1318. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  1319. + sizeof(struct avs_shared_map_region_payload)
  1320. * bufcnt;
  1321. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1322. if (mmap_region_cmd == NULL)
  1323. return -ENOMEM;
  1324. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  1325. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1326. APR_HDR_LEN(APR_HDR_SIZE),
  1327. APR_PKT_VER);
  1328. mmap_regions->hdr.pkt_size = cmd_size;
  1329. mmap_regions->hdr.src_port = 0;
  1330. mmap_regions->hdr.dest_port = 0;
  1331. mmap_regions->hdr.token = MDF_MAP_TOKEN;
  1332. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  1333. mmap_regions->mem_pool_id = mempool_id & MEMPOOL_ID_MASK;
  1334. mmap_regions->num_regions = bufcnt & 0x00ff;
  1335. mmap_regions->property_flag = 0x00;
  1336. payload = ((u8 *) mmap_region_cmd +
  1337. sizeof(struct avs_cmd_shared_mem_map_regions));
  1338. mregions = (struct avs_shared_map_region_payload *)payload;
  1339. for (i = 0; i < bufcnt; i++) {
  1340. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1341. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1342. mregions->mem_size_bytes = bufsz[i];
  1343. ++mregions;
  1344. }
  1345. pr_debug("%s: sending MDF memory map, addr %pK, size %d, bufcnt = %d\n",
  1346. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1347. *map_handle = 0;
  1348. q6core_lcl.adsp_status = 0;
  1349. q6core_lcl.mdf_map_resp_received = 0;
  1350. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1351. mmap_regions);
  1352. if (ret < 0) {
  1353. pr_err("%s: mmap regions failed %d\n",
  1354. __func__, ret);
  1355. ret = -EINVAL;
  1356. goto done;
  1357. }
  1358. ret = wait_event_timeout(q6core_lcl.mdf_map_resp_wait,
  1359. (q6core_lcl.mdf_map_resp_received == 1),
  1360. msecs_to_jiffies(TIMEOUT_MS));
  1361. if (!ret) {
  1362. pr_err("%s: timeout. waited for memory map\n", __func__);
  1363. ret = -ETIMEDOUT;
  1364. goto done;
  1365. } else {
  1366. /* set ret to 0 as no timeout happened */
  1367. ret = 0;
  1368. }
  1369. if (q6core_lcl.adsp_status < 0) {
  1370. pr_err("%s: DSP returned error %d\n",
  1371. __func__, q6core_lcl.adsp_status);
  1372. ret = q6core_lcl.adsp_status;
  1373. goto done;
  1374. }
  1375. *map_handle = q6core_lcl.mdf_mem_map_cal_handle;
  1376. done:
  1377. kfree(mmap_region_cmd);
  1378. mutex_unlock(&q6core_lcl.cmd_lock);
  1379. return ret;
  1380. }
  1381. EXPORT_SYMBOL(q6core_map_mdf_memory_regions);
  1382. int q6core_memory_unmap_regions(uint32_t mem_map_handle)
  1383. {
  1384. struct avs_cmd_shared_mem_unmap_regions unmap_regions;
  1385. int ret = 0;
  1386. memset(&unmap_regions, 0, sizeof(unmap_regions));
  1387. unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1388. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1389. unmap_regions.hdr.pkt_size = sizeof(unmap_regions);
  1390. unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE;
  1391. unmap_regions.hdr.src_domain = APR_DOMAIN_APPS;
  1392. unmap_regions.hdr.src_port = 0;
  1393. unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1394. unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP;
  1395. unmap_regions.hdr.dest_port = 0;
  1396. unmap_regions.hdr.token = 0;
  1397. unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS;
  1398. unmap_regions.mem_map_handle = mem_map_handle;
  1399. q6core_lcl.adsp_status = 0;
  1400. q6core_lcl.bus_bw_resp_received = 0;
  1401. pr_debug("%s: unmap regions map handle %d\n",
  1402. __func__, mem_map_handle);
  1403. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1404. &unmap_regions);
  1405. if (ret < 0) {
  1406. pr_err("%s: unmap regions failed %d\n",
  1407. __func__, ret);
  1408. ret = -EINVAL;
  1409. goto done;
  1410. }
  1411. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1412. (q6core_lcl.bus_bw_resp_received == 1),
  1413. msecs_to_jiffies(TIMEOUT_MS));
  1414. if (!ret) {
  1415. pr_err("%s: timeout. waited for memory_unmap\n",
  1416. __func__);
  1417. ret = -ETIME;
  1418. goto done;
  1419. } else {
  1420. /* set ret to 0 as no timeout happened */
  1421. ret = 0;
  1422. }
  1423. if (q6core_lcl.adsp_status < 0) {
  1424. pr_err("%s: DSP returned error %d\n",
  1425. __func__, q6core_lcl.adsp_status);
  1426. ret = q6core_lcl.adsp_status;
  1427. goto done;
  1428. }
  1429. done:
  1430. return ret;
  1431. }
  1432. int q6core_map_mdf_shared_memory(uint32_t map_handle, uint64_t *buf_add,
  1433. uint32_t proc_id, uint32_t *bufsz, uint32_t bufcnt)
  1434. {
  1435. struct avs_cmd_map_mdf_shared_memory *mmap_regions = NULL;
  1436. struct avs_shared_map_region_payload *mregions = NULL;
  1437. void *mmap_region_cmd = NULL;
  1438. void *payload = NULL;
  1439. int ret = 0;
  1440. int i = 0;
  1441. int cmd_size = 0;
  1442. mutex_lock(&q6core_lcl.cmd_lock);
  1443. cmd_size = sizeof(struct avs_cmd_map_mdf_shared_memory)
  1444. + sizeof(struct avs_shared_map_region_payload)
  1445. * bufcnt;
  1446. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1447. if (mmap_region_cmd == NULL) {
  1448. mutex_unlock(&q6core_lcl.cmd_lock);
  1449. return -ENOMEM;
  1450. }
  1451. mmap_regions = (struct avs_cmd_map_mdf_shared_memory *)mmap_region_cmd;
  1452. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1453. APR_HDR_LEN(APR_HDR_SIZE),
  1454. APR_PKT_VER);
  1455. mmap_regions->hdr.pkt_size = cmd_size;
  1456. mmap_regions->hdr.src_port = 0;
  1457. mmap_regions->hdr.dest_port = 0;
  1458. mmap_regions->hdr.token = 0;
  1459. mmap_regions->hdr.opcode = AVCS_CMD_MAP_MDF_SHARED_MEMORY;
  1460. mmap_regions->mem_map_handle = map_handle;
  1461. mmap_regions->proc_id = proc_id & 0x00ff;
  1462. mmap_regions->num_regions = bufcnt & 0x00ff;
  1463. payload = ((u8 *) mmap_region_cmd +
  1464. sizeof(struct avs_cmd_map_mdf_shared_memory));
  1465. mregions = (struct avs_shared_map_region_payload *)payload;
  1466. for (i = 0; i < bufcnt; i++) {
  1467. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1468. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1469. mregions->mem_size_bytes = bufsz[i];
  1470. ++mregions;
  1471. }
  1472. pr_debug("%s: sending mdf memory map, addr %pa, size %d, bufcnt = %d\n",
  1473. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1474. q6core_lcl.adsp_status = 0;
  1475. q6core_lcl.bus_bw_resp_received = 0;
  1476. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1477. mmap_regions);
  1478. if (ret < 0) {
  1479. pr_err("%s: mdf memory map failed %d\n",
  1480. __func__, ret);
  1481. ret = -EINVAL;
  1482. goto done;
  1483. }
  1484. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1485. (q6core_lcl.bus_bw_resp_received == 1),
  1486. msecs_to_jiffies(TIMEOUT_MS));
  1487. if (!ret) {
  1488. pr_err("%s: timeout. waited for mdf memory map\n",
  1489. __func__);
  1490. ret = -ETIME;
  1491. goto done;
  1492. } else {
  1493. /* set ret to 0 as no timeout happened */
  1494. ret = 0;
  1495. }
  1496. /*
  1497. * When the remote DSP is not ready, the ADSP will validate and store
  1498. * the memory information and return APR_ENOTREADY to HLOS. The ADSP
  1499. * will map the memory with remote DSP when it is ready. HLOS should
  1500. * not treat APR_ENOTREADY as an error.
  1501. */
  1502. if (q6core_lcl.adsp_status != -APR_ENOTREADY) {
  1503. pr_err("%s: DSP returned error %d\n",
  1504. __func__, q6core_lcl.adsp_status);
  1505. ret = q6core_lcl.adsp_status;
  1506. goto done;
  1507. }
  1508. done:
  1509. kfree(mmap_region_cmd);
  1510. mutex_unlock(&q6core_lcl.cmd_lock);
  1511. return ret;
  1512. }
  1513. static int q6core_dereg_all_custom_topologies(void)
  1514. {
  1515. int ret = 0;
  1516. struct avcs_cmd_deregister_topologies dereg_top;
  1517. memset(&dereg_top, 0, sizeof(dereg_top));
  1518. dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1519. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1520. dereg_top.hdr.pkt_size = sizeof(dereg_top);
  1521. dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1522. dereg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1523. dereg_top.hdr.src_port = 0;
  1524. dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1525. dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1526. dereg_top.hdr.dest_port = 0;
  1527. dereg_top.hdr.token = 0;
  1528. dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES;
  1529. dereg_top.payload_addr_lsw = 0;
  1530. dereg_top.payload_addr_msw = 0;
  1531. dereg_top.mem_map_handle = 0;
  1532. dereg_top.payload_size = 0;
  1533. dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES;
  1534. q6core_lcl.bus_bw_resp_received = 0;
  1535. pr_debug("%s: Deregister topologies mode %d\n",
  1536. __func__, dereg_top.mode);
  1537. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top);
  1538. if (ret < 0) {
  1539. pr_err("%s: Deregister topologies failed %d\n",
  1540. __func__, ret);
  1541. goto done;
  1542. }
  1543. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1544. (q6core_lcl.bus_bw_resp_received == 1),
  1545. msecs_to_jiffies(TIMEOUT_MS));
  1546. if (!ret) {
  1547. pr_err("%s: wait_event timeout for Deregister topologies\n",
  1548. __func__);
  1549. goto done;
  1550. }
  1551. done:
  1552. return ret;
  1553. }
  1554. static int q6core_send_custom_topologies(void)
  1555. {
  1556. int ret = 0;
  1557. int ret2 = 0;
  1558. struct cal_block_data *cal_block = NULL;
  1559. struct avcs_cmd_register_topologies reg_top;
  1560. if (!q6core_is_adsp_ready()) {
  1561. pr_err("%s: ADSP is not ready!\n", __func__);
  1562. return -ENODEV;
  1563. }
  1564. memset(&reg_top, 0, sizeof(reg_top));
  1565. mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1566. mutex_lock(&q6core_lcl.cmd_lock);
  1567. cal_block = cal_utils_get_only_cal_block(
  1568. q6core_lcl.cal_data[CUST_TOP_CAL]);
  1569. if (cal_block == NULL) {
  1570. pr_debug("%s: cal block is NULL!\n", __func__);
  1571. goto unlock;
  1572. }
  1573. if (cal_block->cal_data.size <= 0) {
  1574. pr_debug("%s: cal size is %zd not sending\n",
  1575. __func__, cal_block->cal_data.size);
  1576. goto unlock;
  1577. }
  1578. q6core_dereg_all_custom_topologies();
  1579. ret = q6core_map_memory_regions(&cal_block->cal_data.paddr,
  1580. ADSP_MEMORY_MAP_SHMEM8_4K_POOL,
  1581. (uint32_t *)&cal_block->map_data.map_size, 1,
  1582. &cal_block->map_data.q6map_handle);
  1583. if (ret) {
  1584. pr_err("%s: q6core_map_memory_regions failed\n", __func__);
  1585. goto unlock;
  1586. }
  1587. reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1588. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1589. reg_top.hdr.pkt_size = sizeof(reg_top);
  1590. reg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1591. reg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1592. reg_top.hdr.src_port = 0;
  1593. reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1594. reg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1595. reg_top.hdr.dest_port = 0;
  1596. reg_top.hdr.token = 0;
  1597. reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES;
  1598. reg_top.payload_addr_lsw =
  1599. lower_32_bits(cal_block->cal_data.paddr);
  1600. reg_top.payload_addr_msw =
  1601. msm_audio_populate_upper_32_bits(cal_block->cal_data.paddr);
  1602. reg_top.mem_map_handle = cal_block->map_data.q6map_handle;
  1603. reg_top.payload_size = cal_block->cal_data.size;
  1604. q6core_lcl.adsp_status = 0;
  1605. q6core_lcl.bus_bw_resp_received = 0;
  1606. pr_debug("%s: Register topologies addr %pK, size %zd, map handle %d\n",
  1607. __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size,
  1608. cal_block->map_data.q6map_handle);
  1609. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &reg_top);
  1610. if (ret < 0) {
  1611. pr_err("%s: Register topologies failed %d\n",
  1612. __func__, ret);
  1613. goto unmap;
  1614. }
  1615. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1616. (q6core_lcl.bus_bw_resp_received == 1),
  1617. msecs_to_jiffies(TIMEOUT_MS));
  1618. if (!ret) {
  1619. pr_err("%s: wait_event timeout for Register topologies\n",
  1620. __func__);
  1621. goto unmap;
  1622. }
  1623. if (q6core_lcl.adsp_status < 0)
  1624. ret = q6core_lcl.adsp_status;
  1625. unmap:
  1626. ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle);
  1627. if (ret2) {
  1628. pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n",
  1629. __func__, cal_block->map_data.q6map_handle);
  1630. ret = ret2;
  1631. goto unlock;
  1632. }
  1633. unlock:
  1634. mutex_unlock(&q6core_lcl.cmd_lock);
  1635. mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1636. return ret;
  1637. }
  1638. static int get_cal_type_index(int32_t cal_type)
  1639. {
  1640. int ret = -EINVAL;
  1641. switch (cal_type) {
  1642. case AUDIO_CORE_METAINFO_CAL_TYPE:
  1643. ret = META_CAL;
  1644. break;
  1645. case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE:
  1646. ret = CUST_TOP_CAL;
  1647. break;
  1648. default:
  1649. pr_err("%s: invalid cal type %d!\n", __func__, cal_type);
  1650. }
  1651. return ret;
  1652. }
  1653. static int q6core_alloc_cal(int32_t cal_type,
  1654. size_t data_size, void *data)
  1655. {
  1656. int ret = 0;
  1657. int cal_index;
  1658. cal_index = get_cal_type_index(cal_type);
  1659. if (cal_index < 0) {
  1660. pr_err("%s: could not get cal index %d!\n",
  1661. __func__, cal_index);
  1662. ret = -EINVAL;
  1663. goto done;
  1664. }
  1665. ret = cal_utils_alloc_cal(data_size, data,
  1666. q6core_lcl.cal_data[cal_index], 0, NULL);
  1667. if (ret < 0) {
  1668. pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n",
  1669. __func__, ret, cal_type);
  1670. goto done;
  1671. }
  1672. done:
  1673. return ret;
  1674. }
  1675. static int q6core_dealloc_cal(int32_t cal_type,
  1676. size_t data_size, void *data)
  1677. {
  1678. int ret = 0;
  1679. int cal_index;
  1680. cal_index = get_cal_type_index(cal_type);
  1681. if (cal_index < 0) {
  1682. pr_err("%s: could not get cal index %d!\n",
  1683. __func__, cal_index);
  1684. ret = -EINVAL;
  1685. goto done;
  1686. }
  1687. ret = cal_utils_dealloc_cal(data_size, data,
  1688. q6core_lcl.cal_data[cal_index]);
  1689. if (ret < 0) {
  1690. pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n",
  1691. __func__, ret, cal_type);
  1692. goto done;
  1693. }
  1694. done:
  1695. return ret;
  1696. }
  1697. static int q6core_set_cal(int32_t cal_type,
  1698. size_t data_size, void *data)
  1699. {
  1700. int ret = 0;
  1701. int cal_index;
  1702. cal_index = get_cal_type_index(cal_type);
  1703. if (cal_index < 0) {
  1704. pr_err("%s: could not get cal index %d!\n",
  1705. __func__, cal_index);
  1706. ret = -EINVAL;
  1707. goto done;
  1708. }
  1709. ret = cal_utils_set_cal(data_size, data,
  1710. q6core_lcl.cal_data[cal_index], 0, NULL);
  1711. if (ret < 0) {
  1712. pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n",
  1713. __func__, ret, cal_type);
  1714. goto done;
  1715. }
  1716. if (cal_index == CUST_TOP_CAL)
  1717. ret = q6core_send_custom_topologies();
  1718. done:
  1719. return ret;
  1720. }
  1721. static void q6core_delete_cal_data(void)
  1722. {
  1723. pr_debug("%s:\n", __func__);
  1724. cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data);
  1725. }
  1726. static int q6core_init_cal_data(void)
  1727. {
  1728. int ret = 0;
  1729. struct cal_type_info cal_type_info[] = {
  1730. {{AUDIO_CORE_METAINFO_CAL_TYPE,
  1731. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1732. q6core_set_cal, NULL, NULL} },
  1733. {NULL, NULL, cal_utils_match_buf_num} },
  1734. {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
  1735. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1736. q6core_set_cal, NULL, NULL} },
  1737. {NULL, NULL, cal_utils_match_buf_num} }
  1738. };
  1739. pr_debug("%s:\n", __func__);
  1740. ret = cal_utils_create_cal_types(CORE_MAX_CAL,
  1741. q6core_lcl.cal_data, cal_type_info);
  1742. if (ret < 0) {
  1743. pr_err("%s: could not create cal type!\n",
  1744. __func__);
  1745. goto err;
  1746. }
  1747. return ret;
  1748. err:
  1749. q6core_delete_cal_data();
  1750. return ret;
  1751. }
  1752. static int q6core_is_avs_up(int32_t *avs_state)
  1753. {
  1754. unsigned long timeout;
  1755. int32_t adsp_ready = 0;
  1756. int ret = 0;
  1757. timeout = jiffies +
  1758. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  1759. /* sleep for 100ms before querying AVS up */
  1760. msleep(100);
  1761. do {
  1762. adsp_ready = q6core_is_adsp_ready();
  1763. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1764. adsp_ready ? "ready" : "not ready");
  1765. if (adsp_ready)
  1766. break;
  1767. /*
  1768. * ADSP will be coming up after boot up and AVS might
  1769. * not be fully up when the control reaches here.
  1770. * So, wait for 50msec before checking ADSP state again.
  1771. */
  1772. msleep(50);
  1773. } while (time_after(timeout, jiffies));
  1774. *avs_state = q6core_lcl.param;
  1775. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1776. adsp_ready ? "ready" : "not ready");
  1777. if (!adsp_ready) {
  1778. pr_err_ratelimited("%s: Timeout. ADSP Audio is not ready\n",
  1779. __func__);
  1780. ret = -ETIMEDOUT;
  1781. }
  1782. return ret;
  1783. }
  1784. static int q6core_ssr_enable(struct device *dev, void *data)
  1785. {
  1786. int32_t avs_state = 0;
  1787. int ret = 0;
  1788. if (!dev) {
  1789. pr_err("%s: dev is NULL\n", __func__);
  1790. return -EINVAL;
  1791. }
  1792. if (!q6core_lcl.avs_state) {
  1793. ret = q6core_is_avs_up(&avs_state);
  1794. if (ret < 0)
  1795. goto err;
  1796. q6core_lcl.avs_state = avs_state;
  1797. }
  1798. err:
  1799. return ret;
  1800. }
  1801. static void q6core_ssr_disable(struct device *dev, void *data)
  1802. {
  1803. /* Reset AVS state to 0 */
  1804. q6core_lcl.avs_state = 0;
  1805. }
  1806. static const struct snd_event_ops q6core_ssr_ops = {
  1807. .enable = q6core_ssr_enable,
  1808. .disable = q6core_ssr_disable,
  1809. };
  1810. static int q6core_probe(struct platform_device *pdev)
  1811. {
  1812. int32_t avs_state = 0;
  1813. int rc = 0;
  1814. rc = q6core_is_avs_up(&avs_state);
  1815. if (rc < 0)
  1816. goto err;
  1817. q6core_lcl.avs_state = avs_state;
  1818. rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  1819. if (rc) {
  1820. dev_err(&pdev->dev, "%s: failed to add child nodes, rc=%d\n",
  1821. __func__, rc);
  1822. rc = -EINVAL;
  1823. goto err;
  1824. }
  1825. dev_dbg(&pdev->dev, "%s: added child node\n", __func__);
  1826. rc = snd_event_client_register(&pdev->dev, &q6core_ssr_ops, NULL);
  1827. if (!rc) {
  1828. snd_event_notify(&pdev->dev, SND_EVENT_UP);
  1829. } else {
  1830. dev_err(&pdev->dev,
  1831. "%s: Registration with SND event fwk failed rc = %d\n",
  1832. __func__, rc);
  1833. rc = 0;
  1834. }
  1835. err:
  1836. return rc;
  1837. }
  1838. static int q6core_remove(struct platform_device *pdev)
  1839. {
  1840. snd_event_client_deregister(&pdev->dev);
  1841. of_platform_depopulate(&pdev->dev);
  1842. return 0;
  1843. }
  1844. static const struct of_device_id q6core_of_match[] = {
  1845. { .compatible = "qcom,q6core-audio", },
  1846. {},
  1847. };
  1848. static struct platform_driver q6core_driver = {
  1849. .probe = q6core_probe,
  1850. .remove = q6core_remove,
  1851. .driver = {
  1852. .name = "q6core_audio",
  1853. .owner = THIS_MODULE,
  1854. .of_match_table = q6core_of_match,
  1855. .suppress_bind_attrs = true,
  1856. }
  1857. };
  1858. int __init core_init(void)
  1859. {
  1860. memset(&q6core_lcl, 0, sizeof(struct q6core_str));
  1861. init_waitqueue_head(&q6core_lcl.bus_bw_req_wait);
  1862. init_waitqueue_head(&q6core_lcl.cmd_req_wait);
  1863. init_waitqueue_head(&q6core_lcl.avcs_fwk_ver_req_wait);
  1864. init_waitqueue_head(&q6core_lcl.mdf_map_resp_wait);
  1865. init_waitqueue_head(&q6core_lcl.lpass_npa_rsc_wait);
  1866. init_waitqueue_head(&q6core_lcl.avcs_module_load_unload_wait);
  1867. q6core_lcl.cmd_resp_received_flag = FLAG_NONE;
  1868. mutex_init(&q6core_lcl.cmd_lock);
  1869. mutex_init(&q6core_lcl.ver_lock);
  1870. q6core_init_cal_data();
  1871. q6core_init_uevent_kset();
  1872. return platform_driver_register(&q6core_driver);
  1873. }
  1874. void core_exit(void)
  1875. {
  1876. mutex_destroy(&q6core_lcl.cmd_lock);
  1877. mutex_destroy(&q6core_lcl.ver_lock);
  1878. q6core_delete_cal_data();
  1879. q6core_destroy_uevent_kset();
  1880. platform_driver_unregister(&q6core_driver);
  1881. }
  1882. MODULE_DESCRIPTION("ADSP core driver");
  1883. MODULE_LICENSE("GPL v2");