main.c 117 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  69. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  70. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  71. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  72. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  73. enum cnss_cal_db_op {
  74. CNSS_CAL_DB_UPLOAD,
  75. CNSS_CAL_DB_DOWNLOAD,
  76. CNSS_CAL_DB_INVALID_OP,
  77. };
  78. enum cnss_recovery_type {
  79. CNSS_WLAN_RECOVERY = 0x1,
  80. CNSS_PCSS_RECOVERY = 0x2,
  81. };
  82. static struct cnss_plat_data *plat_env;
  83. static bool cnss_allow_driver_loading;
  84. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  85. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  86. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  87. };
  88. static struct cnss_fw_files FW_FILES_DEFAULT = {
  89. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  90. "utfbd.bin", "epping.bin", "evicted.bin"
  91. };
  92. struct cnss_driver_event {
  93. struct list_head list;
  94. enum cnss_driver_event_type type;
  95. bool sync;
  96. struct completion complete;
  97. int ret;
  98. void *data;
  99. };
  100. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  101. struct cnss_plat_data *plat_priv)
  102. {
  103. plat_env = plat_priv;
  104. }
  105. bool cnss_check_driver_loading_allowed(void)
  106. {
  107. return cnss_allow_driver_loading;
  108. }
  109. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  110. {
  111. return plat_env;
  112. }
  113. /**
  114. * cnss_get_mem_seg_count - Get segment count of memory
  115. * @type: memory type
  116. * @seg: segment count
  117. *
  118. * Return: 0 on success, negative value on failure
  119. */
  120. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  121. {
  122. struct cnss_plat_data *plat_priv;
  123. plat_priv = cnss_get_plat_priv(NULL);
  124. if (!plat_priv)
  125. return -ENODEV;
  126. switch (type) {
  127. case CNSS_REMOTE_MEM_TYPE_FW:
  128. *seg = plat_priv->fw_mem_seg_len;
  129. break;
  130. case CNSS_REMOTE_MEM_TYPE_QDSS:
  131. *seg = plat_priv->qdss_mem_seg_len;
  132. break;
  133. default:
  134. return -EINVAL;
  135. }
  136. return 0;
  137. }
  138. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  139. /**
  140. * cnss_get_wifi_kobject -return wifi kobject
  141. * Return: Null, to maintain driver comnpatibilty
  142. */
  143. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  144. {
  145. struct cnss_plat_data *plat_priv;
  146. plat_priv = cnss_get_plat_priv(NULL);
  147. if (!plat_priv)
  148. return NULL;
  149. return plat_priv->wifi_kobj;
  150. }
  151. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  152. /**
  153. * cnss_get_mem_segment_info - Get memory info of different type
  154. * @type: memory type
  155. * @segment: array to save the segment info
  156. * @seg: segment count
  157. *
  158. * Return: 0 on success, negative value on failure
  159. */
  160. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  161. struct cnss_mem_segment segment[],
  162. u32 segment_count)
  163. {
  164. struct cnss_plat_data *plat_priv;
  165. u32 i;
  166. plat_priv = cnss_get_plat_priv(NULL);
  167. if (!plat_priv)
  168. return -ENODEV;
  169. switch (type) {
  170. case CNSS_REMOTE_MEM_TYPE_FW:
  171. if (segment_count > plat_priv->fw_mem_seg_len)
  172. segment_count = plat_priv->fw_mem_seg_len;
  173. for (i = 0; i < segment_count; i++) {
  174. segment[i].size = plat_priv->fw_mem[i].size;
  175. segment[i].va = plat_priv->fw_mem[i].va;
  176. segment[i].pa = plat_priv->fw_mem[i].pa;
  177. }
  178. break;
  179. case CNSS_REMOTE_MEM_TYPE_QDSS:
  180. if (segment_count > plat_priv->qdss_mem_seg_len)
  181. segment_count = plat_priv->qdss_mem_seg_len;
  182. for (i = 0; i < segment_count; i++) {
  183. segment[i].size = plat_priv->qdss_mem[i].size;
  184. segment[i].va = plat_priv->qdss_mem[i].va;
  185. segment[i].pa = plat_priv->qdss_mem[i].pa;
  186. }
  187. break;
  188. default:
  189. return -EINVAL;
  190. }
  191. return 0;
  192. }
  193. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  194. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  195. {
  196. struct device_node *audio_ion_node;
  197. struct platform_device *audio_ion_pdev;
  198. audio_ion_node = of_find_compatible_node(NULL, NULL,
  199. "qcom,msm-audio-ion");
  200. if (!audio_ion_node) {
  201. cnss_pr_err("Unable to get Audio ion node");
  202. return -EINVAL;
  203. }
  204. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  205. of_node_put(audio_ion_node);
  206. if (!audio_ion_pdev) {
  207. cnss_pr_err("Unable to get Audio ion platform device");
  208. return -EINVAL;
  209. }
  210. plat_priv->audio_iommu_domain =
  211. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  212. put_device(&audio_ion_pdev->dev);
  213. if (!plat_priv->audio_iommu_domain) {
  214. cnss_pr_err("Unable to get Audio ion iommu domain");
  215. return -EINVAL;
  216. }
  217. return 0;
  218. }
  219. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  220. enum cnss_feature_v01 feature)
  221. {
  222. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  223. return -EINVAL;
  224. plat_priv->feature_list |= 1 << feature;
  225. return 0;
  226. }
  227. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  228. enum cnss_feature_v01 feature)
  229. {
  230. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  231. return -EINVAL;
  232. plat_priv->feature_list &= ~(1 << feature);
  233. return 0;
  234. }
  235. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  236. u64 *feature_list)
  237. {
  238. if (unlikely(!plat_priv))
  239. return -EINVAL;
  240. *feature_list = plat_priv->feature_list;
  241. return 0;
  242. }
  243. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  244. {
  245. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  246. return;
  247. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  248. plat_priv->driver_state,
  249. atomic_read(&plat_priv->pm_count));
  250. pm_stay_awake(&plat_priv->plat_dev->dev);
  251. }
  252. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  253. {
  254. int r = atomic_dec_return(&plat_priv->pm_count);
  255. WARN_ON(r < 0);
  256. if (r != 0)
  257. return;
  258. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  259. plat_priv->driver_state,
  260. atomic_read(&plat_priv->pm_count));
  261. pm_relax(&plat_priv->plat_dev->dev);
  262. }
  263. int cnss_get_fw_files_for_target(struct device *dev,
  264. struct cnss_fw_files *pfw_files,
  265. u32 target_type, u32 target_version)
  266. {
  267. if (!pfw_files)
  268. return -ENODEV;
  269. switch (target_version) {
  270. case QCA6174_REV3_VERSION:
  271. case QCA6174_REV3_2_VERSION:
  272. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  273. break;
  274. default:
  275. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  276. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  277. target_type, target_version);
  278. break;
  279. }
  280. return 0;
  281. }
  282. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  283. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  284. {
  285. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  286. if (!plat_priv)
  287. return -ENODEV;
  288. if (!cap)
  289. return -EINVAL;
  290. *cap = plat_priv->cap;
  291. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  292. return 0;
  293. }
  294. EXPORT_SYMBOL(cnss_get_platform_cap);
  295. /**
  296. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  297. * @dev: Device
  298. * @fw_cap: FW Capability which needs to be checked
  299. *
  300. * Return: TRUE if supported, FALSE on failure or if not supported
  301. */
  302. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  303. {
  304. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  305. bool is_supported = false;
  306. if (!plat_priv)
  307. return is_supported;
  308. if (!plat_priv->fw_caps)
  309. return is_supported;
  310. switch (fw_cap) {
  311. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  312. is_supported = !!(plat_priv->fw_caps &
  313. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  314. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  315. is_supported = false;
  316. break;
  317. default:
  318. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  319. }
  320. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  321. is_supported ? "supported" : "not supported");
  322. return is_supported;
  323. }
  324. EXPORT_SYMBOL(cnss_get_fw_cap);
  325. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  326. {
  327. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  328. if (!plat_priv)
  329. return;
  330. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  331. }
  332. EXPORT_SYMBOL(cnss_request_pm_qos);
  333. void cnss_remove_pm_qos(struct device *dev)
  334. {
  335. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  336. if (!plat_priv)
  337. return;
  338. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  339. }
  340. EXPORT_SYMBOL(cnss_remove_pm_qos);
  341. int cnss_wlan_enable(struct device *dev,
  342. struct cnss_wlan_enable_cfg *config,
  343. enum cnss_driver_mode mode,
  344. const char *host_version)
  345. {
  346. int ret = 0;
  347. struct cnss_plat_data *plat_priv;
  348. if (!dev) {
  349. cnss_pr_err("Invalid dev pointer\n");
  350. return -EINVAL;
  351. }
  352. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  353. if (!plat_priv)
  354. return -ENODEV;
  355. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  356. return 0;
  357. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  358. return 0;
  359. if (!config || !host_version) {
  360. cnss_pr_err("Invalid config or host_version pointer\n");
  361. return -EINVAL;
  362. }
  363. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  364. mode, config, host_version);
  365. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  366. goto skip_cfg;
  367. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  368. if (ret)
  369. goto out;
  370. skip_cfg:
  371. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  372. out:
  373. return ret;
  374. }
  375. EXPORT_SYMBOL(cnss_wlan_enable);
  376. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  377. {
  378. int ret = 0;
  379. struct cnss_plat_data *plat_priv;
  380. if (!dev) {
  381. cnss_pr_err("Invalid dev pointer\n");
  382. return -EINVAL;
  383. }
  384. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  385. if (!plat_priv)
  386. return -ENODEV;
  387. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  388. return 0;
  389. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  390. return 0;
  391. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  392. cnss_bus_free_qdss_mem(plat_priv);
  393. return ret;
  394. }
  395. EXPORT_SYMBOL(cnss_wlan_disable);
  396. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  397. dma_addr_t iova, size_t size)
  398. {
  399. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  400. uint32_t page_offset;
  401. if (!plat_priv)
  402. return -ENODEV;
  403. if (!plat_priv->audio_iommu_domain)
  404. return -EINVAL;
  405. page_offset = iova & (PAGE_SIZE - 1);
  406. if (page_offset + size > PAGE_SIZE)
  407. size += PAGE_SIZE;
  408. iova -= page_offset;
  409. paddr -= page_offset;
  410. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  411. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  412. IOMMU_CACHE);
  413. }
  414. EXPORT_SYMBOL(cnss_audio_smmu_map);
  415. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  416. {
  417. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  418. uint32_t page_offset;
  419. if (!plat_priv)
  420. return;
  421. if (!plat_priv->audio_iommu_domain)
  422. return;
  423. page_offset = iova & (PAGE_SIZE - 1);
  424. if (page_offset + size > PAGE_SIZE)
  425. size += PAGE_SIZE;
  426. iova -= page_offset;
  427. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  428. roundup(size, PAGE_SIZE));
  429. }
  430. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  431. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  432. u32 data_len, u8 *output)
  433. {
  434. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  435. int ret = 0;
  436. if (!plat_priv) {
  437. cnss_pr_err("plat_priv is NULL!\n");
  438. return -EINVAL;
  439. }
  440. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  441. return 0;
  442. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  443. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  444. plat_priv->driver_state);
  445. ret = -EINVAL;
  446. goto out;
  447. }
  448. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  449. data_len, output);
  450. out:
  451. return ret;
  452. }
  453. EXPORT_SYMBOL(cnss_athdiag_read);
  454. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  455. u32 data_len, u8 *input)
  456. {
  457. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  458. int ret = 0;
  459. if (!plat_priv) {
  460. cnss_pr_err("plat_priv is NULL!\n");
  461. return -EINVAL;
  462. }
  463. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  464. return 0;
  465. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  466. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  467. plat_priv->driver_state);
  468. ret = -EINVAL;
  469. goto out;
  470. }
  471. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  472. data_len, input);
  473. out:
  474. return ret;
  475. }
  476. EXPORT_SYMBOL(cnss_athdiag_write);
  477. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  478. {
  479. struct cnss_plat_data *plat_priv;
  480. if (!dev) {
  481. cnss_pr_err("Invalid dev pointer\n");
  482. return -EINVAL;
  483. }
  484. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  485. if (!plat_priv)
  486. return -ENODEV;
  487. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  488. return 0;
  489. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  490. }
  491. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  492. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  493. {
  494. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  495. if (!plat_priv)
  496. return -EINVAL;
  497. if (!plat_priv->fw_pcie_gen_switch) {
  498. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  499. return -EOPNOTSUPP;
  500. }
  501. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  502. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  503. return -EINVAL;
  504. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  505. plat_priv->pcie_gen_speed = pcie_gen_speed;
  506. return 0;
  507. }
  508. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  509. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  510. {
  511. int ret = 0;
  512. if (!plat_priv)
  513. return -ENODEV;
  514. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  515. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  516. if (ret)
  517. goto out;
  518. if (plat_priv->hds_enabled)
  519. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  520. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  521. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  522. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  523. plat_priv->ctrl_params.bdf_type);
  524. if (ret)
  525. goto out;
  526. ret = cnss_bus_load_m3(plat_priv);
  527. if (ret)
  528. goto out;
  529. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  530. if (ret)
  531. goto out;
  532. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  533. return 0;
  534. out:
  535. return ret;
  536. }
  537. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  538. {
  539. int ret = 0;
  540. if (!plat_priv->antenna) {
  541. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  542. if (ret)
  543. goto out;
  544. }
  545. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  546. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  547. if (ret)
  548. goto out;
  549. }
  550. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  551. if (ret)
  552. goto out;
  553. return 0;
  554. out:
  555. return ret;
  556. }
  557. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  558. {
  559. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  560. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  561. }
  562. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  563. {
  564. u32 i;
  565. int ret = 0;
  566. struct cnss_plat_ipc_daemon_config *cfg;
  567. ret = cnss_qmi_get_dms_mac(plat_priv);
  568. if (ret == 0 && plat_priv->dms.mac_valid)
  569. goto qmi_send;
  570. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  571. * Thus assert on failure to get MAC from DMS even after retries
  572. */
  573. if (plat_priv->use_nv_mac) {
  574. /* Check if Daemon says platform support DMS MAC provisioning */
  575. cfg = cnss_plat_ipc_qmi_daemon_config();
  576. if (cfg) {
  577. if (!cfg->dms_mac_addr_supported) {
  578. cnss_pr_err("DMS MAC address not supported\n");
  579. CNSS_ASSERT(0);
  580. return -EINVAL;
  581. }
  582. }
  583. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  584. if (plat_priv->dms.mac_valid)
  585. break;
  586. ret = cnss_qmi_get_dms_mac(plat_priv);
  587. if (ret == 0)
  588. break;
  589. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  590. }
  591. if (!plat_priv->dms.mac_valid) {
  592. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  593. CNSS_ASSERT(0);
  594. return -EINVAL;
  595. }
  596. }
  597. qmi_send:
  598. if (plat_priv->dms.mac_valid)
  599. ret =
  600. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  601. ARRAY_SIZE(plat_priv->dms.mac));
  602. return ret;
  603. }
  604. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  605. enum cnss_cal_db_op op, u32 *size)
  606. {
  607. int ret = 0;
  608. u32 timeout = cnss_get_timeout(plat_priv,
  609. CNSS_TIMEOUT_DAEMON_CONNECTION);
  610. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  611. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  612. if (op >= CNSS_CAL_DB_INVALID_OP)
  613. return -EINVAL;
  614. if (!plat_priv->cbc_file_download) {
  615. cnss_pr_info("CAL DB file not required as per BDF\n");
  616. return 0;
  617. }
  618. if (*size == 0) {
  619. cnss_pr_err("Invalid cal file size\n");
  620. return -EINVAL;
  621. }
  622. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  623. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  624. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  625. msecs_to_jiffies(timeout));
  626. if (!ret) {
  627. cnss_pr_err("Daemon not yet connected\n");
  628. CNSS_ASSERT(0);
  629. return ret;
  630. }
  631. }
  632. if (!plat_priv->cal_mem->va) {
  633. cnss_pr_err("CAL DB Memory not setup for FW\n");
  634. return -EINVAL;
  635. }
  636. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  637. if (op == CNSS_CAL_DB_DOWNLOAD) {
  638. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  639. ret = cnss_plat_ipc_qmi_file_download(client_id,
  640. CNSS_CAL_DB_FILE_NAME,
  641. plat_priv->cal_mem->va,
  642. size);
  643. } else {
  644. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  645. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  646. CNSS_CAL_DB_FILE_NAME,
  647. plat_priv->cal_mem->va,
  648. *size);
  649. }
  650. if (ret)
  651. cnss_pr_err("Cal DB file %s %s failure\n",
  652. CNSS_CAL_DB_FILE_NAME,
  653. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  654. else
  655. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  656. CNSS_CAL_DB_FILE_NAME,
  657. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  658. *size);
  659. return ret;
  660. }
  661. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  662. {
  663. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  664. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  665. return -EINVAL;
  666. }
  667. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  668. &plat_priv->cal_file_size);
  669. }
  670. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  671. u32 *cal_file_size)
  672. {
  673. /* To download pass the total size of cal DB mem allocated.
  674. * After cal file is download to mem, its size is updated in
  675. * return pointer
  676. */
  677. *cal_file_size = plat_priv->cal_mem->size;
  678. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  679. cal_file_size);
  680. }
  681. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  682. {
  683. int ret = 0;
  684. u32 cal_file_size = 0;
  685. if (!plat_priv)
  686. return -ENODEV;
  687. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  688. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  689. return -EINVAL;
  690. }
  691. cnss_pr_dbg("Processing FW Init Done..\n");
  692. del_timer(&plat_priv->fw_boot_timer);
  693. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  694. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  695. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  696. cnss_send_subsys_restart_level_msg(plat_priv);
  697. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  698. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  699. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  700. }
  701. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  702. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  703. CNSS_WALTEST);
  704. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  705. cnss_request_antenna_sharing(plat_priv);
  706. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  707. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  708. plat_priv->cal_time = jiffies;
  709. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  710. CNSS_CALIBRATION);
  711. } else {
  712. ret = cnss_setup_dms_mac(plat_priv);
  713. ret = cnss_bus_call_driver_probe(plat_priv);
  714. }
  715. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  716. goto out;
  717. else if (ret)
  718. goto shutdown;
  719. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  720. return 0;
  721. shutdown:
  722. cnss_bus_dev_shutdown(plat_priv);
  723. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  724. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  725. out:
  726. return ret;
  727. }
  728. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  729. {
  730. switch (type) {
  731. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  732. return "SERVER_ARRIVE";
  733. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  734. return "SERVER_EXIT";
  735. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  736. return "REQUEST_MEM";
  737. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  738. return "FW_MEM_READY";
  739. case CNSS_DRIVER_EVENT_FW_READY:
  740. return "FW_READY";
  741. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  742. return "COLD_BOOT_CAL_START";
  743. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  744. return "COLD_BOOT_CAL_DONE";
  745. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  746. return "REGISTER_DRIVER";
  747. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  748. return "UNREGISTER_DRIVER";
  749. case CNSS_DRIVER_EVENT_RECOVERY:
  750. return "RECOVERY";
  751. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  752. return "FORCE_FW_ASSERT";
  753. case CNSS_DRIVER_EVENT_POWER_UP:
  754. return "POWER_UP";
  755. case CNSS_DRIVER_EVENT_POWER_DOWN:
  756. return "POWER_DOWN";
  757. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  758. return "IDLE_RESTART";
  759. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  760. return "IDLE_SHUTDOWN";
  761. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  762. return "IMS_WFC_CALL_IND";
  763. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  764. return "WLFW_TWC_CFG_IND";
  765. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  766. return "QDSS_TRACE_REQ_MEM";
  767. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  768. return "FW_MEM_FILE_SAVE";
  769. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  770. return "QDSS_TRACE_FREE";
  771. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  772. return "QDSS_TRACE_REQ_DATA";
  773. case CNSS_DRIVER_EVENT_MAX:
  774. return "EVENT_MAX";
  775. }
  776. return "UNKNOWN";
  777. };
  778. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  779. enum cnss_driver_event_type type,
  780. u32 flags, void *data)
  781. {
  782. struct cnss_driver_event *event;
  783. unsigned long irq_flags;
  784. int gfp = GFP_KERNEL;
  785. int ret = 0;
  786. if (!plat_priv)
  787. return -ENODEV;
  788. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  789. cnss_driver_event_to_str(type), type,
  790. flags ? "-sync" : "", plat_priv->driver_state, flags);
  791. if (type >= CNSS_DRIVER_EVENT_MAX) {
  792. cnss_pr_err("Invalid Event type: %d, can't post", type);
  793. return -EINVAL;
  794. }
  795. if (in_interrupt() || irqs_disabled())
  796. gfp = GFP_ATOMIC;
  797. event = kzalloc(sizeof(*event), gfp);
  798. if (!event)
  799. return -ENOMEM;
  800. cnss_pm_stay_awake(plat_priv);
  801. event->type = type;
  802. event->data = data;
  803. init_completion(&event->complete);
  804. event->ret = CNSS_EVENT_PENDING;
  805. event->sync = !!(flags & CNSS_EVENT_SYNC);
  806. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  807. list_add_tail(&event->list, &plat_priv->event_list);
  808. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  809. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  810. if (!(flags & CNSS_EVENT_SYNC))
  811. goto out;
  812. if (flags & CNSS_EVENT_UNKILLABLE)
  813. wait_for_completion(&event->complete);
  814. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  815. ret = wait_for_completion_killable(&event->complete);
  816. else
  817. ret = wait_for_completion_interruptible(&event->complete);
  818. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  819. cnss_driver_event_to_str(type), type,
  820. plat_priv->driver_state, ret, event->ret);
  821. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  822. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  823. event->sync = false;
  824. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  825. ret = -EINTR;
  826. goto out;
  827. }
  828. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  829. ret = event->ret;
  830. kfree(event);
  831. out:
  832. cnss_pm_relax(plat_priv);
  833. return ret;
  834. }
  835. /**
  836. * cnss_get_timeout - Get timeout for corresponding type.
  837. * @plat_priv: Pointer to platform driver context.
  838. * @cnss_timeout_type: Timeout type.
  839. *
  840. * Return: Timeout in milliseconds.
  841. */
  842. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  843. enum cnss_timeout_type timeout_type)
  844. {
  845. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  846. switch (timeout_type) {
  847. case CNSS_TIMEOUT_QMI:
  848. return qmi_timeout;
  849. case CNSS_TIMEOUT_POWER_UP:
  850. return (qmi_timeout << 2);
  851. case CNSS_TIMEOUT_IDLE_RESTART:
  852. /* In idle restart power up sequence, we have fw_boot_timer to
  853. * handle FW initialization failure.
  854. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  855. * account for FW dump collection and FW re-initialization on
  856. * retry.
  857. */
  858. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  859. case CNSS_TIMEOUT_CALIBRATION:
  860. /* Similar to mission mode, in CBC if FW init fails
  861. * fw recovery is tried. Thus return 2x the CBC timeout.
  862. */
  863. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  864. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  865. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  866. case CNSS_TIMEOUT_RDDM:
  867. return CNSS_RDDM_TIMEOUT_MS;
  868. case CNSS_TIMEOUT_RECOVERY:
  869. return RECOVERY_TIMEOUT;
  870. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  871. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  872. default:
  873. return qmi_timeout;
  874. }
  875. }
  876. unsigned int cnss_get_boot_timeout(struct device *dev)
  877. {
  878. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  879. if (!plat_priv) {
  880. cnss_pr_err("plat_priv is NULL\n");
  881. return 0;
  882. }
  883. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  884. }
  885. EXPORT_SYMBOL(cnss_get_boot_timeout);
  886. int cnss_power_up(struct device *dev)
  887. {
  888. int ret = 0;
  889. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  890. unsigned int timeout;
  891. if (!plat_priv) {
  892. cnss_pr_err("plat_priv is NULL\n");
  893. return -ENODEV;
  894. }
  895. cnss_pr_dbg("Powering up device\n");
  896. ret = cnss_driver_event_post(plat_priv,
  897. CNSS_DRIVER_EVENT_POWER_UP,
  898. CNSS_EVENT_SYNC, NULL);
  899. if (ret)
  900. goto out;
  901. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  902. goto out;
  903. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  904. reinit_completion(&plat_priv->power_up_complete);
  905. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  906. msecs_to_jiffies(timeout));
  907. if (!ret) {
  908. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  909. timeout);
  910. ret = -EAGAIN;
  911. goto out;
  912. }
  913. return 0;
  914. out:
  915. return ret;
  916. }
  917. EXPORT_SYMBOL(cnss_power_up);
  918. int cnss_power_down(struct device *dev)
  919. {
  920. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  921. if (!plat_priv) {
  922. cnss_pr_err("plat_priv is NULL\n");
  923. return -ENODEV;
  924. }
  925. cnss_pr_dbg("Powering down device\n");
  926. return cnss_driver_event_post(plat_priv,
  927. CNSS_DRIVER_EVENT_POWER_DOWN,
  928. CNSS_EVENT_SYNC, NULL);
  929. }
  930. EXPORT_SYMBOL(cnss_power_down);
  931. int cnss_idle_restart(struct device *dev)
  932. {
  933. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  934. unsigned int timeout;
  935. int ret = 0;
  936. if (!plat_priv) {
  937. cnss_pr_err("plat_priv is NULL\n");
  938. return -ENODEV;
  939. }
  940. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  941. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  942. return -EBUSY;
  943. }
  944. cnss_pr_dbg("Doing idle restart\n");
  945. reinit_completion(&plat_priv->power_up_complete);
  946. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  947. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  948. ret = -EINVAL;
  949. goto out;
  950. }
  951. ret = cnss_driver_event_post(plat_priv,
  952. CNSS_DRIVER_EVENT_IDLE_RESTART,
  953. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  954. if (ret)
  955. goto out;
  956. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  957. ret = cnss_bus_call_driver_probe(plat_priv);
  958. goto out;
  959. }
  960. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  961. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  962. msecs_to_jiffies(timeout));
  963. if (plat_priv->power_up_error) {
  964. ret = plat_priv->power_up_error;
  965. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  966. cnss_pr_dbg("Power up error:%d, exiting\n",
  967. plat_priv->power_up_error);
  968. goto out;
  969. }
  970. if (!ret) {
  971. /* This exception occurs after attempting retry of FW recovery.
  972. * Thus we can safely power off the device.
  973. */
  974. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  975. timeout);
  976. ret = -ETIMEDOUT;
  977. cnss_power_down(dev);
  978. CNSS_ASSERT(0);
  979. goto out;
  980. }
  981. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  982. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  983. del_timer(&plat_priv->fw_boot_timer);
  984. ret = -EINVAL;
  985. goto out;
  986. }
  987. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  988. * non-DRV is supported only once after device reboots and before wifi
  989. * is turned on. We do not allow switching back to DRV.
  990. * To bring device back into DRV, user needs to reboot device.
  991. */
  992. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  993. cnss_pr_dbg("DRV is disabled\n");
  994. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  995. }
  996. mutex_unlock(&plat_priv->driver_ops_lock);
  997. return 0;
  998. out:
  999. mutex_unlock(&plat_priv->driver_ops_lock);
  1000. return ret;
  1001. }
  1002. EXPORT_SYMBOL(cnss_idle_restart);
  1003. int cnss_idle_shutdown(struct device *dev)
  1004. {
  1005. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1006. unsigned int timeout;
  1007. int ret;
  1008. if (!plat_priv) {
  1009. cnss_pr_err("plat_priv is NULL\n");
  1010. return -ENODEV;
  1011. }
  1012. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1013. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1014. return -EAGAIN;
  1015. }
  1016. cnss_pr_dbg("Doing idle shutdown\n");
  1017. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  1018. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1019. goto skip_wait;
  1020. reinit_completion(&plat_priv->recovery_complete);
  1021. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  1022. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  1023. msecs_to_jiffies(timeout));
  1024. if (!ret) {
  1025. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  1026. timeout);
  1027. CNSS_ASSERT(0);
  1028. }
  1029. skip_wait:
  1030. return cnss_driver_event_post(plat_priv,
  1031. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1032. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1033. }
  1034. EXPORT_SYMBOL(cnss_idle_shutdown);
  1035. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1036. {
  1037. int ret = 0;
  1038. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1039. if (ret < 0) {
  1040. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1041. goto out;
  1042. }
  1043. ret = cnss_get_clk(plat_priv);
  1044. if (ret) {
  1045. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1046. goto put_vreg;
  1047. }
  1048. ret = cnss_get_pinctrl(plat_priv);
  1049. if (ret) {
  1050. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1051. goto put_clk;
  1052. }
  1053. return 0;
  1054. put_clk:
  1055. cnss_put_clk(plat_priv);
  1056. put_vreg:
  1057. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1058. out:
  1059. return ret;
  1060. }
  1061. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1062. {
  1063. cnss_put_clk(plat_priv);
  1064. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1065. }
  1066. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1067. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1068. unsigned long code,
  1069. void *ss_handle)
  1070. {
  1071. struct cnss_plat_data *plat_priv =
  1072. container_of(nb, struct cnss_plat_data, modem_nb);
  1073. struct cnss_esoc_info *esoc_info;
  1074. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1075. if (!plat_priv)
  1076. return NOTIFY_DONE;
  1077. esoc_info = &plat_priv->esoc_info;
  1078. if (code == SUBSYS_AFTER_POWERUP)
  1079. esoc_info->modem_current_status = 1;
  1080. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1081. esoc_info->modem_current_status = 0;
  1082. else
  1083. return NOTIFY_DONE;
  1084. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1085. esoc_info->modem_current_status))
  1086. return NOTIFY_DONE;
  1087. return NOTIFY_OK;
  1088. }
  1089. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1090. {
  1091. int ret = 0;
  1092. struct device *dev;
  1093. struct cnss_esoc_info *esoc_info;
  1094. struct esoc_desc *esoc_desc;
  1095. const char *client_desc;
  1096. dev = &plat_priv->plat_dev->dev;
  1097. esoc_info = &plat_priv->esoc_info;
  1098. esoc_info->notify_modem_status =
  1099. of_property_read_bool(dev->of_node,
  1100. "qcom,notify-modem-status");
  1101. if (!esoc_info->notify_modem_status)
  1102. goto out;
  1103. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1104. &client_desc);
  1105. if (ret) {
  1106. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1107. } else {
  1108. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1109. if (IS_ERR_OR_NULL(esoc_desc)) {
  1110. ret = PTR_RET(esoc_desc);
  1111. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1112. ret);
  1113. goto out;
  1114. }
  1115. esoc_info->esoc_desc = esoc_desc;
  1116. }
  1117. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1118. esoc_info->modem_current_status = 0;
  1119. esoc_info->modem_notify_handler =
  1120. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1121. esoc_info->esoc_desc->name :
  1122. "modem", &plat_priv->modem_nb);
  1123. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1124. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1125. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1126. ret);
  1127. goto unreg_esoc;
  1128. }
  1129. return 0;
  1130. unreg_esoc:
  1131. if (esoc_info->esoc_desc)
  1132. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1133. out:
  1134. return ret;
  1135. }
  1136. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1137. {
  1138. struct device *dev;
  1139. struct cnss_esoc_info *esoc_info;
  1140. dev = &plat_priv->plat_dev->dev;
  1141. esoc_info = &plat_priv->esoc_info;
  1142. if (esoc_info->notify_modem_status)
  1143. subsys_notif_unregister_notifier
  1144. (esoc_info->modem_notify_handler,
  1145. &plat_priv->modem_nb);
  1146. if (esoc_info->esoc_desc)
  1147. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1148. }
  1149. #else
  1150. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1151. {
  1152. return 0;
  1153. }
  1154. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1155. #endif
  1156. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1157. {
  1158. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1159. int ret = 0;
  1160. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1161. return 0;
  1162. enable_irq(sol_gpio->dev_sol_irq);
  1163. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1164. if (ret)
  1165. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1166. ret);
  1167. return ret;
  1168. }
  1169. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1170. {
  1171. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1172. int ret = 0;
  1173. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1174. return 0;
  1175. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1176. if (ret)
  1177. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1178. ret);
  1179. disable_irq(sol_gpio->dev_sol_irq);
  1180. return ret;
  1181. }
  1182. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1183. {
  1184. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1185. if (sol_gpio->dev_sol_gpio < 0)
  1186. return -EINVAL;
  1187. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1188. }
  1189. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1190. {
  1191. struct cnss_plat_data *plat_priv = data;
  1192. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1193. sol_gpio->dev_sol_counter++;
  1194. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1195. irq, sol_gpio->dev_sol_counter);
  1196. /* Make sure abort current suspend */
  1197. cnss_pm_stay_awake(plat_priv);
  1198. cnss_pm_relax(plat_priv);
  1199. pm_system_wakeup();
  1200. cnss_bus_handle_dev_sol_irq(plat_priv);
  1201. return IRQ_HANDLED;
  1202. }
  1203. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1204. {
  1205. struct device *dev = &plat_priv->plat_dev->dev;
  1206. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1207. int ret = 0;
  1208. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1209. "wlan-dev-sol-gpio", 0);
  1210. if (sol_gpio->dev_sol_gpio < 0)
  1211. goto out;
  1212. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1213. sol_gpio->dev_sol_gpio);
  1214. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1215. if (ret) {
  1216. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1217. ret);
  1218. goto out;
  1219. }
  1220. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1221. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1222. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1223. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1224. if (ret) {
  1225. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1226. goto free_gpio;
  1227. }
  1228. return 0;
  1229. free_gpio:
  1230. gpio_free(sol_gpio->dev_sol_gpio);
  1231. out:
  1232. return ret;
  1233. }
  1234. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1235. {
  1236. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1237. if (sol_gpio->dev_sol_gpio < 0)
  1238. return;
  1239. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1240. gpio_free(sol_gpio->dev_sol_gpio);
  1241. }
  1242. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1243. {
  1244. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1245. if (sol_gpio->host_sol_gpio < 0)
  1246. return -EINVAL;
  1247. if (value)
  1248. cnss_pr_dbg("Assert host SOL GPIO\n");
  1249. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1250. return 0;
  1251. }
  1252. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1253. {
  1254. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1255. if (sol_gpio->host_sol_gpio < 0)
  1256. return -EINVAL;
  1257. return gpio_get_value(sol_gpio->host_sol_gpio);
  1258. }
  1259. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1260. {
  1261. struct device *dev = &plat_priv->plat_dev->dev;
  1262. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1263. int ret = 0;
  1264. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1265. "wlan-host-sol-gpio", 0);
  1266. if (sol_gpio->host_sol_gpio < 0)
  1267. goto out;
  1268. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1269. sol_gpio->host_sol_gpio);
  1270. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1271. if (ret) {
  1272. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1273. ret);
  1274. goto out;
  1275. }
  1276. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1277. return 0;
  1278. out:
  1279. return ret;
  1280. }
  1281. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1282. {
  1283. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1284. if (sol_gpio->host_sol_gpio < 0)
  1285. return;
  1286. gpio_free(sol_gpio->host_sol_gpio);
  1287. }
  1288. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1289. {
  1290. int ret;
  1291. ret = cnss_init_dev_sol_gpio(plat_priv);
  1292. if (ret)
  1293. goto out;
  1294. ret = cnss_init_host_sol_gpio(plat_priv);
  1295. if (ret)
  1296. goto deinit_dev_sol;
  1297. return 0;
  1298. deinit_dev_sol:
  1299. cnss_deinit_dev_sol_gpio(plat_priv);
  1300. out:
  1301. return ret;
  1302. }
  1303. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1304. {
  1305. cnss_deinit_host_sol_gpio(plat_priv);
  1306. cnss_deinit_dev_sol_gpio(plat_priv);
  1307. }
  1308. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1309. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1310. {
  1311. struct cnss_plat_data *plat_priv;
  1312. int ret = 0;
  1313. if (!subsys_desc->dev) {
  1314. cnss_pr_err("dev from subsys_desc is NULL\n");
  1315. return -ENODEV;
  1316. }
  1317. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1318. if (!plat_priv) {
  1319. cnss_pr_err("plat_priv is NULL\n");
  1320. return -ENODEV;
  1321. }
  1322. if (!plat_priv->driver_state) {
  1323. cnss_pr_dbg("subsys powerup is ignored\n");
  1324. return 0;
  1325. }
  1326. ret = cnss_bus_dev_powerup(plat_priv);
  1327. if (ret)
  1328. __pm_relax(plat_priv->recovery_ws);
  1329. return ret;
  1330. }
  1331. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1332. bool force_stop)
  1333. {
  1334. struct cnss_plat_data *plat_priv;
  1335. if (!subsys_desc->dev) {
  1336. cnss_pr_err("dev from subsys_desc is NULL\n");
  1337. return -ENODEV;
  1338. }
  1339. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1340. if (!plat_priv) {
  1341. cnss_pr_err("plat_priv is NULL\n");
  1342. return -ENODEV;
  1343. }
  1344. if (!plat_priv->driver_state) {
  1345. cnss_pr_dbg("subsys shutdown is ignored\n");
  1346. return 0;
  1347. }
  1348. return cnss_bus_dev_shutdown(plat_priv);
  1349. }
  1350. void cnss_device_crashed(struct device *dev)
  1351. {
  1352. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1353. struct cnss_subsys_info *subsys_info;
  1354. if (!plat_priv)
  1355. return;
  1356. subsys_info = &plat_priv->subsys_info;
  1357. if (subsys_info->subsys_device) {
  1358. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1359. subsys_set_crash_status(subsys_info->subsys_device, true);
  1360. subsystem_restart_dev(subsys_info->subsys_device);
  1361. }
  1362. }
  1363. EXPORT_SYMBOL(cnss_device_crashed);
  1364. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1365. {
  1366. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1367. if (!plat_priv) {
  1368. cnss_pr_err("plat_priv is NULL\n");
  1369. return;
  1370. }
  1371. cnss_bus_dev_crash_shutdown(plat_priv);
  1372. }
  1373. static int cnss_subsys_ramdump(int enable,
  1374. const struct subsys_desc *subsys_desc)
  1375. {
  1376. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1377. if (!plat_priv) {
  1378. cnss_pr_err("plat_priv is NULL\n");
  1379. return -ENODEV;
  1380. }
  1381. if (!enable)
  1382. return 0;
  1383. return cnss_bus_dev_ramdump(plat_priv);
  1384. }
  1385. static void cnss_recovery_work_handler(struct work_struct *work)
  1386. {
  1387. }
  1388. #else
  1389. static void cnss_recovery_work_handler(struct work_struct *work)
  1390. {
  1391. int ret;
  1392. struct cnss_plat_data *plat_priv =
  1393. container_of(work, struct cnss_plat_data, recovery_work);
  1394. if (!plat_priv->recovery_enabled)
  1395. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1396. cnss_bus_dev_shutdown(plat_priv);
  1397. cnss_bus_dev_ramdump(plat_priv);
  1398. msleep(POWER_RESET_MIN_DELAY_MS);
  1399. ret = cnss_bus_dev_powerup(plat_priv);
  1400. if (ret)
  1401. __pm_relax(plat_priv->recovery_ws);
  1402. return;
  1403. }
  1404. void cnss_device_crashed(struct device *dev)
  1405. {
  1406. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1407. if (!plat_priv)
  1408. return;
  1409. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1410. schedule_work(&plat_priv->recovery_work);
  1411. }
  1412. EXPORT_SYMBOL(cnss_device_crashed);
  1413. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1414. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1415. {
  1416. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1417. struct cnss_ramdump_info *ramdump_info;
  1418. if (!plat_priv)
  1419. return NULL;
  1420. ramdump_info = &plat_priv->ramdump_info;
  1421. *size = ramdump_info->ramdump_size;
  1422. return ramdump_info->ramdump_va;
  1423. }
  1424. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1425. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1426. {
  1427. switch (reason) {
  1428. case CNSS_REASON_DEFAULT:
  1429. return "DEFAULT";
  1430. case CNSS_REASON_LINK_DOWN:
  1431. return "LINK_DOWN";
  1432. case CNSS_REASON_RDDM:
  1433. return "RDDM";
  1434. case CNSS_REASON_TIMEOUT:
  1435. return "TIMEOUT";
  1436. }
  1437. return "UNKNOWN";
  1438. };
  1439. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1440. enum cnss_recovery_reason reason)
  1441. {
  1442. plat_priv->recovery_count++;
  1443. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1444. goto self_recovery;
  1445. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1446. cnss_pr_dbg("Skip device recovery\n");
  1447. return 0;
  1448. }
  1449. /* FW recovery sequence has multiple steps and firmware load requires
  1450. * linux PM in awake state. Thus hold the cnss wake source until
  1451. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1452. * time taken in this process.
  1453. */
  1454. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1455. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1456. true);
  1457. switch (reason) {
  1458. case CNSS_REASON_LINK_DOWN:
  1459. if (!cnss_bus_check_link_status(plat_priv)) {
  1460. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1461. return 0;
  1462. }
  1463. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1464. &plat_priv->ctrl_params.quirks))
  1465. goto self_recovery;
  1466. if (!cnss_bus_recover_link_down(plat_priv)) {
  1467. /* clear recovery bit here to avoid skipping
  1468. * the recovery work for RDDM later
  1469. */
  1470. clear_bit(CNSS_DRIVER_RECOVERY,
  1471. &plat_priv->driver_state);
  1472. return 0;
  1473. }
  1474. break;
  1475. case CNSS_REASON_RDDM:
  1476. cnss_bus_collect_dump_info(plat_priv, false);
  1477. break;
  1478. case CNSS_REASON_DEFAULT:
  1479. case CNSS_REASON_TIMEOUT:
  1480. break;
  1481. default:
  1482. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1483. cnss_recovery_reason_to_str(reason), reason);
  1484. break;
  1485. }
  1486. cnss_bus_device_crashed(plat_priv);
  1487. return 0;
  1488. self_recovery:
  1489. cnss_pr_dbg("Going for self recovery\n");
  1490. cnss_bus_dev_shutdown(plat_priv);
  1491. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1492. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1493. &plat_priv->ctrl_params.quirks);
  1494. cnss_bus_dev_powerup(plat_priv);
  1495. return 0;
  1496. }
  1497. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1498. void *data)
  1499. {
  1500. struct cnss_recovery_data *recovery_data = data;
  1501. int ret = 0;
  1502. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1503. cnss_recovery_reason_to_str(recovery_data->reason),
  1504. recovery_data->reason);
  1505. if (!plat_priv->driver_state) {
  1506. cnss_pr_err("Improper driver state, ignore recovery\n");
  1507. ret = -EINVAL;
  1508. goto out;
  1509. }
  1510. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1511. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1512. ret = -EINVAL;
  1513. goto out;
  1514. }
  1515. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1516. cnss_pr_err("Recovery is already in progress\n");
  1517. CNSS_ASSERT(0);
  1518. ret = -EINVAL;
  1519. goto out;
  1520. }
  1521. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1522. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1523. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1524. ret = -EINVAL;
  1525. goto out;
  1526. }
  1527. switch (plat_priv->device_id) {
  1528. case QCA6174_DEVICE_ID:
  1529. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1530. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1531. &plat_priv->driver_state)) {
  1532. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1533. ret = -EINVAL;
  1534. goto out;
  1535. }
  1536. break;
  1537. default:
  1538. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1539. set_bit(CNSS_FW_BOOT_RECOVERY,
  1540. &plat_priv->driver_state);
  1541. }
  1542. break;
  1543. }
  1544. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1545. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1546. out:
  1547. kfree(data);
  1548. return ret;
  1549. }
  1550. int cnss_self_recovery(struct device *dev,
  1551. enum cnss_recovery_reason reason)
  1552. {
  1553. cnss_schedule_recovery(dev, reason);
  1554. return 0;
  1555. }
  1556. EXPORT_SYMBOL(cnss_self_recovery);
  1557. void cnss_schedule_recovery(struct device *dev,
  1558. enum cnss_recovery_reason reason)
  1559. {
  1560. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1561. struct cnss_recovery_data *data;
  1562. int gfp = GFP_KERNEL;
  1563. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1564. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1565. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1566. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1567. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1568. return;
  1569. }
  1570. if (in_interrupt() || irqs_disabled())
  1571. gfp = GFP_ATOMIC;
  1572. data = kzalloc(sizeof(*data), gfp);
  1573. if (!data)
  1574. return;
  1575. data->reason = reason;
  1576. cnss_driver_event_post(plat_priv,
  1577. CNSS_DRIVER_EVENT_RECOVERY,
  1578. 0, data);
  1579. }
  1580. EXPORT_SYMBOL(cnss_schedule_recovery);
  1581. int cnss_force_fw_assert(struct device *dev)
  1582. {
  1583. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1584. if (!plat_priv) {
  1585. cnss_pr_err("plat_priv is NULL\n");
  1586. return -ENODEV;
  1587. }
  1588. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1589. cnss_pr_info("Forced FW assert is not supported\n");
  1590. return -EOPNOTSUPP;
  1591. }
  1592. if (cnss_bus_is_device_down(plat_priv)) {
  1593. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1594. return 0;
  1595. }
  1596. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1597. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1598. return 0;
  1599. }
  1600. if (in_interrupt() || irqs_disabled())
  1601. cnss_driver_event_post(plat_priv,
  1602. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1603. 0, NULL);
  1604. else
  1605. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1606. return 0;
  1607. }
  1608. EXPORT_SYMBOL(cnss_force_fw_assert);
  1609. int cnss_force_collect_rddm(struct device *dev)
  1610. {
  1611. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1612. unsigned int timeout;
  1613. int ret = 0;
  1614. if (!plat_priv) {
  1615. cnss_pr_err("plat_priv is NULL\n");
  1616. return -ENODEV;
  1617. }
  1618. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1619. cnss_pr_info("Force collect rddm is not supported\n");
  1620. return -EOPNOTSUPP;
  1621. }
  1622. if (cnss_bus_is_device_down(plat_priv)) {
  1623. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1624. goto wait_rddm;
  1625. }
  1626. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1627. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1628. goto wait_rddm;
  1629. }
  1630. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1631. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1632. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1633. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1634. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1635. return 0;
  1636. }
  1637. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1638. if (ret)
  1639. return ret;
  1640. wait_rddm:
  1641. reinit_completion(&plat_priv->rddm_complete);
  1642. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1643. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1644. msecs_to_jiffies(timeout));
  1645. if (!ret) {
  1646. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1647. timeout);
  1648. ret = -ETIMEDOUT;
  1649. } else if (ret > 0) {
  1650. ret = 0;
  1651. }
  1652. return ret;
  1653. }
  1654. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1655. int cnss_qmi_send_get(struct device *dev)
  1656. {
  1657. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1658. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1659. return 0;
  1660. return cnss_bus_qmi_send_get(plat_priv);
  1661. }
  1662. EXPORT_SYMBOL(cnss_qmi_send_get);
  1663. int cnss_qmi_send_put(struct device *dev)
  1664. {
  1665. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1666. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1667. return 0;
  1668. return cnss_bus_qmi_send_put(plat_priv);
  1669. }
  1670. EXPORT_SYMBOL(cnss_qmi_send_put);
  1671. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1672. int cmd_len, void *cb_ctx,
  1673. int (*cb)(void *ctx, void *event, int event_len))
  1674. {
  1675. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1676. int ret;
  1677. if (!plat_priv)
  1678. return -ENODEV;
  1679. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1680. return -EINVAL;
  1681. plat_priv->get_info_cb = cb;
  1682. plat_priv->get_info_cb_ctx = cb_ctx;
  1683. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1684. if (ret) {
  1685. plat_priv->get_info_cb = NULL;
  1686. plat_priv->get_info_cb_ctx = NULL;
  1687. }
  1688. return ret;
  1689. }
  1690. EXPORT_SYMBOL(cnss_qmi_send);
  1691. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1692. {
  1693. int ret = 0;
  1694. u32 retry = 0, timeout;
  1695. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1696. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1697. goto out;
  1698. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1699. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1700. goto out;
  1701. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1702. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1703. goto out;
  1704. }
  1705. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1706. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1707. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1708. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1709. CNSS_ASSERT(0);
  1710. return -EINVAL;
  1711. }
  1712. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1713. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1714. break;
  1715. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1716. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1717. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1718. CNSS_ASSERT(0);
  1719. ret = -EINVAL;
  1720. goto mark_cal_fail;
  1721. }
  1722. }
  1723. switch (plat_priv->device_id) {
  1724. case QCA6290_DEVICE_ID:
  1725. case QCA6390_DEVICE_ID:
  1726. case QCA6490_DEVICE_ID:
  1727. case KIWI_DEVICE_ID:
  1728. case MANGO_DEVICE_ID:
  1729. case PEACH_DEVICE_ID:
  1730. break;
  1731. default:
  1732. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1733. plat_priv->device_id);
  1734. ret = -EINVAL;
  1735. goto mark_cal_fail;
  1736. }
  1737. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1738. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1739. timeout = cnss_get_timeout(plat_priv,
  1740. CNSS_TIMEOUT_CALIBRATION);
  1741. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1742. timeout / 1000);
  1743. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1744. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1745. msecs_to_jiffies(timeout));
  1746. }
  1747. reinit_completion(&plat_priv->cal_complete);
  1748. ret = cnss_bus_dev_powerup(plat_priv);
  1749. mark_cal_fail:
  1750. if (ret) {
  1751. complete(&plat_priv->cal_complete);
  1752. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1753. /* Set CBC done in driver state to mark attempt and note error
  1754. * since calibration cannot be retried at boot.
  1755. */
  1756. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1757. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1758. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1759. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1760. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1761. goto out;
  1762. cnss_pr_info("Schedule WLAN driver load\n");
  1763. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1764. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1765. 0);
  1766. }
  1767. }
  1768. out:
  1769. return ret;
  1770. }
  1771. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1772. void *data)
  1773. {
  1774. struct cnss_cal_info *cal_info = data;
  1775. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1776. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1777. goto out;
  1778. switch (cal_info->cal_status) {
  1779. case CNSS_CAL_DONE:
  1780. cnss_pr_dbg("Calibration completed successfully\n");
  1781. plat_priv->cal_done = true;
  1782. break;
  1783. case CNSS_CAL_TIMEOUT:
  1784. case CNSS_CAL_FAILURE:
  1785. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1786. cal_info->cal_status);
  1787. break;
  1788. default:
  1789. cnss_pr_err("Unknown calibration status: %u\n",
  1790. cal_info->cal_status);
  1791. break;
  1792. }
  1793. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1794. cnss_bus_free_qdss_mem(plat_priv);
  1795. cnss_release_antenna_sharing(plat_priv);
  1796. cnss_bus_dev_shutdown(plat_priv);
  1797. msleep(POWER_RESET_MIN_DELAY_MS);
  1798. complete(&plat_priv->cal_complete);
  1799. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1800. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1801. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1802. cnss_cal_mem_upload_to_file(plat_priv);
  1803. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1804. goto out;
  1805. cnss_pr_dbg("Schedule WLAN driver load\n");
  1806. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1807. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1808. 0);
  1809. }
  1810. out:
  1811. kfree(data);
  1812. return 0;
  1813. }
  1814. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1815. {
  1816. int ret;
  1817. ret = cnss_bus_dev_powerup(plat_priv);
  1818. if (ret)
  1819. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1820. return ret;
  1821. }
  1822. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1823. {
  1824. cnss_bus_dev_shutdown(plat_priv);
  1825. return 0;
  1826. }
  1827. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1828. {
  1829. int ret = 0;
  1830. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1831. if (ret < 0)
  1832. return ret;
  1833. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1834. }
  1835. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1836. u32 mem_seg_len, u64 pa, u32 size)
  1837. {
  1838. int i = 0;
  1839. u64 offset = 0;
  1840. void *va = NULL;
  1841. u64 local_pa;
  1842. u32 local_size;
  1843. for (i = 0; i < mem_seg_len; i++) {
  1844. local_pa = (u64)fw_mem[i].pa;
  1845. local_size = (u32)fw_mem[i].size;
  1846. if (pa == local_pa && size <= local_size) {
  1847. va = fw_mem[i].va;
  1848. break;
  1849. }
  1850. if (pa > local_pa &&
  1851. pa < local_pa + local_size &&
  1852. pa + size <= local_pa + local_size) {
  1853. offset = pa - local_pa;
  1854. va = fw_mem[i].va + offset;
  1855. break;
  1856. }
  1857. }
  1858. return va;
  1859. }
  1860. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1861. void *data)
  1862. {
  1863. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1864. struct cnss_fw_mem *fw_mem_seg;
  1865. int ret = 0L;
  1866. void *va = NULL;
  1867. u32 i, fw_mem_seg_len;
  1868. switch (event_data->mem_type) {
  1869. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1870. if (!plat_priv->fw_mem_seg_len)
  1871. goto invalid_mem_save;
  1872. fw_mem_seg = plat_priv->fw_mem;
  1873. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1874. break;
  1875. case QMI_WLFW_MEM_QDSS_V01:
  1876. if (!plat_priv->qdss_mem_seg_len)
  1877. goto invalid_mem_save;
  1878. fw_mem_seg = plat_priv->qdss_mem;
  1879. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1880. break;
  1881. default:
  1882. goto invalid_mem_save;
  1883. }
  1884. for (i = 0; i < event_data->mem_seg_len; i++) {
  1885. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1886. event_data->mem_seg[i].addr,
  1887. event_data->mem_seg[i].size);
  1888. if (!va) {
  1889. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1890. &event_data->mem_seg[i].addr,
  1891. event_data->mem_type);
  1892. ret = -EINVAL;
  1893. break;
  1894. }
  1895. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1896. event_data->file_name,
  1897. event_data->mem_seg[i].size);
  1898. if (ret < 0) {
  1899. cnss_pr_err("Fail to save fw mem data: %d\n",
  1900. ret);
  1901. break;
  1902. }
  1903. }
  1904. kfree(data);
  1905. return ret;
  1906. invalid_mem_save:
  1907. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1908. event_data->mem_type);
  1909. kfree(data);
  1910. return -EINVAL;
  1911. }
  1912. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1913. {
  1914. cnss_bus_free_qdss_mem(plat_priv);
  1915. return 0;
  1916. }
  1917. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1918. void *data)
  1919. {
  1920. int ret = 0;
  1921. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1922. if (!plat_priv)
  1923. return -ENODEV;
  1924. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1925. event_data->total_size);
  1926. kfree(data);
  1927. return ret;
  1928. }
  1929. static void cnss_driver_event_work(struct work_struct *work)
  1930. {
  1931. struct cnss_plat_data *plat_priv =
  1932. container_of(work, struct cnss_plat_data, event_work);
  1933. struct cnss_driver_event *event;
  1934. unsigned long flags;
  1935. int ret = 0;
  1936. if (!plat_priv) {
  1937. cnss_pr_err("plat_priv is NULL!\n");
  1938. return;
  1939. }
  1940. cnss_pm_stay_awake(plat_priv);
  1941. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1942. while (!list_empty(&plat_priv->event_list)) {
  1943. event = list_first_entry(&plat_priv->event_list,
  1944. struct cnss_driver_event, list);
  1945. list_del(&event->list);
  1946. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1947. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1948. cnss_driver_event_to_str(event->type),
  1949. event->sync ? "-sync" : "", event->type,
  1950. plat_priv->driver_state);
  1951. switch (event->type) {
  1952. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1953. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1954. break;
  1955. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1956. ret = cnss_wlfw_server_exit(plat_priv);
  1957. break;
  1958. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1959. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1960. if (ret)
  1961. break;
  1962. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1963. break;
  1964. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1965. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1966. break;
  1967. case CNSS_DRIVER_EVENT_FW_READY:
  1968. ret = cnss_fw_ready_hdlr(plat_priv);
  1969. break;
  1970. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1971. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1972. break;
  1973. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1974. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1975. event->data);
  1976. break;
  1977. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1978. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1979. event->data);
  1980. break;
  1981. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1982. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1983. break;
  1984. case CNSS_DRIVER_EVENT_RECOVERY:
  1985. ret = cnss_driver_recovery_hdlr(plat_priv,
  1986. event->data);
  1987. break;
  1988. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1989. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1990. break;
  1991. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1992. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1993. &plat_priv->driver_state);
  1994. fallthrough;
  1995. case CNSS_DRIVER_EVENT_POWER_UP:
  1996. ret = cnss_power_up_hdlr(plat_priv);
  1997. break;
  1998. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1999. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2000. &plat_priv->driver_state);
  2001. fallthrough;
  2002. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2003. ret = cnss_power_down_hdlr(plat_priv);
  2004. break;
  2005. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2006. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2007. event->data);
  2008. break;
  2009. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2010. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2011. event->data);
  2012. break;
  2013. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2014. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2015. break;
  2016. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2017. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2018. event->data);
  2019. break;
  2020. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2021. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2022. break;
  2023. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2024. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2025. event->data);
  2026. break;
  2027. default:
  2028. cnss_pr_err("Invalid driver event type: %d",
  2029. event->type);
  2030. kfree(event);
  2031. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2032. continue;
  2033. }
  2034. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2035. if (event->sync) {
  2036. event->ret = ret;
  2037. complete(&event->complete);
  2038. continue;
  2039. }
  2040. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2041. kfree(event);
  2042. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2043. }
  2044. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2045. cnss_pm_relax(plat_priv);
  2046. }
  2047. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2048. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2049. {
  2050. int ret = 0;
  2051. struct cnss_subsys_info *subsys_info;
  2052. subsys_info = &plat_priv->subsys_info;
  2053. subsys_info->subsys_desc.name = "wlan";
  2054. subsys_info->subsys_desc.owner = THIS_MODULE;
  2055. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2056. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2057. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2058. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2059. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2060. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2061. if (IS_ERR(subsys_info->subsys_device)) {
  2062. ret = PTR_ERR(subsys_info->subsys_device);
  2063. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2064. goto out;
  2065. }
  2066. subsys_info->subsys_handle =
  2067. subsystem_get(subsys_info->subsys_desc.name);
  2068. if (!subsys_info->subsys_handle) {
  2069. cnss_pr_err("Failed to get subsys_handle!\n");
  2070. ret = -EINVAL;
  2071. goto unregister_subsys;
  2072. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2073. ret = PTR_ERR(subsys_info->subsys_handle);
  2074. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2075. goto unregister_subsys;
  2076. }
  2077. return 0;
  2078. unregister_subsys:
  2079. subsys_unregister(subsys_info->subsys_device);
  2080. out:
  2081. return ret;
  2082. }
  2083. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2084. {
  2085. struct cnss_subsys_info *subsys_info;
  2086. subsys_info = &plat_priv->subsys_info;
  2087. subsystem_put(subsys_info->subsys_handle);
  2088. subsys_unregister(subsys_info->subsys_device);
  2089. }
  2090. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2091. {
  2092. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2093. return create_ramdump_device(subsys_info->subsys_desc.name,
  2094. subsys_info->subsys_desc.dev);
  2095. }
  2096. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2097. void *ramdump_dev)
  2098. {
  2099. destroy_ramdump_device(ramdump_dev);
  2100. }
  2101. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2102. {
  2103. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2104. struct ramdump_segment segment;
  2105. memset(&segment, 0, sizeof(segment));
  2106. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2107. segment.size = ramdump_info->ramdump_size;
  2108. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2109. }
  2110. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2111. {
  2112. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2113. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2114. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2115. struct ramdump_segment *ramdump_segs, *s;
  2116. struct cnss_dump_meta_info meta_info = {0};
  2117. int i, ret = 0;
  2118. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2119. sizeof(*ramdump_segs),
  2120. GFP_KERNEL);
  2121. if (!ramdump_segs)
  2122. return -ENOMEM;
  2123. s = ramdump_segs + 1;
  2124. for (i = 0; i < dump_data->nentries; i++) {
  2125. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2126. cnss_pr_err("Unsupported dump type: %d",
  2127. dump_seg->type);
  2128. continue;
  2129. }
  2130. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2131. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2132. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2133. }
  2134. meta_info.entry[dump_seg->type].entry_num++;
  2135. s->address = dump_seg->address;
  2136. s->v_address = (void __iomem *)dump_seg->v_address;
  2137. s->size = dump_seg->size;
  2138. s++;
  2139. dump_seg++;
  2140. }
  2141. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2142. meta_info.version = CNSS_RAMDUMP_VERSION;
  2143. meta_info.chipset = plat_priv->device_id;
  2144. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2145. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2146. ramdump_segs->size = sizeof(meta_info);
  2147. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2148. dump_data->nentries + 1);
  2149. kfree(ramdump_segs);
  2150. return ret;
  2151. }
  2152. #else
  2153. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2154. void *data)
  2155. {
  2156. struct cnss_plat_data *plat_priv =
  2157. container_of(nb, struct cnss_plat_data, panic_nb);
  2158. cnss_bus_dev_crash_shutdown(plat_priv);
  2159. return NOTIFY_DONE;
  2160. }
  2161. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2162. {
  2163. int ret;
  2164. if (!plat_priv)
  2165. return -ENODEV;
  2166. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2167. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2168. &plat_priv->panic_nb);
  2169. if (ret) {
  2170. cnss_pr_err("Failed to register panic handler\n");
  2171. return -EINVAL;
  2172. }
  2173. return 0;
  2174. }
  2175. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2176. {
  2177. int ret;
  2178. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2179. &plat_priv->panic_nb);
  2180. if (ret)
  2181. cnss_pr_err("Failed to unregister panic handler\n");
  2182. }
  2183. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2184. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2185. {
  2186. return &plat_priv->plat_dev->dev;
  2187. }
  2188. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2189. void *ramdump_dev)
  2190. {
  2191. }
  2192. #endif
  2193. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2194. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2195. {
  2196. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2197. struct qcom_dump_segment segment;
  2198. struct list_head head;
  2199. INIT_LIST_HEAD(&head);
  2200. memset(&segment, 0, sizeof(segment));
  2201. segment.va = ramdump_info->ramdump_va;
  2202. segment.size = ramdump_info->ramdump_size;
  2203. list_add(&segment.node, &head);
  2204. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2205. }
  2206. #else
  2207. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2208. {
  2209. return 0;
  2210. }
  2211. /* Using completion event inside dynamically allocated ramdump_desc
  2212. * may result a race between freeing the event after setting it to
  2213. * complete inside dev coredump free callback and the thread that is
  2214. * waiting for completion.
  2215. */
  2216. DECLARE_COMPLETION(dump_done);
  2217. #define TIMEOUT_SAVE_DUMP_MS 30000
  2218. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2219. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2220. { \
  2221. if (class == ELFCLASS32) \
  2222. return sizeof(struct elf32_##__xhdr); \
  2223. else \
  2224. return sizeof(struct elf64_##__xhdr); \
  2225. }
  2226. SIZEOF_ELF_STRUCT(phdr)
  2227. SIZEOF_ELF_STRUCT(hdr)
  2228. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2229. do { \
  2230. if (class == ELFCLASS32) \
  2231. ((struct elf32_##__xhdr *)arg)->member = value; \
  2232. else \
  2233. ((struct elf64_##__xhdr *)arg)->member = value; \
  2234. } while (0)
  2235. #define set_ehdr_property(arg, class, member, value) \
  2236. set_xhdr_property(hdr, arg, class, member, value)
  2237. #define set_phdr_property(arg, class, member, value) \
  2238. set_xhdr_property(phdr, arg, class, member, value)
  2239. /* These replace qcom_ramdump driver APIs called from common API
  2240. * cnss_do_elf_dump() by the ones defined here.
  2241. */
  2242. #define qcom_dump_segment cnss_qcom_dump_segment
  2243. #define qcom_elf_dump cnss_qcom_elf_dump
  2244. #define dump_enabled cnss_dump_enabled
  2245. struct cnss_qcom_dump_segment {
  2246. struct list_head node;
  2247. dma_addr_t da;
  2248. void *va;
  2249. size_t size;
  2250. };
  2251. struct cnss_qcom_ramdump_desc {
  2252. void *data;
  2253. struct completion dump_done;
  2254. };
  2255. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2256. void *data, size_t datalen)
  2257. {
  2258. struct cnss_qcom_ramdump_desc *desc = data;
  2259. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2260. datalen);
  2261. }
  2262. static void cnss_qcom_devcd_freev(void *data)
  2263. {
  2264. struct cnss_qcom_ramdump_desc *desc = data;
  2265. cnss_pr_dbg("Free dump data for dev coredump\n");
  2266. complete(&dump_done);
  2267. vfree(desc->data);
  2268. kfree(desc);
  2269. }
  2270. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2271. gfp_t gfp)
  2272. {
  2273. struct cnss_qcom_ramdump_desc *desc;
  2274. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2275. int ret;
  2276. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2277. if (!desc)
  2278. return -ENOMEM;
  2279. desc->data = data;
  2280. reinit_completion(&dump_done);
  2281. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2282. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2283. ret = wait_for_completion_timeout(&dump_done,
  2284. msecs_to_jiffies(timeout));
  2285. if (!ret)
  2286. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2287. timeout);
  2288. return ret ? 0 : -ETIMEDOUT;
  2289. }
  2290. /* Since the elf32 and elf64 identification is identical apart from
  2291. * the class, use elf32 by default.
  2292. */
  2293. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2294. {
  2295. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2296. ehdr->e_ident[EI_CLASS] = class;
  2297. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2298. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2299. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2300. }
  2301. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2302. unsigned char class)
  2303. {
  2304. struct cnss_qcom_dump_segment *segment;
  2305. void *phdr, *ehdr;
  2306. size_t data_size, offset;
  2307. int phnum = 0;
  2308. void *data;
  2309. void __iomem *ptr;
  2310. if (!segs || list_empty(segs))
  2311. return -EINVAL;
  2312. data_size = sizeof_elf_hdr(class);
  2313. list_for_each_entry(segment, segs, node) {
  2314. data_size += sizeof_elf_phdr(class) + segment->size;
  2315. phnum++;
  2316. }
  2317. data = vmalloc(data_size);
  2318. if (!data)
  2319. return -ENOMEM;
  2320. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2321. ehdr = data;
  2322. memset(ehdr, 0, sizeof_elf_hdr(class));
  2323. init_elf_identification(ehdr, class);
  2324. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2325. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2326. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2327. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2328. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2329. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2330. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2331. phdr = data + sizeof_elf_hdr(class);
  2332. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2333. list_for_each_entry(segment, segs, node) {
  2334. memset(phdr, 0, sizeof_elf_phdr(class));
  2335. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2336. set_phdr_property(phdr, class, p_offset, offset);
  2337. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2338. set_phdr_property(phdr, class, p_paddr, segment->da);
  2339. set_phdr_property(phdr, class, p_filesz, segment->size);
  2340. set_phdr_property(phdr, class, p_memsz, segment->size);
  2341. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2342. set_phdr_property(phdr, class, p_align, 0);
  2343. if (segment->va) {
  2344. memcpy(data + offset, segment->va, segment->size);
  2345. } else {
  2346. ptr = devm_ioremap(dev, segment->da, segment->size);
  2347. if (!ptr) {
  2348. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2349. &segment->da, segment->size);
  2350. memset(data + offset, 0xff, segment->size);
  2351. } else {
  2352. memcpy_fromio(data + offset, ptr,
  2353. segment->size);
  2354. }
  2355. }
  2356. offset += segment->size;
  2357. phdr += sizeof_elf_phdr(class);
  2358. }
  2359. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2360. }
  2361. /* Saving dump to file system is always needed in this case. */
  2362. static bool cnss_dump_enabled(void)
  2363. {
  2364. return true;
  2365. }
  2366. #endif /* CONFIG_QCOM_RAMDUMP */
  2367. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2368. {
  2369. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2370. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2371. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2372. struct qcom_dump_segment *seg;
  2373. struct cnss_dump_meta_info meta_info = {0};
  2374. struct list_head head;
  2375. int i, ret = 0;
  2376. if (!dump_enabled()) {
  2377. cnss_pr_info("Dump collection is not enabled\n");
  2378. return ret;
  2379. }
  2380. INIT_LIST_HEAD(&head);
  2381. for (i = 0; i < dump_data->nentries; i++) {
  2382. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2383. cnss_pr_err("Unsupported dump type: %d",
  2384. dump_seg->type);
  2385. continue;
  2386. }
  2387. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2388. if (!seg)
  2389. continue;
  2390. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2391. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2392. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2393. }
  2394. meta_info.entry[dump_seg->type].entry_num++;
  2395. seg->da = dump_seg->address;
  2396. seg->va = dump_seg->v_address;
  2397. seg->size = dump_seg->size;
  2398. list_add_tail(&seg->node, &head);
  2399. dump_seg++;
  2400. }
  2401. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2402. if (!seg)
  2403. goto do_elf_dump;
  2404. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2405. meta_info.version = CNSS_RAMDUMP_VERSION;
  2406. meta_info.chipset = plat_priv->device_id;
  2407. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2408. seg->va = &meta_info;
  2409. seg->size = sizeof(meta_info);
  2410. list_add(&seg->node, &head);
  2411. do_elf_dump:
  2412. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2413. while (!list_empty(&head)) {
  2414. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2415. list_del(&seg->node);
  2416. kfree(seg);
  2417. }
  2418. return ret;
  2419. }
  2420. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2421. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2422. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2423. size_t num_entries_loaded)
  2424. {
  2425. struct qcom_dump_segment *seg;
  2426. struct cnss_host_dump_meta_info meta_info = {0};
  2427. struct list_head head;
  2428. int dev_ret = 0;
  2429. struct device *new_device;
  2430. static const char * const wlan_str[] = {
  2431. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2432. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2433. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2434. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2435. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2436. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2437. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2438. [CNSS_HOST_WMI_HANG_DATA] = "wmi_hang_data",
  2439. [CNSS_HOST_CE_HANG_EVT] = "ce_hang_evt",
  2440. [CNSS_HOST_PEER_MAC_ADDR_HANG_DATA] = "peer_mac_addr_hang_data",
  2441. [CNSS_HOST_CP_VDEV_INFO] = "cp_vdev_info",
  2442. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2443. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2444. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2445. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2446. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2447. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2448. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2449. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx"
  2450. };
  2451. int i, j;
  2452. int ret = 0;
  2453. if (!dump_enabled()) {
  2454. cnss_pr_info("Dump collection is not enabled\n");
  2455. return ret;
  2456. }
  2457. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2458. if (!new_device) {
  2459. cnss_pr_err("Failed to alloc device mem\n");
  2460. return -ENOMEM;
  2461. }
  2462. device_initialize(new_device);
  2463. dev_set_name(new_device, "wlan_driver");
  2464. dev_ret = device_add(new_device);
  2465. if (dev_ret) {
  2466. cnss_pr_err("Failed to add new device\n");
  2467. goto put_device;
  2468. }
  2469. INIT_LIST_HEAD(&head);
  2470. for (i = 0; i < num_entries_loaded; i++) {
  2471. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2472. if (!seg) {
  2473. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2474. continue;
  2475. }
  2476. seg->va = ssr_entry[i].buffer_pointer;
  2477. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2478. seg->size = ssr_entry[i].buffer_size;
  2479. for (j = 0; j < ARRAY_SIZE(wlan_str); j++) {
  2480. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2481. strlen(wlan_str[j])) == 0) {
  2482. meta_info.entry[i].type = j;
  2483. }
  2484. }
  2485. meta_info.entry[i].entry_start = i + 1;
  2486. meta_info.entry[i].entry_num++;
  2487. list_add_tail(&seg->node, &head);
  2488. }
  2489. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2490. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2491. meta_info.version = CNSS_RAMDUMP_VERSION;
  2492. meta_info.chipset = plat_priv->device_id;
  2493. meta_info.total_entries = num_entries_loaded;
  2494. seg->va = &meta_info;
  2495. seg->da = (dma_addr_t)&meta_info;
  2496. seg->size = sizeof(meta_info);
  2497. list_add(&seg->node, &head);
  2498. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2499. while (!list_empty(&head)) {
  2500. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2501. list_del(&seg->node);
  2502. kfree(seg);
  2503. }
  2504. device_del(new_device);
  2505. put_device:
  2506. put_device(new_device);
  2507. kfree(new_device);
  2508. return ret;
  2509. }
  2510. #endif
  2511. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2512. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2513. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2514. {
  2515. struct cnss_ramdump_info *ramdump_info;
  2516. struct msm_dump_entry dump_entry;
  2517. ramdump_info = &plat_priv->ramdump_info;
  2518. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2519. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2520. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2521. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2522. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2523. sizeof(ramdump_info->dump_data.name));
  2524. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2525. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2526. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2527. &dump_entry);
  2528. }
  2529. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2530. {
  2531. int ret = 0;
  2532. struct device *dev;
  2533. struct cnss_ramdump_info *ramdump_info;
  2534. u32 ramdump_size = 0;
  2535. dev = &plat_priv->plat_dev->dev;
  2536. ramdump_info = &plat_priv->ramdump_info;
  2537. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2538. /* dt type: legacy or converged */
  2539. ret = of_property_read_u32(dev->of_node,
  2540. "qcom,wlan-ramdump-dynamic",
  2541. &ramdump_size);
  2542. } else {
  2543. ret = of_property_read_u32(plat_priv->dev_node,
  2544. "qcom,wlan-ramdump-dynamic",
  2545. &ramdump_size);
  2546. }
  2547. if (ret == 0) {
  2548. ramdump_info->ramdump_va =
  2549. dma_alloc_coherent(dev, ramdump_size,
  2550. &ramdump_info->ramdump_pa,
  2551. GFP_KERNEL);
  2552. if (ramdump_info->ramdump_va)
  2553. ramdump_info->ramdump_size = ramdump_size;
  2554. }
  2555. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2556. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2557. if (ramdump_info->ramdump_size == 0) {
  2558. cnss_pr_info("Ramdump will not be collected");
  2559. goto out;
  2560. }
  2561. ret = cnss_init_dump_entry(plat_priv);
  2562. if (ret) {
  2563. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2564. goto free_ramdump;
  2565. }
  2566. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2567. if (!ramdump_info->ramdump_dev) {
  2568. cnss_pr_err("Failed to create ramdump device!");
  2569. ret = -ENOMEM;
  2570. goto free_ramdump;
  2571. }
  2572. return 0;
  2573. free_ramdump:
  2574. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2575. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2576. out:
  2577. return ret;
  2578. }
  2579. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2580. {
  2581. struct device *dev;
  2582. struct cnss_ramdump_info *ramdump_info;
  2583. dev = &plat_priv->plat_dev->dev;
  2584. ramdump_info = &plat_priv->ramdump_info;
  2585. if (ramdump_info->ramdump_dev)
  2586. cnss_destroy_ramdump_device(plat_priv,
  2587. ramdump_info->ramdump_dev);
  2588. if (ramdump_info->ramdump_va)
  2589. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2590. ramdump_info->ramdump_va,
  2591. ramdump_info->ramdump_pa);
  2592. }
  2593. /**
  2594. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2595. * @ret: Error returned by msm_dump_data_register_nominidump
  2596. *
  2597. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2598. * ignore failure.
  2599. *
  2600. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2601. */
  2602. static int cnss_ignore_dump_data_reg_fail(int ret)
  2603. {
  2604. return ret;
  2605. }
  2606. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2607. {
  2608. int ret = 0;
  2609. struct cnss_ramdump_info_v2 *info_v2;
  2610. struct cnss_dump_data *dump_data;
  2611. struct msm_dump_entry dump_entry;
  2612. struct device *dev = &plat_priv->plat_dev->dev;
  2613. u32 ramdump_size = 0;
  2614. info_v2 = &plat_priv->ramdump_info_v2;
  2615. dump_data = &info_v2->dump_data;
  2616. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2617. /* dt type: legacy or converged */
  2618. ret = of_property_read_u32(dev->of_node,
  2619. "qcom,wlan-ramdump-dynamic",
  2620. &ramdump_size);
  2621. } else {
  2622. ret = of_property_read_u32(plat_priv->dev_node,
  2623. "qcom,wlan-ramdump-dynamic",
  2624. &ramdump_size);
  2625. }
  2626. if (ret == 0)
  2627. info_v2->ramdump_size = ramdump_size;
  2628. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2629. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2630. if (!info_v2->dump_data_vaddr)
  2631. return -ENOMEM;
  2632. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2633. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2634. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2635. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2636. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2637. sizeof(dump_data->name));
  2638. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2639. dump_entry.addr = virt_to_phys(dump_data);
  2640. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2641. &dump_entry);
  2642. if (ret) {
  2643. ret = cnss_ignore_dump_data_reg_fail(ret);
  2644. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2645. ret ? "Error" : "Ignoring", ret);
  2646. goto free_ramdump;
  2647. }
  2648. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2649. if (!info_v2->ramdump_dev) {
  2650. cnss_pr_err("Failed to create ramdump device!\n");
  2651. ret = -ENOMEM;
  2652. goto free_ramdump;
  2653. }
  2654. return 0;
  2655. free_ramdump:
  2656. kfree(info_v2->dump_data_vaddr);
  2657. info_v2->dump_data_vaddr = NULL;
  2658. return ret;
  2659. }
  2660. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2661. {
  2662. struct cnss_ramdump_info_v2 *info_v2;
  2663. info_v2 = &plat_priv->ramdump_info_v2;
  2664. if (info_v2->ramdump_dev)
  2665. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2666. kfree(info_v2->dump_data_vaddr);
  2667. info_v2->dump_data_vaddr = NULL;
  2668. info_v2->dump_data_valid = false;
  2669. }
  2670. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2671. {
  2672. int ret = 0;
  2673. switch (plat_priv->device_id) {
  2674. case QCA6174_DEVICE_ID:
  2675. ret = cnss_register_ramdump_v1(plat_priv);
  2676. break;
  2677. case QCA6290_DEVICE_ID:
  2678. case QCA6390_DEVICE_ID:
  2679. case QCA6490_DEVICE_ID:
  2680. case KIWI_DEVICE_ID:
  2681. case MANGO_DEVICE_ID:
  2682. case PEACH_DEVICE_ID:
  2683. ret = cnss_register_ramdump_v2(plat_priv);
  2684. break;
  2685. default:
  2686. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2687. ret = -ENODEV;
  2688. break;
  2689. }
  2690. return ret;
  2691. }
  2692. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2693. {
  2694. switch (plat_priv->device_id) {
  2695. case QCA6174_DEVICE_ID:
  2696. cnss_unregister_ramdump_v1(plat_priv);
  2697. break;
  2698. case QCA6290_DEVICE_ID:
  2699. case QCA6390_DEVICE_ID:
  2700. case QCA6490_DEVICE_ID:
  2701. case KIWI_DEVICE_ID:
  2702. case MANGO_DEVICE_ID:
  2703. case PEACH_DEVICE_ID:
  2704. cnss_unregister_ramdump_v2(plat_priv);
  2705. break;
  2706. default:
  2707. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2708. break;
  2709. }
  2710. }
  2711. #else
  2712. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2713. {
  2714. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2715. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2716. struct device *dev = &plat_priv->plat_dev->dev;
  2717. u32 ramdump_size = 0;
  2718. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2719. &ramdump_size) == 0)
  2720. info_v2->ramdump_size = ramdump_size;
  2721. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2722. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2723. if (!info_v2->dump_data_vaddr)
  2724. return -ENOMEM;
  2725. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2726. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2727. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2728. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2729. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2730. sizeof(dump_data->name));
  2731. info_v2->ramdump_dev = dev;
  2732. return 0;
  2733. }
  2734. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2735. {
  2736. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2737. info_v2->ramdump_dev = NULL;
  2738. kfree(info_v2->dump_data_vaddr);
  2739. info_v2->dump_data_vaddr = NULL;
  2740. info_v2->dump_data_valid = false;
  2741. }
  2742. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2743. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2744. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2745. phys_addr_t *pa, unsigned long attrs)
  2746. {
  2747. struct sg_table sgt;
  2748. int ret;
  2749. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2750. if (ret) {
  2751. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2752. va, &dma, size, attrs);
  2753. return -EINVAL;
  2754. }
  2755. *pa = page_to_phys(sg_page(sgt.sgl));
  2756. sg_free_table(&sgt);
  2757. return 0;
  2758. }
  2759. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2760. enum cnss_fw_dump_type type, int seg_no,
  2761. void *va, phys_addr_t pa, size_t size)
  2762. {
  2763. struct md_region md_entry;
  2764. int ret;
  2765. switch (type) {
  2766. case CNSS_FW_IMAGE:
  2767. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2768. seg_no);
  2769. break;
  2770. case CNSS_FW_RDDM:
  2771. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2772. seg_no);
  2773. break;
  2774. case CNSS_FW_REMOTE_HEAP:
  2775. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2776. seg_no);
  2777. break;
  2778. default:
  2779. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2780. return -EINVAL;
  2781. }
  2782. md_entry.phys_addr = pa;
  2783. md_entry.virt_addr = (uintptr_t)va;
  2784. md_entry.size = size;
  2785. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2786. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2787. md_entry.name, va, &pa, size);
  2788. ret = msm_minidump_add_region(&md_entry);
  2789. if (ret < 0)
  2790. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2791. return ret;
  2792. }
  2793. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2794. enum cnss_fw_dump_type type, int seg_no,
  2795. void *va, phys_addr_t pa, size_t size)
  2796. {
  2797. struct md_region md_entry;
  2798. int ret;
  2799. switch (type) {
  2800. case CNSS_FW_IMAGE:
  2801. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2802. seg_no);
  2803. break;
  2804. case CNSS_FW_RDDM:
  2805. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2806. seg_no);
  2807. break;
  2808. case CNSS_FW_REMOTE_HEAP:
  2809. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2810. seg_no);
  2811. break;
  2812. default:
  2813. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2814. return -EINVAL;
  2815. }
  2816. md_entry.phys_addr = pa;
  2817. md_entry.virt_addr = (uintptr_t)va;
  2818. md_entry.size = size;
  2819. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2820. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2821. md_entry.name, va, &pa, size);
  2822. ret = msm_minidump_remove_region(&md_entry);
  2823. if (ret)
  2824. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2825. ret);
  2826. return ret;
  2827. }
  2828. #else
  2829. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2830. phys_addr_t *pa, unsigned long attrs)
  2831. {
  2832. return 0;
  2833. }
  2834. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2835. enum cnss_fw_dump_type type, int seg_no,
  2836. void *va, phys_addr_t pa, size_t size)
  2837. {
  2838. return 0;
  2839. }
  2840. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2841. enum cnss_fw_dump_type type, int seg_no,
  2842. void *va, phys_addr_t pa, size_t size)
  2843. {
  2844. return 0;
  2845. }
  2846. #endif /* CONFIG_QCOM_MINIDUMP */
  2847. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2848. const struct firmware **fw_entry,
  2849. const char *filename)
  2850. {
  2851. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2852. return request_firmware_direct(fw_entry, filename,
  2853. &plat_priv->plat_dev->dev);
  2854. else
  2855. return firmware_request_nowarn(fw_entry, filename,
  2856. &plat_priv->plat_dev->dev);
  2857. }
  2858. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2859. /**
  2860. * cnss_register_bus_scale() - Setup interconnect voting data
  2861. * @plat_priv: Platform data structure
  2862. *
  2863. * For different interconnect path configured in device tree setup voting data
  2864. * for list of bandwidth requirements.
  2865. *
  2866. * Result: 0 for success. -EINVAL if not configured
  2867. */
  2868. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2869. {
  2870. int ret = -EINVAL;
  2871. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2872. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2873. struct device *dev = &plat_priv->plat_dev->dev;
  2874. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2875. ret = of_property_read_u32(dev->of_node,
  2876. "qcom,icc-path-count",
  2877. &plat_priv->icc.path_count);
  2878. if (ret) {
  2879. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2880. return 0;
  2881. }
  2882. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2883. "qcom,bus-bw-cfg-count",
  2884. &plat_priv->icc.bus_bw_cfg_count);
  2885. if (ret) {
  2886. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2887. goto cleanup;
  2888. }
  2889. cfg_arr_size = plat_priv->icc.path_count *
  2890. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2891. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2892. if (!cfg_arr) {
  2893. cnss_pr_err("Failed to alloc cfg table mem\n");
  2894. ret = -ENOMEM;
  2895. goto cleanup;
  2896. }
  2897. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2898. "qcom,bus-bw-cfg", cfg_arr,
  2899. cfg_arr_size);
  2900. if (ret) {
  2901. cnss_pr_err("Invalid Bus BW Config Table\n");
  2902. goto cleanup;
  2903. }
  2904. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2905. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2906. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2907. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2908. GFP_KERNEL);
  2909. if (!bus_bw_info) {
  2910. ret = -ENOMEM;
  2911. goto out;
  2912. }
  2913. ret = of_property_read_string_index(dev->of_node,
  2914. "interconnect-names", idx,
  2915. &bus_bw_info->icc_name);
  2916. if (ret)
  2917. goto out;
  2918. bus_bw_info->icc_path =
  2919. of_icc_get(&plat_priv->plat_dev->dev,
  2920. bus_bw_info->icc_name);
  2921. if (IS_ERR(bus_bw_info->icc_path)) {
  2922. ret = PTR_ERR(bus_bw_info->icc_path);
  2923. if (ret != -EPROBE_DEFER) {
  2924. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2925. bus_bw_info->icc_name, ret);
  2926. goto out;
  2927. }
  2928. }
  2929. bus_bw_info->cfg_table =
  2930. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2931. sizeof(*bus_bw_info->cfg_table),
  2932. GFP_KERNEL);
  2933. if (!bus_bw_info->cfg_table) {
  2934. ret = -ENOMEM;
  2935. goto out;
  2936. }
  2937. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2938. bus_bw_info->icc_name);
  2939. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2940. CNSS_ICC_VOTE_MAX);
  2941. i < plat_priv->icc.bus_bw_cfg_count;
  2942. i++, j += 2) {
  2943. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2944. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2945. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2946. i, bus_bw_info->cfg_table[i].avg_bw,
  2947. bus_bw_info->cfg_table[i].peak_bw);
  2948. }
  2949. list_add_tail(&bus_bw_info->list,
  2950. &plat_priv->icc.list_head);
  2951. }
  2952. kfree(cfg_arr);
  2953. return 0;
  2954. out:
  2955. list_for_each_entry_safe(bus_bw_info, tmp,
  2956. &plat_priv->icc.list_head, list) {
  2957. list_del(&bus_bw_info->list);
  2958. }
  2959. cleanup:
  2960. kfree(cfg_arr);
  2961. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2962. return ret;
  2963. }
  2964. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2965. {
  2966. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2967. list_for_each_entry_safe(bus_bw_info, tmp,
  2968. &plat_priv->icc.list_head, list) {
  2969. list_del(&bus_bw_info->list);
  2970. if (bus_bw_info->icc_path)
  2971. icc_put(bus_bw_info->icc_path);
  2972. }
  2973. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2974. }
  2975. #else
  2976. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2977. {
  2978. return 0;
  2979. }
  2980. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2981. #endif /* CONFIG_INTERCONNECT */
  2982. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2983. {
  2984. struct cnss_plat_data *plat_priv = cb_ctx;
  2985. if (!plat_priv) {
  2986. cnss_pr_err("%s: Invalid context\n", __func__);
  2987. return;
  2988. }
  2989. if (status) {
  2990. cnss_pr_info("CNSS Daemon connected\n");
  2991. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2992. complete(&plat_priv->daemon_connected);
  2993. } else {
  2994. cnss_pr_info("CNSS Daemon disconnected\n");
  2995. reinit_completion(&plat_priv->daemon_connected);
  2996. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2997. }
  2998. }
  2999. static ssize_t enable_hds_store(struct device *dev,
  3000. struct device_attribute *attr,
  3001. const char *buf, size_t count)
  3002. {
  3003. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3004. unsigned int enable_hds = 0;
  3005. if (!plat_priv)
  3006. return -ENODEV;
  3007. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3008. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3009. return -EINVAL;
  3010. }
  3011. if (enable_hds)
  3012. plat_priv->hds_enabled = true;
  3013. else
  3014. plat_priv->hds_enabled = false;
  3015. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3016. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3017. return count;
  3018. }
  3019. static ssize_t recovery_show(struct device *dev,
  3020. struct device_attribute *attr,
  3021. char *buf)
  3022. {
  3023. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3024. u32 buf_size = PAGE_SIZE;
  3025. u32 curr_len = 0;
  3026. u32 buf_written = 0;
  3027. if (!plat_priv)
  3028. return -ENODEV;
  3029. buf_written = scnprintf(buf, buf_size,
  3030. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3031. "BIT0 -- wlan fw recovery\n"
  3032. "BIT1 -- wlan pcss recovery\n"
  3033. "---------------------------------\n");
  3034. curr_len += buf_written;
  3035. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3036. "WLAN recovery %s[%d]\n",
  3037. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3038. plat_priv->recovery_enabled);
  3039. curr_len += buf_written;
  3040. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3041. "WLAN PCSS recovery %s[%d]\n",
  3042. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3043. plat_priv->recovery_pcss_enabled);
  3044. curr_len += buf_written;
  3045. /*
  3046. * Now size of curr_len is not over page size for sure,
  3047. * later if new item or none-fixed size item added, need
  3048. * add check to make sure curr_len is not over page size.
  3049. */
  3050. return curr_len;
  3051. }
  3052. static ssize_t time_sync_period_show(struct device *dev,
  3053. struct device_attribute *attr,
  3054. char *buf)
  3055. {
  3056. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3057. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3058. plat_priv->ctrl_params.time_sync_period);
  3059. }
  3060. static ssize_t time_sync_period_store(struct device *dev,
  3061. struct device_attribute *attr,
  3062. const char *buf, size_t count)
  3063. {
  3064. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3065. unsigned int time_sync_period = 0;
  3066. if (!plat_priv)
  3067. return -ENODEV;
  3068. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3069. cnss_pr_err("Invalid time sync sysfs command\n");
  3070. return -EINVAL;
  3071. }
  3072. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  3073. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3074. return count;
  3075. }
  3076. static ssize_t recovery_store(struct device *dev,
  3077. struct device_attribute *attr,
  3078. const char *buf, size_t count)
  3079. {
  3080. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3081. unsigned int recovery = 0;
  3082. if (!plat_priv)
  3083. return -ENODEV;
  3084. if (sscanf(buf, "%du", &recovery) != 1) {
  3085. cnss_pr_err("Invalid recovery sysfs command\n");
  3086. return -EINVAL;
  3087. }
  3088. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3089. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3090. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3091. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3092. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3093. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3094. cnss_send_subsys_restart_level_msg(plat_priv);
  3095. return count;
  3096. }
  3097. static ssize_t shutdown_store(struct device *dev,
  3098. struct device_attribute *attr,
  3099. const char *buf, size_t count)
  3100. {
  3101. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3102. if (plat_priv) {
  3103. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3104. del_timer(&plat_priv->fw_boot_timer);
  3105. complete_all(&plat_priv->power_up_complete);
  3106. complete_all(&plat_priv->cal_complete);
  3107. }
  3108. cnss_pr_dbg("Received shutdown notification\n");
  3109. return count;
  3110. }
  3111. static ssize_t fs_ready_store(struct device *dev,
  3112. struct device_attribute *attr,
  3113. const char *buf, size_t count)
  3114. {
  3115. int fs_ready = 0;
  3116. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3117. if (sscanf(buf, "%du", &fs_ready) != 1)
  3118. return -EINVAL;
  3119. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3120. fs_ready, count);
  3121. if (!plat_priv) {
  3122. cnss_pr_err("plat_priv is NULL\n");
  3123. return count;
  3124. }
  3125. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3126. cnss_pr_dbg("QMI is bypassed\n");
  3127. return count;
  3128. }
  3129. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3130. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3131. cnss_driver_event_post(plat_priv,
  3132. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3133. 0, NULL);
  3134. }
  3135. return count;
  3136. }
  3137. static ssize_t qdss_trace_start_store(struct device *dev,
  3138. struct device_attribute *attr,
  3139. const char *buf, size_t count)
  3140. {
  3141. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3142. wlfw_qdss_trace_start(plat_priv);
  3143. cnss_pr_dbg("Received QDSS start command\n");
  3144. return count;
  3145. }
  3146. static ssize_t qdss_trace_stop_store(struct device *dev,
  3147. struct device_attribute *attr,
  3148. const char *buf, size_t count)
  3149. {
  3150. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3151. u32 option = 0;
  3152. if (sscanf(buf, "%du", &option) != 1)
  3153. return -EINVAL;
  3154. wlfw_qdss_trace_stop(plat_priv, option);
  3155. cnss_pr_dbg("Received QDSS stop command\n");
  3156. return count;
  3157. }
  3158. static ssize_t qdss_conf_download_store(struct device *dev,
  3159. struct device_attribute *attr,
  3160. const char *buf, size_t count)
  3161. {
  3162. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3163. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3164. cnss_pr_dbg("Received QDSS download config command\n");
  3165. return count;
  3166. }
  3167. static ssize_t hw_trace_override_store(struct device *dev,
  3168. struct device_attribute *attr,
  3169. const char *buf, size_t count)
  3170. {
  3171. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3172. int tmp = 0;
  3173. if (sscanf(buf, "%du", &tmp) != 1)
  3174. return -EINVAL;
  3175. plat_priv->hw_trc_override = tmp;
  3176. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3177. return count;
  3178. }
  3179. static ssize_t charger_mode_store(struct device *dev,
  3180. struct device_attribute *attr,
  3181. const char *buf, size_t count)
  3182. {
  3183. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3184. int tmp = 0;
  3185. if (sscanf(buf, "%du", &tmp) != 1)
  3186. return -EINVAL;
  3187. plat_priv->charger_mode = tmp;
  3188. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3189. return count;
  3190. }
  3191. static DEVICE_ATTR_WO(fs_ready);
  3192. static DEVICE_ATTR_WO(shutdown);
  3193. static DEVICE_ATTR_RW(recovery);
  3194. static DEVICE_ATTR_WO(enable_hds);
  3195. static DEVICE_ATTR_WO(qdss_trace_start);
  3196. static DEVICE_ATTR_WO(qdss_trace_stop);
  3197. static DEVICE_ATTR_WO(qdss_conf_download);
  3198. static DEVICE_ATTR_WO(hw_trace_override);
  3199. static DEVICE_ATTR_WO(charger_mode);
  3200. static DEVICE_ATTR_RW(time_sync_period);
  3201. static struct attribute *cnss_attrs[] = {
  3202. &dev_attr_fs_ready.attr,
  3203. &dev_attr_shutdown.attr,
  3204. &dev_attr_recovery.attr,
  3205. &dev_attr_enable_hds.attr,
  3206. &dev_attr_qdss_trace_start.attr,
  3207. &dev_attr_qdss_trace_stop.attr,
  3208. &dev_attr_qdss_conf_download.attr,
  3209. &dev_attr_hw_trace_override.attr,
  3210. &dev_attr_charger_mode.attr,
  3211. &dev_attr_time_sync_period.attr,
  3212. NULL,
  3213. };
  3214. static struct attribute_group cnss_attr_group = {
  3215. .attrs = cnss_attrs,
  3216. };
  3217. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3218. {
  3219. struct device *dev = &plat_priv->plat_dev->dev;
  3220. int ret;
  3221. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  3222. if (ret) {
  3223. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3224. ret);
  3225. goto out;
  3226. }
  3227. /* This is only for backward compatibility. */
  3228. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  3229. if (ret) {
  3230. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3231. ret);
  3232. goto rm_cnss_link;
  3233. }
  3234. return 0;
  3235. rm_cnss_link:
  3236. sysfs_remove_link(kernel_kobj, "cnss");
  3237. out:
  3238. return ret;
  3239. }
  3240. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3241. {
  3242. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  3243. sysfs_remove_link(kernel_kobj, "cnss");
  3244. }
  3245. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3246. {
  3247. int ret = 0;
  3248. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3249. &cnss_attr_group);
  3250. if (ret) {
  3251. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3252. ret);
  3253. goto out;
  3254. }
  3255. cnss_create_sysfs_link(plat_priv);
  3256. return 0;
  3257. out:
  3258. return ret;
  3259. }
  3260. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3261. {
  3262. cnss_remove_sysfs_link(plat_priv);
  3263. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3264. }
  3265. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3266. {
  3267. spin_lock_init(&plat_priv->event_lock);
  3268. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3269. WQ_UNBOUND, 1);
  3270. if (!plat_priv->event_wq) {
  3271. cnss_pr_err("Failed to create event workqueue!\n");
  3272. return -EFAULT;
  3273. }
  3274. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3275. INIT_LIST_HEAD(&plat_priv->event_list);
  3276. return 0;
  3277. }
  3278. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3279. {
  3280. destroy_workqueue(plat_priv->event_wq);
  3281. }
  3282. static int cnss_reboot_notifier(struct notifier_block *nb,
  3283. unsigned long action,
  3284. void *data)
  3285. {
  3286. struct cnss_plat_data *plat_priv =
  3287. container_of(nb, struct cnss_plat_data, reboot_nb);
  3288. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3289. del_timer(&plat_priv->fw_boot_timer);
  3290. complete_all(&plat_priv->power_up_complete);
  3291. complete_all(&plat_priv->cal_complete);
  3292. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3293. return NOTIFY_DONE;
  3294. }
  3295. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3296. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3297. {
  3298. struct Object client_env;
  3299. struct Object app_object;
  3300. u32 wifi_uid = HW_WIFI_UID;
  3301. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3302. int ret;
  3303. u8 state = 0;
  3304. /* Once this flag is set, secure peripheral feature
  3305. * will not be supported till next reboot
  3306. */
  3307. if (plat_priv->sec_peri_feature_disable)
  3308. return 0;
  3309. /* get rootObj */
  3310. ret = get_client_env_object(&client_env);
  3311. if (ret) {
  3312. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3313. goto end;
  3314. }
  3315. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3316. if (ret) {
  3317. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3318. if (ret == FEATURE_NOT_SUPPORTED) {
  3319. ret = 0; /* Do not Assert */
  3320. plat_priv->sec_peri_feature_disable = true;
  3321. cnss_pr_dbg("Secure HW feature not supported\n");
  3322. }
  3323. goto exit_release_clientenv;
  3324. }
  3325. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3326. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3327. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3328. ObjectCounts_pack(1, 1, 0, 0));
  3329. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3330. if (ret) {
  3331. if (ret == PERIPHERAL_NOT_FOUND) {
  3332. ret = 0; /* Do not Assert */
  3333. plat_priv->sec_peri_feature_disable = true;
  3334. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3335. }
  3336. goto exit_release_app_obj;
  3337. }
  3338. if (state == 1)
  3339. set_bit(CNSS_WLAN_HW_DISABLED,
  3340. &plat_priv->driver_state);
  3341. else
  3342. clear_bit(CNSS_WLAN_HW_DISABLED,
  3343. &plat_priv->driver_state);
  3344. exit_release_app_obj:
  3345. Object_release(app_object);
  3346. exit_release_clientenv:
  3347. Object_release(client_env);
  3348. end:
  3349. if (ret) {
  3350. cnss_pr_err("Unable to get HW disable status\n");
  3351. CNSS_ASSERT(0);
  3352. }
  3353. return ret;
  3354. }
  3355. #else
  3356. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3357. {
  3358. return 0;
  3359. }
  3360. #endif
  3361. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3362. {
  3363. int ret;
  3364. ret = cnss_init_sol_gpio(plat_priv);
  3365. if (ret)
  3366. return ret;
  3367. timer_setup(&plat_priv->fw_boot_timer,
  3368. cnss_bus_fw_boot_timeout_hdlr, 0);
  3369. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3370. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3371. if (ret)
  3372. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3373. ret);
  3374. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3375. if (ret)
  3376. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3377. ret);
  3378. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3379. init_completion(&plat_priv->power_up_complete);
  3380. init_completion(&plat_priv->cal_complete);
  3381. init_completion(&plat_priv->rddm_complete);
  3382. init_completion(&plat_priv->recovery_complete);
  3383. init_completion(&plat_priv->daemon_connected);
  3384. mutex_init(&plat_priv->dev_lock);
  3385. mutex_init(&plat_priv->driver_ops_lock);
  3386. plat_priv->recovery_ws =
  3387. wakeup_source_register(&plat_priv->plat_dev->dev,
  3388. "CNSS_FW_RECOVERY");
  3389. if (!plat_priv->recovery_ws)
  3390. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3391. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3392. cnss_daemon_connection_update_cb,
  3393. plat_priv);
  3394. if (ret)
  3395. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3396. ret);
  3397. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3398. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3399. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3400. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3401. "qcom,rc-ep-short-channel"))
  3402. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3403. return 0;
  3404. }
  3405. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3406. {
  3407. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3408. plat_priv);
  3409. complete_all(&plat_priv->recovery_complete);
  3410. complete_all(&plat_priv->rddm_complete);
  3411. complete_all(&plat_priv->cal_complete);
  3412. complete_all(&plat_priv->power_up_complete);
  3413. complete_all(&plat_priv->daemon_connected);
  3414. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3415. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3416. del_timer(&plat_priv->fw_boot_timer);
  3417. wakeup_source_unregister(plat_priv->recovery_ws);
  3418. cnss_deinit_sol_gpio(plat_priv);
  3419. kfree(plat_priv->sram_dump);
  3420. }
  3421. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3422. {
  3423. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3424. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3425. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3426. "qcom,wlan-cbc-enabled");
  3427. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3428. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3429. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3430. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3431. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3432. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3433. * enabled by default
  3434. */
  3435. plat_priv->adsp_pc_enabled = true;
  3436. }
  3437. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3438. {
  3439. struct device *dev = &plat_priv->plat_dev->dev;
  3440. plat_priv->use_pm_domain =
  3441. of_property_read_bool(dev->of_node, "use-pm-domain");
  3442. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3443. }
  3444. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3445. {
  3446. struct device *dev = &plat_priv->plat_dev->dev;
  3447. plat_priv->set_wlaon_pwr_ctrl =
  3448. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3449. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3450. plat_priv->set_wlaon_pwr_ctrl);
  3451. }
  3452. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3453. {
  3454. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3455. "qcom,converged-dt") ||
  3456. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3457. "qcom,same-dt-multi-dev") ||
  3458. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3459. "qcom,multi-wlan-exchg"));
  3460. }
  3461. static const struct platform_device_id cnss_platform_id_table[] = {
  3462. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3463. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3464. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3465. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3466. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3467. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3468. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3469. { .name = "qcaconv", .driver_data = 0, },
  3470. { },
  3471. };
  3472. static const struct of_device_id cnss_of_match_table[] = {
  3473. {
  3474. .compatible = "qcom,cnss",
  3475. .data = (void *)&cnss_platform_id_table[0]},
  3476. {
  3477. .compatible = "qcom,cnss-qca6290",
  3478. .data = (void *)&cnss_platform_id_table[1]},
  3479. {
  3480. .compatible = "qcom,cnss-qca6390",
  3481. .data = (void *)&cnss_platform_id_table[2]},
  3482. {
  3483. .compatible = "qcom,cnss-qca6490",
  3484. .data = (void *)&cnss_platform_id_table[3]},
  3485. {
  3486. .compatible = "qcom,cnss-kiwi",
  3487. .data = (void *)&cnss_platform_id_table[4]},
  3488. {
  3489. .compatible = "qcom,cnss-mango",
  3490. .data = (void *)&cnss_platform_id_table[5]},
  3491. {
  3492. .compatible = "qcom,cnss-peach",
  3493. .data = (void *)&cnss_platform_id_table[6]},
  3494. {
  3495. .compatible = "qcom,cnss-qca-converged",
  3496. .data = (void *)&cnss_platform_id_table[7]},
  3497. { },
  3498. };
  3499. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3500. static inline bool
  3501. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3502. {
  3503. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3504. "use-nv-mac");
  3505. }
  3506. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3507. {
  3508. struct device_node *child;
  3509. u32 id, i;
  3510. int id_n, device_identifier_gpio, ret;
  3511. u8 gpio_value;
  3512. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3513. return 0;
  3514. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3515. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3516. if (ret) {
  3517. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3518. return ret;
  3519. }
  3520. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3521. gpio_value = gpio_get_value(device_identifier_gpio);
  3522. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3523. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3524. child) {
  3525. if (strcmp(child->name, "chip_cfg"))
  3526. continue;
  3527. id_n = of_property_count_u32_elems(child, "supported-ids");
  3528. if (id_n <= 0) {
  3529. cnss_pr_err("Device id is NOT set\n");
  3530. return -EINVAL;
  3531. }
  3532. for (i = 0; i < id_n; i++) {
  3533. ret = of_property_read_u32_index(child,
  3534. "supported-ids",
  3535. i, &id);
  3536. if (ret) {
  3537. cnss_pr_err("Failed to read supported ids\n");
  3538. return -EINVAL;
  3539. }
  3540. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3541. plat_priv->plat_dev->dev.of_node = child;
  3542. plat_priv->device_id = QCA6490_DEVICE_ID;
  3543. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3544. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3545. child->name, i, id);
  3546. return 0;
  3547. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3548. plat_priv->plat_dev->dev.of_node = child;
  3549. plat_priv->device_id = KIWI_DEVICE_ID;
  3550. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3551. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3552. child->name, i, id);
  3553. return 0;
  3554. }
  3555. }
  3556. }
  3557. return -EINVAL;
  3558. }
  3559. static inline u32
  3560. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3561. {
  3562. bool is_converged_dt = of_property_read_bool(
  3563. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3564. bool is_multi_wlan_xchg;
  3565. if (is_converged_dt)
  3566. return CNSS_DTT_CONVERGED;
  3567. is_multi_wlan_xchg = of_property_read_bool(
  3568. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3569. if (is_multi_wlan_xchg)
  3570. return CNSS_DTT_MULTIEXCHG;
  3571. return CNSS_DTT_LEGACY;
  3572. }
  3573. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3574. {
  3575. int ret = 0;
  3576. int retry = 0;
  3577. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3578. return 0;
  3579. retry:
  3580. ret = cnss_power_on_device(plat_priv, true);
  3581. if (ret)
  3582. goto end;
  3583. ret = cnss_bus_init(plat_priv);
  3584. if (ret) {
  3585. if ((ret != -EPROBE_DEFER) &&
  3586. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3587. cnss_power_off_device(plat_priv);
  3588. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3589. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3590. goto retry;
  3591. }
  3592. goto power_off;
  3593. }
  3594. return 0;
  3595. power_off:
  3596. cnss_power_off_device(plat_priv);
  3597. end:
  3598. return ret;
  3599. }
  3600. int cnss_wlan_hw_enable(void)
  3601. {
  3602. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3603. int ret = 0;
  3604. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3605. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3606. goto register_driver;
  3607. ret = cnss_wlan_device_init(plat_priv);
  3608. if (ret) {
  3609. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3610. CNSS_ASSERT(0);
  3611. return ret;
  3612. }
  3613. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3614. cnss_driver_event_post(plat_priv,
  3615. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3616. 0, NULL);
  3617. register_driver:
  3618. if (plat_priv->driver_ops)
  3619. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3620. return ret;
  3621. }
  3622. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3623. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3624. {
  3625. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3626. int ret = 0;
  3627. if (!plat_priv)
  3628. return -ENODEV;
  3629. /* If IMS server is connected, return success without QMI send */
  3630. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3631. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3632. return ret;
  3633. }
  3634. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3635. return ret;
  3636. }
  3637. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3638. static int cnss_probe(struct platform_device *plat_dev)
  3639. {
  3640. int ret = 0;
  3641. struct cnss_plat_data *plat_priv;
  3642. const struct of_device_id *of_id;
  3643. const struct platform_device_id *device_id;
  3644. if (cnss_get_plat_priv(plat_dev)) {
  3645. cnss_pr_err("Driver is already initialized!\n");
  3646. ret = -EEXIST;
  3647. goto out;
  3648. }
  3649. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3650. if (!of_id || !of_id->data) {
  3651. cnss_pr_err("Failed to find of match device!\n");
  3652. ret = -ENODEV;
  3653. goto out;
  3654. }
  3655. device_id = of_id->data;
  3656. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3657. GFP_KERNEL);
  3658. if (!plat_priv) {
  3659. ret = -ENOMEM;
  3660. goto out;
  3661. }
  3662. plat_priv->plat_dev = plat_dev;
  3663. plat_priv->dev_node = NULL;
  3664. plat_priv->device_id = device_id->driver_data;
  3665. plat_priv->dt_type = cnss_dt_type(plat_priv);
  3666. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  3667. plat_priv->dt_type);
  3668. plat_priv->use_fw_path_with_prefix =
  3669. cnss_use_fw_path_with_prefix(plat_priv);
  3670. ret = cnss_get_dev_cfg_node(plat_priv);
  3671. if (ret) {
  3672. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3673. goto reset_plat_dev;
  3674. }
  3675. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  3676. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3677. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3678. cnss_set_plat_priv(plat_dev, plat_priv);
  3679. platform_set_drvdata(plat_dev, plat_priv);
  3680. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3681. INIT_LIST_HEAD(&plat_priv->clk_list);
  3682. cnss_get_pm_domain_info(plat_priv);
  3683. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3684. cnss_power_misc_params_init(plat_priv);
  3685. cnss_get_tcs_info(plat_priv);
  3686. cnss_get_cpr_info(plat_priv);
  3687. cnss_aop_mbox_init(plat_priv);
  3688. cnss_init_control_params(plat_priv);
  3689. ret = cnss_get_resources(plat_priv);
  3690. if (ret)
  3691. goto reset_ctx;
  3692. ret = cnss_register_esoc(plat_priv);
  3693. if (ret)
  3694. goto free_res;
  3695. ret = cnss_register_bus_scale(plat_priv);
  3696. if (ret)
  3697. goto unreg_esoc;
  3698. ret = cnss_create_sysfs(plat_priv);
  3699. if (ret)
  3700. goto unreg_bus_scale;
  3701. ret = cnss_event_work_init(plat_priv);
  3702. if (ret)
  3703. goto remove_sysfs;
  3704. ret = cnss_qmi_init(plat_priv);
  3705. if (ret)
  3706. goto deinit_event_work;
  3707. ret = cnss_dms_init(plat_priv);
  3708. if (ret)
  3709. goto deinit_qmi;
  3710. ret = cnss_debugfs_create(plat_priv);
  3711. if (ret)
  3712. goto deinit_dms;
  3713. ret = cnss_misc_init(plat_priv);
  3714. if (ret)
  3715. goto destroy_debugfs;
  3716. ret = cnss_wlan_hw_disable_check(plat_priv);
  3717. if (ret)
  3718. goto deinit_misc;
  3719. /* Make sure all platform related init are done before
  3720. * device power on and bus init.
  3721. */
  3722. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3723. ret = cnss_wlan_device_init(plat_priv);
  3724. if (ret)
  3725. goto deinit_misc;
  3726. } else {
  3727. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3728. }
  3729. cnss_register_coex_service(plat_priv);
  3730. cnss_register_ims_service(plat_priv);
  3731. ret = cnss_genl_init();
  3732. if (ret < 0)
  3733. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3734. cnss_pr_info("Platform driver probed successfully.\n");
  3735. return 0;
  3736. deinit_misc:
  3737. cnss_misc_deinit(plat_priv);
  3738. destroy_debugfs:
  3739. cnss_debugfs_destroy(plat_priv);
  3740. deinit_dms:
  3741. cnss_dms_deinit(plat_priv);
  3742. deinit_qmi:
  3743. cnss_qmi_deinit(plat_priv);
  3744. deinit_event_work:
  3745. cnss_event_work_deinit(plat_priv);
  3746. remove_sysfs:
  3747. cnss_remove_sysfs(plat_priv);
  3748. unreg_bus_scale:
  3749. cnss_unregister_bus_scale(plat_priv);
  3750. unreg_esoc:
  3751. cnss_unregister_esoc(plat_priv);
  3752. free_res:
  3753. cnss_put_resources(plat_priv);
  3754. reset_ctx:
  3755. platform_set_drvdata(plat_dev, NULL);
  3756. reset_plat_dev:
  3757. cnss_set_plat_priv(plat_dev, NULL);
  3758. out:
  3759. return ret;
  3760. }
  3761. static int cnss_remove(struct platform_device *plat_dev)
  3762. {
  3763. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3764. plat_priv->audio_iommu_domain = NULL;
  3765. cnss_genl_exit();
  3766. cnss_unregister_ims_service(plat_priv);
  3767. cnss_unregister_coex_service(plat_priv);
  3768. cnss_bus_deinit(plat_priv);
  3769. cnss_misc_deinit(plat_priv);
  3770. cnss_debugfs_destroy(plat_priv);
  3771. cnss_dms_deinit(plat_priv);
  3772. cnss_qmi_deinit(plat_priv);
  3773. cnss_event_work_deinit(plat_priv);
  3774. cnss_cancel_dms_work();
  3775. cnss_remove_sysfs(plat_priv);
  3776. cnss_unregister_bus_scale(plat_priv);
  3777. cnss_unregister_esoc(plat_priv);
  3778. cnss_put_resources(plat_priv);
  3779. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3780. mbox_free_channel(plat_priv->mbox_chan);
  3781. platform_set_drvdata(plat_dev, NULL);
  3782. plat_env = NULL;
  3783. return 0;
  3784. }
  3785. static struct platform_driver cnss_platform_driver = {
  3786. .probe = cnss_probe,
  3787. .remove = cnss_remove,
  3788. .driver = {
  3789. .name = "cnss2",
  3790. .of_match_table = cnss_of_match_table,
  3791. #ifdef CONFIG_CNSS_ASYNC
  3792. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3793. #endif
  3794. },
  3795. };
  3796. static bool cnss_check_compatible_node(void)
  3797. {
  3798. struct device_node *dn = NULL;
  3799. for_each_matching_node(dn, cnss_of_match_table) {
  3800. if (of_device_is_available(dn)) {
  3801. cnss_allow_driver_loading = true;
  3802. return true;
  3803. }
  3804. }
  3805. return false;
  3806. }
  3807. /**
  3808. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3809. *
  3810. * Valid device tree node means a node with "compatible" property from the
  3811. * device match table and "status" property is not disabled.
  3812. *
  3813. * Return: true if valid device tree node found, false if not found
  3814. */
  3815. static bool cnss_is_valid_dt_node_found(void)
  3816. {
  3817. struct device_node *dn = NULL;
  3818. for_each_matching_node(dn, cnss_of_match_table) {
  3819. if (of_device_is_available(dn))
  3820. break;
  3821. }
  3822. if (dn)
  3823. return true;
  3824. return false;
  3825. }
  3826. static int __init cnss_initialize(void)
  3827. {
  3828. int ret = 0;
  3829. if (!cnss_is_valid_dt_node_found())
  3830. return -ENODEV;
  3831. if (!cnss_check_compatible_node())
  3832. return ret;
  3833. cnss_debug_init();
  3834. ret = platform_driver_register(&cnss_platform_driver);
  3835. if (ret)
  3836. cnss_debug_deinit();
  3837. return ret;
  3838. }
  3839. static void __exit cnss_exit(void)
  3840. {
  3841. platform_driver_unregister(&cnss_platform_driver);
  3842. cnss_debug_deinit();
  3843. }
  3844. module_init(cnss_initialize);
  3845. module_exit(cnss_exit);
  3846. MODULE_LICENSE("GPL v2");
  3847. MODULE_DESCRIPTION("CNSS2 Platform Driver");