dp_rx_mon_dest.c 29 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078
  1. /*
  2. * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #include "hal_api_mon.h"
  26. #include "dp_rx_mon.h"
  27. #include "wlan_cfg.h"
  28. /**
  29. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  30. * (WBM), following error handling
  31. *
  32. * @dp_pdev: core txrx pdev context
  33. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  34. * Return: QDF_STATUS
  35. */
  36. static QDF_STATUS
  37. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  38. void *buf_addr_info)
  39. {
  40. struct dp_srng *dp_srng;
  41. void *hal_srng;
  42. void *hal_soc;
  43. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  44. void *src_srng_desc;
  45. hal_soc = dp_pdev->soc->hal_soc;
  46. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  47. hal_srng = dp_srng->hal_srng;
  48. qdf_assert(hal_srng);
  49. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  50. /* TODO */
  51. /*
  52. * Need API to convert from hal_ring pointer to
  53. * Ring Type / Ring Id combo
  54. */
  55. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  56. "%s %d : \
  57. HAL RING Access For WBM Release SRNG Failed -- %pK\n",
  58. __func__, __LINE__, hal_srng);
  59. goto done;
  60. }
  61. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  62. if (qdf_likely(src_srng_desc)) {
  63. /* Return link descriptor through WBM ring (SW2WBM)*/
  64. hal_rx_mon_msdu_link_desc_set(hal_soc,
  65. src_srng_desc, buf_addr_info);
  66. status = QDF_STATUS_SUCCESS;
  67. } else {
  68. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  69. "%s %d -- Monitor Link Desc WBM Release Ring Full\n",
  70. __func__, __LINE__);
  71. }
  72. done:
  73. hal_srng_access_end(hal_soc, hal_srng);
  74. return status;
  75. }
  76. /**
  77. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  78. * multiple nbufs. This function
  79. * is to return data length in
  80. * fragmented buffer
  81. *
  82. * @total_len: pointer to remaining data length.
  83. * @frag_len: poiter to data length in this fragment.
  84. */
  85. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  86. uint32_t *frag_len)
  87. {
  88. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  89. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  90. *total_len -= *frag_len;
  91. } else {
  92. *frag_len = *total_len;
  93. *total_len = 0;
  94. }
  95. }
  96. /**
  97. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  98. * (WBM), following error handling
  99. *
  100. * @soc: core DP main context
  101. * @mac_id: mac id which is one of 3 mac_ids
  102. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  103. * @head_msdu: head of msdu to be popped
  104. * @tail_msdu: tail of msdu to be popped
  105. * @npackets: number of packet to be popped
  106. * @ppdu_id: ppdu id of processing ppdu
  107. * @head: head of descs list to be freed
  108. * @tail: tail of decs list to be freed
  109. * Return: number of msdu in MPDU to be popped
  110. */
  111. static inline uint32_t
  112. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  113. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  114. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  115. union dp_rx_desc_list_elem_t **head,
  116. union dp_rx_desc_list_elem_t **tail)
  117. {
  118. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  119. void *rx_desc_tlv;
  120. void *rx_msdu_link_desc;
  121. qdf_nbuf_t msdu;
  122. qdf_nbuf_t last;
  123. struct hal_rx_msdu_list msdu_list;
  124. uint16_t num_msdus;
  125. uint32_t rx_buf_size, rx_pkt_offset;
  126. struct hal_buf_info buf_info;
  127. void *p_buf_addr_info;
  128. void *p_last_buf_addr_info;
  129. uint32_t rx_bufs_used = 0;
  130. uint32_t msdu_ppdu_id, msdu_cnt, last_ppdu_id;
  131. uint8_t *data;
  132. uint32_t i;
  133. uint32_t total_frag_len, frag_len;
  134. bool is_frag, is_first_msdu;
  135. msdu = 0;
  136. last_ppdu_id = dp_pdev->ppdu_info.com_info.last_ppdu_id;
  137. last = NULL;
  138. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  139. &p_last_buf_addr_info, &msdu_cnt);
  140. is_frag = false;
  141. is_first_msdu = true;
  142. do {
  143. rx_msdu_link_desc =
  144. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info);
  145. qdf_assert(rx_msdu_link_desc);
  146. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  147. for (i = 0; i < num_msdus; i++) {
  148. uint32_t l2_hdr_offset;
  149. struct dp_rx_desc *rx_desc =
  150. dp_rx_cookie_2_va_mon_buf(soc,
  151. msdu_list.sw_cookie[i]);
  152. qdf_assert(rx_desc);
  153. msdu = rx_desc->nbuf;
  154. qdf_nbuf_unmap_single(soc->osdev, msdu,
  155. QDF_DMA_FROM_DEVICE);
  156. data = qdf_nbuf_data(msdu);
  157. QDF_TRACE(QDF_MODULE_ID_DP,
  158. QDF_TRACE_LEVEL_DEBUG,
  159. "[%s][%d] msdu_nbuf=%pK, data=%pK\n",
  160. __func__, __LINE__, msdu, data);
  161. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  162. if (is_first_msdu) {
  163. msdu_ppdu_id =
  164. HAL_RX_MON_HW_DESC_GET_PPDUID_GET(rx_desc_tlv);
  165. is_first_msdu = false;
  166. }
  167. QDF_TRACE(QDF_MODULE_ID_DP,
  168. QDF_TRACE_LEVEL_DEBUG,
  169. "[%s][%d] i=%d, ppdu_id=%x, msdu_ppdu_id=%x\n",
  170. __func__, __LINE__, i, *ppdu_id, msdu_ppdu_id);
  171. if (*ppdu_id > msdu_ppdu_id)
  172. QDF_TRACE(QDF_MODULE_ID_DP,
  173. QDF_TRACE_LEVEL_WARN,
  174. "[%s][%d] ppdu_id=%d msdu_ppdu_id=%d\n",
  175. __func__, __LINE__, *ppdu_id,
  176. msdu_ppdu_id);
  177. if ((*ppdu_id < msdu_ppdu_id) && (*ppdu_id >
  178. last_ppdu_id)) {
  179. *ppdu_id = msdu_ppdu_id;
  180. return rx_bufs_used;
  181. }
  182. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  183. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc_tlv,
  184. &(dp_pdev->ppdu_info.rx_status));
  185. if (msdu_list.msdu_info[i].msdu_flags &
  186. HAL_MSDU_F_MSDU_CONTINUATION) {
  187. if (!is_frag) {
  188. total_frag_len =
  189. msdu_list.msdu_info[i].msdu_len;
  190. is_frag = true;
  191. }
  192. dp_mon_adjust_frag_len(
  193. &total_frag_len, &frag_len);
  194. } else {
  195. if (is_frag) {
  196. dp_mon_adjust_frag_len(
  197. &total_frag_len, &frag_len);
  198. } else {
  199. frag_len =
  200. msdu_list.msdu_info[i].msdu_len;
  201. }
  202. is_frag = false;
  203. msdu_cnt--;
  204. }
  205. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  206. /*
  207. * HW structures call this L3 header padding
  208. * -- even though this is actually the offset
  209. * from the buffer beginning where the L2
  210. * header begins.
  211. */
  212. l2_hdr_offset =
  213. hal_rx_msdu_end_l3_hdr_padding_get(data);
  214. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  215. + frag_len;
  216. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  217. #if 0
  218. /* Disble it.see packet on msdu done set to 0 */
  219. /*
  220. * Check if DMA completed -- msdu_done is the
  221. * last bit to be written
  222. */
  223. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  224. QDF_TRACE(QDF_MODULE_ID_DP,
  225. QDF_TRACE_LEVEL_DEBUG,
  226. "%s:%d: Pkt Desc\n",
  227. __func__, __LINE__);
  228. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  229. QDF_TRACE_LEVEL_DEBUG,
  230. rx_desc_tlv, 128);
  231. qdf_assert_always(0);
  232. }
  233. #endif
  234. rx_bufs_used++;
  235. QDF_TRACE(QDF_MODULE_ID_DP,
  236. QDF_TRACE_LEVEL_DEBUG,
  237. "rx_pkt_offset=%d, \
  238. l2_hdr_offset=%d, msdu_len=%d, \
  239. addr=%pK\n",
  240. rx_pkt_offset,
  241. l2_hdr_offset,
  242. msdu_list.msdu_info[i].msdu_len,
  243. qdf_nbuf_data(msdu));
  244. if (*head_msdu == NULL)
  245. *head_msdu = msdu;
  246. else
  247. qdf_nbuf_set_next(last, msdu);
  248. last = msdu;
  249. dp_rx_add_to_free_desc_list(head,
  250. tail, rx_desc);
  251. }
  252. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  253. &p_buf_addr_info);
  254. dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info);
  255. p_last_buf_addr_info = p_buf_addr_info;
  256. } while (buf_info.paddr && msdu_cnt);
  257. qdf_nbuf_set_next(last, NULL);
  258. *tail_msdu = msdu;
  259. return rx_bufs_used;
  260. }
  261. static inline
  262. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  263. {
  264. uint8_t *data;
  265. uint32_t rx_pkt_offset, l2_hdr_offset;
  266. data = qdf_nbuf_data(msdu);
  267. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  268. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  269. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  270. }
  271. static inline
  272. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  273. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  274. struct cdp_mon_status *rx_status)
  275. {
  276. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  277. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  278. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  279. is_amsdu, is_first_frag, amsdu_pad;
  280. void *rx_desc;
  281. char *hdr_desc;
  282. unsigned char *dest;
  283. struct ieee80211_frame *wh;
  284. struct ieee80211_qoscntl *qos;
  285. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  286. head_frag_list = NULL;
  287. /* The nbuf has been pulled just beyond the status and points to the
  288. * payload
  289. */
  290. msdu_orig = head_msdu;
  291. rx_desc = qdf_nbuf_data(msdu_orig);
  292. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  293. /* It looks like there is some issue on MPDU len err */
  294. /* Need further investigate if drop the packet */
  295. /* return NULL; */
  296. }
  297. rx_desc = qdf_nbuf_data(last_msdu);
  298. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  299. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  300. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  301. /* Fill out the rx_status from the PPDU start and end fields */
  302. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  303. rx_desc = qdf_nbuf_data(head_msdu);
  304. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  305. /* Easy case - The MSDU status indicates that this is a non-decapped
  306. * packet in RAW mode.
  307. */
  308. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  309. /* Note that this path might suffer from headroom unavailabilty
  310. * - but the RX status is usually enough
  311. */
  312. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  313. "[%s][%d] decap format raw\n", __func__, __LINE__);
  314. dp_rx_msdus_set_payload(head_msdu);
  315. mpdu_buf = head_msdu;
  316. if (!mpdu_buf)
  317. goto mpdu_stitch_fail;
  318. prev_buf = mpdu_buf;
  319. frag_list_sum_len = 0;
  320. msdu = qdf_nbuf_next(head_msdu);
  321. is_first_frag = 1;
  322. while (msdu) {
  323. dp_rx_msdus_set_payload(msdu);
  324. if (is_first_frag) {
  325. is_first_frag = 0;
  326. head_frag_list = msdu;
  327. }
  328. frag_list_sum_len += qdf_nbuf_len(msdu);
  329. /* Maintain the linking of the cloned MSDUS */
  330. qdf_nbuf_set_next_ext(prev_buf, msdu);
  331. /* Move to the next */
  332. prev_buf = msdu;
  333. msdu = qdf_nbuf_next(msdu);
  334. }
  335. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  336. /* If there were more fragments to this RAW frame */
  337. if (head_frag_list) {
  338. frag_list_sum_len -= HAL_RX_FCS_LEN;
  339. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  340. frag_list_sum_len);
  341. }
  342. goto mpdu_stitch_done;
  343. }
  344. /* Decap mode:
  345. * Calculate the amount of header in decapped packet to knock off based
  346. * on the decap type and the corresponding number of raw bytes to copy
  347. * status header
  348. */
  349. rx_desc = qdf_nbuf_data(head_msdu);
  350. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  351. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  352. "[%s][%d] decap format not raw\n", __func__, __LINE__);
  353. /* Base size */
  354. wifi_hdr_len = sizeof(struct ieee80211_frame);
  355. wh = (struct ieee80211_frame *)hdr_desc;
  356. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  357. if (dir == IEEE80211_FC1_DIR_DSTODS)
  358. wifi_hdr_len += 6;
  359. is_amsdu = 0;
  360. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  361. qos = (struct ieee80211_qoscntl *)
  362. (hdr_desc + wifi_hdr_len);
  363. wifi_hdr_len += 2;
  364. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  365. }
  366. /*Calculate security header length based on 'Protected'
  367. * and 'EXT_IV' flag
  368. * */
  369. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  370. char *iv = (char *)wh + wifi_hdr_len;
  371. if (iv[3] & KEY_EXTIV)
  372. sec_hdr_len = 8;
  373. else
  374. sec_hdr_len = 4;
  375. } else {
  376. sec_hdr_len = 0;
  377. }
  378. wifi_hdr_len += sec_hdr_len;
  379. /* MSDU related stuff LLC - AMSDU subframe header etc */
  380. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  381. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  382. /* "Decap" header to remove from MSDU buffer */
  383. decap_hdr_pull_bytes = 14;
  384. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  385. * status of the now decapped first msdu. Leave enough headroom for
  386. * accomodating any radio-tap /prism like PHY header
  387. */
  388. #define MAX_MONITOR_HEADER (512)
  389. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  390. MAX_MONITOR_HEADER + mpdu_buf_len,
  391. MAX_MONITOR_HEADER, 4, FALSE);
  392. if (!mpdu_buf)
  393. goto mpdu_stitch_done;
  394. /* Copy the MPDU related header and enc headers into the first buffer
  395. * - Note that there can be a 2 byte pad between heaader and enc header
  396. */
  397. prev_buf = mpdu_buf;
  398. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  399. if (!dest)
  400. goto mpdu_stitch_fail;
  401. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  402. hdr_desc += wifi_hdr_len;
  403. #if 0
  404. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  405. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  406. hdr_desc += sec_hdr_len;
  407. #endif
  408. /* The first LLC len is copied into the MPDU buffer */
  409. frag_list_sum_len = 0;
  410. frag_list_sum_len -= msdu_llc_len;
  411. msdu_orig = head_msdu;
  412. is_first_frag = 1;
  413. amsdu_pad = 0;
  414. while (msdu_orig) {
  415. /* TODO: intra AMSDU padding - do we need it ??? */
  416. msdu = msdu_orig;
  417. if (is_first_frag) {
  418. head_frag_list = msdu;
  419. } else {
  420. /* Reload the hdr ptr only on non-first MSDUs */
  421. rx_desc = qdf_nbuf_data(msdu_orig);
  422. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  423. }
  424. /* Copy this buffers MSDU related status into the prev buffer */
  425. if (is_first_frag) {
  426. is_first_frag = 0;
  427. }
  428. dest = qdf_nbuf_put_tail(prev_buf,
  429. msdu_llc_len + amsdu_pad);
  430. if (!dest)
  431. goto mpdu_stitch_fail;
  432. dest += amsdu_pad;
  433. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  434. dp_rx_msdus_set_payload(msdu);
  435. /* Push the MSDU buffer beyond the decap header */
  436. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  437. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  438. + amsdu_pad;
  439. /* Set up intra-AMSDU pad to be added to start of next buffer -
  440. * AMSDU pad is 4 byte pad on AMSDU subframe */
  441. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  442. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  443. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  444. * probably iterate all the frags cloning them along the way and
  445. * and also updating the prev_buf pointer
  446. */
  447. /* Move to the next */
  448. prev_buf = msdu;
  449. msdu_orig = qdf_nbuf_next(msdu_orig);
  450. }
  451. #if 0
  452. /* Add in the trailer section - encryption trailer + FCS */
  453. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  454. frag_list_sum_len += HAL_RX_FCS_LEN;
  455. #endif
  456. /* TODO: Convert this to suitable adf routines */
  457. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  458. frag_list_sum_len);
  459. mpdu_stitch_done:
  460. /* Check if this buffer contains the PPDU end status for TSF */
  461. /* Need revist this code to see where we can get tsf timestamp */
  462. #if 0
  463. /* PPDU end TLV will be retrived from monitor status ring */
  464. last_mpdu =
  465. (*(((u_int32_t *)&rx_desc->attention)) &
  466. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  467. RX_ATTENTION_0_LAST_MPDU_LSB;
  468. if (last_mpdu)
  469. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  470. #endif
  471. return mpdu_buf;
  472. mpdu_stitch_fail:
  473. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  474. /* Free the head buffer */
  475. qdf_nbuf_free(mpdu_buf);
  476. }
  477. return NULL;
  478. }
  479. /**
  480. * dp_rx_extract_radiotap_info(): Extract and populate information in
  481. * struct mon_rx_status type
  482. * @rx_status: Receive status
  483. * @mon_rx_status: Monitor mode status
  484. *
  485. * Returns: None
  486. */
  487. static inline
  488. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  489. struct mon_rx_status *rx_mon_status)
  490. {
  491. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  492. rx_mon_status->chan_freq = rx_status->rs_freq;
  493. rx_mon_status->chan_num = rx_status->rs_channel;
  494. rx_mon_status->chan_flags = rx_status->rs_flags;
  495. rx_mon_status->rate = rx_status->rs_datarate;
  496. /* TODO: rx_mon_status->ant_signal_db */
  497. /* TODO: rx_mon_status->nr_ant */
  498. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  499. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  500. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  501. /* TODO: rx_mon_status->ldpc */
  502. /* TODO: rx_mon_status->beamformed */
  503. /* TODO: rx_mon_status->vht_flags */
  504. /* TODO: rx_mon_status->vht_flag_values1 */
  505. }
  506. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  507. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  508. {
  509. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  510. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  511. qdf_nbuf_t mon_skb, skb_next;
  512. qdf_nbuf_t mon_mpdu = NULL;
  513. if ((pdev->monitor_vdev == NULL) ||
  514. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  515. goto mon_deliver_fail;
  516. }
  517. /* restitch mon MPDU for delivery via monitor interface */
  518. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  519. tail_msdu, rs);
  520. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  521. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  522. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  523. pdev->monitor_vdev->osif_rx_mon(
  524. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  525. } else {
  526. goto mon_deliver_fail;
  527. }
  528. return QDF_STATUS_SUCCESS;
  529. mon_deliver_fail:
  530. mon_skb = head_msdu;
  531. while (mon_skb) {
  532. skb_next = qdf_nbuf_next(mon_skb);
  533. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  534. "[%s][%d] mon_skb=%pK\n", __func__, __LINE__, mon_skb);
  535. qdf_nbuf_free(mon_skb);
  536. mon_skb = skb_next;
  537. }
  538. return QDF_STATUS_E_INVAL;
  539. }
  540. /**
  541. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  542. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  543. * @soc: core txrx main contex
  544. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  545. * @quota: No. of units (packets) that can be serviced in one shot.
  546. *
  547. * This function implements the core of Rx functionality. This is
  548. * expected to handle only non-error frames.
  549. *
  550. * Return: none
  551. */
  552. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  553. {
  554. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  555. uint8_t pdev_id;
  556. void *hal_soc;
  557. void *rxdma_dst_ring_desc;
  558. void *mon_dst_srng;
  559. union dp_rx_desc_list_elem_t *head = NULL;
  560. union dp_rx_desc_list_elem_t *tail = NULL;
  561. uint32_t ppdu_id;
  562. uint32_t rx_bufs_used;
  563. pdev_id = pdev->pdev_id;
  564. mon_dst_srng = pdev->rxdma_mon_dst_ring.hal_srng;
  565. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  566. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  567. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK\n",
  568. __func__, __LINE__, mon_dst_srng);
  569. return;
  570. }
  571. hal_soc = soc->hal_soc;
  572. qdf_assert(hal_soc);
  573. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  574. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  575. "%s %d : HAL Monitor Destination Ring access Failed -- %pK\n",
  576. __func__, __LINE__, mon_dst_srng);
  577. return;
  578. }
  579. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  580. rx_bufs_used = 0;
  581. while (qdf_likely(rxdma_dst_ring_desc =
  582. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  583. qdf_nbuf_t head_msdu, tail_msdu;
  584. uint32_t npackets;
  585. head_msdu = (qdf_nbuf_t) NULL;
  586. tail_msdu = (qdf_nbuf_t) NULL;
  587. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  588. rxdma_dst_ring_desc,
  589. &head_msdu, &tail_msdu,
  590. &npackets, &ppdu_id,
  591. &head, &tail);
  592. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  593. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  594. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  595. sizeof(pdev->ppdu_info.rx_status));
  596. pdev->ppdu_info.com_info.last_ppdu_id =
  597. pdev->ppdu_info.com_info.ppdu_id;
  598. break;
  599. }
  600. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  601. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  602. mon_dst_srng);
  603. }
  604. hal_srng_access_end(hal_soc, mon_dst_srng);
  605. if (rx_bufs_used) {
  606. dp_rx_buffers_replenish(soc, pdev_id,
  607. &pdev->rxdma_mon_buf_ring, &soc->rx_desc_mon[pdev_id],
  608. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  609. }
  610. }
  611. static QDF_STATUS
  612. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev) {
  613. uint8_t pdev_id = pdev->pdev_id;
  614. struct dp_soc *soc = pdev->soc;
  615. union dp_rx_desc_list_elem_t *desc_list = NULL;
  616. union dp_rx_desc_list_elem_t *tail = NULL;
  617. struct dp_srng *rxdma_srng;
  618. uint32_t rxdma_entries;
  619. struct rx_desc_pool *rx_desc_pool;
  620. QDF_STATUS status;
  621. rxdma_srng = &pdev->rxdma_mon_buf_ring;
  622. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  623. soc->hal_soc,
  624. RXDMA_MONITOR_BUF);
  625. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  626. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  627. "%s: Mon RX Desc Pool[%d] allocation size=%d\n"
  628. , __func__, pdev_id, rxdma_entries*3);
  629. status = dp_rx_desc_pool_alloc(soc, pdev_id,
  630. rxdma_entries*3, rx_desc_pool);
  631. if (!QDF_IS_STATUS_SUCCESS(status)) {
  632. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  633. "%s: dp_rx_desc_pool_alloc() failed \n", __func__);
  634. return status;
  635. }
  636. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  637. "%s: Mon RX Buffers Replenish pdev_id=%d\n",
  638. __func__, pdev_id);
  639. status = dp_rx_buffers_replenish(soc, pdev_id, rxdma_srng, rx_desc_pool,
  640. rxdma_entries, &desc_list, &tail,
  641. HAL_RX_BUF_RBM_SW3_BM);
  642. if (!QDF_IS_STATUS_SUCCESS(status)) {
  643. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  644. "%s: dp_rx_buffers_replenish() failed \n", __func__);
  645. return status;
  646. }
  647. return QDF_STATUS_SUCCESS;
  648. }
  649. static QDF_STATUS
  650. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev) {
  651. uint8_t pdev_id = pdev->pdev_id;
  652. struct dp_soc *soc = pdev->soc;
  653. struct rx_desc_pool *rx_desc_pool;
  654. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  655. if (rx_desc_pool->pool_size != 0) {
  656. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  657. }
  658. return QDF_STATUS_SUCCESS;
  659. }
  660. /*
  661. * Allocate and setup link descriptor pool that will be used by HW for
  662. * various link and queue descriptors and managed by WBM
  663. */
  664. static int dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  665. {
  666. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  667. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  668. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  669. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  670. uint32_t total_link_descs, total_mem_size;
  671. uint32_t num_link_desc_banks;
  672. uint32_t last_bank_size = 0;
  673. uint32_t entry_size, num_entries;
  674. void *mon_desc_srng;
  675. uint32_t num_replenish_buf;
  676. struct dp_srng *dp_srng;
  677. int i;
  678. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  679. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  680. soc->hal_soc, RXDMA_MONITOR_DESC);
  681. /* Round up to power of 2 */
  682. total_link_descs = 1;
  683. while (total_link_descs < num_entries)
  684. total_link_descs <<= 1;
  685. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  686. "%s: total_link_descs: %u, link_desc_size: %d\n",
  687. __func__, total_link_descs, link_desc_size);
  688. total_mem_size = total_link_descs * link_desc_size;
  689. total_mem_size += link_desc_align;
  690. if (total_mem_size <= max_alloc_size) {
  691. num_link_desc_banks = 0;
  692. last_bank_size = total_mem_size;
  693. } else {
  694. num_link_desc_banks = (total_mem_size) /
  695. (max_alloc_size - link_desc_align);
  696. last_bank_size = total_mem_size %
  697. (max_alloc_size - link_desc_align);
  698. }
  699. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  700. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  701. max_alloc_size: %d last_bank_size: %d\n",
  702. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  703. last_bank_size);
  704. for (i = 0; i < num_link_desc_banks; i++) {
  705. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  706. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  707. max_alloc_size,
  708. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  709. if (!dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  710. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  711. "%s: Link desc memory allocation failed\n",
  712. __func__);
  713. goto fail;
  714. }
  715. dp_pdev->link_desc_banks[i].size = max_alloc_size;
  716. dp_pdev->link_desc_banks[i].base_vaddr =
  717. (void *)((unsigned long)
  718. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  719. ((unsigned long)
  720. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  721. link_desc_align));
  722. dp_pdev->link_desc_banks[i].base_paddr =
  723. (unsigned long)
  724. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  725. ((unsigned long)
  726. (dp_pdev->link_desc_banks[i].base_vaddr) -
  727. (unsigned long)
  728. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  729. }
  730. if (last_bank_size) {
  731. /* Allocate last bank in case total memory required is not exact
  732. * multiple of max_alloc_size
  733. */
  734. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  735. qdf_mem_alloc_consistent(soc->osdev,
  736. soc->osdev->dev, last_bank_size,
  737. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  738. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned == NULL) {
  739. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  740. "%s: allocation failed for mon link desc pool\n",
  741. __func__);
  742. goto fail;
  743. }
  744. dp_pdev->link_desc_banks[i].size = last_bank_size;
  745. dp_pdev->link_desc_banks[i].base_vaddr =
  746. (void *)((unsigned long)
  747. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  748. ((unsigned long)
  749. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  750. link_desc_align));
  751. dp_pdev->link_desc_banks[i].base_paddr =
  752. (unsigned long)
  753. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  754. ((unsigned long)
  755. (dp_pdev->link_desc_banks[i].base_vaddr) -
  756. (unsigned long)
  757. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  758. }
  759. /* Allocate and setup link descriptor idle list for HW internal use */
  760. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  761. total_mem_size = entry_size * total_link_descs;
  762. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring.hal_srng;
  763. num_replenish_buf = 0;
  764. if (total_mem_size <= max_alloc_size) {
  765. void *desc;
  766. hal_srng_access_start_unlocked(soc->hal_soc, mon_desc_srng);
  767. for (i = 0; i < MAX_MON_LINK_DESC_BANKS &&
  768. dp_pdev->link_desc_banks[i].base_paddr; i++) {
  769. uint32_t num_entries =
  770. (dp_pdev->link_desc_banks[i].size -
  771. (unsigned long)
  772. (dp_pdev->link_desc_banks[i].base_vaddr) -
  773. (unsigned long)
  774. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned))
  775. / link_desc_size;
  776. unsigned long paddr =
  777. (unsigned long)
  778. (dp_pdev->link_desc_banks[i].base_paddr);
  779. unsigned long vaddr =
  780. (unsigned long)
  781. (dp_pdev->link_desc_banks[i].base_vaddr);
  782. while (num_entries && (desc =
  783. hal_srng_src_get_next(soc->hal_soc,
  784. mon_desc_srng))) {
  785. hal_set_link_desc_addr(desc, i, paddr);
  786. num_entries--;
  787. num_replenish_buf++;
  788. paddr += link_desc_size;
  789. vaddr += link_desc_size;
  790. }
  791. }
  792. hal_srng_access_end_unlocked(soc->hal_soc, mon_desc_srng);
  793. } else {
  794. qdf_assert(0);
  795. }
  796. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  797. "%s: successfully replenished %d buffer\n",
  798. __func__, num_replenish_buf);
  799. return 0;
  800. fail:
  801. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  802. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  803. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  804. dp_pdev->link_desc_banks[i].size,
  805. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  806. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  807. }
  808. }
  809. return QDF_STATUS_E_FAILURE;
  810. }
  811. /*
  812. * Free link descriptor pool that was setup HW
  813. */
  814. static void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  815. {
  816. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  817. int i;
  818. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  819. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  820. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  821. dp_pdev->link_desc_banks[i].size,
  822. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  823. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  824. }
  825. }
  826. }
  827. /**
  828. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  829. * @pdev: core txrx pdev context
  830. *
  831. * This function will attach a DP RX for monitor mode instance into
  832. * the main device (SOC) context. Will allocate dp rx resource and
  833. * initialize resources.
  834. *
  835. * Return: QDF_STATUS_SUCCESS: success
  836. * QDF_STATUS_E_RESOURCES: Error return
  837. */
  838. QDF_STATUS
  839. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  840. uint8_t pdev_id = pdev->pdev_id;
  841. struct dp_soc *soc = pdev->soc;
  842. QDF_STATUS status;
  843. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  844. "%s: pdev attach id=%d\n", __func__, pdev_id);
  845. status = dp_rx_pdev_mon_buf_attach(pdev);
  846. if (!QDF_IS_STATUS_SUCCESS(status)) {
  847. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  848. "%s: dp_rx_pdev_mon_buf_attach() failed \n", __func__);
  849. return status;
  850. }
  851. status = dp_rx_pdev_mon_status_attach(pdev);
  852. if (!QDF_IS_STATUS_SUCCESS(status)) {
  853. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  854. "%s: dp_rx_pdev_mon_status_attach() failed \n",
  855. __func__);
  856. return status;
  857. }
  858. status = dp_mon_link_desc_pool_setup(soc, pdev_id);
  859. if (!QDF_IS_STATUS_SUCCESS(status)) {
  860. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  861. "%s: dp_mon_link_desc_pool_setup() failed \n",
  862. __func__);
  863. return status;
  864. }
  865. return QDF_STATUS_SUCCESS;
  866. }
  867. /**
  868. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  869. * @pdev: core txrx pdev context
  870. *
  871. * This function will detach DP RX for monitor mode from
  872. * main device context. will free DP Rx resources for
  873. * monitor mode
  874. *
  875. * Return: QDF_STATUS_SUCCESS: success
  876. * QDF_STATUS_E_RESOURCES: Error return
  877. */
  878. QDF_STATUS
  879. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  880. uint8_t pdev_id = pdev->pdev_id;
  881. struct dp_soc *soc = pdev->soc;
  882. dp_mon_link_desc_pool_cleanup(soc, pdev_id);
  883. dp_rx_pdev_mon_status_detach(pdev);
  884. dp_rx_pdev_mon_buf_detach(pdev);
  885. return QDF_STATUS_SUCCESS;
  886. }