main.c 119 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. #define ICNSS_RECOVERY_TIMEOUT 60000
  78. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  79. #define ICNSS_CAL_TIMEOUT 40000
  80. static struct icnss_priv *penv;
  81. static struct work_struct wpss_loader;
  82. static struct work_struct wpss_ssr_work;
  83. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  84. #define ICNSS_EVENT_PENDING 2989
  85. #define ICNSS_EVENT_SYNC BIT(0)
  86. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  87. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  88. ICNSS_EVENT_SYNC)
  89. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  90. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  91. #define SMP2P_GET_MAX_RETRY 4
  92. #define SMP2P_GET_RETRY_DELAY_MS 500
  93. #define RAMDUMP_NUM_DEVICES 256
  94. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  95. #define WLAN_EN_TEMP_THRESHOLD 5000
  96. #define WLAN_EN_DELAY 500
  97. #define ICNSS_RPROC_LEN 10
  98. static DEFINE_IDA(rd_minor_id);
  99. enum icnss_pdr_cause_index {
  100. ICNSS_FW_CRASH,
  101. ICNSS_ROOT_PD_CRASH,
  102. ICNSS_ROOT_PD_SHUTDOWN,
  103. ICNSS_HOST_ERROR,
  104. };
  105. static const char * const icnss_pdr_cause[] = {
  106. [ICNSS_FW_CRASH] = "FW crash",
  107. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  108. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  109. [ICNSS_HOST_ERROR] = "Host error",
  110. };
  111. static void icnss_set_plat_priv(struct icnss_priv *priv)
  112. {
  113. penv = priv;
  114. }
  115. static struct icnss_priv *icnss_get_plat_priv(void)
  116. {
  117. return penv;
  118. }
  119. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  120. {
  121. if (priv && priv->rproc) {
  122. rproc_shutdown(priv->rproc);
  123. rproc_put(priv->rproc);
  124. priv->rproc = NULL;
  125. }
  126. }
  127. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  128. struct kobj_attribute *attr,
  129. const char *buf, size_t count)
  130. {
  131. struct icnss_priv *priv = icnss_get_plat_priv();
  132. if (!priv)
  133. return count;
  134. icnss_pr_dbg("Received shutdown indication");
  135. atomic_set(&priv->is_shutdown, true);
  136. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  137. icnss_wpss_unload(priv);
  138. return count;
  139. }
  140. static struct kobj_attribute icnss_sysfs_attribute =
  141. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  142. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  143. {
  144. if (atomic_inc_return(&priv->pm_count) != 1)
  145. return;
  146. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  147. atomic_read(&priv->pm_count));
  148. pm_stay_awake(&priv->pdev->dev);
  149. priv->stats.pm_stay_awake++;
  150. }
  151. static void icnss_pm_relax(struct icnss_priv *priv)
  152. {
  153. int r = atomic_dec_return(&priv->pm_count);
  154. WARN_ON(r < 0);
  155. if (r != 0)
  156. return;
  157. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  158. atomic_read(&priv->pm_count));
  159. pm_relax(&priv->pdev->dev);
  160. priv->stats.pm_relax++;
  161. }
  162. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  163. {
  164. switch (type) {
  165. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  166. return "SERVER_ARRIVE";
  167. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  168. return "SERVER_EXIT";
  169. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  170. return "FW_READY";
  171. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  172. return "REGISTER_DRIVER";
  173. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  174. return "UNREGISTER_DRIVER";
  175. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  176. return "PD_SERVICE_DOWN";
  177. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  178. return "FW_EARLY_CRASH_IND";
  179. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  180. return "IDLE_SHUTDOWN";
  181. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  182. return "IDLE_RESTART";
  183. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  184. return "FW_INIT_DONE";
  185. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  186. return "QDSS_TRACE_REQ_MEM";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  188. return "QDSS_TRACE_SAVE";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  190. return "QDSS_TRACE_FREE";
  191. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  192. return "M3_DUMP_UPLOAD";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  194. return "QDSS_TRACE_REQ_DATA";
  195. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  196. return "SUBSYS_RESTART_LEVEL";
  197. case ICNSS_DRIVER_EVENT_MAX:
  198. return "EVENT_MAX";
  199. }
  200. return "UNKNOWN";
  201. };
  202. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  203. {
  204. switch (type) {
  205. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  206. return "SOC_WAKE_REQUEST";
  207. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  208. return "SOC_WAKE_RELEASE";
  209. case ICNSS_SOC_WAKE_EVENT_MAX:
  210. return "SOC_EVENT_MAX";
  211. }
  212. return "UNKNOWN";
  213. };
  214. int icnss_driver_event_post(struct icnss_priv *priv,
  215. enum icnss_driver_event_type type,
  216. u32 flags, void *data)
  217. {
  218. struct icnss_driver_event *event;
  219. unsigned long irq_flags;
  220. int gfp = GFP_KERNEL;
  221. int ret = 0;
  222. if (!priv)
  223. return -ENODEV;
  224. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  225. icnss_driver_event_to_str(type), type, current->comm,
  226. flags, priv->state);
  227. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  228. icnss_pr_err("Invalid Event type: %d, can't post", type);
  229. return -EINVAL;
  230. }
  231. if (in_interrupt() || irqs_disabled())
  232. gfp = GFP_ATOMIC;
  233. event = kzalloc(sizeof(*event), gfp);
  234. if (event == NULL)
  235. return -ENOMEM;
  236. icnss_pm_stay_awake(priv);
  237. event->type = type;
  238. event->data = data;
  239. init_completion(&event->complete);
  240. event->ret = ICNSS_EVENT_PENDING;
  241. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  242. spin_lock_irqsave(&priv->event_lock, irq_flags);
  243. list_add_tail(&event->list, &priv->event_list);
  244. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  245. priv->stats.events[type].posted++;
  246. queue_work(priv->event_wq, &priv->event_work);
  247. if (!(flags & ICNSS_EVENT_SYNC))
  248. goto out;
  249. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  250. wait_for_completion(&event->complete);
  251. else
  252. ret = wait_for_completion_interruptible(&event->complete);
  253. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  254. icnss_driver_event_to_str(type), type, priv->state, ret,
  255. event->ret);
  256. spin_lock_irqsave(&priv->event_lock, irq_flags);
  257. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  258. event->sync = false;
  259. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  260. ret = -EINTR;
  261. goto out;
  262. }
  263. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  264. ret = event->ret;
  265. kfree(event);
  266. out:
  267. icnss_pm_relax(priv);
  268. return ret;
  269. }
  270. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  271. enum icnss_soc_wake_event_type type,
  272. u32 flags, void *data)
  273. {
  274. struct icnss_soc_wake_event *event;
  275. unsigned long irq_flags;
  276. int gfp = GFP_KERNEL;
  277. int ret = 0;
  278. if (!priv)
  279. return -ENODEV;
  280. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  281. icnss_soc_wake_event_to_str(type),
  282. type, current->comm, flags, priv->state);
  283. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  284. icnss_pr_err("Invalid Event type: %d, can't post", type);
  285. return -EINVAL;
  286. }
  287. if (in_interrupt() || irqs_disabled())
  288. gfp = GFP_ATOMIC;
  289. event = kzalloc(sizeof(*event), gfp);
  290. if (!event)
  291. return -ENOMEM;
  292. icnss_pm_stay_awake(priv);
  293. event->type = type;
  294. event->data = data;
  295. init_completion(&event->complete);
  296. event->ret = ICNSS_EVENT_PENDING;
  297. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  298. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  299. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  300. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  301. priv->stats.soc_wake_events[type].posted++;
  302. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  303. if (!(flags & ICNSS_EVENT_SYNC))
  304. goto out;
  305. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  306. wait_for_completion(&event->complete);
  307. else
  308. ret = wait_for_completion_interruptible(&event->complete);
  309. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  310. icnss_soc_wake_event_to_str(type),
  311. type, priv->state, ret, event->ret);
  312. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  313. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  314. event->sync = false;
  315. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  316. ret = -EINTR;
  317. goto out;
  318. }
  319. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  320. ret = event->ret;
  321. kfree(event);
  322. out:
  323. icnss_pm_relax(priv);
  324. return ret;
  325. }
  326. bool icnss_is_fw_ready(void)
  327. {
  328. if (!penv)
  329. return false;
  330. else
  331. return test_bit(ICNSS_FW_READY, &penv->state);
  332. }
  333. EXPORT_SYMBOL(icnss_is_fw_ready);
  334. void icnss_block_shutdown(bool status)
  335. {
  336. if (!penv)
  337. return;
  338. if (status) {
  339. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  340. reinit_completion(&penv->unblock_shutdown);
  341. } else {
  342. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  343. complete(&penv->unblock_shutdown);
  344. }
  345. }
  346. EXPORT_SYMBOL(icnss_block_shutdown);
  347. bool icnss_is_fw_down(void)
  348. {
  349. struct icnss_priv *priv = icnss_get_plat_priv();
  350. if (!priv)
  351. return false;
  352. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  353. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  354. test_bit(ICNSS_REJUVENATE, &priv->state);
  355. }
  356. EXPORT_SYMBOL(icnss_is_fw_down);
  357. unsigned long icnss_get_device_config(void)
  358. {
  359. struct icnss_priv *priv = icnss_get_plat_priv();
  360. if (!priv)
  361. return 0;
  362. return priv->device_config;
  363. }
  364. EXPORT_SYMBOL(icnss_get_device_config);
  365. bool icnss_is_rejuvenate(void)
  366. {
  367. if (!penv)
  368. return false;
  369. else
  370. return test_bit(ICNSS_REJUVENATE, &penv->state);
  371. }
  372. EXPORT_SYMBOL(icnss_is_rejuvenate);
  373. bool icnss_is_pdr(void)
  374. {
  375. if (!penv)
  376. return false;
  377. else
  378. return test_bit(ICNSS_PDR, &penv->state);
  379. }
  380. EXPORT_SYMBOL(icnss_is_pdr);
  381. static int icnss_send_smp2p(struct icnss_priv *priv,
  382. enum icnss_smp2p_msg_id msg_id,
  383. enum smp2p_out_entry smp2p_entry)
  384. {
  385. unsigned int value = 0;
  386. int ret;
  387. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  388. return -EINVAL;
  389. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  390. if (msg_id == ICNSS_RESET_MSG) {
  391. priv->smp2p_info[smp2p_entry].seq = 0;
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. 0);
  396. if (ret)
  397. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  398. ret, icnss_smp2p_str[smp2p_entry]);
  399. return ret;
  400. }
  401. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  402. return -ENODEV;
  403. value |= priv->smp2p_info[smp2p_entry].seq++;
  404. value <<= ICNSS_SMEM_SEQ_NO_POS;
  405. value |= msg_id;
  406. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  407. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  408. reinit_completion(&penv->smp2p_soc_wake_wait);
  409. ret = qcom_smem_state_update_bits(
  410. priv->smp2p_info[smp2p_entry].smem_state,
  411. ICNSS_SMEM_VALUE_MASK,
  412. value);
  413. if (ret) {
  414. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  415. icnss_smp2p_str[smp2p_entry]);
  416. } else {
  417. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  418. msg_id == ICNSS_SOC_WAKE_REL) {
  419. if (!wait_for_completion_timeout(
  420. &priv->smp2p_soc_wake_wait,
  421. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  422. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  423. icnss_smp2p_str[smp2p_entry]);
  424. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  425. ICNSS_ASSERT(0);
  426. }
  427. }
  428. }
  429. return ret;
  430. }
  431. bool icnss_is_low_power(void)
  432. {
  433. if (!penv)
  434. return false;
  435. else
  436. return test_bit(ICNSS_LOW_POWER, &penv->state);
  437. }
  438. EXPORT_SYMBOL(icnss_is_low_power);
  439. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  440. {
  441. struct icnss_priv *priv = ctx;
  442. if (priv)
  443. priv->force_err_fatal = true;
  444. icnss_pr_err("Received force error fatal request from FW\n");
  445. return IRQ_HANDLED;
  446. }
  447. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  448. {
  449. struct icnss_priv *priv = ctx;
  450. struct icnss_uevent_fw_down_data fw_down_data = {0};
  451. icnss_pr_err("Received early crash indication from FW\n");
  452. if (priv) {
  453. if (priv->wpss_self_recovery_enabled)
  454. mod_timer(&priv->wpss_ssr_timer,
  455. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  456. set_bit(ICNSS_FW_DOWN, &priv->state);
  457. icnss_ignore_fw_timeout(true);
  458. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  459. clear_bit(ICNSS_FW_READY, &priv->state);
  460. fw_down_data.crashed = true;
  461. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  462. &fw_down_data);
  463. }
  464. }
  465. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  466. 0, NULL);
  467. return IRQ_HANDLED;
  468. }
  469. static void register_fw_error_notifications(struct device *dev)
  470. {
  471. struct icnss_priv *priv = dev_get_drvdata(dev);
  472. struct device_node *dev_node;
  473. int irq = 0, ret = 0;
  474. if (!priv)
  475. return;
  476. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  477. if (!dev_node) {
  478. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  479. return;
  480. }
  481. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  482. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  483. ret = irq = of_irq_get_byname(dev_node,
  484. "qcom,smp2p-force-fatal-error");
  485. if (ret < 0) {
  486. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  487. irq);
  488. return;
  489. }
  490. }
  491. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  492. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  493. "wlanfw-err", priv);
  494. if (ret < 0) {
  495. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  496. irq, ret);
  497. return;
  498. }
  499. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  500. priv->fw_error_fatal_irq = irq;
  501. }
  502. static void register_early_crash_notifications(struct device *dev)
  503. {
  504. struct icnss_priv *priv = dev_get_drvdata(dev);
  505. struct device_node *dev_node;
  506. int irq = 0, ret = 0;
  507. if (!priv)
  508. return;
  509. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  510. if (!dev_node) {
  511. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  512. return;
  513. }
  514. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  515. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  516. ret = irq = of_irq_get_byname(dev_node,
  517. "qcom,smp2p-early-crash-ind");
  518. if (ret < 0) {
  519. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  520. irq);
  521. return;
  522. }
  523. }
  524. ret = devm_request_threaded_irq(dev, irq, NULL,
  525. fw_crash_indication_handler,
  526. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  527. "wlanfw-early-crash-ind", priv);
  528. if (ret < 0) {
  529. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  530. irq, ret);
  531. return;
  532. }
  533. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  534. priv->fw_early_crash_irq = irq;
  535. }
  536. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  537. {
  538. struct thermal_zone_device *thermal_dev;
  539. const char *tsens;
  540. int ret;
  541. ret = of_property_read_string(priv->pdev->dev.of_node,
  542. "tsens",
  543. &tsens);
  544. if (ret)
  545. return ret;
  546. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  547. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  548. if (IS_ERR(thermal_dev)) {
  549. icnss_pr_err("Fail to get thermal zone. ret: %d",
  550. PTR_ERR(thermal_dev));
  551. return PTR_ERR(thermal_dev);
  552. }
  553. ret = thermal_zone_get_temp(thermal_dev, temp);
  554. if (ret)
  555. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  556. return ret;
  557. }
  558. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  559. {
  560. struct icnss_priv *priv = ctx;
  561. if (priv)
  562. complete(&priv->smp2p_soc_wake_wait);
  563. return IRQ_HANDLED;
  564. }
  565. static void register_soc_wake_notif(struct device *dev)
  566. {
  567. struct icnss_priv *priv = dev_get_drvdata(dev);
  568. struct device_node *dev_node;
  569. int irq = 0, ret = 0;
  570. if (!priv)
  571. return;
  572. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  573. if (!dev_node) {
  574. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  575. return;
  576. }
  577. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  578. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  579. ret = irq = of_irq_get_byname(dev_node,
  580. "qcom,smp2p-soc-wake-ack");
  581. if (ret < 0) {
  582. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  583. irq);
  584. return;
  585. }
  586. }
  587. ret = devm_request_threaded_irq(dev, irq, NULL,
  588. fw_soc_wake_ack_handler,
  589. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  590. IRQF_TRIGGER_FALLING,
  591. "wlanfw-soc-wake-ack", priv);
  592. if (ret < 0) {
  593. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  594. irq, ret);
  595. return;
  596. }
  597. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  598. priv->fw_soc_wake_ack_irq = irq;
  599. }
  600. int icnss_call_driver_uevent(struct icnss_priv *priv,
  601. enum icnss_uevent uevent, void *data)
  602. {
  603. struct icnss_uevent_data uevent_data;
  604. if (!priv->ops || !priv->ops->uevent)
  605. return 0;
  606. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  607. priv->state, uevent);
  608. uevent_data.uevent = uevent;
  609. uevent_data.data = data;
  610. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  611. }
  612. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  613. {
  614. int i;
  615. int ret = 0;
  616. ret = icnss_qmi_get_dms_mac(priv);
  617. if (ret == 0 && priv->dms.mac_valid)
  618. goto qmi_send;
  619. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  620. * Thus assert on failure to get MAC from DMS even after retries
  621. */
  622. if (priv->use_nv_mac) {
  623. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  624. if (priv->dms.mac_valid)
  625. break;
  626. ret = icnss_qmi_get_dms_mac(priv);
  627. if (ret != -EAGAIN)
  628. break;
  629. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  630. }
  631. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  632. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  633. ICNSS_ASSERT(0);
  634. return -EINVAL;
  635. }
  636. }
  637. qmi_send:
  638. if (priv->dms.mac_valid)
  639. ret =
  640. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  641. ARRAY_SIZE(priv->dms.mac));
  642. return ret;
  643. }
  644. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  645. enum smp2p_out_entry smp2p_entry)
  646. {
  647. int retry = 0;
  648. int error;
  649. if (priv->smp2p_info[smp2p_entry].smem_state)
  650. return;
  651. retry:
  652. priv->smp2p_info[smp2p_entry].smem_state =
  653. qcom_smem_state_get(&priv->pdev->dev,
  654. icnss_smp2p_str[smp2p_entry],
  655. &priv->smp2p_info[smp2p_entry].smem_bit);
  656. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  657. if (retry++ < SMP2P_GET_MAX_RETRY) {
  658. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  659. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  660. error, icnss_smp2p_str[smp2p_entry]);
  661. msleep(SMP2P_GET_RETRY_DELAY_MS);
  662. goto retry;
  663. }
  664. ICNSS_ASSERT(0);
  665. return;
  666. }
  667. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  668. }
  669. static inline
  670. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  671. {
  672. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  673. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  674. } else {
  675. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  676. }
  677. }
  678. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  679. {
  680. switch (val) {
  681. case WLAN_RF_SLATE:
  682. return WLFW_WLAN_RF_SLATE_V01;
  683. case WLAN_RF_APACHE:
  684. return WLFW_WLAN_RF_APACHE_V01;
  685. default:
  686. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  687. }
  688. }
  689. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  690. void *data)
  691. {
  692. int ret = 0;
  693. int temp = 0;
  694. bool ignore_assert = false;
  695. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  696. if (!priv)
  697. return -ENODEV;
  698. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  699. clear_bit(ICNSS_FW_DOWN, &priv->state);
  700. clear_bit(ICNSS_FW_READY, &priv->state);
  701. icnss_ignore_fw_timeout(false);
  702. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  703. icnss_pr_err("QMI Server already in Connected State\n");
  704. ICNSS_ASSERT(0);
  705. }
  706. ret = icnss_connect_to_fw_server(priv, data);
  707. if (ret)
  708. goto fail;
  709. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  710. if (priv->is_slate_rfa) {
  711. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  712. reinit_completion(&priv->slate_boot_complete);
  713. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  714. priv->state);
  715. wait_for_completion(&priv->slate_boot_complete);
  716. }
  717. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  718. icnss_pr_info("sent wlan boot init command\n");
  719. }
  720. ret = wlfw_ind_register_send_sync_msg(priv);
  721. if (ret < 0) {
  722. if (ret == -EALREADY) {
  723. ret = 0;
  724. goto qmi_registered;
  725. }
  726. ignore_assert = true;
  727. goto fail;
  728. }
  729. if (priv->is_rf_subtype_valid) {
  730. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  731. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  732. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  733. if (ret < 0)
  734. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  735. ret);
  736. } else {
  737. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  738. priv->rf_subtype);
  739. }
  740. }
  741. if (priv->device_id == WCN6750_DEVICE_ID) {
  742. if (!icnss_get_temperature(priv, &temp)) {
  743. icnss_pr_dbg("Temperature: %d\n", temp);
  744. if (temp < WLAN_EN_TEMP_THRESHOLD)
  745. icnss_set_wlan_en_delay(priv);
  746. }
  747. ret = wlfw_host_cap_send_sync(priv);
  748. if (ret < 0)
  749. goto fail;
  750. }
  751. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  752. if (!priv->msa_va) {
  753. icnss_pr_err("Invalid MSA address\n");
  754. ret = -EINVAL;
  755. goto fail;
  756. }
  757. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  758. if (ret < 0) {
  759. ignore_assert = true;
  760. goto fail;
  761. }
  762. ret = wlfw_msa_ready_send_sync_msg(priv);
  763. if (ret < 0) {
  764. ignore_assert = true;
  765. goto fail;
  766. }
  767. }
  768. ret = wlfw_cap_send_sync_msg(priv);
  769. if (ret < 0) {
  770. ignore_assert = true;
  771. goto fail;
  772. }
  773. ret = icnss_hw_power_on(priv);
  774. if (ret)
  775. goto fail;
  776. if (priv->device_id == WCN6750_DEVICE_ID) {
  777. ret = wlfw_device_info_send_msg(priv);
  778. if (ret < 0) {
  779. ignore_assert = true;
  780. goto device_info_failure;
  781. }
  782. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  783. priv->mem_base_pa,
  784. priv->mem_base_size);
  785. if (!priv->mem_base_va) {
  786. icnss_pr_err("Ioremap failed for bar address\n");
  787. goto device_info_failure;
  788. }
  789. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  790. &priv->mem_base_pa,
  791. priv->mem_base_va);
  792. if (priv->mhi_state_info_pa)
  793. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  794. priv->mhi_state_info_pa,
  795. PAGE_SIZE);
  796. if (!priv->mhi_state_info_va)
  797. icnss_pr_err("Ioremap failed for MHI info address\n");
  798. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  799. &priv->mhi_state_info_pa,
  800. priv->mhi_state_info_va);
  801. }
  802. if (priv->bdf_download_support) {
  803. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  804. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  805. priv->ctrl_params.bdf_type);
  806. if (ret < 0)
  807. goto device_info_failure;
  808. }
  809. if (priv->device_id == WCN6750_DEVICE_ID) {
  810. if (!priv->fw_soc_wake_ack_irq)
  811. register_soc_wake_notif(&priv->pdev->dev);
  812. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  813. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  814. }
  815. if (priv->wpss_supported)
  816. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  817. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  818. if (priv->bdf_download_support) {
  819. ret = wlfw_cal_report_req(priv);
  820. if (ret < 0)
  821. goto device_info_failure;
  822. }
  823. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  824. dynamic_feature_mask);
  825. }
  826. if (!priv->fw_error_fatal_irq)
  827. register_fw_error_notifications(&priv->pdev->dev);
  828. if (!priv->fw_early_crash_irq)
  829. register_early_crash_notifications(&priv->pdev->dev);
  830. if (priv->psf_supported)
  831. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  832. return ret;
  833. device_info_failure:
  834. icnss_hw_power_off(priv);
  835. fail:
  836. ICNSS_ASSERT(ignore_assert);
  837. qmi_registered:
  838. return ret;
  839. }
  840. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  841. {
  842. if (!priv)
  843. return -ENODEV;
  844. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  845. icnss_clear_server(priv);
  846. if (priv->psf_supported)
  847. priv->last_updated_voltage = 0;
  848. return 0;
  849. }
  850. static int icnss_call_driver_probe(struct icnss_priv *priv)
  851. {
  852. int ret = 0;
  853. int probe_cnt = 0;
  854. if (!priv->ops || !priv->ops->probe)
  855. return 0;
  856. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  857. return -EINVAL;
  858. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  859. icnss_hw_power_on(priv);
  860. icnss_block_shutdown(true);
  861. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  862. ret = priv->ops->probe(&priv->pdev->dev);
  863. probe_cnt++;
  864. if (ret != -EPROBE_DEFER)
  865. break;
  866. }
  867. if (ret < 0) {
  868. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  869. ret, priv->state, probe_cnt);
  870. icnss_block_shutdown(false);
  871. goto out;
  872. }
  873. icnss_block_shutdown(false);
  874. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  875. return 0;
  876. out:
  877. icnss_hw_power_off(priv);
  878. return ret;
  879. }
  880. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  881. {
  882. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  883. goto out;
  884. if (!priv->ops || !priv->ops->shutdown)
  885. goto out;
  886. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  887. goto out;
  888. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  889. priv->ops->shutdown(&priv->pdev->dev);
  890. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  891. out:
  892. return 0;
  893. }
  894. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  895. {
  896. int ret = 0;
  897. icnss_pm_relax(priv);
  898. icnss_call_driver_shutdown(priv);
  899. clear_bit(ICNSS_PDR, &priv->state);
  900. clear_bit(ICNSS_REJUVENATE, &priv->state);
  901. clear_bit(ICNSS_PD_RESTART, &priv->state);
  902. clear_bit(ICNSS_LOW_POWER, &priv->state);
  903. priv->early_crash_ind = false;
  904. priv->is_ssr = false;
  905. if (!priv->ops || !priv->ops->reinit)
  906. goto out;
  907. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  908. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  909. priv->state);
  910. goto out;
  911. }
  912. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  913. goto call_probe;
  914. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  915. icnss_hw_power_on(priv);
  916. icnss_block_shutdown(true);
  917. ret = priv->ops->reinit(&priv->pdev->dev);
  918. if (ret < 0) {
  919. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  920. ret, priv->state);
  921. if (!priv->allow_recursive_recovery)
  922. ICNSS_ASSERT(false);
  923. icnss_block_shutdown(false);
  924. goto out_power_off;
  925. }
  926. icnss_block_shutdown(false);
  927. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  928. return 0;
  929. call_probe:
  930. return icnss_call_driver_probe(priv);
  931. out_power_off:
  932. icnss_hw_power_off(priv);
  933. out:
  934. return ret;
  935. }
  936. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  937. {
  938. int ret = 0;
  939. if (!priv)
  940. return -ENODEV;
  941. del_timer(&priv->recovery_timer);
  942. set_bit(ICNSS_FW_READY, &priv->state);
  943. clear_bit(ICNSS_MODE_ON, &priv->state);
  944. atomic_set(&priv->soc_wake_ref_count, 0);
  945. if (priv->device_id == WCN6750_DEVICE_ID)
  946. icnss_free_qdss_mem(priv);
  947. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  948. icnss_hw_power_off(priv);
  949. if (!priv->pdev) {
  950. icnss_pr_err("Device is not ready\n");
  951. ret = -ENODEV;
  952. goto out;
  953. }
  954. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  955. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  956. icnss_pr_info("sent wlan boot complete command\n");
  957. }
  958. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  959. ret = icnss_pd_restart_complete(priv);
  960. } else {
  961. if (priv->wpss_supported)
  962. icnss_setup_dms_mac(priv);
  963. ret = icnss_call_driver_probe(priv);
  964. }
  965. icnss_vreg_unvote(priv);
  966. out:
  967. return ret;
  968. }
  969. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  970. {
  971. int ret = 0;
  972. if (!priv)
  973. return -ENODEV;
  974. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  975. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  976. icnss_pr_info("Failed to download qdss configuration file");
  977. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  978. mod_timer(&priv->recovery_timer,
  979. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  980. ret = wlfw_wlan_mode_send_sync_msg(priv,
  981. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  982. } else {
  983. icnss_driver_event_fw_ready_ind(priv, NULL);
  984. }
  985. return ret;
  986. }
  987. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  988. {
  989. struct platform_device *pdev = priv->pdev;
  990. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  991. int i, j;
  992. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  993. if (!qdss_mem[i].va && qdss_mem[i].size) {
  994. qdss_mem[i].va =
  995. dma_alloc_coherent(&pdev->dev,
  996. qdss_mem[i].size,
  997. &qdss_mem[i].pa,
  998. GFP_KERNEL);
  999. if (!qdss_mem[i].va) {
  1000. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1001. qdss_mem[i].size,
  1002. qdss_mem[i].type, i);
  1003. break;
  1004. }
  1005. }
  1006. }
  1007. /* Best-effort allocation for QDSS trace */
  1008. if (i < priv->qdss_mem_seg_len) {
  1009. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1010. qdss_mem[j].type = 0;
  1011. qdss_mem[j].size = 0;
  1012. }
  1013. priv->qdss_mem_seg_len = i;
  1014. }
  1015. return 0;
  1016. }
  1017. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1018. {
  1019. struct platform_device *pdev = priv->pdev;
  1020. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1021. int i;
  1022. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1023. if (qdss_mem[i].va && qdss_mem[i].size) {
  1024. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1025. &qdss_mem[i].pa, qdss_mem[i].size,
  1026. qdss_mem[i].type);
  1027. dma_free_coherent(&pdev->dev,
  1028. qdss_mem[i].size, qdss_mem[i].va,
  1029. qdss_mem[i].pa);
  1030. qdss_mem[i].va = NULL;
  1031. qdss_mem[i].pa = 0;
  1032. qdss_mem[i].size = 0;
  1033. qdss_mem[i].type = 0;
  1034. }
  1035. }
  1036. priv->qdss_mem_seg_len = 0;
  1037. }
  1038. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1039. {
  1040. int ret = 0;
  1041. ret = icnss_alloc_qdss_mem(priv);
  1042. if (ret < 0)
  1043. return ret;
  1044. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1045. }
  1046. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1047. u64 pa, u32 size, int *seg_id)
  1048. {
  1049. int i = 0;
  1050. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1051. u64 offset = 0;
  1052. void *va = NULL;
  1053. u64 local_pa;
  1054. u32 local_size;
  1055. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1056. local_pa = (u64)qdss_mem[i].pa;
  1057. local_size = (u32)qdss_mem[i].size;
  1058. if (pa == local_pa && size <= local_size) {
  1059. va = qdss_mem[i].va;
  1060. break;
  1061. }
  1062. if (pa > local_pa &&
  1063. pa < local_pa + local_size &&
  1064. pa + size <= local_pa + local_size) {
  1065. offset = pa - local_pa;
  1066. va = qdss_mem[i].va + offset;
  1067. break;
  1068. }
  1069. }
  1070. *seg_id = i;
  1071. return va;
  1072. }
  1073. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1074. void *data)
  1075. {
  1076. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1077. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1078. int ret = 0;
  1079. int i;
  1080. void *va = NULL;
  1081. u64 pa;
  1082. u32 size;
  1083. int seg_id = 0;
  1084. if (!priv->qdss_mem_seg_len) {
  1085. icnss_pr_err("Memory for QDSS trace is not available\n");
  1086. return -ENOMEM;
  1087. }
  1088. if (event_data->mem_seg_len == 0) {
  1089. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1090. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1091. ICNSS_GENL_MSG_TYPE_QDSS,
  1092. event_data->file_name,
  1093. qdss_mem[i].size);
  1094. if (ret < 0) {
  1095. icnss_pr_err("Fail to save QDSS data: %d\n",
  1096. ret);
  1097. break;
  1098. }
  1099. }
  1100. } else {
  1101. for (i = 0; i < event_data->mem_seg_len; i++) {
  1102. pa = event_data->mem_seg[i].addr;
  1103. size = event_data->mem_seg[i].size;
  1104. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1105. size, &seg_id);
  1106. if (!va) {
  1107. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1108. &pa);
  1109. ret = -EINVAL;
  1110. break;
  1111. }
  1112. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1113. event_data->file_name, size);
  1114. if (ret < 0) {
  1115. icnss_pr_err("Fail to save QDSS data: %d\n",
  1116. ret);
  1117. break;
  1118. }
  1119. }
  1120. }
  1121. kfree(data);
  1122. return ret;
  1123. }
  1124. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1125. {
  1126. int dec, c = atomic_read(v);
  1127. do {
  1128. dec = c - 1;
  1129. if (unlikely(dec < 1))
  1130. break;
  1131. } while (!atomic_try_cmpxchg(v, &c, dec));
  1132. return dec;
  1133. }
  1134. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1135. void *data)
  1136. {
  1137. int ret = 0;
  1138. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1139. if (!priv)
  1140. return -ENODEV;
  1141. if (!data)
  1142. return -EINVAL;
  1143. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1144. event_data->total_size);
  1145. kfree(data);
  1146. return ret;
  1147. }
  1148. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1149. {
  1150. int ret = 0;
  1151. if (!priv)
  1152. return -ENODEV;
  1153. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1154. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1155. atomic_read(&priv->soc_wake_ref_count));
  1156. return 0;
  1157. }
  1158. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1159. ICNSS_SMP2P_OUT_SOC_WAKE);
  1160. if (!ret)
  1161. atomic_inc(&priv->soc_wake_ref_count);
  1162. return ret;
  1163. }
  1164. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1165. {
  1166. int ret = 0;
  1167. if (!priv)
  1168. return -ENODEV;
  1169. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1170. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1171. priv->soc_wake_ref_count);
  1172. return 0;
  1173. }
  1174. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1175. ICNSS_SMP2P_OUT_SOC_WAKE);
  1176. return ret;
  1177. }
  1178. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1179. void *data)
  1180. {
  1181. int ret = 0;
  1182. int probe_cnt = 0;
  1183. if (priv->ops)
  1184. return -EEXIST;
  1185. priv->ops = data;
  1186. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1187. set_bit(ICNSS_FW_READY, &priv->state);
  1188. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1189. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1190. priv->state);
  1191. return -ENODEV;
  1192. }
  1193. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1194. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1195. priv->state);
  1196. goto out;
  1197. }
  1198. ret = icnss_hw_power_on(priv);
  1199. if (ret)
  1200. goto out;
  1201. icnss_block_shutdown(true);
  1202. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1203. ret = priv->ops->probe(&priv->pdev->dev);
  1204. probe_cnt++;
  1205. if (ret != -EPROBE_DEFER)
  1206. break;
  1207. }
  1208. if (ret) {
  1209. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1210. ret, priv->state, probe_cnt);
  1211. icnss_block_shutdown(false);
  1212. goto power_off;
  1213. }
  1214. icnss_block_shutdown(false);
  1215. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1216. return 0;
  1217. power_off:
  1218. icnss_hw_power_off(priv);
  1219. out:
  1220. return ret;
  1221. }
  1222. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1223. void *data)
  1224. {
  1225. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1226. priv->ops = NULL;
  1227. goto out;
  1228. }
  1229. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1230. icnss_block_shutdown(true);
  1231. if (priv->ops)
  1232. priv->ops->remove(&priv->pdev->dev);
  1233. icnss_block_shutdown(false);
  1234. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1235. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1236. priv->ops = NULL;
  1237. icnss_hw_power_off(priv);
  1238. out:
  1239. return 0;
  1240. }
  1241. static int icnss_fw_crashed(struct icnss_priv *priv,
  1242. struct icnss_event_pd_service_down_data *event_data)
  1243. {
  1244. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1245. set_bit(ICNSS_PD_RESTART, &priv->state);
  1246. clear_bit(ICNSS_FW_READY, &priv->state);
  1247. icnss_pm_stay_awake(priv);
  1248. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1249. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1250. if (event_data && event_data->fw_rejuvenate)
  1251. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1252. return 0;
  1253. }
  1254. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1255. struct icnss_uevent_hang_data *hang_data)
  1256. {
  1257. if (!priv->hang_event_data_va)
  1258. return -EINVAL;
  1259. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1260. priv->hang_event_data_len,
  1261. GFP_ATOMIC);
  1262. if (!priv->hang_event_data)
  1263. return -ENOMEM;
  1264. // Update the hang event params
  1265. hang_data->hang_event_data = priv->hang_event_data;
  1266. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1267. return 0;
  1268. }
  1269. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1270. {
  1271. struct icnss_uevent_hang_data hang_data = {0};
  1272. int ret = 0xFF;
  1273. if (priv->early_crash_ind) {
  1274. ret = icnss_update_hang_event_data(priv, &hang_data);
  1275. if (ret)
  1276. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1277. }
  1278. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1279. &hang_data);
  1280. if (!ret) {
  1281. kfree(priv->hang_event_data);
  1282. priv->hang_event_data = NULL;
  1283. }
  1284. return 0;
  1285. }
  1286. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1287. void *data)
  1288. {
  1289. struct icnss_event_pd_service_down_data *event_data = data;
  1290. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1291. icnss_ignore_fw_timeout(false);
  1292. goto out;
  1293. }
  1294. if (priv->force_err_fatal)
  1295. ICNSS_ASSERT(0);
  1296. if (priv->device_id == WCN6750_DEVICE_ID) {
  1297. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1298. ICNSS_SMP2P_OUT_SOC_WAKE);
  1299. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1300. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1301. }
  1302. if (priv->wpss_supported)
  1303. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1304. ICNSS_SMP2P_OUT_POWER_SAVE);
  1305. icnss_send_hang_event_data(priv);
  1306. if (priv->early_crash_ind) {
  1307. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1308. event_data->crashed, priv->state);
  1309. goto out;
  1310. }
  1311. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1312. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1313. event_data->crashed, priv->state);
  1314. if (!priv->allow_recursive_recovery)
  1315. ICNSS_ASSERT(0);
  1316. goto out;
  1317. }
  1318. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1319. icnss_fw_crashed(priv, event_data);
  1320. out:
  1321. kfree(data);
  1322. return 0;
  1323. }
  1324. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1325. void *data)
  1326. {
  1327. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1328. icnss_ignore_fw_timeout(false);
  1329. goto out;
  1330. }
  1331. priv->early_crash_ind = true;
  1332. icnss_fw_crashed(priv, NULL);
  1333. out:
  1334. kfree(data);
  1335. return 0;
  1336. }
  1337. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1338. void *data)
  1339. {
  1340. int ret = 0;
  1341. if (!priv->ops || !priv->ops->idle_shutdown)
  1342. return 0;
  1343. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1344. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1345. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1346. ret = -EBUSY;
  1347. } else {
  1348. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1349. priv->state);
  1350. icnss_block_shutdown(true);
  1351. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1352. icnss_block_shutdown(false);
  1353. }
  1354. return ret;
  1355. }
  1356. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1357. void *data)
  1358. {
  1359. int ret = 0;
  1360. if (!priv->ops || !priv->ops->idle_restart)
  1361. return 0;
  1362. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1363. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1364. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1365. ret = -EBUSY;
  1366. } else {
  1367. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1368. priv->state);
  1369. icnss_block_shutdown(true);
  1370. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1371. icnss_block_shutdown(false);
  1372. }
  1373. return ret;
  1374. }
  1375. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1376. {
  1377. icnss_free_qdss_mem(priv);
  1378. return 0;
  1379. }
  1380. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1381. void *data)
  1382. {
  1383. struct icnss_m3_upload_segments_req_data *event_data = data;
  1384. struct qcom_dump_segment segment;
  1385. int i, status = 0, ret = 0;
  1386. struct list_head head;
  1387. if (!dump_enabled()) {
  1388. icnss_pr_info("Dump collection is not enabled\n");
  1389. return ret;
  1390. }
  1391. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1392. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1393. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1394. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1395. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1396. return ret;
  1397. INIT_LIST_HEAD(&head);
  1398. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1399. memset(&segment, 0, sizeof(segment));
  1400. segment.va = devm_ioremap(&priv->pdev->dev,
  1401. event_data->m3_segment[i].addr,
  1402. event_data->m3_segment[i].size);
  1403. if (!segment.va) {
  1404. icnss_pr_err("Failed to ioremap M3 Dump region");
  1405. ret = -ENOMEM;
  1406. goto send_resp;
  1407. }
  1408. segment.size = event_data->m3_segment[i].size;
  1409. list_add(&segment.node, &head);
  1410. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1411. event_data->m3_segment[i].name);
  1412. switch (event_data->m3_segment[i].type) {
  1413. case QMI_M3_SEGMENT_PHYAREG_V01:
  1414. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1415. break;
  1416. case QMI_M3_SEGMENT_PHYDBG_V01:
  1417. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1418. break;
  1419. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1420. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1421. break;
  1422. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1423. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1424. break;
  1425. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1426. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1427. break;
  1428. default:
  1429. icnss_pr_err("Invalid Segment type: %d",
  1430. event_data->m3_segment[i].type);
  1431. }
  1432. if (ret) {
  1433. status = ret;
  1434. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1435. event_data->m3_segment[i].name, ret);
  1436. }
  1437. list_del(&segment.node);
  1438. }
  1439. send_resp:
  1440. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1441. status);
  1442. return ret;
  1443. }
  1444. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1445. {
  1446. int ret = 0;
  1447. struct icnss_subsys_restart_level_data *event_data = data;
  1448. if (!priv)
  1449. return -ENODEV;
  1450. if (!data)
  1451. return -EINVAL;
  1452. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1453. kfree(data);
  1454. return ret;
  1455. }
  1456. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1457. {
  1458. int ret;
  1459. struct icnss_priv *priv = icnss_get_plat_priv();
  1460. rproc_shutdown(priv->rproc);
  1461. ret = rproc_boot(priv->rproc);
  1462. if (ret) {
  1463. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1464. rproc_put(priv->rproc);
  1465. }
  1466. }
  1467. static void icnss_driver_event_work(struct work_struct *work)
  1468. {
  1469. struct icnss_priv *priv =
  1470. container_of(work, struct icnss_priv, event_work);
  1471. struct icnss_driver_event *event;
  1472. unsigned long flags;
  1473. int ret;
  1474. icnss_pm_stay_awake(priv);
  1475. spin_lock_irqsave(&priv->event_lock, flags);
  1476. while (!list_empty(&priv->event_list)) {
  1477. event = list_first_entry(&priv->event_list,
  1478. struct icnss_driver_event, list);
  1479. list_del(&event->list);
  1480. spin_unlock_irqrestore(&priv->event_lock, flags);
  1481. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1482. icnss_driver_event_to_str(event->type),
  1483. event->sync ? "-sync" : "", event->type,
  1484. priv->state);
  1485. switch (event->type) {
  1486. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1487. ret = icnss_driver_event_server_arrive(priv,
  1488. event->data);
  1489. break;
  1490. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1491. ret = icnss_driver_event_server_exit(priv);
  1492. break;
  1493. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1494. ret = icnss_driver_event_fw_ready_ind(priv,
  1495. event->data);
  1496. break;
  1497. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1498. ret = icnss_driver_event_register_driver(priv,
  1499. event->data);
  1500. break;
  1501. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1502. ret = icnss_driver_event_unregister_driver(priv,
  1503. event->data);
  1504. break;
  1505. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1506. ret = icnss_driver_event_pd_service_down(priv,
  1507. event->data);
  1508. break;
  1509. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1510. ret = icnss_driver_event_early_crash_ind(priv,
  1511. event->data);
  1512. break;
  1513. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1514. ret = icnss_driver_event_idle_shutdown(priv,
  1515. event->data);
  1516. break;
  1517. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1518. ret = icnss_driver_event_idle_restart(priv,
  1519. event->data);
  1520. break;
  1521. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1522. ret = icnss_driver_event_fw_init_done(priv,
  1523. event->data);
  1524. break;
  1525. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1526. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1527. break;
  1528. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1529. ret = icnss_qdss_trace_save_hdlr(priv,
  1530. event->data);
  1531. break;
  1532. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1533. ret = icnss_qdss_trace_free_hdlr(priv);
  1534. break;
  1535. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1536. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1537. break;
  1538. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1539. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1540. event->data);
  1541. break;
  1542. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1543. ret = icnss_subsys_restart_level(priv, event->data);
  1544. break;
  1545. default:
  1546. icnss_pr_err("Invalid Event type: %d", event->type);
  1547. kfree(event);
  1548. continue;
  1549. }
  1550. priv->stats.events[event->type].processed++;
  1551. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1552. icnss_driver_event_to_str(event->type),
  1553. event->sync ? "-sync" : "", event->type, ret,
  1554. priv->state);
  1555. spin_lock_irqsave(&priv->event_lock, flags);
  1556. if (event->sync) {
  1557. event->ret = ret;
  1558. complete(&event->complete);
  1559. continue;
  1560. }
  1561. spin_unlock_irqrestore(&priv->event_lock, flags);
  1562. kfree(event);
  1563. spin_lock_irqsave(&priv->event_lock, flags);
  1564. }
  1565. spin_unlock_irqrestore(&priv->event_lock, flags);
  1566. icnss_pm_relax(priv);
  1567. }
  1568. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1569. {
  1570. struct icnss_priv *priv =
  1571. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1572. struct icnss_soc_wake_event *event;
  1573. unsigned long flags;
  1574. int ret;
  1575. icnss_pm_stay_awake(priv);
  1576. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1577. while (!list_empty(&priv->soc_wake_msg_list)) {
  1578. event = list_first_entry(&priv->soc_wake_msg_list,
  1579. struct icnss_soc_wake_event, list);
  1580. list_del(&event->list);
  1581. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1582. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1583. icnss_soc_wake_event_to_str(event->type),
  1584. event->sync ? "-sync" : "", event->type,
  1585. priv->state);
  1586. switch (event->type) {
  1587. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1588. ret = icnss_event_soc_wake_request(priv,
  1589. event->data);
  1590. break;
  1591. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1592. ret = icnss_event_soc_wake_release(priv,
  1593. event->data);
  1594. break;
  1595. default:
  1596. icnss_pr_err("Invalid Event type: %d", event->type);
  1597. kfree(event);
  1598. continue;
  1599. }
  1600. priv->stats.soc_wake_events[event->type].processed++;
  1601. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1602. icnss_soc_wake_event_to_str(event->type),
  1603. event->sync ? "-sync" : "", event->type, ret,
  1604. priv->state);
  1605. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1606. if (event->sync) {
  1607. event->ret = ret;
  1608. complete(&event->complete);
  1609. continue;
  1610. }
  1611. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1612. kfree(event);
  1613. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1614. }
  1615. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1616. icnss_pm_relax(priv);
  1617. }
  1618. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1619. {
  1620. int ret = 0;
  1621. struct qcom_dump_segment segment;
  1622. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1623. struct list_head head;
  1624. if (!dump_enabled()) {
  1625. icnss_pr_info("Dump collection is not enabled\n");
  1626. return ret;
  1627. }
  1628. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1629. return ret;
  1630. INIT_LIST_HEAD(&head);
  1631. memset(&segment, 0, sizeof(segment));
  1632. segment.va = priv->msa_va;
  1633. segment.size = priv->msa_mem_size;
  1634. list_add(&segment.node, &head);
  1635. if (!msa0_dump_dev->dev) {
  1636. icnss_pr_err("Created Dump Device not found\n");
  1637. return 0;
  1638. }
  1639. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1640. if (ret) {
  1641. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1642. return ret;
  1643. }
  1644. list_del(&segment.node);
  1645. return ret;
  1646. }
  1647. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1648. void *data)
  1649. {
  1650. struct qcom_ssr_notify_data *notif = data;
  1651. int ret = 0;
  1652. if (!notif->crashed) {
  1653. if (atomic_read(&priv->is_shutdown)) {
  1654. atomic_set(&priv->is_shutdown, false);
  1655. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1656. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1657. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1658. clear_bit(ICNSS_FW_READY, &priv->state);
  1659. icnss_driver_event_post(priv,
  1660. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1661. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1662. NULL);
  1663. }
  1664. }
  1665. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1666. if (!wait_for_completion_timeout(
  1667. &priv->unblock_shutdown,
  1668. msecs_to_jiffies(PROBE_TIMEOUT)))
  1669. icnss_pr_err("modem block shutdown timeout\n");
  1670. }
  1671. ret = wlfw_send_modem_shutdown_msg(priv);
  1672. if (ret < 0)
  1673. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1674. ret);
  1675. }
  1676. }
  1677. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1678. {
  1679. switch (code) {
  1680. case QCOM_SSR_BEFORE_POWERUP:
  1681. return "BEFORE_POWERUP";
  1682. case QCOM_SSR_AFTER_POWERUP:
  1683. return "AFTER_POWERUP";
  1684. case QCOM_SSR_BEFORE_SHUTDOWN:
  1685. return "BEFORE_SHUTDOWN";
  1686. case QCOM_SSR_AFTER_SHUTDOWN:
  1687. return "AFTER_SHUTDOWN";
  1688. default:
  1689. return "UNKNOWN";
  1690. }
  1691. };
  1692. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1693. unsigned long code,
  1694. void *data)
  1695. {
  1696. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1697. wpss_early_ssr_nb);
  1698. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1699. icnss_qcom_ssr_notify_state_to_str(code), code);
  1700. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1701. set_bit(ICNSS_FW_DOWN, &priv->state);
  1702. icnss_ignore_fw_timeout(true);
  1703. }
  1704. return NOTIFY_DONE;
  1705. }
  1706. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1707. unsigned long code,
  1708. void *data)
  1709. {
  1710. struct icnss_event_pd_service_down_data *event_data;
  1711. struct qcom_ssr_notify_data *notif = data;
  1712. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1713. wpss_ssr_nb);
  1714. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1715. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1716. icnss_qcom_ssr_notify_state_to_str(code), code);
  1717. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1718. icnss_pr_info("Collecting msa0 segment dump\n");
  1719. icnss_msa0_ramdump(priv);
  1720. goto out;
  1721. }
  1722. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1723. goto out;
  1724. if (priv->wpss_self_recovery_enabled)
  1725. del_timer(&priv->wpss_ssr_timer);
  1726. priv->is_ssr = true;
  1727. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1728. priv->state, notif->crashed);
  1729. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1730. icnss_update_state_send_modem_shutdown(priv, data);
  1731. set_bit(ICNSS_FW_DOWN, &priv->state);
  1732. icnss_ignore_fw_timeout(true);
  1733. if (notif->crashed)
  1734. priv->stats.recovery.root_pd_crash++;
  1735. else
  1736. priv->stats.recovery.root_pd_shutdown++;
  1737. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1738. if (event_data == NULL)
  1739. return notifier_from_errno(-ENOMEM);
  1740. event_data->crashed = notif->crashed;
  1741. fw_down_data.crashed = !!notif->crashed;
  1742. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1743. clear_bit(ICNSS_FW_READY, &priv->state);
  1744. fw_down_data.crashed = !!notif->crashed;
  1745. icnss_call_driver_uevent(priv,
  1746. ICNSS_UEVENT_FW_DOWN,
  1747. &fw_down_data);
  1748. }
  1749. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1750. ICNSS_EVENT_SYNC, event_data);
  1751. if (notif->crashed)
  1752. mod_timer(&priv->recovery_timer,
  1753. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1754. out:
  1755. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1756. return NOTIFY_OK;
  1757. }
  1758. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1759. unsigned long code,
  1760. void *data)
  1761. {
  1762. struct icnss_event_pd_service_down_data *event_data;
  1763. struct qcom_ssr_notify_data *notif = data;
  1764. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1765. modem_ssr_nb);
  1766. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1767. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1768. icnss_qcom_ssr_notify_state_to_str(code), code);
  1769. switch (code) {
  1770. case QCOM_SSR_BEFORE_SHUTDOWN:
  1771. if (!notif->crashed &&
  1772. priv->low_power_support) { /* Hibernate */
  1773. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1774. icnss_driver_event_post(
  1775. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1776. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1777. set_bit(ICNSS_LOW_POWER, &priv->state);
  1778. }
  1779. break;
  1780. case QCOM_SSR_AFTER_SHUTDOWN:
  1781. /* Collect ramdump only when there was a crash. */
  1782. if (notif->crashed) {
  1783. icnss_pr_info("Collecting msa0 segment dump\n");
  1784. icnss_msa0_ramdump(priv);
  1785. }
  1786. goto out;
  1787. default:
  1788. goto out;
  1789. }
  1790. priv->is_ssr = true;
  1791. if (notif->crashed) {
  1792. priv->stats.recovery.root_pd_crash++;
  1793. priv->root_pd_shutdown = false;
  1794. } else {
  1795. priv->stats.recovery.root_pd_shutdown++;
  1796. priv->root_pd_shutdown = true;
  1797. }
  1798. icnss_update_state_send_modem_shutdown(priv, data);
  1799. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1800. set_bit(ICNSS_FW_DOWN, &priv->state);
  1801. icnss_ignore_fw_timeout(true);
  1802. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1803. clear_bit(ICNSS_FW_READY, &priv->state);
  1804. fw_down_data.crashed = !!notif->crashed;
  1805. icnss_call_driver_uevent(priv,
  1806. ICNSS_UEVENT_FW_DOWN,
  1807. &fw_down_data);
  1808. }
  1809. goto out;
  1810. }
  1811. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1812. priv->state, notif->crashed);
  1813. set_bit(ICNSS_FW_DOWN, &priv->state);
  1814. icnss_ignore_fw_timeout(true);
  1815. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1816. if (event_data == NULL)
  1817. return notifier_from_errno(-ENOMEM);
  1818. event_data->crashed = notif->crashed;
  1819. fw_down_data.crashed = !!notif->crashed;
  1820. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1821. clear_bit(ICNSS_FW_READY, &priv->state);
  1822. fw_down_data.crashed = !!notif->crashed;
  1823. icnss_call_driver_uevent(priv,
  1824. ICNSS_UEVENT_FW_DOWN,
  1825. &fw_down_data);
  1826. }
  1827. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1828. ICNSS_EVENT_SYNC, event_data);
  1829. if (notif->crashed)
  1830. mod_timer(&priv->recovery_timer,
  1831. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1832. out:
  1833. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1834. return NOTIFY_OK;
  1835. }
  1836. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1837. {
  1838. int ret = 0;
  1839. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1840. priv->wpss_early_notify_handler =
  1841. qcom_register_early_ssr_notifier("wpss",
  1842. &priv->wpss_early_ssr_nb);
  1843. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1844. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1845. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1846. }
  1847. return ret;
  1848. }
  1849. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1850. {
  1851. int ret = 0;
  1852. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1853. /*
  1854. * Assign priority of icnss wpss notifier callback over IPA
  1855. * modem notifier callback which is 0
  1856. */
  1857. priv->wpss_ssr_nb.priority = 1;
  1858. priv->wpss_notify_handler =
  1859. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1860. if (IS_ERR(priv->wpss_notify_handler)) {
  1861. ret = PTR_ERR(priv->wpss_notify_handler);
  1862. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1863. }
  1864. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1865. return ret;
  1866. }
  1867. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1868. unsigned long code,
  1869. void *data)
  1870. {
  1871. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1872. slate_ssr_nb);
  1873. int ret = 0;
  1874. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1875. if (code == QCOM_SSR_AFTER_POWERUP) {
  1876. set_bit(ICNSS_SLATE_UP, &priv->state);
  1877. complete(&priv->slate_boot_complete);
  1878. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1879. priv->state);
  1880. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1881. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1882. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1883. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1884. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1885. priv->state);
  1886. goto skip_pdr;
  1887. }
  1888. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1889. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1890. if (ret < 0) {
  1891. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1892. ret, priv->state);
  1893. goto skip_pdr;
  1894. }
  1895. }
  1896. skip_pdr:
  1897. return NOTIFY_OK;
  1898. }
  1899. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1900. {
  1901. int ret = 0;
  1902. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1903. priv->slate_notify_handler =
  1904. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1905. if (IS_ERR(priv->slate_notify_handler)) {
  1906. ret = PTR_ERR(priv->slate_notify_handler);
  1907. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1908. }
  1909. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1910. return ret;
  1911. }
  1912. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1913. {
  1914. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1915. return 0;
  1916. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1917. &priv->slate_ssr_nb);
  1918. priv->slate_notify_handler = NULL;
  1919. return 0;
  1920. }
  1921. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1922. {
  1923. int ret = 0;
  1924. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1925. /*
  1926. * Assign priority of icnss modem notifier callback over IPA
  1927. * modem notifier callback which is 0
  1928. */
  1929. priv->modem_ssr_nb.priority = 1;
  1930. priv->modem_notify_handler =
  1931. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1932. if (IS_ERR(priv->modem_notify_handler)) {
  1933. ret = PTR_ERR(priv->modem_notify_handler);
  1934. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1935. }
  1936. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1937. return ret;
  1938. }
  1939. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1940. {
  1941. if (IS_ERR(priv->wpss_early_notify_handler))
  1942. return;
  1943. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1944. &priv->wpss_early_ssr_nb);
  1945. priv->wpss_early_notify_handler = NULL;
  1946. }
  1947. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1948. {
  1949. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1950. return 0;
  1951. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1952. &priv->wpss_ssr_nb);
  1953. priv->wpss_notify_handler = NULL;
  1954. return 0;
  1955. }
  1956. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1957. {
  1958. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1959. return 0;
  1960. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1961. &priv->modem_ssr_nb);
  1962. priv->modem_notify_handler = NULL;
  1963. return 0;
  1964. }
  1965. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1966. {
  1967. struct icnss_priv *priv = priv_cb;
  1968. struct icnss_event_pd_service_down_data *event_data;
  1969. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1970. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1971. if (!priv)
  1972. return;
  1973. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1974. state, priv->state);
  1975. switch (state) {
  1976. case SERVREG_SERVICE_STATE_DOWN:
  1977. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1978. if (!event_data)
  1979. return;
  1980. event_data->crashed = true;
  1981. if (!priv->is_ssr) {
  1982. set_bit(ICNSS_PDR, &penv->state);
  1983. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1984. cause = ICNSS_HOST_ERROR;
  1985. priv->stats.recovery.pdr_host_error++;
  1986. } else {
  1987. cause = ICNSS_FW_CRASH;
  1988. priv->stats.recovery.pdr_fw_crash++;
  1989. }
  1990. } else if (priv->root_pd_shutdown) {
  1991. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1992. event_data->crashed = false;
  1993. }
  1994. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1995. priv->state, icnss_pdr_cause[cause]);
  1996. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1997. set_bit(ICNSS_FW_DOWN, &priv->state);
  1998. icnss_ignore_fw_timeout(true);
  1999. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2000. clear_bit(ICNSS_FW_READY, &priv->state);
  2001. fw_down_data.crashed = event_data->crashed;
  2002. icnss_call_driver_uevent(priv,
  2003. ICNSS_UEVENT_FW_DOWN,
  2004. &fw_down_data);
  2005. }
  2006. }
  2007. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2008. if (event_data->crashed)
  2009. mod_timer(&priv->recovery_timer,
  2010. jiffies +
  2011. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2012. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2013. ICNSS_EVENT_SYNC, event_data);
  2014. break;
  2015. case SERVREG_SERVICE_STATE_UP:
  2016. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2017. break;
  2018. default:
  2019. break;
  2020. }
  2021. return;
  2022. }
  2023. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2024. {
  2025. struct pdr_handle *handle = NULL;
  2026. struct pdr_service *service = NULL;
  2027. int err = 0;
  2028. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2029. if (IS_ERR_OR_NULL(handle)) {
  2030. err = PTR_ERR(handle);
  2031. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2032. goto out;
  2033. }
  2034. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2035. if (IS_ERR_OR_NULL(service)) {
  2036. err = PTR_ERR(service);
  2037. icnss_pr_err("Failed to add lookup, err %d", err);
  2038. goto out;
  2039. }
  2040. priv->pdr_handle = handle;
  2041. priv->pdr_service = service;
  2042. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2043. icnss_pr_info("PDR registration happened");
  2044. out:
  2045. return err;
  2046. }
  2047. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2048. {
  2049. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2050. return;
  2051. pdr_handle_release(priv->pdr_handle);
  2052. }
  2053. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2054. {
  2055. int ret = 0;
  2056. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2057. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2058. ret = PTR_ERR(priv->icnss_ramdump_class);
  2059. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2060. return ret;
  2061. }
  2062. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2063. ICNSS_RAMDUMP_NAME);
  2064. if (ret < 0) {
  2065. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2066. goto fail_alloc_major;
  2067. }
  2068. return 0;
  2069. fail_alloc_major:
  2070. class_destroy(priv->icnss_ramdump_class);
  2071. return ret;
  2072. }
  2073. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2074. {
  2075. int ret = 0;
  2076. struct icnss_ramdump_info *ramdump_info;
  2077. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2078. if (!ramdump_info)
  2079. return ERR_PTR(-ENOMEM);
  2080. if (!dev_name) {
  2081. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2082. return NULL;
  2083. }
  2084. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2085. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2086. if (ramdump_info->minor < 0) {
  2087. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2088. ramdump_info->minor);
  2089. ret = -ENODEV;
  2090. goto fail_out_of_minors;
  2091. }
  2092. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2093. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2094. ramdump_info->minor),
  2095. ramdump_info, ramdump_info->name);
  2096. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2097. ret = PTR_ERR(ramdump_info->dev);
  2098. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2099. ramdump_info->name, ret);
  2100. goto fail_device_create;
  2101. }
  2102. return (void *)ramdump_info;
  2103. fail_device_create:
  2104. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2105. fail_out_of_minors:
  2106. kfree(ramdump_info);
  2107. return ERR_PTR(ret);
  2108. }
  2109. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2110. {
  2111. int ret = 0;
  2112. if (!priv || !priv->pdev) {
  2113. icnss_pr_err("Platform priv or pdev is NULL\n");
  2114. return -EINVAL;
  2115. }
  2116. ret = icnss_ramdump_devnode_init(priv);
  2117. if (ret)
  2118. return ret;
  2119. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2120. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2121. icnss_pr_err("Failed to create msa0 dump device!");
  2122. return -ENOMEM;
  2123. }
  2124. if (priv->device_id == WCN6750_DEVICE_ID) {
  2125. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2126. ICNSS_M3_SEGMENT(
  2127. ICNSS_M3_SEGMENT_PHYAREG));
  2128. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2129. !priv->m3_dump_phyareg->dev) {
  2130. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2131. return -ENOMEM;
  2132. }
  2133. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2134. ICNSS_M3_SEGMENT(
  2135. ICNSS_M3_SEGMENT_PHYA));
  2136. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2137. !priv->m3_dump_phydbg->dev) {
  2138. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2139. return -ENOMEM;
  2140. }
  2141. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2142. ICNSS_M3_SEGMENT(
  2143. ICNSS_M3_SEGMENT_WMACREG));
  2144. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2145. !priv->m3_dump_wmac0reg->dev) {
  2146. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2147. return -ENOMEM;
  2148. }
  2149. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2150. ICNSS_M3_SEGMENT(
  2151. ICNSS_M3_SEGMENT_WCSSDBG));
  2152. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2153. !priv->m3_dump_wcssdbg->dev) {
  2154. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2155. return -ENOMEM;
  2156. }
  2157. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2158. ICNSS_M3_SEGMENT(
  2159. ICNSS_M3_SEGMENT_PHYAM3));
  2160. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2161. !priv->m3_dump_phyapdmem->dev) {
  2162. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2163. return -ENOMEM;
  2164. }
  2165. }
  2166. return 0;
  2167. }
  2168. static int icnss_enable_recovery(struct icnss_priv *priv)
  2169. {
  2170. int ret;
  2171. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2172. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2173. return 0;
  2174. }
  2175. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2176. icnss_pr_dbg("SSR disabled through module parameter\n");
  2177. goto enable_pdr;
  2178. }
  2179. ret = icnss_register_ramdump_devices(priv);
  2180. if (ret)
  2181. return ret;
  2182. if (priv->wpss_supported) {
  2183. icnss_wpss_early_ssr_register_notifier(priv);
  2184. icnss_wpss_ssr_register_notifier(priv);
  2185. return 0;
  2186. }
  2187. icnss_modem_ssr_register_notifier(priv);
  2188. if (priv->is_slate_rfa)
  2189. icnss_slate_ssr_register_notifier(priv);
  2190. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2191. icnss_pr_dbg("PDR disabled through module parameter\n");
  2192. return 0;
  2193. }
  2194. enable_pdr:
  2195. ret = icnss_pd_restart_enable(priv);
  2196. if (ret)
  2197. return ret;
  2198. return 0;
  2199. }
  2200. static int icnss_dev_id_match(struct icnss_priv *priv,
  2201. struct device_info *dev_info)
  2202. {
  2203. while (dev_info->device_id) {
  2204. if (priv->device_id == dev_info->device_id)
  2205. return 1;
  2206. dev_info++;
  2207. }
  2208. return 0;
  2209. }
  2210. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2211. unsigned long *thermal_state)
  2212. {
  2213. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2214. *thermal_state = icnss_tcdev->max_thermal_state;
  2215. return 0;
  2216. }
  2217. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2218. unsigned long *thermal_state)
  2219. {
  2220. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2221. *thermal_state = icnss_tcdev->curr_thermal_state;
  2222. return 0;
  2223. }
  2224. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2225. unsigned long thermal_state)
  2226. {
  2227. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2228. struct device *dev = &penv->pdev->dev;
  2229. int ret = 0;
  2230. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2231. return 0;
  2232. if (thermal_state > icnss_tcdev->max_thermal_state)
  2233. return -EINVAL;
  2234. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2235. thermal_state, icnss_tcdev->tcdev_id);
  2236. mutex_lock(&penv->tcdev_lock);
  2237. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2238. icnss_tcdev->tcdev_id);
  2239. if (!ret)
  2240. icnss_tcdev->curr_thermal_state = thermal_state;
  2241. mutex_unlock(&penv->tcdev_lock);
  2242. if (ret) {
  2243. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2244. ret, icnss_tcdev->tcdev_id);
  2245. return ret;
  2246. }
  2247. return 0;
  2248. }
  2249. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2250. .get_max_state = icnss_tcdev_get_max_state,
  2251. .get_cur_state = icnss_tcdev_get_cur_state,
  2252. .set_cur_state = icnss_tcdev_set_cur_state,
  2253. };
  2254. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2255. int tcdev_id)
  2256. {
  2257. struct icnss_priv *priv = dev_get_drvdata(dev);
  2258. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2259. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2260. struct device_node *dev_node;
  2261. int ret = 0;
  2262. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2263. if (!icnss_tcdev)
  2264. return -ENOMEM;
  2265. icnss_tcdev->tcdev_id = tcdev_id;
  2266. icnss_tcdev->max_thermal_state = max_state;
  2267. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2268. "qcom,icnss_cdev%d", tcdev_id);
  2269. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2270. if (!dev_node) {
  2271. icnss_pr_err("Failed to get cooling device node\n");
  2272. return -EINVAL;
  2273. }
  2274. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2275. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2276. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2277. dev_node,
  2278. cdev_node_name, icnss_tcdev,
  2279. &icnss_cooling_ops);
  2280. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2281. ret = PTR_ERR(icnss_tcdev->tcdev);
  2282. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2283. ret, icnss_tcdev->tcdev_id);
  2284. } else {
  2285. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2286. icnss_tcdev->tcdev_id);
  2287. list_add(&icnss_tcdev->tcdev_list,
  2288. &priv->icnss_tcdev_list);
  2289. }
  2290. } else {
  2291. icnss_pr_dbg("Cooling device registration not supported");
  2292. ret = -EOPNOTSUPP;
  2293. }
  2294. return ret;
  2295. }
  2296. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2297. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2298. {
  2299. struct icnss_priv *priv = dev_get_drvdata(dev);
  2300. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2301. while (!list_empty(&priv->icnss_tcdev_list)) {
  2302. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2303. struct icnss_thermal_cdev,
  2304. tcdev_list);
  2305. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2306. list_del(&icnss_tcdev->tcdev_list);
  2307. kfree(icnss_tcdev);
  2308. }
  2309. }
  2310. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2311. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2312. unsigned long *thermal_state,
  2313. int tcdev_id)
  2314. {
  2315. struct icnss_priv *priv = dev_get_drvdata(dev);
  2316. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2317. mutex_lock(&priv->tcdev_lock);
  2318. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2319. if (icnss_tcdev->tcdev_id != tcdev_id)
  2320. continue;
  2321. *thermal_state = icnss_tcdev->curr_thermal_state;
  2322. mutex_unlock(&priv->tcdev_lock);
  2323. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2324. icnss_tcdev->curr_thermal_state, tcdev_id);
  2325. return 0;
  2326. }
  2327. mutex_unlock(&priv->tcdev_lock);
  2328. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2329. return -EINVAL;
  2330. }
  2331. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2332. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2333. int cmd_len, void *cb_ctx,
  2334. int (*cb)(void *ctx, void *event, int event_len))
  2335. {
  2336. struct icnss_priv *priv = icnss_get_plat_priv();
  2337. int ret;
  2338. if (!priv)
  2339. return -ENODEV;
  2340. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2341. return -EINVAL;
  2342. priv->get_info_cb = cb;
  2343. priv->get_info_cb_ctx = cb_ctx;
  2344. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2345. if (ret) {
  2346. priv->get_info_cb = NULL;
  2347. priv->get_info_cb_ctx = NULL;
  2348. }
  2349. return ret;
  2350. }
  2351. EXPORT_SYMBOL(icnss_qmi_send);
  2352. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2353. struct module *owner, const char *mod_name)
  2354. {
  2355. int ret = 0;
  2356. struct icnss_priv *priv = icnss_get_plat_priv();
  2357. if (!priv || !priv->pdev) {
  2358. ret = -ENODEV;
  2359. goto out;
  2360. }
  2361. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2362. if (priv->ops) {
  2363. icnss_pr_err("Driver already registered\n");
  2364. ret = -EEXIST;
  2365. goto out;
  2366. }
  2367. if (!ops->dev_info) {
  2368. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2369. return -EINVAL;
  2370. }
  2371. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2372. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2373. ops->dev_info->name);
  2374. return -ENODEV;
  2375. }
  2376. if (!ops->probe || !ops->remove) {
  2377. ret = -EINVAL;
  2378. goto out;
  2379. }
  2380. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2381. 0, ops);
  2382. if (ret == -EINTR)
  2383. ret = 0;
  2384. out:
  2385. return ret;
  2386. }
  2387. EXPORT_SYMBOL(__icnss_register_driver);
  2388. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2389. {
  2390. int ret;
  2391. struct icnss_priv *priv = icnss_get_plat_priv();
  2392. if (!priv || !priv->pdev) {
  2393. ret = -ENODEV;
  2394. goto out;
  2395. }
  2396. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2397. if (!priv->ops) {
  2398. icnss_pr_err("Driver not registered\n");
  2399. ret = -ENOENT;
  2400. goto out;
  2401. }
  2402. ret = icnss_driver_event_post(priv,
  2403. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2404. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2405. out:
  2406. return ret;
  2407. }
  2408. EXPORT_SYMBOL(icnss_unregister_driver);
  2409. static struct icnss_msi_config msi_config = {
  2410. .total_vectors = 28,
  2411. .total_users = 2,
  2412. .users = (struct icnss_msi_user[]) {
  2413. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2414. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2415. },
  2416. };
  2417. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2418. {
  2419. priv->msi_config = &msi_config;
  2420. return 0;
  2421. }
  2422. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2423. int *num_vectors, u32 *user_base_data,
  2424. u32 *base_vector)
  2425. {
  2426. struct icnss_priv *priv = dev_get_drvdata(dev);
  2427. struct icnss_msi_config *msi_config;
  2428. int idx;
  2429. if (!priv)
  2430. return -ENODEV;
  2431. msi_config = priv->msi_config;
  2432. if (!msi_config) {
  2433. icnss_pr_err("MSI is not supported.\n");
  2434. return -EINVAL;
  2435. }
  2436. for (idx = 0; idx < msi_config->total_users; idx++) {
  2437. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2438. *num_vectors = msi_config->users[idx].num_vectors;
  2439. *user_base_data = msi_config->users[idx].base_vector
  2440. + priv->msi_base_data;
  2441. *base_vector = msi_config->users[idx].base_vector;
  2442. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2443. user_name, *num_vectors, *user_base_data,
  2444. *base_vector);
  2445. return 0;
  2446. }
  2447. }
  2448. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2449. return -EINVAL;
  2450. }
  2451. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2452. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2453. {
  2454. struct icnss_priv *priv = dev_get_drvdata(dev);
  2455. int irq_num;
  2456. irq_num = priv->srng_irqs[vector];
  2457. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2458. irq_num, vector);
  2459. return irq_num;
  2460. }
  2461. EXPORT_SYMBOL(icnss_get_msi_irq);
  2462. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2463. u32 *msi_addr_high)
  2464. {
  2465. struct icnss_priv *priv = dev_get_drvdata(dev);
  2466. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2467. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2468. }
  2469. EXPORT_SYMBOL(icnss_get_msi_address);
  2470. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2471. irqreturn_t (*handler)(int, void *),
  2472. unsigned long flags, const char *name, void *ctx)
  2473. {
  2474. int ret = 0;
  2475. unsigned int irq;
  2476. struct ce_irq_list *irq_entry;
  2477. struct icnss_priv *priv = dev_get_drvdata(dev);
  2478. if (!priv || !priv->pdev) {
  2479. ret = -ENODEV;
  2480. goto out;
  2481. }
  2482. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2483. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2484. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2485. ret = -EINVAL;
  2486. goto out;
  2487. }
  2488. irq = priv->ce_irqs[ce_id];
  2489. irq_entry = &priv->ce_irq_list[ce_id];
  2490. if (irq_entry->handler || irq_entry->irq) {
  2491. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2492. irq, ce_id);
  2493. ret = -EEXIST;
  2494. goto out;
  2495. }
  2496. ret = request_irq(irq, handler, flags, name, ctx);
  2497. if (ret) {
  2498. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2499. irq, ce_id, ret);
  2500. goto out;
  2501. }
  2502. irq_entry->irq = irq;
  2503. irq_entry->handler = handler;
  2504. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2505. penv->stats.ce_irqs[ce_id].request++;
  2506. out:
  2507. return ret;
  2508. }
  2509. EXPORT_SYMBOL(icnss_ce_request_irq);
  2510. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2511. {
  2512. int ret = 0;
  2513. unsigned int irq;
  2514. struct ce_irq_list *irq_entry;
  2515. if (!penv || !penv->pdev || !dev) {
  2516. ret = -ENODEV;
  2517. goto out;
  2518. }
  2519. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2520. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2521. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2522. ret = -EINVAL;
  2523. goto out;
  2524. }
  2525. irq = penv->ce_irqs[ce_id];
  2526. irq_entry = &penv->ce_irq_list[ce_id];
  2527. if (!irq_entry->handler || !irq_entry->irq) {
  2528. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2529. ret = -EEXIST;
  2530. goto out;
  2531. }
  2532. free_irq(irq, ctx);
  2533. irq_entry->irq = 0;
  2534. irq_entry->handler = NULL;
  2535. penv->stats.ce_irqs[ce_id].free++;
  2536. out:
  2537. return ret;
  2538. }
  2539. EXPORT_SYMBOL(icnss_ce_free_irq);
  2540. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2541. {
  2542. unsigned int irq;
  2543. if (!penv || !penv->pdev || !dev) {
  2544. icnss_pr_err("Platform driver not initialized\n");
  2545. return;
  2546. }
  2547. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2548. penv->state);
  2549. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2550. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2551. return;
  2552. }
  2553. penv->stats.ce_irqs[ce_id].enable++;
  2554. irq = penv->ce_irqs[ce_id];
  2555. enable_irq(irq);
  2556. }
  2557. EXPORT_SYMBOL(icnss_enable_irq);
  2558. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2559. {
  2560. unsigned int irq;
  2561. if (!penv || !penv->pdev || !dev) {
  2562. icnss_pr_err("Platform driver not initialized\n");
  2563. return;
  2564. }
  2565. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2566. penv->state);
  2567. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2568. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2569. ce_id);
  2570. return;
  2571. }
  2572. irq = penv->ce_irqs[ce_id];
  2573. disable_irq(irq);
  2574. penv->stats.ce_irqs[ce_id].disable++;
  2575. }
  2576. EXPORT_SYMBOL(icnss_disable_irq);
  2577. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2578. {
  2579. char *fw_build_timestamp = NULL;
  2580. struct icnss_priv *priv = dev_get_drvdata(dev);
  2581. if (!priv) {
  2582. icnss_pr_err("Platform driver not initialized\n");
  2583. return -EINVAL;
  2584. }
  2585. info->v_addr = priv->mem_base_va;
  2586. info->p_addr = priv->mem_base_pa;
  2587. info->chip_id = priv->chip_info.chip_id;
  2588. info->chip_family = priv->chip_info.chip_family;
  2589. info->board_id = priv->board_id;
  2590. info->soc_id = priv->soc_id;
  2591. info->fw_version = priv->fw_version_info.fw_version;
  2592. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2593. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2594. strlcpy(info->fw_build_timestamp,
  2595. priv->fw_version_info.fw_build_timestamp,
  2596. WLFW_MAX_TIMESTAMP_LEN + 1);
  2597. strlcpy(info->fw_build_id, priv->fw_build_id,
  2598. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2599. return 0;
  2600. }
  2601. EXPORT_SYMBOL(icnss_get_soc_info);
  2602. int icnss_get_mhi_state(struct device *dev)
  2603. {
  2604. struct icnss_priv *priv = dev_get_drvdata(dev);
  2605. if (!priv) {
  2606. icnss_pr_err("Platform driver not initialized\n");
  2607. return -EINVAL;
  2608. }
  2609. if (!priv->mhi_state_info_va)
  2610. return -ENOMEM;
  2611. return ioread32(priv->mhi_state_info_va);
  2612. }
  2613. EXPORT_SYMBOL(icnss_get_mhi_state);
  2614. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2615. {
  2616. int ret;
  2617. struct icnss_priv *priv;
  2618. if (!dev)
  2619. return -ENODEV;
  2620. priv = dev_get_drvdata(dev);
  2621. if (!priv) {
  2622. icnss_pr_err("Platform driver not initialized\n");
  2623. return -EINVAL;
  2624. }
  2625. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2626. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2627. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2628. priv->state);
  2629. return -EINVAL;
  2630. }
  2631. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2632. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2633. if (ret)
  2634. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2635. ret, fw_log_mode);
  2636. return ret;
  2637. }
  2638. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2639. int icnss_force_wake_request(struct device *dev)
  2640. {
  2641. struct icnss_priv *priv;
  2642. if (!dev)
  2643. return -ENODEV;
  2644. priv = dev_get_drvdata(dev);
  2645. if (!priv) {
  2646. icnss_pr_err("Platform driver not initialized\n");
  2647. return -EINVAL;
  2648. }
  2649. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2650. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2651. atomic_read(&priv->soc_wake_ref_count));
  2652. return 0;
  2653. }
  2654. icnss_pr_soc_wake("Calling SOC Wake request");
  2655. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2656. 0, NULL);
  2657. return 0;
  2658. }
  2659. EXPORT_SYMBOL(icnss_force_wake_request);
  2660. int icnss_force_wake_release(struct device *dev)
  2661. {
  2662. struct icnss_priv *priv;
  2663. if (!dev)
  2664. return -ENODEV;
  2665. priv = dev_get_drvdata(dev);
  2666. if (!priv) {
  2667. icnss_pr_err("Platform driver not initialized\n");
  2668. return -EINVAL;
  2669. }
  2670. icnss_pr_soc_wake("Calling SOC Wake response");
  2671. if (atomic_read(&priv->soc_wake_ref_count) &&
  2672. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2673. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2674. atomic_read(&priv->soc_wake_ref_count));
  2675. return 0;
  2676. }
  2677. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2678. 0, NULL);
  2679. return 0;
  2680. }
  2681. EXPORT_SYMBOL(icnss_force_wake_release);
  2682. int icnss_is_device_awake(struct device *dev)
  2683. {
  2684. struct icnss_priv *priv = dev_get_drvdata(dev);
  2685. if (!priv) {
  2686. icnss_pr_err("Platform driver not initialized\n");
  2687. return -EINVAL;
  2688. }
  2689. return atomic_read(&priv->soc_wake_ref_count);
  2690. }
  2691. EXPORT_SYMBOL(icnss_is_device_awake);
  2692. int icnss_is_pci_ep_awake(struct device *dev)
  2693. {
  2694. struct icnss_priv *priv = dev_get_drvdata(dev);
  2695. if (!priv) {
  2696. icnss_pr_err("Platform driver not initialized\n");
  2697. return -EINVAL;
  2698. }
  2699. if (!priv->mhi_state_info_va)
  2700. return -ENOMEM;
  2701. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2702. }
  2703. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2704. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2705. uint32_t mem_type, uint32_t data_len,
  2706. uint8_t *output)
  2707. {
  2708. int ret = 0;
  2709. struct icnss_priv *priv = dev_get_drvdata(dev);
  2710. if (priv->magic != ICNSS_MAGIC) {
  2711. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2712. dev, priv, priv->magic);
  2713. return -EINVAL;
  2714. }
  2715. if (!output || data_len == 0
  2716. || data_len > WLFW_MAX_DATA_SIZE) {
  2717. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2718. output, data_len);
  2719. ret = -EINVAL;
  2720. goto out;
  2721. }
  2722. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2723. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2724. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2725. priv->state);
  2726. ret = -EINVAL;
  2727. goto out;
  2728. }
  2729. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2730. data_len, output);
  2731. out:
  2732. return ret;
  2733. }
  2734. EXPORT_SYMBOL(icnss_athdiag_read);
  2735. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2736. uint32_t mem_type, uint32_t data_len,
  2737. uint8_t *input)
  2738. {
  2739. int ret = 0;
  2740. struct icnss_priv *priv = dev_get_drvdata(dev);
  2741. if (priv->magic != ICNSS_MAGIC) {
  2742. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2743. dev, priv, priv->magic);
  2744. return -EINVAL;
  2745. }
  2746. if (!input || data_len == 0
  2747. || data_len > WLFW_MAX_DATA_SIZE) {
  2748. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2749. input, data_len);
  2750. ret = -EINVAL;
  2751. goto out;
  2752. }
  2753. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2754. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2755. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2756. priv->state);
  2757. ret = -EINVAL;
  2758. goto out;
  2759. }
  2760. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2761. data_len, input);
  2762. out:
  2763. return ret;
  2764. }
  2765. EXPORT_SYMBOL(icnss_athdiag_write);
  2766. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2767. enum icnss_driver_mode mode,
  2768. const char *host_version)
  2769. {
  2770. struct icnss_priv *priv = dev_get_drvdata(dev);
  2771. int temp = 0;
  2772. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2773. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2774. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2775. priv->state);
  2776. return -EINVAL;
  2777. }
  2778. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2779. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2780. priv->state);
  2781. return -EINVAL;
  2782. }
  2783. if (priv->wpss_supported &&
  2784. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2785. icnss_setup_dms_mac(priv);
  2786. if (priv->device_id == WCN6750_DEVICE_ID) {
  2787. if (!icnss_get_temperature(priv, &temp)) {
  2788. icnss_pr_dbg("Temperature: %d\n", temp);
  2789. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2790. icnss_set_wlan_en_delay(priv);
  2791. }
  2792. }
  2793. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2794. }
  2795. EXPORT_SYMBOL(icnss_wlan_enable);
  2796. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2797. {
  2798. struct icnss_priv *priv = dev_get_drvdata(dev);
  2799. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2800. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2801. priv->state);
  2802. return 0;
  2803. }
  2804. return icnss_send_wlan_disable_to_fw(priv);
  2805. }
  2806. EXPORT_SYMBOL(icnss_wlan_disable);
  2807. bool icnss_is_qmi_disable(struct device *dev)
  2808. {
  2809. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2810. }
  2811. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2812. int icnss_get_ce_id(struct device *dev, int irq)
  2813. {
  2814. int i;
  2815. if (!penv || !penv->pdev || !dev)
  2816. return -ENODEV;
  2817. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2818. if (penv->ce_irqs[i] == irq)
  2819. return i;
  2820. }
  2821. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2822. return -EINVAL;
  2823. }
  2824. EXPORT_SYMBOL(icnss_get_ce_id);
  2825. int icnss_get_irq(struct device *dev, int ce_id)
  2826. {
  2827. int irq;
  2828. if (!penv || !penv->pdev || !dev)
  2829. return -ENODEV;
  2830. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2831. return -EINVAL;
  2832. irq = penv->ce_irqs[ce_id];
  2833. return irq;
  2834. }
  2835. EXPORT_SYMBOL(icnss_get_irq);
  2836. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2837. {
  2838. struct icnss_priv *priv = dev_get_drvdata(dev);
  2839. if (!priv) {
  2840. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2841. return NULL;
  2842. }
  2843. return priv->iommu_domain;
  2844. }
  2845. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2846. int icnss_smmu_map(struct device *dev,
  2847. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2848. {
  2849. struct icnss_priv *priv = dev_get_drvdata(dev);
  2850. int flag = IOMMU_READ | IOMMU_WRITE;
  2851. bool dma_coherent = false;
  2852. unsigned long iova;
  2853. int prop_len = 0;
  2854. size_t len;
  2855. int ret = 0;
  2856. if (!priv) {
  2857. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2858. dev, priv);
  2859. return -EINVAL;
  2860. }
  2861. if (!iova_addr) {
  2862. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2863. &paddr, size);
  2864. return -EINVAL;
  2865. }
  2866. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2867. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2868. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2869. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2870. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2871. iova,
  2872. &priv->smmu_iova_ipa_start,
  2873. priv->smmu_iova_ipa_len);
  2874. return -ENOMEM;
  2875. }
  2876. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2877. icnss_pr_dbg("dma-coherent is %s\n",
  2878. dma_coherent ? "enabled" : "disabled");
  2879. if (dma_coherent)
  2880. flag |= IOMMU_CACHE;
  2881. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2882. ret = iommu_map(priv->iommu_domain, iova,
  2883. rounddown(paddr, PAGE_SIZE), len,
  2884. flag);
  2885. if (ret) {
  2886. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2887. return ret;
  2888. }
  2889. priv->smmu_iova_ipa_current = iova + len;
  2890. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2891. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2892. return 0;
  2893. }
  2894. EXPORT_SYMBOL(icnss_smmu_map);
  2895. int icnss_smmu_unmap(struct device *dev,
  2896. uint32_t iova_addr, size_t size)
  2897. {
  2898. struct icnss_priv *priv = dev_get_drvdata(dev);
  2899. unsigned long iova;
  2900. size_t len, unmapped_len;
  2901. if (!priv) {
  2902. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2903. dev, priv);
  2904. return -EINVAL;
  2905. }
  2906. if (!iova_addr) {
  2907. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2908. size);
  2909. return -EINVAL;
  2910. }
  2911. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2912. PAGE_SIZE);
  2913. iova = rounddown(iova_addr, PAGE_SIZE);
  2914. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2915. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2916. iova,
  2917. &priv->smmu_iova_ipa_start,
  2918. priv->smmu_iova_ipa_len);
  2919. return -ENOMEM;
  2920. }
  2921. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2922. iova, len);
  2923. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2924. if (unmapped_len != len) {
  2925. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2926. return -EINVAL;
  2927. }
  2928. priv->smmu_iova_ipa_current = iova;
  2929. return 0;
  2930. }
  2931. EXPORT_SYMBOL(icnss_smmu_unmap);
  2932. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2933. {
  2934. return socinfo_get_serial_number();
  2935. }
  2936. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2937. int icnss_trigger_recovery(struct device *dev)
  2938. {
  2939. int ret = 0;
  2940. struct icnss_priv *priv = dev_get_drvdata(dev);
  2941. if (priv->magic != ICNSS_MAGIC) {
  2942. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2943. ret = -EINVAL;
  2944. goto out;
  2945. }
  2946. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2947. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2948. priv->state);
  2949. ret = -EPERM;
  2950. goto out;
  2951. }
  2952. if (priv->wpss_supported) {
  2953. icnss_pr_vdbg("Initiate Root PD restart");
  2954. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2955. ICNSS_SMP2P_OUT_POWER_SAVE);
  2956. if (!ret)
  2957. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2958. return ret;
  2959. }
  2960. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2961. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2962. priv->state);
  2963. ret = -EOPNOTSUPP;
  2964. goto out;
  2965. }
  2966. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2967. priv->state);
  2968. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2969. if (!ret)
  2970. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2971. out:
  2972. return ret;
  2973. }
  2974. EXPORT_SYMBOL(icnss_trigger_recovery);
  2975. int icnss_idle_shutdown(struct device *dev)
  2976. {
  2977. struct icnss_priv *priv = dev_get_drvdata(dev);
  2978. if (!priv) {
  2979. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2980. return -EINVAL;
  2981. }
  2982. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2983. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2984. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2985. return -EBUSY;
  2986. }
  2987. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2988. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2989. }
  2990. EXPORT_SYMBOL(icnss_idle_shutdown);
  2991. int icnss_idle_restart(struct device *dev)
  2992. {
  2993. struct icnss_priv *priv = dev_get_drvdata(dev);
  2994. if (!priv) {
  2995. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2996. return -EINVAL;
  2997. }
  2998. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2999. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3000. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3001. return -EBUSY;
  3002. }
  3003. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3004. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3005. }
  3006. EXPORT_SYMBOL(icnss_idle_restart);
  3007. int icnss_exit_power_save(struct device *dev)
  3008. {
  3009. struct icnss_priv *priv = dev_get_drvdata(dev);
  3010. icnss_pr_vdbg("Calling Exit Power Save\n");
  3011. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3012. !test_bit(ICNSS_MODE_ON, &priv->state))
  3013. return 0;
  3014. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3015. ICNSS_SMP2P_OUT_POWER_SAVE);
  3016. }
  3017. EXPORT_SYMBOL(icnss_exit_power_save);
  3018. int icnss_prevent_l1(struct device *dev)
  3019. {
  3020. struct icnss_priv *priv = dev_get_drvdata(dev);
  3021. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3022. !test_bit(ICNSS_MODE_ON, &priv->state))
  3023. return 0;
  3024. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3025. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3026. }
  3027. EXPORT_SYMBOL(icnss_prevent_l1);
  3028. void icnss_allow_l1(struct device *dev)
  3029. {
  3030. struct icnss_priv *priv = dev_get_drvdata(dev);
  3031. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3032. !test_bit(ICNSS_MODE_ON, &priv->state))
  3033. return;
  3034. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3035. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3036. }
  3037. EXPORT_SYMBOL(icnss_allow_l1);
  3038. void icnss_allow_recursive_recovery(struct device *dev)
  3039. {
  3040. struct icnss_priv *priv = dev_get_drvdata(dev);
  3041. priv->allow_recursive_recovery = true;
  3042. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3043. }
  3044. void icnss_disallow_recursive_recovery(struct device *dev)
  3045. {
  3046. struct icnss_priv *priv = dev_get_drvdata(dev);
  3047. priv->allow_recursive_recovery = false;
  3048. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3049. }
  3050. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3051. {
  3052. struct kobject *icnss_kobject;
  3053. int ret = 0;
  3054. atomic_set(&priv->is_shutdown, false);
  3055. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3056. if (!icnss_kobject) {
  3057. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3058. return -EINVAL;
  3059. }
  3060. priv->icnss_kobject = icnss_kobject;
  3061. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3062. if (ret) {
  3063. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3064. return ret;
  3065. }
  3066. return ret;
  3067. }
  3068. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3069. {
  3070. struct kobject *icnss_kobject;
  3071. icnss_kobject = priv->icnss_kobject;
  3072. if (icnss_kobject)
  3073. kobject_put(icnss_kobject);
  3074. }
  3075. static ssize_t qdss_tr_start_store(struct device *dev,
  3076. struct device_attribute *attr,
  3077. const char *buf, size_t count)
  3078. {
  3079. struct icnss_priv *priv = dev_get_drvdata(dev);
  3080. wlfw_qdss_trace_start(priv);
  3081. icnss_pr_dbg("Received QDSS start command\n");
  3082. return count;
  3083. }
  3084. static ssize_t qdss_tr_stop_store(struct device *dev,
  3085. struct device_attribute *attr,
  3086. const char *user_buf, size_t count)
  3087. {
  3088. struct icnss_priv *priv = dev_get_drvdata(dev);
  3089. u32 option = 0;
  3090. if (sscanf(user_buf, "%du", &option) != 1)
  3091. return -EINVAL;
  3092. wlfw_qdss_trace_stop(priv, option);
  3093. icnss_pr_dbg("Received QDSS stop command\n");
  3094. return count;
  3095. }
  3096. static ssize_t qdss_conf_download_store(struct device *dev,
  3097. struct device_attribute *attr,
  3098. const char *buf, size_t count)
  3099. {
  3100. struct icnss_priv *priv = dev_get_drvdata(dev);
  3101. icnss_wlfw_qdss_dnld_send_sync(priv);
  3102. icnss_pr_dbg("Received QDSS download config command\n");
  3103. return count;
  3104. }
  3105. static ssize_t hw_trc_override_store(struct device *dev,
  3106. struct device_attribute *attr,
  3107. const char *buf, size_t count)
  3108. {
  3109. struct icnss_priv *priv = dev_get_drvdata(dev);
  3110. int tmp = 0;
  3111. if (sscanf(buf, "%du", &tmp) != 1)
  3112. return -EINVAL;
  3113. priv->hw_trc_override = tmp;
  3114. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3115. return count;
  3116. }
  3117. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3118. {
  3119. struct icnss_priv *priv = icnss_get_plat_priv();
  3120. phandle rproc_phandle;
  3121. int ret;
  3122. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3123. &rproc_phandle)) {
  3124. icnss_pr_err("error reading rproc phandle\n");
  3125. return;
  3126. }
  3127. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3128. if (IS_ERR_OR_NULL(priv->rproc)) {
  3129. icnss_pr_err("rproc not found");
  3130. return;
  3131. }
  3132. ret = rproc_boot(priv->rproc);
  3133. if (ret) {
  3134. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3135. rproc_put(priv->rproc);
  3136. }
  3137. }
  3138. static ssize_t wpss_boot_store(struct device *dev,
  3139. struct device_attribute *attr,
  3140. const char *buf, size_t count)
  3141. {
  3142. struct icnss_priv *priv = dev_get_drvdata(dev);
  3143. int wpss_rproc = 0;
  3144. if (!priv->wpss_supported)
  3145. return count;
  3146. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3147. icnss_pr_err("Failed to read wpss rproc info");
  3148. return -EINVAL;
  3149. }
  3150. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3151. if (wpss_rproc == 1)
  3152. schedule_work(&wpss_loader);
  3153. else if (wpss_rproc == 0)
  3154. icnss_wpss_unload(priv);
  3155. return count;
  3156. }
  3157. static ssize_t wlan_en_delay_store(struct device *dev,
  3158. struct device_attribute *attr,
  3159. const char *buf, size_t count)
  3160. {
  3161. struct icnss_priv *priv = dev_get_drvdata(dev);
  3162. uint32_t wlan_en_delay = 0;
  3163. if (priv->device_id != WCN6750_DEVICE_ID)
  3164. return count;
  3165. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3166. icnss_pr_err("Failed to read wlan_en_delay");
  3167. return -EINVAL;
  3168. }
  3169. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3170. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3171. return count;
  3172. }
  3173. static DEVICE_ATTR_WO(qdss_tr_start);
  3174. static DEVICE_ATTR_WO(qdss_tr_stop);
  3175. static DEVICE_ATTR_WO(qdss_conf_download);
  3176. static DEVICE_ATTR_WO(hw_trc_override);
  3177. static DEVICE_ATTR_WO(wpss_boot);
  3178. static DEVICE_ATTR_WO(wlan_en_delay);
  3179. static struct attribute *icnss_attrs[] = {
  3180. &dev_attr_qdss_tr_start.attr,
  3181. &dev_attr_qdss_tr_stop.attr,
  3182. &dev_attr_qdss_conf_download.attr,
  3183. &dev_attr_hw_trc_override.attr,
  3184. &dev_attr_wpss_boot.attr,
  3185. &dev_attr_wlan_en_delay.attr,
  3186. NULL,
  3187. };
  3188. static struct attribute_group icnss_attr_group = {
  3189. .attrs = icnss_attrs,
  3190. };
  3191. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3192. {
  3193. struct device *dev = &priv->pdev->dev;
  3194. int ret;
  3195. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3196. if (ret) {
  3197. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3198. ret);
  3199. goto out;
  3200. }
  3201. return 0;
  3202. out:
  3203. return ret;
  3204. }
  3205. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3206. {
  3207. sysfs_remove_link(kernel_kobj, "icnss");
  3208. }
  3209. static int icnss_sysfs_create(struct icnss_priv *priv)
  3210. {
  3211. int ret = 0;
  3212. ret = devm_device_add_group(&priv->pdev->dev,
  3213. &icnss_attr_group);
  3214. if (ret) {
  3215. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3216. ret);
  3217. goto out;
  3218. }
  3219. icnss_create_sysfs_link(priv);
  3220. ret = icnss_create_shutdown_sysfs(priv);
  3221. if (ret)
  3222. goto remove_icnss_group;
  3223. return 0;
  3224. remove_icnss_group:
  3225. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3226. out:
  3227. return ret;
  3228. }
  3229. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3230. {
  3231. icnss_destroy_shutdown_sysfs(priv);
  3232. icnss_remove_sysfs_link(priv);
  3233. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3234. }
  3235. static int icnss_resource_parse(struct icnss_priv *priv)
  3236. {
  3237. int ret = 0, i = 0;
  3238. struct platform_device *pdev = priv->pdev;
  3239. struct device *dev = &pdev->dev;
  3240. struct resource *res;
  3241. u32 int_prop;
  3242. ret = icnss_get_vreg(priv);
  3243. if (ret) {
  3244. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3245. goto out;
  3246. }
  3247. ret = icnss_get_clk(priv);
  3248. if (ret) {
  3249. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3250. goto put_vreg;
  3251. }
  3252. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3253. ret = icnss_get_psf_info(priv);
  3254. if (ret < 0)
  3255. goto out;
  3256. priv->psf_supported = true;
  3257. }
  3258. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3259. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3260. "membase");
  3261. if (!res) {
  3262. icnss_pr_err("Memory base not found in DT\n");
  3263. ret = -EINVAL;
  3264. goto put_clk;
  3265. }
  3266. priv->mem_base_pa = res->start;
  3267. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3268. resource_size(res));
  3269. if (!priv->mem_base_va) {
  3270. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3271. &priv->mem_base_pa);
  3272. ret = -EINVAL;
  3273. goto put_clk;
  3274. }
  3275. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3276. &priv->mem_base_pa,
  3277. priv->mem_base_va);
  3278. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3279. res = platform_get_resource(priv->pdev,
  3280. IORESOURCE_IRQ, i);
  3281. if (!res) {
  3282. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3283. ret = -ENODEV;
  3284. goto put_clk;
  3285. } else {
  3286. priv->ce_irqs[i] = res->start;
  3287. }
  3288. }
  3289. if (of_property_read_bool(pdev->dev.of_node,
  3290. "qcom,is_low_power")) {
  3291. priv->low_power_support = true;
  3292. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3293. }
  3294. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3295. &priv->rf_subtype) == 0) {
  3296. priv->is_rf_subtype_valid = true;
  3297. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3298. }
  3299. if (of_property_read_bool(pdev->dev.of_node,
  3300. "qcom,is_slate_rfa")) {
  3301. priv->is_slate_rfa = true;
  3302. icnss_pr_err("SLATE rfa is enabled\n");
  3303. }
  3304. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3305. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3306. "msi_addr");
  3307. if (!res) {
  3308. icnss_pr_err("MSI address not found in DT\n");
  3309. ret = -EINVAL;
  3310. goto put_clk;
  3311. }
  3312. priv->msi_addr_pa = res->start;
  3313. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3314. PAGE_SIZE,
  3315. DMA_FROM_DEVICE, 0);
  3316. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3317. icnss_pr_err("MSI: failed to map msi address\n");
  3318. priv->msi_addr_iova = 0;
  3319. ret = -ENOMEM;
  3320. goto put_clk;
  3321. }
  3322. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3323. &priv->msi_addr_pa,
  3324. priv->msi_addr_iova);
  3325. ret = of_property_read_u32_index(dev->of_node,
  3326. "interrupts",
  3327. 1,
  3328. &int_prop);
  3329. if (ret) {
  3330. icnss_pr_dbg("Read interrupt prop failed");
  3331. goto put_clk;
  3332. }
  3333. priv->msi_base_data = int_prop + 32;
  3334. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3335. priv->msi_base_data, int_prop);
  3336. icnss_get_msi_assignment(priv);
  3337. for (i = 0; i < msi_config.total_vectors; i++) {
  3338. res = platform_get_resource(priv->pdev,
  3339. IORESOURCE_IRQ, i);
  3340. if (!res) {
  3341. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3342. ret = -ENODEV;
  3343. goto put_clk;
  3344. } else {
  3345. priv->srng_irqs[i] = res->start;
  3346. }
  3347. }
  3348. }
  3349. return 0;
  3350. put_clk:
  3351. icnss_put_clk(priv);
  3352. put_vreg:
  3353. icnss_put_vreg(priv);
  3354. out:
  3355. return ret;
  3356. }
  3357. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3358. {
  3359. int ret = 0;
  3360. struct platform_device *pdev = priv->pdev;
  3361. struct device *dev = &pdev->dev;
  3362. struct device_node *np = NULL;
  3363. u64 prop_size = 0;
  3364. const __be32 *addrp = NULL;
  3365. np = of_parse_phandle(dev->of_node,
  3366. "qcom,wlan-msa-fixed-region", 0);
  3367. if (np) {
  3368. addrp = of_get_address(np, 0, &prop_size, NULL);
  3369. if (!addrp) {
  3370. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3371. ret = -EINVAL;
  3372. of_node_put(np);
  3373. goto out;
  3374. }
  3375. priv->msa_pa = of_translate_address(np, addrp);
  3376. if (priv->msa_pa == OF_BAD_ADDR) {
  3377. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3378. ret = -EINVAL;
  3379. of_node_put(np);
  3380. goto out;
  3381. }
  3382. of_node_put(np);
  3383. priv->msa_va = memremap(priv->msa_pa,
  3384. (unsigned long)prop_size, MEMREMAP_WT);
  3385. if (!priv->msa_va) {
  3386. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3387. &priv->msa_pa);
  3388. ret = -EINVAL;
  3389. goto out;
  3390. }
  3391. priv->msa_mem_size = prop_size;
  3392. } else {
  3393. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3394. &priv->msa_mem_size);
  3395. if (ret || priv->msa_mem_size == 0) {
  3396. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3397. priv->msa_mem_size, ret);
  3398. goto out;
  3399. }
  3400. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3401. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3402. if (!priv->msa_va) {
  3403. icnss_pr_err("DMA alloc failed for MSA\n");
  3404. ret = -ENOMEM;
  3405. goto out;
  3406. }
  3407. }
  3408. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3409. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3410. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3411. "qcom,fw-prefix");
  3412. return 0;
  3413. out:
  3414. return ret;
  3415. }
  3416. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3417. struct device *dev, unsigned long iova,
  3418. int flags, void *handler_token)
  3419. {
  3420. struct icnss_priv *priv = handler_token;
  3421. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3422. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3423. if (!priv) {
  3424. icnss_pr_err("priv is NULL\n");
  3425. return -ENODEV;
  3426. }
  3427. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3428. fw_down_data.crashed = true;
  3429. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3430. &fw_down_data);
  3431. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3432. &fw_down_data);
  3433. }
  3434. icnss_trigger_recovery(&priv->pdev->dev);
  3435. /* IOMMU driver requires non-zero return value to print debug info. */
  3436. return -EINVAL;
  3437. }
  3438. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3439. {
  3440. int ret = 0;
  3441. struct platform_device *pdev = priv->pdev;
  3442. struct device *dev = &pdev->dev;
  3443. const char *iommu_dma_type;
  3444. struct resource *res;
  3445. u32 addr_win[2];
  3446. ret = of_property_read_u32_array(dev->of_node,
  3447. "qcom,iommu-dma-addr-pool",
  3448. addr_win,
  3449. ARRAY_SIZE(addr_win));
  3450. if (ret) {
  3451. icnss_pr_err("SMMU IOVA base not found\n");
  3452. } else {
  3453. priv->smmu_iova_start = addr_win[0];
  3454. priv->smmu_iova_len = addr_win[1];
  3455. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3456. &priv->smmu_iova_start,
  3457. priv->smmu_iova_len);
  3458. priv->iommu_domain =
  3459. iommu_get_domain_for_dev(&pdev->dev);
  3460. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3461. &iommu_dma_type);
  3462. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3463. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3464. priv->smmu_s1_enable = true;
  3465. if (priv->device_id == WCN6750_DEVICE_ID)
  3466. iommu_set_fault_handler(priv->iommu_domain,
  3467. icnss_smmu_fault_handler,
  3468. priv);
  3469. }
  3470. res = platform_get_resource_byname(pdev,
  3471. IORESOURCE_MEM,
  3472. "smmu_iova_ipa");
  3473. if (!res) {
  3474. icnss_pr_err("SMMU IOVA IPA not found\n");
  3475. } else {
  3476. priv->smmu_iova_ipa_start = res->start;
  3477. priv->smmu_iova_ipa_current = res->start;
  3478. priv->smmu_iova_ipa_len = resource_size(res);
  3479. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3480. &priv->smmu_iova_ipa_start,
  3481. priv->smmu_iova_ipa_len);
  3482. }
  3483. }
  3484. return 0;
  3485. }
  3486. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3487. {
  3488. if (!priv)
  3489. return -ENODEV;
  3490. if (!priv->smmu_iova_len)
  3491. return -EINVAL;
  3492. *addr = priv->smmu_iova_start;
  3493. *size = priv->smmu_iova_len;
  3494. return 0;
  3495. }
  3496. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3497. {
  3498. if (!priv)
  3499. return -ENODEV;
  3500. if (!priv->smmu_iova_ipa_len)
  3501. return -EINVAL;
  3502. *addr = priv->smmu_iova_ipa_start;
  3503. *size = priv->smmu_iova_ipa_len;
  3504. return 0;
  3505. }
  3506. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3507. char *name)
  3508. {
  3509. if (!priv)
  3510. return;
  3511. if (!priv->use_prefix_path) {
  3512. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3513. return;
  3514. }
  3515. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3516. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3517. ADRASTEA_PATH_PREFIX "%s", name);
  3518. else
  3519. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3520. QCA6750_PATH_PREFIX "%s", name);
  3521. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3522. }
  3523. static const struct platform_device_id icnss_platform_id_table[] = {
  3524. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3525. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3526. { },
  3527. };
  3528. static const struct of_device_id icnss_dt_match[] = {
  3529. {
  3530. .compatible = "qcom,wcn6750",
  3531. .data = (void *)&icnss_platform_id_table[0]},
  3532. {
  3533. .compatible = "qcom,icnss",
  3534. .data = (void *)&icnss_platform_id_table[1]},
  3535. { },
  3536. };
  3537. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3538. static void icnss_init_control_params(struct icnss_priv *priv)
  3539. {
  3540. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3541. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3542. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3543. if (priv->device_id == WCN6750_DEVICE_ID ||
  3544. of_property_read_bool(priv->pdev->dev.of_node,
  3545. "wpss-support-enable"))
  3546. priv->wpss_supported = true;
  3547. if (of_property_read_bool(priv->pdev->dev.of_node,
  3548. "bdf-download-support"))
  3549. priv->bdf_download_support = true;
  3550. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3551. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3552. }
  3553. static void icnss_read_device_configs(struct icnss_priv *priv)
  3554. {
  3555. if (of_property_read_bool(priv->pdev->dev.of_node,
  3556. "wlan-ipa-disabled")) {
  3557. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3558. }
  3559. if (of_property_read_bool(priv->pdev->dev.of_node,
  3560. "qcom,wpss-self-recovery"))
  3561. priv->wpss_self_recovery_enabled = true;
  3562. }
  3563. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3564. {
  3565. pm_runtime_get_sync(&priv->pdev->dev);
  3566. pm_runtime_forbid(&priv->pdev->dev);
  3567. pm_runtime_set_active(&priv->pdev->dev);
  3568. pm_runtime_enable(&priv->pdev->dev);
  3569. }
  3570. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3571. {
  3572. pm_runtime_disable(&priv->pdev->dev);
  3573. pm_runtime_allow(&priv->pdev->dev);
  3574. pm_runtime_put_sync(&priv->pdev->dev);
  3575. }
  3576. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3577. {
  3578. return of_property_read_bool(priv->pdev->dev.of_node,
  3579. "use-nv-mac");
  3580. }
  3581. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3582. {
  3583. struct icnss_subsys_restart_level_data *restart_level_data;
  3584. icnss_pr_info("rproc name: %s recovery disable: %d",
  3585. rproc->name, rproc->recovery_disabled);
  3586. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3587. if (!restart_level_data)
  3588. return;
  3589. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3590. if (rproc->recovery_disabled)
  3591. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3592. else
  3593. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3594. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3595. 0, restart_level_data);
  3596. }
  3597. }
  3598. static int icnss_probe(struct platform_device *pdev)
  3599. {
  3600. int ret = 0;
  3601. struct device *dev = &pdev->dev;
  3602. struct icnss_priv *priv;
  3603. const struct of_device_id *of_id;
  3604. const struct platform_device_id *device_id;
  3605. if (dev_get_drvdata(dev)) {
  3606. icnss_pr_err("Driver is already initialized\n");
  3607. return -EEXIST;
  3608. }
  3609. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3610. if (!of_id || !of_id->data) {
  3611. icnss_pr_err("Failed to find of match device!\n");
  3612. ret = -ENODEV;
  3613. goto out_reset_drvdata;
  3614. }
  3615. device_id = of_id->data;
  3616. icnss_pr_dbg("Platform driver probe\n");
  3617. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3618. if (!priv)
  3619. return -ENOMEM;
  3620. priv->magic = ICNSS_MAGIC;
  3621. dev_set_drvdata(dev, priv);
  3622. priv->pdev = pdev;
  3623. priv->device_id = device_id->driver_data;
  3624. priv->is_chain1_supported = true;
  3625. INIT_LIST_HEAD(&priv->vreg_list);
  3626. INIT_LIST_HEAD(&priv->clk_list);
  3627. icnss_allow_recursive_recovery(dev);
  3628. icnss_init_control_params(priv);
  3629. icnss_read_device_configs(priv);
  3630. ret = icnss_resource_parse(priv);
  3631. if (ret)
  3632. goto out_reset_drvdata;
  3633. ret = icnss_msa_dt_parse(priv);
  3634. if (ret)
  3635. goto out_free_resources;
  3636. ret = icnss_smmu_dt_parse(priv);
  3637. if (ret)
  3638. goto out_free_resources;
  3639. spin_lock_init(&priv->event_lock);
  3640. spin_lock_init(&priv->on_off_lock);
  3641. spin_lock_init(&priv->soc_wake_msg_lock);
  3642. mutex_init(&priv->dev_lock);
  3643. mutex_init(&priv->tcdev_lock);
  3644. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3645. if (!priv->event_wq) {
  3646. icnss_pr_err("Workqueue creation failed\n");
  3647. ret = -EFAULT;
  3648. goto smmu_cleanup;
  3649. }
  3650. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3651. INIT_LIST_HEAD(&priv->event_list);
  3652. ret = icnss_register_fw_service(priv);
  3653. if (ret < 0) {
  3654. icnss_pr_err("fw service registration failed: %d\n", ret);
  3655. goto out_destroy_wq;
  3656. }
  3657. icnss_enable_recovery(priv);
  3658. icnss_debugfs_create(priv);
  3659. icnss_sysfs_create(priv);
  3660. ret = device_init_wakeup(&priv->pdev->dev, true);
  3661. if (ret)
  3662. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3663. ret);
  3664. icnss_set_plat_priv(priv);
  3665. init_completion(&priv->unblock_shutdown);
  3666. if (priv->is_slate_rfa)
  3667. init_completion(&priv->slate_boot_complete);
  3668. if (priv->device_id == WCN6750_DEVICE_ID) {
  3669. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3670. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3671. if (!priv->soc_wake_wq) {
  3672. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3673. ret = -EFAULT;
  3674. goto out_unregister_fw_service;
  3675. }
  3676. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3677. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3678. ret = icnss_genl_init();
  3679. if (ret < 0)
  3680. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3681. init_completion(&priv->smp2p_soc_wake_wait);
  3682. icnss_runtime_pm_init(priv);
  3683. icnss_aop_mbox_init(priv);
  3684. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3685. priv->bdf_download_support = true;
  3686. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3687. }
  3688. if (priv->wpss_supported) {
  3689. ret = icnss_dms_init(priv);
  3690. if (ret)
  3691. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3692. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3693. icnss_pr_dbg("NV MAC feature is %s\n",
  3694. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3695. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3696. }
  3697. timer_setup(&priv->recovery_timer,
  3698. icnss_recovery_timeout_hdlr, 0);
  3699. if (priv->wpss_self_recovery_enabled) {
  3700. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3701. timer_setup(&priv->wpss_ssr_timer,
  3702. icnss_wpss_ssr_timeout_hdlr, 0);
  3703. }
  3704. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3705. icnss_pr_info("Platform driver probed successfully\n");
  3706. return 0;
  3707. out_unregister_fw_service:
  3708. icnss_unregister_fw_service(priv);
  3709. out_destroy_wq:
  3710. destroy_workqueue(priv->event_wq);
  3711. smmu_cleanup:
  3712. priv->iommu_domain = NULL;
  3713. out_free_resources:
  3714. icnss_put_resources(priv);
  3715. out_reset_drvdata:
  3716. dev_set_drvdata(dev, NULL);
  3717. return ret;
  3718. }
  3719. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3720. {
  3721. if (IS_ERR_OR_NULL(ramdump_info))
  3722. return;
  3723. device_unregister(ramdump_info->dev);
  3724. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3725. kfree(ramdump_info);
  3726. }
  3727. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3728. {
  3729. if (priv->batt_psy)
  3730. power_supply_put(penv->batt_psy);
  3731. if (priv->psf_supported) {
  3732. flush_workqueue(priv->soc_update_wq);
  3733. destroy_workqueue(priv->soc_update_wq);
  3734. power_supply_unreg_notifier(&priv->psf_nb);
  3735. }
  3736. }
  3737. static int icnss_remove(struct platform_device *pdev)
  3738. {
  3739. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3740. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3741. del_timer(&priv->recovery_timer);
  3742. if (priv->wpss_self_recovery_enabled)
  3743. del_timer(&priv->wpss_ssr_timer);
  3744. device_init_wakeup(&priv->pdev->dev, false);
  3745. icnss_debugfs_destroy(priv);
  3746. icnss_unregister_power_supply_notifier(penv);
  3747. icnss_sysfs_destroy(priv);
  3748. complete_all(&priv->unblock_shutdown);
  3749. if (priv->is_slate_rfa)
  3750. icnss_slate_ssr_unregister_notifier(priv);
  3751. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3752. if (priv->wpss_supported) {
  3753. icnss_dms_deinit(priv);
  3754. icnss_wpss_early_ssr_unregister_notifier(priv);
  3755. icnss_wpss_ssr_unregister_notifier(priv);
  3756. } else {
  3757. icnss_modem_ssr_unregister_notifier(priv);
  3758. icnss_pdr_unregister_notifier(priv);
  3759. }
  3760. if (priv->device_id == WCN6750_DEVICE_ID) {
  3761. icnss_genl_exit();
  3762. icnss_runtime_pm_deinit(priv);
  3763. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3764. mbox_free_channel(priv->mbox_chan);
  3765. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3766. complete_all(&priv->smp2p_soc_wake_wait);
  3767. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3768. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3769. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3770. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3771. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3772. if (priv->soc_wake_wq)
  3773. destroy_workqueue(priv->soc_wake_wq);
  3774. }
  3775. class_destroy(priv->icnss_ramdump_class);
  3776. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3777. icnss_unregister_fw_service(priv);
  3778. if (priv->event_wq)
  3779. destroy_workqueue(priv->event_wq);
  3780. priv->iommu_domain = NULL;
  3781. icnss_hw_power_off(priv);
  3782. icnss_put_resources(priv);
  3783. dev_set_drvdata(&pdev->dev, NULL);
  3784. return 0;
  3785. }
  3786. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3787. {
  3788. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3789. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3790. ICNSS_ASSERT(0);
  3791. }
  3792. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3793. {
  3794. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3795. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3796. priv->state);
  3797. schedule_work(&wpss_ssr_work);
  3798. }
  3799. #ifdef CONFIG_PM_SLEEP
  3800. static int icnss_pm_suspend(struct device *dev)
  3801. {
  3802. struct icnss_priv *priv = dev_get_drvdata(dev);
  3803. int ret = 0;
  3804. if (priv->magic != ICNSS_MAGIC) {
  3805. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3806. dev, priv, priv->magic);
  3807. return -EINVAL;
  3808. }
  3809. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3810. if (!priv->ops || !priv->ops->pm_suspend ||
  3811. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3812. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3813. return 0;
  3814. ret = priv->ops->pm_suspend(dev);
  3815. if (ret == 0) {
  3816. if (priv->device_id == WCN6750_DEVICE_ID) {
  3817. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3818. !test_bit(ICNSS_MODE_ON, &priv->state))
  3819. return 0;
  3820. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3821. ICNSS_SMP2P_OUT_POWER_SAVE);
  3822. }
  3823. priv->stats.pm_suspend++;
  3824. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3825. } else {
  3826. priv->stats.pm_suspend_err++;
  3827. }
  3828. return ret;
  3829. }
  3830. static int icnss_pm_resume(struct device *dev)
  3831. {
  3832. struct icnss_priv *priv = dev_get_drvdata(dev);
  3833. int ret = 0;
  3834. if (priv->magic != ICNSS_MAGIC) {
  3835. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3836. dev, priv, priv->magic);
  3837. return -EINVAL;
  3838. }
  3839. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3840. if (!priv->ops || !priv->ops->pm_resume ||
  3841. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3842. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3843. goto out;
  3844. ret = priv->ops->pm_resume(dev);
  3845. out:
  3846. if (ret == 0) {
  3847. priv->stats.pm_resume++;
  3848. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3849. } else {
  3850. priv->stats.pm_resume_err++;
  3851. }
  3852. return ret;
  3853. }
  3854. static int icnss_pm_suspend_noirq(struct device *dev)
  3855. {
  3856. struct icnss_priv *priv = dev_get_drvdata(dev);
  3857. int ret = 0;
  3858. if (priv->magic != ICNSS_MAGIC) {
  3859. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3860. dev, priv, priv->magic);
  3861. return -EINVAL;
  3862. }
  3863. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3864. if (!priv->ops || !priv->ops->suspend_noirq ||
  3865. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3866. goto out;
  3867. ret = priv->ops->suspend_noirq(dev);
  3868. out:
  3869. if (ret == 0) {
  3870. priv->stats.pm_suspend_noirq++;
  3871. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3872. } else {
  3873. priv->stats.pm_suspend_noirq_err++;
  3874. }
  3875. return ret;
  3876. }
  3877. static int icnss_pm_resume_noirq(struct device *dev)
  3878. {
  3879. struct icnss_priv *priv = dev_get_drvdata(dev);
  3880. int ret = 0;
  3881. if (priv->magic != ICNSS_MAGIC) {
  3882. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3883. dev, priv, priv->magic);
  3884. return -EINVAL;
  3885. }
  3886. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3887. if (!priv->ops || !priv->ops->resume_noirq ||
  3888. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3889. goto out;
  3890. ret = priv->ops->resume_noirq(dev);
  3891. out:
  3892. if (ret == 0) {
  3893. priv->stats.pm_resume_noirq++;
  3894. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3895. } else {
  3896. priv->stats.pm_resume_noirq_err++;
  3897. }
  3898. return ret;
  3899. }
  3900. static int icnss_pm_runtime_suspend(struct device *dev)
  3901. {
  3902. struct icnss_priv *priv = dev_get_drvdata(dev);
  3903. int ret = 0;
  3904. if (priv->device_id != WCN6750_DEVICE_ID) {
  3905. icnss_pr_err("Ignore runtime suspend:\n");
  3906. goto out;
  3907. }
  3908. if (priv->magic != ICNSS_MAGIC) {
  3909. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3910. dev, priv, priv->magic);
  3911. return -EINVAL;
  3912. }
  3913. if (!priv->ops || !priv->ops->runtime_suspend ||
  3914. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3915. goto out;
  3916. icnss_pr_vdbg("Runtime suspend\n");
  3917. ret = priv->ops->runtime_suspend(dev);
  3918. if (!ret) {
  3919. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3920. !test_bit(ICNSS_MODE_ON, &priv->state))
  3921. return 0;
  3922. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3923. ICNSS_SMP2P_OUT_POWER_SAVE);
  3924. }
  3925. out:
  3926. return ret;
  3927. }
  3928. static int icnss_pm_runtime_resume(struct device *dev)
  3929. {
  3930. struct icnss_priv *priv = dev_get_drvdata(dev);
  3931. int ret = 0;
  3932. if (priv->device_id != WCN6750_DEVICE_ID) {
  3933. icnss_pr_err("Ignore runtime resume:\n");
  3934. goto out;
  3935. }
  3936. if (priv->magic != ICNSS_MAGIC) {
  3937. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3938. dev, priv, priv->magic);
  3939. return -EINVAL;
  3940. }
  3941. if (!priv->ops || !priv->ops->runtime_resume ||
  3942. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3943. goto out;
  3944. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3945. ret = priv->ops->runtime_resume(dev);
  3946. out:
  3947. return ret;
  3948. }
  3949. static int icnss_pm_runtime_idle(struct device *dev)
  3950. {
  3951. struct icnss_priv *priv = dev_get_drvdata(dev);
  3952. if (priv->device_id != WCN6750_DEVICE_ID) {
  3953. icnss_pr_err("Ignore runtime idle:\n");
  3954. goto out;
  3955. }
  3956. icnss_pr_vdbg("Runtime idle\n");
  3957. pm_request_autosuspend(dev);
  3958. out:
  3959. return -EBUSY;
  3960. }
  3961. #endif
  3962. static const struct dev_pm_ops icnss_pm_ops = {
  3963. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3964. icnss_pm_resume)
  3965. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3966. icnss_pm_resume_noirq)
  3967. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3968. icnss_pm_runtime_idle)
  3969. };
  3970. static struct platform_driver icnss_driver = {
  3971. .probe = icnss_probe,
  3972. .remove = icnss_remove,
  3973. .driver = {
  3974. .name = "icnss2",
  3975. .pm = &icnss_pm_ops,
  3976. .of_match_table = icnss_dt_match,
  3977. },
  3978. };
  3979. static int __init icnss_initialize(void)
  3980. {
  3981. icnss_debug_init();
  3982. return platform_driver_register(&icnss_driver);
  3983. }
  3984. static void __exit icnss_exit(void)
  3985. {
  3986. platform_driver_unregister(&icnss_driver);
  3987. icnss_debug_deinit();
  3988. }
  3989. module_init(icnss_initialize);
  3990. module_exit(icnss_exit);
  3991. MODULE_LICENSE("GPL v2");
  3992. MODULE_DESCRIPTION("iWCN CORE platform driver");