dsi_panel.c 111 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  31. #define MIN_PREFILL_LINES 40
  32. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  33. {
  34. char *bp;
  35. bp = buf;
  36. /* First 7 bytes are cmd header */
  37. *bp++ = 0x0A;
  38. *bp++ = 1;
  39. *bp++ = 0;
  40. *bp++ = 0;
  41. *bp++ = pps_delay_ms;
  42. *bp++ = 0;
  43. *bp++ = 128;
  44. }
  45. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  46. char *buf, int pps_id, u32 size)
  47. {
  48. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  49. buf += DSI_CMD_PPS_HDR_SIZE;
  50. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  51. size);
  52. }
  53. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  54. char *buf, int pps_id, u32 size)
  55. {
  56. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  57. buf += DSI_CMD_PPS_HDR_SIZE;
  58. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  59. size);
  60. }
  61. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  62. {
  63. int rc = 0;
  64. int i;
  65. struct regulator *vreg = NULL;
  66. for (i = 0; i < panel->power_info.count; i++) {
  67. vreg = devm_regulator_get(panel->parent,
  68. panel->power_info.vregs[i].vreg_name);
  69. rc = PTR_RET(vreg);
  70. if (rc) {
  71. DSI_ERR("failed to get %s regulator\n",
  72. panel->power_info.vregs[i].vreg_name);
  73. goto error_put;
  74. }
  75. panel->power_info.vregs[i].vreg = vreg;
  76. }
  77. return rc;
  78. error_put:
  79. for (i = i - 1; i >= 0; i--) {
  80. devm_regulator_put(panel->power_info.vregs[i].vreg);
  81. panel->power_info.vregs[i].vreg = NULL;
  82. }
  83. return rc;
  84. }
  85. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  86. {
  87. int rc = 0;
  88. int i;
  89. for (i = panel->power_info.count - 1; i >= 0; i--)
  90. devm_regulator_put(panel->power_info.vregs[i].vreg);
  91. return rc;
  92. }
  93. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  94. {
  95. int rc = 0;
  96. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  97. if (gpio_is_valid(r_config->reset_gpio)) {
  98. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  99. if (rc) {
  100. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  101. goto error;
  102. }
  103. }
  104. if (gpio_is_valid(r_config->disp_en_gpio)) {
  105. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  106. if (rc) {
  107. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  108. goto error_release_reset;
  109. }
  110. }
  111. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  112. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  113. if (rc) {
  114. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  115. goto error_release_disp_en;
  116. }
  117. }
  118. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  119. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  120. if (rc) {
  121. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  122. goto error_release_mode_sel;
  123. }
  124. }
  125. if (gpio_is_valid(panel->panel_test_gpio)) {
  126. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  127. if (rc) {
  128. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  129. rc);
  130. panel->panel_test_gpio = -1;
  131. rc = 0;
  132. }
  133. }
  134. goto error;
  135. error_release_mode_sel:
  136. if (gpio_is_valid(panel->bl_config.en_gpio))
  137. gpio_free(panel->bl_config.en_gpio);
  138. error_release_disp_en:
  139. if (gpio_is_valid(r_config->disp_en_gpio))
  140. gpio_free(r_config->disp_en_gpio);
  141. error_release_reset:
  142. if (gpio_is_valid(r_config->reset_gpio))
  143. gpio_free(r_config->reset_gpio);
  144. error:
  145. return rc;
  146. }
  147. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  148. {
  149. int rc = 0;
  150. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  151. if (gpio_is_valid(r_config->reset_gpio))
  152. gpio_free(r_config->reset_gpio);
  153. if (gpio_is_valid(r_config->disp_en_gpio))
  154. gpio_free(r_config->disp_en_gpio);
  155. if (gpio_is_valid(panel->bl_config.en_gpio))
  156. gpio_free(panel->bl_config.en_gpio);
  157. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  158. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  159. if (gpio_is_valid(panel->panel_test_gpio))
  160. gpio_free(panel->panel_test_gpio);
  161. return rc;
  162. }
  163. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  164. {
  165. struct dsi_panel_reset_config *r_config;
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. r_config = &panel->reset_config;
  171. if (!r_config) {
  172. DSI_ERR("Invalid panel reset configuration\n");
  173. return -EINVAL;
  174. }
  175. if (gpio_is_valid(r_config->reset_gpio)) {
  176. gpio_set_value(r_config->reset_gpio, 0);
  177. DSI_INFO("GPIO pulled low to simulate ESD\n");
  178. return 0;
  179. }
  180. DSI_ERR("failed to pull down gpio\n");
  181. return -EINVAL;
  182. }
  183. static int dsi_panel_reset(struct dsi_panel *panel)
  184. {
  185. int rc = 0;
  186. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  187. int i;
  188. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  189. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  190. if (rc) {
  191. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  192. goto exit;
  193. }
  194. }
  195. if (r_config->count) {
  196. rc = gpio_direction_output(r_config->reset_gpio,
  197. r_config->sequence[0].level);
  198. if (rc) {
  199. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  200. goto exit;
  201. }
  202. }
  203. for (i = 0; i < r_config->count; i++) {
  204. gpio_set_value(r_config->reset_gpio,
  205. r_config->sequence[i].level);
  206. if (r_config->sequence[i].sleep_ms)
  207. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  208. (r_config->sequence[i].sleep_ms * 1000) + 100);
  209. }
  210. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  211. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  212. if (rc)
  213. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  214. }
  215. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  216. bool out = true;
  217. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  218. || (panel->reset_config.mode_sel_state
  219. == MODE_GPIO_LOW))
  220. out = false;
  221. else if ((panel->reset_config.mode_sel_state
  222. == MODE_SEL_SINGLE_PORT) ||
  223. (panel->reset_config.mode_sel_state
  224. == MODE_GPIO_HIGH))
  225. out = true;
  226. rc = gpio_direction_output(
  227. panel->reset_config.lcd_mode_sel_gpio, out);
  228. if (rc)
  229. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  230. }
  231. if (gpio_is_valid(panel->panel_test_gpio)) {
  232. rc = gpio_direction_input(panel->panel_test_gpio);
  233. if (rc)
  234. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  235. rc);
  236. }
  237. exit:
  238. return rc;
  239. }
  240. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  241. {
  242. int rc = 0;
  243. struct pinctrl_state *state;
  244. if (panel->host_config.ext_bridge_mode)
  245. return 0;
  246. if (!panel->pinctrl.pinctrl)
  247. return 0;
  248. if (enable)
  249. state = panel->pinctrl.active;
  250. else
  251. state = panel->pinctrl.suspend;
  252. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  253. if (rc)
  254. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  255. panel->name, rc);
  256. return rc;
  257. }
  258. static int dsi_panel_power_on(struct dsi_panel *panel)
  259. {
  260. int rc = 0;
  261. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  262. if (rc) {
  263. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  264. panel->name, rc);
  265. goto exit;
  266. }
  267. rc = dsi_panel_set_pinctrl_state(panel, true);
  268. if (rc) {
  269. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  270. goto error_disable_vregs;
  271. }
  272. rc = dsi_panel_reset(panel);
  273. if (rc) {
  274. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  275. goto error_disable_gpio;
  276. }
  277. goto exit;
  278. error_disable_gpio:
  279. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  280. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  281. if (gpio_is_valid(panel->bl_config.en_gpio))
  282. gpio_set_value(panel->bl_config.en_gpio, 0);
  283. (void)dsi_panel_set_pinctrl_state(panel, false);
  284. error_disable_vregs:
  285. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  286. exit:
  287. return rc;
  288. }
  289. static int dsi_panel_power_off(struct dsi_panel *panel)
  290. {
  291. int rc = 0;
  292. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  293. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  294. if (gpio_is_valid(panel->reset_config.reset_gpio))
  295. gpio_set_value(panel->reset_config.reset_gpio, 0);
  296. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  297. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  298. if (gpio_is_valid(panel->panel_test_gpio)) {
  299. rc = gpio_direction_input(panel->panel_test_gpio);
  300. if (rc)
  301. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  302. rc);
  303. }
  304. rc = dsi_panel_set_pinctrl_state(panel, false);
  305. if (rc) {
  306. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  307. rc);
  308. }
  309. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  310. if (rc)
  311. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  312. panel->name, rc);
  313. return rc;
  314. }
  315. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  316. enum dsi_cmd_set_type type)
  317. {
  318. int rc = 0, i = 0;
  319. ssize_t len;
  320. struct dsi_cmd_desc *cmds;
  321. u32 count;
  322. enum dsi_cmd_set_state state;
  323. struct dsi_display_mode *mode;
  324. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  325. if (!panel || !panel->cur_mode)
  326. return -EINVAL;
  327. mode = panel->cur_mode;
  328. cmds = mode->priv_info->cmd_sets[type].cmds;
  329. count = mode->priv_info->cmd_sets[type].count;
  330. state = mode->priv_info->cmd_sets[type].state;
  331. if (count == 0) {
  332. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  333. panel->name, type);
  334. goto error;
  335. }
  336. for (i = 0; i < count; i++) {
  337. if (state == DSI_CMD_SET_STATE_LP)
  338. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  339. if (cmds->last_command)
  340. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  341. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  342. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  343. len = ops->transfer(panel->host, &cmds->msg);
  344. if (len < 0) {
  345. rc = len;
  346. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  347. goto error;
  348. }
  349. if (cmds->post_wait_ms)
  350. usleep_range(cmds->post_wait_ms*1000,
  351. ((cmds->post_wait_ms*1000)+10));
  352. cmds++;
  353. }
  354. error:
  355. return rc;
  356. }
  357. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  358. {
  359. int rc = 0;
  360. if (panel->host_config.ext_bridge_mode)
  361. return 0;
  362. devm_pinctrl_put(panel->pinctrl.pinctrl);
  363. return rc;
  364. }
  365. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  366. {
  367. int rc = 0;
  368. if (panel->host_config.ext_bridge_mode)
  369. return 0;
  370. /* TODO: pinctrl is defined in dsi dt node */
  371. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  372. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  373. rc = PTR_ERR(panel->pinctrl.pinctrl);
  374. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  375. goto error;
  376. }
  377. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  378. "panel_active");
  379. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  380. rc = PTR_ERR(panel->pinctrl.active);
  381. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  382. goto error;
  383. }
  384. panel->pinctrl.suspend =
  385. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  386. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  387. rc = PTR_ERR(panel->pinctrl.suspend);
  388. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  389. goto error;
  390. }
  391. panel->pinctrl.pwm_pin =
  392. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  393. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  394. panel->pinctrl.pwm_pin = NULL;
  395. DSI_DEBUG("failed to get pinctrl pwm_pin");
  396. }
  397. error:
  398. return rc;
  399. }
  400. static int dsi_panel_wled_register(struct dsi_panel *panel,
  401. struct dsi_backlight_config *bl)
  402. {
  403. struct backlight_device *bd;
  404. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  405. if (!bd) {
  406. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  407. panel->name, -EPROBE_DEFER);
  408. return -EPROBE_DEFER;
  409. }
  410. bl->raw_bd = bd;
  411. return 0;
  412. }
  413. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  414. u32 bl_lvl)
  415. {
  416. int rc = 0;
  417. struct mipi_dsi_device *dsi;
  418. if (!panel || (bl_lvl > 0xffff)) {
  419. DSI_ERR("invalid params\n");
  420. return -EINVAL;
  421. }
  422. dsi = &panel->mipi_device;
  423. if (panel->bl_config.bl_inverted_dbv)
  424. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  425. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  426. if (rc < 0)
  427. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  428. return rc;
  429. }
  430. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  431. u32 bl_lvl)
  432. {
  433. int rc = 0;
  434. u32 duty = 0;
  435. u32 period_ns = 0;
  436. struct dsi_backlight_config *bl;
  437. if (!panel) {
  438. DSI_ERR("Invalid Params\n");
  439. return -EINVAL;
  440. }
  441. bl = &panel->bl_config;
  442. if (!bl->pwm_bl) {
  443. DSI_ERR("pwm device not found\n");
  444. return -EINVAL;
  445. }
  446. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  447. duty = bl_lvl * period_ns;
  448. duty /= bl->bl_max_level;
  449. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  450. if (rc) {
  451. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  452. rc);
  453. goto error;
  454. }
  455. if (bl_lvl == 0 && bl->pwm_enabled) {
  456. pwm_disable(bl->pwm_bl);
  457. bl->pwm_enabled = false;
  458. return 0;
  459. }
  460. if (!bl->pwm_enabled) {
  461. rc = pwm_enable(bl->pwm_bl);
  462. if (rc) {
  463. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  464. rc);
  465. goto error;
  466. }
  467. bl->pwm_enabled = true;
  468. }
  469. error:
  470. return rc;
  471. }
  472. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  473. {
  474. int rc = 0;
  475. struct dsi_backlight_config *bl = &panel->bl_config;
  476. if (panel->host_config.ext_bridge_mode)
  477. return 0;
  478. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  479. switch (bl->type) {
  480. case DSI_BACKLIGHT_WLED:
  481. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  482. break;
  483. case DSI_BACKLIGHT_DCS:
  484. rc = dsi_panel_update_backlight(panel, bl_lvl);
  485. break;
  486. case DSI_BACKLIGHT_EXTERNAL:
  487. break;
  488. case DSI_BACKLIGHT_PWM:
  489. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  490. break;
  491. default:
  492. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  493. rc = -ENOTSUPP;
  494. }
  495. return rc;
  496. }
  497. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  498. {
  499. u32 cur_bl_level;
  500. struct backlight_device *bd = bl->raw_bd;
  501. /* default the brightness level to 50% */
  502. cur_bl_level = bl->bl_max_level >> 1;
  503. switch (bl->type) {
  504. case DSI_BACKLIGHT_WLED:
  505. /* Try to query the backlight level from the backlight device */
  506. if (bd->ops && bd->ops->get_brightness)
  507. cur_bl_level = bd->ops->get_brightness(bd);
  508. break;
  509. case DSI_BACKLIGHT_DCS:
  510. case DSI_BACKLIGHT_EXTERNAL:
  511. case DSI_BACKLIGHT_PWM:
  512. default:
  513. /*
  514. * Ideally, we should read the backlight level from the
  515. * panel. For now, just set it default value.
  516. */
  517. break;
  518. }
  519. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  520. return cur_bl_level;
  521. }
  522. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  523. {
  524. struct dsi_backlight_config *bl = &panel->bl_config;
  525. bl->bl_level = dsi_panel_get_brightness(bl);
  526. }
  527. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  528. {
  529. int rc = 0;
  530. struct dsi_backlight_config *bl = &panel->bl_config;
  531. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  532. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  533. rc = PTR_ERR(bl->pwm_bl);
  534. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  535. rc);
  536. return rc;
  537. }
  538. if (panel->pinctrl.pwm_pin) {
  539. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  540. panel->pinctrl.pwm_pin);
  541. if (rc)
  542. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  543. panel->name, rc);
  544. }
  545. return 0;
  546. }
  547. static int dsi_panel_bl_register(struct dsi_panel *panel)
  548. {
  549. int rc = 0;
  550. struct dsi_backlight_config *bl = &panel->bl_config;
  551. if (panel->host_config.ext_bridge_mode)
  552. return 0;
  553. switch (bl->type) {
  554. case DSI_BACKLIGHT_WLED:
  555. rc = dsi_panel_wled_register(panel, bl);
  556. break;
  557. case DSI_BACKLIGHT_DCS:
  558. break;
  559. case DSI_BACKLIGHT_EXTERNAL:
  560. break;
  561. case DSI_BACKLIGHT_PWM:
  562. rc = dsi_panel_pwm_register(panel);
  563. break;
  564. default:
  565. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  566. rc = -ENOTSUPP;
  567. goto error;
  568. }
  569. error:
  570. return rc;
  571. }
  572. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  573. {
  574. struct dsi_backlight_config *bl = &panel->bl_config;
  575. devm_pwm_put(panel->parent, bl->pwm_bl);
  576. }
  577. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  578. {
  579. int rc = 0;
  580. struct dsi_backlight_config *bl = &panel->bl_config;
  581. if (panel->host_config.ext_bridge_mode)
  582. return 0;
  583. switch (bl->type) {
  584. case DSI_BACKLIGHT_WLED:
  585. break;
  586. case DSI_BACKLIGHT_DCS:
  587. break;
  588. case DSI_BACKLIGHT_EXTERNAL:
  589. break;
  590. case DSI_BACKLIGHT_PWM:
  591. dsi_panel_pwm_unregister(panel);
  592. break;
  593. default:
  594. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  595. rc = -ENOTSUPP;
  596. goto error;
  597. }
  598. error:
  599. return rc;
  600. }
  601. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  602. struct dsi_parser_utils *utils)
  603. {
  604. int rc = 0;
  605. u64 tmp64 = 0;
  606. struct dsi_display_mode *display_mode;
  607. struct dsi_display_mode_priv_info *priv_info;
  608. display_mode = container_of(mode, struct dsi_display_mode, timing);
  609. priv_info = display_mode->priv_info;
  610. rc = utils->read_u64(utils->data,
  611. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  612. if (rc == -EOVERFLOW) {
  613. tmp64 = 0;
  614. rc = utils->read_u32(utils->data,
  615. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  616. }
  617. mode->clk_rate_hz = !rc ? tmp64 : 0;
  618. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  619. mode->pclk_scale.numer = 1;
  620. mode->pclk_scale.denom = 1;
  621. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  622. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  623. &mode->mdp_transfer_time_us);
  624. if (!rc)
  625. display_mode->priv_info->mdp_transfer_time_us =
  626. mode->mdp_transfer_time_us;
  627. else
  628. display_mode->priv_info->mdp_transfer_time_us = 0;
  629. rc = utils->read_u32(utils->data,
  630. "qcom,mdss-dsi-panel-framerate",
  631. &mode->refresh_rate);
  632. if (rc) {
  633. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  634. rc);
  635. goto error;
  636. }
  637. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  638. &mode->h_active);
  639. if (rc) {
  640. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  641. rc);
  642. goto error;
  643. }
  644. rc = utils->read_u32(utils->data,
  645. "qcom,mdss-dsi-h-front-porch",
  646. &mode->h_front_porch);
  647. if (rc) {
  648. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  649. rc);
  650. goto error;
  651. }
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-h-back-porch",
  654. &mode->h_back_porch);
  655. if (rc) {
  656. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  657. rc);
  658. goto error;
  659. }
  660. rc = utils->read_u32(utils->data,
  661. "qcom,mdss-dsi-h-pulse-width",
  662. &mode->h_sync_width);
  663. if (rc) {
  664. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  665. rc);
  666. goto error;
  667. }
  668. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  669. &mode->h_skew);
  670. if (rc)
  671. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  672. rc);
  673. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  674. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  675. mode->h_sync_width);
  676. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  677. &mode->v_active);
  678. if (rc) {
  679. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  680. rc);
  681. goto error;
  682. }
  683. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  684. &mode->v_back_porch);
  685. if (rc) {
  686. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  687. rc);
  688. goto error;
  689. }
  690. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  691. &mode->v_front_porch);
  692. if (rc) {
  693. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  694. rc);
  695. goto error;
  696. }
  697. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  698. &mode->v_sync_width);
  699. if (rc) {
  700. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  701. rc);
  702. goto error;
  703. }
  704. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  705. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  706. mode->v_sync_width);
  707. error:
  708. return rc;
  709. }
  710. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  711. struct dsi_parser_utils *utils,
  712. const char *name)
  713. {
  714. int rc = 0;
  715. u32 bpp = 0;
  716. enum dsi_pixel_format fmt;
  717. const char *packing;
  718. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  719. if (rc) {
  720. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  721. name, rc);
  722. return rc;
  723. }
  724. host->bpp = bpp;
  725. switch (bpp) {
  726. case 3:
  727. fmt = DSI_PIXEL_FORMAT_RGB111;
  728. break;
  729. case 8:
  730. fmt = DSI_PIXEL_FORMAT_RGB332;
  731. break;
  732. case 12:
  733. fmt = DSI_PIXEL_FORMAT_RGB444;
  734. break;
  735. case 16:
  736. fmt = DSI_PIXEL_FORMAT_RGB565;
  737. break;
  738. case 18:
  739. fmt = DSI_PIXEL_FORMAT_RGB666;
  740. break;
  741. case 24:
  742. default:
  743. fmt = DSI_PIXEL_FORMAT_RGB888;
  744. break;
  745. }
  746. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  747. packing = utils->get_property(utils->data,
  748. "qcom,mdss-dsi-pixel-packing",
  749. NULL);
  750. if (packing && !strcmp(packing, "loose"))
  751. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  752. }
  753. host->dst_format = fmt;
  754. return rc;
  755. }
  756. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  757. struct dsi_parser_utils *utils,
  758. const char *name)
  759. {
  760. int rc = 0;
  761. bool lane_enabled;
  762. u32 num_of_lanes = 0;
  763. lane_enabled = utils->read_bool(utils->data,
  764. "qcom,mdss-dsi-lane-0-state");
  765. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  766. lane_enabled = utils->read_bool(utils->data,
  767. "qcom,mdss-dsi-lane-1-state");
  768. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  769. lane_enabled = utils->read_bool(utils->data,
  770. "qcom,mdss-dsi-lane-2-state");
  771. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  772. lane_enabled = utils->read_bool(utils->data,
  773. "qcom,mdss-dsi-lane-3-state");
  774. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  775. if (host->data_lanes & DSI_DATA_LANE_0)
  776. num_of_lanes++;
  777. if (host->data_lanes & DSI_DATA_LANE_1)
  778. num_of_lanes++;
  779. if (host->data_lanes & DSI_DATA_LANE_2)
  780. num_of_lanes++;
  781. if (host->data_lanes & DSI_DATA_LANE_3)
  782. num_of_lanes++;
  783. host->num_data_lanes = num_of_lanes;
  784. if (host->data_lanes == 0) {
  785. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  786. rc = -EINVAL;
  787. }
  788. return rc;
  789. }
  790. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  791. struct dsi_parser_utils *utils,
  792. const char *name)
  793. {
  794. int rc = 0;
  795. const char *swap_mode;
  796. swap_mode = utils->get_property(utils->data,
  797. "qcom,mdss-dsi-color-order", NULL);
  798. if (swap_mode) {
  799. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  800. host->swap_mode = DSI_COLOR_SWAP_RGB;
  801. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  802. host->swap_mode = DSI_COLOR_SWAP_RBG;
  803. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  804. host->swap_mode = DSI_COLOR_SWAP_BRG;
  805. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  806. host->swap_mode = DSI_COLOR_SWAP_GRB;
  807. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  808. host->swap_mode = DSI_COLOR_SWAP_GBR;
  809. } else {
  810. DSI_ERR("[%s] Unrecognized color order-%s\n",
  811. name, swap_mode);
  812. rc = -EINVAL;
  813. }
  814. } else {
  815. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  816. host->swap_mode = DSI_COLOR_SWAP_RGB;
  817. }
  818. /* bit swap on color channel is not defined in dt */
  819. host->bit_swap_red = false;
  820. host->bit_swap_green = false;
  821. host->bit_swap_blue = false;
  822. return rc;
  823. }
  824. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  825. struct dsi_parser_utils *utils,
  826. const char *name)
  827. {
  828. const char *trig;
  829. int rc = 0;
  830. trig = utils->get_property(utils->data,
  831. "qcom,mdss-dsi-mdp-trigger", NULL);
  832. if (trig) {
  833. if (!strcmp(trig, "none")) {
  834. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  835. } else if (!strcmp(trig, "trigger_te")) {
  836. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  837. } else if (!strcmp(trig, "trigger_sw")) {
  838. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  839. } else if (!strcmp(trig, "trigger_sw_te")) {
  840. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  841. } else {
  842. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  843. name, trig);
  844. rc = -EINVAL;
  845. }
  846. } else {
  847. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  848. name);
  849. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  850. }
  851. trig = utils->get_property(utils->data,
  852. "qcom,mdss-dsi-dma-trigger", NULL);
  853. if (trig) {
  854. if (!strcmp(trig, "none")) {
  855. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  856. } else if (!strcmp(trig, "trigger_te")) {
  857. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  858. } else if (!strcmp(trig, "trigger_sw")) {
  859. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  860. } else if (!strcmp(trig, "trigger_sw_seof")) {
  861. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  862. } else if (!strcmp(trig, "trigger_sw_te")) {
  863. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  864. } else {
  865. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  866. name, trig);
  867. rc = -EINVAL;
  868. }
  869. } else {
  870. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  871. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  872. }
  873. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  874. &host->te_mode);
  875. if (rc) {
  876. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  877. host->te_mode = 1;
  878. rc = 0;
  879. }
  880. return rc;
  881. }
  882. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  883. struct dsi_parser_utils *utils,
  884. const char *name)
  885. {
  886. u32 val = 0;
  887. int rc = 0;
  888. bool panel_cphy_mode = false;
  889. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  890. if (!rc) {
  891. host->t_clk_post = val;
  892. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  893. }
  894. val = 0;
  895. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  896. if (!rc) {
  897. host->t_clk_pre = val;
  898. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  899. }
  900. host->ignore_rx_eot = utils->read_bool(utils->data,
  901. "qcom,mdss-dsi-rx-eot-ignore");
  902. host->append_tx_eot = utils->read_bool(utils->data,
  903. "qcom,mdss-dsi-tx-eot-append");
  904. host->ext_bridge_mode = utils->read_bool(utils->data,
  905. "qcom,mdss-dsi-ext-bridge-mode");
  906. host->force_hs_clk_lane = utils->read_bool(utils->data,
  907. "qcom,mdss-dsi-force-clock-lane-hs");
  908. panel_cphy_mode = utils->read_bool(utils->data,
  909. "qcom,panel-cphy-mode");
  910. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  911. : DSI_PHY_TYPE_DPHY;
  912. return 0;
  913. }
  914. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  915. struct dsi_parser_utils *utils,
  916. const char *name)
  917. {
  918. int rc = 0;
  919. u32 val = 0;
  920. bool supported = false;
  921. struct dsi_split_link_config *split_link = &host->split_link;
  922. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  923. if (!supported) {
  924. DSI_DEBUG("[%s] Split link is not supported\n", name);
  925. split_link->split_link_enabled = false;
  926. return;
  927. }
  928. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  929. if (rc || val < 1) {
  930. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  931. split_link->num_sublinks = 2;
  932. } else {
  933. split_link->num_sublinks = val;
  934. }
  935. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  936. if (rc || val < 1) {
  937. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  938. split_link->lanes_per_sublink = 2;
  939. } else {
  940. split_link->lanes_per_sublink = val;
  941. }
  942. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  943. split_link->num_sublinks, split_link->lanes_per_sublink);
  944. split_link->split_link_enabled = true;
  945. }
  946. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  947. {
  948. int rc = 0;
  949. struct dsi_parser_utils *utils = &panel->utils;
  950. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  951. panel->name);
  952. if (rc) {
  953. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  954. panel->name, rc);
  955. goto error;
  956. }
  957. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  958. panel->name);
  959. if (rc) {
  960. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  961. panel->name, rc);
  962. goto error;
  963. }
  964. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  965. panel->name);
  966. if (rc) {
  967. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  968. panel->name, rc);
  969. goto error;
  970. }
  971. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  972. panel->name);
  973. if (rc) {
  974. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  975. panel->name, rc);
  976. goto error;
  977. }
  978. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  979. panel->name);
  980. if (rc) {
  981. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  982. panel->name, rc);
  983. goto error;
  984. }
  985. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  986. panel->name);
  987. error:
  988. return rc;
  989. }
  990. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  991. struct device_node *of_node)
  992. {
  993. int rc = 0;
  994. u32 val = 0;
  995. rc = of_property_read_u32(of_node,
  996. "qcom,mdss-dsi-qsync-min-refresh-rate",
  997. &val);
  998. if (rc)
  999. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1000. panel->name, rc);
  1001. panel->qsync_min_fps = val;
  1002. return rc;
  1003. }
  1004. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1005. {
  1006. int rc = 0;
  1007. bool supported = false;
  1008. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1009. struct dsi_parser_utils *utils = &panel->utils;
  1010. const char *name = panel->name;
  1011. const char *type;
  1012. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1013. if (!supported) {
  1014. dyn_clk_caps->dyn_clk_support = false;
  1015. return rc;
  1016. }
  1017. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1018. "qcom,dsi-dyn-clk-list");
  1019. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1020. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1021. return -EINVAL;
  1022. }
  1023. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1024. sizeof(u32), GFP_KERNEL);
  1025. if (!dyn_clk_caps->bit_clk_list)
  1026. return -ENOMEM;
  1027. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1028. dyn_clk_caps->bit_clk_list,
  1029. dyn_clk_caps->bit_clk_list_len);
  1030. if (rc) {
  1031. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1032. return -EINVAL;
  1033. }
  1034. dyn_clk_caps->dyn_clk_support = true;
  1035. type = utils->get_property(utils->data,
  1036. "qcom,dsi-dyn-clk-type", NULL);
  1037. if (!type) {
  1038. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1039. dyn_clk_caps->maintain_const_fps = false;
  1040. return 0;
  1041. }
  1042. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1043. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1044. dyn_clk_caps->maintain_const_fps = true;
  1045. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1046. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1047. dyn_clk_caps->maintain_const_fps = true;
  1048. } else {
  1049. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1050. dyn_clk_caps->maintain_const_fps = false;
  1051. }
  1052. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1053. return 0;
  1054. }
  1055. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1056. {
  1057. int rc = 0;
  1058. bool supported = false;
  1059. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1060. struct dsi_parser_utils *utils = &panel->utils;
  1061. const char *name = panel->name;
  1062. const char *type;
  1063. u32 i;
  1064. supported = utils->read_bool(utils->data,
  1065. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1066. if (!supported) {
  1067. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1068. dfps_caps->dfps_support = false;
  1069. return rc;
  1070. }
  1071. type = utils->get_property(utils->data,
  1072. "qcom,mdss-dsi-pan-fps-update", NULL);
  1073. if (!type) {
  1074. DSI_ERR("[%s] dfps type not defined\n", name);
  1075. rc = -EINVAL;
  1076. goto error;
  1077. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1078. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1079. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1080. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1081. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1082. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1083. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1084. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1085. } else {
  1086. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1087. rc = -EINVAL;
  1088. goto error;
  1089. }
  1090. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1091. "qcom,dsi-supported-dfps-list");
  1092. if (dfps_caps->dfps_list_len < 1) {
  1093. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1094. rc = -EINVAL;
  1095. goto error;
  1096. }
  1097. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1098. GFP_KERNEL);
  1099. if (!dfps_caps->dfps_list) {
  1100. rc = -ENOMEM;
  1101. goto error;
  1102. }
  1103. rc = utils->read_u32_array(utils->data,
  1104. "qcom,dsi-supported-dfps-list",
  1105. dfps_caps->dfps_list,
  1106. dfps_caps->dfps_list_len);
  1107. if (rc) {
  1108. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1109. rc = -EINVAL;
  1110. goto error;
  1111. }
  1112. dfps_caps->dfps_support = true;
  1113. /* calculate max and min fps */
  1114. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1115. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1116. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1117. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1118. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1119. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1120. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1121. }
  1122. error:
  1123. return rc;
  1124. }
  1125. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1126. struct dsi_parser_utils *utils,
  1127. const char *name)
  1128. {
  1129. int rc = 0;
  1130. const char *traffic_mode;
  1131. u32 vc_id = 0;
  1132. u32 val = 0;
  1133. u32 line_no = 0;
  1134. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1135. if (rc) {
  1136. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1137. cfg->pulse_mode_hsa_he = false;
  1138. } else if (val == 1) {
  1139. cfg->pulse_mode_hsa_he = true;
  1140. } else if (val == 0) {
  1141. cfg->pulse_mode_hsa_he = false;
  1142. } else {
  1143. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1144. name);
  1145. rc = -EINVAL;
  1146. goto error;
  1147. }
  1148. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1149. "qcom,mdss-dsi-hfp-power-mode");
  1150. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1151. "qcom,mdss-dsi-hbp-power-mode");
  1152. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1153. "qcom,mdss-dsi-hsa-power-mode");
  1154. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1155. "qcom,mdss-dsi-last-line-interleave");
  1156. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1157. "qcom,mdss-dsi-bllp-eof-power-mode");
  1158. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1159. "qcom,mdss-dsi-bllp-power-mode");
  1160. traffic_mode = utils->get_property(utils->data,
  1161. "qcom,mdss-dsi-traffic-mode",
  1162. NULL);
  1163. if (!traffic_mode) {
  1164. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1165. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1166. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1167. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1168. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1169. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1170. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1171. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1172. } else {
  1173. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1174. traffic_mode);
  1175. rc = -EINVAL;
  1176. goto error;
  1177. }
  1178. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1179. &vc_id);
  1180. if (rc) {
  1181. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1182. cfg->vc_id = 0;
  1183. } else {
  1184. cfg->vc_id = vc_id;
  1185. }
  1186. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1187. &line_no);
  1188. if (rc) {
  1189. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1190. cfg->dma_sched_line = 0x1;
  1191. /* do not fail since we have default value */
  1192. rc = 0;
  1193. } else {
  1194. cfg->dma_sched_line = line_no;
  1195. }
  1196. error:
  1197. return rc;
  1198. }
  1199. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1200. struct dsi_parser_utils *utils,
  1201. const char *name)
  1202. {
  1203. u32 val = 0;
  1204. int rc = 0;
  1205. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1206. if (rc) {
  1207. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1208. cfg->wr_mem_start = 0x2C;
  1209. } else {
  1210. cfg->wr_mem_start = val;
  1211. }
  1212. val = 0;
  1213. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1214. &val);
  1215. if (rc) {
  1216. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1217. cfg->wr_mem_continue = 0x3C;
  1218. } else {
  1219. cfg->wr_mem_continue = val;
  1220. }
  1221. /* TODO: fix following */
  1222. cfg->max_cmd_packets_interleave = 0;
  1223. val = 0;
  1224. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1225. &val);
  1226. if (rc) {
  1227. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1228. cfg->insert_dcs_command = true;
  1229. } else if (val == 1) {
  1230. cfg->insert_dcs_command = true;
  1231. } else if (val == 0) {
  1232. cfg->insert_dcs_command = false;
  1233. } else {
  1234. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1235. name);
  1236. rc = -EINVAL;
  1237. goto error;
  1238. }
  1239. error:
  1240. return rc;
  1241. }
  1242. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1243. {
  1244. int rc = 0;
  1245. struct dsi_parser_utils *utils = &panel->utils;
  1246. bool panel_mode_switch_enabled;
  1247. enum dsi_op_mode panel_mode;
  1248. const char *mode;
  1249. mode = utils->get_property(utils->data,
  1250. "qcom,mdss-dsi-panel-type", NULL);
  1251. if (!mode) {
  1252. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1253. panel_mode = DSI_OP_VIDEO_MODE;
  1254. } else if (!strcmp(mode, "dsi_video_mode")) {
  1255. panel_mode = DSI_OP_VIDEO_MODE;
  1256. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1257. panel_mode = DSI_OP_CMD_MODE;
  1258. } else {
  1259. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1260. rc = -EINVAL;
  1261. goto error;
  1262. }
  1263. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1264. "qcom,mdss-dsi-panel-mode-switch");
  1265. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1266. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1267. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1268. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1269. utils,
  1270. panel->name);
  1271. if (rc) {
  1272. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1273. panel->name, rc);
  1274. goto error;
  1275. }
  1276. }
  1277. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1278. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1279. utils,
  1280. panel->name);
  1281. if (rc) {
  1282. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1283. panel->name, rc);
  1284. goto error;
  1285. }
  1286. }
  1287. panel->poms_align_vsync = utils->read_bool(utils->data,
  1288. "qcom,poms-align-panel-vsync");
  1289. panel->panel_mode = panel_mode;
  1290. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1291. error:
  1292. return rc;
  1293. }
  1294. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1295. {
  1296. int rc = 0;
  1297. u32 val = 0;
  1298. const char *str;
  1299. struct dsi_panel_phy_props *props = &panel->phy_props;
  1300. struct dsi_parser_utils *utils = &panel->utils;
  1301. const char *name = panel->name;
  1302. rc = utils->read_u32(utils->data,
  1303. "qcom,mdss-pan-physical-width-dimension", &val);
  1304. if (rc) {
  1305. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1306. props->panel_width_mm = 0;
  1307. rc = 0;
  1308. } else {
  1309. props->panel_width_mm = val;
  1310. }
  1311. rc = utils->read_u32(utils->data,
  1312. "qcom,mdss-pan-physical-height-dimension",
  1313. &val);
  1314. if (rc) {
  1315. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1316. props->panel_height_mm = 0;
  1317. rc = 0;
  1318. } else {
  1319. props->panel_height_mm = val;
  1320. }
  1321. str = utils->get_property(utils->data,
  1322. "qcom,mdss-dsi-panel-orientation", NULL);
  1323. if (!str) {
  1324. props->rotation = DSI_PANEL_ROTATE_NONE;
  1325. } else if (!strcmp(str, "180")) {
  1326. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1327. } else if (!strcmp(str, "hflip")) {
  1328. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1329. } else if (!strcmp(str, "vflip")) {
  1330. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1331. } else {
  1332. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1333. rc = -EINVAL;
  1334. goto error;
  1335. }
  1336. error:
  1337. return rc;
  1338. }
  1339. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1340. "qcom,mdss-dsi-pre-on-command",
  1341. "qcom,mdss-dsi-on-command",
  1342. "qcom,mdss-dsi-post-panel-on-command",
  1343. "qcom,mdss-dsi-pre-off-command",
  1344. "qcom,mdss-dsi-off-command",
  1345. "qcom,mdss-dsi-post-off-command",
  1346. "qcom,mdss-dsi-pre-res-switch",
  1347. "qcom,mdss-dsi-res-switch",
  1348. "qcom,mdss-dsi-post-res-switch",
  1349. "qcom,cmd-to-video-mode-switch-commands",
  1350. "qcom,cmd-to-video-mode-post-switch-commands",
  1351. "qcom,video-to-cmd-mode-switch-commands",
  1352. "qcom,video-to-cmd-mode-post-switch-commands",
  1353. "qcom,mdss-dsi-panel-status-command",
  1354. "qcom,mdss-dsi-lp1-command",
  1355. "qcom,mdss-dsi-lp2-command",
  1356. "qcom,mdss-dsi-nolp-command",
  1357. "PPS not parsed from DTSI, generated dynamically",
  1358. "ROI not parsed from DTSI, generated dynamically",
  1359. "qcom,mdss-dsi-timing-switch-command",
  1360. "qcom,mdss-dsi-post-mode-switch-on-command",
  1361. "qcom,mdss-dsi-qsync-on-commands",
  1362. "qcom,mdss-dsi-qsync-off-commands",
  1363. };
  1364. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1365. "qcom,mdss-dsi-pre-on-command-state",
  1366. "qcom,mdss-dsi-on-command-state",
  1367. "qcom,mdss-dsi-post-on-command-state",
  1368. "qcom,mdss-dsi-pre-off-command-state",
  1369. "qcom,mdss-dsi-off-command-state",
  1370. "qcom,mdss-dsi-post-off-command-state",
  1371. "qcom,mdss-dsi-pre-res-switch-state",
  1372. "qcom,mdss-dsi-res-switch-state",
  1373. "qcom,mdss-dsi-post-res-switch-state",
  1374. "qcom,cmd-to-video-mode-switch-commands-state",
  1375. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1376. "qcom,video-to-cmd-mode-switch-commands-state",
  1377. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1378. "qcom,mdss-dsi-panel-status-command-state",
  1379. "qcom,mdss-dsi-lp1-command-state",
  1380. "qcom,mdss-dsi-lp2-command-state",
  1381. "qcom,mdss-dsi-nolp-command-state",
  1382. "PPS not parsed from DTSI, generated dynamically",
  1383. "ROI not parsed from DTSI, generated dynamically",
  1384. "qcom,mdss-dsi-timing-switch-command-state",
  1385. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1386. "qcom,mdss-dsi-qsync-on-commands-state",
  1387. "qcom,mdss-dsi-qsync-off-commands-state",
  1388. };
  1389. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1390. {
  1391. const u32 cmd_set_min_size = 7;
  1392. u32 count = 0;
  1393. u32 packet_length;
  1394. u32 tmp;
  1395. while (length >= cmd_set_min_size) {
  1396. packet_length = cmd_set_min_size;
  1397. tmp = ((data[5] << 8) | (data[6]));
  1398. packet_length += tmp;
  1399. if (packet_length > length) {
  1400. DSI_ERR("format error\n");
  1401. return -EINVAL;
  1402. }
  1403. length -= packet_length;
  1404. data += packet_length;
  1405. count++;
  1406. }
  1407. *cnt = count;
  1408. return 0;
  1409. }
  1410. static int dsi_panel_create_cmd_packets(const char *data,
  1411. u32 length,
  1412. u32 count,
  1413. struct dsi_cmd_desc *cmd)
  1414. {
  1415. int rc = 0;
  1416. int i, j;
  1417. u8 *payload;
  1418. for (i = 0; i < count; i++) {
  1419. u32 size;
  1420. cmd[i].msg.type = data[0];
  1421. cmd[i].last_command = (data[1] == 1);
  1422. cmd[i].msg.channel = data[2];
  1423. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1424. cmd[i].msg.ctrl = 0;
  1425. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1426. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1427. size = cmd[i].msg.tx_len * sizeof(u8);
  1428. payload = kzalloc(size, GFP_KERNEL);
  1429. if (!payload) {
  1430. rc = -ENOMEM;
  1431. goto error_free_payloads;
  1432. }
  1433. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1434. payload[j] = data[7 + j];
  1435. cmd[i].msg.tx_buf = payload;
  1436. data += (7 + cmd[i].msg.tx_len);
  1437. }
  1438. return rc;
  1439. error_free_payloads:
  1440. for (i = i - 1; i >= 0; i--) {
  1441. cmd--;
  1442. kfree(cmd->msg.tx_buf);
  1443. }
  1444. return rc;
  1445. }
  1446. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1447. {
  1448. u32 i = 0;
  1449. struct dsi_cmd_desc *cmd;
  1450. for (i = 0; i < set->count; i++) {
  1451. cmd = &set->cmds[i];
  1452. kfree(cmd->msg.tx_buf);
  1453. }
  1454. }
  1455. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1456. {
  1457. kfree(set->cmds);
  1458. }
  1459. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1460. u32 packet_count)
  1461. {
  1462. u32 size;
  1463. size = packet_count * sizeof(*cmd->cmds);
  1464. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1465. if (!cmd->cmds)
  1466. return -ENOMEM;
  1467. cmd->count = packet_count;
  1468. return 0;
  1469. }
  1470. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1471. enum dsi_cmd_set_type type,
  1472. struct dsi_parser_utils *utils)
  1473. {
  1474. int rc = 0;
  1475. u32 length = 0;
  1476. const char *data;
  1477. const char *state;
  1478. u32 packet_count = 0;
  1479. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1480. &length);
  1481. if (!data) {
  1482. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1483. rc = -ENOTSUPP;
  1484. goto error;
  1485. }
  1486. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1487. cmd_set_prop_map[type], length);
  1488. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1489. 8, 1, data, length, false);
  1490. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1491. if (rc) {
  1492. DSI_ERR("commands failed, rc=%d\n", rc);
  1493. goto error;
  1494. }
  1495. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1496. packet_count, length);
  1497. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1498. if (rc) {
  1499. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1500. goto error;
  1501. }
  1502. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1503. cmd->cmds);
  1504. if (rc) {
  1505. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1506. goto error_free_mem;
  1507. }
  1508. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1509. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1510. cmd->state = DSI_CMD_SET_STATE_LP;
  1511. } else if (!strcmp(state, "dsi_hs_mode")) {
  1512. cmd->state = DSI_CMD_SET_STATE_HS;
  1513. } else {
  1514. DSI_ERR("[%s] command state unrecognized-%s\n",
  1515. cmd_set_state_map[type], state);
  1516. goto error_free_mem;
  1517. }
  1518. return rc;
  1519. error_free_mem:
  1520. kfree(cmd->cmds);
  1521. cmd->cmds = NULL;
  1522. error:
  1523. return rc;
  1524. }
  1525. static int dsi_panel_parse_cmd_sets(
  1526. struct dsi_display_mode_priv_info *priv_info,
  1527. struct dsi_parser_utils *utils)
  1528. {
  1529. int rc = 0;
  1530. struct dsi_panel_cmd_set *set;
  1531. u32 i;
  1532. if (!priv_info) {
  1533. DSI_ERR("invalid mode priv info\n");
  1534. return -EINVAL;
  1535. }
  1536. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1537. set = &priv_info->cmd_sets[i];
  1538. set->type = i;
  1539. set->count = 0;
  1540. if (i == DSI_CMD_SET_PPS) {
  1541. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1542. if (rc)
  1543. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1544. i, rc);
  1545. set->state = DSI_CMD_SET_STATE_LP;
  1546. } else {
  1547. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1548. if (rc)
  1549. DSI_DEBUG("failed to parse set %d\n", i);
  1550. }
  1551. }
  1552. rc = 0;
  1553. return rc;
  1554. }
  1555. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1556. {
  1557. int rc = 0;
  1558. int i;
  1559. u32 length = 0;
  1560. u32 count = 0;
  1561. u32 size = 0;
  1562. u32 *arr_32 = NULL;
  1563. const u32 *arr;
  1564. struct dsi_parser_utils *utils = &panel->utils;
  1565. struct dsi_reset_seq *seq;
  1566. if (panel->host_config.ext_bridge_mode)
  1567. return 0;
  1568. arr = utils->get_property(utils->data,
  1569. "qcom,mdss-dsi-reset-sequence", &length);
  1570. if (!arr) {
  1571. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1572. rc = -EINVAL;
  1573. goto error;
  1574. }
  1575. if (length & 0x1) {
  1576. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1577. panel->name);
  1578. rc = -EINVAL;
  1579. goto error;
  1580. }
  1581. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1582. length = length / sizeof(u32);
  1583. size = length * sizeof(u32);
  1584. arr_32 = kzalloc(size, GFP_KERNEL);
  1585. if (!arr_32) {
  1586. rc = -ENOMEM;
  1587. goto error;
  1588. }
  1589. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1590. arr_32, length);
  1591. if (rc) {
  1592. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1593. goto error_free_arr_32;
  1594. }
  1595. count = length / 2;
  1596. size = count * sizeof(*seq);
  1597. seq = kzalloc(size, GFP_KERNEL);
  1598. if (!seq) {
  1599. rc = -ENOMEM;
  1600. goto error_free_arr_32;
  1601. }
  1602. panel->reset_config.sequence = seq;
  1603. panel->reset_config.count = count;
  1604. for (i = 0; i < length; i += 2) {
  1605. seq->level = arr_32[i];
  1606. seq->sleep_ms = arr_32[i + 1];
  1607. seq++;
  1608. }
  1609. error_free_arr_32:
  1610. kfree(arr_32);
  1611. error:
  1612. return rc;
  1613. }
  1614. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1615. {
  1616. struct dsi_parser_utils *utils = &panel->utils;
  1617. const char *string;
  1618. int i, rc = 0;
  1619. panel->ulps_feature_enabled =
  1620. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1621. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1622. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1623. panel->ulps_suspend_enabled =
  1624. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1625. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1626. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1627. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1628. "qcom,mdss-dsi-te-using-wd");
  1629. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1630. "qcom,cmd-sync-wait-broadcast");
  1631. panel->lp11_init = utils->read_bool(utils->data,
  1632. "qcom,mdss-dsi-lp11-init");
  1633. panel->spr_info.enable = false;
  1634. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1635. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1636. if (!rc) {
  1637. // find match for pack-type string
  1638. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1639. if (msm_spr_pack_type_str[i] &&
  1640. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1641. panel->spr_info.enable = true;
  1642. panel->spr_info.pack_type = i;
  1643. break;
  1644. }
  1645. }
  1646. }
  1647. pr_debug("%s source side spr packing, pack-type %s\n",
  1648. panel->spr_info.enable ? "enable" : "disable",
  1649. panel->spr_info.enable ?
  1650. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1651. return 0;
  1652. }
  1653. static int dsi_panel_parse_jitter_config(
  1654. struct dsi_display_mode *mode,
  1655. struct dsi_parser_utils *utils)
  1656. {
  1657. int rc;
  1658. struct dsi_display_mode_priv_info *priv_info;
  1659. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1660. u64 jitter_val = 0;
  1661. priv_info = mode->priv_info;
  1662. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1663. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1664. if (rc) {
  1665. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1666. } else {
  1667. jitter_val = jitter[0];
  1668. jitter_val = div_u64(jitter_val, jitter[1]);
  1669. }
  1670. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1671. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1672. priv_info->panel_jitter_denom =
  1673. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1674. } else {
  1675. priv_info->panel_jitter_numer = jitter[0];
  1676. priv_info->panel_jitter_denom = jitter[1];
  1677. }
  1678. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1679. &priv_info->panel_prefill_lines);
  1680. if (rc) {
  1681. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1682. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1683. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1684. } else if (priv_info->panel_prefill_lines >=
  1685. DSI_V_TOTAL(&mode->timing)) {
  1686. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1687. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1688. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1689. }
  1690. return 0;
  1691. }
  1692. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1693. {
  1694. int rc = 0;
  1695. char *supply_name;
  1696. if (panel->host_config.ext_bridge_mode)
  1697. return 0;
  1698. if (!strcmp(panel->type, "primary"))
  1699. supply_name = "qcom,panel-supply-entries";
  1700. else
  1701. supply_name = "qcom,panel-sec-supply-entries";
  1702. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1703. &panel->power_info, supply_name);
  1704. if (rc) {
  1705. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1706. goto error;
  1707. }
  1708. error:
  1709. return rc;
  1710. }
  1711. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1712. {
  1713. int rc = 0;
  1714. const char *data;
  1715. struct dsi_parser_utils *utils = &panel->utils;
  1716. char *reset_gpio_name, *mode_set_gpio_name;
  1717. if (!strcmp(panel->type, "primary")) {
  1718. reset_gpio_name = "qcom,platform-reset-gpio";
  1719. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1720. } else {
  1721. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1722. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1723. }
  1724. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1725. reset_gpio_name, 0);
  1726. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1727. !panel->host_config.ext_bridge_mode) {
  1728. rc = panel->reset_config.reset_gpio;
  1729. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1730. goto error;
  1731. }
  1732. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1733. "qcom,5v-boost-gpio",
  1734. 0);
  1735. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1736. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1737. panel->name, rc);
  1738. panel->reset_config.disp_en_gpio =
  1739. utils->get_named_gpio(utils->data,
  1740. "qcom,platform-en-gpio", 0);
  1741. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1742. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1743. panel->name, rc);
  1744. }
  1745. }
  1746. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1747. utils->data, mode_set_gpio_name, 0);
  1748. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1749. DSI_DEBUG("mode gpio not specified\n");
  1750. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1751. data = utils->get_property(utils->data,
  1752. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1753. if (data) {
  1754. if (!strcmp(data, "single_port"))
  1755. panel->reset_config.mode_sel_state =
  1756. MODE_SEL_SINGLE_PORT;
  1757. else if (!strcmp(data, "dual_port"))
  1758. panel->reset_config.mode_sel_state =
  1759. MODE_SEL_DUAL_PORT;
  1760. else if (!strcmp(data, "high"))
  1761. panel->reset_config.mode_sel_state =
  1762. MODE_GPIO_HIGH;
  1763. else if (!strcmp(data, "low"))
  1764. panel->reset_config.mode_sel_state =
  1765. MODE_GPIO_LOW;
  1766. } else {
  1767. /* Set default mode as SPLIT mode */
  1768. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1769. }
  1770. /* TODO: release memory */
  1771. rc = dsi_panel_parse_reset_sequence(panel);
  1772. if (rc) {
  1773. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1774. panel->name, rc);
  1775. goto error;
  1776. }
  1777. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1778. "qcom,mdss-dsi-panel-test-pin",
  1779. 0);
  1780. if (!gpio_is_valid(panel->panel_test_gpio))
  1781. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1782. __LINE__);
  1783. error:
  1784. return rc;
  1785. }
  1786. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1787. {
  1788. int rc = 0;
  1789. u32 val;
  1790. struct dsi_backlight_config *config = &panel->bl_config;
  1791. struct dsi_parser_utils *utils = &panel->utils;
  1792. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1793. &val);
  1794. if (rc) {
  1795. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1796. goto error;
  1797. }
  1798. config->pwm_period_usecs = val;
  1799. error:
  1800. return rc;
  1801. }
  1802. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1803. {
  1804. int rc = 0;
  1805. u32 val = 0;
  1806. const char *bl_type;
  1807. const char *data;
  1808. struct dsi_parser_utils *utils = &panel->utils;
  1809. char *bl_name;
  1810. if (!strcmp(panel->type, "primary"))
  1811. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1812. else
  1813. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1814. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1815. if (!bl_type) {
  1816. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1817. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1818. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1819. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1820. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1821. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1822. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1823. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1824. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1825. } else {
  1826. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1827. panel->name, bl_type);
  1828. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1829. }
  1830. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1831. if (!data) {
  1832. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1833. } else if (!strcmp(data, "delay_until_first_frame")) {
  1834. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1835. } else {
  1836. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1837. panel->name, data);
  1838. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1839. }
  1840. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1841. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1842. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1843. if (rc) {
  1844. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1845. panel->name);
  1846. panel->bl_config.bl_min_level = 0;
  1847. } else {
  1848. panel->bl_config.bl_min_level = val;
  1849. }
  1850. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1851. if (rc) {
  1852. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1853. panel->name);
  1854. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1855. } else {
  1856. panel->bl_config.bl_max_level = val;
  1857. }
  1858. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1859. &val);
  1860. if (rc) {
  1861. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1862. panel->name);
  1863. panel->bl_config.brightness_max_level = 255;
  1864. rc = 0;
  1865. } else {
  1866. panel->bl_config.brightness_max_level = val;
  1867. }
  1868. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1869. "qcom,mdss-dsi-bl-inverted-dbv");
  1870. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1871. rc = dsi_panel_parse_bl_pwm_config(panel);
  1872. if (rc) {
  1873. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1874. panel->name, rc);
  1875. goto error;
  1876. }
  1877. }
  1878. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1879. "qcom,platform-bklight-en-gpio",
  1880. 0);
  1881. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1882. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1883. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1884. panel->name, rc);
  1885. rc = -EPROBE_DEFER;
  1886. goto error;
  1887. } else {
  1888. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1889. panel->name, rc);
  1890. rc = 0;
  1891. goto error;
  1892. }
  1893. }
  1894. error:
  1895. return rc;
  1896. }
  1897. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1898. struct dsi_parser_utils *utils)
  1899. {
  1900. const char *data;
  1901. u32 len, i;
  1902. int rc = 0;
  1903. struct dsi_display_mode_priv_info *priv_info;
  1904. u64 pixel_clk_khz;
  1905. if (!mode || !mode->priv_info)
  1906. return -EINVAL;
  1907. priv_info = mode->priv_info;
  1908. data = utils->get_property(utils->data,
  1909. "qcom,mdss-dsi-panel-phy-timings", &len);
  1910. if (!data) {
  1911. DSI_DEBUG("Unable to read Phy timing settings\n");
  1912. } else {
  1913. priv_info->phy_timing_val =
  1914. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1915. if (!priv_info->phy_timing_val)
  1916. return -EINVAL;
  1917. for (i = 0; i < len; i++)
  1918. priv_info->phy_timing_val[i] = data[i];
  1919. priv_info->phy_timing_len = len;
  1920. }
  1921. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1922. /*
  1923. * For command mode we update the pclk as part of
  1924. * function dsi_panel_calc_dsi_transfer_time( )
  1925. * as we set it based on dsi clock or mdp transfer time.
  1926. */
  1927. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1928. DSI_V_TOTAL(&mode->timing) *
  1929. mode->timing.refresh_rate);
  1930. do_div(pixel_clk_khz, 1000);
  1931. mode->pixel_clk_khz = pixel_clk_khz;
  1932. }
  1933. return rc;
  1934. }
  1935. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1936. struct dsi_parser_utils *utils)
  1937. {
  1938. u32 data;
  1939. int rc = -EINVAL;
  1940. int intf_width;
  1941. const char *compression;
  1942. struct dsi_display_mode_priv_info *priv_info;
  1943. if (!mode || !mode->priv_info)
  1944. return -EINVAL;
  1945. priv_info = mode->priv_info;
  1946. priv_info->dsc_enabled = false;
  1947. compression = utils->get_property(utils->data,
  1948. "qcom,compression-mode", NULL);
  1949. if (compression && !strcmp(compression, "dsc"))
  1950. priv_info->dsc_enabled = true;
  1951. if (!priv_info->dsc_enabled) {
  1952. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1953. return 0;
  1954. }
  1955. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1956. if (rc) {
  1957. priv_info->dsc.config.dsc_version_major = 0x1;
  1958. priv_info->dsc.config.dsc_version_minor = 0x1;
  1959. rc = 0;
  1960. } else {
  1961. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1962. * major version information
  1963. */
  1964. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1965. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1966. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1967. ((priv_info->dsc.config.dsc_version_minor
  1968. != 0x1) ||
  1969. (priv_info->dsc.config.dsc_version_minor
  1970. != 0x2))) {
  1971. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1972. __func__,
  1973. priv_info->dsc.config.dsc_version_major,
  1974. priv_info->dsc.config.dsc_version_minor
  1975. );
  1976. rc = -EINVAL;
  1977. goto error;
  1978. }
  1979. }
  1980. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1981. if (rc) {
  1982. priv_info->dsc.scr_rev = 0x0;
  1983. rc = 0;
  1984. } else {
  1985. priv_info->dsc.scr_rev = data & 0xff;
  1986. /* only one scr rev supported */
  1987. if (priv_info->dsc.scr_rev > 0x1) {
  1988. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1989. __func__, priv_info->dsc.scr_rev);
  1990. rc = -EINVAL;
  1991. goto error;
  1992. }
  1993. }
  1994. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1995. if (rc) {
  1996. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1997. goto error;
  1998. }
  1999. priv_info->dsc.config.slice_height = data;
  2000. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2001. if (rc) {
  2002. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2003. goto error;
  2004. }
  2005. priv_info->dsc.config.slice_width = data;
  2006. intf_width = mode->timing.h_active;
  2007. if (intf_width % priv_info->dsc.config.slice_width) {
  2008. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2009. intf_width, priv_info->dsc.config.slice_width);
  2010. rc = -EINVAL;
  2011. goto error;
  2012. }
  2013. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2014. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2015. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2016. if (rc) {
  2017. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2018. goto error;
  2019. } else if (!data || (data > 2)) {
  2020. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2021. goto error;
  2022. }
  2023. priv_info->dsc.slice_per_pkt = data;
  2024. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2025. &data);
  2026. if (rc) {
  2027. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2028. goto error;
  2029. }
  2030. priv_info->dsc.config.bits_per_component = data;
  2031. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2032. if (rc) {
  2033. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2034. data = 0;
  2035. }
  2036. priv_info->dsc.pps_delay_ms = data;
  2037. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2038. &data);
  2039. if (rc) {
  2040. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2041. goto error;
  2042. }
  2043. priv_info->dsc.config.bits_per_pixel = data << 4;
  2044. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2045. &data);
  2046. if (rc) {
  2047. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2048. rc = 0;
  2049. data = MSM_CHROMA_444;
  2050. }
  2051. priv_info->dsc.chroma_format = data;
  2052. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2053. &data);
  2054. if (rc) {
  2055. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2056. rc = 0;
  2057. data = MSM_RGB;
  2058. }
  2059. priv_info->dsc.source_color_space = data;
  2060. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2061. "qcom,mdss-dsc-block-prediction-enable");
  2062. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2063. priv_info->dsc.config.slice_width);
  2064. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2065. priv_info->dsc.scr_rev);
  2066. if (rc) {
  2067. DSI_DEBUG("failed populating dsc params\n");
  2068. rc = -EINVAL;
  2069. goto error;
  2070. }
  2071. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2072. if (rc) {
  2073. DSI_DEBUG("failed populating other dsc params\n");
  2074. rc = -EINVAL;
  2075. goto error;
  2076. }
  2077. priv_info->pclk_scale.numer =
  2078. priv_info->dsc.config.bits_per_pixel >> 4;
  2079. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2080. priv_info->dsc.chroma_format,
  2081. priv_info->dsc.config.bits_per_component);
  2082. mode->timing.dsc_enabled = true;
  2083. mode->timing.dsc = &priv_info->dsc;
  2084. mode->timing.pclk_scale = priv_info->pclk_scale;
  2085. error:
  2086. return rc;
  2087. }
  2088. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2089. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2090. {
  2091. u32 data;
  2092. int rc = -EINVAL;
  2093. const char *compression;
  2094. struct dsi_display_mode_priv_info *priv_info;
  2095. int intf_width;
  2096. if (!mode || !mode->priv_info)
  2097. return -EINVAL;
  2098. priv_info = mode->priv_info;
  2099. priv_info->vdc_enabled = false;
  2100. compression = utils->get_property(utils->data,
  2101. "qcom,compression-mode", NULL);
  2102. if (compression && !strcmp(compression, "vdc"))
  2103. priv_info->vdc_enabled = true;
  2104. if (!priv_info->vdc_enabled) {
  2105. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2106. return 0;
  2107. }
  2108. priv_info->vdc.panel_mode = panel_mode;
  2109. priv_info->vdc.traffic_mode = traffic_mode;
  2110. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2111. if (rc) {
  2112. priv_info->vdc.version_major = 0x1;
  2113. priv_info->vdc.version_minor = 0x2;
  2114. priv_info->vdc.version_release = 0x0;
  2115. rc = 0;
  2116. } else {
  2117. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2118. * major version information
  2119. */
  2120. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2121. priv_info->vdc.version_minor = data & 0x0F;
  2122. if ((priv_info->vdc.version_major != 0x1) &&
  2123. ((priv_info->vdc.version_minor
  2124. != 0x2))) {
  2125. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2126. __func__,
  2127. priv_info->vdc.version_major,
  2128. priv_info->vdc.version_minor
  2129. );
  2130. rc = -EINVAL;
  2131. goto error;
  2132. }
  2133. }
  2134. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2135. if (rc) {
  2136. priv_info->vdc.version_release = 0x0;
  2137. rc = 0;
  2138. } else {
  2139. priv_info->vdc.version_release = data & 0xff;
  2140. /* only one release version is supported */
  2141. if (priv_info->vdc.version_release != 0x0) {
  2142. DSI_ERR("unsupported vdc release version %d\n",
  2143. priv_info->vdc.version_release);
  2144. rc = -EINVAL;
  2145. goto error;
  2146. }
  2147. }
  2148. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2149. priv_info->vdc.version_major,
  2150. priv_info->vdc.version_minor,
  2151. priv_info->vdc.version_release);
  2152. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2153. if (rc) {
  2154. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2155. goto error;
  2156. }
  2157. priv_info->vdc.slice_height = data;
  2158. /* slice height should be atleast 16 lines */
  2159. if (priv_info->vdc.slice_height < 16) {
  2160. DSI_ERR("invalid slice height %d\n",
  2161. priv_info->vdc.slice_height);
  2162. rc = -EINVAL;
  2163. goto error;
  2164. }
  2165. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2166. if (rc) {
  2167. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2168. goto error;
  2169. }
  2170. priv_info->vdc.slice_width = data;
  2171. /*
  2172. * slide-width should be multiple of 8
  2173. * slice-width should be atlease 64 pixels
  2174. */
  2175. if ((priv_info->vdc.slice_width & 7) ||
  2176. (priv_info->vdc.slice_width < 64)) {
  2177. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2178. rc = -EINVAL;
  2179. goto error;
  2180. }
  2181. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2182. if (rc) {
  2183. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2184. goto error;
  2185. } else if (!data || (data > 2)) {
  2186. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2187. rc = -EINVAL;
  2188. goto error;
  2189. }
  2190. intf_width = mode->timing.h_active;
  2191. priv_info->vdc.slice_per_pkt = data;
  2192. priv_info->vdc.frame_width = mode->timing.h_active;
  2193. priv_info->vdc.frame_height = mode->timing.v_active;
  2194. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2195. &data);
  2196. if (rc) {
  2197. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2198. goto error;
  2199. }
  2200. priv_info->vdc.bits_per_component = data;
  2201. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2202. if (rc) {
  2203. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2204. data = 0;
  2205. }
  2206. priv_info->vdc.pps_delay_ms = data;
  2207. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2208. &data);
  2209. if (rc) {
  2210. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2211. goto error;
  2212. }
  2213. priv_info->vdc.bits_per_pixel = data << 4;
  2214. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2215. &data);
  2216. if (rc) {
  2217. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2218. rc = 0;
  2219. data = MSM_CHROMA_444;
  2220. }
  2221. priv_info->vdc.chroma_format = data;
  2222. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2223. &data);
  2224. if (rc) {
  2225. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2226. rc = 0;
  2227. data = MSM_RGB;
  2228. }
  2229. priv_info->vdc.source_color_space = data;
  2230. rc = sde_vdc_populate_config(&priv_info->vdc,
  2231. intf_width, traffic_mode);
  2232. if (rc) {
  2233. DSI_DEBUG("failed populating vdc config\n");
  2234. rc = -EINVAL;
  2235. goto error;
  2236. }
  2237. priv_info->pclk_scale.numer =
  2238. priv_info->vdc.bits_per_pixel >> 4;
  2239. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2240. priv_info->vdc.chroma_format,
  2241. priv_info->vdc.bits_per_component);
  2242. mode->timing.vdc_enabled = true;
  2243. mode->timing.vdc = &priv_info->vdc;
  2244. mode->timing.pclk_scale = priv_info->pclk_scale;
  2245. error:
  2246. return rc;
  2247. }
  2248. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2249. {
  2250. int rc = 0;
  2251. struct drm_panel_hdr_properties *hdr_prop;
  2252. struct dsi_parser_utils *utils = &panel->utils;
  2253. hdr_prop = &panel->hdr_props;
  2254. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2255. "qcom,mdss-dsi-panel-hdr-enabled");
  2256. if (hdr_prop->hdr_enabled) {
  2257. rc = utils->read_u32_array(utils->data,
  2258. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2259. hdr_prop->display_primaries,
  2260. DISPLAY_PRIMARIES_MAX);
  2261. if (rc) {
  2262. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2263. __func__, __LINE__, rc);
  2264. hdr_prop->hdr_enabled = false;
  2265. return rc;
  2266. }
  2267. rc = utils->read_u32(utils->data,
  2268. "qcom,mdss-dsi-panel-peak-brightness",
  2269. &(hdr_prop->peak_brightness));
  2270. if (rc) {
  2271. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2272. __func__, __LINE__, rc);
  2273. hdr_prop->hdr_enabled = false;
  2274. return rc;
  2275. }
  2276. rc = utils->read_u32(utils->data,
  2277. "qcom,mdss-dsi-panel-blackness-level",
  2278. &(hdr_prop->blackness_level));
  2279. if (rc) {
  2280. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2281. __func__, __LINE__, rc);
  2282. hdr_prop->hdr_enabled = false;
  2283. return rc;
  2284. }
  2285. }
  2286. return 0;
  2287. }
  2288. static int dsi_panel_parse_topology(
  2289. struct dsi_display_mode_priv_info *priv_info,
  2290. struct dsi_parser_utils *utils,
  2291. int topology_override)
  2292. {
  2293. struct msm_display_topology *topology;
  2294. u32 top_count, top_sel, *array = NULL;
  2295. int i, len = 0;
  2296. int rc = -EINVAL;
  2297. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2298. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2299. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2300. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2301. return rc;
  2302. }
  2303. top_count = len / TOPOLOGY_SET_LEN;
  2304. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2305. if (!array)
  2306. return -ENOMEM;
  2307. rc = utils->read_u32_array(utils->data,
  2308. "qcom,display-topology", array, len);
  2309. if (rc) {
  2310. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2311. goto read_fail;
  2312. }
  2313. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2314. if (!topology) {
  2315. rc = -ENOMEM;
  2316. goto read_fail;
  2317. }
  2318. for (i = 0; i < top_count; i++) {
  2319. struct msm_display_topology *top = &topology[i];
  2320. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2321. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2322. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2323. }
  2324. if (topology_override >= 0 && topology_override < top_count) {
  2325. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2326. topology_override,
  2327. topology[topology_override].num_lm,
  2328. topology[topology_override].num_enc,
  2329. topology[topology_override].num_intf);
  2330. top_sel = topology_override;
  2331. goto parse_done;
  2332. }
  2333. rc = utils->read_u32(utils->data,
  2334. "qcom,default-topology-index", &top_sel);
  2335. if (rc) {
  2336. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2337. goto parse_fail;
  2338. }
  2339. if (top_sel >= top_count) {
  2340. rc = -EINVAL;
  2341. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2342. rc);
  2343. goto parse_fail;
  2344. }
  2345. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2346. topology[top_sel].num_lm,
  2347. topology[top_sel].num_enc,
  2348. topology[top_sel].num_intf);
  2349. parse_done:
  2350. memcpy(&priv_info->topology, &topology[top_sel],
  2351. sizeof(struct msm_display_topology));
  2352. parse_fail:
  2353. kfree(topology);
  2354. read_fail:
  2355. kfree(array);
  2356. return rc;
  2357. }
  2358. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2359. struct msm_roi_alignment *align)
  2360. {
  2361. int len = 0, rc = 0;
  2362. u32 value[6];
  2363. struct property *data;
  2364. if (!align)
  2365. return -EINVAL;
  2366. memset(align, 0, sizeof(*align));
  2367. data = utils->find_property(utils->data,
  2368. "qcom,panel-roi-alignment", &len);
  2369. len /= sizeof(u32);
  2370. if (!data) {
  2371. DSI_ERR("panel roi alignment not found\n");
  2372. rc = -EINVAL;
  2373. } else if (len != 6) {
  2374. DSI_ERR("incorrect roi alignment len %d\n", len);
  2375. rc = -EINVAL;
  2376. } else {
  2377. rc = utils->read_u32_array(utils->data,
  2378. "qcom,panel-roi-alignment", value, len);
  2379. if (rc)
  2380. DSI_DEBUG("error reading panel roi alignment values\n");
  2381. else {
  2382. align->xstart_pix_align = value[0];
  2383. align->ystart_pix_align = value[1];
  2384. align->width_pix_align = value[2];
  2385. align->height_pix_align = value[3];
  2386. align->min_width = value[4];
  2387. align->min_height = value[5];
  2388. }
  2389. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2390. align->xstart_pix_align,
  2391. align->width_pix_align,
  2392. align->ystart_pix_align,
  2393. align->height_pix_align,
  2394. align->min_width,
  2395. align->min_height);
  2396. }
  2397. return rc;
  2398. }
  2399. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2400. struct dsi_parser_utils *utils)
  2401. {
  2402. struct msm_roi_caps *roi_caps = NULL;
  2403. const char *data;
  2404. int rc = 0;
  2405. if (!mode || !mode->priv_info) {
  2406. DSI_ERR("invalid arguments\n");
  2407. return -EINVAL;
  2408. }
  2409. roi_caps = &mode->priv_info->roi_caps;
  2410. memset(roi_caps, 0, sizeof(*roi_caps));
  2411. data = utils->get_property(utils->data,
  2412. "qcom,partial-update-enabled", NULL);
  2413. if (data) {
  2414. if (!strcmp(data, "dual_roi"))
  2415. roi_caps->num_roi = 2;
  2416. else if (!strcmp(data, "single_roi"))
  2417. roi_caps->num_roi = 1;
  2418. else {
  2419. DSI_INFO(
  2420. "invalid value for qcom,partial-update-enabled: %s\n",
  2421. data);
  2422. return 0;
  2423. }
  2424. } else {
  2425. DSI_DEBUG("partial update disabled as the property is not set\n");
  2426. return 0;
  2427. }
  2428. roi_caps->merge_rois = utils->read_bool(utils->data,
  2429. "qcom,partial-update-roi-merge");
  2430. roi_caps->enabled = roi_caps->num_roi > 0;
  2431. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2432. roi_caps->enabled);
  2433. if (roi_caps->enabled)
  2434. rc = dsi_panel_parse_roi_alignment(utils,
  2435. &roi_caps->align);
  2436. if (rc)
  2437. memset(roi_caps, 0, sizeof(*roi_caps));
  2438. return rc;
  2439. }
  2440. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2441. struct dsi_parser_utils *utils)
  2442. {
  2443. bool vid_mode_support, cmd_mode_support;
  2444. if (!mode || !mode->priv_info) {
  2445. DSI_ERR("invalid arguments\n");
  2446. return -EINVAL;
  2447. }
  2448. vid_mode_support = utils->read_bool(utils->data,
  2449. "qcom,mdss-dsi-video-mode");
  2450. cmd_mode_support = utils->read_bool(utils->data,
  2451. "qcom,mdss-dsi-cmd-mode");
  2452. if (cmd_mode_support)
  2453. mode->panel_mode = DSI_OP_CMD_MODE;
  2454. else if (vid_mode_support)
  2455. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2456. else
  2457. return -EINVAL;
  2458. return 0;
  2459. };
  2460. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2461. {
  2462. int dms_enabled;
  2463. const char *data;
  2464. struct dsi_parser_utils *utils = &panel->utils;
  2465. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2466. dms_enabled = utils->read_bool(utils->data,
  2467. "qcom,dynamic-mode-switch-enabled");
  2468. if (!dms_enabled)
  2469. return 0;
  2470. data = utils->get_property(utils->data,
  2471. "qcom,dynamic-mode-switch-type", NULL);
  2472. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2473. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2474. } else {
  2475. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2476. panel->name, data);
  2477. return -EINVAL;
  2478. }
  2479. return 0;
  2480. };
  2481. /*
  2482. * The length of all the valid values to be checked should not be greater
  2483. * than the length of returned data from read command.
  2484. */
  2485. static bool
  2486. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2487. {
  2488. int i;
  2489. struct drm_panel_esd_config *config = &panel->esd_config;
  2490. for (i = 0; i < count; ++i) {
  2491. if (config->status_valid_params[i] >
  2492. config->status_cmds_rlen[i]) {
  2493. DSI_DEBUG("ignore valid params\n");
  2494. return false;
  2495. }
  2496. }
  2497. return true;
  2498. }
  2499. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2500. char *prop_key, u32 **target, u32 cmd_cnt)
  2501. {
  2502. int tmp;
  2503. if (!utils->find_property(utils->data, prop_key, &tmp))
  2504. return false;
  2505. tmp /= sizeof(u32);
  2506. if (tmp != cmd_cnt) {
  2507. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2508. tmp, cmd_cnt);
  2509. return false;
  2510. }
  2511. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2512. if (IS_ERR_OR_NULL(*target)) {
  2513. DSI_ERR("Error allocating memory for property\n");
  2514. return false;
  2515. }
  2516. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2517. DSI_ERR("cannot get values from dts\n");
  2518. kfree(*target);
  2519. *target = NULL;
  2520. return false;
  2521. }
  2522. return true;
  2523. }
  2524. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2525. {
  2526. kfree(esd_config->status_buf);
  2527. kfree(esd_config->return_buf);
  2528. kfree(esd_config->status_value);
  2529. kfree(esd_config->status_valid_params);
  2530. kfree(esd_config->status_cmds_rlen);
  2531. kfree(esd_config->status_cmd.cmds);
  2532. }
  2533. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2534. {
  2535. struct drm_panel_esd_config *esd_config;
  2536. int rc = 0;
  2537. u32 tmp;
  2538. u32 i, status_len, *lenp;
  2539. struct property *data;
  2540. struct dsi_parser_utils *utils = &panel->utils;
  2541. if (!panel) {
  2542. DSI_ERR("Invalid Params\n");
  2543. return -EINVAL;
  2544. }
  2545. esd_config = &panel->esd_config;
  2546. if (!esd_config)
  2547. return -EINVAL;
  2548. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2549. DSI_CMD_SET_PANEL_STATUS, utils);
  2550. if (!esd_config->status_cmd.count) {
  2551. DSI_ERR("panel status command parsing failed\n");
  2552. rc = -EINVAL;
  2553. goto error;
  2554. }
  2555. if (!dsi_panel_parse_esd_status_len(utils,
  2556. "qcom,mdss-dsi-panel-status-read-length",
  2557. &panel->esd_config.status_cmds_rlen,
  2558. esd_config->status_cmd.count)) {
  2559. DSI_ERR("Invalid status read length\n");
  2560. rc = -EINVAL;
  2561. goto error1;
  2562. }
  2563. if (dsi_panel_parse_esd_status_len(utils,
  2564. "qcom,mdss-dsi-panel-status-valid-params",
  2565. &panel->esd_config.status_valid_params,
  2566. esd_config->status_cmd.count)) {
  2567. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2568. esd_config->status_cmd.count)) {
  2569. rc = -EINVAL;
  2570. goto error2;
  2571. }
  2572. }
  2573. status_len = 0;
  2574. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2575. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2576. status_len += lenp[i];
  2577. if (!status_len) {
  2578. rc = -EINVAL;
  2579. goto error2;
  2580. }
  2581. /*
  2582. * Some panel may need multiple read commands to properly
  2583. * check panel status. Do a sanity check for proper status
  2584. * value which will be compared with the value read by dsi
  2585. * controller during ESD check. Also check if multiple read
  2586. * commands are there then, there should be corresponding
  2587. * status check values for each read command.
  2588. */
  2589. data = utils->find_property(utils->data,
  2590. "qcom,mdss-dsi-panel-status-value", &tmp);
  2591. tmp /= sizeof(u32);
  2592. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2593. esd_config->groups = tmp / status_len;
  2594. } else {
  2595. DSI_ERR("error parse panel-status-value\n");
  2596. rc = -EINVAL;
  2597. goto error2;
  2598. }
  2599. esd_config->status_value =
  2600. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2601. GFP_KERNEL);
  2602. if (!esd_config->status_value) {
  2603. rc = -ENOMEM;
  2604. goto error2;
  2605. }
  2606. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2607. sizeof(unsigned char), GFP_KERNEL);
  2608. if (!esd_config->return_buf) {
  2609. rc = -ENOMEM;
  2610. goto error3;
  2611. }
  2612. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2613. if (!esd_config->status_buf) {
  2614. rc = -ENOMEM;
  2615. goto error4;
  2616. }
  2617. rc = utils->read_u32_array(utils->data,
  2618. "qcom,mdss-dsi-panel-status-value",
  2619. esd_config->status_value, esd_config->groups * status_len);
  2620. if (rc) {
  2621. DSI_DEBUG("error reading panel status values\n");
  2622. memset(esd_config->status_value, 0,
  2623. esd_config->groups * status_len);
  2624. }
  2625. return 0;
  2626. error4:
  2627. kfree(esd_config->return_buf);
  2628. error3:
  2629. kfree(esd_config->status_value);
  2630. error2:
  2631. kfree(esd_config->status_valid_params);
  2632. kfree(esd_config->status_cmds_rlen);
  2633. error1:
  2634. kfree(esd_config->status_cmd.cmds);
  2635. error:
  2636. return rc;
  2637. }
  2638. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2639. {
  2640. int rc = 0;
  2641. const char *string;
  2642. struct drm_panel_esd_config *esd_config;
  2643. struct dsi_parser_utils *utils = &panel->utils;
  2644. u8 *esd_mode = NULL;
  2645. esd_config = &panel->esd_config;
  2646. esd_config->status_mode = ESD_MODE_MAX;
  2647. esd_config->esd_enabled = utils->read_bool(utils->data,
  2648. "qcom,esd-check-enabled");
  2649. if (!esd_config->esd_enabled)
  2650. return 0;
  2651. rc = utils->read_string(utils->data,
  2652. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2653. if (!rc) {
  2654. if (!strcmp(string, "bta_check")) {
  2655. esd_config->status_mode = ESD_MODE_SW_BTA;
  2656. } else if (!strcmp(string, "reg_read")) {
  2657. esd_config->status_mode = ESD_MODE_REG_READ;
  2658. } else if (!strcmp(string, "te_signal_check")) {
  2659. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2660. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2661. } else {
  2662. DSI_ERR("TE-ESD not valid for video mode\n");
  2663. rc = -EINVAL;
  2664. goto error;
  2665. }
  2666. } else {
  2667. DSI_ERR("No valid panel-status-check-mode string\n");
  2668. rc = -EINVAL;
  2669. goto error;
  2670. }
  2671. } else {
  2672. DSI_DEBUG("status check method not defined!\n");
  2673. rc = -EINVAL;
  2674. goto error;
  2675. }
  2676. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2677. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2678. if (rc) {
  2679. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2680. rc);
  2681. goto error;
  2682. }
  2683. esd_mode = "register_read";
  2684. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2685. esd_mode = "bta_trigger";
  2686. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2687. esd_mode = "te_check";
  2688. }
  2689. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2690. return 0;
  2691. error:
  2692. panel->esd_config.esd_enabled = false;
  2693. return rc;
  2694. }
  2695. static void dsi_panel_update_util(struct dsi_panel *panel,
  2696. struct device_node *parser_node)
  2697. {
  2698. struct dsi_parser_utils *utils = &panel->utils;
  2699. if (parser_node) {
  2700. *utils = *dsi_parser_get_parser_utils();
  2701. utils->data = parser_node;
  2702. DSI_DEBUG("switching to parser APIs\n");
  2703. goto end;
  2704. }
  2705. *utils = *dsi_parser_get_of_utils();
  2706. utils->data = panel->panel_of_node;
  2707. end:
  2708. utils->node = panel->panel_of_node;
  2709. }
  2710. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2711. {
  2712. return 0;
  2713. }
  2714. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2715. {
  2716. if (trusted_vm_env) {
  2717. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2718. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2719. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2720. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2721. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2722. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2723. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2724. } else {
  2725. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2726. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2727. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2728. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2729. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2730. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2731. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2732. }
  2733. }
  2734. struct dsi_panel *dsi_panel_get(struct device *parent,
  2735. struct device_node *of_node,
  2736. struct device_node *parser_node,
  2737. const char *type,
  2738. int topology_override,
  2739. bool trusted_vm_env)
  2740. {
  2741. struct dsi_panel *panel;
  2742. struct dsi_parser_utils *utils;
  2743. const char *panel_physical_type;
  2744. int rc = 0;
  2745. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2746. if (!panel)
  2747. return ERR_PTR(-ENOMEM);
  2748. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2749. panel->panel_of_node = of_node;
  2750. panel->parent = parent;
  2751. panel->type = type;
  2752. dsi_panel_update_util(panel, parser_node);
  2753. utils = &panel->utils;
  2754. panel->name = utils->get_property(utils->data,
  2755. "qcom,mdss-dsi-panel-name", NULL);
  2756. if (!panel->name)
  2757. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2758. /*
  2759. * Set panel type to LCD as default.
  2760. */
  2761. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2762. panel_physical_type = utils->get_property(utils->data,
  2763. "qcom,mdss-dsi-panel-physical-type", NULL);
  2764. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2765. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2766. rc = dsi_panel_parse_host_config(panel);
  2767. if (rc) {
  2768. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2769. rc);
  2770. goto error;
  2771. }
  2772. rc = dsi_panel_parse_panel_mode(panel);
  2773. if (rc) {
  2774. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2775. rc);
  2776. goto error;
  2777. }
  2778. rc = dsi_panel_parse_dfps_caps(panel);
  2779. if (rc)
  2780. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2781. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2782. if (rc)
  2783. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2784. /* allow qsync support only if DFPS is with VFP approach */
  2785. if ((panel->dfps_caps.dfps_support) &&
  2786. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2787. panel->qsync_min_fps = 0;
  2788. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2789. if (rc)
  2790. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2791. rc = dsi_panel_parse_phy_props(panel);
  2792. if (rc) {
  2793. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2794. rc);
  2795. goto error;
  2796. }
  2797. rc = panel->panel_ops.parse_gpios(panel);
  2798. if (rc) {
  2799. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2800. goto error;
  2801. }
  2802. rc = dsi_panel_parse_power_cfg(panel);
  2803. if (rc)
  2804. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2805. rc = dsi_panel_parse_bl_config(panel);
  2806. if (rc) {
  2807. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2808. if (rc == -EPROBE_DEFER)
  2809. goto error;
  2810. }
  2811. rc = dsi_panel_parse_misc_features(panel);
  2812. if (rc)
  2813. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2814. rc = dsi_panel_parse_hdr_config(panel);
  2815. if (rc)
  2816. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2817. rc = dsi_panel_get_mode_count(panel);
  2818. if (rc) {
  2819. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2820. goto error;
  2821. }
  2822. rc = dsi_panel_parse_dms_info(panel);
  2823. if (rc)
  2824. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2825. rc = dsi_panel_parse_esd_config(panel);
  2826. if (rc)
  2827. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2828. rc = dsi_panel_vreg_get(panel);
  2829. if (rc) {
  2830. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2831. panel->name, rc);
  2832. goto error;
  2833. }
  2834. panel->power_mode = SDE_MODE_DPMS_OFF;
  2835. drm_panel_init(&panel->drm_panel);
  2836. panel->drm_panel.dev = &panel->mipi_device.dev;
  2837. panel->mipi_device.dev.of_node = of_node;
  2838. rc = drm_panel_add(&panel->drm_panel);
  2839. if (rc)
  2840. goto error_vreg_put;
  2841. mutex_init(&panel->panel_lock);
  2842. return panel;
  2843. error_vreg_put:
  2844. (void)dsi_panel_vreg_put(panel);
  2845. error:
  2846. kfree(panel);
  2847. return ERR_PTR(rc);
  2848. }
  2849. void dsi_panel_put(struct dsi_panel *panel)
  2850. {
  2851. drm_panel_remove(&panel->drm_panel);
  2852. /* free resources allocated for ESD check */
  2853. dsi_panel_esd_config_deinit(&panel->esd_config);
  2854. kfree(panel);
  2855. }
  2856. int dsi_panel_drv_init(struct dsi_panel *panel,
  2857. struct mipi_dsi_host *host)
  2858. {
  2859. int rc = 0;
  2860. struct mipi_dsi_device *dev;
  2861. if (!panel || !host) {
  2862. DSI_ERR("invalid params\n");
  2863. return -EINVAL;
  2864. }
  2865. mutex_lock(&panel->panel_lock);
  2866. dev = &panel->mipi_device;
  2867. dev->host = host;
  2868. /*
  2869. * We dont have device structure since panel is not a device node.
  2870. * When using drm panel framework, the device is probed when the host is
  2871. * create.
  2872. */
  2873. dev->channel = 0;
  2874. dev->lanes = 4;
  2875. panel->host = host;
  2876. rc = panel->panel_ops.pinctrl_init(panel);
  2877. if (rc) {
  2878. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2879. panel->name, rc);
  2880. goto exit;
  2881. }
  2882. rc = panel->panel_ops.gpio_request(panel);
  2883. if (rc) {
  2884. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2885. rc);
  2886. goto error_pinctrl_deinit;
  2887. }
  2888. rc = panel->panel_ops.bl_register(panel);
  2889. if (rc) {
  2890. if (rc != -EPROBE_DEFER)
  2891. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2892. panel->name, rc);
  2893. goto error_gpio_release;
  2894. }
  2895. goto exit;
  2896. error_gpio_release:
  2897. (void)dsi_panel_gpio_release(panel);
  2898. error_pinctrl_deinit:
  2899. (void)dsi_panel_pinctrl_deinit(panel);
  2900. exit:
  2901. mutex_unlock(&panel->panel_lock);
  2902. return rc;
  2903. }
  2904. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2905. {
  2906. int rc = 0;
  2907. if (!panel) {
  2908. DSI_ERR("invalid params\n");
  2909. return -EINVAL;
  2910. }
  2911. mutex_lock(&panel->panel_lock);
  2912. rc = panel->panel_ops.bl_unregister(panel);
  2913. if (rc)
  2914. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2915. panel->name, rc);
  2916. rc = panel->panel_ops.gpio_release(panel);
  2917. if (rc)
  2918. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2919. rc);
  2920. rc = panel->panel_ops.pinctrl_deinit(panel);
  2921. if (rc)
  2922. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2923. rc);
  2924. rc = dsi_panel_vreg_put(panel);
  2925. if (rc)
  2926. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2927. panel->host = NULL;
  2928. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2929. mutex_unlock(&panel->panel_lock);
  2930. return rc;
  2931. }
  2932. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2933. struct dsi_display_mode *mode)
  2934. {
  2935. return 0;
  2936. }
  2937. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  2938. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  2939. {
  2940. const char *compression;
  2941. u32 *array = NULL, top_count, len, i;
  2942. int rc = -EINVAL;
  2943. bool dsc_enable = false;
  2944. *dsc_count = 0;
  2945. *lm_count = 0;
  2946. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  2947. if (compression && !strcmp(compression, "dsc"))
  2948. dsc_enable = true;
  2949. len = utils->count_u32_elems(node, "qcom,display-topology");
  2950. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2951. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  2952. return rc;
  2953. top_count = len / TOPOLOGY_SET_LEN;
  2954. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2955. if (!array)
  2956. return -ENOMEM;
  2957. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  2958. if (rc) {
  2959. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2960. goto read_fail;
  2961. }
  2962. for (i = 0; i < top_count; i++) {
  2963. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  2964. if (dsc_enable)
  2965. *dsc_count = max(*dsc_count,
  2966. array[i * TOPOLOGY_SET_LEN + 1]);
  2967. }
  2968. read_fail:
  2969. kfree(array);
  2970. return 0;
  2971. }
  2972. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2973. {
  2974. const u32 SINGLE_MODE_SUPPORT = 1;
  2975. struct dsi_parser_utils *utils;
  2976. struct device_node *timings_np, *child_np;
  2977. int num_dfps_rates, num_bit_clks;
  2978. int num_video_modes = 0, num_cmd_modes = 0;
  2979. int count, rc = 0;
  2980. u32 dsc_count = 0, lm_count = 0;
  2981. if (!panel) {
  2982. DSI_ERR("invalid params\n");
  2983. return -EINVAL;
  2984. }
  2985. utils = &panel->utils;
  2986. panel->num_timing_nodes = 0;
  2987. timings_np = utils->get_child_by_name(utils->data,
  2988. "qcom,mdss-dsi-display-timings");
  2989. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2990. DSI_ERR("no display timing nodes defined\n");
  2991. rc = -EINVAL;
  2992. goto error;
  2993. }
  2994. count = utils->get_child_count(timings_np);
  2995. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2996. count > DSI_MODE_MAX) {
  2997. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2998. rc = -EINVAL;
  2999. goto error;
  3000. }
  3001. /* No multiresolution support is available for video mode panels.
  3002. * Multi-mode is supported for video mode during POMS is enabled.
  3003. */
  3004. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3005. !panel->host_config.ext_bridge_mode &&
  3006. !panel->panel_mode_switch_enabled)
  3007. count = SINGLE_MODE_SUPPORT;
  3008. panel->num_timing_nodes = count;
  3009. dsi_for_each_child_node(timings_np, child_np) {
  3010. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3011. num_video_modes++;
  3012. else if (utils->read_bool(child_np,
  3013. "qcom,mdss-dsi-cmd-mode"))
  3014. num_cmd_modes++;
  3015. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3016. num_video_modes++;
  3017. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3018. num_cmd_modes++;
  3019. dsi_panel_get_max_res_count(utils, child_np,
  3020. &dsc_count, &lm_count);
  3021. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3022. panel->lm_count = max(lm_count, panel->lm_count);
  3023. }
  3024. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3025. panel->dfps_caps.dfps_list_len;
  3026. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3027. panel->dyn_clk_caps.bit_clk_list_len;
  3028. /*
  3029. * Inflate num_of_modes by fps and bit clks in dfps.
  3030. * Single command mode for video mode panels supporting
  3031. * panel operating mode switch.
  3032. */
  3033. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3034. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3035. (panel->panel_mode_switch_enabled))
  3036. num_cmd_modes = 1;
  3037. else
  3038. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3039. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3040. error:
  3041. return rc;
  3042. }
  3043. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3044. struct dsi_panel_phy_props *phy_props)
  3045. {
  3046. int rc = 0;
  3047. if (!panel || !phy_props) {
  3048. DSI_ERR("invalid params\n");
  3049. return -EINVAL;
  3050. }
  3051. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3052. return rc;
  3053. }
  3054. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3055. struct dsi_dfps_capabilities *dfps_caps)
  3056. {
  3057. int rc = 0;
  3058. if (!panel || !dfps_caps) {
  3059. DSI_ERR("invalid params\n");
  3060. return -EINVAL;
  3061. }
  3062. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3063. return rc;
  3064. }
  3065. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3066. {
  3067. int i;
  3068. if (!mode->priv_info)
  3069. return;
  3070. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3071. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3072. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3073. }
  3074. kfree(mode->priv_info);
  3075. }
  3076. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3077. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3078. {
  3079. u32 frame_time_us, nslices;
  3080. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3081. dsi_transfer_time_us, pixel_clk_khz;
  3082. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3083. struct dsi_mode_info *timing = &mode->timing;
  3084. struct dsi_display_mode *display_mode;
  3085. u32 jitter_numer, jitter_denom, prefill_lines;
  3086. u32 min_threshold_us, prefill_time_us, max_transfer_us;
  3087. u16 bpp;
  3088. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3089. * + 1 byte dcs data command.
  3090. */
  3091. const u32 packet_overhead = 56;
  3092. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3093. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3094. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3095. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3096. if (timing->refresh_rate >= 120)
  3097. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3098. if (timing->dsc_enabled) {
  3099. nslices = (timing->h_active)/(dsc->config.slice_width);
  3100. /* (slice width x bit-per-pixel + packet overhead) x
  3101. * number of slices x height x fps / lane
  3102. */
  3103. bpp = DSC_BPP(dsc->config);
  3104. bits_per_line = ((dsc->config.slice_width * bpp) +
  3105. packet_overhead) * nslices;
  3106. bits_per_line = bits_per_line / (config->num_data_lanes);
  3107. min_bitclk_hz = (bits_per_line * timing->v_active *
  3108. timing->refresh_rate);
  3109. } else {
  3110. total_active_pixels = ((dsi_h_active_dce(timing)
  3111. * timing->v_active));
  3112. /* calculate the actual bitclk needed to transfer the frame */
  3113. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3114. (config->bpp));
  3115. do_div(min_bitclk_hz, config->num_data_lanes);
  3116. }
  3117. timing->min_dsi_clk_hz = min_bitclk_hz;
  3118. min_threshold_us = mult_frac(frame_time_us,
  3119. jitter_numer, (jitter_denom * 100));
  3120. /*
  3121. * Increase the prefill_lines proportionately as recommended
  3122. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3123. */
  3124. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3125. timing->refresh_rate, 60);
  3126. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3127. (timing->v_active));
  3128. /*
  3129. * Threshold is sum of panel jitter time, prefill line time
  3130. * plus 64usec buffer time.
  3131. */
  3132. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3133. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3134. if (timing->clk_rate_hz) {
  3135. /* adjust the transfer time proportionately for bit clk*/
  3136. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3137. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3138. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3139. } else if (mode->priv_info->mdp_transfer_time_us) {
  3140. max_transfer_us = frame_time_us - min_threshold_us;
  3141. mode->priv_info->mdp_transfer_time_us = min(
  3142. mode->priv_info->mdp_transfer_time_us,
  3143. max_transfer_us);
  3144. timing->dsi_transfer_time_us =
  3145. mode->priv_info->mdp_transfer_time_us;
  3146. } else {
  3147. if (min_threshold_us > frame_threshold_us)
  3148. frame_threshold_us = min_threshold_us;
  3149. timing->dsi_transfer_time_us = frame_time_us -
  3150. frame_threshold_us;
  3151. }
  3152. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3153. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3154. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3155. timing->mdp_transfer_time_us =
  3156. mode->priv_info->mdp_transfer_time_us;
  3157. }
  3158. /* Calculate pclk_khz to update modeinfo */
  3159. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3160. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3161. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3162. do_div(pixel_clk_khz, config->bpp);
  3163. display_mode->pixel_clk_khz = pixel_clk_khz;
  3164. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3165. }
  3166. int dsi_panel_get_mode(struct dsi_panel *panel,
  3167. u32 index, struct dsi_display_mode *mode,
  3168. int topology_override)
  3169. {
  3170. struct device_node *timings_np, *child_np;
  3171. struct dsi_parser_utils *utils;
  3172. struct dsi_display_mode_priv_info *prv_info;
  3173. u32 child_idx = 0;
  3174. int rc = 0, num_timings;
  3175. int traffic_mode;
  3176. int panel_mode;
  3177. void *utils_data = NULL;
  3178. if (!panel || !mode) {
  3179. DSI_ERR("invalid params\n");
  3180. return -EINVAL;
  3181. }
  3182. mutex_lock(&panel->panel_lock);
  3183. utils = &panel->utils;
  3184. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3185. if (!mode->priv_info) {
  3186. rc = -ENOMEM;
  3187. goto done;
  3188. }
  3189. prv_info = mode->priv_info;
  3190. timings_np = utils->get_child_by_name(utils->data,
  3191. "qcom,mdss-dsi-display-timings");
  3192. if (!timings_np) {
  3193. DSI_ERR("no display timing nodes defined\n");
  3194. rc = -EINVAL;
  3195. goto parse_fail;
  3196. }
  3197. num_timings = utils->get_child_count(timings_np);
  3198. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3199. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3200. rc = -EINVAL;
  3201. goto parse_fail;
  3202. }
  3203. utils_data = utils->data;
  3204. traffic_mode = panel->video_config.traffic_mode;
  3205. panel_mode = panel->panel_mode;
  3206. dsi_for_each_child_node(timings_np, child_np) {
  3207. if (index != child_idx++)
  3208. continue;
  3209. utils->data = child_np;
  3210. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3211. if (rc) {
  3212. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3213. goto parse_fail;
  3214. }
  3215. rc = dsi_panel_parse_dsc_params(mode, utils);
  3216. if (rc) {
  3217. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3218. goto parse_fail;
  3219. }
  3220. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3221. panel_mode);
  3222. if (rc) {
  3223. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3224. goto parse_fail;
  3225. }
  3226. rc = dsi_panel_parse_topology(prv_info, utils,
  3227. topology_override);
  3228. if (rc) {
  3229. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3230. goto parse_fail;
  3231. }
  3232. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3233. if (rc) {
  3234. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3235. goto parse_fail;
  3236. }
  3237. rc = dsi_panel_parse_jitter_config(mode, utils);
  3238. if (rc)
  3239. DSI_ERR(
  3240. "failed to parse panel jitter config, rc=%d\n", rc);
  3241. rc = dsi_panel_parse_phy_timing(mode, utils);
  3242. if (rc) {
  3243. DSI_ERR(
  3244. "failed to parse panel phy timings, rc=%d\n", rc);
  3245. goto parse_fail;
  3246. }
  3247. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3248. if (rc)
  3249. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3250. if (panel->panel_mode_switch_enabled) {
  3251. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3252. if (rc) {
  3253. rc = 0;
  3254. mode->panel_mode = panel->panel_mode;
  3255. DSI_INFO(
  3256. "POMS: panel mode isn't specified in timing[%d]\n",
  3257. child_idx);
  3258. }
  3259. } else {
  3260. mode->panel_mode = panel->panel_mode;
  3261. }
  3262. }
  3263. goto done;
  3264. parse_fail:
  3265. kfree(mode->priv_info);
  3266. mode->priv_info = NULL;
  3267. done:
  3268. utils->data = utils_data;
  3269. mutex_unlock(&panel->panel_lock);
  3270. return rc;
  3271. }
  3272. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3273. struct dsi_display_mode *mode,
  3274. struct dsi_host_config *config)
  3275. {
  3276. int rc = 0;
  3277. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3278. if (!panel || !mode || !config) {
  3279. DSI_ERR("invalid params\n");
  3280. return -EINVAL;
  3281. }
  3282. mutex_lock(&panel->panel_lock);
  3283. config->panel_mode = panel->panel_mode;
  3284. memcpy(&config->common_config, &panel->host_config,
  3285. sizeof(config->common_config));
  3286. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3287. memcpy(&config->u.video_engine, &panel->video_config,
  3288. sizeof(config->u.video_engine));
  3289. } else {
  3290. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3291. sizeof(config->u.cmd_engine));
  3292. }
  3293. memcpy(&config->video_timing, &mode->timing,
  3294. sizeof(config->video_timing));
  3295. config->video_timing.mdp_transfer_time_us =
  3296. mode->priv_info->mdp_transfer_time_us;
  3297. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3298. config->video_timing.dsc = &mode->priv_info->dsc;
  3299. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3300. config->video_timing.vdc = &mode->priv_info->vdc;
  3301. if (dyn_clk_caps->dyn_clk_support)
  3302. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3303. else
  3304. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3305. config->esc_clk_rate_hz = 19200000;
  3306. mutex_unlock(&panel->panel_lock);
  3307. return rc;
  3308. }
  3309. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3310. {
  3311. int rc = 0;
  3312. if (!panel) {
  3313. DSI_ERR("invalid params\n");
  3314. return -EINVAL;
  3315. }
  3316. mutex_lock(&panel->panel_lock);
  3317. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3318. if (panel->lp11_init)
  3319. goto error;
  3320. rc = dsi_panel_power_on(panel);
  3321. if (rc) {
  3322. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3323. goto error;
  3324. }
  3325. error:
  3326. mutex_unlock(&panel->panel_lock);
  3327. return rc;
  3328. }
  3329. int dsi_panel_update_pps(struct dsi_panel *panel)
  3330. {
  3331. int rc = 0;
  3332. struct dsi_panel_cmd_set *set = NULL;
  3333. struct dsi_display_mode_priv_info *priv_info = NULL;
  3334. if (!panel || !panel->cur_mode) {
  3335. DSI_ERR("invalid params\n");
  3336. return -EINVAL;
  3337. }
  3338. mutex_lock(&panel->panel_lock);
  3339. priv_info = panel->cur_mode->priv_info;
  3340. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3341. if (priv_info->dsc_enabled)
  3342. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3343. panel->dce_pps_cmd, 0,
  3344. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3345. else if (priv_info->vdc_enabled)
  3346. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3347. panel->dce_pps_cmd, 0,
  3348. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3349. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3350. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3351. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3352. if (rc) {
  3353. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3354. goto error;
  3355. }
  3356. }
  3357. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3358. if (rc) {
  3359. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3360. panel->name, rc);
  3361. }
  3362. dsi_panel_destroy_cmd_packets(set);
  3363. error:
  3364. mutex_unlock(&panel->panel_lock);
  3365. return rc;
  3366. }
  3367. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3368. {
  3369. int rc = 0;
  3370. if (!panel) {
  3371. DSI_ERR("invalid params\n");
  3372. return -EINVAL;
  3373. }
  3374. mutex_lock(&panel->panel_lock);
  3375. if (!panel->panel_initialized)
  3376. goto exit;
  3377. /*
  3378. * Consider LP1->LP2->LP1.
  3379. * If the panel is already in LP mode, do not need to
  3380. * set the regulator.
  3381. * IBB and AB power mode would be set at the same time
  3382. * in PMIC driver, so we only call ibb setting that is enough.
  3383. */
  3384. if (dsi_panel_is_type_oled(panel) &&
  3385. panel->power_mode != SDE_MODE_DPMS_LP2)
  3386. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3387. "ibb", REGULATOR_MODE_IDLE);
  3388. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3389. if (rc)
  3390. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3391. panel->name, rc);
  3392. exit:
  3393. mutex_unlock(&panel->panel_lock);
  3394. return rc;
  3395. }
  3396. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3397. {
  3398. int rc = 0;
  3399. if (!panel) {
  3400. DSI_ERR("invalid params\n");
  3401. return -EINVAL;
  3402. }
  3403. mutex_lock(&panel->panel_lock);
  3404. if (!panel->panel_initialized)
  3405. goto exit;
  3406. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3407. if (rc)
  3408. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3409. panel->name, rc);
  3410. exit:
  3411. mutex_unlock(&panel->panel_lock);
  3412. return rc;
  3413. }
  3414. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3415. {
  3416. int rc = 0;
  3417. if (!panel) {
  3418. DSI_ERR("invalid params\n");
  3419. return -EINVAL;
  3420. }
  3421. mutex_lock(&panel->panel_lock);
  3422. if (!panel->panel_initialized)
  3423. goto exit;
  3424. /*
  3425. * Consider about LP1->LP2->NOLP.
  3426. */
  3427. if (dsi_panel_is_type_oled(panel) &&
  3428. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3429. panel->power_mode == SDE_MODE_DPMS_LP2))
  3430. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3431. "ibb", REGULATOR_MODE_NORMAL);
  3432. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3433. if (rc)
  3434. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3435. panel->name, rc);
  3436. exit:
  3437. mutex_unlock(&panel->panel_lock);
  3438. return rc;
  3439. }
  3440. int dsi_panel_prepare(struct dsi_panel *panel)
  3441. {
  3442. int rc = 0;
  3443. if (!panel) {
  3444. DSI_ERR("invalid params\n");
  3445. return -EINVAL;
  3446. }
  3447. mutex_lock(&panel->panel_lock);
  3448. if (panel->lp11_init) {
  3449. rc = dsi_panel_power_on(panel);
  3450. if (rc) {
  3451. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3452. panel->name, rc);
  3453. goto error;
  3454. }
  3455. }
  3456. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3457. if (rc) {
  3458. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3459. panel->name, rc);
  3460. goto error;
  3461. }
  3462. error:
  3463. mutex_unlock(&panel->panel_lock);
  3464. return rc;
  3465. }
  3466. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3467. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3468. {
  3469. static const int ROI_CMD_LEN = 5;
  3470. int rc = 0;
  3471. /* DTYPE_DCS_LWRITE */
  3472. char *caset, *paset;
  3473. set->cmds = NULL;
  3474. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3475. if (!caset) {
  3476. rc = -ENOMEM;
  3477. goto exit;
  3478. }
  3479. caset[0] = 0x2a;
  3480. caset[1] = (roi->x & 0xFF00) >> 8;
  3481. caset[2] = roi->x & 0xFF;
  3482. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3483. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3484. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3485. if (!paset) {
  3486. rc = -ENOMEM;
  3487. goto error_free_mem;
  3488. }
  3489. paset[0] = 0x2b;
  3490. paset[1] = (roi->y & 0xFF00) >> 8;
  3491. paset[2] = roi->y & 0xFF;
  3492. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3493. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3494. set->type = DSI_CMD_SET_ROI;
  3495. set->state = DSI_CMD_SET_STATE_LP;
  3496. set->count = 2; /* send caset + paset together */
  3497. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3498. if (!set->cmds) {
  3499. rc = -ENOMEM;
  3500. goto error_free_mem;
  3501. }
  3502. set->cmds[0].msg.channel = 0;
  3503. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3504. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3505. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3506. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3507. set->cmds[0].msg.tx_buf = caset;
  3508. set->cmds[0].msg.rx_len = 0;
  3509. set->cmds[0].msg.rx_buf = 0;
  3510. set->cmds[0].msg.wait_ms = 0;
  3511. set->cmds[0].last_command = 0;
  3512. set->cmds[0].post_wait_ms = 0;
  3513. set->cmds[1].msg.channel = 0;
  3514. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3515. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3516. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3517. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3518. set->cmds[1].msg.tx_buf = paset;
  3519. set->cmds[1].msg.rx_len = 0;
  3520. set->cmds[1].msg.rx_buf = 0;
  3521. set->cmds[1].msg.wait_ms = 0;
  3522. set->cmds[1].last_command = 1;
  3523. set->cmds[1].post_wait_ms = 0;
  3524. goto exit;
  3525. error_free_mem:
  3526. kfree(caset);
  3527. kfree(paset);
  3528. kfree(set->cmds);
  3529. exit:
  3530. return rc;
  3531. }
  3532. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3533. int ctrl_idx)
  3534. {
  3535. int rc = 0;
  3536. if (!panel) {
  3537. DSI_ERR("invalid params\n");
  3538. return -EINVAL;
  3539. }
  3540. mutex_lock(&panel->panel_lock);
  3541. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3542. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3543. if (rc)
  3544. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3545. panel->name, rc);
  3546. mutex_unlock(&panel->panel_lock);
  3547. return rc;
  3548. }
  3549. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3550. int ctrl_idx)
  3551. {
  3552. int rc = 0;
  3553. if (!panel) {
  3554. DSI_ERR("invalid params\n");
  3555. return -EINVAL;
  3556. }
  3557. mutex_lock(&panel->panel_lock);
  3558. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3559. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3560. if (rc)
  3561. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3562. panel->name, rc);
  3563. mutex_unlock(&panel->panel_lock);
  3564. return rc;
  3565. }
  3566. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3567. struct dsi_rect *roi)
  3568. {
  3569. int rc = 0;
  3570. struct dsi_panel_cmd_set *set;
  3571. struct dsi_display_mode_priv_info *priv_info;
  3572. if (!panel || !panel->cur_mode) {
  3573. DSI_ERR("Invalid params\n");
  3574. return -EINVAL;
  3575. }
  3576. priv_info = panel->cur_mode->priv_info;
  3577. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3578. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3579. if (rc) {
  3580. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3581. panel->name, rc);
  3582. return rc;
  3583. }
  3584. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3585. roi->x, roi->y, roi->w, roi->h);
  3586. mutex_lock(&panel->panel_lock);
  3587. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3588. if (rc)
  3589. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3590. panel->name, rc);
  3591. mutex_unlock(&panel->panel_lock);
  3592. dsi_panel_destroy_cmd_packets(set);
  3593. dsi_panel_dealloc_cmd_packets(set);
  3594. return rc;
  3595. }
  3596. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3597. {
  3598. int rc = 0;
  3599. if (!panel) {
  3600. DSI_ERR("Invalid params\n");
  3601. return -EINVAL;
  3602. }
  3603. mutex_lock(&panel->panel_lock);
  3604. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3605. if (rc)
  3606. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3607. panel->name, rc);
  3608. mutex_unlock(&panel->panel_lock);
  3609. return rc;
  3610. }
  3611. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3612. {
  3613. int rc = 0;
  3614. if (!panel) {
  3615. DSI_ERR("Invalid params\n");
  3616. return -EINVAL;
  3617. }
  3618. mutex_lock(&panel->panel_lock);
  3619. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3620. if (rc)
  3621. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3622. panel->name, rc);
  3623. mutex_unlock(&panel->panel_lock);
  3624. return rc;
  3625. }
  3626. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3627. {
  3628. int rc = 0;
  3629. if (!panel) {
  3630. DSI_ERR("Invalid params\n");
  3631. return -EINVAL;
  3632. }
  3633. mutex_lock(&panel->panel_lock);
  3634. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3635. if (rc)
  3636. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3637. panel->name, rc);
  3638. mutex_unlock(&panel->panel_lock);
  3639. return rc;
  3640. }
  3641. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3642. {
  3643. int rc = 0;
  3644. if (!panel) {
  3645. DSI_ERR("Invalid params\n");
  3646. return -EINVAL;
  3647. }
  3648. mutex_lock(&panel->panel_lock);
  3649. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3650. if (rc)
  3651. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3652. panel->name, rc);
  3653. mutex_unlock(&panel->panel_lock);
  3654. return rc;
  3655. }
  3656. int dsi_panel_switch(struct dsi_panel *panel)
  3657. {
  3658. int rc = 0;
  3659. if (!panel) {
  3660. DSI_ERR("Invalid params\n");
  3661. return -EINVAL;
  3662. }
  3663. mutex_lock(&panel->panel_lock);
  3664. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3665. if (rc)
  3666. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3667. panel->name, rc);
  3668. mutex_unlock(&panel->panel_lock);
  3669. return rc;
  3670. }
  3671. int dsi_panel_post_switch(struct dsi_panel *panel)
  3672. {
  3673. int rc = 0;
  3674. if (!panel) {
  3675. DSI_ERR("Invalid params\n");
  3676. return -EINVAL;
  3677. }
  3678. mutex_lock(&panel->panel_lock);
  3679. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3680. if (rc)
  3681. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3682. panel->name, rc);
  3683. mutex_unlock(&panel->panel_lock);
  3684. return rc;
  3685. }
  3686. int dsi_panel_enable(struct dsi_panel *panel)
  3687. {
  3688. int rc = 0;
  3689. if (!panel) {
  3690. DSI_ERR("Invalid params\n");
  3691. return -EINVAL;
  3692. }
  3693. mutex_lock(&panel->panel_lock);
  3694. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3695. if (rc)
  3696. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3697. panel->name, rc);
  3698. else
  3699. panel->panel_initialized = true;
  3700. mutex_unlock(&panel->panel_lock);
  3701. return rc;
  3702. }
  3703. int dsi_panel_post_enable(struct dsi_panel *panel)
  3704. {
  3705. int rc = 0;
  3706. if (!panel) {
  3707. DSI_ERR("invalid params\n");
  3708. return -EINVAL;
  3709. }
  3710. mutex_lock(&panel->panel_lock);
  3711. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3712. if (rc) {
  3713. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3714. panel->name, rc);
  3715. goto error;
  3716. }
  3717. error:
  3718. mutex_unlock(&panel->panel_lock);
  3719. return rc;
  3720. }
  3721. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3722. {
  3723. int rc = 0;
  3724. if (!panel) {
  3725. DSI_ERR("invalid params\n");
  3726. return -EINVAL;
  3727. }
  3728. mutex_lock(&panel->panel_lock);
  3729. if (gpio_is_valid(panel->bl_config.en_gpio))
  3730. gpio_set_value(panel->bl_config.en_gpio, 0);
  3731. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3732. if (rc) {
  3733. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3734. panel->name, rc);
  3735. goto error;
  3736. }
  3737. error:
  3738. mutex_unlock(&panel->panel_lock);
  3739. return rc;
  3740. }
  3741. int dsi_panel_disable(struct dsi_panel *panel)
  3742. {
  3743. int rc = 0;
  3744. if (!panel) {
  3745. DSI_ERR("invalid params\n");
  3746. return -EINVAL;
  3747. }
  3748. mutex_lock(&panel->panel_lock);
  3749. /* Avoid sending panel off commands when ESD recovery is underway */
  3750. if (!atomic_read(&panel->esd_recovery_pending)) {
  3751. /*
  3752. * Need to set IBB/AB regulator mode to STANDBY,
  3753. * if panel is going off from AOD mode.
  3754. */
  3755. if (dsi_panel_is_type_oled(panel) &&
  3756. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3757. panel->power_mode == SDE_MODE_DPMS_LP2))
  3758. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3759. "ibb", REGULATOR_MODE_STANDBY);
  3760. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3761. if (rc) {
  3762. /*
  3763. * Sending panel off commands may fail when DSI
  3764. * controller is in a bad state. These failures can be
  3765. * ignored since controller will go for full reset on
  3766. * subsequent display enable anyway.
  3767. */
  3768. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3769. panel->name, rc);
  3770. rc = 0;
  3771. }
  3772. }
  3773. panel->panel_initialized = false;
  3774. panel->power_mode = SDE_MODE_DPMS_OFF;
  3775. mutex_unlock(&panel->panel_lock);
  3776. return rc;
  3777. }
  3778. int dsi_panel_unprepare(struct dsi_panel *panel)
  3779. {
  3780. int rc = 0;
  3781. if (!panel) {
  3782. DSI_ERR("invalid params\n");
  3783. return -EINVAL;
  3784. }
  3785. mutex_lock(&panel->panel_lock);
  3786. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3787. if (rc) {
  3788. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3789. panel->name, rc);
  3790. goto error;
  3791. }
  3792. error:
  3793. mutex_unlock(&panel->panel_lock);
  3794. return rc;
  3795. }
  3796. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3797. {
  3798. int rc = 0;
  3799. if (!panel) {
  3800. DSI_ERR("invalid params\n");
  3801. return -EINVAL;
  3802. }
  3803. mutex_lock(&panel->panel_lock);
  3804. rc = dsi_panel_power_off(panel);
  3805. if (rc) {
  3806. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3807. panel->name, rc);
  3808. goto error;
  3809. }
  3810. error:
  3811. mutex_unlock(&panel->panel_lock);
  3812. return rc;
  3813. }