62206deed6
Added ipq9574 target header files under qca9574 to make fw-api project compatible to host. Change-Id: I6a3b43861772a98bb185ee3101b3942dd30abc77 Signed-off-by: Basamma Yakkanahalli <ybasamma@codeaurora.org>
2794 lines
79 KiB
C
2794 lines
79 KiB
C
/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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// $ATH_LICENSE_HW_HDR_C$
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//
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// DO NOT EDIT! This file is automatically generated
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// These definitions are tied to a particular hardware layout
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#ifndef _RX_REO_QUEUE_EXT_H_
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#define _RX_REO_QUEUE_EXT_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "uniform_descriptor_header.h"
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#include "rx_mpdu_link_ptr.h"
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// ################ START SUMMARY #################
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//
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// Dword Fields
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// 0 struct uniform_descriptor_header descriptor_header;
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// 1 reserved_1a[31:0]
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// 2-3 struct rx_mpdu_link_ptr mpdu_link_pointer_0;
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// 4-5 struct rx_mpdu_link_ptr mpdu_link_pointer_1;
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// 6-7 struct rx_mpdu_link_ptr mpdu_link_pointer_2;
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// 8-9 struct rx_mpdu_link_ptr mpdu_link_pointer_3;
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// 10-11 struct rx_mpdu_link_ptr mpdu_link_pointer_4;
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// 12-13 struct rx_mpdu_link_ptr mpdu_link_pointer_5;
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// 14-15 struct rx_mpdu_link_ptr mpdu_link_pointer_6;
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// 16-17 struct rx_mpdu_link_ptr mpdu_link_pointer_7;
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// 18-19 struct rx_mpdu_link_ptr mpdu_link_pointer_8;
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// 20-21 struct rx_mpdu_link_ptr mpdu_link_pointer_9;
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// 22-23 struct rx_mpdu_link_ptr mpdu_link_pointer_10;
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// 24-25 struct rx_mpdu_link_ptr mpdu_link_pointer_11;
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// 26-27 struct rx_mpdu_link_ptr mpdu_link_pointer_12;
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// 28-29 struct rx_mpdu_link_ptr mpdu_link_pointer_13;
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// 30-31 struct rx_mpdu_link_ptr mpdu_link_pointer_14;
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//
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// ################ END SUMMARY #################
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#define NUM_OF_DWORDS_RX_REO_QUEUE_EXT 32
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struct rx_reo_queue_ext {
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struct uniform_descriptor_header descriptor_header;
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uint32_t reserved_1a : 32; //[31:0]
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struct rx_mpdu_link_ptr mpdu_link_pointer_0;
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struct rx_mpdu_link_ptr mpdu_link_pointer_1;
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struct rx_mpdu_link_ptr mpdu_link_pointer_2;
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struct rx_mpdu_link_ptr mpdu_link_pointer_3;
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struct rx_mpdu_link_ptr mpdu_link_pointer_4;
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struct rx_mpdu_link_ptr mpdu_link_pointer_5;
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struct rx_mpdu_link_ptr mpdu_link_pointer_6;
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struct rx_mpdu_link_ptr mpdu_link_pointer_7;
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struct rx_mpdu_link_ptr mpdu_link_pointer_8;
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struct rx_mpdu_link_ptr mpdu_link_pointer_9;
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struct rx_mpdu_link_ptr mpdu_link_pointer_10;
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struct rx_mpdu_link_ptr mpdu_link_pointer_11;
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struct rx_mpdu_link_ptr mpdu_link_pointer_12;
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struct rx_mpdu_link_ptr mpdu_link_pointer_13;
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struct rx_mpdu_link_ptr mpdu_link_pointer_14;
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};
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/*
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struct uniform_descriptor_header descriptor_header
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Details about which module owns this struct.
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Note that sub field Buffer_type shall be set to
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Receive_REO_queue_ext_descriptor
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reserved_1a
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<legal 0>
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struct rx_mpdu_link_ptr mpdu_link_pointer_0
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_1
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_2
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_3
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_4
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_5
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_6
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_7
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_8
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_9
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_10
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_11
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_12
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_13
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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struct rx_mpdu_link_ptr mpdu_link_pointer_14
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Consumer: REO
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Producer: REO
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Pointer to the next MPDU_link descriptor in the MPDU
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queue
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*/
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/* EXTERNAL REFERENCE : struct uniform_descriptor_header descriptor_header */
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/* Description RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_OWNER
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Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
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Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
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The owner of this data structure:
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<enum 0 WBM_owned> Buffer Manager currently owns this
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data structure.
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<enum 1 SW_OR_FW_owned> Software of FW currently owns
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this data structure.
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<enum 2 TQM_owned> Transmit Queue Manager currently owns
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this data structure.
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<enum 3 RXDMA_owned> Receive DMA currently owns this
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data structure.
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<enum 4 REO_owned> Reorder currently owns this data
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structure.
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<enum 5 SWITCH_owned> SWITCH currently owns this data
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structure.
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<legal 0-5>
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*/
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_OWNER_LSB 0
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f
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/* Description RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_BUFFER_TYPE
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Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
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Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
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Field describing what contents format is of this
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descriptor
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<enum 0 Transmit_MSDU_Link_descriptor >
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<enum 1 Transmit_MPDU_Link_descriptor >
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<enum 2 Transmit_MPDU_Queue_head_descriptor>
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<enum 3 Transmit_MPDU_Queue_ext_descriptor>
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<enum 4 Transmit_flow_descriptor>
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<enum 5 Transmit_buffer > NOT TO BE USED:
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<enum 6 Receive_MSDU_Link_descriptor >
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<enum 7 Receive_MPDU_Link_descriptor >
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<enum 8 Receive_REO_queue_descriptor >
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<enum 9 Receive_REO_queue_ext_descriptor >
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<enum 10 Receive_buffer >
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<enum 11 Idle_link_list_entry>
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<legal 0-11>
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*/
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0
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/* Description RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_RESERVED_0A
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<legal 0>
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*/
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_RESERVED_0A_OFFSET 0x00000000
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_RESERVED_0A_LSB 8
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#define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_RESERVED_0A_MASK 0xffffff00
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/* Description RX_REO_QUEUE_EXT_1_RESERVED_1A
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<legal 0>
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*/
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#define RX_REO_QUEUE_EXT_1_RESERVED_1A_OFFSET 0x00000004
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#define RX_REO_QUEUE_EXT_1_RESERVED_1A_LSB 0
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#define RX_REO_QUEUE_EXT_1_RESERVED_1A_MASK 0xffffffff
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/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_0 */
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/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
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/* Description RX_REO_QUEUE_EXT_2_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
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Address (lower 32 bits) of the MSDU buffer OR
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MSDU_EXTENSION descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define RX_REO_QUEUE_EXT_2_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000008
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#define RX_REO_QUEUE_EXT_2_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
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#define RX_REO_QUEUE_EXT_2_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
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/* Description RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
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Address (upper 8 bits) of the MSDU buffer OR
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MSDU_EXTENSION descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000000c
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
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/* Description RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
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Consumer: WBM
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Producer: SW/FW
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In case of 'NULL' pointer, this field is set to 0
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Indicates to which buffer manager the buffer OR
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MSDU_EXTENSION descriptor OR link descriptor that is being
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pointed to shall be returned after the frame has been
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processed. It is used by WBM for routing purposes.
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<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
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to the WMB buffer idle list
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<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
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returned to the WMB idle link descriptor idle list
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<enum 2 FW_BM> This buffer shall be returned to the FW
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<enum 3 SW0_BM> This buffer shall be returned to the SW,
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ring 0
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<enum 4 SW1_BM> This buffer shall be returned to the SW,
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ring 1
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<enum 5 SW2_BM> This buffer shall be returned to the SW,
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ring 2
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<enum 6 SW3_BM> This buffer shall be returned to the SW,
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ring 3
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<enum 7 SW4_BM> This buffer shall be returned to the SW,
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ring 3
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<legal all>
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*/
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000000c
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
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/* Description RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
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Cookie field exclusively used by SW.
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In case of 'NULL' pointer, this field is set to 0
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HW ignores the contents, accept that it passes the
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programmed value on to other descriptors together with the
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physical address
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Field can be used by SW to for example associate the
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buffers physical address with the virtual address
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The bit definitions as used by SW are within SW HLD
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specification
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NOTE:
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The three most significant bits can have a special
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meaning in case this struct is embedded in a TX_MPDU_DETAILS
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STRUCT, and field transmit_bw_restriction is set
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In case of NON punctured transmission:
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Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
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In case of punctured transmission:
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Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
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Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
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Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
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Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
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Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
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Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
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Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
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Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
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Note: a punctured transmission is indicated by the
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presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
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TLV
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<legal all>
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*/
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000000c
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
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#define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
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/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_1 */
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/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
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/* Description RX_REO_QUEUE_EXT_4_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
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Address (lower 32 bits) of the MSDU buffer OR
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MSDU_EXTENSION descriptor OR Link Descriptor
|
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define RX_REO_QUEUE_EXT_4_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000010
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#define RX_REO_QUEUE_EXT_4_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_4_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000014
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000014
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000014
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_2 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_6_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_6_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000018
|
|
#define RX_REO_QUEUE_EXT_6_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_6_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000001c
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000001c
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000001c
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_3 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_8_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_8_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000020
|
|
#define RX_REO_QUEUE_EXT_8_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_8_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000024
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000024
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000024
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_4 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_10_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_10_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000028
|
|
#define RX_REO_QUEUE_EXT_10_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_10_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000002c
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000002c
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000002c
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_5 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_12_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_12_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000030
|
|
#define RX_REO_QUEUE_EXT_12_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_12_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000034
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000034
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000034
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_6 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_14_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_14_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000038
|
|
#define RX_REO_QUEUE_EXT_14_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_14_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000003c
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000003c
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000003c
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_7 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_16_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_16_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000040
|
|
#define RX_REO_QUEUE_EXT_16_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_16_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000044
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000044
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000044
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_8 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_18_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_18_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000048
|
|
#define RX_REO_QUEUE_EXT_18_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_18_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000004c
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000004c
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000004c
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_9 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_20_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_20_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000050
|
|
#define RX_REO_QUEUE_EXT_20_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_20_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000054
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000054
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000054
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_10 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_22_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_22_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000058
|
|
#define RX_REO_QUEUE_EXT_22_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_22_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000005c
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000005c
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000005c
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_11 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_24_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_24_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000060
|
|
#define RX_REO_QUEUE_EXT_24_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_24_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000064
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000064
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000064
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_12 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_26_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_26_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000068
|
|
#define RX_REO_QUEUE_EXT_26_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_26_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000006c
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000006c
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000006c
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_13 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_28_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_28_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000070
|
|
#define RX_REO_QUEUE_EXT_28_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_28_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000074
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000074
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000074
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
/* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_14 */
|
|
|
|
|
|
/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
|
|
|
|
|
|
/* Description RX_REO_QUEUE_EXT_30_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
|
|
|
|
Address (lower 32 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_30_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000078
|
|
#define RX_REO_QUEUE_EXT_30_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
|
|
#define RX_REO_QUEUE_EXT_30_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
|
|
|
|
Address (upper 8 bits) of the MSDU buffer OR
|
|
MSDU_EXTENSION descriptor OR Link Descriptor
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000007c
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
|
|
|
|
/* Description RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
|
|
|
|
Consumer: WBM
|
|
|
|
Producer: SW/FW
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
Indicates to which buffer manager the buffer OR
|
|
MSDU_EXTENSION descriptor OR link descriptor that is being
|
|
pointed to shall be returned after the frame has been
|
|
processed. It is used by WBM for routing purposes.
|
|
|
|
|
|
|
|
<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
|
|
to the WMB buffer idle list
|
|
|
|
<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
|
|
returned to the WMB idle link descriptor idle list
|
|
|
|
<enum 2 FW_BM> This buffer shall be returned to the FW
|
|
|
|
<enum 3 SW0_BM> This buffer shall be returned to the SW,
|
|
ring 0
|
|
|
|
<enum 4 SW1_BM> This buffer shall be returned to the SW,
|
|
ring 1
|
|
|
|
<enum 5 SW2_BM> This buffer shall be returned to the SW,
|
|
ring 2
|
|
|
|
<enum 6 SW3_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
<enum 7 SW4_BM> This buffer shall be returned to the SW,
|
|
ring 3
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000007c
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
|
|
|
|
/* Description RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
|
|
|
|
Cookie field exclusively used by SW.
|
|
|
|
|
|
|
|
In case of 'NULL' pointer, this field is set to 0
|
|
|
|
|
|
|
|
HW ignores the contents, accept that it passes the
|
|
programmed value on to other descriptors together with the
|
|
physical address
|
|
|
|
|
|
|
|
Field can be used by SW to for example associate the
|
|
buffers physical address with the virtual address
|
|
|
|
The bit definitions as used by SW are within SW HLD
|
|
specification
|
|
|
|
|
|
|
|
NOTE:
|
|
|
|
The three most significant bits can have a special
|
|
meaning in case this struct is embedded in a TX_MPDU_DETAILS
|
|
STRUCT, and field transmit_bw_restriction is set
|
|
|
|
|
|
|
|
In case of NON punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
|
|
|
|
Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
|
|
|
|
|
|
|
|
In case of punctured transmission:
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
|
|
|
|
Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
|
|
|
|
|
|
|
|
Note: a punctured transmission is indicated by the
|
|
presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
|
|
TLV
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000007c
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
|
|
#define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
|
|
|
|
|
|
#endif // _RX_REO_QUEUE_EXT_H_
|