62206deed6
Added ipq9574 target header files under qca9574 to make fw-api project compatible to host. Change-Id: I6a3b43861772a98bb185ee3101b3942dd30abc77 Signed-off-by: Basamma Yakkanahalli <ybasamma@codeaurora.org>
2073 line
76 KiB
C
2073 line
76 KiB
C
/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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// $ATH_LICENSE_HW_HDR_C$
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//
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// DO NOT EDIT! This file is automatically generated
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// These definitions are tied to a particular hardware layout
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#ifndef _PHYRX_RSSI_LEGACY_H_
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#define _PHYRX_RSSI_LEGACY_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "receive_rssi_info.h"
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// ################ START SUMMARY #################
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//
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// Dword Fields
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// 0 reception_type[3:0], rx_chain_mask_type[4], reserved_0[5], receive_bandwidth[7:6], rx_chain_mask[15:8], phy_ppdu_id[31:16]
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// 1 sw_phy_meta_data[31:0]
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// 2 ppdu_start_timestamp[31:0]
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// 3-18 struct receive_rssi_info pre_rssi_info_details;
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// 19-34 struct receive_rssi_info preamble_rssi_info_details;
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// 35 pre_rssi_comb[7:0], rssi_comb[15:8], normalized_pre_rssi_comb[23:16], normalized_rssi_comb[31:24]
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//
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// ################ END SUMMARY #################
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#define NUM_OF_DWORDS_PHYRX_RSSI_LEGACY 36
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struct phyrx_rssi_legacy {
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uint32_t reception_type : 4, //[3:0]
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rx_chain_mask_type : 1, //[4]
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reserved_0 : 1, //[5]
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receive_bandwidth : 2, //[7:6]
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rx_chain_mask : 8, //[15:8]
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phy_ppdu_id : 16; //[31:16]
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uint32_t sw_phy_meta_data : 32; //[31:0]
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uint32_t ppdu_start_timestamp : 32; //[31:0]
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struct receive_rssi_info pre_rssi_info_details;
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struct receive_rssi_info preamble_rssi_info_details;
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uint32_t pre_rssi_comb : 8, //[7:0]
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rssi_comb : 8, //[15:8]
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normalized_pre_rssi_comb : 8, //[23:16]
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normalized_rssi_comb : 8; //[31:24]
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};
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/*
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reception_type
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This field helps MAC SW determine which field in this
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(and following TLVs) will contain valid information. For
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example some RSSI info not valid in case of uplink_ofdma..
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<enum 0 reception_is_uplink_ofdma>
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<enum 1 reception_is_uplink_mimo>
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<enum 2 reception_is_other>
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<enum 3 reception_is_frameless> PHY RX has been
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instructed in advance that the upcoming reception is
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frameless. This implieas that in advance it is known that
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all frames will collide in the medium, and nothing can be
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properly decoded... This can happen during the CTS reception
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in response to the triggered MU-RTS transmission.
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MAC takes no action when seeing this e_num. For the
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frameless reception the indication in pkt_end is the final
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one evaluated by the MAC
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<legal 0-3>
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rx_chain_mask_type
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Indicates if the field rx_chain_mask represents the mask
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at start of reception (on which the Rssi_comb value is
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based), or the setting used during the remainder of the
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reception
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1'b0: rxtd.listen_pri80_mask
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1'b1: Final receive mask
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<legal all>
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reserved_0
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<legal 0>
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receive_bandwidth
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Full receive Bandwidth
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<enum 0 full_rx_bw_20_mhz>
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<enum 1 full_rx_bw_40_mhz>
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<enum 2 full_rx_bw_80_mhz>
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<enum 3 full_rx_bw_160_mhz>
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<legal 0-3>
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rx_chain_mask
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Description dependent on the setting of field
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Rx_chain_mask_type.
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The chain mask at the start of the reception of this
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frame when Rx_chain_mask_type is set to 1'b0. In this mode
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used in 11ax TPC calculations for UL OFDMA/MIMO and has to
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be in sync with the rssi_comb value as this is also used by
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the MAC for the TPC calculations.
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The final rx chain mask used for the frame reception
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when Rx_chain_mask_type is set to 1'b1
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each bit is one antenna
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0: the chain is NOT used
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1: the chain is used
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Supports up to 8 chains
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<legal all>
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phy_ppdu_id
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A ppdu counter value that PHY increments for every PPDU
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received. The counter value wraps around
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<legal all>
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sw_phy_meta_data
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32 bit Meta data that SW can program in a 32 bit PHY
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register and PHY will insert the value in every
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RX_RSSI_LEGACY TLV that it generates.
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SW uses this field to embed among other things some SW
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channel info.
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ppdu_start_timestamp
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Timestamp that indicates when the PPDU that contained
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this MPDU started on the medium.
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Note that PHY will detect the start later, and will have
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to derive out of the preamble info when the frame actually
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appeared on the medium
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<legal 0- 10>
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struct receive_rssi_info pre_rssi_info_details
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This field is not valid when reception_is_uplink_ofdma
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Overview of the pre-RSSI values. That is RSSI values
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measured on the medium before this reception started.
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struct receive_rssi_info preamble_rssi_info_details
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This field is not valid when reception_is_uplink_ofdma
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Overview of the RSSI values measured during the
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pre-amble phase of this reception
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pre_rssi_comb
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Combined pre_rssi of all chains. Based on primary
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channel RSSI.
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RSSI is reported as 8b signed values. Nominally value is
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in dB units above or below the noisefloor(minCCApwr).
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The resolution can be:
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1dB or 0.5dB. This is statically configured within the
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PHY and MAC
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In case of 1dB, the Range is:
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-128dB to 127dB
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In case of 0.5dB, the Range is:
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-64dB to 63.5dB
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<legal all>
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rssi_comb
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Combined rssi of all chains. Based on primary channel
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RSSI.
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RSSI is reported as 8b signed values. Nominally value is
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in dB units above or below the noisefloor(minCCApwr).
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The resolution can be:
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1dB or 0.5dB. This is statically configured within the
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PHY and MAC
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In case of 1dB, the Range is:
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-128dB to 127dB
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In case of 0.5dB, the Range is:
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-64dB to 63.5dB
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<legal all>
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normalized_pre_rssi_comb
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Combined pre_rssi of all chains, but normalized back to
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a single chain. This avoids PDG from having to evaluate this
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in combination with receive chain mask and perform all kinds
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of pre-processing algorithms.
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Based on primary channel RSSI.
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RSSI is reported as 8b signed values. Nominally value is
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in dB units above or below the noisefloor(minCCApwr).
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The resolution can be:
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1dB or 0.5dB. This is statically configured within the
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PHY and MAC
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In case of 1dB, the Range is:
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-128dB to 127dB
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In case of 0.5dB, the Range is:
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-64dB to 63.5dB
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<legal all>
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normalized_rssi_comb
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Combined rssi of all chains, but normalized back to a
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single chain. This avoids PDG from having to evaluate this
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in combination with receive chain mask and perform all kinds
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of pre-processing algorithms.
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Based on primary channel RSSI.
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RSSI is reported as 8b signed values. Nominally value is
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in dB units above or below the noisefloor(minCCApwr).
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The resolution can be:
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1dB or 0.5dB. This is statically configured within the
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PHY and MAC
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In case of 1dB, the Range is:
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-128dB to 127dB
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In case of 0.5dB, the Range is:
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-64dB to 63.5dB
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<legal all>
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*/
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/* Description PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE
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This field helps MAC SW determine which field in this
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(and following TLVs) will contain valid information. For
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example some RSSI info not valid in case of uplink_ofdma..
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<enum 0 reception_is_uplink_ofdma>
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<enum 1 reception_is_uplink_mimo>
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<enum 2 reception_is_other>
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<enum 3 reception_is_frameless> PHY RX has been
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instructed in advance that the upcoming reception is
|
|
frameless. This implieas that in advance it is known that
|
|
all frames will collide in the medium, and nothing can be
|
|
properly decoded... This can happen during the CTS reception
|
|
in response to the triggered MU-RTS transmission.
|
|
|
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MAC takes no action when seeing this e_num. For the
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frameless reception the indication in pkt_end is the final
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one evaluated by the MAC
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<legal 0-3>
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*/
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#define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_OFFSET 0x00000000
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#define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_LSB 0
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#define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_MASK 0x0000000f
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/* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE
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Indicates if the field rx_chain_mask represents the mask
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at start of reception (on which the Rssi_comb value is
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based), or the setting used during the remainder of the
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reception
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1'b0: rxtd.listen_pri80_mask
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1'b1: Final receive mask
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<legal all>
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*/
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#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_OFFSET 0x00000000
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#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_LSB 4
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#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_MASK 0x00000010
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/* Description PHYRX_RSSI_LEGACY_0_RESERVED_0
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<legal 0>
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*/
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#define PHYRX_RSSI_LEGACY_0_RESERVED_0_OFFSET 0x00000000
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#define PHYRX_RSSI_LEGACY_0_RESERVED_0_LSB 5
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#define PHYRX_RSSI_LEGACY_0_RESERVED_0_MASK 0x00000020
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/* Description PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH
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Full receive Bandwidth
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<enum 0 full_rx_bw_20_mhz>
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<enum 1 full_rx_bw_40_mhz>
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<enum 2 full_rx_bw_80_mhz>
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<enum 3 full_rx_bw_160_mhz>
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<legal 0-3>
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*/
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#define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_OFFSET 0x00000000
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#define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_LSB 6
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#define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_MASK 0x000000c0
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/* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK
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Description dependent on the setting of field
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Rx_chain_mask_type.
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The chain mask at the start of the reception of this
|
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frame when Rx_chain_mask_type is set to 1'b0. In this mode
|
|
used in 11ax TPC calculations for UL OFDMA/MIMO and has to
|
|
be in sync with the rssi_comb value as this is also used by
|
|
the MAC for the TPC calculations.
|
|
|
|
|
|
|
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The final rx chain mask used for the frame reception
|
|
when Rx_chain_mask_type is set to 1'b1
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each bit is one antenna
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0: the chain is NOT used
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1: the chain is used
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Supports up to 8 chains
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<legal all>
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*/
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#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_OFFSET 0x00000000
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#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_LSB 8
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#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_MASK 0x0000ff00
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/* Description PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID
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A ppdu counter value that PHY increments for every PPDU
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received. The counter value wraps around
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<legal all>
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*/
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#define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_OFFSET 0x00000000
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#define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_LSB 16
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#define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_MASK 0xffff0000
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/* Description PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA
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32 bit Meta data that SW can program in a 32 bit PHY
|
|
register and PHY will insert the value in every
|
|
RX_RSSI_LEGACY TLV that it generates.
|
|
|
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SW uses this field to embed among other things some SW
|
|
channel info.
|
|
*/
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#define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_OFFSET 0x00000004
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#define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_LSB 0
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#define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_MASK 0xffffffff
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/* Description PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP
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Timestamp that indicates when the PPDU that contained
|
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this MPDU started on the medium.
|
|
|
|
|
|
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Note that PHY will detect the start later, and will have
|
|
to derive out of the preamble info when the frame actually
|
|
appeared on the medium
|
|
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|
<legal 0- 10>
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|
*/
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#define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_OFFSET 0x00000008
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#define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_LSB 0
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#define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_MASK 0xffffffff
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/* EXTERNAL REFERENCE : struct receive_rssi_info pre_rssi_info_details */
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/* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0
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RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth.
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Value of 0x80 indicates invalid.
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*/
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#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000000c
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#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0
|
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#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff
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/* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0
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|
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RSSI of RX PPDU on chain 0 of extension 20 MHz
|
|
bandwidth.
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Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000000c
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#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8
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#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00
|
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|
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/* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0
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|
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|
RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz
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|
bandwidth.
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|
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|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000000c
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|
#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16
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|
#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000
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/* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000000c
|
|
#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000010
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000010
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000010
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000010
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_OFFSET 0x00000014
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_OFFSET 0x00000014
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000014
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000014
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000018
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000018
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000018
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000018
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_OFFSET 0x0000001c
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_OFFSET 0x0000001c
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x0000001c
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x0000001c
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000020
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000020
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000020
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000020
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_OFFSET 0x00000024
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_OFFSET 0x00000024
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000024
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000024
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000028
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000028
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000028
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000028
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_OFFSET 0x0000002c
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_OFFSET 0x0000002c
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_OFFSET 0x0000002c
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_OFFSET 0x0000002c
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_OFFSET 0x00000030
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_OFFSET 0x00000030
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_OFFSET 0x00000030
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_OFFSET 0x00000030
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_OFFSET 0x00000034
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_OFFSET 0x00000034
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_OFFSET 0x00000034
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_OFFSET 0x00000034
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_OFFSET 0x00000038
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_OFFSET 0x00000038
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_OFFSET 0x00000038
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_OFFSET 0x00000038
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_OFFSET 0x0000003c
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_OFFSET 0x0000003c
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_OFFSET 0x0000003c
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_OFFSET 0x0000003c
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_OFFSET 0x00000040
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_OFFSET 0x00000040
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_OFFSET 0x00000040
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_OFFSET 0x00000040
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_OFFSET 0x00000044
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_OFFSET 0x00000044
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_OFFSET 0x00000044
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_OFFSET 0x00000044
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_OFFSET 0x00000048
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_OFFSET 0x00000048
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_OFFSET 0x00000048
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_OFFSET 0x00000048
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_MASK 0xff000000
|
|
|
|
/* EXTERNAL REFERENCE : struct receive_rssi_info preamble_rssi_info_details */
|
|
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000004c
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000004c
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000004c
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000004c
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000050
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000050
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000050
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0
|
|
|
|
RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000050
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_OFFSET 0x00000054
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_OFFSET 0x00000054
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000054
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000054
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000058
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000058
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000058
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1
|
|
|
|
RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000058
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_OFFSET 0x0000005c
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_OFFSET 0x0000005c
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x0000005c
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x0000005c
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000060
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000060
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000060
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2
|
|
|
|
RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000060
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_OFFSET 0x00000064
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_OFFSET 0x00000064
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000064
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000064
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000068
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000068
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000068
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3
|
|
|
|
RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000068
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_OFFSET 0x0000006c
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_OFFSET 0x0000006c
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_OFFSET 0x0000006c
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_OFFSET 0x0000006c
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_OFFSET 0x00000070
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_OFFSET 0x00000070
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_OFFSET 0x00000070
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4
|
|
|
|
RSSI of RX PPDU on chain 4 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_OFFSET 0x00000070
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_OFFSET 0x00000074
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_OFFSET 0x00000074
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_OFFSET 0x00000074
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_OFFSET 0x00000074
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_OFFSET 0x00000078
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_OFFSET 0x00000078
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_OFFSET 0x00000078
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5
|
|
|
|
RSSI of RX PPDU on chain 5 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_OFFSET 0x00000078
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_OFFSET 0x0000007c
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_OFFSET 0x0000007c
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_OFFSET 0x0000007c
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_OFFSET 0x0000007c
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_OFFSET 0x00000080
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_OFFSET 0x00000080
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_OFFSET 0x00000080
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6
|
|
|
|
RSSI of RX PPDU on chain 6 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_OFFSET 0x00000080
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of primary 20 MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_OFFSET 0x00000084
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_OFFSET 0x00000084
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 40, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_OFFSET 0x00000084
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 40, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_OFFSET 0x00000084
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 80, low 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_OFFSET 0x00000088
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 80, low-high 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_OFFSET 0x00000088
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 80, high-low 20
|
|
MHz bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_OFFSET 0x00000088
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7
|
|
|
|
RSSI of RX PPDU on chain 7 of extension 80, high 20 MHz
|
|
bandwidth.
|
|
|
|
Value of 0x80 indicates invalid.
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_OFFSET 0x00000088
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_MASK 0xff000000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB
|
|
|
|
Combined pre_rssi of all chains. Based on primary
|
|
channel RSSI.
|
|
|
|
|
|
|
|
RSSI is reported as 8b signed values. Nominally value is
|
|
in dB units above or below the noisefloor(minCCApwr).
|
|
|
|
|
|
|
|
The resolution can be:
|
|
|
|
1dB or 0.5dB. This is statically configured within the
|
|
PHY and MAC
|
|
|
|
|
|
|
|
In case of 1dB, the Range is:
|
|
|
|
-128dB to 127dB
|
|
|
|
|
|
|
|
In case of 0.5dB, the Range is:
|
|
|
|
-64dB to 63.5dB
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_OFFSET 0x0000008c
|
|
#define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_LSB 0
|
|
#define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_MASK 0x000000ff
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_35_RSSI_COMB
|
|
|
|
Combined rssi of all chains. Based on primary channel
|
|
RSSI.
|
|
|
|
|
|
|
|
RSSI is reported as 8b signed values. Nominally value is
|
|
in dB units above or below the noisefloor(minCCApwr).
|
|
|
|
|
|
|
|
The resolution can be:
|
|
|
|
1dB or 0.5dB. This is statically configured within the
|
|
PHY and MAC
|
|
|
|
|
|
|
|
In case of 1dB, the Range is:
|
|
|
|
-128dB to 127dB
|
|
|
|
|
|
|
|
In case of 0.5dB, the Range is:
|
|
|
|
-64dB to 63.5dB
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_35_RSSI_COMB_OFFSET 0x0000008c
|
|
#define PHYRX_RSSI_LEGACY_35_RSSI_COMB_LSB 8
|
|
#define PHYRX_RSSI_LEGACY_35_RSSI_COMB_MASK 0x0000ff00
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB
|
|
|
|
Combined pre_rssi of all chains, but normalized back to
|
|
a single chain. This avoids PDG from having to evaluate this
|
|
in combination with receive chain mask and perform all kinds
|
|
of pre-processing algorithms.
|
|
|
|
|
|
|
|
Based on primary channel RSSI.
|
|
|
|
|
|
|
|
RSSI is reported as 8b signed values. Nominally value is
|
|
in dB units above or below the noisefloor(minCCApwr).
|
|
|
|
|
|
|
|
The resolution can be:
|
|
|
|
1dB or 0.5dB. This is statically configured within the
|
|
PHY and MAC
|
|
|
|
|
|
|
|
In case of 1dB, the Range is:
|
|
|
|
-128dB to 127dB
|
|
|
|
|
|
|
|
In case of 0.5dB, the Range is:
|
|
|
|
-64dB to 63.5dB
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_OFFSET 0x0000008c
|
|
#define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_LSB 16
|
|
#define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_MASK 0x00ff0000
|
|
|
|
/* Description PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB
|
|
|
|
Combined rssi of all chains, but normalized back to a
|
|
single chain. This avoids PDG from having to evaluate this
|
|
in combination with receive chain mask and perform all kinds
|
|
of pre-processing algorithms.
|
|
|
|
|
|
|
|
Based on primary channel RSSI.
|
|
|
|
|
|
|
|
RSSI is reported as 8b signed values. Nominally value is
|
|
in dB units above or below the noisefloor(minCCApwr).
|
|
|
|
|
|
|
|
The resolution can be:
|
|
|
|
1dB or 0.5dB. This is statically configured within the
|
|
PHY and MAC
|
|
|
|
In case of 1dB, the Range is:
|
|
|
|
-128dB to 127dB
|
|
|
|
|
|
|
|
In case of 0.5dB, the Range is:
|
|
|
|
-64dB to 63.5dB
|
|
|
|
|
|
|
|
<legal all>
|
|
*/
|
|
#define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_OFFSET 0x0000008c
|
|
#define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_LSB 24
|
|
#define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_MASK 0xff000000
|
|
|
|
|
|
#endif // _PHYRX_RSSI_LEGACY_H_
|