dsi_panel.c 120 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. #define RSCC_MODE_THRESHOLD_TIME_US 40
  34. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  35. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  36. {
  37. char *bp;
  38. bp = buf;
  39. /* First 7 bytes are cmd header */
  40. *bp++ = 0x0A;
  41. *bp++ = 1;
  42. *bp++ = 0;
  43. *bp++ = 0;
  44. *bp++ = pps_delay_ms;
  45. *bp++ = 0;
  46. *bp++ = 128;
  47. }
  48. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  49. char *buf, int pps_id, u32 size)
  50. {
  51. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  52. buf += DSI_CMD_PPS_HDR_SIZE;
  53. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  54. size);
  55. }
  56. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  57. char *buf, int pps_id, u32 size)
  58. {
  59. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  60. buf += DSI_CMD_PPS_HDR_SIZE;
  61. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  62. size);
  63. }
  64. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  65. {
  66. int rc = 0;
  67. int i;
  68. struct regulator *vreg = NULL;
  69. for (i = 0; i < panel->power_info.count; i++) {
  70. vreg = devm_regulator_get(panel->parent,
  71. panel->power_info.vregs[i].vreg_name);
  72. rc = PTR_ERR_OR_ZERO(vreg);
  73. if (rc) {
  74. DSI_ERR("failed to get %s regulator\n",
  75. panel->power_info.vregs[i].vreg_name);
  76. goto error_put;
  77. }
  78. panel->power_info.vregs[i].vreg = vreg;
  79. }
  80. return rc;
  81. error_put:
  82. for (i = i - 1; i >= 0; i--) {
  83. devm_regulator_put(panel->power_info.vregs[i].vreg);
  84. panel->power_info.vregs[i].vreg = NULL;
  85. }
  86. return rc;
  87. }
  88. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  89. {
  90. int rc = 0;
  91. int i;
  92. for (i = panel->power_info.count - 1; i >= 0; i--)
  93. devm_regulator_put(panel->power_info.vregs[i].vreg);
  94. return rc;
  95. }
  96. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  97. {
  98. int rc = 0;
  99. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  100. if (gpio_is_valid(r_config->reset_gpio)) {
  101. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  102. if (rc) {
  103. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  104. goto error;
  105. }
  106. }
  107. if (gpio_is_valid(r_config->disp_en_gpio)) {
  108. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  109. if (rc) {
  110. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  111. goto error_release_reset;
  112. }
  113. }
  114. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  115. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  116. if (rc) {
  117. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  118. goto error_release_disp_en;
  119. }
  120. }
  121. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  122. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  123. if (rc) {
  124. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  125. goto error_release_mode_sel;
  126. }
  127. }
  128. if (gpio_is_valid(panel->panel_test_gpio)) {
  129. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  130. if (rc) {
  131. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  132. rc);
  133. panel->panel_test_gpio = -1;
  134. rc = 0;
  135. }
  136. }
  137. goto error;
  138. error_release_mode_sel:
  139. if (gpio_is_valid(panel->bl_config.en_gpio))
  140. gpio_free(panel->bl_config.en_gpio);
  141. error_release_disp_en:
  142. if (gpio_is_valid(r_config->disp_en_gpio))
  143. gpio_free(r_config->disp_en_gpio);
  144. error_release_reset:
  145. if (gpio_is_valid(r_config->reset_gpio))
  146. gpio_free(r_config->reset_gpio);
  147. error:
  148. return rc;
  149. }
  150. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  151. {
  152. int rc = 0;
  153. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  154. if (gpio_is_valid(r_config->reset_gpio))
  155. gpio_free(r_config->reset_gpio);
  156. if (gpio_is_valid(r_config->disp_en_gpio))
  157. gpio_free(r_config->disp_en_gpio);
  158. if (gpio_is_valid(panel->bl_config.en_gpio))
  159. gpio_free(panel->bl_config.en_gpio);
  160. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  161. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  162. if (gpio_is_valid(panel->panel_test_gpio))
  163. gpio_free(panel->panel_test_gpio);
  164. return rc;
  165. }
  166. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel, bool trusted_vm_env)
  167. {
  168. if (!panel) {
  169. DSI_ERR("Invalid panel param\n");
  170. return -EINVAL;
  171. }
  172. /* toggle reset-gpio by writing directly to register in trusted-vm */
  173. if (trusted_vm_env) {
  174. struct dsi_tlmm_gpio *gpio = NULL;
  175. void __iomem *io;
  176. u32 offset = 0x4;
  177. int i;
  178. for (i = 0; i < panel->tlmm_gpio_count; i++)
  179. if (!strcmp(panel->tlmm_gpio[i].name, "reset-gpio"))
  180. gpio = &panel->tlmm_gpio[i];
  181. if (!gpio) {
  182. DSI_ERR("reset gpio not found\n");
  183. return -EINVAL;
  184. }
  185. io = ioremap(gpio->addr, gpio->size);
  186. writel_relaxed(0, io + offset);
  187. iounmap(io);
  188. } else {
  189. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  190. if (!r_config) {
  191. DSI_ERR("Invalid panel reset configuration\n");
  192. return -EINVAL;
  193. }
  194. if (!gpio_is_valid(r_config->reset_gpio)) {
  195. DSI_ERR("failed to pull down gpio\n");
  196. return -EINVAL;
  197. }
  198. gpio_set_value(r_config->reset_gpio, 0);
  199. }
  200. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  201. DSI_INFO("GPIO pulled low to simulate ESD\n");
  202. return 0;
  203. }
  204. static int dsi_panel_reset(struct dsi_panel *panel)
  205. {
  206. int rc = 0;
  207. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  208. int i;
  209. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  210. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  211. if (rc) {
  212. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  213. goto exit;
  214. }
  215. }
  216. if (r_config->count) {
  217. rc = gpio_direction_output(r_config->reset_gpio,
  218. r_config->sequence[0].level);
  219. if (rc) {
  220. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  221. goto exit;
  222. }
  223. }
  224. for (i = 0; i < r_config->count; i++) {
  225. gpio_set_value(r_config->reset_gpio,
  226. r_config->sequence[i].level);
  227. if (r_config->sequence[i].sleep_ms)
  228. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  229. (r_config->sequence[i].sleep_ms * 1000) + 100);
  230. }
  231. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  232. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  233. if (rc)
  234. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  235. }
  236. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  237. bool out = true;
  238. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  239. || (panel->reset_config.mode_sel_state
  240. == MODE_GPIO_LOW))
  241. out = false;
  242. else if ((panel->reset_config.mode_sel_state
  243. == MODE_SEL_SINGLE_PORT) ||
  244. (panel->reset_config.mode_sel_state
  245. == MODE_GPIO_HIGH))
  246. out = true;
  247. rc = gpio_direction_output(
  248. panel->reset_config.lcd_mode_sel_gpio, out);
  249. if (rc)
  250. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  251. }
  252. if (gpio_is_valid(panel->panel_test_gpio)) {
  253. rc = gpio_direction_input(panel->panel_test_gpio);
  254. if (rc)
  255. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  256. rc);
  257. }
  258. exit:
  259. return rc;
  260. }
  261. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  262. {
  263. int rc = 0;
  264. struct pinctrl_state *state;
  265. if (panel->host_config.ext_bridge_mode)
  266. return 0;
  267. if (!panel->pinctrl.pinctrl)
  268. return 0;
  269. if (enable)
  270. state = panel->pinctrl.active;
  271. else
  272. state = panel->pinctrl.suspend;
  273. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  274. if (rc)
  275. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  276. panel->name, rc);
  277. return rc;
  278. }
  279. static int dsi_panel_power_on(struct dsi_panel *panel)
  280. {
  281. int rc = 0;
  282. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  283. if (rc) {
  284. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  285. panel->name, rc);
  286. goto exit;
  287. }
  288. rc = dsi_panel_set_pinctrl_state(panel, true);
  289. if (rc) {
  290. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  291. goto error_disable_vregs;
  292. }
  293. rc = dsi_panel_reset(panel);
  294. if (rc) {
  295. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  296. goto error_disable_gpio;
  297. }
  298. goto exit;
  299. error_disable_gpio:
  300. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  301. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  302. if (gpio_is_valid(panel->bl_config.en_gpio))
  303. gpio_set_value(panel->bl_config.en_gpio, 0);
  304. (void)dsi_panel_set_pinctrl_state(panel, false);
  305. error_disable_vregs:
  306. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  307. exit:
  308. return rc;
  309. }
  310. static int dsi_panel_power_off(struct dsi_panel *panel)
  311. {
  312. int rc = 0;
  313. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  314. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  315. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  316. !panel->reset_gpio_always_on)
  317. gpio_set_value(panel->reset_config.reset_gpio, 0);
  318. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  319. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  320. if (gpio_is_valid(panel->panel_test_gpio)) {
  321. rc = gpio_direction_input(panel->panel_test_gpio);
  322. if (rc)
  323. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  324. rc);
  325. }
  326. rc = dsi_panel_set_pinctrl_state(panel, false);
  327. if (rc) {
  328. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  329. rc);
  330. }
  331. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  332. if (rc)
  333. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  334. panel->name, rc);
  335. return rc;
  336. }
  337. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  338. enum dsi_cmd_set_type type)
  339. {
  340. int rc = 0, i = 0;
  341. ssize_t len;
  342. struct dsi_cmd_desc *cmds;
  343. u32 count;
  344. enum dsi_cmd_set_state state;
  345. struct dsi_display_mode *mode;
  346. if (!panel || !panel->cur_mode)
  347. return -EINVAL;
  348. mode = panel->cur_mode;
  349. cmds = mode->priv_info->cmd_sets[type].cmds;
  350. count = mode->priv_info->cmd_sets[type].count;
  351. state = mode->priv_info->cmd_sets[type].state;
  352. SDE_EVT32(type, state, count);
  353. if (count == 0) {
  354. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  355. panel->name, type);
  356. goto error;
  357. }
  358. cmds->ctrl_flags = 0;
  359. for (i = 0; i < count; i++) {
  360. if (state == DSI_CMD_SET_STATE_LP)
  361. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  362. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  363. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  364. len = dsi_host_transfer_sub(panel->host, cmds);
  365. if (len < 0) {
  366. rc = len;
  367. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  368. goto error;
  369. }
  370. if (cmds->post_wait_ms)
  371. usleep_range(cmds->post_wait_ms*1000,
  372. ((cmds->post_wait_ms*1000)+10));
  373. cmds++;
  374. }
  375. error:
  376. return rc;
  377. }
  378. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  379. {
  380. int rc = 0;
  381. if (panel->host_config.ext_bridge_mode)
  382. return 0;
  383. devm_pinctrl_put(panel->pinctrl.pinctrl);
  384. return rc;
  385. }
  386. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  387. {
  388. int rc = 0;
  389. if (panel->host_config.ext_bridge_mode)
  390. return 0;
  391. /* TODO: pinctrl is defined in dsi dt node */
  392. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  393. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  394. rc = PTR_ERR(panel->pinctrl.pinctrl);
  395. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  396. goto error;
  397. }
  398. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  399. "panel_active");
  400. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  401. rc = PTR_ERR(panel->pinctrl.active);
  402. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  403. goto error;
  404. }
  405. panel->pinctrl.suspend =
  406. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  407. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  408. rc = PTR_ERR(panel->pinctrl.suspend);
  409. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  410. goto error;
  411. }
  412. panel->pinctrl.pwm_pin =
  413. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  414. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  415. panel->pinctrl.pwm_pin = NULL;
  416. DSI_DEBUG("failed to get pinctrl pwm_pin");
  417. }
  418. error:
  419. return rc;
  420. }
  421. static int dsi_panel_wled_register(struct dsi_panel *panel,
  422. struct dsi_backlight_config *bl)
  423. {
  424. struct backlight_device *bd;
  425. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  426. if (!bd) {
  427. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  428. panel->name, -EPROBE_DEFER);
  429. return -EPROBE_DEFER;
  430. }
  431. bl->raw_bd = bd;
  432. return 0;
  433. }
  434. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  435. u32 bl_lvl)
  436. {
  437. int rc = 0;
  438. unsigned long mode_flags = 0;
  439. struct mipi_dsi_device *dsi = NULL;
  440. if (!panel || (bl_lvl > 0xffff)) {
  441. DSI_ERR("invalid params\n");
  442. return -EINVAL;
  443. }
  444. dsi = &panel->mipi_device;
  445. if (unlikely(panel->bl_config.lp_mode)) {
  446. mode_flags = dsi->mode_flags;
  447. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  448. }
  449. if (panel->bl_config.bl_inverted_dbv)
  450. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  451. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  452. if (rc < 0)
  453. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  454. if (unlikely(panel->bl_config.lp_mode))
  455. dsi->mode_flags = mode_flags;
  456. return rc;
  457. }
  458. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  459. u32 bl_lvl)
  460. {
  461. int rc = 0;
  462. u32 duty = 0;
  463. u32 period_ns = 0;
  464. struct dsi_backlight_config *bl;
  465. if (!panel) {
  466. DSI_ERR("Invalid Params\n");
  467. return -EINVAL;
  468. }
  469. bl = &panel->bl_config;
  470. if (!bl->pwm_bl) {
  471. DSI_ERR("pwm device not found\n");
  472. return -EINVAL;
  473. }
  474. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  475. duty = bl_lvl * period_ns;
  476. duty /= bl->bl_max_level;
  477. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  478. if (rc) {
  479. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  480. rc);
  481. goto error;
  482. }
  483. if (bl_lvl == 0 && bl->pwm_enabled) {
  484. pwm_disable(bl->pwm_bl);
  485. bl->pwm_enabled = false;
  486. return 0;
  487. }
  488. if (bl_lvl != 0 && !bl->pwm_enabled) {
  489. rc = pwm_enable(bl->pwm_bl);
  490. if (rc) {
  491. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  492. rc);
  493. goto error;
  494. }
  495. bl->pwm_enabled = true;
  496. }
  497. error:
  498. return rc;
  499. }
  500. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  501. {
  502. int rc = 0;
  503. struct dsi_backlight_config *bl = &panel->bl_config;
  504. if (panel->host_config.ext_bridge_mode)
  505. return 0;
  506. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  507. switch (bl->type) {
  508. case DSI_BACKLIGHT_WLED:
  509. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  510. break;
  511. case DSI_BACKLIGHT_DCS:
  512. rc = dsi_panel_update_backlight(panel, bl_lvl);
  513. break;
  514. case DSI_BACKLIGHT_EXTERNAL:
  515. break;
  516. case DSI_BACKLIGHT_PWM:
  517. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  518. break;
  519. default:
  520. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  521. rc = -ENOTSUPP;
  522. }
  523. return rc;
  524. }
  525. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  526. {
  527. u32 cur_bl_level;
  528. struct backlight_device *bd = bl->raw_bd;
  529. /* default the brightness level to 50% */
  530. cur_bl_level = bl->bl_max_level >> 1;
  531. switch (bl->type) {
  532. case DSI_BACKLIGHT_WLED:
  533. /* Try to query the backlight level from the backlight device */
  534. if (bd->ops && bd->ops->get_brightness)
  535. cur_bl_level = bd->ops->get_brightness(bd);
  536. break;
  537. case DSI_BACKLIGHT_DCS:
  538. case DSI_BACKLIGHT_EXTERNAL:
  539. case DSI_BACKLIGHT_PWM:
  540. default:
  541. /*
  542. * Ideally, we should read the backlight level from the
  543. * panel. For now, just set it default value.
  544. */
  545. break;
  546. }
  547. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  548. return cur_bl_level;
  549. }
  550. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  551. {
  552. struct dsi_backlight_config *bl = &panel->bl_config;
  553. bl->bl_level = dsi_panel_get_brightness(bl);
  554. }
  555. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  556. {
  557. int rc = 0;
  558. struct dsi_backlight_config *bl = &panel->bl_config;
  559. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  560. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  561. rc = PTR_ERR(bl->pwm_bl);
  562. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  563. rc);
  564. return rc;
  565. }
  566. if (panel->pinctrl.pwm_pin) {
  567. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  568. panel->pinctrl.pwm_pin);
  569. if (rc)
  570. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  571. panel->name, rc);
  572. }
  573. return 0;
  574. }
  575. static int dsi_panel_bl_register(struct dsi_panel *panel)
  576. {
  577. int rc = 0;
  578. struct dsi_backlight_config *bl = &panel->bl_config;
  579. if (panel->host_config.ext_bridge_mode)
  580. return 0;
  581. switch (bl->type) {
  582. case DSI_BACKLIGHT_WLED:
  583. rc = dsi_panel_wled_register(panel, bl);
  584. break;
  585. case DSI_BACKLIGHT_DCS:
  586. break;
  587. case DSI_BACKLIGHT_EXTERNAL:
  588. break;
  589. case DSI_BACKLIGHT_PWM:
  590. rc = dsi_panel_pwm_register(panel);
  591. break;
  592. default:
  593. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  594. rc = -ENOTSUPP;
  595. goto error;
  596. }
  597. error:
  598. return rc;
  599. }
  600. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  601. {
  602. struct dsi_backlight_config *bl = &panel->bl_config;
  603. devm_pwm_put(panel->parent, bl->pwm_bl);
  604. }
  605. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  606. {
  607. int rc = 0;
  608. struct dsi_backlight_config *bl = &panel->bl_config;
  609. if (panel->host_config.ext_bridge_mode)
  610. return 0;
  611. switch (bl->type) {
  612. case DSI_BACKLIGHT_WLED:
  613. break;
  614. case DSI_BACKLIGHT_DCS:
  615. break;
  616. case DSI_BACKLIGHT_EXTERNAL:
  617. break;
  618. case DSI_BACKLIGHT_PWM:
  619. dsi_panel_pwm_unregister(panel);
  620. break;
  621. default:
  622. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  623. rc = -ENOTSUPP;
  624. goto error;
  625. }
  626. error:
  627. return rc;
  628. }
  629. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  630. struct dsi_parser_utils *utils)
  631. {
  632. int rc = 0;
  633. u64 tmp64 = 0;
  634. struct dsi_display_mode *display_mode;
  635. struct dsi_display_mode_priv_info *priv_info;
  636. display_mode = container_of(mode, struct dsi_display_mode, timing);
  637. priv_info = display_mode->priv_info;
  638. rc = utils->read_u64(utils->data,
  639. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  640. if (rc == -EOVERFLOW) {
  641. tmp64 = 0;
  642. rc = utils->read_u32(utils->data,
  643. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  644. }
  645. mode->clk_rate_hz = !rc ? tmp64 : 0;
  646. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  647. mode->pclk_scale.numer = 1;
  648. mode->pclk_scale.denom = 1;
  649. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  650. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  651. &mode->mdp_transfer_time_us);
  652. if (!rc)
  653. display_mode->priv_info->mdp_transfer_time_us =
  654. mode->mdp_transfer_time_us;
  655. else
  656. display_mode->priv_info->mdp_transfer_time_us = 0;
  657. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  658. rc = utils->read_u32(utils->data,
  659. "qcom,mdss-dsi-panel-framerate",
  660. &mode->refresh_rate);
  661. if (rc) {
  662. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  663. rc);
  664. goto error;
  665. }
  666. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  667. &mode->h_active);
  668. if (rc) {
  669. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  670. rc);
  671. goto error;
  672. }
  673. rc = utils->read_u32(utils->data,
  674. "qcom,mdss-dsi-h-front-porch",
  675. &mode->h_front_porch);
  676. if (rc) {
  677. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  678. rc);
  679. goto error;
  680. }
  681. rc = utils->read_u32(utils->data,
  682. "qcom,mdss-dsi-h-back-porch",
  683. &mode->h_back_porch);
  684. if (rc) {
  685. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  686. rc);
  687. goto error;
  688. }
  689. rc = utils->read_u32(utils->data,
  690. "qcom,mdss-dsi-h-pulse-width",
  691. &mode->h_sync_width);
  692. if (rc) {
  693. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  694. rc);
  695. goto error;
  696. }
  697. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  698. &mode->h_skew);
  699. if (rc)
  700. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  701. rc);
  702. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  703. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  704. mode->h_sync_width);
  705. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  706. &mode->v_active);
  707. if (rc) {
  708. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  709. rc);
  710. goto error;
  711. }
  712. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  713. &mode->v_back_porch);
  714. if (rc) {
  715. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  716. rc);
  717. goto error;
  718. }
  719. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  720. &mode->v_front_porch);
  721. if (rc) {
  722. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  723. rc);
  724. goto error;
  725. }
  726. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  727. &mode->v_sync_width);
  728. if (rc) {
  729. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  730. rc);
  731. goto error;
  732. }
  733. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  734. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  735. mode->v_sync_width);
  736. error:
  737. return rc;
  738. }
  739. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  740. struct dsi_parser_utils *utils,
  741. const char *name)
  742. {
  743. int rc = 0;
  744. u32 bpp = 0;
  745. enum dsi_pixel_format fmt;
  746. const char *packing;
  747. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  748. if (rc) {
  749. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  750. name, rc);
  751. return rc;
  752. }
  753. host->bpp = bpp;
  754. switch (bpp) {
  755. case 3:
  756. fmt = DSI_PIXEL_FORMAT_RGB111;
  757. break;
  758. case 8:
  759. fmt = DSI_PIXEL_FORMAT_RGB332;
  760. break;
  761. case 12:
  762. fmt = DSI_PIXEL_FORMAT_RGB444;
  763. break;
  764. case 16:
  765. fmt = DSI_PIXEL_FORMAT_RGB565;
  766. break;
  767. case 18:
  768. fmt = DSI_PIXEL_FORMAT_RGB666;
  769. break;
  770. case 24:
  771. default:
  772. fmt = DSI_PIXEL_FORMAT_RGB888;
  773. break;
  774. }
  775. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  776. packing = utils->get_property(utils->data,
  777. "qcom,mdss-dsi-pixel-packing",
  778. NULL);
  779. if (packing && !strcmp(packing, "loose"))
  780. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  781. }
  782. host->dst_format = fmt;
  783. return rc;
  784. }
  785. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  786. struct dsi_parser_utils *utils,
  787. const char *name)
  788. {
  789. int rc = 0;
  790. bool lane_enabled;
  791. u32 num_of_lanes = 0;
  792. lane_enabled = utils->read_bool(utils->data,
  793. "qcom,mdss-dsi-lane-0-state");
  794. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  795. lane_enabled = utils->read_bool(utils->data,
  796. "qcom,mdss-dsi-lane-1-state");
  797. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  798. lane_enabled = utils->read_bool(utils->data,
  799. "qcom,mdss-dsi-lane-2-state");
  800. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  801. lane_enabled = utils->read_bool(utils->data,
  802. "qcom,mdss-dsi-lane-3-state");
  803. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  804. if (host->data_lanes & DSI_DATA_LANE_0)
  805. num_of_lanes++;
  806. if (host->data_lanes & DSI_DATA_LANE_1)
  807. num_of_lanes++;
  808. if (host->data_lanes & DSI_DATA_LANE_2)
  809. num_of_lanes++;
  810. if (host->data_lanes & DSI_DATA_LANE_3)
  811. num_of_lanes++;
  812. host->num_data_lanes = num_of_lanes;
  813. if (host->data_lanes == 0) {
  814. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  815. rc = -EINVAL;
  816. }
  817. return rc;
  818. }
  819. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  820. struct dsi_parser_utils *utils,
  821. const char *name)
  822. {
  823. int rc = 0;
  824. const char *swap_mode;
  825. swap_mode = utils->get_property(utils->data,
  826. "qcom,mdss-dsi-color-order", NULL);
  827. if (swap_mode) {
  828. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  829. host->swap_mode = DSI_COLOR_SWAP_RGB;
  830. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  831. host->swap_mode = DSI_COLOR_SWAP_RBG;
  832. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  833. host->swap_mode = DSI_COLOR_SWAP_BRG;
  834. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  835. host->swap_mode = DSI_COLOR_SWAP_GRB;
  836. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  837. host->swap_mode = DSI_COLOR_SWAP_GBR;
  838. } else {
  839. DSI_ERR("[%s] Unrecognized color order-%s\n",
  840. name, swap_mode);
  841. rc = -EINVAL;
  842. }
  843. } else {
  844. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  845. host->swap_mode = DSI_COLOR_SWAP_RGB;
  846. }
  847. /* bit swap on color channel is not defined in dt */
  848. host->bit_swap_red = false;
  849. host->bit_swap_green = false;
  850. host->bit_swap_blue = false;
  851. return rc;
  852. }
  853. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  854. struct dsi_parser_utils *utils,
  855. const char *name)
  856. {
  857. const char *trig;
  858. int rc = 0;
  859. trig = utils->get_property(utils->data,
  860. "qcom,mdss-dsi-mdp-trigger", NULL);
  861. if (trig) {
  862. if (!strcmp(trig, "none")) {
  863. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  864. } else if (!strcmp(trig, "trigger_te")) {
  865. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  866. } else if (!strcmp(trig, "trigger_sw")) {
  867. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  868. } else if (!strcmp(trig, "trigger_sw_te")) {
  869. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  870. } else {
  871. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  872. name, trig);
  873. rc = -EINVAL;
  874. }
  875. } else {
  876. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  877. name);
  878. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  879. }
  880. trig = utils->get_property(utils->data,
  881. "qcom,mdss-dsi-dma-trigger", NULL);
  882. if (trig) {
  883. if (!strcmp(trig, "none")) {
  884. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  885. } else if (!strcmp(trig, "trigger_te")) {
  886. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  887. } else if (!strcmp(trig, "trigger_sw")) {
  888. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  889. } else if (!strcmp(trig, "trigger_sw_seof")) {
  890. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  891. } else if (!strcmp(trig, "trigger_sw_te")) {
  892. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  893. } else {
  894. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  895. name, trig);
  896. rc = -EINVAL;
  897. }
  898. } else {
  899. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  900. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  901. }
  902. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  903. &host->te_mode);
  904. if (rc) {
  905. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  906. host->te_mode = 1;
  907. rc = 0;
  908. }
  909. return rc;
  910. }
  911. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  912. struct dsi_parser_utils *utils,
  913. const char *name)
  914. {
  915. u32 val = 0, line_no = 0, window = 0;
  916. int rc = 0;
  917. bool panel_cphy_mode = false;
  918. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  919. if (!rc) {
  920. host->t_clk_post = val;
  921. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  922. }
  923. val = 0;
  924. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  925. if (!rc) {
  926. host->t_clk_pre = val;
  927. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  928. }
  929. host->ignore_rx_eot = utils->read_bool(utils->data,
  930. "qcom,mdss-dsi-rx-eot-ignore");
  931. host->append_tx_eot = utils->read_bool(utils->data,
  932. "qcom,mdss-dsi-tx-eot-append");
  933. host->ext_bridge_mode = utils->read_bool(utils->data,
  934. "qcom,mdss-dsi-ext-bridge-mode");
  935. host->force_hs_clk_lane = utils->read_bool(utils->data,
  936. "qcom,mdss-dsi-force-clock-lane-hs");
  937. panel_cphy_mode = utils->read_bool(utils->data,
  938. "qcom,panel-cphy-mode");
  939. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  940. : DSI_PHY_TYPE_DPHY;
  941. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  942. &line_no);
  943. if (rc)
  944. host->dma_sched_line = 0;
  945. else
  946. host->dma_sched_line = line_no;
  947. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  948. &window);
  949. if (rc)
  950. host->dma_sched_window = 0;
  951. else
  952. host->dma_sched_window = window;
  953. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  954. host->dma_sched_line, host->dma_sched_window);
  955. return 0;
  956. }
  957. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  958. struct dsi_parser_utils *utils,
  959. const char *name)
  960. {
  961. int rc = 0;
  962. u32 val = 0;
  963. bool supported = false;
  964. struct dsi_split_link_config *split_link = &host->split_link;
  965. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  966. if (!supported) {
  967. DSI_DEBUG("[%s] Split link is not supported\n", name);
  968. split_link->enabled = false;
  969. return;
  970. }
  971. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  972. if (rc || val < 1) {
  973. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  974. split_link->num_sublinks = 2;
  975. } else {
  976. split_link->num_sublinks = val;
  977. }
  978. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  979. if (rc || val < 1) {
  980. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  981. split_link->lanes_per_sublink = 2;
  982. } else {
  983. split_link->lanes_per_sublink = val;
  984. }
  985. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  986. if (!supported)
  987. split_link->sublink_swap = false;
  988. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  989. split_link->num_sublinks, split_link->lanes_per_sublink);
  990. split_link->enabled = true;
  991. }
  992. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  993. {
  994. int rc = 0;
  995. struct dsi_parser_utils *utils = &panel->utils;
  996. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  997. panel->name);
  998. if (rc) {
  999. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1000. panel->name, rc);
  1001. goto error;
  1002. }
  1003. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1004. panel->name);
  1005. if (rc) {
  1006. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1007. panel->name, rc);
  1008. goto error;
  1009. }
  1010. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1011. panel->name);
  1012. if (rc) {
  1013. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1014. panel->name, rc);
  1015. goto error;
  1016. }
  1017. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1018. panel->name);
  1019. if (rc) {
  1020. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1021. panel->name, rc);
  1022. goto error;
  1023. }
  1024. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1025. panel->name);
  1026. if (rc) {
  1027. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1028. panel->name, rc);
  1029. goto error;
  1030. }
  1031. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1032. panel->name);
  1033. error:
  1034. return rc;
  1035. }
  1036. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1037. struct device_node *of_node)
  1038. {
  1039. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1040. struct dsi_parser_utils *utils = &panel->utils;
  1041. int val, rc = 0;
  1042. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1043. if (val <= 0) {
  1044. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1045. return rc;
  1046. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1047. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1048. val, panel->dfps_caps.dfps_list_len);
  1049. return -EINVAL;
  1050. }
  1051. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1052. if (!avr_caps->avr_step_fps_list)
  1053. return -ENOMEM;
  1054. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1055. avr_caps->avr_step_fps_list, val);
  1056. if (rc) {
  1057. kfree(avr_caps->avr_step_fps_list);
  1058. return rc;
  1059. }
  1060. avr_caps->avr_step_fps_list_len = val;
  1061. return rc;
  1062. }
  1063. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1064. struct device_node *of_node)
  1065. {
  1066. int rc = 0;
  1067. u32 val = 0, i;
  1068. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1069. struct dsi_parser_utils *utils = &panel->utils;
  1070. const char *name = panel->name;
  1071. /**
  1072. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1073. * video mode when there is only one qsync min fps present.
  1074. */
  1075. rc = of_property_read_u32(of_node,
  1076. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1077. &val);
  1078. if (rc)
  1079. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1080. panel->name, rc);
  1081. qsync_caps->qsync_min_fps = val;
  1082. /**
  1083. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1084. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1085. * is defined.
  1086. */
  1087. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1088. "qcom,dsi-supported-qsync-min-fps-list");
  1089. if (qsync_caps->qsync_min_fps_list_len < 1)
  1090. goto qsync_support;
  1091. /**
  1092. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1093. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1094. */
  1095. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1096. qsync_caps->qsync_min_fps) {
  1097. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1098. name);
  1099. rc = -EINVAL;
  1100. goto error;
  1101. }
  1102. if (panel->dfps_caps.dfps_list_len !=
  1103. qsync_caps->qsync_min_fps_list_len) {
  1104. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1105. rc = -EINVAL;
  1106. goto error;
  1107. }
  1108. qsync_caps->qsync_min_fps_list =
  1109. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1110. GFP_KERNEL);
  1111. if (!qsync_caps->qsync_min_fps_list) {
  1112. rc = -ENOMEM;
  1113. goto error;
  1114. }
  1115. rc = utils->read_u32_array(utils->data,
  1116. "qcom,dsi-supported-qsync-min-fps-list",
  1117. qsync_caps->qsync_min_fps_list,
  1118. qsync_caps->qsync_min_fps_list_len);
  1119. if (rc) {
  1120. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1121. rc = -EINVAL;
  1122. goto error;
  1123. }
  1124. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1125. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1126. if (qsync_caps->qsync_min_fps_list[i] <
  1127. qsync_caps->qsync_min_fps)
  1128. qsync_caps->qsync_min_fps =
  1129. qsync_caps->qsync_min_fps_list[i];
  1130. }
  1131. qsync_support:
  1132. /* allow qsync support only if DFPS is with VFP approach */
  1133. if ((panel->dfps_caps.dfps_support) &&
  1134. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1135. panel->qsync_caps.qsync_min_fps = 0;
  1136. error:
  1137. if (rc < 0) {
  1138. qsync_caps->qsync_min_fps = 0;
  1139. qsync_caps->qsync_min_fps_list_len = 0;
  1140. }
  1141. return rc;
  1142. }
  1143. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1144. struct dsi_parser_utils *utils)
  1145. {
  1146. int i, rc = 0;
  1147. struct dyn_clk_list *bit_clk_list;
  1148. if (!mode || !mode->priv_info) {
  1149. DSI_ERR("invalid arguments\n");
  1150. return -EINVAL;
  1151. }
  1152. bit_clk_list = &mode->priv_info->bit_clk_list;
  1153. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1154. if (bit_clk_list->count < 1)
  1155. return 0;
  1156. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1157. if (!bit_clk_list->rates) {
  1158. DSI_ERR("failed to allocate space for bit clock list\n");
  1159. return -ENOMEM;
  1160. }
  1161. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1162. bit_clk_list->rates, bit_clk_list->count);
  1163. if (rc) {
  1164. DSI_ERR("failed to parse supported bit clk list, rc=%d\n", rc);
  1165. return -EINVAL;
  1166. }
  1167. for (i = 0; i < bit_clk_list->count; i++)
  1168. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1169. return 0;
  1170. }
  1171. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1172. {
  1173. int rc = 0;
  1174. bool supported = false;
  1175. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1176. struct dsi_parser_utils *utils = &panel->utils;
  1177. const char *type;
  1178. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1179. if (!supported) {
  1180. dyn_clk_caps->dyn_clk_support = false;
  1181. return rc;
  1182. }
  1183. dyn_clk_caps->dyn_clk_support = true;
  1184. type = utils->get_property(utils->data,
  1185. "qcom,dsi-dyn-clk-type", NULL);
  1186. if (!type) {
  1187. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1188. dyn_clk_caps->maintain_const_fps = false;
  1189. return 0;
  1190. }
  1191. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1192. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1193. dyn_clk_caps->maintain_const_fps = true;
  1194. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1195. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1196. dyn_clk_caps->maintain_const_fps = true;
  1197. } else {
  1198. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1199. dyn_clk_caps->maintain_const_fps = false;
  1200. }
  1201. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1202. return 0;
  1203. }
  1204. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1205. {
  1206. int rc = 0;
  1207. bool supported = false;
  1208. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1209. struct dsi_parser_utils *utils = &panel->utils;
  1210. const char *name = panel->name;
  1211. const char *type;
  1212. u32 i;
  1213. supported = utils->read_bool(utils->data,
  1214. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1215. if (!supported) {
  1216. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1217. dfps_caps->dfps_support = false;
  1218. return rc;
  1219. }
  1220. type = utils->get_property(utils->data,
  1221. "qcom,mdss-dsi-pan-fps-update", NULL);
  1222. if (!type) {
  1223. DSI_ERR("[%s] dfps type not defined\n", name);
  1224. rc = -EINVAL;
  1225. goto error;
  1226. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1227. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1228. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1229. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1230. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1231. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1232. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1233. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1234. } else {
  1235. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1236. rc = -EINVAL;
  1237. goto error;
  1238. }
  1239. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1240. "qcom,dsi-supported-dfps-list");
  1241. if (dfps_caps->dfps_list_len < 1) {
  1242. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1243. rc = -EINVAL;
  1244. goto error;
  1245. }
  1246. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1247. GFP_KERNEL);
  1248. if (!dfps_caps->dfps_list) {
  1249. rc = -ENOMEM;
  1250. goto error;
  1251. }
  1252. rc = utils->read_u32_array(utils->data,
  1253. "qcom,dsi-supported-dfps-list",
  1254. dfps_caps->dfps_list,
  1255. dfps_caps->dfps_list_len);
  1256. if (rc) {
  1257. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1258. rc = -EINVAL;
  1259. goto error;
  1260. }
  1261. dfps_caps->dfps_support = true;
  1262. /* calculate max and min fps */
  1263. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1264. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1265. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1266. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1267. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1268. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1269. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1270. }
  1271. error:
  1272. return rc;
  1273. }
  1274. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1275. struct dsi_parser_utils *utils,
  1276. const char *name)
  1277. {
  1278. int rc = 0;
  1279. const char *traffic_mode;
  1280. u32 vc_id = 0;
  1281. u32 val = 0;
  1282. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1283. if (rc) {
  1284. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1285. cfg->pulse_mode_hsa_he = false;
  1286. } else if (val == 1) {
  1287. cfg->pulse_mode_hsa_he = true;
  1288. } else if (val == 0) {
  1289. cfg->pulse_mode_hsa_he = false;
  1290. } else {
  1291. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1292. name);
  1293. rc = -EINVAL;
  1294. goto error;
  1295. }
  1296. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1297. "qcom,mdss-dsi-hfp-power-mode");
  1298. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1299. "qcom,mdss-dsi-hbp-power-mode");
  1300. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1301. "qcom,mdss-dsi-hsa-power-mode");
  1302. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1303. "qcom,mdss-dsi-last-line-interleave");
  1304. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1305. "qcom,mdss-dsi-bllp-eof-power-mode");
  1306. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1307. "qcom,mdss-dsi-bllp-power-mode");
  1308. traffic_mode = utils->get_property(utils->data,
  1309. "qcom,mdss-dsi-traffic-mode",
  1310. NULL);
  1311. if (!traffic_mode) {
  1312. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1313. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1314. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1315. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1316. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1317. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1318. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1319. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1320. } else {
  1321. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1322. traffic_mode);
  1323. rc = -EINVAL;
  1324. goto error;
  1325. }
  1326. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1327. &vc_id);
  1328. if (rc) {
  1329. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1330. cfg->vc_id = 0;
  1331. } else {
  1332. cfg->vc_id = vc_id;
  1333. }
  1334. error:
  1335. return rc;
  1336. }
  1337. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1338. struct dsi_parser_utils *utils,
  1339. const char *name)
  1340. {
  1341. u32 val = 0;
  1342. int rc = 0;
  1343. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1344. if (rc) {
  1345. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1346. cfg->wr_mem_start = 0x2C;
  1347. } else {
  1348. cfg->wr_mem_start = val;
  1349. }
  1350. val = 0;
  1351. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1352. &val);
  1353. if (rc) {
  1354. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1355. cfg->wr_mem_continue = 0x3C;
  1356. } else {
  1357. cfg->wr_mem_continue = val;
  1358. }
  1359. /* TODO: fix following */
  1360. cfg->max_cmd_packets_interleave = 0;
  1361. val = 0;
  1362. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1363. &val);
  1364. if (rc) {
  1365. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1366. cfg->insert_dcs_command = true;
  1367. } else if (val == 1) {
  1368. cfg->insert_dcs_command = true;
  1369. } else if (val == 0) {
  1370. cfg->insert_dcs_command = false;
  1371. } else {
  1372. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1373. name);
  1374. rc = -EINVAL;
  1375. goto error;
  1376. }
  1377. error:
  1378. return rc;
  1379. }
  1380. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1381. {
  1382. int rc = 0;
  1383. struct dsi_parser_utils *utils = &panel->utils;
  1384. bool panel_mode_switch_enabled;
  1385. enum dsi_op_mode panel_mode;
  1386. const char *mode;
  1387. mode = utils->get_property(utils->data,
  1388. "qcom,mdss-dsi-panel-type", NULL);
  1389. if (!mode) {
  1390. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1391. panel_mode = DSI_OP_VIDEO_MODE;
  1392. } else if (!strcmp(mode, "dsi_video_mode")) {
  1393. panel_mode = DSI_OP_VIDEO_MODE;
  1394. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1395. panel_mode = DSI_OP_CMD_MODE;
  1396. } else {
  1397. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1398. rc = -EINVAL;
  1399. goto error;
  1400. }
  1401. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1402. "qcom,mdss-dsi-panel-mode-switch");
  1403. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1404. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1405. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1406. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1407. utils,
  1408. panel->name);
  1409. if (rc) {
  1410. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1411. panel->name, rc);
  1412. goto error;
  1413. }
  1414. }
  1415. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1416. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1417. utils,
  1418. panel->name);
  1419. if (rc) {
  1420. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1421. panel->name, rc);
  1422. goto error;
  1423. }
  1424. }
  1425. panel->poms_align_vsync = utils->read_bool(utils->data,
  1426. "qcom,poms-align-panel-vsync");
  1427. panel->panel_mode = panel_mode;
  1428. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1429. error:
  1430. return rc;
  1431. }
  1432. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1433. {
  1434. int rc = 0;
  1435. u32 val = 0;
  1436. const char *str;
  1437. struct dsi_panel_phy_props *props = &panel->phy_props;
  1438. struct dsi_parser_utils *utils = &panel->utils;
  1439. const char *name = panel->name;
  1440. rc = utils->read_u32(utils->data,
  1441. "qcom,mdss-pan-physical-width-dimension", &val);
  1442. if (rc) {
  1443. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1444. props->panel_width_mm = 0;
  1445. rc = 0;
  1446. } else {
  1447. props->panel_width_mm = val;
  1448. }
  1449. rc = utils->read_u32(utils->data,
  1450. "qcom,mdss-pan-physical-height-dimension",
  1451. &val);
  1452. if (rc) {
  1453. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1454. props->panel_height_mm = 0;
  1455. rc = 0;
  1456. } else {
  1457. props->panel_height_mm = val;
  1458. }
  1459. str = utils->get_property(utils->data,
  1460. "qcom,mdss-dsi-panel-orientation", NULL);
  1461. if (!str) {
  1462. props->rotation = DSI_PANEL_ROTATE_NONE;
  1463. } else if (!strcmp(str, "180")) {
  1464. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1465. } else if (!strcmp(str, "hflip")) {
  1466. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1467. } else if (!strcmp(str, "vflip")) {
  1468. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1469. } else {
  1470. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1471. rc = -EINVAL;
  1472. goto error;
  1473. }
  1474. error:
  1475. return rc;
  1476. }
  1477. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1478. "qcom,mdss-dsi-pre-on-command",
  1479. "qcom,mdss-dsi-on-command",
  1480. "qcom,vid-on-commands",
  1481. "qcom,cmd-on-commands",
  1482. "qcom,mdss-dsi-post-panel-on-command",
  1483. "qcom,mdss-dsi-pre-off-command",
  1484. "qcom,mdss-dsi-off-command",
  1485. "qcom,mdss-dsi-post-off-command",
  1486. "qcom,mdss-dsi-pre-res-switch",
  1487. "qcom,mdss-dsi-res-switch",
  1488. "qcom,mdss-dsi-post-res-switch",
  1489. "qcom,video-mode-switch-in-commands",
  1490. "qcom,video-mode-switch-out-commands",
  1491. "qcom,cmd-mode-switch-in-commands",
  1492. "qcom,cmd-mode-switch-out-commands",
  1493. "qcom,mdss-dsi-panel-status-command",
  1494. "qcom,mdss-dsi-lp1-command",
  1495. "qcom,mdss-dsi-lp2-command",
  1496. "qcom,mdss-dsi-nolp-command",
  1497. "PPS not parsed from DTSI, generated dynamically",
  1498. "ROI not parsed from DTSI, generated dynamically",
  1499. "qcom,mdss-dsi-timing-switch-command",
  1500. "qcom,mdss-dsi-post-mode-switch-on-command",
  1501. "qcom,mdss-dsi-qsync-on-commands",
  1502. "qcom,mdss-dsi-qsync-off-commands",
  1503. };
  1504. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1505. "qcom,mdss-dsi-pre-on-command-state",
  1506. "qcom,mdss-dsi-on-command-state",
  1507. "qcom,vid-on-commands-state",
  1508. "qcom,cmd-on-commands-state",
  1509. "qcom,mdss-dsi-post-on-command-state",
  1510. "qcom,mdss-dsi-pre-off-command-state",
  1511. "qcom,mdss-dsi-off-command-state",
  1512. "qcom,mdss-dsi-post-off-command-state",
  1513. "qcom,mdss-dsi-pre-res-switch-state",
  1514. "qcom,mdss-dsi-res-switch-state",
  1515. "qcom,mdss-dsi-post-res-switch-state",
  1516. "qcom,video-mode-switch-in-commands-state",
  1517. "qcom,video-mode-switch-out-commands-state",
  1518. "qcom,cmd-mode-switch-in-commands-state",
  1519. "qcom,cmd-mode-switch-out-commands-state",
  1520. "qcom,mdss-dsi-panel-status-command-state",
  1521. "qcom,mdss-dsi-lp1-command-state",
  1522. "qcom,mdss-dsi-lp2-command-state",
  1523. "qcom,mdss-dsi-nolp-command-state",
  1524. "PPS not parsed from DTSI, generated dynamically",
  1525. "ROI not parsed from DTSI, generated dynamically",
  1526. "qcom,mdss-dsi-timing-switch-command-state",
  1527. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1528. "qcom,mdss-dsi-qsync-on-commands-state",
  1529. "qcom,mdss-dsi-qsync-off-commands-state",
  1530. };
  1531. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1532. {
  1533. const u32 cmd_set_min_size = 7;
  1534. u32 count = 0;
  1535. u32 packet_length;
  1536. u32 tmp;
  1537. while (length >= cmd_set_min_size) {
  1538. packet_length = cmd_set_min_size;
  1539. tmp = ((data[5] << 8) | (data[6]));
  1540. packet_length += tmp;
  1541. if (packet_length > length) {
  1542. DSI_ERR("format error\n");
  1543. return -EINVAL;
  1544. }
  1545. length -= packet_length;
  1546. data += packet_length;
  1547. count++;
  1548. }
  1549. *cnt = count;
  1550. return 0;
  1551. }
  1552. int dsi_panel_create_cmd_packets(const char *data,
  1553. u32 length,
  1554. u32 count,
  1555. struct dsi_cmd_desc *cmd)
  1556. {
  1557. int rc = 0;
  1558. int i, j;
  1559. u8 *payload;
  1560. for (i = 0; i < count; i++) {
  1561. u32 size;
  1562. cmd[i].msg.type = data[0];
  1563. cmd[i].msg.channel = data[2];
  1564. cmd[i].msg.flags |= data[3];
  1565. cmd[i].ctrl = 0;
  1566. cmd[i].post_wait_ms = data[4];
  1567. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1568. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1569. cmd[i].last_command = false;
  1570. else
  1571. cmd[i].last_command = true;
  1572. size = cmd[i].msg.tx_len * sizeof(u8);
  1573. payload = kzalloc(size, GFP_KERNEL);
  1574. if (!payload) {
  1575. rc = -ENOMEM;
  1576. goto error_free_payloads;
  1577. }
  1578. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1579. payload[j] = data[7 + j];
  1580. cmd[i].msg.tx_buf = payload;
  1581. data += (7 + cmd[i].msg.tx_len);
  1582. }
  1583. return rc;
  1584. error_free_payloads:
  1585. for (i = i - 1; i >= 0; i--) {
  1586. cmd--;
  1587. kfree(cmd->msg.tx_buf);
  1588. }
  1589. return rc;
  1590. }
  1591. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1592. {
  1593. u32 i = 0;
  1594. struct dsi_cmd_desc *cmd;
  1595. for (i = 0; i < set->count; i++) {
  1596. cmd = &set->cmds[i];
  1597. kfree(cmd->msg.tx_buf);
  1598. }
  1599. }
  1600. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1601. {
  1602. kfree(set->cmds);
  1603. }
  1604. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1605. u32 packet_count)
  1606. {
  1607. u32 size;
  1608. size = packet_count * sizeof(*cmd->cmds);
  1609. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1610. if (!cmd->cmds)
  1611. return -ENOMEM;
  1612. cmd->count = packet_count;
  1613. return 0;
  1614. }
  1615. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1616. enum dsi_cmd_set_type type,
  1617. struct dsi_parser_utils *utils)
  1618. {
  1619. int rc = 0;
  1620. u32 length = 0;
  1621. const char *data;
  1622. const char *state;
  1623. u32 packet_count = 0;
  1624. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1625. &length);
  1626. if (!data) {
  1627. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1628. rc = -ENOTSUPP;
  1629. goto error;
  1630. }
  1631. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1632. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1633. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1634. if (rc) {
  1635. DSI_ERR("commands failed, rc=%d\n", rc);
  1636. goto error;
  1637. }
  1638. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1639. packet_count, length);
  1640. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1641. if (rc) {
  1642. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1643. goto error;
  1644. }
  1645. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1646. cmd->cmds);
  1647. if (rc) {
  1648. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1649. goto error_free_mem;
  1650. }
  1651. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1652. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1653. cmd->state = DSI_CMD_SET_STATE_LP;
  1654. } else if (!strcmp(state, "dsi_hs_mode")) {
  1655. cmd->state = DSI_CMD_SET_STATE_HS;
  1656. } else {
  1657. DSI_ERR("[%s] command state unrecognized-%s\n",
  1658. cmd_set_state_map[type], state);
  1659. goto error_free_mem;
  1660. }
  1661. return rc;
  1662. error_free_mem:
  1663. kfree(cmd->cmds);
  1664. cmd->cmds = NULL;
  1665. error:
  1666. return rc;
  1667. }
  1668. static int dsi_panel_parse_cmd_sets(
  1669. struct dsi_display_mode_priv_info *priv_info,
  1670. struct dsi_parser_utils *utils)
  1671. {
  1672. int rc = 0;
  1673. struct dsi_panel_cmd_set *set;
  1674. u32 i;
  1675. if (!priv_info) {
  1676. DSI_ERR("invalid mode priv info\n");
  1677. return -EINVAL;
  1678. }
  1679. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1680. set = &priv_info->cmd_sets[i];
  1681. set->type = i;
  1682. set->count = 0;
  1683. if (i == DSI_CMD_SET_PPS) {
  1684. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1685. if (rc)
  1686. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1687. i, rc);
  1688. set->state = DSI_CMD_SET_STATE_LP;
  1689. } else {
  1690. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1691. if (rc)
  1692. DSI_DEBUG("failed to parse set %d\n", i);
  1693. }
  1694. }
  1695. rc = 0;
  1696. return rc;
  1697. }
  1698. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1699. {
  1700. int rc = 0;
  1701. int i;
  1702. u32 length = 0;
  1703. u32 count = 0;
  1704. u32 size = 0;
  1705. u32 *arr_32 = NULL;
  1706. const u32 *arr;
  1707. struct dsi_parser_utils *utils = &panel->utils;
  1708. struct dsi_reset_seq *seq;
  1709. if (panel->host_config.ext_bridge_mode)
  1710. return 0;
  1711. arr = utils->get_property(utils->data,
  1712. "qcom,mdss-dsi-reset-sequence", &length);
  1713. if (!arr) {
  1714. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1715. rc = -EINVAL;
  1716. goto error;
  1717. }
  1718. if (length & 0x1) {
  1719. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1720. panel->name);
  1721. rc = -EINVAL;
  1722. goto error;
  1723. }
  1724. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1725. length = length / sizeof(u32);
  1726. size = length * sizeof(u32);
  1727. arr_32 = kzalloc(size, GFP_KERNEL);
  1728. if (!arr_32) {
  1729. rc = -ENOMEM;
  1730. goto error;
  1731. }
  1732. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1733. arr_32, length);
  1734. if (rc) {
  1735. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1736. goto error_free_arr_32;
  1737. }
  1738. count = length / 2;
  1739. size = count * sizeof(*seq);
  1740. seq = kzalloc(size, GFP_KERNEL);
  1741. if (!seq) {
  1742. rc = -ENOMEM;
  1743. goto error_free_arr_32;
  1744. }
  1745. panel->reset_config.sequence = seq;
  1746. panel->reset_config.count = count;
  1747. for (i = 0; i < length; i += 2) {
  1748. seq->level = arr_32[i];
  1749. seq->sleep_ms = arr_32[i + 1];
  1750. seq++;
  1751. }
  1752. error_free_arr_32:
  1753. kfree(arr_32);
  1754. error:
  1755. return rc;
  1756. }
  1757. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1758. {
  1759. struct dsi_parser_utils *utils = &panel->utils;
  1760. const char *string;
  1761. int i, rc = 0;
  1762. panel->ulps_feature_enabled =
  1763. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1764. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1765. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1766. panel->ulps_suspend_enabled =
  1767. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1768. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1769. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1770. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1771. "qcom,mdss-dsi-te-using-wd");
  1772. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1773. "qcom,cmd-sync-wait-broadcast");
  1774. panel->lp11_init = utils->read_bool(utils->data,
  1775. "qcom,mdss-dsi-lp11-init");
  1776. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1777. "qcom,platform-reset-gpio-always-on");
  1778. panel->spr_info.enable = false;
  1779. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1780. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1781. if (!rc) {
  1782. // find match for pack-type string
  1783. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1784. if (msm_spr_pack_type_str[i] &&
  1785. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1786. panel->spr_info.enable = true;
  1787. panel->spr_info.pack_type = i;
  1788. break;
  1789. }
  1790. }
  1791. }
  1792. pr_debug("%s source side spr packing, pack-type %s\n",
  1793. panel->spr_info.enable ? "enable" : "disable",
  1794. panel->spr_info.enable ?
  1795. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1796. return 0;
  1797. }
  1798. static int dsi_panel_parse_jitter_config(
  1799. struct dsi_display_mode *mode,
  1800. struct dsi_parser_utils *utils)
  1801. {
  1802. int rc;
  1803. struct dsi_display_mode_priv_info *priv_info;
  1804. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1805. u64 jitter_val = 0;
  1806. priv_info = mode->priv_info;
  1807. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1808. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1809. if (rc) {
  1810. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1811. } else {
  1812. jitter_val = jitter[0];
  1813. jitter_val = div_u64(jitter_val, jitter[1]);
  1814. }
  1815. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1816. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1817. priv_info->panel_jitter_denom =
  1818. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1819. } else {
  1820. priv_info->panel_jitter_numer = jitter[0];
  1821. priv_info->panel_jitter_denom = jitter[1];
  1822. }
  1823. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1824. &priv_info->panel_prefill_lines);
  1825. if (rc) {
  1826. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1827. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1828. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1829. } else if (priv_info->panel_prefill_lines >=
  1830. DSI_V_TOTAL(&mode->timing)) {
  1831. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1832. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1833. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1834. }
  1835. return 0;
  1836. }
  1837. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1838. {
  1839. int rc = 0;
  1840. char *supply_name;
  1841. if (panel->host_config.ext_bridge_mode)
  1842. return 0;
  1843. if (!strcmp(panel->type, "primary"))
  1844. supply_name = "qcom,panel-supply-entries";
  1845. else
  1846. supply_name = "qcom,panel-sec-supply-entries";
  1847. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1848. &panel->power_info, supply_name);
  1849. if (rc) {
  1850. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1851. goto error;
  1852. }
  1853. error:
  1854. return rc;
  1855. }
  1856. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1857. struct msm_io_res *io_res)
  1858. {
  1859. struct list_head temp_head;
  1860. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1861. struct list_head *mem_list = &io_res->mem;
  1862. int i, rc = 0;
  1863. INIT_LIST_HEAD(&temp_head);
  1864. for (i = 0; i < panel->tlmm_gpio_count; i++) {
  1865. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1866. if (!io_mem) {
  1867. rc = -ENOMEM;
  1868. goto parse_fail;
  1869. }
  1870. io_mem->base = panel->tlmm_gpio[i].addr;
  1871. io_mem->size = panel->tlmm_gpio[i].size;
  1872. list_add(&io_mem->list, &temp_head);
  1873. }
  1874. list_splice(&temp_head, mem_list);
  1875. goto end;
  1876. parse_fail:
  1877. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1878. list_del(&pos->list);
  1879. kfree(pos);
  1880. }
  1881. end:
  1882. return rc;
  1883. }
  1884. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1885. {
  1886. int rc = 0;
  1887. const char *data;
  1888. struct dsi_parser_utils *utils = &panel->utils;
  1889. char *reset_gpio_name, *mode_set_gpio_name;
  1890. if (!strcmp(panel->type, "primary")) {
  1891. reset_gpio_name = "qcom,platform-reset-gpio";
  1892. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1893. } else {
  1894. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1895. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1896. }
  1897. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1898. reset_gpio_name, 0);
  1899. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1900. !panel->host_config.ext_bridge_mode) {
  1901. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1902. panel->reset_config.reset_gpio);
  1903. }
  1904. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1905. "qcom,5v-boost-gpio",
  1906. 0);
  1907. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1908. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1909. panel->name, rc);
  1910. panel->reset_config.disp_en_gpio =
  1911. utils->get_named_gpio(utils->data,
  1912. "qcom,platform-en-gpio", 0);
  1913. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1914. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1915. panel->name, rc);
  1916. }
  1917. }
  1918. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1919. utils->data, mode_set_gpio_name, 0);
  1920. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1921. DSI_DEBUG("mode gpio not specified\n");
  1922. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1923. data = utils->get_property(utils->data,
  1924. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1925. if (data) {
  1926. if (!strcmp(data, "single_port"))
  1927. panel->reset_config.mode_sel_state =
  1928. MODE_SEL_SINGLE_PORT;
  1929. else if (!strcmp(data, "dual_port"))
  1930. panel->reset_config.mode_sel_state =
  1931. MODE_SEL_DUAL_PORT;
  1932. else if (!strcmp(data, "high"))
  1933. panel->reset_config.mode_sel_state =
  1934. MODE_GPIO_HIGH;
  1935. else if (!strcmp(data, "low"))
  1936. panel->reset_config.mode_sel_state =
  1937. MODE_GPIO_LOW;
  1938. } else {
  1939. /* Set default mode as SPLIT mode */
  1940. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1941. }
  1942. /* TODO: release memory */
  1943. rc = dsi_panel_parse_reset_sequence(panel);
  1944. if (rc) {
  1945. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1946. panel->name, rc);
  1947. goto error;
  1948. }
  1949. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1950. "qcom,mdss-dsi-panel-test-pin",
  1951. 0);
  1952. if (!gpio_is_valid(panel->panel_test_gpio))
  1953. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1954. __LINE__);
  1955. error:
  1956. return rc;
  1957. }
  1958. static int dsi_panel_parse_tlmm_gpio(struct dsi_panel *panel)
  1959. {
  1960. struct dsi_parser_utils *utils = &panel->utils;
  1961. u32 base, size, pin;
  1962. int pin_count, address_count, name_count, i;
  1963. address_count = utils->count_u32_elems(utils->data,
  1964. "qcom,dsi-panel-gpio-address");
  1965. if (address_count != 2) {
  1966. DSI_DEBUG("panel gpio address not defined\n");
  1967. return 0;
  1968. }
  1969. utils->read_u32_index(utils->data,
  1970. "qcom,dsi-panel-gpio-address", 0, &base);
  1971. utils->read_u32_index(utils->data,
  1972. "qcom,dsi-panel-gpio-address", 1, &size);
  1973. pin_count = utils->count_u32_elems(utils->data,
  1974. "qcom,dsi-panel-gpio-pins");
  1975. name_count = utils->count_strings(utils->data,
  1976. "qcom,dsi-panel-gpio-names");
  1977. if ((pin_count < 0) || (name_count < 0) || (pin_count != name_count)) {
  1978. DSI_ERR("invalid gpio pins/names\n");
  1979. return -EINVAL;
  1980. }
  1981. panel->tlmm_gpio = kcalloc(pin_count,
  1982. sizeof(struct dsi_tlmm_gpio), GFP_KERNEL);
  1983. if (!panel->tlmm_gpio)
  1984. return -ENOMEM;
  1985. panel->tlmm_gpio_count = pin_count;
  1986. for (i = 0; i < pin_count; i++) {
  1987. utils->read_u32_index(utils->data,
  1988. "qcom,dsi-panel-gpio-pins", i, &pin);
  1989. panel->tlmm_gpio[i].num = pin;
  1990. panel->tlmm_gpio[i].addr = base + (pin * size);
  1991. panel->tlmm_gpio[i].size = size;
  1992. utils->read_string_index(utils->data,
  1993. "qcom,dsi-panel-gpio-names", i,
  1994. &(panel->tlmm_gpio[i].name));
  1995. }
  1996. return 0;
  1997. }
  1998. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1999. {
  2000. int rc = 0;
  2001. u32 val;
  2002. struct dsi_backlight_config *config = &panel->bl_config;
  2003. struct dsi_parser_utils *utils = &panel->utils;
  2004. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2005. &val);
  2006. if (rc) {
  2007. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2008. goto error;
  2009. }
  2010. config->pwm_period_usecs = val;
  2011. error:
  2012. return rc;
  2013. }
  2014. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2015. {
  2016. int rc = 0;
  2017. u32 val = 0;
  2018. const char *bl_type = NULL;
  2019. const char *data = NULL;
  2020. const char *state = NULL;
  2021. struct dsi_parser_utils *utils = &panel->utils;
  2022. char *bl_name = NULL;
  2023. if (!strcmp(panel->type, "primary"))
  2024. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2025. else
  2026. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2027. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2028. if (!bl_type) {
  2029. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2030. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2031. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2032. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2033. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2034. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2035. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2036. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2037. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2038. } else {
  2039. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2040. panel->name, bl_type);
  2041. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2042. }
  2043. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2044. if (!data) {
  2045. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2046. } else if (!strcmp(data, "delay_until_first_frame")) {
  2047. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2048. } else {
  2049. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2050. panel->name, data);
  2051. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2052. }
  2053. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2054. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2055. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2056. if (rc) {
  2057. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2058. panel->name);
  2059. panel->bl_config.bl_min_level = 0;
  2060. } else {
  2061. panel->bl_config.bl_min_level = val;
  2062. }
  2063. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2064. if (rc) {
  2065. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2066. panel->name);
  2067. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2068. } else {
  2069. panel->bl_config.bl_max_level = val;
  2070. }
  2071. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2072. &val);
  2073. if (rc) {
  2074. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2075. panel->name);
  2076. panel->bl_config.brightness_max_level = 255;
  2077. rc = 0;
  2078. } else {
  2079. panel->bl_config.brightness_max_level = val;
  2080. }
  2081. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2082. "qcom,mdss-dsi-bl-inverted-dbv");
  2083. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2084. if (!state || !strcmp(state, "dsi_hs_mode"))
  2085. panel->bl_config.lp_mode = false;
  2086. else if (!strcmp(state, "dsi_lp_mode"))
  2087. panel->bl_config.lp_mode = true;
  2088. else
  2089. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2090. state);
  2091. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2092. rc = dsi_panel_parse_bl_pwm_config(panel);
  2093. if (rc) {
  2094. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2095. panel->name, rc);
  2096. goto error;
  2097. }
  2098. }
  2099. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2100. "qcom,platform-bklight-en-gpio",
  2101. 0);
  2102. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2103. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2104. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2105. panel->name, rc);
  2106. rc = -EPROBE_DEFER;
  2107. goto error;
  2108. } else {
  2109. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2110. panel->name, rc);
  2111. rc = 0;
  2112. goto error;
  2113. }
  2114. }
  2115. error:
  2116. return rc;
  2117. }
  2118. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2119. struct dsi_parser_utils *utils)
  2120. {
  2121. const char *data;
  2122. u32 len, i;
  2123. int rc = 0;
  2124. struct dsi_display_mode_priv_info *priv_info;
  2125. u64 pixel_clk_khz;
  2126. if (!mode || !mode->priv_info)
  2127. return -EINVAL;
  2128. priv_info = mode->priv_info;
  2129. data = utils->get_property(utils->data,
  2130. "qcom,mdss-dsi-panel-phy-timings", &len);
  2131. if (!data) {
  2132. DSI_DEBUG("Unable to read Phy timing settings\n");
  2133. } else {
  2134. priv_info->phy_timing_val =
  2135. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2136. if (!priv_info->phy_timing_val)
  2137. return -EINVAL;
  2138. for (i = 0; i < len; i++)
  2139. priv_info->phy_timing_val[i] = data[i];
  2140. priv_info->phy_timing_len = len;
  2141. }
  2142. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2143. /*
  2144. * For command mode we update the pclk as part of
  2145. * function dsi_panel_calc_dsi_transfer_time( )
  2146. * as we set it based on dsi clock or mdp transfer time.
  2147. */
  2148. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2149. DSI_V_TOTAL(&mode->timing) *
  2150. mode->timing.refresh_rate);
  2151. do_div(pixel_clk_khz, 1000);
  2152. mode->pixel_clk_khz = pixel_clk_khz;
  2153. }
  2154. return rc;
  2155. }
  2156. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2157. struct dsi_parser_utils *utils)
  2158. {
  2159. u32 data;
  2160. int rc = -EINVAL;
  2161. int intf_width;
  2162. const char *compression;
  2163. struct dsi_display_mode_priv_info *priv_info;
  2164. if (!mode || !mode->priv_info)
  2165. return -EINVAL;
  2166. priv_info = mode->priv_info;
  2167. priv_info->dsc_enabled = false;
  2168. compression = utils->get_property(utils->data,
  2169. "qcom,compression-mode", NULL);
  2170. if (compression && !strcmp(compression, "dsc"))
  2171. priv_info->dsc_enabled = true;
  2172. if (!priv_info->dsc_enabled) {
  2173. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2174. return 0;
  2175. }
  2176. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2177. if (rc) {
  2178. priv_info->dsc.config.dsc_version_major = 0x1;
  2179. priv_info->dsc.config.dsc_version_minor = 0x1;
  2180. rc = 0;
  2181. } else {
  2182. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2183. * major version information
  2184. */
  2185. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2186. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2187. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2188. ((priv_info->dsc.config.dsc_version_minor
  2189. != 0x1) &&
  2190. (priv_info->dsc.config.dsc_version_minor
  2191. != 0x2))) {
  2192. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2193. __func__,
  2194. priv_info->dsc.config.dsc_version_major,
  2195. priv_info->dsc.config.dsc_version_minor
  2196. );
  2197. rc = -EINVAL;
  2198. goto error;
  2199. }
  2200. }
  2201. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2202. if (rc) {
  2203. priv_info->dsc.scr_rev = 0x0;
  2204. rc = 0;
  2205. } else {
  2206. priv_info->dsc.scr_rev = data & 0xff;
  2207. /* only one scr rev supported */
  2208. if (priv_info->dsc.scr_rev > 0x1) {
  2209. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2210. __func__, priv_info->dsc.scr_rev);
  2211. rc = -EINVAL;
  2212. goto error;
  2213. }
  2214. }
  2215. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2216. if (rc) {
  2217. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2218. goto error;
  2219. }
  2220. priv_info->dsc.config.slice_height = data;
  2221. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2222. if (rc) {
  2223. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2224. goto error;
  2225. }
  2226. priv_info->dsc.config.slice_width = data;
  2227. intf_width = mode->timing.h_active;
  2228. if (intf_width % priv_info->dsc.config.slice_width) {
  2229. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2230. intf_width, priv_info->dsc.config.slice_width);
  2231. rc = -EINVAL;
  2232. goto error;
  2233. }
  2234. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2235. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2236. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2237. if (rc) {
  2238. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2239. goto error;
  2240. } else if (!data || (data > 2)) {
  2241. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2242. goto error;
  2243. }
  2244. priv_info->dsc.slice_per_pkt = data;
  2245. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2246. &data);
  2247. if (rc) {
  2248. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2249. goto error;
  2250. }
  2251. priv_info->dsc.config.bits_per_component = data;
  2252. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2253. if (rc) {
  2254. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2255. data = 0;
  2256. }
  2257. priv_info->dsc.pps_delay_ms = data;
  2258. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2259. &data);
  2260. if (rc) {
  2261. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2262. goto error;
  2263. }
  2264. priv_info->dsc.config.bits_per_pixel = data << 4;
  2265. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2266. &data);
  2267. if (rc) {
  2268. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2269. rc = 0;
  2270. data = MSM_CHROMA_444;
  2271. }
  2272. priv_info->dsc.chroma_format = data;
  2273. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2274. &data);
  2275. if (rc) {
  2276. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2277. rc = 0;
  2278. data = MSM_RGB;
  2279. }
  2280. priv_info->dsc.source_color_space = data;
  2281. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2282. "qcom,mdss-dsc-block-prediction-enable");
  2283. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2284. priv_info->dsc.config.slice_width);
  2285. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2286. priv_info->dsc.scr_rev);
  2287. if (rc) {
  2288. DSI_DEBUG("failed populating dsc params\n");
  2289. rc = -EINVAL;
  2290. goto error;
  2291. }
  2292. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2293. if (rc) {
  2294. DSI_DEBUG("failed populating other dsc params\n");
  2295. rc = -EINVAL;
  2296. goto error;
  2297. }
  2298. priv_info->pclk_scale.numer =
  2299. priv_info->dsc.config.bits_per_pixel >> 4;
  2300. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2301. priv_info->dsc.chroma_format,
  2302. priv_info->dsc.config.bits_per_component);
  2303. mode->timing.dsc_enabled = true;
  2304. mode->timing.dsc = &priv_info->dsc;
  2305. mode->timing.pclk_scale = priv_info->pclk_scale;
  2306. error:
  2307. return rc;
  2308. }
  2309. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2310. struct dsi_parser_utils *utils, int traffic_mode)
  2311. {
  2312. u32 data;
  2313. int rc = -EINVAL;
  2314. const char *compression;
  2315. struct dsi_display_mode_priv_info *priv_info;
  2316. int intf_width;
  2317. if (!mode || !mode->priv_info)
  2318. return -EINVAL;
  2319. priv_info = mode->priv_info;
  2320. priv_info->vdc_enabled = false;
  2321. compression = utils->get_property(utils->data,
  2322. "qcom,compression-mode", NULL);
  2323. if (compression && !strcmp(compression, "vdc"))
  2324. priv_info->vdc_enabled = true;
  2325. if (!priv_info->vdc_enabled) {
  2326. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2327. return 0;
  2328. }
  2329. priv_info->vdc.traffic_mode = traffic_mode;
  2330. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2331. if (rc) {
  2332. priv_info->vdc.version_major = 0x1;
  2333. priv_info->vdc.version_minor = 0x2;
  2334. priv_info->vdc.version_release = 0x0;
  2335. rc = 0;
  2336. } else {
  2337. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2338. * major version information
  2339. */
  2340. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2341. priv_info->vdc.version_minor = data & 0x0F;
  2342. if ((priv_info->vdc.version_major != 0x1) &&
  2343. ((priv_info->vdc.version_minor
  2344. != 0x2))) {
  2345. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2346. __func__,
  2347. priv_info->vdc.version_major,
  2348. priv_info->vdc.version_minor
  2349. );
  2350. rc = -EINVAL;
  2351. goto error;
  2352. }
  2353. }
  2354. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2355. if (rc) {
  2356. priv_info->vdc.version_release = 0x0;
  2357. rc = 0;
  2358. } else {
  2359. priv_info->vdc.version_release = data & 0xff;
  2360. /* only one release version is supported */
  2361. if (priv_info->vdc.version_release != 0x0) {
  2362. DSI_ERR("unsupported vdc release version %d\n",
  2363. priv_info->vdc.version_release);
  2364. rc = -EINVAL;
  2365. goto error;
  2366. }
  2367. }
  2368. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2369. priv_info->vdc.version_major,
  2370. priv_info->vdc.version_minor,
  2371. priv_info->vdc.version_release);
  2372. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2373. if (rc) {
  2374. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2375. goto error;
  2376. }
  2377. priv_info->vdc.slice_height = data;
  2378. /* slice height should be atleast 16 lines */
  2379. if (priv_info->vdc.slice_height < 16) {
  2380. DSI_ERR("invalid slice height %d\n",
  2381. priv_info->vdc.slice_height);
  2382. rc = -EINVAL;
  2383. goto error;
  2384. }
  2385. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2386. if (rc) {
  2387. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2388. goto error;
  2389. }
  2390. priv_info->vdc.slice_width = data;
  2391. /*
  2392. * slide-width should be multiple of 8
  2393. * slice-width should be atlease 64 pixels
  2394. */
  2395. if ((priv_info->vdc.slice_width & 7) ||
  2396. (priv_info->vdc.slice_width < 64)) {
  2397. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2398. rc = -EINVAL;
  2399. goto error;
  2400. }
  2401. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2402. if (rc) {
  2403. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2404. goto error;
  2405. } else if (!data || (data > 2)) {
  2406. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2407. rc = -EINVAL;
  2408. goto error;
  2409. }
  2410. intf_width = mode->timing.h_active;
  2411. priv_info->vdc.slice_per_pkt = data;
  2412. priv_info->vdc.frame_width = mode->timing.h_active;
  2413. priv_info->vdc.frame_height = mode->timing.v_active;
  2414. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2415. &data);
  2416. if (rc) {
  2417. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2418. goto error;
  2419. }
  2420. priv_info->vdc.bits_per_component = data;
  2421. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2422. if (rc) {
  2423. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2424. data = 0;
  2425. }
  2426. priv_info->vdc.pps_delay_ms = data;
  2427. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2428. &data);
  2429. if (rc) {
  2430. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2431. goto error;
  2432. }
  2433. priv_info->vdc.bits_per_pixel = data << 4;
  2434. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2435. &data);
  2436. if (rc) {
  2437. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2438. rc = 0;
  2439. data = MSM_CHROMA_444;
  2440. }
  2441. priv_info->vdc.chroma_format = data;
  2442. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2443. &data);
  2444. if (rc) {
  2445. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2446. rc = 0;
  2447. data = MSM_RGB;
  2448. }
  2449. priv_info->vdc.source_color_space = data;
  2450. rc = sde_vdc_populate_config(&priv_info->vdc,
  2451. intf_width, traffic_mode);
  2452. if (rc) {
  2453. DSI_DEBUG("failed populating vdc config\n");
  2454. rc = -EINVAL;
  2455. goto error;
  2456. }
  2457. priv_info->pclk_scale.numer =
  2458. priv_info->vdc.bits_per_pixel >> 4;
  2459. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2460. priv_info->vdc.chroma_format,
  2461. priv_info->vdc.bits_per_component);
  2462. mode->timing.vdc_enabled = true;
  2463. mode->timing.vdc = &priv_info->vdc;
  2464. mode->timing.pclk_scale = priv_info->pclk_scale;
  2465. error:
  2466. return rc;
  2467. }
  2468. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2469. {
  2470. int rc = 0;
  2471. struct drm_panel_hdr_properties *hdr_prop;
  2472. struct dsi_parser_utils *utils = &panel->utils;
  2473. hdr_prop = &panel->hdr_props;
  2474. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2475. "qcom,mdss-dsi-panel-hdr-enabled");
  2476. if (hdr_prop->hdr_enabled) {
  2477. rc = utils->read_u32_array(utils->data,
  2478. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2479. hdr_prop->display_primaries,
  2480. DISPLAY_PRIMARIES_MAX);
  2481. if (rc) {
  2482. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2483. __func__, __LINE__, rc);
  2484. hdr_prop->hdr_enabled = false;
  2485. return rc;
  2486. }
  2487. rc = utils->read_u32(utils->data,
  2488. "qcom,mdss-dsi-panel-peak-brightness",
  2489. &(hdr_prop->peak_brightness));
  2490. if (rc) {
  2491. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2492. __func__, __LINE__, rc);
  2493. hdr_prop->hdr_enabled = false;
  2494. return rc;
  2495. }
  2496. rc = utils->read_u32(utils->data,
  2497. "qcom,mdss-dsi-panel-blackness-level",
  2498. &(hdr_prop->blackness_level));
  2499. if (rc) {
  2500. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2501. __func__, __LINE__, rc);
  2502. hdr_prop->hdr_enabled = false;
  2503. return rc;
  2504. }
  2505. }
  2506. return 0;
  2507. }
  2508. static int dsi_panel_parse_topology(
  2509. struct dsi_display_mode_priv_info *priv_info,
  2510. struct dsi_parser_utils *utils,
  2511. int topology_override)
  2512. {
  2513. struct msm_display_topology *topology;
  2514. u32 top_count, top_sel, *array = NULL;
  2515. int i, len = 0;
  2516. int rc = -EINVAL;
  2517. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2518. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2519. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2520. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2521. return rc;
  2522. }
  2523. top_count = len / TOPOLOGY_SET_LEN;
  2524. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2525. if (!array)
  2526. return -ENOMEM;
  2527. rc = utils->read_u32_array(utils->data,
  2528. "qcom,display-topology", array, len);
  2529. if (rc) {
  2530. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2531. goto read_fail;
  2532. }
  2533. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2534. if (!topology) {
  2535. rc = -ENOMEM;
  2536. goto read_fail;
  2537. }
  2538. for (i = 0; i < top_count; i++) {
  2539. struct msm_display_topology *top = &topology[i];
  2540. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2541. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2542. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2543. }
  2544. if (topology_override >= 0 && topology_override < top_count) {
  2545. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2546. topology_override,
  2547. topology[topology_override].num_lm,
  2548. topology[topology_override].num_enc,
  2549. topology[topology_override].num_intf);
  2550. top_sel = topology_override;
  2551. goto parse_done;
  2552. }
  2553. rc = utils->read_u32(utils->data,
  2554. "qcom,default-topology-index", &top_sel);
  2555. if (rc) {
  2556. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2557. goto parse_fail;
  2558. }
  2559. if (top_sel >= top_count) {
  2560. rc = -EINVAL;
  2561. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2562. rc);
  2563. goto parse_fail;
  2564. }
  2565. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2566. !topology[top_sel].num_enc) {
  2567. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2568. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2569. topology[top_sel].num_enc);
  2570. goto parse_fail;
  2571. }
  2572. if (priv_info->dsc_enabled)
  2573. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2574. else if (priv_info->vdc_enabled)
  2575. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2576. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2577. topology[top_sel].num_lm,
  2578. topology[top_sel].num_enc,
  2579. topology[top_sel].num_intf);
  2580. parse_done:
  2581. memcpy(&priv_info->topology, &topology[top_sel],
  2582. sizeof(struct msm_display_topology));
  2583. parse_fail:
  2584. kfree(topology);
  2585. read_fail:
  2586. kfree(array);
  2587. return rc;
  2588. }
  2589. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2590. struct msm_roi_alignment *align)
  2591. {
  2592. int len = 0, rc = 0;
  2593. u32 value[6];
  2594. struct property *data;
  2595. if (!align)
  2596. return -EINVAL;
  2597. memset(align, 0, sizeof(*align));
  2598. data = utils->find_property(utils->data,
  2599. "qcom,panel-roi-alignment", &len);
  2600. len /= sizeof(u32);
  2601. if (!data) {
  2602. DSI_ERR("panel roi alignment not found\n");
  2603. rc = -EINVAL;
  2604. } else if (len != 6) {
  2605. DSI_ERR("incorrect roi alignment len %d\n", len);
  2606. rc = -EINVAL;
  2607. } else {
  2608. rc = utils->read_u32_array(utils->data,
  2609. "qcom,panel-roi-alignment", value, len);
  2610. if (rc)
  2611. DSI_DEBUG("error reading panel roi alignment values\n");
  2612. else {
  2613. align->xstart_pix_align = value[0];
  2614. align->ystart_pix_align = value[1];
  2615. align->width_pix_align = value[2];
  2616. align->height_pix_align = value[3];
  2617. align->min_width = value[4];
  2618. align->min_height = value[5];
  2619. }
  2620. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2621. align->xstart_pix_align,
  2622. align->width_pix_align,
  2623. align->ystart_pix_align,
  2624. align->height_pix_align,
  2625. align->min_width,
  2626. align->min_height);
  2627. }
  2628. return rc;
  2629. }
  2630. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2631. struct dsi_parser_utils *utils)
  2632. {
  2633. struct msm_roi_caps *roi_caps = NULL;
  2634. const char *data;
  2635. int rc = 0;
  2636. if (!mode || !mode->priv_info) {
  2637. DSI_ERR("invalid arguments\n");
  2638. return -EINVAL;
  2639. }
  2640. roi_caps = &mode->priv_info->roi_caps;
  2641. memset(roi_caps, 0, sizeof(*roi_caps));
  2642. data = utils->get_property(utils->data,
  2643. "qcom,partial-update-enabled", NULL);
  2644. if (data) {
  2645. if (!strcmp(data, "dual_roi"))
  2646. roi_caps->num_roi = 2;
  2647. else if (!strcmp(data, "single_roi"))
  2648. roi_caps->num_roi = 1;
  2649. else {
  2650. DSI_INFO(
  2651. "invalid value for qcom,partial-update-enabled: %s\n",
  2652. data);
  2653. return 0;
  2654. }
  2655. } else {
  2656. DSI_DEBUG("partial update disabled as the property is not set\n");
  2657. return 0;
  2658. }
  2659. roi_caps->merge_rois = utils->read_bool(utils->data,
  2660. "qcom,partial-update-roi-merge");
  2661. roi_caps->enabled = roi_caps->num_roi > 0;
  2662. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2663. roi_caps->enabled);
  2664. if (roi_caps->enabled)
  2665. rc = dsi_panel_parse_roi_alignment(utils,
  2666. &roi_caps->align);
  2667. if (rc)
  2668. memset(roi_caps, 0, sizeof(*roi_caps));
  2669. return rc;
  2670. }
  2671. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2672. struct dsi_parser_utils *utils)
  2673. {
  2674. if (!mode || !mode->priv_info) {
  2675. DSI_ERR("invalid arguments\n");
  2676. return false;
  2677. }
  2678. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2679. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2680. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2681. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2682. if (!mode->panel_mode_caps)
  2683. return false;
  2684. return true;
  2685. };
  2686. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2687. {
  2688. int dms_enabled;
  2689. const char *data;
  2690. struct dsi_parser_utils *utils = &panel->utils;
  2691. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2692. dms_enabled = utils->read_bool(utils->data,
  2693. "qcom,dynamic-mode-switch-enabled");
  2694. if (!dms_enabled)
  2695. return 0;
  2696. data = utils->get_property(utils->data,
  2697. "qcom,dynamic-mode-switch-type", NULL);
  2698. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2699. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2700. } else {
  2701. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2702. panel->name, data);
  2703. return -EINVAL;
  2704. }
  2705. return 0;
  2706. };
  2707. /*
  2708. * The length of all the valid values to be checked should not be greater
  2709. * than the length of returned data from read command.
  2710. */
  2711. static bool
  2712. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2713. {
  2714. int i;
  2715. struct drm_panel_esd_config *config = &panel->esd_config;
  2716. for (i = 0; i < count; ++i) {
  2717. if (config->status_valid_params[i] >
  2718. config->status_cmds_rlen[i]) {
  2719. DSI_DEBUG("ignore valid params\n");
  2720. return false;
  2721. }
  2722. }
  2723. return true;
  2724. }
  2725. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2726. char *prop_key, u32 **target, u32 cmd_cnt)
  2727. {
  2728. int tmp;
  2729. if (!utils->find_property(utils->data, prop_key, &tmp))
  2730. return false;
  2731. tmp /= sizeof(u32);
  2732. if (tmp != cmd_cnt) {
  2733. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2734. tmp, cmd_cnt);
  2735. return false;
  2736. }
  2737. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2738. if (IS_ERR_OR_NULL(*target)) {
  2739. DSI_ERR("Error allocating memory for property\n");
  2740. return false;
  2741. }
  2742. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2743. DSI_ERR("cannot get values from dts\n");
  2744. kfree(*target);
  2745. *target = NULL;
  2746. return false;
  2747. }
  2748. return true;
  2749. }
  2750. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2751. {
  2752. kfree(esd_config->status_buf);
  2753. kfree(esd_config->return_buf);
  2754. kfree(esd_config->status_value);
  2755. kfree(esd_config->status_valid_params);
  2756. kfree(esd_config->status_cmds_rlen);
  2757. kfree(esd_config->status_cmd.cmds);
  2758. }
  2759. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2760. {
  2761. struct drm_panel_esd_config *esd_config;
  2762. int rc = 0;
  2763. u32 tmp;
  2764. u32 i, status_len, *lenp;
  2765. struct property *data;
  2766. struct dsi_parser_utils *utils = &panel->utils;
  2767. if (!panel) {
  2768. DSI_ERR("Invalid Params\n");
  2769. return -EINVAL;
  2770. }
  2771. esd_config = &panel->esd_config;
  2772. if (!esd_config)
  2773. return -EINVAL;
  2774. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2775. DSI_CMD_SET_PANEL_STATUS, utils);
  2776. if (!esd_config->status_cmd.count) {
  2777. DSI_ERR("panel status command parsing failed\n");
  2778. rc = -EINVAL;
  2779. goto error;
  2780. }
  2781. if (!dsi_panel_parse_esd_status_len(utils,
  2782. "qcom,mdss-dsi-panel-status-read-length",
  2783. &panel->esd_config.status_cmds_rlen,
  2784. esd_config->status_cmd.count)) {
  2785. DSI_ERR("Invalid status read length\n");
  2786. rc = -EINVAL;
  2787. goto error1;
  2788. }
  2789. if (dsi_panel_parse_esd_status_len(utils,
  2790. "qcom,mdss-dsi-panel-status-valid-params",
  2791. &panel->esd_config.status_valid_params,
  2792. esd_config->status_cmd.count)) {
  2793. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2794. esd_config->status_cmd.count)) {
  2795. rc = -EINVAL;
  2796. goto error2;
  2797. }
  2798. }
  2799. status_len = 0;
  2800. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2801. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2802. status_len += lenp[i];
  2803. if (!status_len) {
  2804. rc = -EINVAL;
  2805. goto error2;
  2806. }
  2807. /*
  2808. * Some panel may need multiple read commands to properly
  2809. * check panel status. Do a sanity check for proper status
  2810. * value which will be compared with the value read by dsi
  2811. * controller during ESD check. Also check if multiple read
  2812. * commands are there then, there should be corresponding
  2813. * status check values for each read command.
  2814. */
  2815. data = utils->find_property(utils->data,
  2816. "qcom,mdss-dsi-panel-status-value", &tmp);
  2817. tmp /= sizeof(u32);
  2818. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2819. esd_config->groups = tmp / status_len;
  2820. } else {
  2821. DSI_ERR("error parse panel-status-value\n");
  2822. rc = -EINVAL;
  2823. goto error2;
  2824. }
  2825. esd_config->status_value =
  2826. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2827. GFP_KERNEL);
  2828. if (!esd_config->status_value) {
  2829. rc = -ENOMEM;
  2830. goto error2;
  2831. }
  2832. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2833. sizeof(unsigned char), GFP_KERNEL);
  2834. if (!esd_config->return_buf) {
  2835. rc = -ENOMEM;
  2836. goto error3;
  2837. }
  2838. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2839. if (!esd_config->status_buf) {
  2840. rc = -ENOMEM;
  2841. goto error4;
  2842. }
  2843. rc = utils->read_u32_array(utils->data,
  2844. "qcom,mdss-dsi-panel-status-value",
  2845. esd_config->status_value, esd_config->groups * status_len);
  2846. if (rc) {
  2847. DSI_DEBUG("error reading panel status values\n");
  2848. memset(esd_config->status_value, 0,
  2849. esd_config->groups * status_len);
  2850. }
  2851. return 0;
  2852. error4:
  2853. kfree(esd_config->return_buf);
  2854. error3:
  2855. kfree(esd_config->status_value);
  2856. error2:
  2857. kfree(esd_config->status_valid_params);
  2858. kfree(esd_config->status_cmds_rlen);
  2859. error1:
  2860. kfree(esd_config->status_cmd.cmds);
  2861. error:
  2862. return rc;
  2863. }
  2864. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2865. {
  2866. int rc = 0;
  2867. const char *string;
  2868. struct drm_panel_esd_config *esd_config;
  2869. struct dsi_parser_utils *utils = &panel->utils;
  2870. u8 *esd_mode = NULL;
  2871. esd_config = &panel->esd_config;
  2872. esd_config->status_mode = ESD_MODE_MAX;
  2873. esd_config->esd_enabled = utils->read_bool(utils->data,
  2874. "qcom,esd-check-enabled");
  2875. if (!esd_config->esd_enabled)
  2876. return 0;
  2877. rc = utils->read_string(utils->data,
  2878. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2879. if (!rc) {
  2880. if (!strcmp(string, "bta_check")) {
  2881. esd_config->status_mode = ESD_MODE_SW_BTA;
  2882. } else if (!strcmp(string, "reg_read")) {
  2883. esd_config->status_mode = ESD_MODE_REG_READ;
  2884. } else if (!strcmp(string, "te_signal_check")) {
  2885. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2886. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2887. } else {
  2888. DSI_ERR("TE-ESD not valid for video mode\n");
  2889. rc = -EINVAL;
  2890. goto error;
  2891. }
  2892. } else {
  2893. DSI_ERR("No valid panel-status-check-mode string\n");
  2894. rc = -EINVAL;
  2895. goto error;
  2896. }
  2897. } else {
  2898. DSI_DEBUG("status check method not defined!\n");
  2899. rc = -EINVAL;
  2900. goto error;
  2901. }
  2902. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2903. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2904. if (rc) {
  2905. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2906. rc);
  2907. goto error;
  2908. }
  2909. esd_mode = "register_read";
  2910. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2911. esd_mode = "bta_trigger";
  2912. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2913. esd_mode = "te_check";
  2914. }
  2915. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2916. return 0;
  2917. error:
  2918. panel->esd_config.esd_enabled = false;
  2919. return rc;
  2920. }
  2921. static void dsi_panel_update_util(struct dsi_panel *panel,
  2922. struct device_node *parser_node)
  2923. {
  2924. struct dsi_parser_utils *utils = &panel->utils;
  2925. if (parser_node) {
  2926. *utils = *dsi_parser_get_parser_utils();
  2927. utils->data = parser_node;
  2928. DSI_DEBUG("switching to parser APIs\n");
  2929. goto end;
  2930. }
  2931. *utils = *dsi_parser_get_of_utils();
  2932. utils->data = panel->panel_of_node;
  2933. end:
  2934. utils->node = panel->panel_of_node;
  2935. }
  2936. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2937. {
  2938. return 0;
  2939. }
  2940. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2941. {
  2942. if (trusted_vm_env) {
  2943. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2944. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2945. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2946. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2947. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2948. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2949. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2950. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2951. } else {
  2952. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2953. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2954. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2955. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2956. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2957. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2958. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2959. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2960. }
  2961. }
  2962. struct dsi_panel *dsi_panel_get(struct device *parent,
  2963. struct device_node *of_node,
  2964. struct device_node *parser_node,
  2965. const char *type,
  2966. int topology_override,
  2967. bool trusted_vm_env)
  2968. {
  2969. struct dsi_panel *panel;
  2970. struct dsi_parser_utils *utils;
  2971. const char *panel_physical_type;
  2972. int rc = 0;
  2973. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2974. if (!panel)
  2975. return ERR_PTR(-ENOMEM);
  2976. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2977. panel->panel_of_node = of_node;
  2978. panel->parent = parent;
  2979. panel->type = type;
  2980. dsi_panel_update_util(panel, parser_node);
  2981. utils = &panel->utils;
  2982. panel->name = utils->get_property(utils->data,
  2983. "qcom,mdss-dsi-panel-name", NULL);
  2984. if (!panel->name)
  2985. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2986. /*
  2987. * Set panel type to LCD as default.
  2988. */
  2989. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2990. panel_physical_type = utils->get_property(utils->data,
  2991. "qcom,mdss-dsi-panel-physical-type", NULL);
  2992. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2993. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2994. rc = dsi_panel_parse_host_config(panel);
  2995. if (rc) {
  2996. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2997. rc);
  2998. goto error;
  2999. }
  3000. rc = dsi_panel_parse_panel_mode(panel);
  3001. if (rc) {
  3002. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3003. rc);
  3004. goto error;
  3005. }
  3006. rc = dsi_panel_parse_dfps_caps(panel);
  3007. if (rc)
  3008. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3009. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3010. if (rc)
  3011. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3012. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3013. if (rc)
  3014. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3015. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3016. if (rc)
  3017. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3018. rc = dsi_panel_parse_phy_props(panel);
  3019. if (rc) {
  3020. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3021. rc);
  3022. goto error;
  3023. }
  3024. rc = panel->panel_ops.parse_gpios(panel);
  3025. if (rc) {
  3026. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3027. goto error;
  3028. }
  3029. rc = dsi_panel_parse_tlmm_gpio(panel);
  3030. if (rc) {
  3031. DSI_ERR("failed to parse panel tlmm gpios, rc=%d\n", rc);
  3032. goto error;
  3033. }
  3034. rc = panel->panel_ops.parse_power_cfg(panel);
  3035. if (rc)
  3036. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3037. rc = dsi_panel_parse_bl_config(panel);
  3038. if (rc) {
  3039. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3040. if (rc == -EPROBE_DEFER)
  3041. goto error;
  3042. }
  3043. rc = dsi_panel_parse_misc_features(panel);
  3044. if (rc)
  3045. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3046. rc = dsi_panel_parse_hdr_config(panel);
  3047. if (rc)
  3048. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3049. rc = dsi_panel_get_mode_count(panel);
  3050. if (rc) {
  3051. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3052. goto error;
  3053. }
  3054. rc = dsi_panel_parse_dms_info(panel);
  3055. if (rc)
  3056. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3057. rc = dsi_panel_parse_esd_config(panel);
  3058. if (rc)
  3059. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3060. rc = dsi_panel_vreg_get(panel);
  3061. if (rc) {
  3062. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3063. panel->name, rc);
  3064. goto error;
  3065. }
  3066. panel->power_mode = SDE_MODE_DPMS_OFF;
  3067. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3068. NULL, DRM_MODE_CONNECTOR_DSI);
  3069. panel->mipi_device.dev.of_node = of_node;
  3070. drm_panel_add(&panel->drm_panel);
  3071. mutex_init(&panel->panel_lock);
  3072. return panel;
  3073. error:
  3074. kfree(panel);
  3075. return ERR_PTR(rc);
  3076. }
  3077. void dsi_panel_put(struct dsi_panel *panel)
  3078. {
  3079. drm_panel_remove(&panel->drm_panel);
  3080. /* free resources allocated for ESD check */
  3081. dsi_panel_esd_config_deinit(&panel->esd_config);
  3082. kfree(panel->avr_caps.avr_step_fps_list);
  3083. kfree(panel);
  3084. }
  3085. int dsi_panel_drv_init(struct dsi_panel *panel,
  3086. struct mipi_dsi_host *host)
  3087. {
  3088. int rc = 0;
  3089. struct mipi_dsi_device *dev;
  3090. if (!panel || !host) {
  3091. DSI_ERR("invalid params\n");
  3092. return -EINVAL;
  3093. }
  3094. mutex_lock(&panel->panel_lock);
  3095. dev = &panel->mipi_device;
  3096. dev->host = host;
  3097. /*
  3098. * We dont have device structure since panel is not a device node.
  3099. * When using drm panel framework, the device is probed when the host is
  3100. * create.
  3101. */
  3102. dev->channel = 0;
  3103. dev->lanes = 4;
  3104. panel->host = host;
  3105. rc = panel->panel_ops.pinctrl_init(panel);
  3106. if (rc) {
  3107. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3108. panel->name, rc);
  3109. goto exit;
  3110. }
  3111. rc = panel->panel_ops.gpio_request(panel);
  3112. if (rc) {
  3113. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3114. rc);
  3115. goto error_pinctrl_deinit;
  3116. }
  3117. rc = panel->panel_ops.bl_register(panel);
  3118. if (rc) {
  3119. if (rc != -EPROBE_DEFER)
  3120. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3121. panel->name, rc);
  3122. goto error_gpio_release;
  3123. }
  3124. goto exit;
  3125. error_gpio_release:
  3126. (void)dsi_panel_gpio_release(panel);
  3127. error_pinctrl_deinit:
  3128. (void)dsi_panel_pinctrl_deinit(panel);
  3129. exit:
  3130. mutex_unlock(&panel->panel_lock);
  3131. return rc;
  3132. }
  3133. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3134. {
  3135. int rc = 0;
  3136. if (!panel) {
  3137. DSI_ERR("invalid params\n");
  3138. return -EINVAL;
  3139. }
  3140. mutex_lock(&panel->panel_lock);
  3141. rc = panel->panel_ops.bl_unregister(panel);
  3142. if (rc)
  3143. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3144. panel->name, rc);
  3145. rc = panel->panel_ops.gpio_release(panel);
  3146. if (rc)
  3147. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3148. rc);
  3149. rc = panel->panel_ops.pinctrl_deinit(panel);
  3150. if (rc)
  3151. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3152. rc);
  3153. rc = dsi_panel_vreg_put(panel);
  3154. if (rc)
  3155. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3156. kfree(panel->tlmm_gpio);
  3157. panel->host = NULL;
  3158. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3159. mutex_unlock(&panel->panel_lock);
  3160. return rc;
  3161. }
  3162. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3163. struct dsi_display_mode *mode)
  3164. {
  3165. return 0;
  3166. }
  3167. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3168. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3169. {
  3170. const char *compression;
  3171. u32 *array = NULL, top_count, len, i;
  3172. int rc = -EINVAL;
  3173. bool dsc_enable = false;
  3174. *dsc_count = 0;
  3175. *lm_count = 0;
  3176. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3177. if (compression && !strcmp(compression, "dsc"))
  3178. dsc_enable = true;
  3179. len = utils->count_u32_elems(node, "qcom,display-topology");
  3180. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3181. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3182. return rc;
  3183. top_count = len / TOPOLOGY_SET_LEN;
  3184. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3185. if (!array)
  3186. return -ENOMEM;
  3187. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3188. if (rc) {
  3189. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3190. goto read_fail;
  3191. }
  3192. for (i = 0; i < top_count; i++) {
  3193. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3194. if (dsc_enable)
  3195. *dsc_count = max(*dsc_count,
  3196. array[i * TOPOLOGY_SET_LEN + 1]);
  3197. }
  3198. read_fail:
  3199. kfree(array);
  3200. return 0;
  3201. }
  3202. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3203. {
  3204. const u32 SINGLE_MODE_SUPPORT = 1;
  3205. struct dsi_parser_utils *utils;
  3206. struct device_node *timings_np, *child_np;
  3207. int num_dfps_rates;
  3208. int num_video_modes = 0, num_cmd_modes = 0;
  3209. int count, rc = 0;
  3210. u32 dsc_count = 0, lm_count = 0;
  3211. if (!panel) {
  3212. DSI_ERR("invalid params\n");
  3213. return -EINVAL;
  3214. }
  3215. utils = &panel->utils;
  3216. panel->num_timing_nodes = 0;
  3217. timings_np = utils->get_child_by_name(utils->data,
  3218. "qcom,mdss-dsi-display-timings");
  3219. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3220. DSI_ERR("no display timing nodes defined\n");
  3221. rc = -EINVAL;
  3222. goto error;
  3223. }
  3224. count = utils->get_child_count(timings_np);
  3225. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3226. count > DSI_MODE_MAX) {
  3227. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3228. rc = -EINVAL;
  3229. goto error;
  3230. }
  3231. /* No multiresolution support is available for video mode panels.
  3232. * Multi-mode is supported for video mode during POMS is enabled.
  3233. */
  3234. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3235. !panel->host_config.ext_bridge_mode &&
  3236. !panel->panel_mode_switch_enabled)
  3237. count = SINGLE_MODE_SUPPORT;
  3238. panel->num_timing_nodes = count;
  3239. dsi_for_each_child_node(timings_np, child_np) {
  3240. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3241. num_video_modes++;
  3242. else if (utils->read_bool(child_np,
  3243. "qcom,mdss-dsi-cmd-mode"))
  3244. num_cmd_modes++;
  3245. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3246. num_video_modes++;
  3247. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3248. num_cmd_modes++;
  3249. dsi_panel_get_max_res_count(utils, child_np,
  3250. &dsc_count, &lm_count);
  3251. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3252. panel->lm_count = max(lm_count, panel->lm_count);
  3253. }
  3254. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3255. panel->dfps_caps.dfps_list_len;
  3256. /*
  3257. * Inflate num_of_modes by fps in dfps.
  3258. * Single command mode for video mode panels supporting
  3259. * panel operating mode switch.
  3260. */
  3261. num_video_modes = num_video_modes * num_dfps_rates;
  3262. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3263. (panel->panel_mode_switch_enabled))
  3264. num_cmd_modes = 1;
  3265. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3266. error:
  3267. return rc;
  3268. }
  3269. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3270. struct dsi_panel_phy_props *phy_props)
  3271. {
  3272. int rc = 0;
  3273. if (!panel || !phy_props) {
  3274. DSI_ERR("invalid params\n");
  3275. return -EINVAL;
  3276. }
  3277. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3278. return rc;
  3279. }
  3280. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3281. struct dsi_dfps_capabilities *dfps_caps)
  3282. {
  3283. int rc = 0;
  3284. if (!panel || !dfps_caps) {
  3285. DSI_ERR("invalid params\n");
  3286. return -EINVAL;
  3287. }
  3288. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3289. return rc;
  3290. }
  3291. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3292. {
  3293. int i;
  3294. if (!mode->priv_info)
  3295. return;
  3296. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3297. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3298. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3299. }
  3300. kfree(mode->priv_info);
  3301. }
  3302. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3303. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3304. {
  3305. u32 frame_time_us, nslices;
  3306. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3307. dsi_transfer_time_us, pixel_clk_khz;
  3308. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3309. struct dsi_mode_info *timing = &mode->timing;
  3310. struct dsi_display_mode *display_mode;
  3311. u32 jitter_numer, jitter_denom, prefill_lines;
  3312. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3313. u16 bpp;
  3314. /* Packet overhead in bits,
  3315. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3316. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3317. * 1 byte dcs data command.
  3318. */
  3319. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3320. packet_overhead = 120;
  3321. else
  3322. packet_overhead = 56;
  3323. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3324. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3325. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3326. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3327. if (timing->refresh_rate >= 120)
  3328. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3329. if (timing->dsc_enabled) {
  3330. nslices = (timing->h_active)/(dsc->config.slice_width);
  3331. /* (slice width x bit-per-pixel + packet overhead) x
  3332. * number of slices x height x fps / lane
  3333. */
  3334. bpp = DSC_BPP(dsc->config);
  3335. bits_per_line = ((dsc->config.slice_width * bpp) +
  3336. packet_overhead) * nslices;
  3337. bits_per_line = bits_per_line / (config->num_data_lanes);
  3338. min_bitclk_hz = (bits_per_line * timing->v_active *
  3339. timing->refresh_rate);
  3340. } else {
  3341. total_active_pixels = ((dsi_h_active_dce(timing)
  3342. * timing->v_active));
  3343. /* calculate the actual bitclk needed to transfer the frame */
  3344. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3345. (config->bpp));
  3346. do_div(min_bitclk_hz, config->num_data_lanes);
  3347. }
  3348. timing->min_dsi_clk_hz = min_bitclk_hz;
  3349. /*
  3350. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3351. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3352. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3353. * threshold time are configured to 40us.
  3354. */
  3355. if (mode->priv_info->disable_rsc_solver) {
  3356. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3357. } else {
  3358. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3359. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3360. }
  3361. /*
  3362. * Increase the prefill_lines proportionately as recommended
  3363. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3364. */
  3365. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3366. timing->refresh_rate, 60);
  3367. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3368. (timing->v_active));
  3369. min_threshold_us = min_threshold_us + prefill_time_us;
  3370. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3371. if (timing->clk_rate_hz) {
  3372. /* adjust the transfer time proportionately for bit clk*/
  3373. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3374. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3375. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3376. } else if (mode->priv_info->mdp_transfer_time_us) {
  3377. max_transfer_us = frame_time_us - min_threshold_us;
  3378. mode->priv_info->mdp_transfer_time_us = min(
  3379. mode->priv_info->mdp_transfer_time_us,
  3380. max_transfer_us);
  3381. timing->dsi_transfer_time_us =
  3382. mode->priv_info->mdp_transfer_time_us;
  3383. } else {
  3384. if ((min_threshold_us > frame_threshold_us) ||
  3385. (mode->priv_info->disable_rsc_solver))
  3386. frame_threshold_us = min_threshold_us;
  3387. timing->dsi_transfer_time_us = frame_time_us -
  3388. frame_threshold_us;
  3389. }
  3390. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3391. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3392. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3393. timing->mdp_transfer_time_us =
  3394. mode->priv_info->mdp_transfer_time_us;
  3395. }
  3396. /* Calculate pclk_khz to update modeinfo */
  3397. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3398. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3399. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3400. do_div(pixel_clk_khz, config->bpp);
  3401. display_mode->pixel_clk_khz = pixel_clk_khz;
  3402. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3403. }
  3404. int dsi_panel_get_mode(struct dsi_panel *panel,
  3405. u32 index, struct dsi_display_mode *mode,
  3406. int topology_override)
  3407. {
  3408. struct device_node *timings_np, *child_np;
  3409. struct dsi_parser_utils *utils;
  3410. struct dsi_display_mode_priv_info *prv_info;
  3411. u32 child_idx = 0;
  3412. int rc = 0, num_timings;
  3413. int traffic_mode;
  3414. void *utils_data = NULL;
  3415. if (!panel || !mode) {
  3416. DSI_ERR("invalid params\n");
  3417. return -EINVAL;
  3418. }
  3419. mutex_lock(&panel->panel_lock);
  3420. utils = &panel->utils;
  3421. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3422. if (!mode->priv_info) {
  3423. rc = -ENOMEM;
  3424. goto done;
  3425. }
  3426. prv_info = mode->priv_info;
  3427. timings_np = utils->get_child_by_name(utils->data,
  3428. "qcom,mdss-dsi-display-timings");
  3429. if (!timings_np) {
  3430. DSI_ERR("no display timing nodes defined\n");
  3431. rc = -EINVAL;
  3432. goto parse_fail;
  3433. }
  3434. num_timings = utils->get_child_count(timings_np);
  3435. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3436. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3437. rc = -EINVAL;
  3438. goto parse_fail;
  3439. }
  3440. utils_data = utils->data;
  3441. traffic_mode = panel->video_config.traffic_mode;
  3442. dsi_for_each_child_node(timings_np, child_np) {
  3443. if (index != child_idx++)
  3444. continue;
  3445. utils->data = child_np;
  3446. if (panel->panel_mode_switch_enabled) {
  3447. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3448. mode->panel_mode_caps = panel->panel_mode;
  3449. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3450. child_idx);
  3451. }
  3452. } else {
  3453. mode->panel_mode_caps = panel->panel_mode;
  3454. }
  3455. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3456. if (rc)
  3457. mode->mode_idx = index;
  3458. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3459. if (rc) {
  3460. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3461. goto parse_fail;
  3462. }
  3463. if (panel->dyn_clk_caps.dyn_clk_support) {
  3464. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3465. if (rc)
  3466. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3467. }
  3468. rc = dsi_panel_parse_dsc_params(mode, utils);
  3469. if (rc) {
  3470. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3471. goto parse_fail;
  3472. }
  3473. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3474. if (rc) {
  3475. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3476. goto parse_fail;
  3477. }
  3478. rc = dsi_panel_parse_topology(prv_info, utils,
  3479. topology_override);
  3480. if (rc) {
  3481. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3482. goto parse_fail;
  3483. }
  3484. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3485. if (rc) {
  3486. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3487. goto parse_fail;
  3488. }
  3489. rc = dsi_panel_parse_jitter_config(mode, utils);
  3490. if (rc)
  3491. DSI_ERR(
  3492. "failed to parse panel jitter config, rc=%d\n", rc);
  3493. rc = dsi_panel_parse_phy_timing(mode, utils);
  3494. if (rc) {
  3495. DSI_ERR(
  3496. "failed to parse panel phy timings, rc=%d\n", rc);
  3497. goto parse_fail;
  3498. }
  3499. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3500. if (rc)
  3501. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3502. }
  3503. goto done;
  3504. parse_fail:
  3505. kfree(mode->priv_info);
  3506. mode->priv_info = NULL;
  3507. done:
  3508. utils->data = utils_data;
  3509. mutex_unlock(&panel->panel_lock);
  3510. return rc;
  3511. }
  3512. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3513. struct dsi_display_mode *mode,
  3514. struct dsi_host_config *config)
  3515. {
  3516. int rc = 0;
  3517. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3518. if (!panel || !mode || !config) {
  3519. DSI_ERR("invalid params\n");
  3520. return -EINVAL;
  3521. }
  3522. mutex_lock(&panel->panel_lock);
  3523. config->panel_mode = panel->panel_mode;
  3524. memcpy(&config->common_config, &panel->host_config,
  3525. sizeof(config->common_config));
  3526. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3527. memcpy(&config->u.video_engine, &panel->video_config,
  3528. sizeof(config->u.video_engine));
  3529. } else {
  3530. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3531. sizeof(config->u.cmd_engine));
  3532. }
  3533. memcpy(&config->video_timing, &mode->timing,
  3534. sizeof(config->video_timing));
  3535. config->video_timing.mdp_transfer_time_us =
  3536. mode->priv_info->mdp_transfer_time_us;
  3537. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3538. config->video_timing.dsc = &mode->priv_info->dsc;
  3539. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3540. config->video_timing.vdc = &mode->priv_info->vdc;
  3541. if (dyn_clk_caps->dyn_clk_support)
  3542. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3543. else
  3544. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3545. config->esc_clk_rate_hz = 19200000;
  3546. mutex_unlock(&panel->panel_lock);
  3547. return rc;
  3548. }
  3549. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3550. {
  3551. int rc = 0;
  3552. if (!panel) {
  3553. DSI_ERR("invalid params\n");
  3554. return -EINVAL;
  3555. }
  3556. mutex_lock(&panel->panel_lock);
  3557. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3558. if (panel->lp11_init)
  3559. goto error;
  3560. rc = dsi_panel_power_on(panel);
  3561. if (rc) {
  3562. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3563. goto error;
  3564. }
  3565. error:
  3566. mutex_unlock(&panel->panel_lock);
  3567. return rc;
  3568. }
  3569. int dsi_panel_update_pps(struct dsi_panel *panel)
  3570. {
  3571. int rc = 0;
  3572. struct dsi_panel_cmd_set *set = NULL;
  3573. struct dsi_display_mode_priv_info *priv_info = NULL;
  3574. if (!panel || !panel->cur_mode) {
  3575. DSI_ERR("invalid params\n");
  3576. return -EINVAL;
  3577. }
  3578. mutex_lock(&panel->panel_lock);
  3579. priv_info = panel->cur_mode->priv_info;
  3580. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3581. if (priv_info->dsc_enabled)
  3582. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3583. panel->dce_pps_cmd, 0,
  3584. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3585. else if (priv_info->vdc_enabled)
  3586. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3587. panel->dce_pps_cmd, 0,
  3588. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3589. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3590. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3591. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3592. if (rc) {
  3593. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3594. goto error;
  3595. }
  3596. }
  3597. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3598. if (rc) {
  3599. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3600. panel->name, rc);
  3601. }
  3602. dsi_panel_destroy_cmd_packets(set);
  3603. error:
  3604. mutex_unlock(&panel->panel_lock);
  3605. return rc;
  3606. }
  3607. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3608. {
  3609. int rc = 0;
  3610. if (!panel) {
  3611. DSI_ERR("invalid params\n");
  3612. return -EINVAL;
  3613. }
  3614. mutex_lock(&panel->panel_lock);
  3615. if (!panel->panel_initialized)
  3616. goto exit;
  3617. /*
  3618. * Consider LP1->LP2->LP1.
  3619. * If the panel is already in LP mode, do not need to
  3620. * set the regulator.
  3621. * IBB and AB power mode would be set at the same time
  3622. * in PMIC driver, so we only call ibb setting that is enough.
  3623. */
  3624. if (dsi_panel_is_type_oled(panel) &&
  3625. panel->power_mode != SDE_MODE_DPMS_LP2)
  3626. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3627. "ibb", REGULATOR_MODE_IDLE);
  3628. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3629. if (rc)
  3630. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3631. panel->name, rc);
  3632. exit:
  3633. mutex_unlock(&panel->panel_lock);
  3634. return rc;
  3635. }
  3636. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3637. {
  3638. int rc = 0;
  3639. if (!panel) {
  3640. DSI_ERR("invalid params\n");
  3641. return -EINVAL;
  3642. }
  3643. mutex_lock(&panel->panel_lock);
  3644. if (!panel->panel_initialized)
  3645. goto exit;
  3646. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3647. if (rc)
  3648. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3649. panel->name, rc);
  3650. exit:
  3651. mutex_unlock(&panel->panel_lock);
  3652. return rc;
  3653. }
  3654. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3655. {
  3656. int rc = 0;
  3657. if (!panel) {
  3658. DSI_ERR("invalid params\n");
  3659. return -EINVAL;
  3660. }
  3661. mutex_lock(&panel->panel_lock);
  3662. if (!panel->panel_initialized)
  3663. goto exit;
  3664. /*
  3665. * Consider about LP1->LP2->NOLP.
  3666. */
  3667. if (dsi_panel_is_type_oled(panel) &&
  3668. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3669. panel->power_mode == SDE_MODE_DPMS_LP2))
  3670. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3671. "ibb", REGULATOR_MODE_NORMAL);
  3672. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3673. if (rc)
  3674. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3675. panel->name, rc);
  3676. exit:
  3677. mutex_unlock(&panel->panel_lock);
  3678. return rc;
  3679. }
  3680. int dsi_panel_prepare(struct dsi_panel *panel)
  3681. {
  3682. int rc = 0;
  3683. if (!panel) {
  3684. DSI_ERR("invalid params\n");
  3685. return -EINVAL;
  3686. }
  3687. mutex_lock(&panel->panel_lock);
  3688. if (panel->lp11_init) {
  3689. rc = dsi_panel_power_on(panel);
  3690. if (rc) {
  3691. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3692. panel->name, rc);
  3693. goto error;
  3694. }
  3695. }
  3696. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3697. if (rc) {
  3698. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3699. panel->name, rc);
  3700. goto error;
  3701. }
  3702. error:
  3703. mutex_unlock(&panel->panel_lock);
  3704. return rc;
  3705. }
  3706. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3707. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3708. {
  3709. static const int ROI_CMD_LEN = 5;
  3710. int rc = 0;
  3711. /* DTYPE_DCS_LWRITE */
  3712. char *caset, *paset;
  3713. set->cmds = NULL;
  3714. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3715. if (!caset) {
  3716. rc = -ENOMEM;
  3717. goto exit;
  3718. }
  3719. caset[0] = 0x2a;
  3720. caset[1] = (roi->x & 0xFF00) >> 8;
  3721. caset[2] = roi->x & 0xFF;
  3722. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3723. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3724. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3725. if (!paset) {
  3726. rc = -ENOMEM;
  3727. goto error_free_mem;
  3728. }
  3729. paset[0] = 0x2b;
  3730. paset[1] = (roi->y & 0xFF00) >> 8;
  3731. paset[2] = roi->y & 0xFF;
  3732. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3733. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3734. set->type = DSI_CMD_SET_ROI;
  3735. set->state = DSI_CMD_SET_STATE_LP;
  3736. set->count = 2; /* send caset + paset together */
  3737. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3738. if (!set->cmds) {
  3739. rc = -ENOMEM;
  3740. goto error_free_mem;
  3741. }
  3742. set->cmds[0].msg.channel = 0;
  3743. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3744. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3745. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3746. set->cmds[0].msg.tx_buf = caset;
  3747. set->cmds[0].msg.rx_len = 0;
  3748. set->cmds[0].msg.rx_buf = 0;
  3749. set->cmds[0].last_command = 0;
  3750. set->cmds[0].post_wait_ms = 0;
  3751. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3752. set->cmds[1].msg.channel = 0;
  3753. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3754. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3755. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3756. set->cmds[1].msg.tx_buf = paset;
  3757. set->cmds[1].msg.rx_len = 0;
  3758. set->cmds[1].msg.rx_buf = 0;
  3759. set->cmds[1].last_command = 1;
  3760. set->cmds[1].post_wait_ms = 0;
  3761. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3762. goto exit;
  3763. error_free_mem:
  3764. kfree(caset);
  3765. kfree(paset);
  3766. kfree(set->cmds);
  3767. exit:
  3768. return rc;
  3769. }
  3770. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3771. int ctrl_idx)
  3772. {
  3773. int rc = 0;
  3774. if (!panel) {
  3775. DSI_ERR("invalid params\n");
  3776. return -EINVAL;
  3777. }
  3778. mutex_lock(&panel->panel_lock);
  3779. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3780. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3781. if (rc)
  3782. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3783. panel->name, rc);
  3784. mutex_unlock(&panel->panel_lock);
  3785. return rc;
  3786. }
  3787. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3788. int ctrl_idx)
  3789. {
  3790. int rc = 0;
  3791. if (!panel) {
  3792. DSI_ERR("invalid params\n");
  3793. return -EINVAL;
  3794. }
  3795. mutex_lock(&panel->panel_lock);
  3796. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3797. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3798. if (rc)
  3799. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3800. panel->name, rc);
  3801. mutex_unlock(&panel->panel_lock);
  3802. return rc;
  3803. }
  3804. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3805. struct dsi_rect *roi)
  3806. {
  3807. int rc = 0;
  3808. struct dsi_panel_cmd_set *set;
  3809. struct dsi_display_mode_priv_info *priv_info;
  3810. if (!panel || !panel->cur_mode) {
  3811. DSI_ERR("Invalid params\n");
  3812. return -EINVAL;
  3813. }
  3814. priv_info = panel->cur_mode->priv_info;
  3815. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3816. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3817. if (rc) {
  3818. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3819. panel->name, rc);
  3820. return rc;
  3821. }
  3822. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3823. roi->x, roi->y, roi->w, roi->h);
  3824. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3825. mutex_lock(&panel->panel_lock);
  3826. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3827. if (rc)
  3828. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3829. panel->name, rc);
  3830. mutex_unlock(&panel->panel_lock);
  3831. dsi_panel_destroy_cmd_packets(set);
  3832. dsi_panel_dealloc_cmd_packets(set);
  3833. return rc;
  3834. }
  3835. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3836. {
  3837. int rc = 0;
  3838. if (!panel) {
  3839. DSI_ERR("Invalid params\n");
  3840. return -EINVAL;
  3841. }
  3842. mutex_lock(&panel->panel_lock);
  3843. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3844. if (rc)
  3845. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3846. panel->name, rc);
  3847. mutex_unlock(&panel->panel_lock);
  3848. return rc;
  3849. }
  3850. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3851. {
  3852. int rc = 0;
  3853. if (!panel) {
  3854. DSI_ERR("Invalid params\n");
  3855. return -EINVAL;
  3856. }
  3857. mutex_lock(&panel->panel_lock);
  3858. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3859. if (rc)
  3860. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3861. panel->name, rc);
  3862. mutex_unlock(&panel->panel_lock);
  3863. return rc;
  3864. }
  3865. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3866. {
  3867. int rc = 0;
  3868. if (!panel) {
  3869. DSI_ERR("Invalid params\n");
  3870. return -EINVAL;
  3871. }
  3872. mutex_lock(&panel->panel_lock);
  3873. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3874. if (rc)
  3875. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3876. panel->name, rc);
  3877. mutex_unlock(&panel->panel_lock);
  3878. return rc;
  3879. }
  3880. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3881. {
  3882. int rc = 0;
  3883. if (!panel) {
  3884. DSI_ERR("Invalid params\n");
  3885. return -EINVAL;
  3886. }
  3887. mutex_lock(&panel->panel_lock);
  3888. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3889. if (rc)
  3890. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3891. panel->name, rc);
  3892. mutex_unlock(&panel->panel_lock);
  3893. return rc;
  3894. }
  3895. int dsi_panel_switch(struct dsi_panel *panel)
  3896. {
  3897. int rc = 0;
  3898. if (!panel) {
  3899. DSI_ERR("Invalid params\n");
  3900. return -EINVAL;
  3901. }
  3902. mutex_lock(&panel->panel_lock);
  3903. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3904. if (rc)
  3905. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3906. panel->name, rc);
  3907. mutex_unlock(&panel->panel_lock);
  3908. return rc;
  3909. }
  3910. int dsi_panel_post_switch(struct dsi_panel *panel)
  3911. {
  3912. int rc = 0;
  3913. if (!panel) {
  3914. DSI_ERR("Invalid params\n");
  3915. return -EINVAL;
  3916. }
  3917. mutex_lock(&panel->panel_lock);
  3918. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3919. if (rc)
  3920. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3921. panel->name, rc);
  3922. mutex_unlock(&panel->panel_lock);
  3923. return rc;
  3924. }
  3925. int dsi_panel_enable(struct dsi_panel *panel)
  3926. {
  3927. int rc = 0;
  3928. if (!panel) {
  3929. DSI_ERR("Invalid params\n");
  3930. return -EINVAL;
  3931. }
  3932. mutex_lock(&panel->panel_lock);
  3933. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3934. if (rc) {
  3935. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3936. panel->name, rc);
  3937. goto error;
  3938. }
  3939. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3940. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3941. if (rc) {
  3942. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3943. panel->name, rc);
  3944. goto error;
  3945. }
  3946. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3947. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3948. if (rc) {
  3949. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3950. panel->name, rc);
  3951. goto error;
  3952. }
  3953. }
  3954. panel->panel_initialized = true;
  3955. error:
  3956. mutex_unlock(&panel->panel_lock);
  3957. return rc;
  3958. }
  3959. int dsi_panel_post_enable(struct dsi_panel *panel)
  3960. {
  3961. int rc = 0;
  3962. if (!panel) {
  3963. DSI_ERR("invalid params\n");
  3964. return -EINVAL;
  3965. }
  3966. mutex_lock(&panel->panel_lock);
  3967. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3968. if (rc) {
  3969. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3970. panel->name, rc);
  3971. goto error;
  3972. }
  3973. error:
  3974. mutex_unlock(&panel->panel_lock);
  3975. return rc;
  3976. }
  3977. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3978. {
  3979. int rc = 0;
  3980. if (!panel) {
  3981. DSI_ERR("invalid params\n");
  3982. return -EINVAL;
  3983. }
  3984. mutex_lock(&panel->panel_lock);
  3985. if (gpio_is_valid(panel->bl_config.en_gpio))
  3986. gpio_set_value(panel->bl_config.en_gpio, 0);
  3987. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3988. if (rc) {
  3989. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3990. panel->name, rc);
  3991. goto error;
  3992. }
  3993. error:
  3994. mutex_unlock(&panel->panel_lock);
  3995. return rc;
  3996. }
  3997. int dsi_panel_disable(struct dsi_panel *panel)
  3998. {
  3999. int rc = 0;
  4000. if (!panel) {
  4001. DSI_ERR("invalid params\n");
  4002. return -EINVAL;
  4003. }
  4004. mutex_lock(&panel->panel_lock);
  4005. /* Avoid sending panel off commands when ESD recovery is underway */
  4006. if (!atomic_read(&panel->esd_recovery_pending)) {
  4007. /*
  4008. * Need to set IBB/AB regulator mode to STANDBY,
  4009. * if panel is going off from AOD mode.
  4010. */
  4011. if (dsi_panel_is_type_oled(panel) &&
  4012. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4013. panel->power_mode == SDE_MODE_DPMS_LP2))
  4014. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4015. "ibb", REGULATOR_MODE_STANDBY);
  4016. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4017. if (rc) {
  4018. /*
  4019. * Sending panel off commands may fail when DSI
  4020. * controller is in a bad state. These failures can be
  4021. * ignored since controller will go for full reset on
  4022. * subsequent display enable anyway.
  4023. */
  4024. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4025. panel->name, rc);
  4026. rc = 0;
  4027. }
  4028. }
  4029. panel->panel_initialized = false;
  4030. panel->power_mode = SDE_MODE_DPMS_OFF;
  4031. mutex_unlock(&panel->panel_lock);
  4032. return rc;
  4033. }
  4034. int dsi_panel_unprepare(struct dsi_panel *panel)
  4035. {
  4036. int rc = 0;
  4037. if (!panel) {
  4038. DSI_ERR("invalid params\n");
  4039. return -EINVAL;
  4040. }
  4041. mutex_lock(&panel->panel_lock);
  4042. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4043. if (rc) {
  4044. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4045. panel->name, rc);
  4046. goto error;
  4047. }
  4048. error:
  4049. mutex_unlock(&panel->panel_lock);
  4050. return rc;
  4051. }
  4052. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4053. {
  4054. int rc = 0;
  4055. if (!panel) {
  4056. DSI_ERR("invalid params\n");
  4057. return -EINVAL;
  4058. }
  4059. mutex_lock(&panel->panel_lock);
  4060. rc = dsi_panel_power_off(panel);
  4061. if (rc) {
  4062. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4063. panel->name, rc);
  4064. goto error;
  4065. }
  4066. error:
  4067. mutex_unlock(&panel->panel_lock);
  4068. return rc;
  4069. }