qmi.c 91 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  28. #ifdef CONFIG_CNSS2_DEBUG
  29. #define QDSS_DEBUG_FILE_STR "debug_"
  30. #else
  31. #define QDSS_DEBUG_FILE_STR ""
  32. #endif
  33. #define HW_V1_NUMBER "v1"
  34. #define HW_V2_NUMBER "v2"
  35. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  36. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  37. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  38. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  39. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  40. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  41. #define DMS_QMI_MAX_MSG_LEN SZ_256
  42. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  43. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  44. #ifdef CONFIG_CNSS2_DEBUG
  45. static bool ignore_qmi_failure;
  46. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  47. void cnss_ignore_qmi_failure(bool ignore)
  48. {
  49. ignore_qmi_failure = ignore;
  50. }
  51. #else
  52. #define CNSS_QMI_ASSERT() do { } while (0)
  53. void cnss_ignore_qmi_failure(bool ignore) { }
  54. #endif
  55. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  56. {
  57. switch (mode) {
  58. case CNSS_MISSION:
  59. return "MISSION";
  60. case CNSS_FTM:
  61. return "FTM";
  62. case CNSS_EPPING:
  63. return "EPPING";
  64. case CNSS_WALTEST:
  65. return "WALTEST";
  66. case CNSS_OFF:
  67. return "OFF";
  68. case CNSS_CCPM:
  69. return "CCPM";
  70. case CNSS_QVIT:
  71. return "QVIT";
  72. case CNSS_CALIBRATION:
  73. return "CALIBRATION";
  74. default:
  75. return "UNKNOWN";
  76. }
  77. };
  78. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  79. {
  80. struct wlfw_ind_register_req_msg_v01 *req;
  81. struct wlfw_ind_register_resp_msg_v01 *resp;
  82. struct qmi_txn txn;
  83. int ret = 0;
  84. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  85. plat_priv->driver_state);
  86. req = kzalloc(sizeof(*req), GFP_KERNEL);
  87. if (!req)
  88. return -ENOMEM;
  89. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  90. if (!resp) {
  91. kfree(req);
  92. return -ENOMEM;
  93. }
  94. req->client_id_valid = 1;
  95. req->client_id = WLFW_CLIENT_ID;
  96. req->request_mem_enable_valid = 1;
  97. req->request_mem_enable = 1;
  98. req->fw_mem_ready_enable_valid = 1;
  99. req->fw_mem_ready_enable = 1;
  100. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  101. req->fw_init_done_enable_valid = 1;
  102. req->fw_init_done_enable = 1;
  103. req->pin_connect_result_enable_valid = 1;
  104. req->pin_connect_result_enable = 1;
  105. req->cal_done_enable_valid = 1;
  106. req->cal_done_enable = 1;
  107. req->qdss_trace_req_mem_enable_valid = 1;
  108. req->qdss_trace_req_mem_enable = 1;
  109. req->qdss_trace_save_enable_valid = 1;
  110. req->qdss_trace_save_enable = 1;
  111. req->qdss_trace_free_enable_valid = 1;
  112. req->qdss_trace_free_enable = 1;
  113. req->respond_get_info_enable_valid = 1;
  114. req->respond_get_info_enable = 1;
  115. req->wfc_call_twt_config_enable_valid = 1;
  116. req->wfc_call_twt_config_enable = 1;
  117. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  118. wlfw_ind_register_resp_msg_v01_ei, resp);
  119. if (ret < 0) {
  120. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  121. ret);
  122. goto out;
  123. }
  124. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  125. QMI_WLFW_IND_REGISTER_REQ_V01,
  126. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  127. wlfw_ind_register_req_msg_v01_ei, req);
  128. if (ret < 0) {
  129. qmi_txn_cancel(&txn);
  130. cnss_pr_err("Failed to send indication register request, err: %d\n",
  131. ret);
  132. goto out;
  133. }
  134. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  135. if (ret < 0) {
  136. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  137. ret);
  138. goto out;
  139. }
  140. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  141. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  142. resp->resp.result, resp->resp.error);
  143. ret = -resp->resp.result;
  144. goto out;
  145. }
  146. if (resp->fw_status_valid) {
  147. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  148. ret = -EALREADY;
  149. goto qmi_registered;
  150. }
  151. }
  152. kfree(req);
  153. kfree(resp);
  154. return 0;
  155. out:
  156. CNSS_QMI_ASSERT();
  157. qmi_registered:
  158. kfree(req);
  159. kfree(resp);
  160. return ret;
  161. }
  162. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  163. struct wlfw_host_cap_req_msg_v01 *req)
  164. {
  165. if (plat_priv->device_id == KIWI_DEVICE_ID) {
  166. req->mlo_capable_valid = 1;
  167. req->mlo_capable = 1;
  168. req->mlo_chip_id_valid = 1;
  169. req->mlo_chip_id = 0;
  170. req->mlo_group_id_valid = 1;
  171. req->mlo_group_id = 0;
  172. req->max_mlo_peer_valid = 1;
  173. /* Max peer number generally won't change for the same device
  174. * but needs to be synced with host driver.
  175. */
  176. req->max_mlo_peer = 32;
  177. req->mlo_num_chips_valid = 1;
  178. req->mlo_num_chips = 1;
  179. req->mlo_chip_info_valid = 1;
  180. req->mlo_chip_info[0].chip_id = 0;
  181. req->mlo_chip_info[0].num_local_links = 2;
  182. req->mlo_chip_info[0].hw_link_id[0] = 0;
  183. req->mlo_chip_info[0].hw_link_id[1] = 1;
  184. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  185. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  186. }
  187. }
  188. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  189. {
  190. struct wlfw_host_cap_req_msg_v01 *req;
  191. struct wlfw_host_cap_resp_msg_v01 *resp;
  192. struct qmi_txn txn;
  193. int ret = 0;
  194. u64 iova_start = 0, iova_size = 0,
  195. iova_ipa_start = 0, iova_ipa_size = 0;
  196. u64 feature_list = 0;
  197. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  198. plat_priv->driver_state);
  199. req = kzalloc(sizeof(*req), GFP_KERNEL);
  200. if (!req)
  201. return -ENOMEM;
  202. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  203. if (!resp) {
  204. kfree(req);
  205. return -ENOMEM;
  206. }
  207. req->num_clients_valid = 1;
  208. req->num_clients = 1;
  209. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  210. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  211. if (req->wake_msi) {
  212. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  213. req->wake_msi_valid = 1;
  214. }
  215. req->bdf_support_valid = 1;
  216. req->bdf_support = 1;
  217. req->m3_support_valid = 1;
  218. req->m3_support = 1;
  219. req->m3_cache_support_valid = 1;
  220. req->m3_cache_support = 1;
  221. req->cal_done_valid = 1;
  222. req->cal_done = plat_priv->cal_done;
  223. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  224. if (!cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  225. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  226. &iova_ipa_size)) {
  227. req->ddr_range_valid = 1;
  228. req->ddr_range[0].start = iova_start;
  229. req->ddr_range[0].size = iova_size + iova_ipa_size;
  230. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  231. req->ddr_range[0].start, req->ddr_range[0].size);
  232. }
  233. req->host_build_type_valid = 1;
  234. req->host_build_type = cnss_get_host_build_type();
  235. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  236. ret = cnss_get_feature_list(plat_priv, &feature_list);
  237. if (!ret) {
  238. req->feature_list_valid = 1;
  239. req->feature_list = feature_list;
  240. cnss_pr_dbg("Sending feature list 0x%llx\n",
  241. req->feature_list);
  242. }
  243. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  244. wlfw_host_cap_resp_msg_v01_ei, resp);
  245. if (ret < 0) {
  246. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  247. ret);
  248. goto out;
  249. }
  250. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  251. QMI_WLFW_HOST_CAP_REQ_V01,
  252. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  253. wlfw_host_cap_req_msg_v01_ei, req);
  254. if (ret < 0) {
  255. qmi_txn_cancel(&txn);
  256. cnss_pr_err("Failed to send host capability request, err: %d\n",
  257. ret);
  258. goto out;
  259. }
  260. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  261. if (ret < 0) {
  262. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  263. ret);
  264. goto out;
  265. }
  266. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  267. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  268. resp->resp.result, resp->resp.error);
  269. ret = -resp->resp.result;
  270. goto out;
  271. }
  272. kfree(req);
  273. kfree(resp);
  274. return 0;
  275. out:
  276. CNSS_QMI_ASSERT();
  277. kfree(req);
  278. kfree(resp);
  279. return ret;
  280. }
  281. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  282. {
  283. struct wlfw_respond_mem_req_msg_v01 *req;
  284. struct wlfw_respond_mem_resp_msg_v01 *resp;
  285. struct qmi_txn txn;
  286. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  287. int ret = 0, i;
  288. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  289. plat_priv->driver_state);
  290. req = kzalloc(sizeof(*req), GFP_KERNEL);
  291. if (!req)
  292. return -ENOMEM;
  293. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  294. if (!resp) {
  295. kfree(req);
  296. return -ENOMEM;
  297. }
  298. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  299. for (i = 0; i < req->mem_seg_len; i++) {
  300. if (!fw_mem[i].pa || !fw_mem[i].size) {
  301. if (fw_mem[i].type == 0) {
  302. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  303. i);
  304. ret = -EINVAL;
  305. goto out;
  306. }
  307. cnss_pr_err("Memory for FW is not available for type: %u\n",
  308. fw_mem[i].type);
  309. ret = -ENOMEM;
  310. goto out;
  311. }
  312. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  313. fw_mem[i].va, &fw_mem[i].pa,
  314. fw_mem[i].size, fw_mem[i].type);
  315. req->mem_seg[i].addr = fw_mem[i].pa;
  316. req->mem_seg[i].size = fw_mem[i].size;
  317. req->mem_seg[i].type = fw_mem[i].type;
  318. }
  319. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  320. wlfw_respond_mem_resp_msg_v01_ei, resp);
  321. if (ret < 0) {
  322. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  323. ret);
  324. goto out;
  325. }
  326. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  327. QMI_WLFW_RESPOND_MEM_REQ_V01,
  328. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  329. wlfw_respond_mem_req_msg_v01_ei, req);
  330. if (ret < 0) {
  331. qmi_txn_cancel(&txn);
  332. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  333. ret);
  334. goto out;
  335. }
  336. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  337. if (ret < 0) {
  338. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  339. ret);
  340. goto out;
  341. }
  342. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  343. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  344. resp->resp.result, resp->resp.error);
  345. ret = -resp->resp.result;
  346. goto out;
  347. }
  348. kfree(req);
  349. kfree(resp);
  350. return 0;
  351. out:
  352. CNSS_QMI_ASSERT();
  353. kfree(req);
  354. kfree(resp);
  355. return ret;
  356. }
  357. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  358. {
  359. struct wlfw_cap_req_msg_v01 *req;
  360. struct wlfw_cap_resp_msg_v01 *resp;
  361. struct qmi_txn txn;
  362. char *fw_build_timestamp;
  363. int ret = 0, i;
  364. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  365. plat_priv->driver_state);
  366. req = kzalloc(sizeof(*req), GFP_KERNEL);
  367. if (!req)
  368. return -ENOMEM;
  369. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  370. if (!resp) {
  371. kfree(req);
  372. return -ENOMEM;
  373. }
  374. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  375. wlfw_cap_resp_msg_v01_ei, resp);
  376. if (ret < 0) {
  377. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  378. ret);
  379. goto out;
  380. }
  381. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  382. QMI_WLFW_CAP_REQ_V01,
  383. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  384. wlfw_cap_req_msg_v01_ei, req);
  385. if (ret < 0) {
  386. qmi_txn_cancel(&txn);
  387. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  388. ret);
  389. goto out;
  390. }
  391. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  392. if (ret < 0) {
  393. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  394. ret);
  395. goto out;
  396. }
  397. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  398. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  399. resp->resp.result, resp->resp.error);
  400. ret = -resp->resp.result;
  401. goto out;
  402. }
  403. if (resp->chip_info_valid) {
  404. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  405. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  406. }
  407. if (resp->board_info_valid)
  408. plat_priv->board_info.board_id = resp->board_info.board_id;
  409. else
  410. plat_priv->board_info.board_id = 0xFF;
  411. if (resp->soc_info_valid)
  412. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  413. if (resp->fw_version_info_valid) {
  414. plat_priv->fw_version_info.fw_version =
  415. resp->fw_version_info.fw_version;
  416. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  417. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  418. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  419. resp->fw_version_info.fw_build_timestamp,
  420. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  421. }
  422. if (resp->fw_build_id_valid) {
  423. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  424. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  425. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  426. }
  427. if (resp->voltage_mv_valid) {
  428. plat_priv->cpr_info.voltage = resp->voltage_mv;
  429. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  430. plat_priv->cpr_info.voltage);
  431. cnss_update_cpr_info(plat_priv);
  432. }
  433. if (resp->time_freq_hz_valid) {
  434. plat_priv->device_freq_hz = resp->time_freq_hz;
  435. cnss_pr_dbg("Device frequency is %d HZ\n",
  436. plat_priv->device_freq_hz);
  437. }
  438. if (resp->otp_version_valid)
  439. plat_priv->otp_version = resp->otp_version;
  440. if (resp->dev_mem_info_valid) {
  441. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  442. plat_priv->dev_mem_info[i].start =
  443. resp->dev_mem_info[i].start;
  444. plat_priv->dev_mem_info[i].size =
  445. resp->dev_mem_info[i].size;
  446. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  447. i, plat_priv->dev_mem_info[i].start,
  448. plat_priv->dev_mem_info[i].size);
  449. }
  450. }
  451. if (resp->fw_caps_valid)
  452. plat_priv->fw_pcie_gen_switch =
  453. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  454. if (resp->hang_data_length_valid &&
  455. resp->hang_data_length &&
  456. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  457. plat_priv->hang_event_data_len = resp->hang_data_length;
  458. else
  459. plat_priv->hang_event_data_len = 0;
  460. if (resp->hang_data_addr_offset_valid)
  461. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  462. else
  463. plat_priv->hang_data_addr_offset = 0;
  464. if (resp->ol_cpr_cfg_valid)
  465. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  466. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  467. plat_priv->chip_info.chip_id,
  468. plat_priv->chip_info.chip_family,
  469. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  470. plat_priv->otp_version);
  471. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s\n",
  472. plat_priv->fw_version_info.fw_version,
  473. plat_priv->fw_version_info.fw_build_timestamp,
  474. plat_priv->fw_build_id);
  475. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  476. plat_priv->hang_event_data_len,
  477. plat_priv->hang_data_addr_offset);
  478. kfree(req);
  479. kfree(resp);
  480. return 0;
  481. out:
  482. CNSS_QMI_ASSERT();
  483. kfree(req);
  484. kfree(resp);
  485. return ret;
  486. }
  487. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  488. u32 bdf_type, char *filename,
  489. u32 filename_len)
  490. {
  491. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  492. int ret = 0;
  493. switch (bdf_type) {
  494. case CNSS_BDF_ELF:
  495. /* Board ID will be equal or less than 0xFF in GF mask case */
  496. if (plat_priv->board_info.board_id == 0xFF) {
  497. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  498. snprintf(filename_tmp, filename_len,
  499. ELF_BDF_FILE_NAME_GF);
  500. else
  501. snprintf(filename_tmp, filename_len,
  502. ELF_BDF_FILE_NAME);
  503. } else if (plat_priv->board_info.board_id < 0xFF) {
  504. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  505. snprintf(filename_tmp, filename_len,
  506. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  507. plat_priv->board_info.board_id);
  508. else
  509. snprintf(filename_tmp, filename_len,
  510. ELF_BDF_FILE_NAME_PREFIX "%02x",
  511. plat_priv->board_info.board_id);
  512. } else {
  513. snprintf(filename_tmp, filename_len,
  514. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  515. plat_priv->board_info.board_id >> 8 & 0xFF,
  516. plat_priv->board_info.board_id & 0xFF);
  517. }
  518. break;
  519. case CNSS_BDF_BIN:
  520. if (plat_priv->board_info.board_id == 0xFF) {
  521. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  522. snprintf(filename_tmp, filename_len,
  523. BIN_BDF_FILE_NAME_GF);
  524. else
  525. snprintf(filename_tmp, filename_len,
  526. BIN_BDF_FILE_NAME);
  527. } else if (plat_priv->board_info.board_id < 0xFF) {
  528. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  529. snprintf(filename_tmp, filename_len,
  530. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  531. plat_priv->board_info.board_id);
  532. else
  533. snprintf(filename_tmp, filename_len,
  534. BIN_BDF_FILE_NAME_PREFIX "%02x",
  535. plat_priv->board_info.board_id);
  536. } else {
  537. snprintf(filename_tmp, filename_len,
  538. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  539. plat_priv->board_info.board_id >> 8 & 0xFF,
  540. plat_priv->board_info.board_id & 0xFF);
  541. }
  542. break;
  543. case CNSS_BDF_REGDB:
  544. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  545. break;
  546. case CNSS_BDF_HDS:
  547. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  548. break;
  549. default:
  550. cnss_pr_err("Invalid BDF type: %d\n",
  551. plat_priv->ctrl_params.bdf_type);
  552. ret = -EINVAL;
  553. break;
  554. }
  555. if (!ret)
  556. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  557. return ret;
  558. }
  559. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  560. u32 bdf_type)
  561. {
  562. struct wlfw_bdf_download_req_msg_v01 *req;
  563. struct wlfw_bdf_download_resp_msg_v01 *resp;
  564. struct qmi_txn txn;
  565. char filename[MAX_FIRMWARE_NAME_LEN];
  566. const struct firmware *fw_entry = NULL;
  567. const u8 *temp;
  568. unsigned int remaining;
  569. int ret = 0;
  570. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  571. plat_priv->driver_state, bdf_type);
  572. req = kzalloc(sizeof(*req), GFP_KERNEL);
  573. if (!req)
  574. return -ENOMEM;
  575. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  576. if (!resp) {
  577. kfree(req);
  578. return -ENOMEM;
  579. }
  580. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  581. filename, sizeof(filename));
  582. if (ret)
  583. goto err_req_fw;
  584. if (bdf_type == CNSS_BDF_REGDB)
  585. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  586. filename);
  587. else
  588. ret = firmware_request_nowarn(&fw_entry, filename,
  589. &plat_priv->plat_dev->dev);
  590. if (ret) {
  591. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  592. goto err_req_fw;
  593. }
  594. temp = fw_entry->data;
  595. remaining = fw_entry->size;
  596. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  597. while (remaining) {
  598. req->valid = 1;
  599. req->file_id_valid = 1;
  600. req->file_id = plat_priv->board_info.board_id;
  601. req->total_size_valid = 1;
  602. req->total_size = remaining;
  603. req->seg_id_valid = 1;
  604. req->data_valid = 1;
  605. req->end_valid = 1;
  606. req->bdf_type_valid = 1;
  607. req->bdf_type = bdf_type;
  608. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  609. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  610. } else {
  611. req->data_len = remaining;
  612. req->end = 1;
  613. }
  614. memcpy(req->data, temp, req->data_len);
  615. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  616. wlfw_bdf_download_resp_msg_v01_ei, resp);
  617. if (ret < 0) {
  618. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  619. ret);
  620. goto err_send;
  621. }
  622. ret = qmi_send_request
  623. (&plat_priv->qmi_wlfw, NULL, &txn,
  624. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  625. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  626. wlfw_bdf_download_req_msg_v01_ei, req);
  627. if (ret < 0) {
  628. qmi_txn_cancel(&txn);
  629. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  630. ret);
  631. goto err_send;
  632. }
  633. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  634. if (ret < 0) {
  635. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  636. ret);
  637. goto err_send;
  638. }
  639. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  640. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  641. resp->resp.result, resp->resp.error);
  642. ret = -resp->resp.result;
  643. goto err_send;
  644. }
  645. remaining -= req->data_len;
  646. temp += req->data_len;
  647. req->seg_id++;
  648. }
  649. release_firmware(fw_entry);
  650. if (resp->host_bdf_data_valid) {
  651. /* QCA6490 enable S3E regulator for IPA configuration only */
  652. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  653. cnss_enable_int_pow_amp_vreg(plat_priv);
  654. plat_priv->cbc_file_download =
  655. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  656. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  657. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  658. plat_priv->cbc_file_download);
  659. }
  660. kfree(req);
  661. kfree(resp);
  662. return 0;
  663. err_send:
  664. release_firmware(fw_entry);
  665. err_req_fw:
  666. if (!(bdf_type == CNSS_BDF_REGDB ||
  667. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  668. ret == -EAGAIN))
  669. CNSS_QMI_ASSERT();
  670. kfree(req);
  671. kfree(resp);
  672. return ret;
  673. }
  674. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  675. {
  676. struct wlfw_m3_info_req_msg_v01 *req;
  677. struct wlfw_m3_info_resp_msg_v01 *resp;
  678. struct qmi_txn txn;
  679. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  680. int ret = 0;
  681. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  682. plat_priv->driver_state);
  683. req = kzalloc(sizeof(*req), GFP_KERNEL);
  684. if (!req)
  685. return -ENOMEM;
  686. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  687. if (!resp) {
  688. kfree(req);
  689. return -ENOMEM;
  690. }
  691. if (!m3_mem->pa || !m3_mem->size) {
  692. cnss_pr_err("Memory for M3 is not available\n");
  693. ret = -ENOMEM;
  694. goto out;
  695. }
  696. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  697. m3_mem->va, &m3_mem->pa, m3_mem->size);
  698. req->addr = plat_priv->m3_mem.pa;
  699. req->size = plat_priv->m3_mem.size;
  700. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  701. wlfw_m3_info_resp_msg_v01_ei, resp);
  702. if (ret < 0) {
  703. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  704. ret);
  705. goto out;
  706. }
  707. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  708. QMI_WLFW_M3_INFO_REQ_V01,
  709. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  710. wlfw_m3_info_req_msg_v01_ei, req);
  711. if (ret < 0) {
  712. qmi_txn_cancel(&txn);
  713. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  714. ret);
  715. goto out;
  716. }
  717. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  718. if (ret < 0) {
  719. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  720. ret);
  721. goto out;
  722. }
  723. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  724. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  725. resp->resp.result, resp->resp.error);
  726. ret = -resp->resp.result;
  727. goto out;
  728. }
  729. kfree(req);
  730. kfree(resp);
  731. return 0;
  732. out:
  733. CNSS_QMI_ASSERT();
  734. kfree(req);
  735. kfree(resp);
  736. return ret;
  737. }
  738. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  739. u8 *mac, u32 mac_len)
  740. {
  741. struct wlfw_mac_addr_req_msg_v01 req;
  742. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  743. struct qmi_txn txn;
  744. int ret;
  745. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  746. return -EINVAL;
  747. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  748. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  749. if (ret < 0) {
  750. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  751. ret);
  752. ret = -EIO;
  753. goto out;
  754. }
  755. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  756. mac, plat_priv->driver_state);
  757. memcpy(req.mac_addr, mac, mac_len);
  758. req.mac_addr_valid = 1;
  759. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  760. QMI_WLFW_MAC_ADDR_REQ_V01,
  761. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  762. wlfw_mac_addr_req_msg_v01_ei, &req);
  763. if (ret < 0) {
  764. qmi_txn_cancel(&txn);
  765. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  766. ret = -EIO;
  767. goto out;
  768. }
  769. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  770. if (ret < 0) {
  771. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  772. ret);
  773. ret = -EIO;
  774. goto out;
  775. }
  776. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  777. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  778. resp.resp.result);
  779. ret = -resp.resp.result;
  780. }
  781. out:
  782. return ret;
  783. }
  784. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  785. u32 total_size)
  786. {
  787. int ret = 0;
  788. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  789. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  790. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  791. unsigned int remaining;
  792. struct qmi_txn txn;
  793. cnss_pr_dbg("%s\n", __func__);
  794. req = kzalloc(sizeof(*req), GFP_KERNEL);
  795. if (!req)
  796. return -ENOMEM;
  797. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  798. if (!resp) {
  799. kfree(req);
  800. return -ENOMEM;
  801. }
  802. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  803. if (!p_qdss_trace_data) {
  804. ret = ENOMEM;
  805. goto end;
  806. }
  807. remaining = total_size;
  808. p_qdss_trace_data_temp = p_qdss_trace_data;
  809. while (remaining && resp->end == 0) {
  810. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  811. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  812. if (ret < 0) {
  813. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  814. ret);
  815. goto fail;
  816. }
  817. ret = qmi_send_request
  818. (&plat_priv->qmi_wlfw, NULL, &txn,
  819. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  820. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  821. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  822. if (ret < 0) {
  823. qmi_txn_cancel(&txn);
  824. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  825. ret);
  826. goto fail;
  827. }
  828. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  829. if (ret < 0) {
  830. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  831. ret);
  832. goto fail;
  833. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  834. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  835. resp->resp.result, resp->resp.error);
  836. ret = -resp->resp.result;
  837. goto fail;
  838. } else {
  839. ret = 0;
  840. }
  841. cnss_pr_dbg("%s: response total size %d data len %d",
  842. __func__, resp->total_size, resp->data_len);
  843. if ((resp->total_size_valid == 1 &&
  844. resp->total_size == total_size) &&
  845. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  846. (resp->data_valid == 1 &&
  847. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  848. memcpy(p_qdss_trace_data_temp,
  849. resp->data, resp->data_len);
  850. } else {
  851. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  852. __func__,
  853. total_size, req->seg_id,
  854. resp->total_size_valid,
  855. resp->total_size,
  856. resp->seg_id_valid,
  857. resp->seg_id,
  858. resp->data_valid,
  859. resp->data_len);
  860. ret = -1;
  861. goto fail;
  862. }
  863. remaining -= resp->data_len;
  864. p_qdss_trace_data_temp += resp->data_len;
  865. req->seg_id++;
  866. }
  867. if (remaining == 0 && (resp->end_valid && resp->end)) {
  868. ret = cnss_genl_send_msg(p_qdss_trace_data,
  869. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  870. total_size);
  871. if (ret < 0) {
  872. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  873. ret);
  874. ret = -1;
  875. goto fail;
  876. }
  877. } else {
  878. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  879. __func__,
  880. remaining, resp->end_valid, resp->end);
  881. ret = -1;
  882. goto fail;
  883. }
  884. fail:
  885. kfree(p_qdss_trace_data);
  886. end:
  887. kfree(req);
  888. kfree(resp);
  889. return ret;
  890. }
  891. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  892. char *filename, u32 filename_len)
  893. {
  894. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  895. char *debug_str = QDSS_DEBUG_FILE_STR;
  896. if (plat_priv->device_id == KIWI_DEVICE_ID)
  897. debug_str = "";
  898. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  899. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  900. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  901. else
  902. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  903. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  904. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  905. }
  906. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  907. {
  908. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  909. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  910. struct qmi_txn txn;
  911. const struct firmware *fw_entry = NULL;
  912. const u8 *temp;
  913. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  914. unsigned int remaining;
  915. int ret = 0;
  916. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  917. plat_priv->driver_state);
  918. req = kzalloc(sizeof(*req), GFP_KERNEL);
  919. if (!req)
  920. return -ENOMEM;
  921. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  922. if (!resp) {
  923. kfree(req);
  924. return -ENOMEM;
  925. }
  926. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  927. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  928. qdss_cfg_filename);
  929. if (ret) {
  930. cnss_pr_dbg("Unable to load %s\n",
  931. qdss_cfg_filename);
  932. goto err_req_fw;
  933. }
  934. temp = fw_entry->data;
  935. remaining = fw_entry->size;
  936. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  937. qdss_cfg_filename, remaining);
  938. while (remaining) {
  939. req->total_size_valid = 1;
  940. req->total_size = remaining;
  941. req->seg_id_valid = 1;
  942. req->data_valid = 1;
  943. req->end_valid = 1;
  944. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  945. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  946. } else {
  947. req->data_len = remaining;
  948. req->end = 1;
  949. }
  950. memcpy(req->data, temp, req->data_len);
  951. ret = qmi_txn_init
  952. (&plat_priv->qmi_wlfw, &txn,
  953. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  954. resp);
  955. if (ret < 0) {
  956. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  957. ret);
  958. goto err_send;
  959. }
  960. ret = qmi_send_request
  961. (&plat_priv->qmi_wlfw, NULL, &txn,
  962. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  963. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  964. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  965. if (ret < 0) {
  966. qmi_txn_cancel(&txn);
  967. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  968. ret);
  969. goto err_send;
  970. }
  971. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  972. if (ret < 0) {
  973. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  974. ret);
  975. goto err_send;
  976. }
  977. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  978. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  979. resp->resp.result, resp->resp.error);
  980. ret = -resp->resp.result;
  981. goto err_send;
  982. }
  983. remaining -= req->data_len;
  984. temp += req->data_len;
  985. req->seg_id++;
  986. }
  987. release_firmware(fw_entry);
  988. kfree(req);
  989. kfree(resp);
  990. return 0;
  991. err_send:
  992. release_firmware(fw_entry);
  993. err_req_fw:
  994. kfree(req);
  995. kfree(resp);
  996. return ret;
  997. }
  998. static int wlfw_send_qdss_trace_mode_req
  999. (struct cnss_plat_data *plat_priv,
  1000. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1001. unsigned long long option)
  1002. {
  1003. int rc = 0;
  1004. int tmp = 0;
  1005. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1006. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1007. struct qmi_txn txn;
  1008. if (!plat_priv)
  1009. return -ENODEV;
  1010. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1011. if (!req)
  1012. return -ENOMEM;
  1013. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1014. if (!resp) {
  1015. kfree(req);
  1016. return -ENOMEM;
  1017. }
  1018. req->mode_valid = 1;
  1019. req->mode = mode;
  1020. req->option_valid = 1;
  1021. req->option = option;
  1022. tmp = plat_priv->hw_trc_override;
  1023. req->hw_trc_disable_override_valid = 1;
  1024. req->hw_trc_disable_override =
  1025. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1026. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1027. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1028. __func__, mode, option, req->hw_trc_disable_override);
  1029. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1030. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1031. if (rc < 0) {
  1032. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1033. rc);
  1034. goto out;
  1035. }
  1036. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1037. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1038. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1039. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1040. if (rc < 0) {
  1041. qmi_txn_cancel(&txn);
  1042. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1043. goto out;
  1044. }
  1045. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1046. if (rc < 0) {
  1047. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1048. rc);
  1049. goto out;
  1050. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1051. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1052. resp->resp.result, resp->resp.error);
  1053. rc = -resp->resp.result;
  1054. goto out;
  1055. }
  1056. kfree(resp);
  1057. kfree(req);
  1058. return rc;
  1059. out:
  1060. kfree(resp);
  1061. kfree(req);
  1062. CNSS_QMI_ASSERT();
  1063. return rc;
  1064. }
  1065. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1066. {
  1067. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1068. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1069. }
  1070. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1071. {
  1072. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1073. option);
  1074. }
  1075. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1076. enum cnss_driver_mode mode)
  1077. {
  1078. struct wlfw_wlan_mode_req_msg_v01 *req;
  1079. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1080. struct qmi_txn txn;
  1081. int ret = 0;
  1082. if (!plat_priv)
  1083. return -ENODEV;
  1084. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1085. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1086. if (mode == CNSS_OFF &&
  1087. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1088. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1089. return 0;
  1090. }
  1091. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1092. if (!req)
  1093. return -ENOMEM;
  1094. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1095. if (!resp) {
  1096. kfree(req);
  1097. return -ENOMEM;
  1098. }
  1099. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1100. req->hw_debug_valid = 1;
  1101. req->hw_debug = 0;
  1102. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1103. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1104. if (ret < 0) {
  1105. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1106. cnss_qmi_mode_to_str(mode), mode, ret);
  1107. goto out;
  1108. }
  1109. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1110. QMI_WLFW_WLAN_MODE_REQ_V01,
  1111. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1112. wlfw_wlan_mode_req_msg_v01_ei, req);
  1113. if (ret < 0) {
  1114. qmi_txn_cancel(&txn);
  1115. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1116. cnss_qmi_mode_to_str(mode), mode, ret);
  1117. goto out;
  1118. }
  1119. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1120. if (ret < 0) {
  1121. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1122. cnss_qmi_mode_to_str(mode), mode, ret);
  1123. goto out;
  1124. }
  1125. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1126. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1127. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1128. resp->resp.error);
  1129. ret = -resp->resp.result;
  1130. goto out;
  1131. }
  1132. kfree(req);
  1133. kfree(resp);
  1134. return 0;
  1135. out:
  1136. if (mode == CNSS_OFF) {
  1137. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1138. ret = 0;
  1139. } else {
  1140. CNSS_QMI_ASSERT();
  1141. }
  1142. kfree(req);
  1143. kfree(resp);
  1144. return ret;
  1145. }
  1146. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1147. struct cnss_wlan_enable_cfg *config,
  1148. const char *host_version)
  1149. {
  1150. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1151. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1152. struct qmi_txn txn;
  1153. u32 i;
  1154. int ret = 0;
  1155. if (!plat_priv)
  1156. return -ENODEV;
  1157. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1158. plat_priv->driver_state);
  1159. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1160. if (!req)
  1161. return -ENOMEM;
  1162. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1163. if (!resp) {
  1164. kfree(req);
  1165. return -ENOMEM;
  1166. }
  1167. req->host_version_valid = 1;
  1168. strlcpy(req->host_version, host_version,
  1169. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1170. req->tgt_cfg_valid = 1;
  1171. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1172. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1173. else
  1174. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1175. for (i = 0; i < req->tgt_cfg_len; i++) {
  1176. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1177. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1178. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1179. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1180. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1181. }
  1182. req->svc_cfg_valid = 1;
  1183. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1184. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1185. else
  1186. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1187. for (i = 0; i < req->svc_cfg_len; i++) {
  1188. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1189. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1190. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1191. }
  1192. req->shadow_reg_v2_valid = 1;
  1193. if (config->num_shadow_reg_v2_cfg >
  1194. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1195. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1196. else
  1197. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1198. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1199. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1200. * req->shadow_reg_v2_len);
  1201. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1202. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1203. if (ret < 0) {
  1204. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1205. ret);
  1206. goto out;
  1207. }
  1208. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1209. QMI_WLFW_WLAN_CFG_REQ_V01,
  1210. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1211. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1212. if (ret < 0) {
  1213. qmi_txn_cancel(&txn);
  1214. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1215. ret);
  1216. goto out;
  1217. }
  1218. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1219. if (ret < 0) {
  1220. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1221. ret);
  1222. goto out;
  1223. }
  1224. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1225. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1226. resp->resp.result, resp->resp.error);
  1227. ret = -resp->resp.result;
  1228. goto out;
  1229. }
  1230. kfree(req);
  1231. kfree(resp);
  1232. return 0;
  1233. out:
  1234. CNSS_QMI_ASSERT();
  1235. kfree(req);
  1236. kfree(resp);
  1237. return ret;
  1238. }
  1239. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1240. u32 offset, u32 mem_type,
  1241. u32 data_len, u8 *data)
  1242. {
  1243. struct wlfw_athdiag_read_req_msg_v01 *req;
  1244. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1245. struct qmi_txn txn;
  1246. int ret = 0;
  1247. if (!plat_priv)
  1248. return -ENODEV;
  1249. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1250. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1251. data, data_len);
  1252. return -EINVAL;
  1253. }
  1254. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1255. plat_priv->driver_state, offset, mem_type, data_len);
  1256. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1257. if (!req)
  1258. return -ENOMEM;
  1259. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1260. if (!resp) {
  1261. kfree(req);
  1262. return -ENOMEM;
  1263. }
  1264. req->offset = offset;
  1265. req->mem_type = mem_type;
  1266. req->data_len = data_len;
  1267. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1268. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1269. if (ret < 0) {
  1270. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1271. ret);
  1272. goto out;
  1273. }
  1274. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1275. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1276. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1277. wlfw_athdiag_read_req_msg_v01_ei, req);
  1278. if (ret < 0) {
  1279. qmi_txn_cancel(&txn);
  1280. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1281. ret);
  1282. goto out;
  1283. }
  1284. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1285. if (ret < 0) {
  1286. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1287. ret);
  1288. goto out;
  1289. }
  1290. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1291. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1292. resp->resp.result, resp->resp.error);
  1293. ret = -resp->resp.result;
  1294. goto out;
  1295. }
  1296. if (!resp->data_valid || resp->data_len != data_len) {
  1297. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1298. resp->data_valid, resp->data_len);
  1299. ret = -EINVAL;
  1300. goto out;
  1301. }
  1302. memcpy(data, resp->data, resp->data_len);
  1303. kfree(req);
  1304. kfree(resp);
  1305. return 0;
  1306. out:
  1307. kfree(req);
  1308. kfree(resp);
  1309. return ret;
  1310. }
  1311. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1312. u32 offset, u32 mem_type,
  1313. u32 data_len, u8 *data)
  1314. {
  1315. struct wlfw_athdiag_write_req_msg_v01 *req;
  1316. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1317. struct qmi_txn txn;
  1318. int ret = 0;
  1319. if (!plat_priv)
  1320. return -ENODEV;
  1321. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1322. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1323. data, data_len);
  1324. return -EINVAL;
  1325. }
  1326. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1327. plat_priv->driver_state, offset, mem_type, data_len, data);
  1328. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1329. if (!req)
  1330. return -ENOMEM;
  1331. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1332. if (!resp) {
  1333. kfree(req);
  1334. return -ENOMEM;
  1335. }
  1336. req->offset = offset;
  1337. req->mem_type = mem_type;
  1338. req->data_len = data_len;
  1339. memcpy(req->data, data, data_len);
  1340. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1341. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1342. if (ret < 0) {
  1343. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1344. ret);
  1345. goto out;
  1346. }
  1347. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1348. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1349. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1350. wlfw_athdiag_write_req_msg_v01_ei, req);
  1351. if (ret < 0) {
  1352. qmi_txn_cancel(&txn);
  1353. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1354. ret);
  1355. goto out;
  1356. }
  1357. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1358. if (ret < 0) {
  1359. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1360. ret);
  1361. goto out;
  1362. }
  1363. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1364. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1365. resp->resp.result, resp->resp.error);
  1366. ret = -resp->resp.result;
  1367. goto out;
  1368. }
  1369. kfree(req);
  1370. kfree(resp);
  1371. return 0;
  1372. out:
  1373. kfree(req);
  1374. kfree(resp);
  1375. return ret;
  1376. }
  1377. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1378. u8 fw_log_mode)
  1379. {
  1380. struct wlfw_ini_req_msg_v01 *req;
  1381. struct wlfw_ini_resp_msg_v01 *resp;
  1382. struct qmi_txn txn;
  1383. int ret = 0;
  1384. if (!plat_priv)
  1385. return -ENODEV;
  1386. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1387. plat_priv->driver_state, fw_log_mode);
  1388. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1389. if (!req)
  1390. return -ENOMEM;
  1391. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1392. if (!resp) {
  1393. kfree(req);
  1394. return -ENOMEM;
  1395. }
  1396. req->enablefwlog_valid = 1;
  1397. req->enablefwlog = fw_log_mode;
  1398. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1399. wlfw_ini_resp_msg_v01_ei, resp);
  1400. if (ret < 0) {
  1401. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1402. fw_log_mode, ret);
  1403. goto out;
  1404. }
  1405. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1406. QMI_WLFW_INI_REQ_V01,
  1407. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1408. wlfw_ini_req_msg_v01_ei, req);
  1409. if (ret < 0) {
  1410. qmi_txn_cancel(&txn);
  1411. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1412. fw_log_mode, ret);
  1413. goto out;
  1414. }
  1415. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1416. if (ret < 0) {
  1417. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1418. fw_log_mode, ret);
  1419. goto out;
  1420. }
  1421. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1422. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1423. fw_log_mode, resp->resp.result, resp->resp.error);
  1424. ret = -resp->resp.result;
  1425. goto out;
  1426. }
  1427. kfree(req);
  1428. kfree(resp);
  1429. return 0;
  1430. out:
  1431. kfree(req);
  1432. kfree(resp);
  1433. return ret;
  1434. }
  1435. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1436. {
  1437. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1438. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1439. struct qmi_txn txn;
  1440. int ret = 0;
  1441. if (!plat_priv)
  1442. return -ENODEV;
  1443. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1444. !plat_priv->fw_pcie_gen_switch) {
  1445. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1446. return 0;
  1447. }
  1448. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1449. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1450. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1451. plat_priv->pcie_gen_speed;
  1452. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1453. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1454. if (ret < 0) {
  1455. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1456. ret);
  1457. goto out;
  1458. }
  1459. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1460. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1461. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1462. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1463. if (ret < 0) {
  1464. qmi_txn_cancel(&txn);
  1465. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1466. goto out;
  1467. }
  1468. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1469. if (ret < 0) {
  1470. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1471. ret);
  1472. goto out;
  1473. }
  1474. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1475. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1476. plat_priv->pcie_gen_speed, resp.resp.result,
  1477. resp.resp.error);
  1478. ret = -resp.resp.result;
  1479. }
  1480. out:
  1481. /* Reset PCIE Gen speed after one time use */
  1482. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1483. return ret;
  1484. }
  1485. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1486. {
  1487. struct wlfw_antenna_switch_req_msg_v01 *req;
  1488. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1489. struct qmi_txn txn;
  1490. int ret = 0;
  1491. if (!plat_priv)
  1492. return -ENODEV;
  1493. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1494. plat_priv->driver_state);
  1495. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1496. if (!req)
  1497. return -ENOMEM;
  1498. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1499. if (!resp) {
  1500. kfree(req);
  1501. return -ENOMEM;
  1502. }
  1503. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1504. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1505. if (ret < 0) {
  1506. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1507. ret);
  1508. goto out;
  1509. }
  1510. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1511. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1512. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1513. wlfw_antenna_switch_req_msg_v01_ei, req);
  1514. if (ret < 0) {
  1515. qmi_txn_cancel(&txn);
  1516. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1517. ret);
  1518. goto out;
  1519. }
  1520. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1521. if (ret < 0) {
  1522. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1523. ret);
  1524. goto out;
  1525. }
  1526. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1527. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1528. resp->resp.result, resp->resp.error);
  1529. ret = -resp->resp.result;
  1530. goto out;
  1531. }
  1532. if (resp->antenna_valid)
  1533. plat_priv->antenna = resp->antenna;
  1534. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1535. resp->antenna_valid, resp->antenna);
  1536. kfree(req);
  1537. kfree(resp);
  1538. return 0;
  1539. out:
  1540. kfree(req);
  1541. kfree(resp);
  1542. return ret;
  1543. }
  1544. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1545. {
  1546. struct wlfw_antenna_grant_req_msg_v01 *req;
  1547. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1548. struct qmi_txn txn;
  1549. int ret = 0;
  1550. if (!plat_priv)
  1551. return -ENODEV;
  1552. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1553. plat_priv->driver_state, plat_priv->grant);
  1554. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1555. if (!req)
  1556. return -ENOMEM;
  1557. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1558. if (!resp) {
  1559. kfree(req);
  1560. return -ENOMEM;
  1561. }
  1562. req->grant_valid = 1;
  1563. req->grant = plat_priv->grant;
  1564. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1565. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1566. if (ret < 0) {
  1567. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1568. ret);
  1569. goto out;
  1570. }
  1571. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1572. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1573. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1574. wlfw_antenna_grant_req_msg_v01_ei, req);
  1575. if (ret < 0) {
  1576. qmi_txn_cancel(&txn);
  1577. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1578. ret);
  1579. goto out;
  1580. }
  1581. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1582. if (ret < 0) {
  1583. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1584. ret);
  1585. goto out;
  1586. }
  1587. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1588. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1589. resp->resp.result, resp->resp.error);
  1590. ret = -resp->resp.result;
  1591. goto out;
  1592. }
  1593. kfree(req);
  1594. kfree(resp);
  1595. return 0;
  1596. out:
  1597. kfree(req);
  1598. kfree(resp);
  1599. return ret;
  1600. }
  1601. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1602. {
  1603. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1604. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1605. struct qmi_txn txn;
  1606. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1607. int ret = 0;
  1608. int i;
  1609. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1610. plat_priv->driver_state);
  1611. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1612. if (!req)
  1613. return -ENOMEM;
  1614. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1615. if (!resp) {
  1616. kfree(req);
  1617. return -ENOMEM;
  1618. }
  1619. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1620. for (i = 0; i < req->mem_seg_len; i++) {
  1621. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1622. qdss_mem[i].va, &qdss_mem[i].pa,
  1623. qdss_mem[i].size, qdss_mem[i].type);
  1624. req->mem_seg[i].addr = qdss_mem[i].pa;
  1625. req->mem_seg[i].size = qdss_mem[i].size;
  1626. req->mem_seg[i].type = qdss_mem[i].type;
  1627. }
  1628. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1629. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1630. if (ret < 0) {
  1631. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1632. ret);
  1633. goto out;
  1634. }
  1635. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1636. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1637. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1638. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1639. if (ret < 0) {
  1640. qmi_txn_cancel(&txn);
  1641. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1642. ret);
  1643. goto out;
  1644. }
  1645. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1646. if (ret < 0) {
  1647. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1648. ret);
  1649. goto out;
  1650. }
  1651. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1652. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1653. resp->resp.result, resp->resp.error);
  1654. ret = -resp->resp.result;
  1655. goto out;
  1656. }
  1657. kfree(req);
  1658. kfree(resp);
  1659. return 0;
  1660. out:
  1661. kfree(req);
  1662. kfree(resp);
  1663. return ret;
  1664. }
  1665. static int cnss_wlfw_wfc_call_status_send_sync
  1666. (struct cnss_plat_data *plat_priv,
  1667. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1668. {
  1669. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1670. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1671. struct qmi_txn txn;
  1672. int ret = 0;
  1673. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1674. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1675. return -EINVAL;
  1676. }
  1677. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1678. if (!req)
  1679. return -ENOMEM;
  1680. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1681. if (!resp) {
  1682. kfree(req);
  1683. return -ENOMEM;
  1684. }
  1685. /**
  1686. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1687. * But in r2 update QMI structure is expanded and as an effect qmi
  1688. * decoded structures have padding. Thus we cannot use buffer design.
  1689. * For backward compatibility for r1 design copy only wfc_call_active
  1690. * value in hex buffer.
  1691. */
  1692. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1693. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1694. /* wfc_call_active is mandatory in IMS indication */
  1695. req->wfc_call_active_valid = 1;
  1696. req->wfc_call_active = ind_msg->wfc_call_active;
  1697. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1698. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1699. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1700. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1701. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1702. req->twt_ims_start = ind_msg->twt_ims_start;
  1703. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1704. req->twt_ims_int = ind_msg->twt_ims_int;
  1705. req->media_quality_valid = ind_msg->media_quality_valid;
  1706. req->media_quality =
  1707. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1708. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1709. plat_priv->driver_state);
  1710. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1711. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1712. if (ret < 0) {
  1713. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1714. ret);
  1715. goto out;
  1716. }
  1717. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1718. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1719. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1720. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1721. if (ret < 0) {
  1722. qmi_txn_cancel(&txn);
  1723. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1724. ret);
  1725. goto out;
  1726. }
  1727. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1728. if (ret < 0) {
  1729. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1730. ret);
  1731. goto out;
  1732. }
  1733. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1734. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1735. resp->resp.result, resp->resp.error);
  1736. ret = -resp->resp.result;
  1737. goto out;
  1738. }
  1739. ret = 0;
  1740. out:
  1741. kfree(req);
  1742. kfree(resp);
  1743. return ret;
  1744. }
  1745. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1746. {
  1747. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1748. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1749. struct qmi_txn txn;
  1750. int ret = 0;
  1751. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1752. plat_priv->dynamic_feature,
  1753. plat_priv->driver_state);
  1754. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1755. if (!req)
  1756. return -ENOMEM;
  1757. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1758. if (!resp) {
  1759. kfree(req);
  1760. return -ENOMEM;
  1761. }
  1762. req->mask_valid = 1;
  1763. req->mask = plat_priv->dynamic_feature;
  1764. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1765. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1766. if (ret < 0) {
  1767. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1768. ret);
  1769. goto out;
  1770. }
  1771. ret = qmi_send_request
  1772. (&plat_priv->qmi_wlfw, NULL, &txn,
  1773. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1774. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1775. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1776. if (ret < 0) {
  1777. qmi_txn_cancel(&txn);
  1778. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1779. ret);
  1780. goto out;
  1781. }
  1782. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1783. if (ret < 0) {
  1784. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1785. ret);
  1786. goto out;
  1787. }
  1788. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1789. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1790. resp->resp.result, resp->resp.error);
  1791. ret = -resp->resp.result;
  1792. goto out;
  1793. }
  1794. out:
  1795. kfree(req);
  1796. kfree(resp);
  1797. return ret;
  1798. }
  1799. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1800. void *cmd, int cmd_len)
  1801. {
  1802. struct wlfw_get_info_req_msg_v01 *req;
  1803. struct wlfw_get_info_resp_msg_v01 *resp;
  1804. struct qmi_txn txn;
  1805. int ret = 0;
  1806. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1807. type, cmd_len, plat_priv->driver_state);
  1808. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1809. return -EINVAL;
  1810. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1811. if (!req)
  1812. return -ENOMEM;
  1813. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1814. if (!resp) {
  1815. kfree(req);
  1816. return -ENOMEM;
  1817. }
  1818. req->type = type;
  1819. req->data_len = cmd_len;
  1820. memcpy(req->data, cmd, req->data_len);
  1821. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1822. wlfw_get_info_resp_msg_v01_ei, resp);
  1823. if (ret < 0) {
  1824. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  1825. ret);
  1826. goto out;
  1827. }
  1828. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1829. QMI_WLFW_GET_INFO_REQ_V01,
  1830. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1831. wlfw_get_info_req_msg_v01_ei, req);
  1832. if (ret < 0) {
  1833. qmi_txn_cancel(&txn);
  1834. cnss_pr_err("Failed to send get info request, err: %d\n",
  1835. ret);
  1836. goto out;
  1837. }
  1838. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1839. if (ret < 0) {
  1840. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  1841. ret);
  1842. goto out;
  1843. }
  1844. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1845. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  1846. resp->resp.result, resp->resp.error);
  1847. ret = -resp->resp.result;
  1848. goto out;
  1849. }
  1850. kfree(req);
  1851. kfree(resp);
  1852. return 0;
  1853. out:
  1854. kfree(req);
  1855. kfree(resp);
  1856. return ret;
  1857. }
  1858. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  1859. {
  1860. return QMI_WLFW_TIMEOUT_MS;
  1861. }
  1862. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  1863. struct sockaddr_qrtr *sq,
  1864. struct qmi_txn *txn, const void *data)
  1865. {
  1866. struct cnss_plat_data *plat_priv =
  1867. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1868. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  1869. int i;
  1870. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  1871. if (!txn) {
  1872. cnss_pr_err("Spurious indication\n");
  1873. return;
  1874. }
  1875. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  1876. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  1877. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  1878. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  1879. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  1880. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  1881. if (plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  1882. plat_priv->fw_mem[i].attrs |=
  1883. DMA_ATTR_FORCE_CONTIGUOUS;
  1884. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  1885. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  1886. }
  1887. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  1888. 0, NULL);
  1889. }
  1890. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  1891. struct sockaddr_qrtr *sq,
  1892. struct qmi_txn *txn, const void *data)
  1893. {
  1894. struct cnss_plat_data *plat_priv =
  1895. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1896. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  1897. if (!txn) {
  1898. cnss_pr_err("Spurious indication\n");
  1899. return;
  1900. }
  1901. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  1902. 0, NULL);
  1903. }
  1904. /**
  1905. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  1906. *
  1907. * This event is not required for HST/ HSP as FW calibration done is
  1908. * provided in QMI_WLFW_CAL_DONE_IND_V01
  1909. */
  1910. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  1911. struct sockaddr_qrtr *sq,
  1912. struct qmi_txn *txn, const void *data)
  1913. {
  1914. struct cnss_plat_data *plat_priv =
  1915. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1916. struct cnss_cal_info *cal_info;
  1917. if (!txn) {
  1918. cnss_pr_err("Spurious indication\n");
  1919. return;
  1920. }
  1921. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  1922. plat_priv->device_id == QCA6490_DEVICE_ID) {
  1923. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  1924. return;
  1925. }
  1926. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  1927. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  1928. if (!cal_info)
  1929. return;
  1930. cal_info->cal_status = CNSS_CAL_DONE;
  1931. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  1932. 0, cal_info);
  1933. }
  1934. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  1935. struct sockaddr_qrtr *sq,
  1936. struct qmi_txn *txn, const void *data)
  1937. {
  1938. struct cnss_plat_data *plat_priv =
  1939. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1940. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  1941. if (!txn) {
  1942. cnss_pr_err("Spurious indication\n");
  1943. return;
  1944. }
  1945. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  1946. }
  1947. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  1948. struct sockaddr_qrtr *sq,
  1949. struct qmi_txn *txn, const void *data)
  1950. {
  1951. struct cnss_plat_data *plat_priv =
  1952. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1953. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  1954. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  1955. if (!txn) {
  1956. cnss_pr_err("Spurious indication\n");
  1957. return;
  1958. }
  1959. if (ind_msg->pwr_pin_result_valid)
  1960. plat_priv->pin_result.fw_pwr_pin_result =
  1961. ind_msg->pwr_pin_result;
  1962. if (ind_msg->phy_io_pin_result_valid)
  1963. plat_priv->pin_result.fw_phy_io_pin_result =
  1964. ind_msg->phy_io_pin_result;
  1965. if (ind_msg->rf_pin_result_valid)
  1966. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  1967. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  1968. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  1969. ind_msg->rf_pin_result);
  1970. }
  1971. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  1972. u32 cal_file_download_size)
  1973. {
  1974. struct wlfw_cal_report_req_msg_v01 req = {0};
  1975. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  1976. struct qmi_txn txn;
  1977. int ret = 0;
  1978. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  1979. cal_file_download_size, plat_priv->driver_state);
  1980. req.cal_file_download_size_valid = 1;
  1981. req.cal_file_download_size = cal_file_download_size;
  1982. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1983. wlfw_cal_report_resp_msg_v01_ei, &resp);
  1984. if (ret < 0) {
  1985. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  1986. ret);
  1987. goto out;
  1988. }
  1989. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1990. QMI_WLFW_CAL_REPORT_REQ_V01,
  1991. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  1992. wlfw_cal_report_req_msg_v01_ei, &req);
  1993. if (ret < 0) {
  1994. qmi_txn_cancel(&txn);
  1995. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  1996. ret);
  1997. goto out;
  1998. }
  1999. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2000. if (ret < 0) {
  2001. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2002. ret);
  2003. goto out;
  2004. }
  2005. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2006. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2007. resp.resp.result, resp.resp.error);
  2008. ret = -resp.resp.result;
  2009. goto out;
  2010. }
  2011. out:
  2012. return ret;
  2013. }
  2014. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2015. struct sockaddr_qrtr *sq,
  2016. struct qmi_txn *txn, const void *data)
  2017. {
  2018. struct cnss_plat_data *plat_priv =
  2019. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2020. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2021. struct cnss_cal_info *cal_info;
  2022. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2023. ind->cal_file_upload_size);
  2024. cnss_pr_info("Calibration took %d ms\n",
  2025. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2026. if (!txn) {
  2027. cnss_pr_err("Spurious indication\n");
  2028. return;
  2029. }
  2030. if (ind->cal_file_upload_size_valid)
  2031. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2032. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2033. if (!cal_info)
  2034. return;
  2035. cal_info->cal_status = CNSS_CAL_DONE;
  2036. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2037. 0, cal_info);
  2038. }
  2039. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2040. struct sockaddr_qrtr *sq,
  2041. struct qmi_txn *txn,
  2042. const void *data)
  2043. {
  2044. struct cnss_plat_data *plat_priv =
  2045. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2046. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2047. int i;
  2048. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2049. if (!txn) {
  2050. cnss_pr_err("Spurious indication\n");
  2051. return;
  2052. }
  2053. if (plat_priv->qdss_mem_seg_len) {
  2054. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2055. plat_priv->qdss_mem_seg_len);
  2056. return;
  2057. }
  2058. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2059. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2060. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2061. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2062. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2063. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2064. }
  2065. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2066. 0, NULL);
  2067. }
  2068. /**
  2069. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2070. *
  2071. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2072. * fw memory segment for dumping to file system. Only one type of mem can be
  2073. * saved per indication and is provided in mem seg index 0.
  2074. *
  2075. * Return: None
  2076. */
  2077. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2078. struct sockaddr_qrtr *sq,
  2079. struct qmi_txn *txn,
  2080. const void *data)
  2081. {
  2082. struct cnss_plat_data *plat_priv =
  2083. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2084. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2085. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2086. int i = 0;
  2087. if (!txn || !data) {
  2088. cnss_pr_err("Spurious indication\n");
  2089. return;
  2090. }
  2091. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2092. ind_msg->source, ind_msg->mem_seg_valid,
  2093. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2094. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2095. if (!event_data)
  2096. return;
  2097. event_data->mem_type = ind_msg->mem_seg[0].type;
  2098. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2099. event_data->total_size = ind_msg->total_size;
  2100. if (ind_msg->mem_seg_valid) {
  2101. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2102. cnss_pr_err("Invalid seg len indication\n");
  2103. goto free_event_data;
  2104. }
  2105. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2106. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2107. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2108. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2109. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2110. goto free_event_data;
  2111. }
  2112. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2113. i, ind_msg->mem_seg[i].addr,
  2114. ind_msg->mem_seg[i].size);
  2115. }
  2116. }
  2117. if (ind_msg->file_name_valid)
  2118. strlcpy(event_data->file_name, ind_msg->file_name,
  2119. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2120. if (ind_msg->source == 1) {
  2121. if (!ind_msg->file_name_valid)
  2122. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2123. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2124. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2125. 0, event_data);
  2126. } else {
  2127. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2128. if (!ind_msg->file_name_valid)
  2129. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2130. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2131. } else {
  2132. if (!ind_msg->file_name_valid)
  2133. strlcpy(event_data->file_name, "fw_mem_dump",
  2134. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2135. }
  2136. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2137. 0, event_data);
  2138. }
  2139. return;
  2140. free_event_data:
  2141. kfree(event_data);
  2142. }
  2143. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2144. struct sockaddr_qrtr *sq,
  2145. struct qmi_txn *txn,
  2146. const void *data)
  2147. {
  2148. struct cnss_plat_data *plat_priv =
  2149. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2150. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2151. 0, NULL);
  2152. }
  2153. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2154. struct sockaddr_qrtr *sq,
  2155. struct qmi_txn *txn,
  2156. const void *data)
  2157. {
  2158. struct cnss_plat_data *plat_priv =
  2159. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2160. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2161. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2162. if (!txn) {
  2163. cnss_pr_err("Spurious indication\n");
  2164. return;
  2165. }
  2166. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2167. ind_msg->data_len, ind_msg->type,
  2168. ind_msg->is_last, ind_msg->seq_no);
  2169. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2170. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2171. (void *)ind_msg->data,
  2172. ind_msg->data_len);
  2173. }
  2174. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2175. (struct cnss_plat_data *plat_priv,
  2176. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2177. {
  2178. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2179. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2180. struct qmi_txn txn;
  2181. int ret = 0;
  2182. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2183. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2184. return -EINVAL;
  2185. }
  2186. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2187. if (!req)
  2188. return -ENOMEM;
  2189. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2190. if (!resp) {
  2191. kfree(req);
  2192. return -ENOMEM;
  2193. }
  2194. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2195. req->twt_sta_start = ind_msg->twt_sta_start;
  2196. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2197. req->twt_sta_int = ind_msg->twt_sta_int;
  2198. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2199. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2200. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2201. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2202. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2203. req->twt_sta_dl = req->twt_sta_dl;
  2204. req->twt_sta_config_changed_valid =
  2205. ind_msg->twt_sta_config_changed_valid;
  2206. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2207. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2208. plat_priv->driver_state);
  2209. ret =
  2210. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2211. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2212. resp);
  2213. if (ret < 0) {
  2214. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2215. ret);
  2216. goto out;
  2217. }
  2218. ret =
  2219. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2220. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2221. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2222. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2223. if (ret < 0) {
  2224. qmi_txn_cancel(&txn);
  2225. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2226. goto out;
  2227. }
  2228. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2229. if (ret < 0) {
  2230. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2231. goto out;
  2232. }
  2233. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2234. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2235. resp->resp.result, resp->resp.error);
  2236. ret = -resp->resp.result;
  2237. goto out;
  2238. }
  2239. ret = 0;
  2240. out:
  2241. kfree(req);
  2242. kfree(resp);
  2243. return ret;
  2244. }
  2245. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2246. void *data)
  2247. {
  2248. int ret;
  2249. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2250. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2251. kfree(data);
  2252. return ret;
  2253. }
  2254. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2255. struct sockaddr_qrtr *sq,
  2256. struct qmi_txn *txn,
  2257. const void *data)
  2258. {
  2259. struct cnss_plat_data *plat_priv =
  2260. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2261. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2262. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2263. if (!txn) {
  2264. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2265. return;
  2266. }
  2267. if (!ind_msg) {
  2268. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2269. return;
  2270. }
  2271. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2272. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2273. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2274. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2275. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2276. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2277. ind_msg->twt_sta_config_changed_valid,
  2278. ind_msg->twt_sta_config_changed);
  2279. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2280. if (!event_data)
  2281. return;
  2282. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2283. event_data);
  2284. }
  2285. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2286. {
  2287. .type = QMI_INDICATION,
  2288. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2289. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2290. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2291. .fn = cnss_wlfw_request_mem_ind_cb
  2292. },
  2293. {
  2294. .type = QMI_INDICATION,
  2295. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2296. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2297. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2298. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2299. },
  2300. {
  2301. .type = QMI_INDICATION,
  2302. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2303. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2304. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2305. .fn = cnss_wlfw_fw_ready_ind_cb
  2306. },
  2307. {
  2308. .type = QMI_INDICATION,
  2309. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2310. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2311. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2312. .fn = cnss_wlfw_fw_init_done_ind_cb
  2313. },
  2314. {
  2315. .type = QMI_INDICATION,
  2316. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2317. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2318. .decoded_size =
  2319. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2320. .fn = cnss_wlfw_pin_result_ind_cb
  2321. },
  2322. {
  2323. .type = QMI_INDICATION,
  2324. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2325. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2326. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2327. .fn = cnss_wlfw_cal_done_ind_cb
  2328. },
  2329. {
  2330. .type = QMI_INDICATION,
  2331. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2332. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2333. .decoded_size =
  2334. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2335. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2336. },
  2337. {
  2338. .type = QMI_INDICATION,
  2339. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2340. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2341. .decoded_size =
  2342. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2343. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2344. },
  2345. {
  2346. .type = QMI_INDICATION,
  2347. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2348. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2349. .decoded_size =
  2350. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2351. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2352. },
  2353. {
  2354. .type = QMI_INDICATION,
  2355. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2356. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2357. .decoded_size =
  2358. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2359. .fn = cnss_wlfw_respond_get_info_ind_cb
  2360. },
  2361. {
  2362. .type = QMI_INDICATION,
  2363. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2364. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2365. .decoded_size =
  2366. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2367. .fn = cnss_wlfw_process_twt_cfg_ind
  2368. },
  2369. {}
  2370. };
  2371. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2372. void *data)
  2373. {
  2374. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2375. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2376. struct sockaddr_qrtr sq = { 0 };
  2377. int ret = 0;
  2378. if (!event_data)
  2379. return -EINVAL;
  2380. sq.sq_family = AF_QIPCRTR;
  2381. sq.sq_node = event_data->node;
  2382. sq.sq_port = event_data->port;
  2383. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2384. sizeof(sq), 0);
  2385. if (ret < 0) {
  2386. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2387. goto out;
  2388. }
  2389. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2390. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2391. plat_priv->driver_state);
  2392. kfree(data);
  2393. return 0;
  2394. out:
  2395. CNSS_QMI_ASSERT();
  2396. kfree(data);
  2397. return ret;
  2398. }
  2399. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2400. {
  2401. int ret = 0;
  2402. if (!plat_priv)
  2403. return -ENODEV;
  2404. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2405. cnss_pr_err("Unexpected WLFW server arrive\n");
  2406. CNSS_ASSERT(0);
  2407. return -EINVAL;
  2408. }
  2409. cnss_ignore_qmi_failure(false);
  2410. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2411. if (ret < 0)
  2412. goto out;
  2413. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2414. if (ret < 0) {
  2415. if (ret == -EALREADY)
  2416. ret = 0;
  2417. goto out;
  2418. }
  2419. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2420. if (ret < 0)
  2421. goto out;
  2422. return 0;
  2423. out:
  2424. return ret;
  2425. }
  2426. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2427. {
  2428. int ret;
  2429. if (!plat_priv)
  2430. return -ENODEV;
  2431. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2432. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2433. plat_priv->driver_state);
  2434. cnss_qmi_deinit(plat_priv);
  2435. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2436. ret = cnss_qmi_init(plat_priv);
  2437. if (ret < 0) {
  2438. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2439. CNSS_ASSERT(0);
  2440. }
  2441. return 0;
  2442. }
  2443. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2444. struct qmi_service *service)
  2445. {
  2446. struct cnss_plat_data *plat_priv =
  2447. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2448. struct cnss_qmi_event_server_arrive_data *event_data;
  2449. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2450. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2451. plat_priv->driver_state);
  2452. return 0;
  2453. }
  2454. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2455. service->node, service->port);
  2456. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2457. if (!event_data)
  2458. return -ENOMEM;
  2459. event_data->node = service->node;
  2460. event_data->port = service->port;
  2461. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2462. 0, event_data);
  2463. return 0;
  2464. }
  2465. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2466. struct qmi_service *service)
  2467. {
  2468. struct cnss_plat_data *plat_priv =
  2469. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2470. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2471. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2472. plat_priv->driver_state);
  2473. return;
  2474. }
  2475. cnss_pr_dbg("WLFW server exiting\n");
  2476. if (plat_priv) {
  2477. cnss_ignore_qmi_failure(true);
  2478. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2479. }
  2480. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2481. 0, NULL);
  2482. }
  2483. static struct qmi_ops qmi_wlfw_ops = {
  2484. .new_server = wlfw_new_server,
  2485. .del_server = wlfw_del_server,
  2486. };
  2487. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2488. {
  2489. int ret = 0;
  2490. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2491. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2492. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2493. if (ret < 0) {
  2494. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2495. ret);
  2496. goto out;
  2497. }
  2498. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2499. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2500. if (ret < 0)
  2501. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2502. out:
  2503. return ret;
  2504. }
  2505. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2506. {
  2507. qmi_handle_release(&plat_priv->qmi_wlfw);
  2508. }
  2509. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2510. {
  2511. struct dms_get_mac_address_req_msg_v01 req;
  2512. struct dms_get_mac_address_resp_msg_v01 resp;
  2513. struct qmi_txn txn;
  2514. int ret = 0;
  2515. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2516. cnss_pr_err("DMS QMI connection not established\n");
  2517. return -EINVAL;
  2518. }
  2519. cnss_pr_dbg("Requesting DMS MAC address");
  2520. memset(&resp, 0, sizeof(resp));
  2521. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2522. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2523. if (ret < 0) {
  2524. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2525. ret);
  2526. goto out;
  2527. }
  2528. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2529. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2530. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2531. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2532. dms_get_mac_address_req_msg_v01_ei, &req);
  2533. if (ret < 0) {
  2534. qmi_txn_cancel(&txn);
  2535. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2536. ret);
  2537. goto out;
  2538. }
  2539. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2540. if (ret < 0) {
  2541. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2542. ret);
  2543. goto out;
  2544. }
  2545. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2546. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2547. resp.resp.result, resp.resp.error);
  2548. ret = -resp.resp.result;
  2549. goto out;
  2550. }
  2551. if (!resp.mac_address_valid ||
  2552. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2553. cnss_pr_err("Invalid MAC address received from DMS\n");
  2554. plat_priv->dms.mac_valid = false;
  2555. goto out;
  2556. }
  2557. plat_priv->dms.mac_valid = true;
  2558. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2559. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2560. out:
  2561. return ret;
  2562. }
  2563. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2564. unsigned int node, unsigned int port)
  2565. {
  2566. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2567. struct sockaddr_qrtr sq = {0};
  2568. int ret = 0;
  2569. sq.sq_family = AF_QIPCRTR;
  2570. sq.sq_node = node;
  2571. sq.sq_port = port;
  2572. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2573. sizeof(sq), 0);
  2574. if (ret < 0) {
  2575. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2576. node, port);
  2577. goto out;
  2578. }
  2579. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2580. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2581. plat_priv->driver_state);
  2582. out:
  2583. return ret;
  2584. }
  2585. static int dms_new_server(struct qmi_handle *qmi_dms,
  2586. struct qmi_service *service)
  2587. {
  2588. struct cnss_plat_data *plat_priv =
  2589. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2590. if (!service)
  2591. return -EINVAL;
  2592. return cnss_dms_connect_to_server(plat_priv, service->node,
  2593. service->port);
  2594. }
  2595. static void dms_del_server(struct qmi_handle *qmi_dms,
  2596. struct qmi_service *service)
  2597. {
  2598. struct cnss_plat_data *plat_priv =
  2599. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2600. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2601. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2602. plat_priv->driver_state);
  2603. }
  2604. static struct qmi_ops qmi_dms_ops = {
  2605. .new_server = dms_new_server,
  2606. .del_server = dms_del_server,
  2607. };
  2608. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2609. {
  2610. int ret = 0;
  2611. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2612. &qmi_dms_ops, NULL);
  2613. if (ret < 0) {
  2614. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2615. goto out;
  2616. }
  2617. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2618. DMS_SERVICE_VERS_V01, 0);
  2619. if (ret < 0)
  2620. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2621. out:
  2622. return ret;
  2623. }
  2624. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2625. {
  2626. qmi_handle_release(&plat_priv->qmi_dms);
  2627. }
  2628. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2629. {
  2630. int ret;
  2631. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2632. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2633. struct qmi_txn txn;
  2634. if (!plat_priv)
  2635. return -ENODEV;
  2636. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2637. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2638. if (!req)
  2639. return -ENOMEM;
  2640. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2641. if (!resp) {
  2642. kfree(req);
  2643. return -ENOMEM;
  2644. }
  2645. req->antenna = plat_priv->antenna;
  2646. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2647. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2648. if (ret < 0) {
  2649. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2650. ret);
  2651. goto out;
  2652. }
  2653. ret = qmi_send_request
  2654. (&plat_priv->coex_qmi, NULL, &txn,
  2655. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2656. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2657. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2658. if (ret < 0) {
  2659. qmi_txn_cancel(&txn);
  2660. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2661. ret);
  2662. goto out;
  2663. }
  2664. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2665. if (ret < 0) {
  2666. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2667. ret);
  2668. goto out;
  2669. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2670. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2671. resp->resp.result, resp->resp.error);
  2672. ret = -resp->resp.result;
  2673. goto out;
  2674. }
  2675. if (resp->grant_valid)
  2676. plat_priv->grant = resp->grant;
  2677. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2678. kfree(resp);
  2679. kfree(req);
  2680. return 0;
  2681. out:
  2682. kfree(resp);
  2683. kfree(req);
  2684. return ret;
  2685. }
  2686. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2687. {
  2688. int ret;
  2689. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2690. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2691. struct qmi_txn txn;
  2692. if (!plat_priv)
  2693. return -ENODEV;
  2694. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2695. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2696. if (!req)
  2697. return -ENOMEM;
  2698. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2699. if (!resp) {
  2700. kfree(req);
  2701. return -ENOMEM;
  2702. }
  2703. req->antenna = plat_priv->antenna;
  2704. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2705. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2706. if (ret < 0) {
  2707. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2708. ret);
  2709. goto out;
  2710. }
  2711. ret = qmi_send_request
  2712. (&plat_priv->coex_qmi, NULL, &txn,
  2713. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2714. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2715. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2716. if (ret < 0) {
  2717. qmi_txn_cancel(&txn);
  2718. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2719. ret);
  2720. goto out;
  2721. }
  2722. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2723. if (ret < 0) {
  2724. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2725. ret);
  2726. goto out;
  2727. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2728. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2729. resp->resp.result, resp->resp.error);
  2730. ret = -resp->resp.result;
  2731. goto out;
  2732. }
  2733. kfree(resp);
  2734. kfree(req);
  2735. return 0;
  2736. out:
  2737. kfree(resp);
  2738. kfree(req);
  2739. return ret;
  2740. }
  2741. static int coex_new_server(struct qmi_handle *qmi,
  2742. struct qmi_service *service)
  2743. {
  2744. struct cnss_plat_data *plat_priv =
  2745. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2746. struct sockaddr_qrtr sq = { 0 };
  2747. int ret = 0;
  2748. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2749. service->node, service->port);
  2750. sq.sq_family = AF_QIPCRTR;
  2751. sq.sq_node = service->node;
  2752. sq.sq_port = service->port;
  2753. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2754. if (ret < 0) {
  2755. cnss_pr_err("Fail to connect to remote service port\n");
  2756. return ret;
  2757. }
  2758. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2759. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2760. plat_priv->driver_state);
  2761. return 0;
  2762. }
  2763. static void coex_del_server(struct qmi_handle *qmi,
  2764. struct qmi_service *service)
  2765. {
  2766. struct cnss_plat_data *plat_priv =
  2767. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2768. cnss_pr_dbg("COEX server exit\n");
  2769. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2770. }
  2771. static struct qmi_ops coex_qmi_ops = {
  2772. .new_server = coex_new_server,
  2773. .del_server = coex_del_server,
  2774. };
  2775. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  2776. { int ret;
  2777. ret = qmi_handle_init(&plat_priv->coex_qmi,
  2778. COEX_SERVICE_MAX_MSG_LEN,
  2779. &coex_qmi_ops, NULL);
  2780. if (ret < 0)
  2781. return ret;
  2782. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  2783. COEX_SERVICE_VERS_V01, 0);
  2784. return ret;
  2785. }
  2786. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  2787. {
  2788. qmi_handle_release(&plat_priv->coex_qmi);
  2789. }
  2790. /* IMS Service */
  2791. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  2792. {
  2793. int ret;
  2794. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  2795. struct qmi_txn *txn;
  2796. if (!plat_priv)
  2797. return -ENODEV;
  2798. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  2799. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2800. if (!req)
  2801. return -ENOMEM;
  2802. req->wfc_call_status_valid = 1;
  2803. req->wfc_call_status = 1;
  2804. txn = &plat_priv->txn;
  2805. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  2806. if (ret < 0) {
  2807. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  2808. ret);
  2809. goto out;
  2810. }
  2811. ret = qmi_send_request
  2812. (&plat_priv->ims_qmi, NULL, txn,
  2813. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  2814. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  2815. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  2816. if (ret < 0) {
  2817. qmi_txn_cancel(txn);
  2818. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  2819. ret);
  2820. goto out;
  2821. }
  2822. kfree(req);
  2823. return 0;
  2824. out:
  2825. kfree(req);
  2826. return ret;
  2827. }
  2828. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  2829. struct sockaddr_qrtr *sq,
  2830. struct qmi_txn *txn,
  2831. const void *data)
  2832. {
  2833. const
  2834. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  2835. data;
  2836. cnss_pr_dbg("Received IMS subscribe indication response\n");
  2837. if (!txn) {
  2838. cnss_pr_err("spurious response\n");
  2839. return;
  2840. }
  2841. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2842. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  2843. resp->resp.result, resp->resp.error);
  2844. txn->result = -resp->resp.result;
  2845. }
  2846. }
  2847. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  2848. void *data)
  2849. {
  2850. int ret;
  2851. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  2852. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  2853. kfree(data);
  2854. return ret;
  2855. }
  2856. static void
  2857. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  2858. struct sockaddr_qrtr *sq,
  2859. struct qmi_txn *txn, const void *data)
  2860. {
  2861. struct cnss_plat_data *plat_priv =
  2862. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  2863. const
  2864. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  2865. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  2866. if (!txn) {
  2867. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  2868. return;
  2869. }
  2870. if (!ind_msg) {
  2871. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  2872. return;
  2873. }
  2874. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  2875. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  2876. ind_msg->all_wfc_calls_held,
  2877. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  2878. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  2879. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  2880. ind_msg->media_quality_valid, ind_msg->media_quality);
  2881. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2882. if (!event_data)
  2883. return;
  2884. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  2885. 0, event_data);
  2886. }
  2887. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  2888. {
  2889. .type = QMI_RESPONSE,
  2890. .msg_id =
  2891. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  2892. .ei =
  2893. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  2894. .decoded_size = sizeof(struct
  2895. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  2896. .fn = ims_subscribe_for_indication_resp_cb
  2897. },
  2898. {
  2899. .type = QMI_INDICATION,
  2900. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  2901. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  2902. .decoded_size =
  2903. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  2904. .fn = cnss_ims_process_wfc_call_ind_cb
  2905. },
  2906. {}
  2907. };
  2908. static int ims_new_server(struct qmi_handle *qmi,
  2909. struct qmi_service *service)
  2910. {
  2911. struct cnss_plat_data *plat_priv =
  2912. container_of(qmi, struct cnss_plat_data, ims_qmi);
  2913. struct sockaddr_qrtr sq = { 0 };
  2914. int ret = 0;
  2915. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  2916. service->node, service->port);
  2917. sq.sq_family = AF_QIPCRTR;
  2918. sq.sq_node = service->node;
  2919. sq.sq_port = service->port;
  2920. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2921. if (ret < 0) {
  2922. cnss_pr_err("Fail to connect to remote service port\n");
  2923. return ret;
  2924. }
  2925. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  2926. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  2927. plat_priv->driver_state);
  2928. ret = ims_subscribe_for_indication_send_async(plat_priv);
  2929. return ret;
  2930. }
  2931. static void ims_del_server(struct qmi_handle *qmi,
  2932. struct qmi_service *service)
  2933. {
  2934. struct cnss_plat_data *plat_priv =
  2935. container_of(qmi, struct cnss_plat_data, ims_qmi);
  2936. cnss_pr_dbg("IMS server exit\n");
  2937. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  2938. }
  2939. static struct qmi_ops ims_qmi_ops = {
  2940. .new_server = ims_new_server,
  2941. .del_server = ims_del_server,
  2942. };
  2943. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  2944. { int ret;
  2945. ret = qmi_handle_init(&plat_priv->ims_qmi,
  2946. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  2947. &ims_qmi_ops, qmi_ims_msg_handlers);
  2948. if (ret < 0)
  2949. return ret;
  2950. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  2951. IMSPRIVATE_SERVICE_VERS_V01, 0);
  2952. return ret;
  2953. }
  2954. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  2955. {
  2956. qmi_handle_release(&plat_priv->ims_qmi);
  2957. }