dp_tx.c 182 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "htt.h"
  20. #include "dp_htt.h"
  21. #include "hal_hw_headers.h"
  22. #include "dp_tx.h"
  23. #include "dp_tx_desc.h"
  24. #include "dp_peer.h"
  25. #include "dp_types.h"
  26. #include "hal_tx.h"
  27. #include "qdf_mem.h"
  28. #include "qdf_nbuf.h"
  29. #include "qdf_net_types.h"
  30. #include "qdf_module.h"
  31. #include <wlan_cfg.h>
  32. #include "dp_ipa.h"
  33. #if defined(MESH_MODE_SUPPORT) || defined(FEATURE_PERPKT_INFO)
  34. #include "if_meta_hdr.h"
  35. #endif
  36. #include "enet.h"
  37. #include "dp_internal.h"
  38. #ifdef ATH_SUPPORT_IQUE
  39. #include "dp_txrx_me.h"
  40. #endif
  41. #include "dp_hist.h"
  42. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  43. #include <wlan_dp_swlm.h>
  44. #endif
  45. #ifdef WIFI_MONITOR_SUPPORT
  46. #include <dp_mon.h>
  47. #endif
  48. #ifdef FEATURE_WDS
  49. #include "dp_txrx_wds.h"
  50. #endif
  51. #include "cdp_txrx_cmn_reg.h"
  52. #ifdef CONFIG_SAWF
  53. #include <dp_sawf.h>
  54. #endif
  55. /* Flag to skip CCE classify when mesh or tid override enabled */
  56. #define DP_TX_SKIP_CCE_CLASSIFY \
  57. (DP_TXRX_HLOS_TID_OVERRIDE_ENABLED | DP_TX_MESH_ENABLED)
  58. /* TODO Add support in TSO */
  59. #define DP_DESC_NUM_FRAG(x) 0
  60. /* disable TQM_BYPASS */
  61. #define TQM_BYPASS_WAR 0
  62. #define DP_RETRY_COUNT 7
  63. #ifdef WLAN_PEER_JITTER
  64. #define DP_AVG_JITTER_WEIGHT_DENOM 4
  65. #define DP_AVG_DELAY_WEIGHT_DENOM 3
  66. #endif
  67. #ifdef QCA_DP_TX_FW_METADATA_V2
  68. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  69. HTT_TX_TCL_METADATA_V2_PDEV_ID_SET(_var, _val)
  70. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  71. HTT_TX_TCL_METADATA_V2_VALID_HTT_SET(_var, _val)
  72. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  73. HTT_TX_TCL_METADATA_TYPE_V2_SET(_var, _val)
  74. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  75. HTT_TX_TCL_METADATA_V2_HOST_INSPECTED_SET(_var, _val)
  76. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  77. HTT_TX_TCL_METADATA_V2_PEER_ID_SET(_var, _val)
  78. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  79. HTT_TX_TCL_METADATA_V2_VDEV_ID_SET(_var, _val)
  80. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  81. HTT_TCL_METADATA_V2_TYPE_PEER_BASED
  82. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  83. HTT_TCL_METADATA_V2_TYPE_VDEV_BASED
  84. #else
  85. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  86. HTT_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)
  87. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  88. HTT_TX_TCL_METADATA_VALID_HTT_SET(_var, _val)
  89. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  90. HTT_TX_TCL_METADATA_TYPE_SET(_var, _val)
  91. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  92. HTT_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val)
  93. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  94. HTT_TX_TCL_METADATA_PEER_ID_SET(_var, _val)
  95. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  96. HTT_TX_TCL_METADATA_VDEV_ID_SET(_var, _val)
  97. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  98. HTT_TCL_METADATA_TYPE_PEER_BASED
  99. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  100. HTT_TCL_METADATA_TYPE_VDEV_BASED
  101. #endif
  102. #define DP_GET_HW_LINK_ID_FRM_PPDU_ID(PPDU_ID, LINK_ID_OFFSET, LINK_ID_BITS) \
  103. (((PPDU_ID) >> (LINK_ID_OFFSET)) & ((1 << (LINK_ID_BITS)) - 1))
  104. /*mapping between hal encrypt type and cdp_sec_type*/
  105. uint8_t sec_type_map[MAX_CDP_SEC_TYPE] = {HAL_TX_ENCRYPT_TYPE_NO_CIPHER,
  106. HAL_TX_ENCRYPT_TYPE_WEP_128,
  107. HAL_TX_ENCRYPT_TYPE_WEP_104,
  108. HAL_TX_ENCRYPT_TYPE_WEP_40,
  109. HAL_TX_ENCRYPT_TYPE_TKIP_WITH_MIC,
  110. HAL_TX_ENCRYPT_TYPE_TKIP_NO_MIC,
  111. HAL_TX_ENCRYPT_TYPE_AES_CCMP_128,
  112. HAL_TX_ENCRYPT_TYPE_WAPI,
  113. HAL_TX_ENCRYPT_TYPE_AES_CCMP_256,
  114. HAL_TX_ENCRYPT_TYPE_AES_GCMP_128,
  115. HAL_TX_ENCRYPT_TYPE_AES_GCMP_256,
  116. HAL_TX_ENCRYPT_TYPE_WAPI_GCM_SM4};
  117. qdf_export_symbol(sec_type_map);
  118. #ifdef WLAN_FEATURE_DP_TX_DESC_HISTORY
  119. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  120. {
  121. enum dp_tx_event_type type;
  122. if (flags & DP_TX_DESC_FLAG_FLUSH)
  123. type = DP_TX_DESC_FLUSH;
  124. else if (flags & DP_TX_DESC_FLAG_TX_COMP_ERR)
  125. type = DP_TX_COMP_UNMAP_ERR;
  126. else if (flags & DP_TX_DESC_FLAG_COMPLETED_TX)
  127. type = DP_TX_COMP_UNMAP;
  128. else
  129. type = DP_TX_DESC_UNMAP;
  130. return type;
  131. }
  132. static inline void
  133. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  134. qdf_nbuf_t skb, uint32_t sw_cookie,
  135. enum dp_tx_event_type type)
  136. {
  137. struct dp_tx_tcl_history *tx_tcl_history = &soc->tx_tcl_history;
  138. struct dp_tx_comp_history *tx_comp_history = &soc->tx_comp_history;
  139. struct dp_tx_desc_event *entry;
  140. uint32_t idx;
  141. uint16_t slot;
  142. switch (type) {
  143. case DP_TX_COMP_UNMAP:
  144. case DP_TX_COMP_UNMAP_ERR:
  145. case DP_TX_COMP_MSDU_EXT:
  146. if (qdf_unlikely(!tx_comp_history->allocated))
  147. return;
  148. dp_get_frag_hist_next_atomic_idx(&tx_comp_history->index, &idx,
  149. &slot,
  150. DP_TX_COMP_HIST_SLOT_SHIFT,
  151. DP_TX_COMP_HIST_PER_SLOT_MAX,
  152. DP_TX_COMP_HISTORY_SIZE);
  153. entry = &tx_comp_history->entry[slot][idx];
  154. break;
  155. case DP_TX_DESC_MAP:
  156. case DP_TX_DESC_UNMAP:
  157. case DP_TX_DESC_COOKIE:
  158. case DP_TX_DESC_FLUSH:
  159. if (qdf_unlikely(!tx_tcl_history->allocated))
  160. return;
  161. dp_get_frag_hist_next_atomic_idx(&tx_tcl_history->index, &idx,
  162. &slot,
  163. DP_TX_TCL_HIST_SLOT_SHIFT,
  164. DP_TX_TCL_HIST_PER_SLOT_MAX,
  165. DP_TX_TCL_HISTORY_SIZE);
  166. entry = &tx_tcl_history->entry[slot][idx];
  167. break;
  168. default:
  169. dp_info_rl("Invalid dp_tx_event_type: %d", type);
  170. return;
  171. }
  172. entry->skb = skb;
  173. entry->paddr = paddr;
  174. entry->sw_cookie = sw_cookie;
  175. entry->type = type;
  176. entry->ts = qdf_get_log_timestamp();
  177. }
  178. static inline void
  179. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  180. struct qdf_tso_seg_elem_t *tso_seg,
  181. qdf_nbuf_t skb, uint32_t sw_cookie,
  182. enum dp_tx_event_type type)
  183. {
  184. int i;
  185. for (i = 1; i < tso_seg->seg.num_frags; i++) {
  186. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[i].paddr,
  187. skb, sw_cookie, type);
  188. }
  189. if (!tso_seg->next)
  190. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[0].paddr,
  191. skb, 0xFFFFFFFF, type);
  192. }
  193. static inline void
  194. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  195. qdf_nbuf_t skb, uint32_t sw_cookie,
  196. enum dp_tx_event_type type)
  197. {
  198. struct qdf_tso_seg_elem_t *curr_seg = tso_info.tso_seg_list;
  199. uint32_t num_segs = tso_info.num_segs;
  200. while (num_segs) {
  201. dp_tx_tso_seg_history_add(soc, curr_seg, skb, sw_cookie, type);
  202. curr_seg = curr_seg->next;
  203. num_segs--;
  204. }
  205. }
  206. #else
  207. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  208. {
  209. return DP_TX_DESC_INVAL_EVT;
  210. }
  211. static inline void
  212. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  213. qdf_nbuf_t skb, uint32_t sw_cookie,
  214. enum dp_tx_event_type type)
  215. {
  216. }
  217. static inline void
  218. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  219. struct qdf_tso_seg_elem_t *tso_seg,
  220. qdf_nbuf_t skb, uint32_t sw_cookie,
  221. enum dp_tx_event_type type)
  222. {
  223. }
  224. static inline void
  225. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  226. qdf_nbuf_t skb, uint32_t sw_cookie,
  227. enum dp_tx_event_type type)
  228. {
  229. }
  230. #endif /* WLAN_FEATURE_DP_TX_DESC_HISTORY */
  231. /**
  232. * dp_is_tput_high() - Check if throughput is high
  233. *
  234. * @soc: core txrx main context
  235. *
  236. * The current function is based of the RTPM tput policy variable where RTPM is
  237. * avoided based on throughput.
  238. */
  239. static inline int dp_is_tput_high(struct dp_soc *soc)
  240. {
  241. return dp_get_rtpm_tput_policy_requirement(soc);
  242. }
  243. #if defined(FEATURE_TSO)
  244. /**
  245. * dp_tx_tso_unmap_segment() - Unmap TSO segment
  246. *
  247. * @soc: core txrx main context
  248. * @seg_desc: tso segment descriptor
  249. * @num_seg_desc: tso number segment descriptor
  250. */
  251. static void dp_tx_tso_unmap_segment(
  252. struct dp_soc *soc,
  253. struct qdf_tso_seg_elem_t *seg_desc,
  254. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  255. {
  256. TSO_DEBUG("%s: Unmap the tso segment", __func__);
  257. if (qdf_unlikely(!seg_desc)) {
  258. DP_TRACE(ERROR, "%s %d TSO desc is NULL!",
  259. __func__, __LINE__);
  260. qdf_assert(0);
  261. } else if (qdf_unlikely(!num_seg_desc)) {
  262. DP_TRACE(ERROR, "%s %d TSO num desc is NULL!",
  263. __func__, __LINE__);
  264. qdf_assert(0);
  265. } else {
  266. bool is_last_seg;
  267. /* no tso segment left to do dma unmap */
  268. if (num_seg_desc->num_seg.tso_cmn_num_seg < 1)
  269. return;
  270. is_last_seg = (num_seg_desc->num_seg.tso_cmn_num_seg == 1) ?
  271. true : false;
  272. qdf_nbuf_unmap_tso_segment(soc->osdev,
  273. seg_desc, is_last_seg);
  274. num_seg_desc->num_seg.tso_cmn_num_seg--;
  275. }
  276. }
  277. /**
  278. * dp_tx_tso_desc_release() - Release the tso segment and tso_cmn_num_seg
  279. * back to the freelist
  280. *
  281. * @soc: soc device handle
  282. * @tx_desc: Tx software descriptor
  283. */
  284. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  285. struct dp_tx_desc_s *tx_desc)
  286. {
  287. TSO_DEBUG("%s: Free the tso descriptor", __func__);
  288. if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_desc)) {
  289. dp_tx_err("SO desc is NULL!");
  290. qdf_assert(0);
  291. } else if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_num_desc)) {
  292. dp_tx_err("TSO num desc is NULL!");
  293. qdf_assert(0);
  294. } else {
  295. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  296. (struct qdf_tso_num_seg_elem_t *)tx_desc->
  297. msdu_ext_desc->tso_num_desc;
  298. /* Add the tso num segment into the free list */
  299. if (tso_num_desc->num_seg.tso_cmn_num_seg == 0) {
  300. dp_tso_num_seg_free(soc, tx_desc->pool_id,
  301. tx_desc->msdu_ext_desc->
  302. tso_num_desc);
  303. tx_desc->msdu_ext_desc->tso_num_desc = NULL;
  304. DP_STATS_INC(tx_desc->pdev, tso_stats.tso_comp, 1);
  305. }
  306. /* Add the tso segment into the free list*/
  307. dp_tx_tso_desc_free(soc,
  308. tx_desc->pool_id, tx_desc->msdu_ext_desc->
  309. tso_desc);
  310. tx_desc->msdu_ext_desc->tso_desc = NULL;
  311. }
  312. }
  313. #else
  314. static void dp_tx_tso_unmap_segment(
  315. struct dp_soc *soc,
  316. struct qdf_tso_seg_elem_t *seg_desc,
  317. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  318. {
  319. }
  320. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  321. struct dp_tx_desc_s *tx_desc)
  322. {
  323. }
  324. #endif
  325. #ifdef WLAN_SUPPORT_PPEDS
  326. static inline int
  327. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  328. uint8_t desc_pool_id)
  329. {
  330. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  331. __dp_tx_outstanding_dec(soc);
  332. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  333. return 1;
  334. }
  335. return 0;
  336. }
  337. #else
  338. static inline int
  339. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  340. uint8_t desc_pool_id)
  341. {
  342. return 0;
  343. }
  344. #endif
  345. void
  346. dp_tx_desc_release(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  347. uint8_t desc_pool_id)
  348. {
  349. struct dp_pdev *pdev = tx_desc->pdev;
  350. uint8_t comp_status = 0;
  351. if (dp_tx_release_ds_tx_desc(soc, tx_desc, desc_pool_id))
  352. return;
  353. qdf_assert(pdev);
  354. soc = pdev->soc;
  355. dp_tx_outstanding_dec(pdev);
  356. if (tx_desc->msdu_ext_desc) {
  357. if (tx_desc->frm_type == dp_tx_frm_tso)
  358. dp_tx_tso_desc_release(soc, tx_desc);
  359. if (tx_desc->flags & DP_TX_DESC_FLAG_ME)
  360. dp_tx_me_free_buf(tx_desc->pdev,
  361. tx_desc->msdu_ext_desc->me_buffer);
  362. dp_tx_ext_desc_free(soc, tx_desc->msdu_ext_desc, desc_pool_id);
  363. tx_desc->msdu_ext_desc = NULL;
  364. }
  365. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  366. qdf_atomic_dec(&soc->num_tx_exception);
  367. if (HAL_TX_COMP_RELEASE_SOURCE_TQM ==
  368. tx_desc->buffer_src)
  369. comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp,
  370. soc->hal_soc);
  371. else
  372. comp_status = HAL_TX_COMP_RELEASE_REASON_FW;
  373. dp_tx_debug("Tx Completion Release desc %d status %d outstanding %d",
  374. tx_desc->id, comp_status,
  375. qdf_atomic_read(&pdev->num_tx_outstanding));
  376. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  377. return;
  378. }
  379. /**
  380. * dp_tx_prepare_htt_metadata() - Prepare HTT metadata for special frames
  381. * @vdev: DP vdev Handle
  382. * @nbuf: skb
  383. * @msdu_info: msdu_info required to create HTT metadata
  384. *
  385. * Prepares and fills HTT metadata in the frame pre-header for special frames
  386. * that should be transmitted using varying transmit parameters.
  387. * There are 2 VDEV modes that currently needs this special metadata -
  388. * 1) Mesh Mode
  389. * 2) DSRC Mode
  390. *
  391. * Return: HTT metadata size
  392. *
  393. */
  394. static uint8_t dp_tx_prepare_htt_metadata(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  395. struct dp_tx_msdu_info_s *msdu_info)
  396. {
  397. uint32_t *meta_data = msdu_info->meta_data;
  398. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  399. (struct htt_tx_msdu_desc_ext2_t *) meta_data;
  400. uint8_t htt_desc_size;
  401. /* Size rounded of multiple of 8 bytes */
  402. uint8_t htt_desc_size_aligned;
  403. uint8_t *hdr = NULL;
  404. /*
  405. * Metadata - HTT MSDU Extension header
  406. */
  407. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  408. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  409. if (vdev->mesh_vdev || msdu_info->is_tx_sniffer ||
  410. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->
  411. meta_data[0]) ||
  412. msdu_info->exception_fw) {
  413. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) <
  414. htt_desc_size_aligned)) {
  415. nbuf = qdf_nbuf_realloc_headroom(nbuf,
  416. htt_desc_size_aligned);
  417. if (!nbuf) {
  418. /*
  419. * qdf_nbuf_realloc_headroom won't do skb_clone
  420. * as skb_realloc_headroom does. so, no free is
  421. * needed here.
  422. */
  423. DP_STATS_INC(vdev,
  424. tx_i.dropped.headroom_insufficient,
  425. 1);
  426. qdf_print(" %s[%d] skb_realloc_headroom failed",
  427. __func__, __LINE__);
  428. return 0;
  429. }
  430. }
  431. /* Fill and add HTT metaheader */
  432. hdr = qdf_nbuf_push_head(nbuf, htt_desc_size_aligned);
  433. if (!hdr) {
  434. dp_tx_err("Error in filling HTT metadata");
  435. return 0;
  436. }
  437. qdf_mem_copy(hdr, desc_ext, htt_desc_size);
  438. } else if (vdev->opmode == wlan_op_mode_ocb) {
  439. /* Todo - Add support for DSRC */
  440. }
  441. return htt_desc_size_aligned;
  442. }
  443. /**
  444. * dp_tx_prepare_tso_ext_desc() - Prepare MSDU extension descriptor for TSO
  445. * @tso_seg: TSO segment to process
  446. * @ext_desc: Pointer to MSDU extension descriptor
  447. *
  448. * Return: void
  449. */
  450. #if defined(FEATURE_TSO)
  451. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  452. void *ext_desc)
  453. {
  454. uint8_t num_frag;
  455. uint32_t tso_flags;
  456. /*
  457. * Set tso_en, tcp_flags(NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN),
  458. * tcp_flag_mask
  459. *
  460. * Checksum enable flags are set in TCL descriptor and not in Extension
  461. * Descriptor (H/W ignores checksum_en flags in MSDU ext descriptor)
  462. */
  463. tso_flags = *(uint32_t *) &tso_seg->tso_flags;
  464. hal_tx_ext_desc_set_tso_flags(ext_desc, tso_flags);
  465. hal_tx_ext_desc_set_msdu_length(ext_desc, tso_seg->tso_flags.l2_len,
  466. tso_seg->tso_flags.ip_len);
  467. hal_tx_ext_desc_set_tcp_seq(ext_desc, tso_seg->tso_flags.tcp_seq_num);
  468. hal_tx_ext_desc_set_ip_id(ext_desc, tso_seg->tso_flags.ip_id);
  469. for (num_frag = 0; num_frag < tso_seg->num_frags; num_frag++) {
  470. uint32_t lo = 0;
  471. uint32_t hi = 0;
  472. qdf_assert_always((tso_seg->tso_frags[num_frag].paddr) &&
  473. (tso_seg->tso_frags[num_frag].length));
  474. qdf_dmaaddr_to_32s(
  475. tso_seg->tso_frags[num_frag].paddr, &lo, &hi);
  476. hal_tx_ext_desc_set_buffer(ext_desc, num_frag, lo, hi,
  477. tso_seg->tso_frags[num_frag].length);
  478. }
  479. return;
  480. }
  481. #else
  482. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  483. void *ext_desc)
  484. {
  485. return;
  486. }
  487. #endif
  488. #if defined(FEATURE_TSO)
  489. /**
  490. * dp_tx_free_tso_seg_list() - Loop through the tso segments
  491. * allocated and free them
  492. * @soc: soc handle
  493. * @free_seg: list of tso segments
  494. * @msdu_info: msdu descriptor
  495. *
  496. * Return: void
  497. */
  498. static void dp_tx_free_tso_seg_list(
  499. struct dp_soc *soc,
  500. struct qdf_tso_seg_elem_t *free_seg,
  501. struct dp_tx_msdu_info_s *msdu_info)
  502. {
  503. struct qdf_tso_seg_elem_t *next_seg;
  504. while (free_seg) {
  505. next_seg = free_seg->next;
  506. dp_tx_tso_desc_free(soc,
  507. msdu_info->tx_queue.desc_pool_id,
  508. free_seg);
  509. free_seg = next_seg;
  510. }
  511. }
  512. /**
  513. * dp_tx_free_tso_num_seg_list() - Loop through the tso num segments
  514. * allocated and free them
  515. * @soc: soc handle
  516. * @free_num_seg: list of tso number segments
  517. * @msdu_info: msdu descriptor
  518. *
  519. * Return: void
  520. */
  521. static void dp_tx_free_tso_num_seg_list(
  522. struct dp_soc *soc,
  523. struct qdf_tso_num_seg_elem_t *free_num_seg,
  524. struct dp_tx_msdu_info_s *msdu_info)
  525. {
  526. struct qdf_tso_num_seg_elem_t *next_num_seg;
  527. while (free_num_seg) {
  528. next_num_seg = free_num_seg->next;
  529. dp_tso_num_seg_free(soc,
  530. msdu_info->tx_queue.desc_pool_id,
  531. free_num_seg);
  532. free_num_seg = next_num_seg;
  533. }
  534. }
  535. /**
  536. * dp_tx_unmap_tso_seg_list() - Loop through the tso segments
  537. * do dma unmap for each segment
  538. * @soc: soc handle
  539. * @free_seg: list of tso segments
  540. * @num_seg_desc: tso number segment descriptor
  541. *
  542. * Return: void
  543. */
  544. static void dp_tx_unmap_tso_seg_list(
  545. struct dp_soc *soc,
  546. struct qdf_tso_seg_elem_t *free_seg,
  547. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  548. {
  549. struct qdf_tso_seg_elem_t *next_seg;
  550. if (qdf_unlikely(!num_seg_desc)) {
  551. DP_TRACE(ERROR, "TSO number seg desc is NULL!");
  552. return;
  553. }
  554. while (free_seg) {
  555. next_seg = free_seg->next;
  556. dp_tx_tso_unmap_segment(soc, free_seg, num_seg_desc);
  557. free_seg = next_seg;
  558. }
  559. }
  560. #ifdef FEATURE_TSO_STATS
  561. /**
  562. * dp_tso_get_stats_idx() - Retrieve the tso packet id
  563. * @pdev: pdev handle
  564. *
  565. * Return: id
  566. */
  567. static uint32_t dp_tso_get_stats_idx(struct dp_pdev *pdev)
  568. {
  569. uint32_t stats_idx;
  570. stats_idx = (((uint32_t)qdf_atomic_inc_return(&pdev->tso_idx))
  571. % CDP_MAX_TSO_PACKETS);
  572. return stats_idx;
  573. }
  574. #else
  575. static int dp_tso_get_stats_idx(struct dp_pdev *pdev)
  576. {
  577. return 0;
  578. }
  579. #endif /* FEATURE_TSO_STATS */
  580. /**
  581. * dp_tx_free_remaining_tso_desc() - do dma unmap for tso segments if any,
  582. * free the tso segments descriptor and
  583. * tso num segments descriptor
  584. * @soc: soc handle
  585. * @msdu_info: msdu descriptor
  586. * @tso_seg_unmap: flag to show if dma unmap is necessary
  587. *
  588. * Return: void
  589. */
  590. static void dp_tx_free_remaining_tso_desc(struct dp_soc *soc,
  591. struct dp_tx_msdu_info_s *msdu_info,
  592. bool tso_seg_unmap)
  593. {
  594. struct qdf_tso_info_t *tso_info = &msdu_info->u.tso_info;
  595. struct qdf_tso_seg_elem_t *free_seg = tso_info->tso_seg_list;
  596. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  597. tso_info->tso_num_seg_list;
  598. /* do dma unmap for each segment */
  599. if (tso_seg_unmap)
  600. dp_tx_unmap_tso_seg_list(soc, free_seg, tso_num_desc);
  601. /* free all tso number segment descriptor though looks only have 1 */
  602. dp_tx_free_tso_num_seg_list(soc, tso_num_desc, msdu_info);
  603. /* free all tso segment descriptor */
  604. dp_tx_free_tso_seg_list(soc, free_seg, msdu_info);
  605. }
  606. /**
  607. * dp_tx_prepare_tso() - Given a jumbo msdu, prepare the TSO info
  608. * @vdev: virtual device handle
  609. * @msdu: network buffer
  610. * @msdu_info: meta data associated with the msdu
  611. *
  612. * Return: QDF_STATUS_SUCCESS success
  613. */
  614. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  615. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  616. {
  617. struct qdf_tso_seg_elem_t *tso_seg;
  618. int num_seg = qdf_nbuf_get_tso_num_seg(msdu);
  619. struct dp_soc *soc = vdev->pdev->soc;
  620. struct dp_pdev *pdev = vdev->pdev;
  621. struct qdf_tso_info_t *tso_info;
  622. struct qdf_tso_num_seg_elem_t *tso_num_seg;
  623. tso_info = &msdu_info->u.tso_info;
  624. tso_info->curr_seg = NULL;
  625. tso_info->tso_seg_list = NULL;
  626. tso_info->num_segs = num_seg;
  627. msdu_info->frm_type = dp_tx_frm_tso;
  628. tso_info->tso_num_seg_list = NULL;
  629. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  630. while (num_seg) {
  631. tso_seg = dp_tx_tso_desc_alloc(
  632. soc, msdu_info->tx_queue.desc_pool_id);
  633. if (tso_seg) {
  634. tso_seg->next = tso_info->tso_seg_list;
  635. tso_info->tso_seg_list = tso_seg;
  636. num_seg--;
  637. } else {
  638. dp_err_rl("Failed to alloc tso seg desc");
  639. DP_STATS_INC_PKT(vdev->pdev,
  640. tso_stats.tso_no_mem_dropped, 1,
  641. qdf_nbuf_len(msdu));
  642. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  643. return QDF_STATUS_E_NOMEM;
  644. }
  645. }
  646. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  647. tso_num_seg = dp_tso_num_seg_alloc(soc,
  648. msdu_info->tx_queue.desc_pool_id);
  649. if (tso_num_seg) {
  650. tso_num_seg->next = tso_info->tso_num_seg_list;
  651. tso_info->tso_num_seg_list = tso_num_seg;
  652. } else {
  653. DP_TRACE(ERROR, "%s: Failed to alloc - Number of segs desc",
  654. __func__);
  655. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  656. return QDF_STATUS_E_NOMEM;
  657. }
  658. msdu_info->num_seg =
  659. qdf_nbuf_get_tso_info(soc->osdev, msdu, tso_info);
  660. TSO_DEBUG(" %s: msdu_info->num_seg: %d", __func__,
  661. msdu_info->num_seg);
  662. if (!(msdu_info->num_seg)) {
  663. /*
  664. * Free allocated TSO seg desc and number seg desc,
  665. * do unmap for segments if dma map has done.
  666. */
  667. DP_TRACE(ERROR, "%s: Failed to get tso info", __func__);
  668. dp_tx_free_remaining_tso_desc(soc, msdu_info, true);
  669. return QDF_STATUS_E_INVAL;
  670. }
  671. dp_tx_tso_history_add(soc, msdu_info->u.tso_info,
  672. msdu, 0, DP_TX_DESC_MAP);
  673. tso_info->curr_seg = tso_info->tso_seg_list;
  674. tso_info->msdu_stats_idx = dp_tso_get_stats_idx(pdev);
  675. dp_tso_packet_update(pdev, tso_info->msdu_stats_idx,
  676. msdu, msdu_info->num_seg);
  677. dp_tso_segment_stats_update(pdev, tso_info->tso_seg_list,
  678. tso_info->msdu_stats_idx);
  679. dp_stats_tso_segment_histogram_update(pdev, msdu_info->num_seg);
  680. return QDF_STATUS_SUCCESS;
  681. }
  682. #else
  683. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  684. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  685. {
  686. return QDF_STATUS_E_NOMEM;
  687. }
  688. #endif
  689. QDF_COMPILE_TIME_ASSERT(dp_tx_htt_metadata_len_check,
  690. (DP_TX_MSDU_INFO_META_DATA_DWORDS * 4 >=
  691. sizeof(struct htt_tx_msdu_desc_ext2_t)));
  692. /**
  693. * dp_tx_prepare_ext_desc() - Allocate and prepare MSDU extension descriptor
  694. * @vdev: DP Vdev handle
  695. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  696. * @desc_pool_id: Descriptor Pool ID
  697. *
  698. * Return:
  699. */
  700. static
  701. struct dp_tx_ext_desc_elem_s *dp_tx_prepare_ext_desc(struct dp_vdev *vdev,
  702. struct dp_tx_msdu_info_s *msdu_info, uint8_t desc_pool_id)
  703. {
  704. uint8_t i;
  705. uint8_t cached_ext_desc[HAL_TX_EXT_DESC_WITH_META_DATA];
  706. struct dp_tx_seg_info_s *seg_info;
  707. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  708. struct dp_soc *soc = vdev->pdev->soc;
  709. /* Allocate an extension descriptor */
  710. msdu_ext_desc = dp_tx_ext_desc_alloc(soc, desc_pool_id);
  711. qdf_mem_zero(&cached_ext_desc[0], HAL_TX_EXT_DESC_WITH_META_DATA);
  712. if (!msdu_ext_desc) {
  713. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  714. return NULL;
  715. }
  716. if (msdu_info->exception_fw &&
  717. qdf_unlikely(vdev->mesh_vdev)) {
  718. qdf_mem_copy(&cached_ext_desc[HAL_TX_EXTENSION_DESC_LEN_BYTES],
  719. &msdu_info->meta_data[0],
  720. sizeof(struct htt_tx_msdu_desc_ext2_t));
  721. qdf_atomic_inc(&soc->num_tx_exception);
  722. msdu_ext_desc->flags |= DP_TX_EXT_DESC_FLAG_METADATA_VALID;
  723. }
  724. switch (msdu_info->frm_type) {
  725. case dp_tx_frm_sg:
  726. case dp_tx_frm_me:
  727. case dp_tx_frm_raw:
  728. seg_info = msdu_info->u.sg_info.curr_seg;
  729. /* Update the buffer pointers in MSDU Extension Descriptor */
  730. for (i = 0; i < seg_info->frag_cnt; i++) {
  731. hal_tx_ext_desc_set_buffer(&cached_ext_desc[0], i,
  732. seg_info->frags[i].paddr_lo,
  733. seg_info->frags[i].paddr_hi,
  734. seg_info->frags[i].len);
  735. }
  736. break;
  737. case dp_tx_frm_tso:
  738. dp_tx_prepare_tso_ext_desc(&msdu_info->u.tso_info.curr_seg->seg,
  739. &cached_ext_desc[0]);
  740. break;
  741. default:
  742. break;
  743. }
  744. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  745. cached_ext_desc, HAL_TX_EXT_DESC_WITH_META_DATA);
  746. hal_tx_ext_desc_sync(&cached_ext_desc[0],
  747. msdu_ext_desc->vaddr);
  748. return msdu_ext_desc;
  749. }
  750. /**
  751. * dp_tx_trace_pkt() - Trace TX packet at DP layer
  752. * @soc: datapath SOC
  753. * @skb: skb to be traced
  754. * @msdu_id: msdu_id of the packet
  755. * @vdev_id: vdev_id of the packet
  756. * @op_mode: Vdev Operation mode
  757. *
  758. * Return: None
  759. */
  760. #ifdef DP_DISABLE_TX_PKT_TRACE
  761. static void dp_tx_trace_pkt(struct dp_soc *soc,
  762. qdf_nbuf_t skb, uint16_t msdu_id,
  763. uint8_t vdev_id, enum QDF_OPMODE op_mode)
  764. {
  765. }
  766. #else
  767. static void dp_tx_trace_pkt(struct dp_soc *soc,
  768. qdf_nbuf_t skb, uint16_t msdu_id,
  769. uint8_t vdev_id, enum QDF_OPMODE op_mode)
  770. {
  771. if (dp_is_tput_high(soc))
  772. return;
  773. QDF_NBUF_CB_TX_PACKET_TRACK(skb) = QDF_NBUF_TX_PKT_DATA_TRACK;
  774. QDF_NBUF_CB_TX_DP_TRACE(skb) = 1;
  775. DPTRACE(qdf_dp_trace_ptr(skb,
  776. QDF_DP_TRACE_LI_DP_TX_PACKET_PTR_RECORD,
  777. QDF_TRACE_DEFAULT_PDEV_ID,
  778. qdf_nbuf_data_addr(skb),
  779. sizeof(qdf_nbuf_data(skb)),
  780. msdu_id, vdev_id, 0,
  781. op_mode));
  782. qdf_dp_trace_log_pkt(vdev_id, skb, QDF_TX, QDF_TRACE_DEFAULT_PDEV_ID,
  783. op_mode);
  784. DPTRACE(qdf_dp_trace_data_pkt(skb, QDF_TRACE_DEFAULT_PDEV_ID,
  785. QDF_DP_TRACE_LI_DP_TX_PACKET_RECORD,
  786. msdu_id, QDF_TX));
  787. }
  788. #endif
  789. #ifdef WLAN_DP_FEATURE_MARK_ICMP_REQ_TO_FW
  790. /**
  791. * dp_tx_is_nbuf_marked_exception() - Check if the packet has been marked as
  792. * exception by the upper layer (OS_IF)
  793. * @soc: DP soc handle
  794. * @nbuf: packet to be transmitted
  795. *
  796. * Return: 1 if the packet is marked as exception,
  797. * 0, if the packet is not marked as exception.
  798. */
  799. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  800. qdf_nbuf_t nbuf)
  801. {
  802. return QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf);
  803. }
  804. #else
  805. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  806. qdf_nbuf_t nbuf)
  807. {
  808. return 0;
  809. }
  810. #endif
  811. #ifdef DP_TRAFFIC_END_INDICATION
  812. /**
  813. * dp_tx_get_traffic_end_indication_pkt() - Allocate and prepare packet to send
  814. * as indication to fw to inform that
  815. * data stream has ended
  816. * @vdev: DP vdev handle
  817. * @nbuf: original buffer from network stack
  818. *
  819. * Return: NULL on failure,
  820. * nbuf on success
  821. */
  822. static inline qdf_nbuf_t
  823. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  824. qdf_nbuf_t nbuf)
  825. {
  826. /* Packet length should be enough to copy upto L3 header */
  827. uint8_t end_nbuf_len = 64;
  828. uint8_t htt_desc_size_aligned;
  829. uint8_t htt_desc_size;
  830. qdf_nbuf_t end_nbuf;
  831. if (qdf_unlikely(QDF_NBUF_CB_GET_PACKET_TYPE(nbuf) ==
  832. QDF_NBUF_CB_PACKET_TYPE_END_INDICATION)) {
  833. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  834. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  835. end_nbuf = qdf_nbuf_queue_remove(&vdev->end_ind_pkt_q);
  836. if (!end_nbuf) {
  837. end_nbuf = qdf_nbuf_alloc(NULL,
  838. (htt_desc_size_aligned +
  839. end_nbuf_len),
  840. htt_desc_size_aligned,
  841. 8, false);
  842. if (!end_nbuf) {
  843. dp_err("Packet allocation failed");
  844. goto out;
  845. }
  846. } else {
  847. qdf_nbuf_reset(end_nbuf, htt_desc_size_aligned, 8);
  848. }
  849. qdf_mem_copy(qdf_nbuf_data(end_nbuf), qdf_nbuf_data(nbuf),
  850. end_nbuf_len);
  851. qdf_nbuf_set_pktlen(end_nbuf, end_nbuf_len);
  852. return end_nbuf;
  853. }
  854. out:
  855. return NULL;
  856. }
  857. /**
  858. * dp_tx_send_traffic_end_indication_pkt() - Send indication packet to FW
  859. * via exception path.
  860. * @vdev: DP vdev handle
  861. * @end_nbuf: skb to send as indication
  862. * @msdu_info: msdu_info of original nbuf
  863. * @peer_id: peer id
  864. *
  865. * Return: None
  866. */
  867. static inline void
  868. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  869. qdf_nbuf_t end_nbuf,
  870. struct dp_tx_msdu_info_s *msdu_info,
  871. uint16_t peer_id)
  872. {
  873. struct dp_tx_msdu_info_s e_msdu_info = {0};
  874. qdf_nbuf_t nbuf;
  875. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  876. (struct htt_tx_msdu_desc_ext2_t *)(e_msdu_info.meta_data);
  877. e_msdu_info.tx_queue = msdu_info->tx_queue;
  878. e_msdu_info.tid = msdu_info->tid;
  879. e_msdu_info.exception_fw = 1;
  880. desc_ext->host_tx_desc_pool = 1;
  881. desc_ext->traffic_end_indication = 1;
  882. nbuf = dp_tx_send_msdu_single(vdev, end_nbuf, &e_msdu_info,
  883. peer_id, NULL);
  884. if (nbuf) {
  885. dp_err("Traffic end indication packet tx failed");
  886. qdf_nbuf_free(nbuf);
  887. }
  888. }
  889. /**
  890. * dp_tx_traffic_end_indication_set_desc_flag() - Set tx descriptor flag to
  891. * mark it traffic end indication
  892. * packet.
  893. * @tx_desc: Tx descriptor pointer
  894. * @msdu_info: msdu_info structure pointer
  895. *
  896. * Return: None
  897. */
  898. static inline void
  899. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  900. struct dp_tx_msdu_info_s *msdu_info)
  901. {
  902. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  903. (struct htt_tx_msdu_desc_ext2_t *)(msdu_info->meta_data);
  904. if (qdf_unlikely(desc_ext->traffic_end_indication))
  905. tx_desc->flags |= DP_TX_DESC_FLAG_TRAFFIC_END_IND;
  906. }
  907. /**
  908. * dp_tx_traffic_end_indication_enq_ind_pkt() - Enqueue the packet instead of
  909. * freeing which are associated
  910. * with traffic end indication
  911. * flagged descriptor.
  912. * @soc: dp soc handle
  913. * @desc: Tx descriptor pointer
  914. * @nbuf: buffer pointer
  915. *
  916. * Return: True if packet gets enqueued else false
  917. */
  918. static bool
  919. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  920. struct dp_tx_desc_s *desc,
  921. qdf_nbuf_t nbuf)
  922. {
  923. struct dp_vdev *vdev = NULL;
  924. if (qdf_unlikely((desc->flags &
  925. DP_TX_DESC_FLAG_TRAFFIC_END_IND) != 0)) {
  926. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  927. DP_MOD_ID_TX_COMP);
  928. if (vdev) {
  929. qdf_nbuf_queue_add(&vdev->end_ind_pkt_q, nbuf);
  930. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_COMP);
  931. return true;
  932. }
  933. }
  934. return false;
  935. }
  936. /**
  937. * dp_tx_traffic_end_indication_is_enabled() - get the feature
  938. * enable/disable status
  939. * @vdev: dp vdev handle
  940. *
  941. * Return: True if feature is enable else false
  942. */
  943. static inline bool
  944. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  945. {
  946. return qdf_unlikely(vdev->traffic_end_ind_en);
  947. }
  948. static inline qdf_nbuf_t
  949. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  950. struct dp_tx_msdu_info_s *msdu_info,
  951. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  952. {
  953. if (dp_tx_traffic_end_indication_is_enabled(vdev))
  954. end_nbuf = dp_tx_get_traffic_end_indication_pkt(vdev, nbuf);
  955. nbuf = dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  956. if (qdf_unlikely(end_nbuf))
  957. dp_tx_send_traffic_end_indication_pkt(vdev, end_nbuf,
  958. msdu_info, peer_id);
  959. return nbuf;
  960. }
  961. #else
  962. static inline qdf_nbuf_t
  963. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  964. qdf_nbuf_t nbuf)
  965. {
  966. return NULL;
  967. }
  968. static inline void
  969. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  970. qdf_nbuf_t end_nbuf,
  971. struct dp_tx_msdu_info_s *msdu_info,
  972. uint16_t peer_id)
  973. {}
  974. static inline void
  975. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  976. struct dp_tx_msdu_info_s *msdu_info)
  977. {}
  978. static inline bool
  979. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  980. struct dp_tx_desc_s *desc,
  981. qdf_nbuf_t nbuf)
  982. {
  983. return false;
  984. }
  985. static inline bool
  986. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  987. {
  988. return false;
  989. }
  990. static inline qdf_nbuf_t
  991. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  992. struct dp_tx_msdu_info_s *msdu_info,
  993. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  994. {
  995. return dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  996. }
  997. #endif
  998. #if defined(QCA_SUPPORT_WDS_EXTENDED)
  999. static bool
  1000. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1001. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1002. {
  1003. if (soc->features.wds_ext_ast_override_enable &&
  1004. tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1005. return true;
  1006. return false;
  1007. }
  1008. #else
  1009. static bool
  1010. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1011. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1012. {
  1013. return false;
  1014. }
  1015. #endif
  1016. /**
  1017. * dp_tx_prepare_desc_single() - Allocate and prepare Tx descriptor
  1018. * @vdev: DP vdev handle
  1019. * @nbuf: skb
  1020. * @desc_pool_id: Descriptor pool ID
  1021. * @msdu_info: Metadata to the fw
  1022. * @tx_exc_metadata: Handle that holds exception path metadata
  1023. *
  1024. * Allocate and prepare Tx descriptor with msdu information.
  1025. *
  1026. * Return: Pointer to Tx Descriptor on success,
  1027. * NULL on failure
  1028. */
  1029. static
  1030. struct dp_tx_desc_s *dp_tx_prepare_desc_single(struct dp_vdev *vdev,
  1031. qdf_nbuf_t nbuf, uint8_t desc_pool_id,
  1032. struct dp_tx_msdu_info_s *msdu_info,
  1033. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1034. {
  1035. uint8_t align_pad;
  1036. uint8_t is_exception = 0;
  1037. uint8_t htt_hdr_size;
  1038. struct dp_tx_desc_s *tx_desc;
  1039. struct dp_pdev *pdev = vdev->pdev;
  1040. struct dp_soc *soc = pdev->soc;
  1041. if (dp_tx_limit_check(vdev, nbuf))
  1042. return NULL;
  1043. /* Allocate software Tx descriptor */
  1044. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1045. if (qdf_unlikely(!tx_desc)) {
  1046. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1047. DP_STATS_INC(vdev, tx_i.dropped.desc_na_exc_alloc_fail.num, 1);
  1048. return NULL;
  1049. }
  1050. dp_tx_outstanding_inc(pdev);
  1051. /* Initialize the SW tx descriptor */
  1052. tx_desc->nbuf = nbuf;
  1053. tx_desc->frm_type = dp_tx_frm_std;
  1054. tx_desc->tx_encap_type = ((tx_exc_metadata &&
  1055. (tx_exc_metadata->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE)) ?
  1056. tx_exc_metadata->tx_encap_type : vdev->tx_encap_type);
  1057. tx_desc->vdev_id = vdev->vdev_id;
  1058. tx_desc->pdev = pdev;
  1059. tx_desc->msdu_ext_desc = NULL;
  1060. tx_desc->pkt_offset = 0;
  1061. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1062. tx_desc->shinfo_addr = skb_end_pointer(nbuf);
  1063. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id,
  1064. vdev->qdf_opmode);
  1065. if (qdf_unlikely(vdev->multipass_en)) {
  1066. if (!dp_tx_multipass_process(soc, vdev, nbuf, msdu_info))
  1067. goto failure;
  1068. }
  1069. /* Packets marked by upper layer (OS-IF) to be sent to FW */
  1070. if (dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1071. is_exception = 1;
  1072. /* for BE chipsets if wds extension was enbled will not mark FW
  1073. * in desc will mark ast index based search for ast index.
  1074. */
  1075. if (dp_tx_is_wds_ast_override_en(soc, tx_exc_metadata))
  1076. return tx_desc;
  1077. /*
  1078. * For special modes (vdev_type == ocb or mesh), data frames should be
  1079. * transmitted using varying transmit parameters (tx spec) which include
  1080. * transmit rate, power, priority, channel, channel bandwidth , nss etc.
  1081. * These are filled in HTT MSDU descriptor and sent in frame pre-header.
  1082. * These frames are sent as exception packets to firmware.
  1083. *
  1084. * HW requirement is that metadata should always point to a
  1085. * 8-byte aligned address. So we add alignment pad to start of buffer.
  1086. * HTT Metadata should be ensured to be multiple of 8-bytes,
  1087. * to get 8-byte aligned start address along with align_pad added
  1088. *
  1089. * |-----------------------------|
  1090. * | |
  1091. * |-----------------------------| <-----Buffer Pointer Address given
  1092. * | | ^ in HW descriptor (aligned)
  1093. * | HTT Metadata | |
  1094. * | | |
  1095. * | | | Packet Offset given in descriptor
  1096. * | | |
  1097. * |-----------------------------| |
  1098. * | Alignment Pad | v
  1099. * |-----------------------------| <----- Actual buffer start address
  1100. * | SKB Data | (Unaligned)
  1101. * | |
  1102. * | |
  1103. * | |
  1104. * | |
  1105. * | |
  1106. * |-----------------------------|
  1107. */
  1108. if (qdf_unlikely((msdu_info->exception_fw)) ||
  1109. (vdev->opmode == wlan_op_mode_ocb) ||
  1110. (tx_exc_metadata &&
  1111. tx_exc_metadata->is_tx_sniffer)) {
  1112. align_pad = ((unsigned long) qdf_nbuf_data(nbuf)) & 0x7;
  1113. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) < align_pad)) {
  1114. DP_STATS_INC(vdev,
  1115. tx_i.dropped.headroom_insufficient, 1);
  1116. goto failure;
  1117. }
  1118. if (qdf_nbuf_push_head(nbuf, align_pad) == NULL) {
  1119. dp_tx_err("qdf_nbuf_push_head failed");
  1120. goto failure;
  1121. }
  1122. htt_hdr_size = dp_tx_prepare_htt_metadata(vdev, nbuf,
  1123. msdu_info);
  1124. if (htt_hdr_size == 0)
  1125. goto failure;
  1126. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1127. tx_desc->pkt_offset = align_pad + htt_hdr_size;
  1128. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1129. dp_tx_traffic_end_indication_set_desc_flag(tx_desc,
  1130. msdu_info);
  1131. is_exception = 1;
  1132. tx_desc->length -= tx_desc->pkt_offset;
  1133. }
  1134. #if !TQM_BYPASS_WAR
  1135. if (is_exception || tx_exc_metadata)
  1136. #endif
  1137. {
  1138. /* Temporary WAR due to TQM VP issues */
  1139. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1140. qdf_atomic_inc(&soc->num_tx_exception);
  1141. }
  1142. return tx_desc;
  1143. failure:
  1144. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1145. return NULL;
  1146. }
  1147. /**
  1148. * dp_tx_prepare_desc() - Allocate and prepare Tx descriptor for multisegment
  1149. * frame
  1150. * @vdev: DP vdev handle
  1151. * @nbuf: skb
  1152. * @msdu_info: Info to be setup in MSDU descriptor and MSDU extension descriptor
  1153. * @desc_pool_id : Descriptor Pool ID
  1154. *
  1155. * Allocate and prepare Tx descriptor with msdu and fragment descritor
  1156. * information. For frames with fragments, allocate and prepare
  1157. * an MSDU extension descriptor
  1158. *
  1159. * Return: Pointer to Tx Descriptor on success,
  1160. * NULL on failure
  1161. */
  1162. static struct dp_tx_desc_s *dp_tx_prepare_desc(struct dp_vdev *vdev,
  1163. qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info,
  1164. uint8_t desc_pool_id)
  1165. {
  1166. struct dp_tx_desc_s *tx_desc;
  1167. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  1168. struct dp_pdev *pdev = vdev->pdev;
  1169. struct dp_soc *soc = pdev->soc;
  1170. if (dp_tx_limit_check(vdev, nbuf))
  1171. return NULL;
  1172. /* Allocate software Tx descriptor */
  1173. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1174. if (!tx_desc) {
  1175. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1176. return NULL;
  1177. }
  1178. dp_tx_tso_seg_history_add(soc, msdu_info->u.tso_info.curr_seg,
  1179. nbuf, tx_desc->id, DP_TX_DESC_COOKIE);
  1180. dp_tx_outstanding_inc(pdev);
  1181. /* Initialize the SW tx descriptor */
  1182. tx_desc->nbuf = nbuf;
  1183. tx_desc->frm_type = msdu_info->frm_type;
  1184. tx_desc->tx_encap_type = vdev->tx_encap_type;
  1185. tx_desc->vdev_id = vdev->vdev_id;
  1186. tx_desc->pdev = pdev;
  1187. tx_desc->pkt_offset = 0;
  1188. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id,
  1189. vdev->qdf_opmode);
  1190. /* Handle scattered frames - TSO/SG/ME */
  1191. /* Allocate and prepare an extension descriptor for scattered frames */
  1192. msdu_ext_desc = dp_tx_prepare_ext_desc(vdev, msdu_info, desc_pool_id);
  1193. if (!msdu_ext_desc) {
  1194. dp_tx_info("Tx Extension Descriptor Alloc Fail");
  1195. goto failure;
  1196. }
  1197. #if !TQM_BYPASS_WAR
  1198. if (qdf_unlikely(msdu_info->exception_fw) ||
  1199. dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1200. #endif
  1201. {
  1202. /* Temporary WAR due to TQM VP issues */
  1203. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1204. qdf_atomic_inc(&soc->num_tx_exception);
  1205. }
  1206. tx_desc->msdu_ext_desc = msdu_ext_desc;
  1207. tx_desc->flags |= DP_TX_DESC_FLAG_FRAG;
  1208. msdu_ext_desc->tso_desc = msdu_info->u.tso_info.curr_seg;
  1209. msdu_ext_desc->tso_num_desc = msdu_info->u.tso_info.tso_num_seg_list;
  1210. tx_desc->dma_addr = msdu_ext_desc->paddr;
  1211. if (msdu_ext_desc->flags & DP_TX_EXT_DESC_FLAG_METADATA_VALID)
  1212. tx_desc->length = HAL_TX_EXT_DESC_WITH_META_DATA;
  1213. else
  1214. tx_desc->length = HAL_TX_EXTENSION_DESC_LEN_BYTES;
  1215. return tx_desc;
  1216. failure:
  1217. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1218. return NULL;
  1219. }
  1220. /**
  1221. * dp_tx_prepare_raw() - Prepare RAW packet TX
  1222. * @vdev: DP vdev handle
  1223. * @nbuf: buffer pointer
  1224. * @seg_info: Pointer to Segment info Descriptor to be prepared
  1225. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension
  1226. * descriptor
  1227. *
  1228. * Return:
  1229. */
  1230. static qdf_nbuf_t dp_tx_prepare_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1231. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  1232. {
  1233. qdf_nbuf_t curr_nbuf = NULL;
  1234. uint16_t total_len = 0;
  1235. qdf_dma_addr_t paddr;
  1236. int32_t i;
  1237. int32_t mapped_buf_num = 0;
  1238. struct dp_tx_sg_info_s *sg_info = &msdu_info->u.sg_info;
  1239. qdf_dot3_qosframe_t *qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  1240. DP_STATS_INC_PKT(vdev, tx_i.raw.raw_pkt, 1, qdf_nbuf_len(nbuf));
  1241. /* Continue only if frames are of DATA type */
  1242. if (!DP_FRAME_IS_DATA(qos_wh)) {
  1243. DP_STATS_INC(vdev, tx_i.raw.invalid_raw_pkt_datatype, 1);
  1244. dp_tx_debug("Pkt. recd is of not data type");
  1245. goto error;
  1246. }
  1247. /* SWAR for HW: Enable WEP bit in the AMSDU frames for RAW mode */
  1248. if (vdev->raw_mode_war &&
  1249. (qos_wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) &&
  1250. (qos_wh->i_qos[0] & IEEE80211_QOS_AMSDU))
  1251. qos_wh->i_fc[1] |= IEEE80211_FC1_WEP;
  1252. for (curr_nbuf = nbuf, i = 0; curr_nbuf;
  1253. curr_nbuf = qdf_nbuf_next(curr_nbuf), i++) {
  1254. /*
  1255. * Number of nbuf's must not exceed the size of the frags
  1256. * array in seg_info.
  1257. */
  1258. if (i >= DP_TX_MAX_NUM_FRAGS) {
  1259. dp_err_rl("nbuf cnt exceeds the max number of segs");
  1260. DP_STATS_INC(vdev, tx_i.raw.num_frags_overflow_err, 1);
  1261. goto error;
  1262. }
  1263. if (QDF_STATUS_SUCCESS !=
  1264. qdf_nbuf_map_nbytes_single(vdev->osdev,
  1265. curr_nbuf,
  1266. QDF_DMA_TO_DEVICE,
  1267. curr_nbuf->len)) {
  1268. dp_tx_err("%s dma map error ", __func__);
  1269. DP_STATS_INC(vdev, tx_i.raw.dma_map_error, 1);
  1270. goto error;
  1271. }
  1272. /* Update the count of mapped nbuf's */
  1273. mapped_buf_num++;
  1274. paddr = qdf_nbuf_get_frag_paddr(curr_nbuf, 0);
  1275. seg_info->frags[i].paddr_lo = paddr;
  1276. seg_info->frags[i].paddr_hi = ((uint64_t)paddr >> 32);
  1277. seg_info->frags[i].len = qdf_nbuf_len(curr_nbuf);
  1278. seg_info->frags[i].vaddr = (void *) curr_nbuf;
  1279. total_len += qdf_nbuf_len(curr_nbuf);
  1280. }
  1281. seg_info->frag_cnt = i;
  1282. seg_info->total_len = total_len;
  1283. seg_info->next = NULL;
  1284. sg_info->curr_seg = seg_info;
  1285. msdu_info->frm_type = dp_tx_frm_raw;
  1286. msdu_info->num_seg = 1;
  1287. return nbuf;
  1288. error:
  1289. i = 0;
  1290. while (nbuf) {
  1291. curr_nbuf = nbuf;
  1292. if (i < mapped_buf_num) {
  1293. qdf_nbuf_unmap_nbytes_single(vdev->osdev, curr_nbuf,
  1294. QDF_DMA_TO_DEVICE,
  1295. curr_nbuf->len);
  1296. i++;
  1297. }
  1298. nbuf = qdf_nbuf_next(nbuf);
  1299. qdf_nbuf_free(curr_nbuf);
  1300. }
  1301. return NULL;
  1302. }
  1303. /**
  1304. * dp_tx_raw_prepare_unset() - unmap the chain of nbufs belonging to RAW frame.
  1305. * @soc: DP soc handle
  1306. * @nbuf: Buffer pointer
  1307. *
  1308. * unmap the chain of nbufs that belong to this RAW frame.
  1309. *
  1310. * Return: None
  1311. */
  1312. static void dp_tx_raw_prepare_unset(struct dp_soc *soc,
  1313. qdf_nbuf_t nbuf)
  1314. {
  1315. qdf_nbuf_t cur_nbuf = nbuf;
  1316. do {
  1317. qdf_nbuf_unmap_nbytes_single(soc->osdev, cur_nbuf,
  1318. QDF_DMA_TO_DEVICE,
  1319. cur_nbuf->len);
  1320. cur_nbuf = qdf_nbuf_next(cur_nbuf);
  1321. } while (cur_nbuf);
  1322. }
  1323. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1324. void dp_vdev_peer_stats_update_protocol_cnt_tx(struct dp_vdev *vdev_hdl,
  1325. qdf_nbuf_t nbuf)
  1326. {
  1327. qdf_nbuf_t nbuf_local;
  1328. struct dp_vdev *vdev_local = vdev_hdl;
  1329. do {
  1330. if (qdf_likely(!((vdev_local)->peer_protocol_count_track)))
  1331. break;
  1332. nbuf_local = nbuf;
  1333. if (qdf_unlikely(((vdev_local)->tx_encap_type) ==
  1334. htt_cmn_pkt_type_raw))
  1335. break;
  1336. else if (qdf_unlikely(qdf_nbuf_is_nonlinear((nbuf_local))))
  1337. break;
  1338. else if (qdf_nbuf_is_tso((nbuf_local)))
  1339. break;
  1340. dp_vdev_peer_stats_update_protocol_cnt((vdev_local),
  1341. (nbuf_local),
  1342. NULL, 1, 0);
  1343. } while (0);
  1344. }
  1345. #endif
  1346. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1347. void dp_tx_update_stats(struct dp_soc *soc,
  1348. struct dp_tx_desc_s *tx_desc,
  1349. uint8_t ring_id)
  1350. {
  1351. uint32_t stats_len = dp_tx_get_pkt_len(tx_desc);
  1352. DP_STATS_INC_PKT(soc, tx.egress[ring_id], 1, stats_len);
  1353. }
  1354. int
  1355. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1356. struct dp_tx_desc_s *tx_desc,
  1357. uint8_t tid,
  1358. struct dp_tx_msdu_info_s *msdu_info,
  1359. uint8_t ring_id)
  1360. {
  1361. struct dp_swlm *swlm = &soc->swlm;
  1362. union swlm_data swlm_query_data;
  1363. struct dp_swlm_tcl_data tcl_data;
  1364. QDF_STATUS status;
  1365. int ret;
  1366. if (!swlm->is_enabled)
  1367. return msdu_info->skip_hp_update;
  1368. tcl_data.nbuf = tx_desc->nbuf;
  1369. tcl_data.tid = tid;
  1370. tcl_data.ring_id = ring_id;
  1371. tcl_data.pkt_len = dp_tx_get_pkt_len(tx_desc);
  1372. tcl_data.num_ll_connections = vdev->num_latency_critical_conn;
  1373. swlm_query_data.tcl_data = &tcl_data;
  1374. status = dp_swlm_tcl_pre_check(soc, &tcl_data);
  1375. if (QDF_IS_STATUS_ERROR(status)) {
  1376. dp_swlm_tcl_reset_session_data(soc, ring_id);
  1377. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1378. return 0;
  1379. }
  1380. ret = dp_swlm_query_policy(soc, TCL_DATA, swlm_query_data);
  1381. if (ret) {
  1382. DP_STATS_INC(swlm, tcl[ring_id].coalesce_success, 1);
  1383. } else {
  1384. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1385. }
  1386. return ret;
  1387. }
  1388. void
  1389. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1390. int coalesce)
  1391. {
  1392. if (coalesce)
  1393. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1394. else
  1395. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  1396. }
  1397. static inline void
  1398. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1399. {
  1400. if (((i + 1) < msdu_info->num_seg))
  1401. msdu_info->skip_hp_update = 1;
  1402. else
  1403. msdu_info->skip_hp_update = 0;
  1404. }
  1405. static inline void
  1406. dp_flush_tcp_hp(struct dp_soc *soc, uint8_t ring_id)
  1407. {
  1408. hal_ring_handle_t hal_ring_hdl =
  1409. dp_tx_get_hal_ring_hdl(soc, ring_id);
  1410. if (dp_tx_hal_ring_access_start(soc, hal_ring_hdl)) {
  1411. dp_err("Fillmore: SRNG access start failed");
  1412. return;
  1413. }
  1414. dp_tx_ring_access_end_wrapper(soc, hal_ring_hdl, 0);
  1415. }
  1416. static inline void
  1417. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1418. QDF_STATUS status,
  1419. struct dp_tx_msdu_info_s *msdu_info)
  1420. {
  1421. if (QDF_IS_STATUS_ERROR(status) && !msdu_info->skip_hp_update) {
  1422. dp_flush_tcp_hp(soc,
  1423. (msdu_info->tx_queue.ring_id & DP_TX_QUEUE_MASK));
  1424. }
  1425. }
  1426. #else
  1427. static inline void
  1428. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1429. {
  1430. }
  1431. static inline void
  1432. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1433. QDF_STATUS status,
  1434. struct dp_tx_msdu_info_s *msdu_info)
  1435. {
  1436. }
  1437. #endif
  1438. #ifdef FEATURE_RUNTIME_PM
  1439. void
  1440. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1441. hal_ring_handle_t hal_ring_hdl,
  1442. int coalesce)
  1443. {
  1444. int ret;
  1445. /*
  1446. * Avoid runtime get and put APIs under high throughput scenarios.
  1447. */
  1448. if (dp_get_rtpm_tput_policy_requirement(soc)) {
  1449. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1450. return;
  1451. }
  1452. ret = hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_DP);
  1453. if (QDF_IS_STATUS_SUCCESS(ret)) {
  1454. if (hif_system_pm_state_check(soc->hif_handle)) {
  1455. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1456. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1457. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1458. } else {
  1459. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1460. }
  1461. hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_DP);
  1462. } else {
  1463. dp_runtime_get(soc);
  1464. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1465. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1466. qdf_atomic_inc(&soc->tx_pending_rtpm);
  1467. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1468. dp_runtime_put(soc);
  1469. }
  1470. }
  1471. #else
  1472. #ifdef DP_POWER_SAVE
  1473. void
  1474. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1475. hal_ring_handle_t hal_ring_hdl,
  1476. int coalesce)
  1477. {
  1478. if (hif_system_pm_state_check(soc->hif_handle)) {
  1479. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1480. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1481. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1482. } else {
  1483. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1484. }
  1485. }
  1486. #endif
  1487. #endif
  1488. /**
  1489. * dp_tx_get_tid() - Obtain TID to be used for this frame
  1490. * @vdev: DP vdev handle
  1491. * @nbuf: skb
  1492. * @msdu_info: msdu descriptor
  1493. *
  1494. * Extract the DSCP or PCP information from frame and map into TID value.
  1495. *
  1496. * Return: void
  1497. */
  1498. static void dp_tx_get_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1499. struct dp_tx_msdu_info_s *msdu_info)
  1500. {
  1501. uint8_t tos = 0, dscp_tid_override = 0;
  1502. uint8_t *hdr_ptr, *L3datap;
  1503. uint8_t is_mcast = 0;
  1504. qdf_ether_header_t *eh = NULL;
  1505. qdf_ethervlan_header_t *evh = NULL;
  1506. uint16_t ether_type;
  1507. qdf_llc_t *llcHdr;
  1508. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1509. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1510. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1511. eh = (qdf_ether_header_t *)nbuf->data;
  1512. hdr_ptr = (uint8_t *)(eh->ether_dhost);
  1513. L3datap = hdr_ptr + sizeof(qdf_ether_header_t);
  1514. } else {
  1515. qdf_dot3_qosframe_t *qos_wh =
  1516. (qdf_dot3_qosframe_t *) nbuf->data;
  1517. msdu_info->tid = qos_wh->i_fc[0] & DP_FC0_SUBTYPE_QOS ?
  1518. qos_wh->i_qos[0] & DP_QOS_TID : 0;
  1519. return;
  1520. }
  1521. is_mcast = DP_FRAME_IS_MULTICAST(hdr_ptr);
  1522. ether_type = eh->ether_type;
  1523. llcHdr = (qdf_llc_t *)(nbuf->data + sizeof(qdf_ether_header_t));
  1524. /*
  1525. * Check if packet is dot3 or eth2 type.
  1526. */
  1527. if (DP_FRAME_IS_LLC(ether_type) && DP_FRAME_IS_SNAP(llcHdr)) {
  1528. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE +
  1529. sizeof(*llcHdr));
  1530. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1531. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t) +
  1532. sizeof(*llcHdr);
  1533. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE
  1534. + sizeof(*llcHdr) +
  1535. sizeof(qdf_net_vlanhdr_t));
  1536. } else {
  1537. L3datap = hdr_ptr + sizeof(qdf_ether_header_t) +
  1538. sizeof(*llcHdr);
  1539. }
  1540. } else {
  1541. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1542. evh = (qdf_ethervlan_header_t *) eh;
  1543. ether_type = evh->ether_type;
  1544. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t);
  1545. }
  1546. }
  1547. /*
  1548. * Find priority from IP TOS DSCP field
  1549. */
  1550. if (qdf_nbuf_is_ipv4_pkt(nbuf)) {
  1551. qdf_net_iphdr_t *ip = (qdf_net_iphdr_t *) L3datap;
  1552. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) {
  1553. /* Only for unicast frames */
  1554. if (!is_mcast) {
  1555. /* send it on VO queue */
  1556. msdu_info->tid = DP_VO_TID;
  1557. }
  1558. } else {
  1559. /*
  1560. * IP frame: exclude ECN bits 0-1 and map DSCP bits 2-7
  1561. * from TOS byte.
  1562. */
  1563. tos = ip->ip_tos;
  1564. dscp_tid_override = 1;
  1565. }
  1566. } else if (qdf_nbuf_is_ipv6_pkt(nbuf)) {
  1567. /* TODO
  1568. * use flowlabel
  1569. *igmpmld cases to be handled in phase 2
  1570. */
  1571. unsigned long ver_pri_flowlabel;
  1572. unsigned long pri;
  1573. ver_pri_flowlabel = *(unsigned long *) L3datap;
  1574. pri = (ntohl(ver_pri_flowlabel) & IPV6_FLOWINFO_PRIORITY) >>
  1575. DP_IPV6_PRIORITY_SHIFT;
  1576. tos = pri;
  1577. dscp_tid_override = 1;
  1578. } else if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1579. msdu_info->tid = DP_VO_TID;
  1580. else if (qdf_nbuf_is_ipv4_arp_pkt(nbuf)) {
  1581. /* Only for unicast frames */
  1582. if (!is_mcast) {
  1583. /* send ucast arp on VO queue */
  1584. msdu_info->tid = DP_VO_TID;
  1585. }
  1586. }
  1587. /*
  1588. * Assign all MCAST packets to BE
  1589. */
  1590. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1591. if (is_mcast) {
  1592. tos = 0;
  1593. dscp_tid_override = 1;
  1594. }
  1595. }
  1596. if (dscp_tid_override == 1) {
  1597. tos = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  1598. msdu_info->tid = pdev->dscp_tid_map[vdev->dscp_tid_map_id][tos];
  1599. }
  1600. if (msdu_info->tid >= CDP_MAX_DATA_TIDS)
  1601. msdu_info->tid = CDP_MAX_DATA_TIDS - 1;
  1602. return;
  1603. }
  1604. /**
  1605. * dp_tx_classify_tid() - Obtain TID to be used for this frame
  1606. * @vdev: DP vdev handle
  1607. * @nbuf: skb
  1608. * @msdu_info: msdu descriptor
  1609. *
  1610. * Software based TID classification is required when more than 2 DSCP-TID
  1611. * mapping tables are needed.
  1612. * Hardware supports 2 DSCP-TID mapping tables for HKv1 and 48 for HKv2.
  1613. *
  1614. * Return: void
  1615. */
  1616. static inline void dp_tx_classify_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1617. struct dp_tx_msdu_info_s *msdu_info)
  1618. {
  1619. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1620. /*
  1621. * skip_sw_tid_classification flag will set in below cases-
  1622. * 1. vdev->dscp_tid_map_id < pdev->soc->num_hw_dscp_tid_map
  1623. * 2. hlos_tid_override enabled for vdev
  1624. * 3. mesh mode enabled for vdev
  1625. */
  1626. if (qdf_likely(vdev->skip_sw_tid_classification)) {
  1627. /* Update tid in msdu_info from skb priority */
  1628. if (qdf_unlikely(vdev->skip_sw_tid_classification
  1629. & DP_TXRX_HLOS_TID_OVERRIDE_ENABLED)) {
  1630. uint32_t tid = qdf_nbuf_get_priority(nbuf);
  1631. if (tid == DP_TX_INVALID_QOS_TAG)
  1632. return;
  1633. msdu_info->tid = tid;
  1634. return;
  1635. }
  1636. return;
  1637. }
  1638. dp_tx_get_tid(vdev, nbuf, msdu_info);
  1639. }
  1640. #ifdef FEATURE_WLAN_TDLS
  1641. /**
  1642. * dp_tx_update_tdls_flags() - Update descriptor flags for TDLS frame
  1643. * @soc: datapath SOC
  1644. * @vdev: datapath vdev
  1645. * @tx_desc: TX descriptor
  1646. *
  1647. * Return: None
  1648. */
  1649. static void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1650. struct dp_vdev *vdev,
  1651. struct dp_tx_desc_s *tx_desc)
  1652. {
  1653. if (vdev) {
  1654. if (vdev->is_tdls_frame) {
  1655. tx_desc->flags |= DP_TX_DESC_FLAG_TDLS_FRAME;
  1656. vdev->is_tdls_frame = false;
  1657. }
  1658. }
  1659. }
  1660. static uint8_t dp_htt_tx_comp_get_status(struct dp_soc *soc, char *htt_desc)
  1661. {
  1662. uint8_t tx_status = HTT_TX_FW2WBM_TX_STATUS_MAX;
  1663. switch (soc->arch_id) {
  1664. case CDP_ARCH_TYPE_LI:
  1665. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_desc[0]);
  1666. break;
  1667. case CDP_ARCH_TYPE_BE:
  1668. tx_status = HTT_TX_WBM_COMPLETION_V3_TX_STATUS_GET(htt_desc[0]);
  1669. break;
  1670. case CDP_ARCH_TYPE_RH:
  1671. {
  1672. uint32_t *msg_word = (uint32_t *)htt_desc;
  1673. tx_status = HTT_TX_MSDU_INFO_RELEASE_REASON_GET(
  1674. *(msg_word + 3));
  1675. }
  1676. break;
  1677. default:
  1678. dp_err("Incorrect CDP_ARCH %d", soc->arch_id);
  1679. QDF_BUG(0);
  1680. }
  1681. return tx_status;
  1682. }
  1683. /**
  1684. * dp_non_std_htt_tx_comp_free_buff() - Free the non std tx packet buffer
  1685. * @soc: dp_soc handle
  1686. * @tx_desc: TX descriptor
  1687. *
  1688. * Return: None
  1689. */
  1690. static void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1691. struct dp_tx_desc_s *tx_desc)
  1692. {
  1693. uint8_t tx_status = 0;
  1694. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  1695. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1696. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id,
  1697. DP_MOD_ID_TDLS);
  1698. if (qdf_unlikely(!vdev)) {
  1699. dp_err_rl("vdev is null!");
  1700. goto error;
  1701. }
  1702. hal_tx_comp_get_htt_desc(&tx_desc->comp, htt_tx_status);
  1703. tx_status = dp_htt_tx_comp_get_status(soc, htt_tx_status);
  1704. dp_debug("vdev_id: %d tx_status: %d", tx_desc->vdev_id, tx_status);
  1705. if (vdev->tx_non_std_data_callback.func) {
  1706. qdf_nbuf_set_next(nbuf, NULL);
  1707. vdev->tx_non_std_data_callback.func(
  1708. vdev->tx_non_std_data_callback.ctxt,
  1709. nbuf, tx_status);
  1710. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1711. return;
  1712. } else {
  1713. dp_err_rl("callback func is null");
  1714. }
  1715. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1716. error:
  1717. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE);
  1718. qdf_nbuf_free(nbuf);
  1719. }
  1720. /**
  1721. * dp_tx_msdu_single_map() - do nbuf map
  1722. * @vdev: DP vdev handle
  1723. * @tx_desc: DP TX descriptor pointer
  1724. * @nbuf: skb pointer
  1725. *
  1726. * For TDLS frame, use qdf_nbuf_map_single() to align with the unmap
  1727. * operation done in other component.
  1728. *
  1729. * Return: QDF_STATUS
  1730. */
  1731. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1732. struct dp_tx_desc_s *tx_desc,
  1733. qdf_nbuf_t nbuf)
  1734. {
  1735. if (qdf_likely(!(tx_desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME)))
  1736. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1737. nbuf,
  1738. QDF_DMA_TO_DEVICE,
  1739. nbuf->len);
  1740. else
  1741. return qdf_nbuf_map_single(vdev->osdev, nbuf,
  1742. QDF_DMA_TO_DEVICE);
  1743. }
  1744. #else
  1745. static inline void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1746. struct dp_vdev *vdev,
  1747. struct dp_tx_desc_s *tx_desc)
  1748. {
  1749. }
  1750. static inline void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1751. struct dp_tx_desc_s *tx_desc)
  1752. {
  1753. }
  1754. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1755. struct dp_tx_desc_s *tx_desc,
  1756. qdf_nbuf_t nbuf)
  1757. {
  1758. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1759. nbuf,
  1760. QDF_DMA_TO_DEVICE,
  1761. nbuf->len);
  1762. }
  1763. #endif
  1764. static inline
  1765. qdf_dma_addr_t dp_tx_nbuf_map_regular(struct dp_vdev *vdev,
  1766. struct dp_tx_desc_s *tx_desc,
  1767. qdf_nbuf_t nbuf)
  1768. {
  1769. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1770. ret = dp_tx_msdu_single_map(vdev, tx_desc, nbuf);
  1771. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret)))
  1772. return 0;
  1773. return qdf_nbuf_mapped_paddr_get(nbuf);
  1774. }
  1775. static inline
  1776. void dp_tx_nbuf_unmap_regular(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1777. {
  1778. qdf_nbuf_unmap_nbytes_single_paddr(soc->osdev,
  1779. desc->nbuf,
  1780. desc->dma_addr,
  1781. QDF_DMA_TO_DEVICE,
  1782. desc->length);
  1783. }
  1784. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  1785. static inline bool
  1786. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1787. {
  1788. struct net_device *ingress_dev;
  1789. skb_frag_t *frag;
  1790. uint16_t buf_len = 0;
  1791. uint16_t linear_data_len = 0;
  1792. uint8_t *payload_addr = NULL;
  1793. ingress_dev = dev_get_by_index(dev_net(nbuf->dev), nbuf->skb_iif);
  1794. if (!ingress_dev)
  1795. return false;
  1796. if ((ingress_dev->priv_flags & IFF_PHONY_HEADROOM)) {
  1797. dev_put(ingress_dev);
  1798. frag = &(skb_shinfo(nbuf)->frags[0]);
  1799. buf_len = skb_frag_size(frag);
  1800. payload_addr = (uint8_t *)skb_frag_address(frag);
  1801. linear_data_len = skb_headlen(nbuf);
  1802. buf_len += linear_data_len;
  1803. payload_addr = payload_addr - linear_data_len;
  1804. memcpy(payload_addr, nbuf->data, linear_data_len);
  1805. msdu_info->frm_type = dp_tx_frm_rmnet;
  1806. msdu_info->buf_len = buf_len;
  1807. msdu_info->payload_addr = payload_addr;
  1808. return true;
  1809. }
  1810. dev_put(ingress_dev);
  1811. return false;
  1812. }
  1813. static inline
  1814. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1815. struct dp_tx_desc_s *tx_desc)
  1816. {
  1817. qdf_dma_addr_t paddr;
  1818. paddr = (qdf_dma_addr_t)qdf_mem_virt_to_phys(msdu_info->payload_addr);
  1819. tx_desc->length = msdu_info->buf_len;
  1820. qdf_nbuf_dma_clean_range((void *)msdu_info->payload_addr,
  1821. (void *)(msdu_info->payload_addr +
  1822. msdu_info->buf_len));
  1823. tx_desc->flags |= DP_TX_DESC_FLAG_RMNET;
  1824. return paddr;
  1825. }
  1826. #else
  1827. static inline bool
  1828. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1829. {
  1830. return false;
  1831. }
  1832. static inline
  1833. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1834. struct dp_tx_desc_s *tx_desc)
  1835. {
  1836. return 0;
  1837. }
  1838. #endif
  1839. #if defined(QCA_DP_TX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  1840. static inline
  1841. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1842. struct dp_tx_desc_s *tx_desc,
  1843. qdf_nbuf_t nbuf)
  1844. {
  1845. if (qdf_likely(tx_desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  1846. qdf_nbuf_dma_clean_range((void *)nbuf->data,
  1847. (void *)(nbuf->data + nbuf->len));
  1848. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  1849. } else {
  1850. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1851. }
  1852. }
  1853. static inline
  1854. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1855. struct dp_tx_desc_s *desc)
  1856. {
  1857. if (qdf_unlikely(!(desc->flags &
  1858. (DP_TX_DESC_FLAG_SIMPLE | DP_TX_DESC_FLAG_RMNET))))
  1859. return dp_tx_nbuf_unmap_regular(soc, desc);
  1860. }
  1861. #else
  1862. static inline
  1863. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1864. struct dp_tx_desc_s *tx_desc,
  1865. qdf_nbuf_t nbuf)
  1866. {
  1867. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1868. }
  1869. static inline
  1870. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1871. struct dp_tx_desc_s *desc)
  1872. {
  1873. return dp_tx_nbuf_unmap_regular(soc, desc);
  1874. }
  1875. #endif
  1876. #if defined(WLAN_TX_PKT_CAPTURE_ENH) || defined(FEATURE_PERPKT_INFO)
  1877. static inline
  1878. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1879. {
  1880. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_UNMAP_DONE))) {
  1881. dp_tx_nbuf_unmap(soc, desc);
  1882. desc->flags |= DP_TX_DESC_FLAG_UNMAP_DONE;
  1883. }
  1884. }
  1885. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1886. {
  1887. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_UNMAP_DONE)))
  1888. dp_tx_nbuf_unmap(soc, desc);
  1889. }
  1890. #else
  1891. static inline
  1892. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1893. {
  1894. }
  1895. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1896. {
  1897. dp_tx_nbuf_unmap(soc, desc);
  1898. }
  1899. #endif
  1900. #ifdef MESH_MODE_SUPPORT
  1901. /**
  1902. * dp_tx_update_mesh_flags() - Update descriptor flags for mesh VAP
  1903. * @soc: datapath SOC
  1904. * @vdev: datapath vdev
  1905. * @tx_desc: TX descriptor
  1906. *
  1907. * Return: None
  1908. */
  1909. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1910. struct dp_vdev *vdev,
  1911. struct dp_tx_desc_s *tx_desc)
  1912. {
  1913. if (qdf_unlikely(vdev->mesh_vdev))
  1914. tx_desc->flags |= DP_TX_DESC_FLAG_MESH_MODE;
  1915. }
  1916. /**
  1917. * dp_mesh_tx_comp_free_buff() - Free the mesh tx packet buffer
  1918. * @soc: dp_soc handle
  1919. * @tx_desc: TX descriptor
  1920. * @delayed_free: delay the nbuf free
  1921. *
  1922. * Return: nbuf to be freed late
  1923. */
  1924. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1925. struct dp_tx_desc_s *tx_desc,
  1926. bool delayed_free)
  1927. {
  1928. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1929. struct dp_vdev *vdev = NULL;
  1930. vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id, DP_MOD_ID_MESH);
  1931. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW) {
  1932. if (vdev)
  1933. DP_STATS_INC(vdev, tx_i.mesh.completion_fw, 1);
  1934. if (delayed_free)
  1935. return nbuf;
  1936. qdf_nbuf_free(nbuf);
  1937. } else {
  1938. if (vdev && vdev->osif_tx_free_ext) {
  1939. vdev->osif_tx_free_ext((nbuf));
  1940. } else {
  1941. if (delayed_free)
  1942. return nbuf;
  1943. qdf_nbuf_free(nbuf);
  1944. }
  1945. }
  1946. if (vdev)
  1947. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  1948. return NULL;
  1949. }
  1950. #else
  1951. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1952. struct dp_vdev *vdev,
  1953. struct dp_tx_desc_s *tx_desc)
  1954. {
  1955. }
  1956. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1957. struct dp_tx_desc_s *tx_desc,
  1958. bool delayed_free)
  1959. {
  1960. return NULL;
  1961. }
  1962. #endif
  1963. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac)
  1964. {
  1965. struct dp_pdev *pdev = NULL;
  1966. struct dp_ast_entry *src_ast_entry = NULL;
  1967. struct dp_ast_entry *dst_ast_entry = NULL;
  1968. struct dp_soc *soc = NULL;
  1969. qdf_assert(vdev);
  1970. pdev = vdev->pdev;
  1971. qdf_assert(pdev);
  1972. soc = pdev->soc;
  1973. dst_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1974. (soc, dstmac, vdev->pdev->pdev_id);
  1975. src_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1976. (soc, srcmac, vdev->pdev->pdev_id);
  1977. if (dst_ast_entry && src_ast_entry) {
  1978. if (dst_ast_entry->peer_id ==
  1979. src_ast_entry->peer_id)
  1980. return 1;
  1981. }
  1982. return 0;
  1983. }
  1984. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1985. defined(WLAN_MCAST_MLO)
  1986. /* MLO peer id for reinject*/
  1987. #define DP_MLO_MCAST_REINJECT_PEER_ID 0XFFFD
  1988. /* MLO vdev id inc offset */
  1989. #define DP_MLO_VDEV_ID_OFFSET 0x80
  1990. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1991. static inline bool
  1992. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  1993. {
  1994. if (tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1995. return true;
  1996. return false;
  1997. }
  1998. #else
  1999. static inline bool
  2000. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  2001. {
  2002. return false;
  2003. }
  2004. #endif
  2005. static inline void
  2006. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2007. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2008. {
  2009. /* wds ext enabled will not set the TO_FW bit */
  2010. if (dp_tx_wds_ext_check(tx_exc_metadata))
  2011. return;
  2012. if (!(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)) {
  2013. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2014. qdf_atomic_inc(&soc->num_tx_exception);
  2015. }
  2016. }
  2017. static inline void
  2018. dp_tx_update_mcast_param(uint16_t peer_id,
  2019. uint16_t *htt_tcl_metadata,
  2020. struct dp_vdev *vdev,
  2021. struct dp_tx_msdu_info_s *msdu_info)
  2022. {
  2023. if (peer_id == DP_MLO_MCAST_REINJECT_PEER_ID) {
  2024. *htt_tcl_metadata = 0;
  2025. DP_TX_TCL_METADATA_TYPE_SET(
  2026. *htt_tcl_metadata,
  2027. HTT_TCL_METADATA_V2_TYPE_GLOBAL_SEQ_BASED);
  2028. HTT_TX_TCL_METADATA_GLBL_SEQ_NO_SET(*htt_tcl_metadata,
  2029. msdu_info->gsn);
  2030. msdu_info->vdev_id = vdev->vdev_id + DP_MLO_VDEV_ID_OFFSET;
  2031. HTT_TX_TCL_METADATA_GLBL_SEQ_HOST_INSPECTED_SET(
  2032. *htt_tcl_metadata, 1);
  2033. } else {
  2034. msdu_info->vdev_id = vdev->vdev_id;
  2035. }
  2036. }
  2037. #else
  2038. static inline void
  2039. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2040. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2041. {
  2042. }
  2043. static inline void
  2044. dp_tx_update_mcast_param(uint16_t peer_id,
  2045. uint16_t *htt_tcl_metadata,
  2046. struct dp_vdev *vdev,
  2047. struct dp_tx_msdu_info_s *msdu_info)
  2048. {
  2049. }
  2050. #endif
  2051. #ifdef DP_TX_SW_DROP_STATS_INC
  2052. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2053. qdf_nbuf_t nbuf,
  2054. enum cdp_tx_sw_drop drop_code)
  2055. {
  2056. /* EAPOL Drop stats */
  2057. if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) {
  2058. switch (drop_code) {
  2059. case TX_DESC_ERR:
  2060. DP_STATS_INC(pdev, eap_drop_stats.tx_desc_err, 1);
  2061. break;
  2062. case TX_HAL_RING_ACCESS_ERR:
  2063. DP_STATS_INC(pdev,
  2064. eap_drop_stats.tx_hal_ring_access_err, 1);
  2065. break;
  2066. case TX_DMA_MAP_ERR:
  2067. DP_STATS_INC(pdev, eap_drop_stats.tx_dma_map_err, 1);
  2068. break;
  2069. case TX_HW_ENQUEUE:
  2070. DP_STATS_INC(pdev, eap_drop_stats.tx_hw_enqueue, 1);
  2071. break;
  2072. case TX_SW_ENQUEUE:
  2073. DP_STATS_INC(pdev, eap_drop_stats.tx_sw_enqueue, 1);
  2074. break;
  2075. default:
  2076. dp_info_rl("Invalid eapol_drop code: %d", drop_code);
  2077. break;
  2078. }
  2079. }
  2080. }
  2081. #else
  2082. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2083. qdf_nbuf_t nbuf,
  2084. enum cdp_tx_sw_drop drop_code)
  2085. {
  2086. }
  2087. #endif
  2088. qdf_nbuf_t
  2089. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2090. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  2091. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2092. {
  2093. struct dp_pdev *pdev = vdev->pdev;
  2094. struct dp_soc *soc = pdev->soc;
  2095. struct dp_tx_desc_s *tx_desc;
  2096. QDF_STATUS status;
  2097. struct dp_tx_queue *tx_q = &(msdu_info->tx_queue);
  2098. uint16_t htt_tcl_metadata = 0;
  2099. enum cdp_tx_sw_drop drop_code = TX_MAX_DROP;
  2100. uint8_t tid = msdu_info->tid;
  2101. struct cdp_tid_tx_stats *tid_stats = NULL;
  2102. qdf_dma_addr_t paddr;
  2103. /* Setup Tx descriptor for an MSDU, and MSDU extension descriptor */
  2104. tx_desc = dp_tx_prepare_desc_single(vdev, nbuf, tx_q->desc_pool_id,
  2105. msdu_info, tx_exc_metadata);
  2106. if (!tx_desc) {
  2107. dp_err_rl("Tx_desc prepare Fail vdev_id %d vdev %pK queue %d",
  2108. vdev->vdev_id, vdev, tx_q->desc_pool_id);
  2109. drop_code = TX_DESC_ERR;
  2110. goto fail_return;
  2111. }
  2112. dp_tx_update_tdls_flags(soc, vdev, tx_desc);
  2113. if (qdf_unlikely(peer_id == DP_INVALID_PEER)) {
  2114. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2115. DP_TX_TCL_METADATA_HOST_INSPECTED_SET(htt_tcl_metadata, 1);
  2116. } else if (qdf_unlikely(peer_id != HTT_INVALID_PEER)) {
  2117. DP_TX_TCL_METADATA_TYPE_SET(htt_tcl_metadata,
  2118. DP_TCL_METADATA_TYPE_PEER_BASED);
  2119. DP_TX_TCL_METADATA_PEER_ID_SET(htt_tcl_metadata,
  2120. peer_id);
  2121. dp_tx_bypass_reinjection(soc, tx_desc, tx_exc_metadata);
  2122. } else
  2123. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2124. if (msdu_info->exception_fw)
  2125. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2126. dp_tx_desc_update_fast_comp_flag(soc, tx_desc,
  2127. !pdev->enhanced_stats_en);
  2128. dp_tx_update_mesh_flags(soc, vdev, tx_desc);
  2129. if (qdf_unlikely(msdu_info->frm_type == dp_tx_frm_rmnet))
  2130. paddr = dp_tx_rmnet_nbuf_map(msdu_info, tx_desc);
  2131. else
  2132. paddr = dp_tx_nbuf_map(vdev, tx_desc, nbuf);
  2133. if (!paddr) {
  2134. /* Handle failure */
  2135. dp_err("qdf_nbuf_map failed");
  2136. DP_STATS_INC(vdev, tx_i.dropped.dma_error, 1);
  2137. drop_code = TX_DMA_MAP_ERR;
  2138. goto release_desc;
  2139. }
  2140. tx_desc->dma_addr = paddr;
  2141. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2142. tx_desc->id, DP_TX_DESC_MAP);
  2143. dp_tx_update_mcast_param(peer_id, &htt_tcl_metadata, vdev, msdu_info);
  2144. /* Enqueue the Tx MSDU descriptor to HW for transmit */
  2145. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2146. htt_tcl_metadata,
  2147. tx_exc_metadata, msdu_info);
  2148. if (status != QDF_STATUS_SUCCESS) {
  2149. dp_tx_err_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2150. tx_desc, tx_q->ring_id);
  2151. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2152. tx_desc->id, DP_TX_DESC_UNMAP);
  2153. dp_tx_nbuf_unmap(soc, tx_desc);
  2154. drop_code = TX_HW_ENQUEUE;
  2155. goto release_desc;
  2156. }
  2157. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2158. return NULL;
  2159. release_desc:
  2160. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2161. fail_return:
  2162. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2163. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2164. tid_stats = &pdev->stats.tid_stats.
  2165. tid_tx_stats[tx_q->ring_id][tid];
  2166. tid_stats->swdrop_cnt[drop_code]++;
  2167. return nbuf;
  2168. }
  2169. /**
  2170. * dp_tdls_tx_comp_free_buff() - Free non std buffer when TDLS flag is set
  2171. * @soc: Soc handle
  2172. * @desc: software Tx descriptor to be processed
  2173. *
  2174. * Return: 0 if Success
  2175. */
  2176. #ifdef FEATURE_WLAN_TDLS
  2177. static inline int
  2178. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2179. {
  2180. /* If it is TDLS mgmt, don't unmap or free the frame */
  2181. if (desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME) {
  2182. dp_non_std_htt_tx_comp_free_buff(soc, desc);
  2183. return 0;
  2184. }
  2185. return 1;
  2186. }
  2187. #else
  2188. static inline int
  2189. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2190. {
  2191. return 1;
  2192. }
  2193. #endif
  2194. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  2195. bool delayed_free)
  2196. {
  2197. qdf_nbuf_t nbuf = desc->nbuf;
  2198. enum dp_tx_event_type type = dp_tx_get_event_type(desc->flags);
  2199. /* nbuf already freed in vdev detach path */
  2200. if (!nbuf)
  2201. return NULL;
  2202. if (!dp_tdls_tx_comp_free_buff(soc, desc))
  2203. return NULL;
  2204. /* 0 : MSDU buffer, 1 : MLE */
  2205. if (desc->msdu_ext_desc) {
  2206. /* TSO free */
  2207. if (hal_tx_ext_desc_get_tso_enable(
  2208. desc->msdu_ext_desc->vaddr)) {
  2209. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  2210. desc->id, DP_TX_COMP_MSDU_EXT);
  2211. dp_tx_tso_seg_history_add(soc,
  2212. desc->msdu_ext_desc->tso_desc,
  2213. desc->nbuf, desc->id, type);
  2214. /* unmap eash TSO seg before free the nbuf */
  2215. dp_tx_tso_unmap_segment(soc,
  2216. desc->msdu_ext_desc->tso_desc,
  2217. desc->msdu_ext_desc->
  2218. tso_num_desc);
  2219. goto nbuf_free;
  2220. }
  2221. if (qdf_unlikely(desc->frm_type == dp_tx_frm_sg)) {
  2222. void *msdu_ext_desc = desc->msdu_ext_desc->vaddr;
  2223. qdf_dma_addr_t iova;
  2224. uint32_t frag_len;
  2225. uint32_t i;
  2226. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  2227. QDF_DMA_TO_DEVICE,
  2228. qdf_nbuf_headlen(nbuf));
  2229. for (i = 1; i < DP_TX_MAX_NUM_FRAGS; i++) {
  2230. hal_tx_ext_desc_get_frag_info(msdu_ext_desc, i,
  2231. &iova,
  2232. &frag_len);
  2233. if (!iova || !frag_len)
  2234. break;
  2235. qdf_mem_unmap_page(soc->osdev, iova, frag_len,
  2236. QDF_DMA_TO_DEVICE);
  2237. }
  2238. goto nbuf_free;
  2239. }
  2240. }
  2241. /* If it's ME frame, dont unmap the cloned nbuf's */
  2242. if ((desc->flags & DP_TX_DESC_FLAG_ME) && qdf_nbuf_is_cloned(nbuf))
  2243. goto nbuf_free;
  2244. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf, desc->id, type);
  2245. dp_tx_unmap(soc, desc);
  2246. if (desc->flags & DP_TX_DESC_FLAG_MESH_MODE)
  2247. return dp_mesh_tx_comp_free_buff(soc, desc, delayed_free);
  2248. if (dp_tx_traffic_end_indication_enq_ind_pkt(soc, desc, nbuf))
  2249. return NULL;
  2250. nbuf_free:
  2251. if (delayed_free)
  2252. return nbuf;
  2253. qdf_nbuf_free(nbuf);
  2254. return NULL;
  2255. }
  2256. /**
  2257. * dp_tx_sg_unmap_buf() - Unmap scatter gather fragments
  2258. * @soc: DP soc handle
  2259. * @nbuf: skb
  2260. * @msdu_info: MSDU info
  2261. *
  2262. * Return: None
  2263. */
  2264. static inline void
  2265. dp_tx_sg_unmap_buf(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2266. struct dp_tx_msdu_info_s *msdu_info)
  2267. {
  2268. uint32_t cur_idx;
  2269. struct dp_tx_seg_info_s *seg = msdu_info->u.sg_info.curr_seg;
  2270. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE,
  2271. qdf_nbuf_headlen(nbuf));
  2272. for (cur_idx = 1; cur_idx < seg->frag_cnt; cur_idx++)
  2273. qdf_mem_unmap_page(soc->osdev, (qdf_dma_addr_t)
  2274. (seg->frags[cur_idx].paddr_lo | ((uint64_t)
  2275. seg->frags[cur_idx].paddr_hi) << 32),
  2276. seg->frags[cur_idx].len,
  2277. QDF_DMA_TO_DEVICE);
  2278. }
  2279. #if QDF_LOCK_STATS
  2280. noinline
  2281. #else
  2282. #endif
  2283. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2284. struct dp_tx_msdu_info_s *msdu_info)
  2285. {
  2286. uint32_t i;
  2287. struct dp_pdev *pdev = vdev->pdev;
  2288. struct dp_soc *soc = pdev->soc;
  2289. struct dp_tx_desc_s *tx_desc;
  2290. bool is_cce_classified = false;
  2291. QDF_STATUS status;
  2292. uint16_t htt_tcl_metadata = 0;
  2293. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  2294. struct cdp_tid_tx_stats *tid_stats = NULL;
  2295. uint8_t prep_desc_fail = 0, hw_enq_fail = 0;
  2296. if (msdu_info->frm_type == dp_tx_frm_me)
  2297. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2298. i = 0;
  2299. /* Print statement to track i and num_seg */
  2300. /*
  2301. * For each segment (maps to 1 MSDU) , prepare software and hardware
  2302. * descriptors using information in msdu_info
  2303. */
  2304. while (i < msdu_info->num_seg) {
  2305. /*
  2306. * Setup Tx descriptor for an MSDU, and MSDU extension
  2307. * descriptor
  2308. */
  2309. tx_desc = dp_tx_prepare_desc(vdev, nbuf, msdu_info,
  2310. tx_q->desc_pool_id);
  2311. if (!tx_desc) {
  2312. if (msdu_info->frm_type == dp_tx_frm_me) {
  2313. prep_desc_fail++;
  2314. dp_tx_me_free_buf(pdev,
  2315. (void *)(msdu_info->u.sg_info
  2316. .curr_seg->frags[0].vaddr));
  2317. if (prep_desc_fail == msdu_info->num_seg) {
  2318. /*
  2319. * Unmap is needed only if descriptor
  2320. * preparation failed for all segments.
  2321. */
  2322. qdf_nbuf_unmap(soc->osdev,
  2323. msdu_info->u.sg_info.
  2324. curr_seg->nbuf,
  2325. QDF_DMA_TO_DEVICE);
  2326. }
  2327. /*
  2328. * Free the nbuf for the current segment
  2329. * and make it point to the next in the list.
  2330. * For me, there are as many segments as there
  2331. * are no of clients.
  2332. */
  2333. qdf_nbuf_free(msdu_info->u.sg_info
  2334. .curr_seg->nbuf);
  2335. if (msdu_info->u.sg_info.curr_seg->next) {
  2336. msdu_info->u.sg_info.curr_seg =
  2337. msdu_info->u.sg_info
  2338. .curr_seg->next;
  2339. nbuf = msdu_info->u.sg_info
  2340. .curr_seg->nbuf;
  2341. }
  2342. i++;
  2343. continue;
  2344. }
  2345. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2346. dp_tx_tso_seg_history_add(
  2347. soc,
  2348. msdu_info->u.tso_info.curr_seg,
  2349. nbuf, 0, DP_TX_DESC_UNMAP);
  2350. dp_tx_tso_unmap_segment(soc,
  2351. msdu_info->u.tso_info.
  2352. curr_seg,
  2353. msdu_info->u.tso_info.
  2354. tso_num_seg_list);
  2355. if (msdu_info->u.tso_info.curr_seg->next) {
  2356. msdu_info->u.tso_info.curr_seg =
  2357. msdu_info->u.tso_info.curr_seg->next;
  2358. i++;
  2359. continue;
  2360. }
  2361. }
  2362. if (msdu_info->frm_type == dp_tx_frm_sg)
  2363. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2364. goto done;
  2365. }
  2366. if (msdu_info->frm_type == dp_tx_frm_me) {
  2367. tx_desc->msdu_ext_desc->me_buffer =
  2368. (struct dp_tx_me_buf_t *)msdu_info->
  2369. u.sg_info.curr_seg->frags[0].vaddr;
  2370. tx_desc->flags |= DP_TX_DESC_FLAG_ME;
  2371. }
  2372. if (is_cce_classified)
  2373. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2374. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2375. if (msdu_info->exception_fw) {
  2376. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2377. }
  2378. dp_tx_is_hp_update_required(i, msdu_info);
  2379. /*
  2380. * For frames with multiple segments (TSO, ME), jump to next
  2381. * segment.
  2382. */
  2383. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2384. if (msdu_info->u.tso_info.curr_seg->next) {
  2385. msdu_info->u.tso_info.curr_seg =
  2386. msdu_info->u.tso_info.curr_seg->next;
  2387. /*
  2388. * If this is a jumbo nbuf, then increment the
  2389. * number of nbuf users for each additional
  2390. * segment of the msdu. This will ensure that
  2391. * the skb is freed only after receiving tx
  2392. * completion for all segments of an nbuf
  2393. */
  2394. qdf_nbuf_inc_users(nbuf);
  2395. /* Check with MCL if this is needed */
  2396. /* nbuf = msdu_info->u.tso_info.curr_seg->nbuf;
  2397. */
  2398. }
  2399. }
  2400. dp_tx_update_mcast_param(DP_INVALID_PEER,
  2401. &htt_tcl_metadata,
  2402. vdev,
  2403. msdu_info);
  2404. /*
  2405. * Enqueue the Tx MSDU descriptor to HW for transmit
  2406. */
  2407. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2408. htt_tcl_metadata,
  2409. NULL, msdu_info);
  2410. dp_tx_check_and_flush_hp(soc, status, msdu_info);
  2411. if (status != QDF_STATUS_SUCCESS) {
  2412. dp_info_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2413. tx_desc, tx_q->ring_id);
  2414. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2415. tid_stats = &pdev->stats.tid_stats.
  2416. tid_tx_stats[tx_q->ring_id][msdu_info->tid];
  2417. tid_stats->swdrop_cnt[TX_HW_ENQUEUE]++;
  2418. if (msdu_info->frm_type == dp_tx_frm_me) {
  2419. hw_enq_fail++;
  2420. if (hw_enq_fail == msdu_info->num_seg) {
  2421. /*
  2422. * Unmap is needed only if enqueue
  2423. * failed for all segments.
  2424. */
  2425. qdf_nbuf_unmap(soc->osdev,
  2426. msdu_info->u.sg_info.
  2427. curr_seg->nbuf,
  2428. QDF_DMA_TO_DEVICE);
  2429. }
  2430. /*
  2431. * Free the nbuf for the current segment
  2432. * and make it point to the next in the list.
  2433. * For me, there are as many segments as there
  2434. * are no of clients.
  2435. */
  2436. qdf_nbuf_free(msdu_info->u.sg_info
  2437. .curr_seg->nbuf);
  2438. dp_tx_desc_release(soc, tx_desc,
  2439. tx_q->desc_pool_id);
  2440. if (msdu_info->u.sg_info.curr_seg->next) {
  2441. msdu_info->u.sg_info.curr_seg =
  2442. msdu_info->u.sg_info
  2443. .curr_seg->next;
  2444. nbuf = msdu_info->u.sg_info
  2445. .curr_seg->nbuf;
  2446. } else
  2447. break;
  2448. i++;
  2449. continue;
  2450. }
  2451. /*
  2452. * For TSO frames, the nbuf users increment done for
  2453. * the current segment has to be reverted, since the
  2454. * hw enqueue for this segment failed
  2455. */
  2456. if (msdu_info->frm_type == dp_tx_frm_tso &&
  2457. msdu_info->u.tso_info.curr_seg) {
  2458. /*
  2459. * unmap and free current,
  2460. * retransmit remaining segments
  2461. */
  2462. dp_tx_comp_free_buf(soc, tx_desc, false);
  2463. i++;
  2464. dp_tx_desc_release(soc, tx_desc,
  2465. tx_q->desc_pool_id);
  2466. continue;
  2467. }
  2468. if (msdu_info->frm_type == dp_tx_frm_sg)
  2469. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2470. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2471. goto done;
  2472. }
  2473. /*
  2474. * TODO
  2475. * if tso_info structure can be modified to have curr_seg
  2476. * as first element, following 2 blocks of code (for TSO and SG)
  2477. * can be combined into 1
  2478. */
  2479. /*
  2480. * For Multicast-Unicast converted packets,
  2481. * each converted frame (for a client) is represented as
  2482. * 1 segment
  2483. */
  2484. if ((msdu_info->frm_type == dp_tx_frm_sg) ||
  2485. (msdu_info->frm_type == dp_tx_frm_me)) {
  2486. if (msdu_info->u.sg_info.curr_seg->next) {
  2487. msdu_info->u.sg_info.curr_seg =
  2488. msdu_info->u.sg_info.curr_seg->next;
  2489. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2490. } else
  2491. break;
  2492. }
  2493. i++;
  2494. }
  2495. nbuf = NULL;
  2496. done:
  2497. return nbuf;
  2498. }
  2499. /**
  2500. * dp_tx_prepare_sg()- Extract SG info from NBUF and prepare msdu_info
  2501. * for SG frames
  2502. * @vdev: DP vdev handle
  2503. * @nbuf: skb
  2504. * @seg_info: Pointer to Segment info Descriptor to be prepared
  2505. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2506. *
  2507. * Return: NULL on success,
  2508. * nbuf when it fails to send
  2509. */
  2510. static qdf_nbuf_t dp_tx_prepare_sg(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2511. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  2512. {
  2513. uint32_t cur_frag, nr_frags, i;
  2514. qdf_dma_addr_t paddr;
  2515. struct dp_tx_sg_info_s *sg_info;
  2516. sg_info = &msdu_info->u.sg_info;
  2517. nr_frags = qdf_nbuf_get_nr_frags(nbuf);
  2518. if (QDF_STATUS_SUCCESS !=
  2519. qdf_nbuf_map_nbytes_single(vdev->osdev, nbuf,
  2520. QDF_DMA_TO_DEVICE,
  2521. qdf_nbuf_headlen(nbuf))) {
  2522. dp_tx_err("dma map error");
  2523. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2524. qdf_nbuf_free(nbuf);
  2525. return NULL;
  2526. }
  2527. paddr = qdf_nbuf_mapped_paddr_get(nbuf);
  2528. seg_info->frags[0].paddr_lo = paddr;
  2529. seg_info->frags[0].paddr_hi = ((uint64_t) paddr) >> 32;
  2530. seg_info->frags[0].len = qdf_nbuf_headlen(nbuf);
  2531. seg_info->frags[0].vaddr = (void *) nbuf;
  2532. for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
  2533. if (QDF_STATUS_SUCCESS != qdf_nbuf_frag_map(vdev->osdev,
  2534. nbuf, 0,
  2535. QDF_DMA_TO_DEVICE,
  2536. cur_frag)) {
  2537. dp_tx_err("frag dma map error");
  2538. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2539. goto map_err;
  2540. }
  2541. paddr = qdf_nbuf_get_tx_frag_paddr(nbuf);
  2542. seg_info->frags[cur_frag + 1].paddr_lo = paddr;
  2543. seg_info->frags[cur_frag + 1].paddr_hi =
  2544. ((uint64_t) paddr) >> 32;
  2545. seg_info->frags[cur_frag + 1].len =
  2546. qdf_nbuf_get_frag_size(nbuf, cur_frag);
  2547. }
  2548. seg_info->frag_cnt = (cur_frag + 1);
  2549. seg_info->total_len = qdf_nbuf_len(nbuf);
  2550. seg_info->next = NULL;
  2551. sg_info->curr_seg = seg_info;
  2552. msdu_info->frm_type = dp_tx_frm_sg;
  2553. msdu_info->num_seg = 1;
  2554. return nbuf;
  2555. map_err:
  2556. /* restore paddr into nbuf before calling unmap */
  2557. qdf_nbuf_mapped_paddr_set(nbuf,
  2558. (qdf_dma_addr_t)(seg_info->frags[0].paddr_lo |
  2559. ((uint64_t)
  2560. seg_info->frags[0].paddr_hi) << 32));
  2561. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  2562. QDF_DMA_TO_DEVICE,
  2563. seg_info->frags[0].len);
  2564. for (i = 1; i <= cur_frag; i++) {
  2565. qdf_mem_unmap_page(vdev->osdev, (qdf_dma_addr_t)
  2566. (seg_info->frags[i].paddr_lo | ((uint64_t)
  2567. seg_info->frags[i].paddr_hi) << 32),
  2568. seg_info->frags[i].len,
  2569. QDF_DMA_TO_DEVICE);
  2570. }
  2571. qdf_nbuf_free(nbuf);
  2572. return NULL;
  2573. }
  2574. /**
  2575. * dp_tx_add_tx_sniffer_meta_data()- Add tx_sniffer meta hdr info
  2576. * @vdev: DP vdev handle
  2577. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2578. * @ppdu_cookie: PPDU cookie that should be replayed in the ppdu completions
  2579. *
  2580. * Return: NULL on failure,
  2581. * nbuf when extracted successfully
  2582. */
  2583. static
  2584. void dp_tx_add_tx_sniffer_meta_data(struct dp_vdev *vdev,
  2585. struct dp_tx_msdu_info_s *msdu_info,
  2586. uint16_t ppdu_cookie)
  2587. {
  2588. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2589. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2590. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2591. HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_SET
  2592. (msdu_info->meta_data[5], 1);
  2593. HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_SET
  2594. (msdu_info->meta_data[5], 1);
  2595. HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_SET
  2596. (msdu_info->meta_data[6], ppdu_cookie);
  2597. msdu_info->exception_fw = 1;
  2598. msdu_info->is_tx_sniffer = 1;
  2599. }
  2600. #ifdef MESH_MODE_SUPPORT
  2601. /**
  2602. * dp_tx_extract_mesh_meta_data()- Extract mesh meta hdr info from nbuf
  2603. * and prepare msdu_info for mesh frames.
  2604. * @vdev: DP vdev handle
  2605. * @nbuf: skb
  2606. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2607. *
  2608. * Return: NULL on failure,
  2609. * nbuf when extracted successfully
  2610. */
  2611. static
  2612. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2613. struct dp_tx_msdu_info_s *msdu_info)
  2614. {
  2615. struct meta_hdr_s *mhdr;
  2616. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2617. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2618. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  2619. if (CB_FTYPE_MESH_TX_INFO != qdf_nbuf_get_tx_ftype(nbuf)) {
  2620. msdu_info->exception_fw = 0;
  2621. goto remove_meta_hdr;
  2622. }
  2623. msdu_info->exception_fw = 1;
  2624. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2625. meta_data->host_tx_desc_pool = 1;
  2626. meta_data->update_peer_cache = 1;
  2627. meta_data->learning_frame = 1;
  2628. if (!(mhdr->flags & METAHDR_FLAG_AUTO_RATE)) {
  2629. meta_data->power = mhdr->power;
  2630. meta_data->mcs_mask = 1 << mhdr->rate_info[0].mcs;
  2631. meta_data->nss_mask = 1 << mhdr->rate_info[0].nss;
  2632. meta_data->pream_type = mhdr->rate_info[0].preamble_type;
  2633. meta_data->retry_limit = mhdr->rate_info[0].max_tries;
  2634. meta_data->dyn_bw = 1;
  2635. meta_data->valid_pwr = 1;
  2636. meta_data->valid_mcs_mask = 1;
  2637. meta_data->valid_nss_mask = 1;
  2638. meta_data->valid_preamble_type = 1;
  2639. meta_data->valid_retries = 1;
  2640. meta_data->valid_bw_info = 1;
  2641. }
  2642. if (mhdr->flags & METAHDR_FLAG_NOENCRYPT) {
  2643. meta_data->encrypt_type = 0;
  2644. meta_data->valid_encrypt_type = 1;
  2645. meta_data->learning_frame = 0;
  2646. }
  2647. meta_data->valid_key_flags = 1;
  2648. meta_data->key_flags = (mhdr->keyix & 0x3);
  2649. remove_meta_hdr:
  2650. if (qdf_nbuf_pull_head(nbuf, sizeof(struct meta_hdr_s)) == NULL) {
  2651. dp_tx_err("qdf_nbuf_pull_head failed");
  2652. qdf_nbuf_free(nbuf);
  2653. return NULL;
  2654. }
  2655. msdu_info->tid = qdf_nbuf_get_priority(nbuf);
  2656. dp_tx_info("Meta hdr %0x %0x %0x %0x %0x %0x"
  2657. " tid %d to_fw %d",
  2658. msdu_info->meta_data[0],
  2659. msdu_info->meta_data[1],
  2660. msdu_info->meta_data[2],
  2661. msdu_info->meta_data[3],
  2662. msdu_info->meta_data[4],
  2663. msdu_info->meta_data[5],
  2664. msdu_info->tid, msdu_info->exception_fw);
  2665. return nbuf;
  2666. }
  2667. #else
  2668. static
  2669. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2670. struct dp_tx_msdu_info_s *msdu_info)
  2671. {
  2672. return nbuf;
  2673. }
  2674. #endif
  2675. /**
  2676. * dp_check_exc_metadata() - Checks if parameters are valid
  2677. * @tx_exc: holds all exception path parameters
  2678. *
  2679. * Return: true when all the parameters are valid else false
  2680. *
  2681. */
  2682. static bool dp_check_exc_metadata(struct cdp_tx_exception_metadata *tx_exc)
  2683. {
  2684. bool invalid_tid = (tx_exc->tid >= DP_MAX_TIDS && tx_exc->tid !=
  2685. HTT_INVALID_TID);
  2686. bool invalid_encap_type =
  2687. (tx_exc->tx_encap_type > htt_cmn_pkt_num_types &&
  2688. tx_exc->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE);
  2689. bool invalid_sec_type = (tx_exc->sec_type > cdp_num_sec_types &&
  2690. tx_exc->sec_type != CDP_INVALID_SEC_TYPE);
  2691. bool invalid_cookie = (tx_exc->is_tx_sniffer == 1 &&
  2692. tx_exc->ppdu_cookie == 0);
  2693. if (tx_exc->is_intrabss_fwd)
  2694. return true;
  2695. if (invalid_tid || invalid_encap_type || invalid_sec_type ||
  2696. invalid_cookie) {
  2697. return false;
  2698. }
  2699. return true;
  2700. }
  2701. #ifdef ATH_SUPPORT_IQUE
  2702. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2703. {
  2704. qdf_ether_header_t *eh;
  2705. /* Mcast to Ucast Conversion*/
  2706. if (qdf_likely(!vdev->mcast_enhancement_en))
  2707. return true;
  2708. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2709. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) &&
  2710. !DP_FRAME_IS_BROADCAST((eh)->ether_dhost)) {
  2711. dp_verbose_debug("Mcast frm for ME %pK", vdev);
  2712. qdf_nbuf_set_next(nbuf, NULL);
  2713. DP_STATS_INC_PKT(vdev, tx_i.mcast_en.mcast_pkt, 1,
  2714. qdf_nbuf_len(nbuf));
  2715. if (dp_tx_prepare_send_me(vdev, nbuf) ==
  2716. QDF_STATUS_SUCCESS) {
  2717. return false;
  2718. }
  2719. if (qdf_unlikely(vdev->igmp_mcast_enhanc_en > 0)) {
  2720. if (dp_tx_prepare_send_igmp_me(vdev, nbuf) ==
  2721. QDF_STATUS_SUCCESS) {
  2722. return false;
  2723. }
  2724. }
  2725. }
  2726. return true;
  2727. }
  2728. #else
  2729. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2730. {
  2731. return true;
  2732. }
  2733. #endif
  2734. #ifdef QCA_SUPPORT_WDS_EXTENDED
  2735. /**
  2736. * dp_tx_mcast_drop() - Drop mcast frame if drop_tx_mcast is set in WDS_EXT
  2737. * @vdev: vdev handle
  2738. * @nbuf: skb
  2739. *
  2740. * Return: true if frame is dropped, false otherwise
  2741. */
  2742. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2743. {
  2744. /* Drop tx mcast and WDS Extended feature check */
  2745. if (qdf_unlikely((vdev->drop_tx_mcast) && (vdev->wds_ext_enabled))) {
  2746. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  2747. qdf_nbuf_data(nbuf);
  2748. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  2749. DP_STATS_INC(vdev, tx_i.dropped.tx_mcast_drop, 1);
  2750. return true;
  2751. }
  2752. }
  2753. return false;
  2754. }
  2755. #else
  2756. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2757. {
  2758. return false;
  2759. }
  2760. #endif
  2761. /**
  2762. * dp_tx_per_pkt_vdev_id_check() - vdev id check for frame
  2763. * @nbuf: qdf_nbuf_t
  2764. * @vdev: struct dp_vdev *
  2765. *
  2766. * Allow packet for processing only if it is for peer client which is
  2767. * connected with same vap. Drop packet if client is connected to
  2768. * different vap.
  2769. *
  2770. * Return: QDF_STATUS
  2771. */
  2772. static inline QDF_STATUS
  2773. dp_tx_per_pkt_vdev_id_check(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  2774. {
  2775. struct dp_ast_entry *dst_ast_entry = NULL;
  2776. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2777. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) ||
  2778. DP_FRAME_IS_BROADCAST((eh)->ether_dhost))
  2779. return QDF_STATUS_SUCCESS;
  2780. qdf_spin_lock_bh(&vdev->pdev->soc->ast_lock);
  2781. dst_ast_entry = dp_peer_ast_hash_find_by_vdevid(vdev->pdev->soc,
  2782. eh->ether_dhost,
  2783. vdev->vdev_id);
  2784. /* If there is no ast entry, return failure */
  2785. if (qdf_unlikely(!dst_ast_entry)) {
  2786. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2787. return QDF_STATUS_E_FAILURE;
  2788. }
  2789. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2790. return QDF_STATUS_SUCCESS;
  2791. }
  2792. /**
  2793. * dp_tx_nawds_handler() - NAWDS handler
  2794. *
  2795. * @soc: DP soc handle
  2796. * @vdev: DP vdev handle
  2797. * @msdu_info: msdu_info required to create HTT metadata
  2798. * @nbuf: skb
  2799. * @sa_peer_id:
  2800. *
  2801. * This API transfers the multicast frames with the peer id
  2802. * on NAWDS enabled peer.
  2803. *
  2804. * Return: none
  2805. */
  2806. void dp_tx_nawds_handler(struct dp_soc *soc, struct dp_vdev *vdev,
  2807. struct dp_tx_msdu_info_s *msdu_info,
  2808. qdf_nbuf_t nbuf, uint16_t sa_peer_id)
  2809. {
  2810. struct dp_peer *peer = NULL;
  2811. qdf_nbuf_t nbuf_clone = NULL;
  2812. uint16_t peer_id = DP_INVALID_PEER;
  2813. struct dp_txrx_peer *txrx_peer;
  2814. uint8_t link_id = 0;
  2815. /* This check avoids pkt forwarding which is entered
  2816. * in the ast table but still doesn't have valid peerid.
  2817. */
  2818. if (sa_peer_id == HTT_INVALID_PEER)
  2819. return;
  2820. qdf_spin_lock_bh(&vdev->peer_list_lock);
  2821. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2822. txrx_peer = dp_get_txrx_peer(peer);
  2823. if (!txrx_peer)
  2824. continue;
  2825. if (!txrx_peer->bss_peer && txrx_peer->nawds_enabled) {
  2826. peer_id = peer->peer_id;
  2827. if (!dp_peer_is_primary_link_peer(peer))
  2828. continue;
  2829. /* In the case of wds ext peer mcast traffic will be
  2830. * sent as part of VLAN interface
  2831. */
  2832. if (dp_peer_is_wds_ext_peer(txrx_peer))
  2833. continue;
  2834. /* Multicast packets needs to be
  2835. * dropped in case of intra bss forwarding
  2836. */
  2837. if (sa_peer_id == txrx_peer->peer_id) {
  2838. dp_tx_debug("multicast packet");
  2839. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2840. tx.nawds_mcast_drop,
  2841. 1, link_id);
  2842. continue;
  2843. }
  2844. nbuf_clone = qdf_nbuf_clone(nbuf);
  2845. if (!nbuf_clone) {
  2846. QDF_TRACE(QDF_MODULE_ID_DP,
  2847. QDF_TRACE_LEVEL_ERROR,
  2848. FL("nbuf clone failed"));
  2849. break;
  2850. }
  2851. nbuf_clone = dp_tx_send_msdu_single(vdev, nbuf_clone,
  2852. msdu_info, peer_id,
  2853. NULL);
  2854. if (nbuf_clone) {
  2855. dp_tx_debug("pkt send failed");
  2856. qdf_nbuf_free(nbuf_clone);
  2857. } else {
  2858. if (peer_id != DP_INVALID_PEER)
  2859. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2860. tx.nawds_mcast,
  2861. 1, qdf_nbuf_len(nbuf), link_id);
  2862. }
  2863. }
  2864. }
  2865. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  2866. }
  2867. #ifdef WLAN_MCAST_MLO
  2868. static inline bool
  2869. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2870. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2871. {
  2872. if (!tx_exc_metadata->is_mlo_mcast && qdf_unlikely(vdev->mesh_vdev))
  2873. return true;
  2874. return false;
  2875. }
  2876. #else
  2877. static inline bool
  2878. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2879. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2880. {
  2881. if (qdf_unlikely(vdev->mesh_vdev))
  2882. return true;
  2883. return false;
  2884. }
  2885. #endif
  2886. qdf_nbuf_t
  2887. dp_tx_send_exception(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  2888. qdf_nbuf_t nbuf,
  2889. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2890. {
  2891. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2892. struct dp_tx_msdu_info_s msdu_info;
  2893. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2894. DP_MOD_ID_TX_EXCEPTION);
  2895. if (qdf_unlikely(!vdev))
  2896. goto fail;
  2897. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  2898. if (!tx_exc_metadata)
  2899. goto fail;
  2900. msdu_info.tid = tx_exc_metadata->tid;
  2901. dp_verbose_debug("skb "QDF_MAC_ADDR_FMT,
  2902. QDF_MAC_ADDR_REF(nbuf->data));
  2903. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  2904. if (qdf_unlikely(!dp_check_exc_metadata(tx_exc_metadata))) {
  2905. dp_tx_err("Invalid parameters in exception path");
  2906. goto fail;
  2907. }
  2908. /* for peer based metadata check if peer is valid */
  2909. if (tx_exc_metadata->peer_id != CDP_INVALID_PEER) {
  2910. struct dp_peer *peer = NULL;
  2911. peer = dp_peer_get_ref_by_id(vdev->pdev->soc,
  2912. tx_exc_metadata->peer_id,
  2913. DP_MOD_ID_TX_EXCEPTION);
  2914. if (qdf_unlikely(!peer)) {
  2915. DP_STATS_INC(vdev,
  2916. tx_i.dropped.invalid_peer_id_in_exc_path,
  2917. 1);
  2918. goto fail;
  2919. }
  2920. dp_peer_unref_delete(peer, DP_MOD_ID_TX_EXCEPTION);
  2921. }
  2922. /* Basic sanity checks for unsupported packets */
  2923. /* MESH mode */
  2924. if (dp_tx_check_mesh_vdev(vdev, tx_exc_metadata)) {
  2925. dp_tx_err("Mesh mode is not supported in exception path");
  2926. goto fail;
  2927. }
  2928. /*
  2929. * Classify the frame and call corresponding
  2930. * "prepare" function which extracts the segment (TSO)
  2931. * and fragmentation information (for TSO , SG, ME, or Raw)
  2932. * into MSDU_INFO structure which is later used to fill
  2933. * SW and HW descriptors.
  2934. */
  2935. if (qdf_nbuf_is_tso(nbuf)) {
  2936. dp_verbose_debug("TSO frame %pK", vdev);
  2937. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  2938. qdf_nbuf_len(nbuf));
  2939. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  2940. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  2941. qdf_nbuf_len(nbuf));
  2942. goto fail;
  2943. }
  2944. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  2945. goto send_multiple;
  2946. }
  2947. /* SG */
  2948. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  2949. struct dp_tx_seg_info_s seg_info = {0};
  2950. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info, &msdu_info);
  2951. if (!nbuf)
  2952. goto fail;
  2953. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  2954. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  2955. qdf_nbuf_len(nbuf));
  2956. goto send_multiple;
  2957. }
  2958. if (qdf_likely(tx_exc_metadata->is_tx_sniffer)) {
  2959. DP_STATS_INC_PKT(vdev, tx_i.sniffer_rcvd, 1,
  2960. qdf_nbuf_len(nbuf));
  2961. dp_tx_add_tx_sniffer_meta_data(vdev, &msdu_info,
  2962. tx_exc_metadata->ppdu_cookie);
  2963. }
  2964. /*
  2965. * Get HW Queue to use for this frame.
  2966. * TCL supports upto 4 DMA rings, out of which 3 rings are
  2967. * dedicated for data and 1 for command.
  2968. * "queue_id" maps to one hardware ring.
  2969. * With each ring, we also associate a unique Tx descriptor pool
  2970. * to minimize lock contention for these resources.
  2971. */
  2972. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  2973. /*
  2974. * if the packet is mcast packet send through mlo_macst handler
  2975. * for all prnt_vdevs
  2976. */
  2977. if (soc->arch_ops.dp_tx_mlo_mcast_send) {
  2978. nbuf = soc->arch_ops.dp_tx_mlo_mcast_send(soc, vdev,
  2979. nbuf,
  2980. tx_exc_metadata);
  2981. if (!nbuf)
  2982. goto fail;
  2983. }
  2984. if (qdf_likely(tx_exc_metadata->is_intrabss_fwd)) {
  2985. if (qdf_unlikely(vdev->nawds_enabled)) {
  2986. /*
  2987. * This is a multicast packet
  2988. */
  2989. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  2990. tx_exc_metadata->peer_id);
  2991. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  2992. 1, qdf_nbuf_len(nbuf));
  2993. }
  2994. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  2995. DP_INVALID_PEER, NULL);
  2996. } else {
  2997. /*
  2998. * Check exception descriptors
  2999. */
  3000. if (dp_tx_exception_limit_check(vdev))
  3001. goto fail;
  3002. /* Single linear frame */
  3003. /*
  3004. * If nbuf is a simple linear frame, use send_single function to
  3005. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3006. * SRNG. There is no need to setup a MSDU extension descriptor.
  3007. */
  3008. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  3009. tx_exc_metadata->peer_id,
  3010. tx_exc_metadata);
  3011. }
  3012. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3013. return nbuf;
  3014. send_multiple:
  3015. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3016. fail:
  3017. if (vdev)
  3018. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3019. dp_verbose_debug("pkt send failed");
  3020. return nbuf;
  3021. }
  3022. qdf_nbuf_t
  3023. dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3024. uint8_t vdev_id, qdf_nbuf_t nbuf,
  3025. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3026. {
  3027. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3028. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  3029. DP_MOD_ID_TX_EXCEPTION);
  3030. if (qdf_unlikely(!vdev))
  3031. goto fail;
  3032. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3033. == QDF_STATUS_E_FAILURE)) {
  3034. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3035. goto fail;
  3036. }
  3037. /* Unref count as it will again be taken inside dp_tx_exception */
  3038. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3039. return dp_tx_send_exception(soc_hdl, vdev_id, nbuf, tx_exc_metadata);
  3040. fail:
  3041. if (vdev)
  3042. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3043. dp_verbose_debug("pkt send failed");
  3044. return nbuf;
  3045. }
  3046. #ifdef MESH_MODE_SUPPORT
  3047. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3048. qdf_nbuf_t nbuf)
  3049. {
  3050. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3051. struct meta_hdr_s *mhdr;
  3052. qdf_nbuf_t nbuf_mesh = NULL;
  3053. qdf_nbuf_t nbuf_clone = NULL;
  3054. struct dp_vdev *vdev;
  3055. uint8_t no_enc_frame = 0;
  3056. nbuf_mesh = qdf_nbuf_unshare(nbuf);
  3057. if (!nbuf_mesh) {
  3058. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3059. "qdf_nbuf_unshare failed");
  3060. return nbuf;
  3061. }
  3062. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_MESH);
  3063. if (!vdev) {
  3064. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3065. "vdev is NULL for vdev_id %d", vdev_id);
  3066. return nbuf;
  3067. }
  3068. nbuf = nbuf_mesh;
  3069. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  3070. if ((vdev->sec_type != cdp_sec_type_none) &&
  3071. (mhdr->flags & METAHDR_FLAG_NOENCRYPT))
  3072. no_enc_frame = 1;
  3073. if (mhdr->flags & METAHDR_FLAG_NOQOS)
  3074. qdf_nbuf_set_priority(nbuf, HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST);
  3075. if ((mhdr->flags & METAHDR_FLAG_INFO_UPDATED) &&
  3076. !no_enc_frame) {
  3077. nbuf_clone = qdf_nbuf_clone(nbuf);
  3078. if (!nbuf_clone) {
  3079. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3080. "qdf_nbuf_clone failed");
  3081. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3082. return nbuf;
  3083. }
  3084. qdf_nbuf_set_tx_ftype(nbuf_clone, CB_FTYPE_MESH_TX_INFO);
  3085. }
  3086. if (nbuf_clone) {
  3087. if (!dp_tx_send(soc_hdl, vdev_id, nbuf_clone)) {
  3088. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3089. } else {
  3090. qdf_nbuf_free(nbuf_clone);
  3091. }
  3092. }
  3093. if (no_enc_frame)
  3094. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_MESH_TX_INFO);
  3095. else
  3096. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_INVALID);
  3097. nbuf = dp_tx_send(soc_hdl, vdev_id, nbuf);
  3098. if ((!nbuf) && no_enc_frame) {
  3099. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3100. }
  3101. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3102. return nbuf;
  3103. }
  3104. #else
  3105. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3106. qdf_nbuf_t nbuf)
  3107. {
  3108. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3109. }
  3110. #endif
  3111. #ifdef QCA_DP_TX_NBUF_AND_NBUF_DATA_PREFETCH
  3112. static inline
  3113. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3114. {
  3115. if (nbuf) {
  3116. qdf_prefetch(&nbuf->len);
  3117. qdf_prefetch(&nbuf->data);
  3118. }
  3119. }
  3120. #else
  3121. static inline
  3122. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3123. {
  3124. }
  3125. #endif
  3126. #ifdef DP_UMAC_HW_RESET_SUPPORT
  3127. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3128. qdf_nbuf_t nbuf)
  3129. {
  3130. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3131. struct dp_vdev *vdev = NULL;
  3132. vdev = soc->vdev_id_map[vdev_id];
  3133. if (qdf_unlikely(!vdev))
  3134. return nbuf;
  3135. DP_STATS_INC(vdev, tx_i.dropped.drop_ingress, 1);
  3136. return nbuf;
  3137. }
  3138. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3139. qdf_nbuf_t nbuf,
  3140. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3141. {
  3142. return dp_tx_drop(soc_hdl, vdev_id, nbuf);
  3143. }
  3144. #endif
  3145. #ifdef FEATURE_DIRECT_LINK
  3146. /**
  3147. * dp_vdev_tx_mark_to_fw() - Mark to_fw bit for the tx packet
  3148. * @nbuf: skb
  3149. * @vdev: DP vdev handle
  3150. *
  3151. * Return: None
  3152. */
  3153. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3154. {
  3155. if (qdf_unlikely(vdev->to_fw))
  3156. QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf) = 1;
  3157. }
  3158. #else
  3159. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3160. {
  3161. }
  3162. #endif
  3163. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3164. qdf_nbuf_t nbuf)
  3165. {
  3166. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3167. uint16_t peer_id = HTT_INVALID_PEER;
  3168. /*
  3169. * doing a memzero is causing additional function call overhead
  3170. * so doing static stack clearing
  3171. */
  3172. struct dp_tx_msdu_info_s msdu_info = {0};
  3173. struct dp_vdev *vdev = NULL;
  3174. qdf_nbuf_t end_nbuf = NULL;
  3175. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3176. return nbuf;
  3177. /*
  3178. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3179. * this in per packet path.
  3180. *
  3181. * As in this path vdev memory is already protected with netdev
  3182. * tx lock
  3183. */
  3184. vdev = soc->vdev_id_map[vdev_id];
  3185. if (qdf_unlikely(!vdev))
  3186. return nbuf;
  3187. dp_vdev_tx_mark_to_fw(nbuf, vdev);
  3188. /*
  3189. * Set Default Host TID value to invalid TID
  3190. * (TID override disabled)
  3191. */
  3192. msdu_info.tid = HTT_TX_EXT_TID_INVALID;
  3193. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  3194. if (qdf_unlikely(vdev->mesh_vdev)) {
  3195. qdf_nbuf_t nbuf_mesh = dp_tx_extract_mesh_meta_data(vdev, nbuf,
  3196. &msdu_info);
  3197. if (!nbuf_mesh) {
  3198. dp_verbose_debug("Extracting mesh metadata failed");
  3199. return nbuf;
  3200. }
  3201. nbuf = nbuf_mesh;
  3202. }
  3203. /*
  3204. * Get HW Queue to use for this frame.
  3205. * TCL supports upto 4 DMA rings, out of which 3 rings are
  3206. * dedicated for data and 1 for command.
  3207. * "queue_id" maps to one hardware ring.
  3208. * With each ring, we also associate a unique Tx descriptor pool
  3209. * to minimize lock contention for these resources.
  3210. */
  3211. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  3212. DP_STATS_INC(vdev, tx_i.rcvd_per_core[msdu_info.tx_queue.desc_pool_id],
  3213. 1);
  3214. /*
  3215. * TCL H/W supports 2 DSCP-TID mapping tables.
  3216. * Table 1 - Default DSCP-TID mapping table
  3217. * Table 2 - 1 DSCP-TID override table
  3218. *
  3219. * If we need a different DSCP-TID mapping for this vap,
  3220. * call tid_classify to extract DSCP/ToS from frame and
  3221. * map to a TID and store in msdu_info. This is later used
  3222. * to fill in TCL Input descriptor (per-packet TID override).
  3223. */
  3224. dp_tx_classify_tid(vdev, nbuf, &msdu_info);
  3225. /*
  3226. * Classify the frame and call corresponding
  3227. * "prepare" function which extracts the segment (TSO)
  3228. * and fragmentation information (for TSO , SG, ME, or Raw)
  3229. * into MSDU_INFO structure which is later used to fill
  3230. * SW and HW descriptors.
  3231. */
  3232. if (qdf_nbuf_is_tso(nbuf)) {
  3233. dp_verbose_debug("TSO frame %pK", vdev);
  3234. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  3235. qdf_nbuf_len(nbuf));
  3236. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  3237. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  3238. qdf_nbuf_len(nbuf));
  3239. return nbuf;
  3240. }
  3241. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  3242. goto send_multiple;
  3243. }
  3244. /* SG */
  3245. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  3246. if (qdf_nbuf_get_nr_frags(nbuf) > DP_TX_MAX_NUM_FRAGS - 1) {
  3247. if (qdf_unlikely(qdf_nbuf_linearize(nbuf)))
  3248. return nbuf;
  3249. } else {
  3250. struct dp_tx_seg_info_s seg_info = {0};
  3251. if (qdf_unlikely(is_nbuf_frm_rmnet(nbuf, &msdu_info)))
  3252. goto send_single;
  3253. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info,
  3254. &msdu_info);
  3255. if (!nbuf)
  3256. return NULL;
  3257. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  3258. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  3259. qdf_nbuf_len(nbuf));
  3260. goto send_multiple;
  3261. }
  3262. }
  3263. if (qdf_unlikely(!dp_tx_mcast_enhance(vdev, nbuf)))
  3264. return NULL;
  3265. if (qdf_unlikely(dp_tx_mcast_drop(vdev, nbuf)))
  3266. return nbuf;
  3267. /* RAW */
  3268. if (qdf_unlikely(vdev->tx_encap_type == htt_cmn_pkt_type_raw)) {
  3269. struct dp_tx_seg_info_s seg_info = {0};
  3270. nbuf = dp_tx_prepare_raw(vdev, nbuf, &seg_info, &msdu_info);
  3271. if (!nbuf)
  3272. return NULL;
  3273. dp_verbose_debug("Raw frame %pK", vdev);
  3274. goto send_multiple;
  3275. }
  3276. if (qdf_unlikely(vdev->nawds_enabled)) {
  3277. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  3278. qdf_nbuf_data(nbuf);
  3279. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  3280. uint16_t sa_peer_id = DP_INVALID_PEER;
  3281. if (!soc->ast_offload_support) {
  3282. struct dp_ast_entry *ast_entry = NULL;
  3283. qdf_spin_lock_bh(&soc->ast_lock);
  3284. ast_entry = dp_peer_ast_hash_find_by_pdevid
  3285. (soc,
  3286. (uint8_t *)(eh->ether_shost),
  3287. vdev->pdev->pdev_id);
  3288. if (ast_entry)
  3289. sa_peer_id = ast_entry->peer_id;
  3290. qdf_spin_unlock_bh(&soc->ast_lock);
  3291. }
  3292. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  3293. sa_peer_id);
  3294. }
  3295. peer_id = DP_INVALID_PEER;
  3296. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  3297. 1, qdf_nbuf_len(nbuf));
  3298. }
  3299. send_single:
  3300. /* Single linear frame */
  3301. /*
  3302. * If nbuf is a simple linear frame, use send_single function to
  3303. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3304. * SRNG. There is no need to setup a MSDU extension descriptor.
  3305. */
  3306. dp_tx_prefetch_nbuf_data(nbuf);
  3307. nbuf = dp_tx_send_msdu_single_wrapper(vdev, nbuf, &msdu_info,
  3308. peer_id, end_nbuf);
  3309. return nbuf;
  3310. send_multiple:
  3311. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3312. if (qdf_unlikely(nbuf && msdu_info.frm_type == dp_tx_frm_raw))
  3313. dp_tx_raw_prepare_unset(vdev->pdev->soc, nbuf);
  3314. return nbuf;
  3315. }
  3316. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3317. uint8_t vdev_id, qdf_nbuf_t nbuf)
  3318. {
  3319. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3320. struct dp_vdev *vdev = NULL;
  3321. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3322. return nbuf;
  3323. /*
  3324. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3325. * this in per packet path.
  3326. *
  3327. * As in this path vdev memory is already protected with netdev
  3328. * tx lock
  3329. */
  3330. vdev = soc->vdev_id_map[vdev_id];
  3331. if (qdf_unlikely(!vdev))
  3332. return nbuf;
  3333. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3334. == QDF_STATUS_E_FAILURE)) {
  3335. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3336. return nbuf;
  3337. }
  3338. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3339. }
  3340. #ifdef UMAC_SUPPORT_PROXY_ARP
  3341. /**
  3342. * dp_tx_proxy_arp() - Tx proxy arp handler
  3343. * @vdev: datapath vdev handle
  3344. * @nbuf: sk buffer
  3345. *
  3346. * Return: status
  3347. */
  3348. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3349. {
  3350. if (vdev->osif_proxy_arp)
  3351. return vdev->osif_proxy_arp(vdev->osif_vdev, nbuf);
  3352. /*
  3353. * when UMAC_SUPPORT_PROXY_ARP is defined, we expect
  3354. * osif_proxy_arp has a valid function pointer assigned
  3355. * to it
  3356. */
  3357. dp_tx_err("valid function pointer for osif_proxy_arp is expected!!\n");
  3358. return QDF_STATUS_NOT_INITIALIZED;
  3359. }
  3360. #else
  3361. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3362. {
  3363. return QDF_STATUS_SUCCESS;
  3364. }
  3365. #endif
  3366. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  3367. !defined(CONFIG_MLO_SINGLE_DEV)
  3368. #ifdef WLAN_MCAST_MLO
  3369. static bool
  3370. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3371. struct dp_tx_desc_s *tx_desc,
  3372. qdf_nbuf_t nbuf,
  3373. uint8_t reinject_reason)
  3374. {
  3375. if (reinject_reason == HTT_TX_FW2WBM_REINJECT_REASON_MLO_MCAST) {
  3376. if (soc->arch_ops.dp_tx_mcast_handler)
  3377. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, nbuf);
  3378. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3379. return true;
  3380. }
  3381. return false;
  3382. }
  3383. #else /* WLAN_MCAST_MLO */
  3384. static inline bool
  3385. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3386. struct dp_tx_desc_s *tx_desc,
  3387. qdf_nbuf_t nbuf,
  3388. uint8_t reinject_reason)
  3389. {
  3390. return false;
  3391. }
  3392. #endif /* WLAN_MCAST_MLO */
  3393. #else
  3394. static inline bool
  3395. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3396. struct dp_tx_desc_s *tx_desc,
  3397. qdf_nbuf_t nbuf,
  3398. uint8_t reinject_reason)
  3399. {
  3400. return false;
  3401. }
  3402. #endif
  3403. void dp_tx_reinject_handler(struct dp_soc *soc,
  3404. struct dp_vdev *vdev,
  3405. struct dp_tx_desc_s *tx_desc,
  3406. uint8_t *status,
  3407. uint8_t reinject_reason)
  3408. {
  3409. struct dp_peer *peer = NULL;
  3410. uint32_t peer_id = HTT_INVALID_PEER;
  3411. qdf_nbuf_t nbuf = tx_desc->nbuf;
  3412. qdf_nbuf_t nbuf_copy = NULL;
  3413. struct dp_tx_msdu_info_s msdu_info;
  3414. #ifdef WDS_VENDOR_EXTENSION
  3415. int is_mcast = 0, is_ucast = 0;
  3416. int num_peers_3addr = 0;
  3417. qdf_ether_header_t *eth_hdr = (qdf_ether_header_t *)(qdf_nbuf_data(nbuf));
  3418. struct ieee80211_frame_addr4 *wh = (struct ieee80211_frame_addr4 *)(qdf_nbuf_data(nbuf));
  3419. #endif
  3420. struct dp_txrx_peer *txrx_peer;
  3421. qdf_assert(vdev);
  3422. dp_tx_debug("Tx reinject path");
  3423. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  3424. qdf_nbuf_len(tx_desc->nbuf));
  3425. if (dp_tx_reinject_mlo_hdl(soc, vdev, tx_desc, nbuf, reinject_reason))
  3426. return;
  3427. #ifdef WDS_VENDOR_EXTENSION
  3428. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  3429. is_mcast = (IS_MULTICAST(wh->i_addr1)) ? 1 : 0;
  3430. } else {
  3431. is_mcast = (IS_MULTICAST(eth_hdr->ether_dhost)) ? 1 : 0;
  3432. }
  3433. is_ucast = !is_mcast;
  3434. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3435. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3436. txrx_peer = dp_get_txrx_peer(peer);
  3437. if (!txrx_peer || txrx_peer->bss_peer)
  3438. continue;
  3439. /* Detect wds peers that use 3-addr framing for mcast.
  3440. * if there are any, the bss_peer is used to send the
  3441. * the mcast frame using 3-addr format. all wds enabled
  3442. * peers that use 4-addr framing for mcast frames will
  3443. * be duplicated and sent as 4-addr frames below.
  3444. */
  3445. if (!txrx_peer->wds_enabled ||
  3446. !txrx_peer->wds_ecm.wds_tx_mcast_4addr) {
  3447. num_peers_3addr = 1;
  3448. break;
  3449. }
  3450. }
  3451. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3452. #endif
  3453. if (qdf_unlikely(vdev->mesh_vdev)) {
  3454. DP_TX_FREE_SINGLE_BUF(vdev->pdev->soc, tx_desc->nbuf);
  3455. } else {
  3456. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3457. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3458. txrx_peer = dp_get_txrx_peer(peer);
  3459. if (!txrx_peer)
  3460. continue;
  3461. if ((txrx_peer->peer_id != HTT_INVALID_PEER) &&
  3462. #ifdef WDS_VENDOR_EXTENSION
  3463. /*
  3464. * . if 3-addr STA, then send on BSS Peer
  3465. * . if Peer WDS enabled and accept 4-addr mcast,
  3466. * send mcast on that peer only
  3467. * . if Peer WDS enabled and accept 4-addr ucast,
  3468. * send ucast on that peer only
  3469. */
  3470. ((txrx_peer->bss_peer && num_peers_3addr && is_mcast) ||
  3471. (txrx_peer->wds_enabled &&
  3472. ((is_mcast && txrx_peer->wds_ecm.wds_tx_mcast_4addr) ||
  3473. (is_ucast &&
  3474. txrx_peer->wds_ecm.wds_tx_ucast_4addr))))) {
  3475. #else
  3476. (txrx_peer->bss_peer &&
  3477. (dp_tx_proxy_arp(vdev, nbuf) == QDF_STATUS_SUCCESS))) {
  3478. #endif
  3479. peer_id = DP_INVALID_PEER;
  3480. nbuf_copy = qdf_nbuf_copy(nbuf);
  3481. if (!nbuf_copy) {
  3482. dp_tx_debug("nbuf copy failed");
  3483. break;
  3484. }
  3485. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  3486. dp_tx_get_queue(vdev, nbuf,
  3487. &msdu_info.tx_queue);
  3488. nbuf_copy = dp_tx_send_msdu_single(vdev,
  3489. nbuf_copy,
  3490. &msdu_info,
  3491. peer_id,
  3492. NULL);
  3493. if (nbuf_copy) {
  3494. dp_tx_debug("pkt send failed");
  3495. qdf_nbuf_free(nbuf_copy);
  3496. }
  3497. }
  3498. }
  3499. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3500. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  3501. QDF_DMA_TO_DEVICE, nbuf->len);
  3502. qdf_nbuf_free(nbuf);
  3503. }
  3504. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3505. }
  3506. void dp_tx_inspect_handler(struct dp_soc *soc,
  3507. struct dp_vdev *vdev,
  3508. struct dp_tx_desc_s *tx_desc,
  3509. uint8_t *status)
  3510. {
  3511. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3512. "%s Tx inspect path",
  3513. __func__);
  3514. DP_STATS_INC_PKT(vdev, tx_i.inspect_pkts, 1,
  3515. qdf_nbuf_len(tx_desc->nbuf));
  3516. DP_TX_FREE_SINGLE_BUF(soc, tx_desc->nbuf);
  3517. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3518. }
  3519. #ifdef MESH_MODE_SUPPORT
  3520. /**
  3521. * dp_tx_comp_fill_tx_completion_stats() - Fill per packet Tx completion stats
  3522. * in mesh meta header
  3523. * @tx_desc: software descriptor head pointer
  3524. * @ts: pointer to tx completion stats
  3525. * Return: none
  3526. */
  3527. static
  3528. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3529. struct hal_tx_completion_status *ts)
  3530. {
  3531. qdf_nbuf_t netbuf = tx_desc->nbuf;
  3532. if (!tx_desc->msdu_ext_desc) {
  3533. if (qdf_nbuf_pull_head(netbuf, tx_desc->pkt_offset) == NULL) {
  3534. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3535. "netbuf %pK offset %d",
  3536. netbuf, tx_desc->pkt_offset);
  3537. return;
  3538. }
  3539. }
  3540. }
  3541. #else
  3542. static
  3543. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3544. struct hal_tx_completion_status *ts)
  3545. {
  3546. }
  3547. #endif
  3548. #ifdef CONFIG_SAWF
  3549. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3550. struct dp_vdev *vdev,
  3551. struct dp_txrx_peer *txrx_peer,
  3552. struct dp_tx_desc_s *tx_desc,
  3553. struct hal_tx_completion_status *ts,
  3554. uint8_t tid)
  3555. {
  3556. dp_sawf_tx_compl_update_peer_stats(soc, vdev, txrx_peer, tx_desc,
  3557. ts, tid);
  3558. }
  3559. static void dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3560. uint32_t nw_delay,
  3561. uint32_t sw_delay,
  3562. uint32_t hw_delay)
  3563. {
  3564. dp_peer_tid_delay_avg(tx_delay,
  3565. nw_delay,
  3566. sw_delay,
  3567. hw_delay);
  3568. }
  3569. #else
  3570. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3571. struct dp_vdev *vdev,
  3572. struct dp_txrx_peer *txrx_peer,
  3573. struct dp_tx_desc_s *tx_desc,
  3574. struct hal_tx_completion_status *ts,
  3575. uint8_t tid)
  3576. {
  3577. }
  3578. static inline void
  3579. dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3580. uint32_t nw_delay, uint32_t sw_delay,
  3581. uint32_t hw_delay)
  3582. {
  3583. }
  3584. #endif
  3585. #ifdef QCA_PEER_EXT_STATS
  3586. #ifdef WLAN_CONFIG_TX_DELAY
  3587. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3588. struct dp_tx_desc_s *tx_desc,
  3589. struct hal_tx_completion_status *ts,
  3590. struct dp_vdev *vdev)
  3591. {
  3592. struct dp_soc *soc = vdev->pdev->soc;
  3593. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3594. int64_t timestamp_ingress, timestamp_hw_enqueue;
  3595. uint32_t sw_enqueue_delay, fwhw_transmit_delay = 0;
  3596. if (!ts->valid)
  3597. return;
  3598. timestamp_ingress = qdf_nbuf_get_timestamp_us(tx_desc->nbuf);
  3599. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3600. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3601. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3602. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3603. if (!soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3604. &fwhw_transmit_delay))
  3605. dp_hist_update_stats(&tx_delay->hwtx_delay,
  3606. fwhw_transmit_delay);
  3607. dp_tx_compute_delay_avg(tx_delay, 0, sw_enqueue_delay,
  3608. fwhw_transmit_delay);
  3609. }
  3610. #else
  3611. /**
  3612. * dp_tx_compute_tid_delay() - Compute per TID delay
  3613. * @stats: Per TID delay stats
  3614. * @tx_desc: Software Tx descriptor
  3615. * @ts: Tx completion status
  3616. * @vdev: vdev
  3617. *
  3618. * Compute the software enqueue and hw enqueue delays and
  3619. * update the respective histograms
  3620. *
  3621. * Return: void
  3622. */
  3623. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3624. struct dp_tx_desc_s *tx_desc,
  3625. struct hal_tx_completion_status *ts,
  3626. struct dp_vdev *vdev)
  3627. {
  3628. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3629. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3630. uint32_t sw_enqueue_delay, fwhw_transmit_delay;
  3631. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3632. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3633. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3634. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3635. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3636. timestamp_hw_enqueue);
  3637. /*
  3638. * Update the Tx software enqueue delay and HW enque-Completion delay.
  3639. */
  3640. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3641. dp_hist_update_stats(&tx_delay->hwtx_delay, fwhw_transmit_delay);
  3642. }
  3643. #endif
  3644. /**
  3645. * dp_tx_update_peer_delay_stats() - Update the peer delay stats
  3646. * @txrx_peer: DP peer context
  3647. * @tx_desc: Tx software descriptor
  3648. * @ts: Tx completion status
  3649. * @ring_id: Rx CPU context ID/CPU_ID
  3650. *
  3651. * Update the peer extended stats. These are enhanced other
  3652. * delay stats per msdu level.
  3653. *
  3654. * Return: void
  3655. */
  3656. static void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3657. struct dp_tx_desc_s *tx_desc,
  3658. struct hal_tx_completion_status *ts,
  3659. uint8_t ring_id)
  3660. {
  3661. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3662. struct dp_soc *soc = NULL;
  3663. struct dp_peer_delay_stats *delay_stats = NULL;
  3664. uint8_t tid;
  3665. soc = pdev->soc;
  3666. if (qdf_likely(!wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx)))
  3667. return;
  3668. if (!txrx_peer->delay_stats)
  3669. return;
  3670. tid = ts->tid;
  3671. delay_stats = txrx_peer->delay_stats;
  3672. qdf_assert(ring < CDP_MAX_TXRX_CTX);
  3673. /*
  3674. * For non-TID packets use the TID 9
  3675. */
  3676. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3677. tid = CDP_MAX_DATA_TIDS - 1;
  3678. dp_tx_compute_tid_delay(&delay_stats->delay_tid_stats[tid][ring_id],
  3679. tx_desc, ts, txrx_peer->vdev);
  3680. }
  3681. #else
  3682. static inline
  3683. void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3684. struct dp_tx_desc_s *tx_desc,
  3685. struct hal_tx_completion_status *ts,
  3686. uint8_t ring_id)
  3687. {
  3688. }
  3689. #endif
  3690. #ifdef WLAN_PEER_JITTER
  3691. /**
  3692. * dp_tx_jitter_get_avg_jitter() - compute the average jitter
  3693. * @curr_delay: Current delay
  3694. * @prev_delay: Previous delay
  3695. * @avg_jitter: Average Jitter
  3696. * Return: Newly Computed Average Jitter
  3697. */
  3698. static uint32_t dp_tx_jitter_get_avg_jitter(uint32_t curr_delay,
  3699. uint32_t prev_delay,
  3700. uint32_t avg_jitter)
  3701. {
  3702. uint32_t curr_jitter;
  3703. int32_t jitter_diff;
  3704. curr_jitter = qdf_abs(curr_delay - prev_delay);
  3705. if (!avg_jitter)
  3706. return curr_jitter;
  3707. jitter_diff = curr_jitter - avg_jitter;
  3708. if (jitter_diff < 0)
  3709. avg_jitter = avg_jitter -
  3710. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3711. else
  3712. avg_jitter = avg_jitter +
  3713. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3714. return avg_jitter;
  3715. }
  3716. /**
  3717. * dp_tx_jitter_get_avg_delay() - compute the average delay
  3718. * @curr_delay: Current delay
  3719. * @avg_delay: Average delay
  3720. * Return: Newly Computed Average Delay
  3721. */
  3722. static uint32_t dp_tx_jitter_get_avg_delay(uint32_t curr_delay,
  3723. uint32_t avg_delay)
  3724. {
  3725. int32_t delay_diff;
  3726. if (!avg_delay)
  3727. return curr_delay;
  3728. delay_diff = curr_delay - avg_delay;
  3729. if (delay_diff < 0)
  3730. avg_delay = avg_delay - (qdf_abs(delay_diff) >>
  3731. DP_AVG_DELAY_WEIGHT_DENOM);
  3732. else
  3733. avg_delay = avg_delay + (qdf_abs(delay_diff) >>
  3734. DP_AVG_DELAY_WEIGHT_DENOM);
  3735. return avg_delay;
  3736. }
  3737. #ifdef WLAN_CONFIG_TX_DELAY
  3738. /**
  3739. * dp_tx_compute_cur_delay() - get the current delay
  3740. * @soc: soc handle
  3741. * @vdev: vdev structure for data path state
  3742. * @ts: Tx completion status
  3743. * @curr_delay: current delay
  3744. * @tx_desc: tx descriptor
  3745. * Return: void
  3746. */
  3747. static
  3748. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3749. struct dp_vdev *vdev,
  3750. struct hal_tx_completion_status *ts,
  3751. uint32_t *curr_delay,
  3752. struct dp_tx_desc_s *tx_desc)
  3753. {
  3754. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3755. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3756. status = soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3757. curr_delay);
  3758. return status;
  3759. }
  3760. #else
  3761. static
  3762. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3763. struct dp_vdev *vdev,
  3764. struct hal_tx_completion_status *ts,
  3765. uint32_t *curr_delay,
  3766. struct dp_tx_desc_s *tx_desc)
  3767. {
  3768. int64_t current_timestamp, timestamp_hw_enqueue;
  3769. current_timestamp = qdf_ktime_to_us(qdf_ktime_real_get());
  3770. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3771. *curr_delay = (uint32_t)(current_timestamp - timestamp_hw_enqueue);
  3772. return QDF_STATUS_SUCCESS;
  3773. }
  3774. #endif
  3775. /**
  3776. * dp_tx_compute_tid_jitter() - compute per tid per ring jitter
  3777. * @jitter: per tid per ring jitter stats
  3778. * @ts: Tx completion status
  3779. * @vdev: vdev structure for data path state
  3780. * @tx_desc: tx descriptor
  3781. * Return: void
  3782. */
  3783. static void dp_tx_compute_tid_jitter(struct cdp_peer_tid_stats *jitter,
  3784. struct hal_tx_completion_status *ts,
  3785. struct dp_vdev *vdev,
  3786. struct dp_tx_desc_s *tx_desc)
  3787. {
  3788. uint32_t curr_delay, avg_delay, avg_jitter, prev_delay;
  3789. struct dp_soc *soc = vdev->pdev->soc;
  3790. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3791. if (ts->status != HAL_TX_TQM_RR_FRAME_ACKED) {
  3792. jitter->tx_drop += 1;
  3793. return;
  3794. }
  3795. status = dp_tx_compute_cur_delay(soc, vdev, ts, &curr_delay,
  3796. tx_desc);
  3797. if (QDF_IS_STATUS_SUCCESS(status)) {
  3798. avg_delay = jitter->tx_avg_delay;
  3799. avg_jitter = jitter->tx_avg_jitter;
  3800. prev_delay = jitter->tx_prev_delay;
  3801. avg_jitter = dp_tx_jitter_get_avg_jitter(curr_delay,
  3802. prev_delay,
  3803. avg_jitter);
  3804. avg_delay = dp_tx_jitter_get_avg_delay(curr_delay, avg_delay);
  3805. jitter->tx_avg_delay = avg_delay;
  3806. jitter->tx_avg_jitter = avg_jitter;
  3807. jitter->tx_prev_delay = curr_delay;
  3808. jitter->tx_total_success += 1;
  3809. } else if (status == QDF_STATUS_E_FAILURE) {
  3810. jitter->tx_avg_err += 1;
  3811. }
  3812. }
  3813. /* dp_tx_update_peer_jitter_stats() - Update the peer jitter stats
  3814. * @txrx_peer: DP peer context
  3815. * @tx_desc: Tx software descriptor
  3816. * @ts: Tx completion status
  3817. * @ring_id: Rx CPU context ID/CPU_ID
  3818. * Return: void
  3819. */
  3820. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3821. struct dp_tx_desc_s *tx_desc,
  3822. struct hal_tx_completion_status *ts,
  3823. uint8_t ring_id)
  3824. {
  3825. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3826. struct dp_soc *soc = pdev->soc;
  3827. struct cdp_peer_tid_stats *jitter_stats = NULL;
  3828. uint8_t tid;
  3829. struct cdp_peer_tid_stats *rx_tid = NULL;
  3830. if (qdf_likely(!wlan_cfg_is_peer_jitter_stats_enabled(soc->wlan_cfg_ctx)))
  3831. return;
  3832. tid = ts->tid;
  3833. jitter_stats = txrx_peer->jitter_stats;
  3834. qdf_assert_always(jitter_stats);
  3835. qdf_assert(ring < CDP_MAX_TXRX_CTX);
  3836. /*
  3837. * For non-TID packets use the TID 9
  3838. */
  3839. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3840. tid = CDP_MAX_DATA_TIDS - 1;
  3841. rx_tid = &jitter_stats[tid * CDP_MAX_TXRX_CTX + ring_id];
  3842. dp_tx_compute_tid_jitter(rx_tid,
  3843. ts, txrx_peer->vdev, tx_desc);
  3844. }
  3845. #else
  3846. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3847. struct dp_tx_desc_s *tx_desc,
  3848. struct hal_tx_completion_status *ts,
  3849. uint8_t ring_id)
  3850. {
  3851. }
  3852. #endif
  3853. #ifdef HW_TX_DELAY_STATS_ENABLE
  3854. /**
  3855. * dp_update_tx_delay_stats() - update the delay stats
  3856. * @vdev: vdev handle
  3857. * @delay: delay in ms or us based on the flag delay_in_us
  3858. * @tid: tid value
  3859. * @mode: type of tx delay mode
  3860. * @ring_id: ring number
  3861. * @delay_in_us: flag to indicate whether the delay is in ms or us
  3862. *
  3863. * Return: none
  3864. */
  3865. static inline
  3866. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3867. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3868. {
  3869. struct cdp_tid_tx_stats *tstats =
  3870. &vdev->stats.tid_tx_stats[ring_id][tid];
  3871. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3872. delay_in_us);
  3873. }
  3874. #else
  3875. static inline
  3876. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3877. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3878. {
  3879. struct cdp_tid_tx_stats *tstats =
  3880. &vdev->pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  3881. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3882. delay_in_us);
  3883. }
  3884. #endif
  3885. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  3886. uint8_t tid, uint8_t ring_id)
  3887. {
  3888. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3889. uint32_t sw_enqueue_delay, fwhw_transmit_delay, interframe_delay;
  3890. uint32_t fwhw_transmit_delay_us;
  3891. if (qdf_likely(!vdev->pdev->delay_stats_flag) &&
  3892. qdf_likely(!dp_is_vdev_tx_delay_stats_enabled(vdev)))
  3893. return;
  3894. if (dp_is_vdev_tx_delay_stats_enabled(vdev)) {
  3895. fwhw_transmit_delay_us =
  3896. qdf_ktime_to_us(qdf_ktime_real_get()) -
  3897. qdf_ktime_to_us(tx_desc->timestamp);
  3898. /*
  3899. * Delay between packet enqueued to HW and Tx completion in us
  3900. */
  3901. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay_us, tid,
  3902. CDP_DELAY_STATS_FW_HW_TRANSMIT,
  3903. ring_id, true);
  3904. /*
  3905. * For MCL, only enqueue to completion delay is required
  3906. * so return if the vdev flag is enabled.
  3907. */
  3908. return;
  3909. }
  3910. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3911. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3912. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3913. timestamp_hw_enqueue);
  3914. if (!timestamp_hw_enqueue)
  3915. return;
  3916. /*
  3917. * Delay between packet enqueued to HW and Tx completion in ms
  3918. */
  3919. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay, tid,
  3920. CDP_DELAY_STATS_FW_HW_TRANSMIT, ring_id,
  3921. false);
  3922. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3923. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3924. interframe_delay = (uint32_t)(timestamp_ingress -
  3925. vdev->prev_tx_enq_tstamp);
  3926. /*
  3927. * Delay in software enqueue
  3928. */
  3929. dp_update_tx_delay_stats(vdev, sw_enqueue_delay, tid,
  3930. CDP_DELAY_STATS_SW_ENQ, ring_id,
  3931. false);
  3932. /*
  3933. * Update interframe delay stats calculated at hardstart receive point.
  3934. * Value of vdev->prev_tx_enq_tstamp will be 0 for 1st frame, so
  3935. * interframe delay will not be calculate correctly for 1st frame.
  3936. * On the other side, this will help in avoiding extra per packet check
  3937. * of !vdev->prev_tx_enq_tstamp.
  3938. */
  3939. dp_update_tx_delay_stats(vdev, interframe_delay, tid,
  3940. CDP_DELAY_STATS_TX_INTERFRAME, ring_id,
  3941. false);
  3942. vdev->prev_tx_enq_tstamp = timestamp_ingress;
  3943. }
  3944. #ifdef DISABLE_DP_STATS
  3945. static
  3946. inline void dp_update_no_ack_stats(qdf_nbuf_t nbuf,
  3947. struct dp_txrx_peer *txrx_peer,
  3948. uint8_t link_id)
  3949. {
  3950. }
  3951. #else
  3952. static inline void
  3953. dp_update_no_ack_stats(qdf_nbuf_t nbuf, struct dp_txrx_peer *txrx_peer,
  3954. uint8_t link_id)
  3955. {
  3956. enum qdf_proto_subtype subtype = QDF_PROTO_INVALID;
  3957. DPTRACE(qdf_dp_track_noack_check(nbuf, &subtype));
  3958. if (subtype != QDF_PROTO_INVALID)
  3959. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.no_ack_count[subtype],
  3960. 1, link_id);
  3961. }
  3962. #endif
  3963. #ifndef QCA_ENHANCED_STATS_SUPPORT
  3964. #ifdef DP_PEER_EXTENDED_API
  3965. static inline uint8_t
  3966. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3967. {
  3968. return txrx_peer->mpdu_retry_threshold;
  3969. }
  3970. #else
  3971. static inline uint8_t
  3972. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3973. {
  3974. return 0;
  3975. }
  3976. #endif
  3977. /**
  3978. * dp_tx_update_peer_extd_stats()- Update Tx extended path stats for peer
  3979. *
  3980. * @ts: Tx compltion status
  3981. * @txrx_peer: datapath txrx_peer handle
  3982. * @link_id: Link id
  3983. *
  3984. * Return: void
  3985. */
  3986. static inline void
  3987. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  3988. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  3989. {
  3990. uint8_t mcs, pkt_type, dst_mcs_idx;
  3991. uint8_t retry_threshold = dp_tx_get_mpdu_retry_threshold(txrx_peer);
  3992. mcs = ts->mcs;
  3993. pkt_type = ts->pkt_type;
  3994. /* do HW to SW pkt type conversion */
  3995. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  3996. hal_2_dp_pkt_type_map[pkt_type]);
  3997. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  3998. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  3999. DP_PEER_EXTD_STATS_INC(txrx_peer,
  4000. tx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  4001. 1, link_id);
  4002. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.sgi_count[ts->sgi], 1, link_id);
  4003. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.bw[ts->bw], 1, link_id);
  4004. DP_PEER_EXTD_STATS_UPD(txrx_peer, tx.last_ack_rssi, ts->ack_frame_rssi,
  4005. link_id);
  4006. DP_PEER_EXTD_STATS_INC(txrx_peer,
  4007. tx.wme_ac_type[TID_TO_WME_AC(ts->tid)], 1,
  4008. link_id);
  4009. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.stbc, 1, ts->stbc, link_id);
  4010. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.ldpc, 1, ts->ldpc, link_id);
  4011. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries, 1, ts->transmit_cnt > 1,
  4012. link_id);
  4013. if (ts->first_msdu) {
  4014. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries_mpdu, 1,
  4015. ts->transmit_cnt > 1, link_id);
  4016. if (!retry_threshold)
  4017. return;
  4018. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.mpdu_success_with_retries,
  4019. qdf_do_div(ts->transmit_cnt,
  4020. retry_threshold),
  4021. ts->transmit_cnt > retry_threshold,
  4022. link_id);
  4023. }
  4024. }
  4025. #else
  4026. static inline void
  4027. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  4028. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  4029. {
  4030. }
  4031. #endif
  4032. #if defined(WLAN_FEATURE_11BE_MLO) && \
  4033. (defined(QCA_ENHANCED_STATS_SUPPORT) || \
  4034. defined(DP_MLO_LINK_STATS_SUPPORT))
  4035. static inline uint8_t
  4036. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4037. struct hal_tx_completion_status *ts,
  4038. struct dp_txrx_peer *txrx_peer,
  4039. struct dp_vdev *vdev)
  4040. {
  4041. uint8_t hw_link_id = 0;
  4042. uint32_t ppdu_id;
  4043. uint8_t link_id_offset, link_id_bits;
  4044. if (!txrx_peer->is_mld_peer || !vdev->pdev->link_peer_stats)
  4045. return 0;
  4046. link_id_offset = soc->link_id_offset;
  4047. link_id_bits = soc->link_id_bits;
  4048. ppdu_id = ts->ppdu_id;
  4049. hw_link_id = ((DP_GET_HW_LINK_ID_FRM_PPDU_ID(ppdu_id, link_id_offset,
  4050. link_id_bits)) + 1);
  4051. if (hw_link_id > DP_MAX_MLO_LINKS) {
  4052. hw_link_id = 0;
  4053. DP_PEER_PER_PKT_STATS_INC(
  4054. txrx_peer,
  4055. tx.inval_link_id_pkt_cnt, 1, hw_link_id);
  4056. }
  4057. return hw_link_id;
  4058. }
  4059. #else
  4060. static inline uint8_t
  4061. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4062. struct hal_tx_completion_status *ts,
  4063. struct dp_txrx_peer *txrx_peer,
  4064. struct dp_vdev *vdev)
  4065. {
  4066. return 0;
  4067. }
  4068. #endif
  4069. /**
  4070. * dp_tx_update_peer_stats() - Update peer stats from Tx completion indications
  4071. * per wbm ring
  4072. *
  4073. * @tx_desc: software descriptor head pointer
  4074. * @ts: Tx completion status
  4075. * @txrx_peer: peer handle
  4076. * @ring_id: ring number
  4077. * @link_id: Link id
  4078. *
  4079. * Return: None
  4080. */
  4081. static inline void
  4082. dp_tx_update_peer_stats(struct dp_tx_desc_s *tx_desc,
  4083. struct hal_tx_completion_status *ts,
  4084. struct dp_txrx_peer *txrx_peer, uint8_t ring_id,
  4085. uint8_t link_id)
  4086. {
  4087. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  4088. uint8_t tid = ts->tid;
  4089. uint32_t length;
  4090. struct cdp_tid_tx_stats *tid_stats;
  4091. if (!pdev)
  4092. return;
  4093. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  4094. tid = CDP_MAX_DATA_TIDS - 1;
  4095. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  4096. if (ts->release_src != HAL_TX_COMP_RELEASE_SOURCE_TQM) {
  4097. dp_err_rl("Release source:%d is not from TQM", ts->release_src);
  4098. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.release_src_not_tqm, 1,
  4099. link_id);
  4100. return;
  4101. }
  4102. length = qdf_nbuf_len(tx_desc->nbuf);
  4103. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4104. if (qdf_unlikely(pdev->delay_stats_flag) ||
  4105. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(txrx_peer->vdev)))
  4106. dp_tx_compute_delay(txrx_peer->vdev, tx_desc, tid, ring_id);
  4107. if (ts->status < CDP_MAX_TX_TQM_STATUS) {
  4108. tid_stats->tqm_status_cnt[ts->status]++;
  4109. }
  4110. if (qdf_likely(ts->status == HAL_TX_TQM_RR_FRAME_ACKED)) {
  4111. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.retry_count, 1,
  4112. ts->transmit_cnt > 1, link_id);
  4113. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.multiple_retry_count,
  4114. 1, ts->transmit_cnt > 2, link_id);
  4115. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.ofdma, 1, ts->ofdma,
  4116. link_id);
  4117. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.amsdu_cnt, 1,
  4118. ts->msdu_part_of_amsdu, link_id);
  4119. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.non_amsdu_cnt, 1,
  4120. !ts->msdu_part_of_amsdu, link_id);
  4121. txrx_peer->stats[link_id].per_pkt_stats.tx.last_tx_ts =
  4122. qdf_system_ticks();
  4123. dp_tx_update_peer_extd_stats(ts, txrx_peer, link_id);
  4124. return;
  4125. }
  4126. /*
  4127. * tx_failed is ideally supposed to be updated from HTT ppdu
  4128. * completion stats. But in IPQ807X/IPQ6018 chipsets owing to
  4129. * hw limitation there are no completions for failed cases.
  4130. * Hence updating tx_failed from data path. Please note that
  4131. * if tx_failed is fixed to be from ppdu, then this has to be
  4132. * removed
  4133. */
  4134. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4135. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.failed_retry_count, 1,
  4136. ts->transmit_cnt > DP_RETRY_COUNT,
  4137. link_id);
  4138. dp_update_no_ack_stats(tx_desc->nbuf, txrx_peer, link_id);
  4139. if (ts->status == HAL_TX_TQM_RR_REM_CMD_AGED) {
  4140. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.age_out, 1,
  4141. link_id);
  4142. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_REM) {
  4143. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.dropped.fw_rem, 1,
  4144. length, link_id);
  4145. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_NOTX) {
  4146. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_notx, 1,
  4147. link_id);
  4148. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TX) {
  4149. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_tx, 1,
  4150. link_id);
  4151. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON1) {
  4152. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason1, 1,
  4153. link_id);
  4154. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON2) {
  4155. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason2, 1,
  4156. link_id);
  4157. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON3) {
  4158. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason3, 1,
  4159. link_id);
  4160. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_DISABLE_QUEUE) {
  4161. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4162. tx.dropped.fw_rem_queue_disable, 1,
  4163. link_id);
  4164. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TILL_NONMATCHING) {
  4165. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4166. tx.dropped.fw_rem_no_match, 1,
  4167. link_id);
  4168. } else if (ts->status == HAL_TX_TQM_RR_DROP_THRESHOLD) {
  4169. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4170. tx.dropped.drop_threshold, 1,
  4171. link_id);
  4172. } else if (ts->status == HAL_TX_TQM_RR_LINK_DESC_UNAVAILABLE) {
  4173. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4174. tx.dropped.drop_link_desc_na, 1,
  4175. link_id);
  4176. } else if (ts->status == HAL_TX_TQM_RR_DROP_OR_INVALID_MSDU) {
  4177. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4178. tx.dropped.invalid_drop, 1,
  4179. link_id);
  4180. } else if (ts->status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4181. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4182. tx.dropped.mcast_vdev_drop, 1,
  4183. link_id);
  4184. } else {
  4185. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.invalid_rr, 1,
  4186. link_id);
  4187. }
  4188. }
  4189. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4190. /**
  4191. * dp_tx_flow_pool_lock() - take flow pool lock
  4192. * @soc: core txrx main context
  4193. * @tx_desc: tx desc
  4194. *
  4195. * Return: None
  4196. */
  4197. static inline
  4198. void dp_tx_flow_pool_lock(struct dp_soc *soc,
  4199. struct dp_tx_desc_s *tx_desc)
  4200. {
  4201. struct dp_tx_desc_pool_s *pool;
  4202. uint8_t desc_pool_id;
  4203. desc_pool_id = tx_desc->pool_id;
  4204. pool = &soc->tx_desc[desc_pool_id];
  4205. qdf_spin_lock_bh(&pool->flow_pool_lock);
  4206. }
  4207. /**
  4208. * dp_tx_flow_pool_unlock() - release flow pool lock
  4209. * @soc: core txrx main context
  4210. * @tx_desc: tx desc
  4211. *
  4212. * Return: None
  4213. */
  4214. static inline
  4215. void dp_tx_flow_pool_unlock(struct dp_soc *soc,
  4216. struct dp_tx_desc_s *tx_desc)
  4217. {
  4218. struct dp_tx_desc_pool_s *pool;
  4219. uint8_t desc_pool_id;
  4220. desc_pool_id = tx_desc->pool_id;
  4221. pool = &soc->tx_desc[desc_pool_id];
  4222. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  4223. }
  4224. #else
  4225. static inline
  4226. void dp_tx_flow_pool_lock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4227. {
  4228. }
  4229. static inline
  4230. void dp_tx_flow_pool_unlock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4231. {
  4232. }
  4233. #endif
  4234. /**
  4235. * dp_tx_notify_completion() - Notify tx completion for this desc
  4236. * @soc: core txrx main context
  4237. * @vdev: datapath vdev handle
  4238. * @tx_desc: tx desc
  4239. * @netbuf: buffer
  4240. * @status: tx status
  4241. *
  4242. * Return: none
  4243. */
  4244. static inline void dp_tx_notify_completion(struct dp_soc *soc,
  4245. struct dp_vdev *vdev,
  4246. struct dp_tx_desc_s *tx_desc,
  4247. qdf_nbuf_t netbuf,
  4248. uint8_t status)
  4249. {
  4250. void *osif_dev;
  4251. ol_txrx_completion_fp tx_compl_cbk = NULL;
  4252. uint16_t flag = BIT(QDF_TX_RX_STATUS_DOWNLOAD_SUCC);
  4253. qdf_assert(tx_desc);
  4254. if (!vdev ||
  4255. !vdev->osif_vdev) {
  4256. return;
  4257. }
  4258. osif_dev = vdev->osif_vdev;
  4259. tx_compl_cbk = vdev->tx_comp;
  4260. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4261. flag |= BIT(QDF_TX_RX_STATUS_OK);
  4262. if (tx_compl_cbk)
  4263. tx_compl_cbk(netbuf, osif_dev, flag);
  4264. }
  4265. /**
  4266. * dp_tx_sojourn_stats_process() - Collect sojourn stats
  4267. * @pdev: pdev handle
  4268. * @txrx_peer: DP peer context
  4269. * @tid: tid value
  4270. * @txdesc_ts: timestamp from txdesc
  4271. * @ppdu_id: ppdu id
  4272. * @link_id: link id
  4273. *
  4274. * Return: none
  4275. */
  4276. #ifdef FEATURE_PERPKT_INFO
  4277. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4278. struct dp_txrx_peer *txrx_peer,
  4279. uint8_t tid,
  4280. uint64_t txdesc_ts,
  4281. uint32_t ppdu_id,
  4282. uint8_t link_id)
  4283. {
  4284. uint64_t delta_ms;
  4285. struct cdp_tx_sojourn_stats *sojourn_stats;
  4286. struct dp_peer *primary_link_peer = NULL;
  4287. struct dp_soc *link_peer_soc = NULL;
  4288. if (qdf_unlikely(!pdev->enhanced_stats_en))
  4289. return;
  4290. if (qdf_unlikely(tid == HTT_INVALID_TID ||
  4291. tid >= CDP_DATA_TID_MAX))
  4292. return;
  4293. if (qdf_unlikely(!pdev->sojourn_buf))
  4294. return;
  4295. primary_link_peer = dp_get_primary_link_peer_by_id(pdev->soc,
  4296. txrx_peer->peer_id,
  4297. DP_MOD_ID_TX_COMP);
  4298. if (qdf_unlikely(!primary_link_peer))
  4299. return;
  4300. sojourn_stats = (struct cdp_tx_sojourn_stats *)
  4301. qdf_nbuf_data(pdev->sojourn_buf);
  4302. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  4303. sojourn_stats->cookie = (void *)
  4304. dp_monitor_peer_get_peerstats_ctx(link_peer_soc,
  4305. primary_link_peer);
  4306. delta_ms = qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4307. txdesc_ts;
  4308. qdf_ewma_tx_lag_add(&txrx_peer->stats[link_id].per_pkt_stats.tx.avg_sojourn_msdu[tid],
  4309. delta_ms);
  4310. sojourn_stats->sum_sojourn_msdu[tid] = delta_ms;
  4311. sojourn_stats->num_msdus[tid] = 1;
  4312. sojourn_stats->avg_sojourn_msdu[tid].internal =
  4313. txrx_peer->stats[link_id].
  4314. per_pkt_stats.tx.avg_sojourn_msdu[tid].internal;
  4315. dp_wdi_event_handler(WDI_EVENT_TX_SOJOURN_STAT, pdev->soc,
  4316. pdev->sojourn_buf, HTT_INVALID_PEER,
  4317. WDI_NO_VAL, pdev->pdev_id);
  4318. sojourn_stats->sum_sojourn_msdu[tid] = 0;
  4319. sojourn_stats->num_msdus[tid] = 0;
  4320. sojourn_stats->avg_sojourn_msdu[tid].internal = 0;
  4321. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_TX_COMP);
  4322. }
  4323. #else
  4324. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4325. struct dp_txrx_peer *txrx_peer,
  4326. uint8_t tid,
  4327. uint64_t txdesc_ts,
  4328. uint32_t ppdu_id)
  4329. {
  4330. }
  4331. #endif
  4332. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  4333. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  4334. struct dp_tx_desc_s *desc,
  4335. struct hal_tx_completion_status *ts)
  4336. {
  4337. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_TX_DATA, soc,
  4338. desc, ts->peer_id,
  4339. WDI_NO_VAL, desc->pdev->pdev_id);
  4340. }
  4341. #endif
  4342. void
  4343. dp_tx_comp_process_desc(struct dp_soc *soc,
  4344. struct dp_tx_desc_s *desc,
  4345. struct hal_tx_completion_status *ts,
  4346. struct dp_txrx_peer *txrx_peer)
  4347. {
  4348. uint64_t time_latency = 0;
  4349. uint16_t peer_id = DP_INVALID_PEER_ID;
  4350. /*
  4351. * m_copy/tx_capture modes are not supported for
  4352. * scatter gather packets
  4353. */
  4354. if (qdf_unlikely(!!desc->pdev->latency_capture_enable)) {
  4355. time_latency = (qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4356. qdf_ktime_to_ms(desc->timestamp));
  4357. }
  4358. dp_send_completion_to_pkt_capture(soc, desc, ts);
  4359. if (dp_tx_pkt_tracepoints_enabled())
  4360. qdf_trace_dp_packet(desc->nbuf, QDF_TX,
  4361. desc->msdu_ext_desc ?
  4362. desc->msdu_ext_desc->tso_desc : NULL,
  4363. qdf_ktime_to_us(desc->timestamp));
  4364. if (!(desc->msdu_ext_desc)) {
  4365. dp_tx_enh_unmap(soc, desc);
  4366. if (txrx_peer)
  4367. peer_id = txrx_peer->peer_id;
  4368. if (QDF_STATUS_SUCCESS ==
  4369. dp_monitor_tx_add_to_comp_queue(soc, desc, ts, peer_id)) {
  4370. return;
  4371. }
  4372. if (QDF_STATUS_SUCCESS ==
  4373. dp_get_completion_indication_for_stack(soc,
  4374. desc->pdev,
  4375. txrx_peer, ts,
  4376. desc->nbuf,
  4377. time_latency)) {
  4378. dp_send_completion_to_stack(soc,
  4379. desc->pdev,
  4380. ts->peer_id,
  4381. ts->ppdu_id,
  4382. desc->nbuf);
  4383. return;
  4384. }
  4385. }
  4386. desc->flags |= DP_TX_DESC_FLAG_COMPLETED_TX;
  4387. dp_tx_comp_free_buf(soc, desc, false);
  4388. }
  4389. #ifdef DISABLE_DP_STATS
  4390. /**
  4391. * dp_tx_update_connectivity_stats() - update tx connectivity stats
  4392. * @soc: core txrx main context
  4393. * @vdev: virtual device instance
  4394. * @tx_desc: tx desc
  4395. * @status: tx status
  4396. *
  4397. * Return: none
  4398. */
  4399. static inline
  4400. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4401. struct dp_vdev *vdev,
  4402. struct dp_tx_desc_s *tx_desc,
  4403. uint8_t status)
  4404. {
  4405. }
  4406. #else
  4407. static inline
  4408. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4409. struct dp_vdev *vdev,
  4410. struct dp_tx_desc_s *tx_desc,
  4411. uint8_t status)
  4412. {
  4413. void *osif_dev;
  4414. ol_txrx_stats_rx_fp stats_cbk;
  4415. uint8_t pkt_type;
  4416. qdf_assert(tx_desc);
  4417. if (!vdev ||
  4418. !vdev->osif_vdev ||
  4419. !vdev->stats_cb)
  4420. return;
  4421. osif_dev = vdev->osif_vdev;
  4422. stats_cbk = vdev->stats_cb;
  4423. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_HOST_FW_SENT, &pkt_type);
  4424. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4425. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_ACK_CNT,
  4426. &pkt_type);
  4427. }
  4428. #endif
  4429. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  4430. /* Mask for bit29 ~ bit31 */
  4431. #define DP_TX_TS_BIT29_31_MASK 0xE0000000
  4432. /* Timestamp value (unit us) if bit29 is set */
  4433. #define DP_TX_TS_BIT29_SET_VALUE BIT(29)
  4434. /**
  4435. * dp_tx_adjust_enqueue_buffer_ts() - adjust the enqueue buffer_timestamp
  4436. * @ack_ts: OTA ack timestamp, unit us.
  4437. * @enqueue_ts: TCL enqueue TX data to TQM timestamp, unit us.
  4438. * @base_delta_ts: base timestamp delta for ack_ts and enqueue_ts
  4439. *
  4440. * this function will restore the bit29 ~ bit31 3 bits value for
  4441. * buffer_timestamp in wbm2sw ring entry, currently buffer_timestamp only
  4442. * can support 0x7FFF * 1024 us (29 bits), but if the timestamp is >
  4443. * 0x7FFF * 1024 us, bit29~ bit31 will be lost.
  4444. *
  4445. * Return: the adjusted buffer_timestamp value
  4446. */
  4447. static inline
  4448. uint32_t dp_tx_adjust_enqueue_buffer_ts(uint32_t ack_ts,
  4449. uint32_t enqueue_ts,
  4450. uint32_t base_delta_ts)
  4451. {
  4452. uint32_t ack_buffer_ts;
  4453. uint32_t ack_buffer_ts_bit29_31;
  4454. uint32_t adjusted_enqueue_ts;
  4455. /* corresponding buffer_timestamp value when receive OTA Ack */
  4456. ack_buffer_ts = ack_ts - base_delta_ts;
  4457. ack_buffer_ts_bit29_31 = ack_buffer_ts & DP_TX_TS_BIT29_31_MASK;
  4458. /* restore the bit29 ~ bit31 value */
  4459. adjusted_enqueue_ts = ack_buffer_ts_bit29_31 | enqueue_ts;
  4460. /*
  4461. * if actual enqueue_ts value occupied 29 bits only, this enqueue_ts
  4462. * value + real UL delay overflow 29 bits, then 30th bit (bit-29)
  4463. * should not be marked, otherwise extra 0x20000000 us is added to
  4464. * enqueue_ts.
  4465. */
  4466. if (qdf_unlikely(adjusted_enqueue_ts > ack_buffer_ts))
  4467. adjusted_enqueue_ts -= DP_TX_TS_BIT29_SET_VALUE;
  4468. return adjusted_enqueue_ts;
  4469. }
  4470. QDF_STATUS
  4471. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  4472. uint32_t delta_tsf,
  4473. uint32_t *delay_us)
  4474. {
  4475. uint32_t buffer_ts;
  4476. uint32_t delay;
  4477. if (!delay_us)
  4478. return QDF_STATUS_E_INVAL;
  4479. /* Tx_rate_stats_info_valid is 0 and tsf is invalid then */
  4480. if (!ts->valid)
  4481. return QDF_STATUS_E_INVAL;
  4482. /* buffer_timestamp is in units of 1024 us and is [31:13] of
  4483. * WBM_RELEASE_RING_4. After left shift 10 bits, it's
  4484. * valid up to 29 bits.
  4485. */
  4486. buffer_ts = ts->buffer_timestamp << 10;
  4487. buffer_ts = dp_tx_adjust_enqueue_buffer_ts(ts->tsf,
  4488. buffer_ts, delta_tsf);
  4489. delay = ts->tsf - buffer_ts - delta_tsf;
  4490. if (qdf_unlikely(delay & 0x80000000)) {
  4491. dp_err_rl("delay = 0x%x (-ve)\n"
  4492. "release_src = %d\n"
  4493. "ppdu_id = 0x%x\n"
  4494. "peer_id = 0x%x\n"
  4495. "tid = 0x%x\n"
  4496. "release_reason = %d\n"
  4497. "tsf = %u (0x%x)\n"
  4498. "buffer_timestamp = %u (0x%x)\n"
  4499. "delta_tsf = %u (0x%x)\n",
  4500. delay, ts->release_src, ts->ppdu_id, ts->peer_id,
  4501. ts->tid, ts->status, ts->tsf, ts->tsf,
  4502. ts->buffer_timestamp, ts->buffer_timestamp,
  4503. delta_tsf, delta_tsf);
  4504. delay = 0;
  4505. goto end;
  4506. }
  4507. delay &= 0x1FFFFFFF; /* mask 29 BITS */
  4508. if (delay > 0x1000000) {
  4509. dp_info_rl("----------------------\n"
  4510. "Tx completion status:\n"
  4511. "----------------------\n"
  4512. "release_src = %d\n"
  4513. "ppdu_id = 0x%x\n"
  4514. "release_reason = %d\n"
  4515. "tsf = %u (0x%x)\n"
  4516. "buffer_timestamp = %u (0x%x)\n"
  4517. "delta_tsf = %u (0x%x)\n",
  4518. ts->release_src, ts->ppdu_id, ts->status,
  4519. ts->tsf, ts->tsf, ts->buffer_timestamp,
  4520. ts->buffer_timestamp, delta_tsf, delta_tsf);
  4521. return QDF_STATUS_E_FAILURE;
  4522. }
  4523. end:
  4524. *delay_us = delay;
  4525. return QDF_STATUS_SUCCESS;
  4526. }
  4527. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4528. uint32_t delta_tsf)
  4529. {
  4530. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4531. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4532. DP_MOD_ID_CDP);
  4533. if (!vdev) {
  4534. dp_err_rl("vdev %d does not exist", vdev_id);
  4535. return;
  4536. }
  4537. vdev->delta_tsf = delta_tsf;
  4538. dp_debug("vdev id %u delta_tsf %u", vdev_id, delta_tsf);
  4539. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4540. }
  4541. #endif
  4542. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  4543. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  4544. uint8_t vdev_id, bool enable)
  4545. {
  4546. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4547. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4548. DP_MOD_ID_CDP);
  4549. if (!vdev) {
  4550. dp_err_rl("vdev %d does not exist", vdev_id);
  4551. return QDF_STATUS_E_FAILURE;
  4552. }
  4553. qdf_atomic_set(&vdev->ul_delay_report, enable);
  4554. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4555. return QDF_STATUS_SUCCESS;
  4556. }
  4557. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4558. uint32_t *val)
  4559. {
  4560. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4561. struct dp_vdev *vdev;
  4562. uint32_t delay_accum;
  4563. uint32_t pkts_accum;
  4564. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  4565. if (!vdev) {
  4566. dp_err_rl("vdev %d does not exist", vdev_id);
  4567. return QDF_STATUS_E_FAILURE;
  4568. }
  4569. if (!qdf_atomic_read(&vdev->ul_delay_report)) {
  4570. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4571. return QDF_STATUS_E_FAILURE;
  4572. }
  4573. /* Average uplink delay based on current accumulated values */
  4574. delay_accum = qdf_atomic_read(&vdev->ul_delay_accum);
  4575. pkts_accum = qdf_atomic_read(&vdev->ul_pkts_accum);
  4576. *val = delay_accum / pkts_accum;
  4577. dp_debug("uplink_delay %u delay_accum %u pkts_accum %u", *val,
  4578. delay_accum, pkts_accum);
  4579. /* Reset accumulated values to 0 */
  4580. qdf_atomic_set(&vdev->ul_delay_accum, 0);
  4581. qdf_atomic_set(&vdev->ul_pkts_accum, 0);
  4582. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4583. return QDF_STATUS_SUCCESS;
  4584. }
  4585. static void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4586. struct hal_tx_completion_status *ts)
  4587. {
  4588. uint32_t ul_delay;
  4589. if (qdf_unlikely(!vdev)) {
  4590. dp_info_rl("vdev is null or delete in progress");
  4591. return;
  4592. }
  4593. if (!qdf_atomic_read(&vdev->ul_delay_report))
  4594. return;
  4595. if (QDF_IS_STATUS_ERROR(dp_tx_compute_hw_delay_us(ts,
  4596. vdev->delta_tsf,
  4597. &ul_delay)))
  4598. return;
  4599. ul_delay /= 1000; /* in unit of ms */
  4600. qdf_atomic_add(ul_delay, &vdev->ul_delay_accum);
  4601. qdf_atomic_inc(&vdev->ul_pkts_accum);
  4602. }
  4603. #else /* !WLAN_FEATURE_TSF_UPLINK_DELAY */
  4604. static inline
  4605. void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4606. struct hal_tx_completion_status *ts)
  4607. {
  4608. }
  4609. #endif /* WLAN_FEATURE_TSF_UPLINK_DELAY */
  4610. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  4611. struct dp_tx_desc_s *tx_desc,
  4612. struct hal_tx_completion_status *ts,
  4613. struct dp_txrx_peer *txrx_peer,
  4614. uint8_t ring_id)
  4615. {
  4616. uint32_t length;
  4617. qdf_ether_header_t *eh;
  4618. struct dp_vdev *vdev = NULL;
  4619. qdf_nbuf_t nbuf = tx_desc->nbuf;
  4620. enum qdf_dp_tx_rx_status dp_status;
  4621. uint8_t link_id = 0;
  4622. enum QDF_OPMODE op_mode = QDF_MAX_NO_OF_MODE;
  4623. if (!nbuf) {
  4624. dp_info_rl("invalid tx descriptor. nbuf NULL");
  4625. goto out;
  4626. }
  4627. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  4628. length = dp_tx_get_pkt_len(tx_desc);
  4629. dp_status = dp_tx_hw_to_qdf(ts->status);
  4630. dp_tx_comp_debug("-------------------- \n"
  4631. "Tx Completion Stats: \n"
  4632. "-------------------- \n"
  4633. "ack_frame_rssi = %d \n"
  4634. "first_msdu = %d \n"
  4635. "last_msdu = %d \n"
  4636. "msdu_part_of_amsdu = %d \n"
  4637. "rate_stats valid = %d \n"
  4638. "bw = %d \n"
  4639. "pkt_type = %d \n"
  4640. "stbc = %d \n"
  4641. "ldpc = %d \n"
  4642. "sgi = %d \n"
  4643. "mcs = %d \n"
  4644. "ofdma = %d \n"
  4645. "tones_in_ru = %d \n"
  4646. "tsf = %d \n"
  4647. "ppdu_id = %d \n"
  4648. "transmit_cnt = %d \n"
  4649. "tid = %d \n"
  4650. "peer_id = %d\n"
  4651. "tx_status = %d\n"
  4652. "tx_release_source = %d\n",
  4653. ts->ack_frame_rssi, ts->first_msdu,
  4654. ts->last_msdu, ts->msdu_part_of_amsdu,
  4655. ts->valid, ts->bw, ts->pkt_type, ts->stbc,
  4656. ts->ldpc, ts->sgi, ts->mcs, ts->ofdma,
  4657. ts->tones_in_ru, ts->tsf, ts->ppdu_id,
  4658. ts->transmit_cnt, ts->tid, ts->peer_id,
  4659. ts->status, ts->release_src);
  4660. /* Update SoC level stats */
  4661. DP_STATS_INCC(soc, tx.dropped_fw_removed, 1,
  4662. (ts->status == HAL_TX_TQM_RR_REM_CMD_REM));
  4663. if (!txrx_peer) {
  4664. dp_info_rl("peer is null or deletion in progress");
  4665. DP_STATS_INC_PKT(soc, tx.tx_invalid_peer, 1, length);
  4666. goto out_log;
  4667. }
  4668. vdev = txrx_peer->vdev;
  4669. link_id = dp_tx_get_link_id_from_ppdu_id(soc, ts, txrx_peer, vdev);
  4670. op_mode = vdev->qdf_opmode;
  4671. dp_tx_update_connectivity_stats(soc, vdev, tx_desc, ts->status);
  4672. dp_tx_update_uplink_delay(soc, vdev, ts);
  4673. /* check tx complete notification */
  4674. if (qdf_nbuf_tx_notify_comp_get(nbuf))
  4675. dp_tx_notify_completion(soc, vdev, tx_desc,
  4676. nbuf, ts->status);
  4677. /* Update per-packet stats for mesh mode */
  4678. if (qdf_unlikely(vdev->mesh_vdev) &&
  4679. !(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW))
  4680. dp_tx_comp_fill_tx_completion_stats(tx_desc, ts);
  4681. /* Update peer level stats */
  4682. if (qdf_unlikely(txrx_peer->bss_peer &&
  4683. vdev->opmode == wlan_op_mode_ap)) {
  4684. if (ts->status != HAL_TX_TQM_RR_REM_CMD_REM) {
  4685. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.mcast, 1,
  4686. length, link_id);
  4687. if (txrx_peer->vdev->tx_encap_type ==
  4688. htt_cmn_pkt_type_ethernet &&
  4689. QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  4690. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4691. tx.bcast, 1,
  4692. length, link_id);
  4693. }
  4694. }
  4695. } else {
  4696. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.ucast, 1, length,
  4697. link_id);
  4698. if (ts->status == HAL_TX_TQM_RR_FRAME_ACKED) {
  4699. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.tx_success,
  4700. 1, length, link_id);
  4701. if (qdf_unlikely(txrx_peer->in_twt)) {
  4702. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4703. tx.tx_success_twt,
  4704. 1, length,
  4705. link_id);
  4706. }
  4707. }
  4708. }
  4709. dp_tx_update_peer_stats(tx_desc, ts, txrx_peer, ring_id, link_id);
  4710. dp_tx_update_peer_delay_stats(txrx_peer, tx_desc, ts, ring_id);
  4711. dp_tx_update_peer_jitter_stats(txrx_peer, tx_desc, ts, ring_id);
  4712. dp_tx_update_peer_sawf_stats(soc, vdev, txrx_peer, tx_desc,
  4713. ts, ts->tid);
  4714. dp_tx_send_pktlog(soc, vdev->pdev, tx_desc, nbuf, dp_status);
  4715. #ifdef QCA_SUPPORT_RDK_STATS
  4716. if (soc->peerstats_enabled)
  4717. dp_tx_sojourn_stats_process(vdev->pdev, txrx_peer, ts->tid,
  4718. qdf_ktime_to_ms(tx_desc->timestamp),
  4719. ts->ppdu_id, link_id);
  4720. #endif
  4721. out_log:
  4722. DPTRACE(qdf_dp_trace_ptr(tx_desc->nbuf,
  4723. QDF_DP_TRACE_LI_DP_FREE_PACKET_PTR_RECORD,
  4724. QDF_TRACE_DEFAULT_PDEV_ID,
  4725. qdf_nbuf_data_addr(nbuf),
  4726. sizeof(qdf_nbuf_data(nbuf)),
  4727. tx_desc->id, ts->status, dp_status, op_mode));
  4728. out:
  4729. return;
  4730. }
  4731. #if defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT) && \
  4732. defined(QCA_ENHANCED_STATS_SUPPORT)
  4733. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4734. uint32_t length, uint8_t tx_status,
  4735. bool update)
  4736. {
  4737. if (update || (!txrx_peer->hw_txrx_stats_en)) {
  4738. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4739. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4740. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4741. }
  4742. }
  4743. #elif defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT)
  4744. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4745. uint32_t length, uint8_t tx_status,
  4746. bool update)
  4747. {
  4748. if (!txrx_peer->hw_txrx_stats_en) {
  4749. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4750. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4751. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4752. }
  4753. }
  4754. #else
  4755. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4756. uint32_t length, uint8_t tx_status,
  4757. bool update)
  4758. {
  4759. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4760. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4761. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4762. }
  4763. #endif
  4764. /**
  4765. * dp_tx_prefetch_next_nbuf_data(): Prefetch nbuf and nbuf data
  4766. * @next: descriptor of the nrxt buffer
  4767. *
  4768. * Return: none
  4769. */
  4770. #ifdef QCA_DP_RX_NBUF_AND_NBUF_DATA_PREFETCH
  4771. static inline
  4772. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4773. {
  4774. qdf_nbuf_t nbuf = NULL;
  4775. if (next)
  4776. nbuf = next->nbuf;
  4777. if (nbuf)
  4778. qdf_prefetch(nbuf);
  4779. }
  4780. #else
  4781. static inline
  4782. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4783. {
  4784. }
  4785. #endif
  4786. /**
  4787. * dp_tx_mcast_reinject_handler() - Tx reinjected multicast packets handler
  4788. * @soc: core txrx main context
  4789. * @desc: software descriptor
  4790. *
  4791. * Return: true when packet is reinjected
  4792. */
  4793. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  4794. defined(WLAN_MCAST_MLO) && !defined(CONFIG_MLO_SINGLE_DEV)
  4795. static inline bool
  4796. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4797. {
  4798. struct dp_vdev *vdev = NULL;
  4799. if (desc->tx_status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4800. if (!soc->arch_ops.dp_tx_mcast_handler ||
  4801. !soc->arch_ops.dp_tx_is_mcast_primary)
  4802. return false;
  4803. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  4804. DP_MOD_ID_REINJECT);
  4805. if (qdf_unlikely(!vdev)) {
  4806. dp_tx_comp_info_rl("Unable to get vdev ref %d",
  4807. desc->id);
  4808. return false;
  4809. }
  4810. if (!(soc->arch_ops.dp_tx_is_mcast_primary(soc, vdev))) {
  4811. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4812. return false;
  4813. }
  4814. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  4815. qdf_nbuf_len(desc->nbuf));
  4816. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, desc->nbuf);
  4817. dp_tx_desc_release(soc, desc, desc->pool_id);
  4818. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4819. return true;
  4820. }
  4821. return false;
  4822. }
  4823. #else
  4824. static inline bool
  4825. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4826. {
  4827. return false;
  4828. }
  4829. #endif
  4830. #ifdef QCA_DP_TX_NBUF_LIST_FREE
  4831. static inline void
  4832. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4833. {
  4834. qdf_nbuf_queue_head_init(nbuf_queue_head);
  4835. }
  4836. static inline void
  4837. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4838. struct dp_tx_desc_s *desc)
  4839. {
  4840. qdf_nbuf_t nbuf = NULL;
  4841. nbuf = desc->nbuf;
  4842. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_FAST))
  4843. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4844. else
  4845. qdf_nbuf_free(nbuf);
  4846. }
  4847. static inline void
  4848. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4849. qdf_nbuf_t nbuf)
  4850. {
  4851. if (!nbuf)
  4852. return;
  4853. if (nbuf->is_from_recycler)
  4854. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4855. else
  4856. qdf_nbuf_free(nbuf);
  4857. }
  4858. static inline void
  4859. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4860. {
  4861. qdf_nbuf_dev_kfree_list(nbuf_queue_head);
  4862. }
  4863. #else
  4864. static inline void
  4865. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4866. {
  4867. }
  4868. static inline void
  4869. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4870. struct dp_tx_desc_s *desc)
  4871. {
  4872. qdf_nbuf_free(desc->nbuf);
  4873. }
  4874. static inline void
  4875. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4876. qdf_nbuf_t nbuf)
  4877. {
  4878. qdf_nbuf_free(nbuf);
  4879. }
  4880. static inline void
  4881. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4882. {
  4883. }
  4884. #endif
  4885. #ifdef WLAN_SUPPORT_PPEDS
  4886. static inline void
  4887. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4888. struct dp_txrx_peer *txrx_peer,
  4889. struct hal_tx_completion_status *ts,
  4890. struct dp_tx_desc_s *desc,
  4891. uint8_t ring_id)
  4892. {
  4893. uint8_t link_id = 0;
  4894. struct dp_vdev *vdev = NULL;
  4895. if (qdf_likely(txrx_peer)) {
  4896. if (!(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4897. hal_tx_comp_get_status(&desc->comp,
  4898. ts,
  4899. soc->hal_soc);
  4900. vdev = txrx_peer->vdev;
  4901. link_id = dp_tx_get_link_id_from_ppdu_id(soc,
  4902. ts,
  4903. txrx_peer,
  4904. vdev);
  4905. if (link_id < 1 || link_id > DP_MAX_MLO_LINKS)
  4906. link_id = 0;
  4907. dp_tx_update_peer_stats(desc, ts,
  4908. txrx_peer,
  4909. ring_id,
  4910. link_id);
  4911. } else {
  4912. dp_tx_update_peer_basic_stats(txrx_peer, desc->length,
  4913. desc->tx_status, false);
  4914. }
  4915. }
  4916. }
  4917. #else
  4918. static inline void
  4919. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4920. struct dp_txrx_peer *txrx_peer,
  4921. struct hal_tx_completion_status *ts,
  4922. struct dp_tx_desc_s *desc,
  4923. uint8_t ring_id)
  4924. {
  4925. }
  4926. #endif
  4927. void
  4928. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  4929. struct dp_tx_desc_s *comp_head, uint8_t ring_id)
  4930. {
  4931. struct dp_tx_desc_s *desc;
  4932. struct dp_tx_desc_s *next;
  4933. struct hal_tx_completion_status ts;
  4934. struct dp_txrx_peer *txrx_peer = NULL;
  4935. uint16_t peer_id = DP_INVALID_PEER;
  4936. dp_txrx_ref_handle txrx_ref_handle = NULL;
  4937. qdf_nbuf_queue_head_t h;
  4938. desc = comp_head;
  4939. dp_tx_nbuf_queue_head_init(&h);
  4940. while (desc) {
  4941. next = desc->next;
  4942. dp_tx_prefetch_next_nbuf_data(next);
  4943. if (peer_id != desc->peer_id) {
  4944. if (txrx_peer)
  4945. dp_txrx_peer_unref_delete(txrx_ref_handle,
  4946. DP_MOD_ID_TX_COMP);
  4947. peer_id = desc->peer_id;
  4948. txrx_peer =
  4949. dp_txrx_peer_get_ref_by_id(soc, peer_id,
  4950. &txrx_ref_handle,
  4951. DP_MOD_ID_TX_COMP);
  4952. }
  4953. if (dp_tx_mcast_reinject_handler(soc, desc)) {
  4954. desc = next;
  4955. continue;
  4956. }
  4957. if (desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  4958. qdf_nbuf_t nbuf;
  4959. dp_tx_update_ppeds_tx_comp_stats(soc, txrx_peer, &ts,
  4960. desc, ring_id);
  4961. if (desc->pool_id != DP_TX_PPEDS_POOL_ID) {
  4962. nbuf = desc->nbuf;
  4963. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4964. dp_tx_desc_free(soc, desc, desc->pool_id);
  4965. __dp_tx_outstanding_dec(soc);
  4966. } else {
  4967. nbuf = dp_ppeds_tx_desc_free(soc, desc);
  4968. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4969. }
  4970. desc = next;
  4971. continue;
  4972. }
  4973. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4974. struct dp_pdev *pdev = desc->pdev;
  4975. if (qdf_likely(txrx_peer))
  4976. dp_tx_update_peer_basic_stats(txrx_peer,
  4977. desc->length,
  4978. desc->tx_status,
  4979. false);
  4980. qdf_assert(pdev);
  4981. dp_tx_outstanding_dec(pdev);
  4982. /*
  4983. * Calling a QDF WRAPPER here is creating significant
  4984. * performance impact so avoided the wrapper call here
  4985. */
  4986. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  4987. desc->id, DP_TX_COMP_UNMAP);
  4988. dp_tx_nbuf_unmap(soc, desc);
  4989. dp_tx_nbuf_dev_queue_free(&h, desc);
  4990. dp_tx_desc_free(soc, desc, desc->pool_id);
  4991. desc = next;
  4992. continue;
  4993. }
  4994. hal_tx_comp_get_status(&desc->comp, &ts, soc->hal_soc);
  4995. dp_tx_comp_process_tx_status(soc, desc, &ts, txrx_peer,
  4996. ring_id);
  4997. dp_tx_comp_process_desc(soc, desc, &ts, txrx_peer);
  4998. dp_tx_desc_release(soc, desc, desc->pool_id);
  4999. desc = next;
  5000. }
  5001. dp_tx_nbuf_dev_kfree_list(&h);
  5002. if (txrx_peer)
  5003. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_TX_COMP);
  5004. }
  5005. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  5006. static inline
  5007. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5008. int max_reap_limit)
  5009. {
  5010. bool limit_hit = false;
  5011. limit_hit =
  5012. (num_reaped >= max_reap_limit) ? true : false;
  5013. if (limit_hit)
  5014. DP_STATS_INC(soc, tx.tx_comp_loop_pkt_limit_hit, 1);
  5015. return limit_hit;
  5016. }
  5017. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5018. {
  5019. return soc->wlan_cfg_ctx->tx_comp_enable_eol_data_check;
  5020. }
  5021. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5022. {
  5023. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  5024. return cfg->tx_comp_loop_pkt_limit;
  5025. }
  5026. #else
  5027. static inline
  5028. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5029. int max_reap_limit)
  5030. {
  5031. return false;
  5032. }
  5033. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5034. {
  5035. return false;
  5036. }
  5037. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5038. {
  5039. return 0;
  5040. }
  5041. #endif
  5042. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  5043. static inline int
  5044. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5045. int *max_reap_limit)
  5046. {
  5047. return soc->arch_ops.dp_srng_test_and_update_nf_params(soc, dp_srng,
  5048. max_reap_limit);
  5049. }
  5050. #else
  5051. static inline int
  5052. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5053. int *max_reap_limit)
  5054. {
  5055. return 0;
  5056. }
  5057. #endif
  5058. #ifdef DP_TX_TRACKING
  5059. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  5060. {
  5061. if ((tx_desc->magic != DP_TX_MAGIC_PATTERN_INUSE) &&
  5062. (tx_desc->magic != DP_TX_MAGIC_PATTERN_FREE)) {
  5063. dp_err_rl("tx_desc %u is corrupted", tx_desc->id);
  5064. qdf_trigger_self_recovery(NULL, QDF_TX_DESC_LEAK);
  5065. }
  5066. }
  5067. #endif
  5068. #ifndef WLAN_SOFTUMAC_SUPPORT
  5069. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  5070. hal_ring_handle_t hal_ring_hdl, uint8_t ring_id,
  5071. uint32_t quota)
  5072. {
  5073. void *tx_comp_hal_desc;
  5074. void *last_prefetched_hw_desc = NULL;
  5075. struct dp_tx_desc_s *last_prefetched_sw_desc = NULL;
  5076. hal_soc_handle_t hal_soc;
  5077. uint8_t buffer_src;
  5078. struct dp_tx_desc_s *tx_desc = NULL;
  5079. struct dp_tx_desc_s *head_desc = NULL;
  5080. struct dp_tx_desc_s *tail_desc = NULL;
  5081. uint32_t num_processed = 0;
  5082. uint32_t count;
  5083. uint32_t num_avail_for_reap = 0;
  5084. bool force_break = false;
  5085. struct dp_srng *tx_comp_ring = &soc->tx_comp_ring[ring_id];
  5086. int max_reap_limit, ring_near_full;
  5087. uint32_t num_entries;
  5088. DP_HIST_INIT();
  5089. num_entries = hal_srng_get_num_entries(soc->hal_soc, hal_ring_hdl);
  5090. more_data:
  5091. hal_soc = soc->hal_soc;
  5092. /* Re-initialize local variables to be re-used */
  5093. head_desc = NULL;
  5094. tail_desc = NULL;
  5095. count = 0;
  5096. max_reap_limit = dp_tx_comp_get_loop_pkt_limit(soc);
  5097. ring_near_full = dp_srng_test_and_update_nf_params(soc, tx_comp_ring,
  5098. &max_reap_limit);
  5099. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  5100. dp_err("HAL RING Access Failed -- %pK", hal_ring_hdl);
  5101. return 0;
  5102. }
  5103. if (!num_avail_for_reap)
  5104. num_avail_for_reap = hal_srng_dst_num_valid(hal_soc,
  5105. hal_ring_hdl, 0);
  5106. if (num_avail_for_reap >= quota)
  5107. num_avail_for_reap = quota;
  5108. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_avail_for_reap);
  5109. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  5110. hal_ring_hdl,
  5111. num_avail_for_reap);
  5112. /* Find head descriptor from completion ring */
  5113. while (qdf_likely(num_avail_for_reap--)) {
  5114. tx_comp_hal_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  5115. if (qdf_unlikely(!tx_comp_hal_desc))
  5116. break;
  5117. buffer_src = hal_tx_comp_get_buffer_source(hal_soc,
  5118. tx_comp_hal_desc);
  5119. /* If this buffer was not released by TQM or FW, then it is not
  5120. * Tx completion indication, assert */
  5121. if (qdf_unlikely(buffer_src !=
  5122. HAL_TX_COMP_RELEASE_SOURCE_TQM) &&
  5123. (qdf_unlikely(buffer_src !=
  5124. HAL_TX_COMP_RELEASE_SOURCE_FW))) {
  5125. uint8_t wbm_internal_error;
  5126. dp_err_rl(
  5127. "Tx comp release_src != TQM | FW but from %d",
  5128. buffer_src);
  5129. hal_dump_comp_desc(tx_comp_hal_desc);
  5130. DP_STATS_INC(soc, tx.invalid_release_source, 1);
  5131. /* When WBM sees NULL buffer_addr_info in any of
  5132. * ingress rings it sends an error indication,
  5133. * with wbm_internal_error=1, to a specific ring.
  5134. * The WBM2SW ring used to indicate these errors is
  5135. * fixed in HW, and that ring is being used as Tx
  5136. * completion ring. These errors are not related to
  5137. * Tx completions, and should just be ignored
  5138. */
  5139. wbm_internal_error = hal_get_wbm_internal_error(
  5140. hal_soc,
  5141. tx_comp_hal_desc);
  5142. if (wbm_internal_error) {
  5143. dp_err_rl("Tx comp wbm_internal_error!!");
  5144. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_ALL], 1);
  5145. if (HAL_TX_COMP_RELEASE_SOURCE_REO ==
  5146. buffer_src)
  5147. dp_handle_wbm_internal_error(
  5148. soc,
  5149. tx_comp_hal_desc,
  5150. hal_tx_comp_get_buffer_type(
  5151. tx_comp_hal_desc));
  5152. } else {
  5153. dp_err_rl("Tx comp wbm_internal_error false");
  5154. DP_STATS_INC(soc, tx.non_wbm_internal_err, 1);
  5155. }
  5156. continue;
  5157. }
  5158. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  5159. tx_comp_hal_desc,
  5160. &tx_desc);
  5161. if (qdf_unlikely(!tx_desc)) {
  5162. dp_err("unable to retrieve tx_desc!");
  5163. hal_dump_comp_desc(tx_comp_hal_desc);
  5164. DP_STATS_INC(soc, tx.invalid_tx_comp_desc, 1);
  5165. QDF_BUG(0);
  5166. continue;
  5167. }
  5168. tx_desc->buffer_src = buffer_src;
  5169. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5170. goto add_to_pool2;
  5171. /*
  5172. * If the release source is FW, process the HTT status
  5173. */
  5174. if (qdf_unlikely(buffer_src ==
  5175. HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  5176. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  5177. hal_tx_comp_get_htt_desc(tx_comp_hal_desc,
  5178. htt_tx_status);
  5179. /* Collect hw completion contents */
  5180. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5181. &tx_desc->comp, 1);
  5182. soc->arch_ops.dp_tx_process_htt_completion(
  5183. soc,
  5184. tx_desc,
  5185. htt_tx_status,
  5186. ring_id);
  5187. } else {
  5188. tx_desc->tx_status =
  5189. hal_tx_comp_get_tx_status(tx_comp_hal_desc);
  5190. tx_desc->buffer_src = buffer_src;
  5191. /*
  5192. * If the fast completion mode is enabled extended
  5193. * metadata from descriptor is not copied
  5194. */
  5195. if (qdf_likely(tx_desc->flags &
  5196. DP_TX_DESC_FLAG_SIMPLE))
  5197. goto add_to_pool;
  5198. /*
  5199. * If the descriptor is already freed in vdev_detach,
  5200. * continue to next descriptor
  5201. */
  5202. if (qdf_unlikely
  5203. ((tx_desc->vdev_id == DP_INVALID_VDEV_ID) &&
  5204. !tx_desc->flags)) {
  5205. dp_tx_comp_info_rl("Descriptor freed in vdev_detach %d",
  5206. tx_desc->id);
  5207. DP_STATS_INC(soc, tx.tx_comp_exception, 1);
  5208. dp_tx_desc_check_corruption(tx_desc);
  5209. continue;
  5210. }
  5211. if (qdf_unlikely(tx_desc->pdev->is_pdev_down)) {
  5212. dp_tx_comp_info_rl("pdev in down state %d",
  5213. tx_desc->id);
  5214. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  5215. dp_tx_comp_free_buf(soc, tx_desc, false);
  5216. dp_tx_desc_release(soc, tx_desc,
  5217. tx_desc->pool_id);
  5218. goto next_desc;
  5219. }
  5220. if (!(tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED) ||
  5221. !(tx_desc->flags & DP_TX_DESC_FLAG_QUEUED_TX)) {
  5222. dp_tx_comp_alert("Txdesc invalid, flgs = %x,id = %d",
  5223. tx_desc->flags, tx_desc->id);
  5224. qdf_assert_always(0);
  5225. }
  5226. /* Collect hw completion contents */
  5227. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5228. &tx_desc->comp, 1);
  5229. add_to_pool:
  5230. DP_HIST_PACKET_COUNT_INC(tx_desc->pdev->pdev_id);
  5231. add_to_pool2:
  5232. /* First ring descriptor on the cycle */
  5233. if (!head_desc) {
  5234. head_desc = tx_desc;
  5235. tail_desc = tx_desc;
  5236. }
  5237. tail_desc->next = tx_desc;
  5238. tx_desc->next = NULL;
  5239. tail_desc = tx_desc;
  5240. }
  5241. next_desc:
  5242. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  5243. /*
  5244. * Processed packet count is more than given quota
  5245. * stop to processing
  5246. */
  5247. count++;
  5248. dp_tx_prefetch_hw_sw_nbuf_desc(soc, hal_soc,
  5249. num_avail_for_reap,
  5250. hal_ring_hdl,
  5251. &last_prefetched_hw_desc,
  5252. &last_prefetched_sw_desc);
  5253. if (dp_tx_comp_loop_pkt_limit_hit(soc, count, max_reap_limit))
  5254. break;
  5255. }
  5256. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  5257. /* Process the reaped descriptors */
  5258. if (head_desc)
  5259. dp_tx_comp_process_desc_list(soc, head_desc, ring_id);
  5260. DP_STATS_INC(soc, tx.tx_comp[ring_id], count);
  5261. /*
  5262. * If we are processing in near-full condition, there are 3 scenario
  5263. * 1) Ring entries has reached critical state
  5264. * 2) Ring entries are still near high threshold
  5265. * 3) Ring entries are below the safe level
  5266. *
  5267. * One more loop will move the state to normal processing and yield
  5268. */
  5269. if (ring_near_full)
  5270. goto more_data;
  5271. if (dp_tx_comp_enable_eol_data_check(soc)) {
  5272. if (num_processed >= quota)
  5273. force_break = true;
  5274. if (!force_break &&
  5275. hal_srng_dst_peek_sync_locked(soc->hal_soc,
  5276. hal_ring_hdl)) {
  5277. DP_STATS_INC(soc, tx.hp_oos2, 1);
  5278. if (!hif_exec_should_yield(soc->hif_handle,
  5279. int_ctx->dp_intr_id))
  5280. goto more_data;
  5281. num_avail_for_reap =
  5282. hal_srng_dst_num_valid_locked(soc->hal_soc,
  5283. hal_ring_hdl,
  5284. true);
  5285. if (qdf_unlikely(num_entries &&
  5286. (num_avail_for_reap >=
  5287. num_entries >> 1))) {
  5288. DP_STATS_INC(soc, tx.near_full, 1);
  5289. goto more_data;
  5290. }
  5291. }
  5292. }
  5293. DP_TX_HIST_STATS_PER_PDEV();
  5294. return num_processed;
  5295. }
  5296. #endif
  5297. #ifdef FEATURE_WLAN_TDLS
  5298. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  5299. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list)
  5300. {
  5301. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  5302. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  5303. DP_MOD_ID_TDLS);
  5304. if (!vdev) {
  5305. dp_err("vdev handle for id %d is NULL", vdev_id);
  5306. return NULL;
  5307. }
  5308. if (tx_spec & OL_TX_SPEC_NO_FREE)
  5309. vdev->is_tdls_frame = true;
  5310. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  5311. return dp_tx_send(soc_hdl, vdev_id, msdu_list);
  5312. }
  5313. #endif
  5314. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  5315. {
  5316. int pdev_id;
  5317. /*
  5318. * Fill HTT TCL Metadata with Vdev ID and MAC ID
  5319. */
  5320. DP_TX_TCL_METADATA_TYPE_SET(vdev->htt_tcl_metadata,
  5321. DP_TCL_METADATA_TYPE_VDEV_BASED);
  5322. DP_TX_TCL_METADATA_VDEV_ID_SET(vdev->htt_tcl_metadata,
  5323. vdev->vdev_id);
  5324. pdev_id =
  5325. dp_get_target_pdev_id_for_host_pdev_id(vdev->pdev->soc,
  5326. vdev->pdev->pdev_id);
  5327. DP_TX_TCL_METADATA_PDEV_ID_SET(vdev->htt_tcl_metadata, pdev_id);
  5328. /*
  5329. * Set HTT Extension Valid bit to 0 by default
  5330. */
  5331. DP_TX_TCL_METADATA_VALID_HTT_SET(vdev->htt_tcl_metadata, 0);
  5332. dp_tx_vdev_update_search_flags(vdev);
  5333. return QDF_STATUS_SUCCESS;
  5334. }
  5335. #ifndef FEATURE_WDS
  5336. static inline bool dp_tx_da_search_override(struct dp_vdev *vdev)
  5337. {
  5338. return false;
  5339. }
  5340. #endif
  5341. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  5342. {
  5343. struct dp_soc *soc = vdev->pdev->soc;
  5344. /*
  5345. * Enable both AddrY (SA based search) and AddrX (Da based search)
  5346. * for TDLS link
  5347. *
  5348. * Enable AddrY (SA based search) only for non-WDS STA and
  5349. * ProxySTA VAP (in HKv1) modes.
  5350. *
  5351. * In all other VAP modes, only DA based search should be
  5352. * enabled
  5353. */
  5354. if (vdev->opmode == wlan_op_mode_sta &&
  5355. vdev->tdls_link_connected)
  5356. vdev->hal_desc_addr_search_flags =
  5357. (HAL_TX_DESC_ADDRX_EN | HAL_TX_DESC_ADDRY_EN);
  5358. else if ((vdev->opmode == wlan_op_mode_sta) &&
  5359. !dp_tx_da_search_override(vdev))
  5360. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRY_EN;
  5361. else
  5362. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRX_EN;
  5363. if (vdev->opmode == wlan_op_mode_sta && !vdev->tdls_link_connected)
  5364. vdev->search_type = soc->sta_mode_search_policy;
  5365. else
  5366. vdev->search_type = HAL_TX_ADDR_SEARCH_DEFAULT;
  5367. }
  5368. #ifdef WLAN_SUPPORT_PPEDS
  5369. static inline bool
  5370. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5371. struct dp_vdev *vdev,
  5372. struct dp_tx_desc_s *tx_desc)
  5373. {
  5374. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5375. return false;
  5376. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5377. return true;
  5378. /*
  5379. * if vdev is given, then only check whether desc
  5380. * vdev match. if vdev is NULL, then check whether
  5381. * desc pdev match.
  5382. */
  5383. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5384. (tx_desc->pdev == pdev);
  5385. }
  5386. #else
  5387. static inline bool
  5388. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5389. struct dp_vdev *vdev,
  5390. struct dp_tx_desc_s *tx_desc)
  5391. {
  5392. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5393. return false;
  5394. /*
  5395. * if vdev is given, then only check whether desc
  5396. * vdev match. if vdev is NULL, then check whether
  5397. * desc pdev match.
  5398. */
  5399. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5400. (tx_desc->pdev == pdev);
  5401. }
  5402. #endif
  5403. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5404. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5405. bool force_free)
  5406. {
  5407. uint8_t i;
  5408. uint32_t j;
  5409. uint32_t num_desc, page_id, offset;
  5410. uint16_t num_desc_per_page;
  5411. struct dp_soc *soc = pdev->soc;
  5412. struct dp_tx_desc_s *tx_desc = NULL;
  5413. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5414. if (!vdev && !force_free) {
  5415. dp_err("Reset TX desc vdev, Vdev param is required!");
  5416. return;
  5417. }
  5418. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  5419. tx_desc_pool = &soc->tx_desc[i];
  5420. if (!(tx_desc_pool->pool_size) ||
  5421. IS_TX_DESC_POOL_STATUS_INACTIVE(tx_desc_pool) ||
  5422. !(tx_desc_pool->desc_pages.cacheable_pages))
  5423. continue;
  5424. /*
  5425. * Add flow pool lock protection in case pool is freed
  5426. * due to all tx_desc is recycled when handle TX completion.
  5427. * this is not necessary when do force flush as:
  5428. * a. double lock will happen if dp_tx_desc_release is
  5429. * also trying to acquire it.
  5430. * b. dp interrupt has been disabled before do force TX desc
  5431. * flush in dp_pdev_deinit().
  5432. */
  5433. if (!force_free)
  5434. qdf_spin_lock_bh(&tx_desc_pool->flow_pool_lock);
  5435. num_desc = tx_desc_pool->pool_size;
  5436. num_desc_per_page =
  5437. tx_desc_pool->desc_pages.num_element_per_page;
  5438. for (j = 0; j < num_desc; j++) {
  5439. page_id = j / num_desc_per_page;
  5440. offset = j % num_desc_per_page;
  5441. if (qdf_unlikely(!(tx_desc_pool->
  5442. desc_pages.cacheable_pages)))
  5443. break;
  5444. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  5445. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5446. /*
  5447. * Free TX desc if force free is
  5448. * required, otherwise only reset vdev
  5449. * in this TX desc.
  5450. */
  5451. if (force_free) {
  5452. tx_desc->flags |= DP_TX_DESC_FLAG_FLUSH;
  5453. dp_tx_comp_free_buf(soc, tx_desc,
  5454. false);
  5455. dp_tx_desc_release(soc, tx_desc, i);
  5456. } else {
  5457. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5458. }
  5459. }
  5460. }
  5461. if (!force_free)
  5462. qdf_spin_unlock_bh(&tx_desc_pool->flow_pool_lock);
  5463. }
  5464. }
  5465. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5466. /**
  5467. * dp_tx_desc_reset_vdev() - reset vdev to NULL in TX Desc
  5468. *
  5469. * @soc: Handle to DP soc structure
  5470. * @tx_desc: pointer of one TX desc
  5471. * @desc_pool_id: TX Desc pool id
  5472. */
  5473. static inline void
  5474. dp_tx_desc_reset_vdev(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  5475. uint8_t desc_pool_id)
  5476. {
  5477. TX_DESC_LOCK_LOCK(&soc->tx_desc[desc_pool_id].lock);
  5478. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5479. TX_DESC_LOCK_UNLOCK(&soc->tx_desc[desc_pool_id].lock);
  5480. }
  5481. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5482. bool force_free)
  5483. {
  5484. uint8_t i, num_pool;
  5485. uint32_t j;
  5486. uint32_t num_desc, page_id, offset;
  5487. uint16_t num_desc_per_page;
  5488. struct dp_soc *soc = pdev->soc;
  5489. struct dp_tx_desc_s *tx_desc = NULL;
  5490. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5491. if (!vdev && !force_free) {
  5492. dp_err("Reset TX desc vdev, Vdev param is required!");
  5493. return;
  5494. }
  5495. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5496. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5497. for (i = 0; i < num_pool; i++) {
  5498. tx_desc_pool = &soc->tx_desc[i];
  5499. if (!tx_desc_pool->desc_pages.cacheable_pages)
  5500. continue;
  5501. num_desc_per_page =
  5502. tx_desc_pool->desc_pages.num_element_per_page;
  5503. for (j = 0; j < num_desc; j++) {
  5504. page_id = j / num_desc_per_page;
  5505. offset = j % num_desc_per_page;
  5506. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  5507. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5508. if (force_free) {
  5509. dp_tx_comp_free_buf(soc, tx_desc,
  5510. false);
  5511. dp_tx_desc_release(soc, tx_desc, i);
  5512. } else {
  5513. dp_tx_desc_reset_vdev(soc, tx_desc,
  5514. i);
  5515. }
  5516. }
  5517. }
  5518. }
  5519. }
  5520. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5521. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  5522. {
  5523. struct dp_pdev *pdev = vdev->pdev;
  5524. /* Reset TX desc associated to this Vdev as NULL */
  5525. dp_tx_desc_flush(pdev, vdev, false);
  5526. return QDF_STATUS_SUCCESS;
  5527. }
  5528. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5529. /* Pools will be allocated dynamically */
  5530. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5531. int num_desc)
  5532. {
  5533. uint8_t i;
  5534. for (i = 0; i < num_pool; i++) {
  5535. qdf_spinlock_create(&soc->tx_desc[i].flow_pool_lock);
  5536. soc->tx_desc[i].status = FLOW_POOL_INACTIVE;
  5537. }
  5538. return QDF_STATUS_SUCCESS;
  5539. }
  5540. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5541. uint32_t num_desc)
  5542. {
  5543. return QDF_STATUS_SUCCESS;
  5544. }
  5545. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5546. {
  5547. }
  5548. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5549. {
  5550. uint8_t i;
  5551. for (i = 0; i < num_pool; i++)
  5552. qdf_spinlock_destroy(&soc->tx_desc[i].flow_pool_lock);
  5553. }
  5554. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5555. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5556. uint32_t num_desc)
  5557. {
  5558. uint8_t i, count;
  5559. /* Allocate software Tx descriptor pools */
  5560. for (i = 0; i < num_pool; i++) {
  5561. if (dp_tx_desc_pool_alloc(soc, i, num_desc)) {
  5562. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5563. FL("Tx Desc Pool alloc %d failed %pK"),
  5564. i, soc);
  5565. goto fail;
  5566. }
  5567. }
  5568. return QDF_STATUS_SUCCESS;
  5569. fail:
  5570. for (count = 0; count < i; count++)
  5571. dp_tx_desc_pool_free(soc, count);
  5572. return QDF_STATUS_E_NOMEM;
  5573. }
  5574. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5575. uint32_t num_desc)
  5576. {
  5577. uint8_t i;
  5578. for (i = 0; i < num_pool; i++) {
  5579. if (dp_tx_desc_pool_init(soc, i, num_desc)) {
  5580. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5581. FL("Tx Desc Pool init %d failed %pK"),
  5582. i, soc);
  5583. return QDF_STATUS_E_NOMEM;
  5584. }
  5585. }
  5586. return QDF_STATUS_SUCCESS;
  5587. }
  5588. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5589. {
  5590. uint8_t i;
  5591. for (i = 0; i < num_pool; i++)
  5592. dp_tx_desc_pool_deinit(soc, i);
  5593. }
  5594. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5595. {
  5596. uint8_t i;
  5597. for (i = 0; i < num_pool; i++)
  5598. dp_tx_desc_pool_free(soc, i);
  5599. }
  5600. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5601. /**
  5602. * dp_tx_tso_cmn_desc_pool_deinit() - de-initialize TSO descriptors
  5603. * @soc: core txrx main context
  5604. * @num_pool: number of pools
  5605. *
  5606. */
  5607. static void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool)
  5608. {
  5609. dp_tx_tso_desc_pool_deinit(soc, num_pool);
  5610. dp_tx_tso_num_seg_pool_deinit(soc, num_pool);
  5611. }
  5612. /**
  5613. * dp_tx_tso_cmn_desc_pool_free() - free TSO descriptors
  5614. * @soc: core txrx main context
  5615. * @num_pool: number of pools
  5616. *
  5617. */
  5618. static void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool)
  5619. {
  5620. dp_tx_tso_desc_pool_free(soc, num_pool);
  5621. dp_tx_tso_num_seg_pool_free(soc, num_pool);
  5622. }
  5623. #ifndef WLAN_SOFTUMAC_SUPPORT
  5624. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5625. {
  5626. uint8_t num_pool;
  5627. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5628. dp_tx_tso_cmn_desc_pool_free(soc, num_pool);
  5629. dp_tx_ext_desc_pool_free(soc, num_pool);
  5630. dp_tx_delete_static_pools(soc, num_pool);
  5631. }
  5632. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5633. {
  5634. uint8_t num_pool;
  5635. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5636. dp_tx_flow_control_deinit(soc);
  5637. dp_tx_tso_cmn_desc_pool_deinit(soc, num_pool);
  5638. dp_tx_ext_desc_pool_deinit(soc, num_pool);
  5639. dp_tx_deinit_static_pools(soc, num_pool);
  5640. }
  5641. #else
  5642. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5643. {
  5644. uint8_t num_pool;
  5645. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5646. dp_tx_delete_static_pools(soc, num_pool);
  5647. }
  5648. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5649. {
  5650. uint8_t num_pool;
  5651. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5652. dp_tx_flow_control_deinit(soc);
  5653. dp_tx_deinit_static_pools(soc, num_pool);
  5654. }
  5655. #endif /*WLAN_SOFTUMAC_SUPPORT*/
  5656. /**
  5657. * dp_tx_tso_cmn_desc_pool_alloc() - TSO cmn desc pool allocator
  5658. * @soc: DP soc handle
  5659. * @num_pool: Number of pools
  5660. * @num_desc: Number of descriptors
  5661. *
  5662. * Reserve TSO descriptor buffers
  5663. *
  5664. * Return: QDF_STATUS_E_FAILURE on failure or
  5665. * QDF_STATUS_SUCCESS on success
  5666. */
  5667. static QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  5668. uint8_t num_pool,
  5669. uint32_t num_desc)
  5670. {
  5671. if (dp_tx_tso_desc_pool_alloc(soc, num_pool, num_desc)) {
  5672. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5673. return QDF_STATUS_E_FAILURE;
  5674. }
  5675. if (dp_tx_tso_num_seg_pool_alloc(soc, num_pool, num_desc)) {
  5676. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5677. num_pool, soc);
  5678. return QDF_STATUS_E_FAILURE;
  5679. }
  5680. return QDF_STATUS_SUCCESS;
  5681. }
  5682. /**
  5683. * dp_tx_tso_cmn_desc_pool_init() - TSO cmn desc pool init
  5684. * @soc: DP soc handle
  5685. * @num_pool: Number of pools
  5686. * @num_desc: Number of descriptors
  5687. *
  5688. * Initialize TSO descriptor pools
  5689. *
  5690. * Return: QDF_STATUS_E_FAILURE on failure or
  5691. * QDF_STATUS_SUCCESS on success
  5692. */
  5693. static QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  5694. uint8_t num_pool,
  5695. uint32_t num_desc)
  5696. {
  5697. if (dp_tx_tso_desc_pool_init(soc, num_pool, num_desc)) {
  5698. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5699. return QDF_STATUS_E_FAILURE;
  5700. }
  5701. if (dp_tx_tso_num_seg_pool_init(soc, num_pool, num_desc)) {
  5702. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5703. num_pool, soc);
  5704. return QDF_STATUS_E_FAILURE;
  5705. }
  5706. return QDF_STATUS_SUCCESS;
  5707. }
  5708. #ifndef WLAN_SOFTUMAC_SUPPORT
  5709. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5710. {
  5711. uint8_t num_pool;
  5712. uint32_t num_desc;
  5713. uint32_t num_ext_desc;
  5714. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5715. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5716. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5717. dp_info("Tx Desc Alloc num_pool: %d descs: %d", num_pool, num_desc);
  5718. if ((num_pool > MAX_TXDESC_POOLS) ||
  5719. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  5720. goto fail1;
  5721. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5722. goto fail1;
  5723. if (dp_tx_ext_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5724. goto fail2;
  5725. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5726. return QDF_STATUS_SUCCESS;
  5727. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5728. goto fail3;
  5729. return QDF_STATUS_SUCCESS;
  5730. fail3:
  5731. dp_tx_ext_desc_pool_free(soc, num_pool);
  5732. fail2:
  5733. dp_tx_delete_static_pools(soc, num_pool);
  5734. fail1:
  5735. return QDF_STATUS_E_RESOURCES;
  5736. }
  5737. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5738. {
  5739. uint8_t num_pool;
  5740. uint32_t num_desc;
  5741. uint32_t num_ext_desc;
  5742. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5743. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5744. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5745. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5746. goto fail1;
  5747. if (dp_tx_ext_desc_pool_init(soc, num_pool, num_ext_desc))
  5748. goto fail2;
  5749. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5750. return QDF_STATUS_SUCCESS;
  5751. if (dp_tx_tso_cmn_desc_pool_init(soc, num_pool, num_ext_desc))
  5752. goto fail3;
  5753. dp_tx_flow_control_init(soc);
  5754. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5755. return QDF_STATUS_SUCCESS;
  5756. fail3:
  5757. dp_tx_ext_desc_pool_deinit(soc, num_pool);
  5758. fail2:
  5759. dp_tx_deinit_static_pools(soc, num_pool);
  5760. fail1:
  5761. return QDF_STATUS_E_RESOURCES;
  5762. }
  5763. #else
  5764. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5765. {
  5766. uint8_t num_pool;
  5767. uint32_t num_desc;
  5768. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5769. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5770. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5771. "%s Tx Desc Alloc num_pool = %d, descs = %d",
  5772. __func__, num_pool, num_desc);
  5773. if ((num_pool > MAX_TXDESC_POOLS) ||
  5774. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  5775. return QDF_STATUS_E_RESOURCES;
  5776. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5777. return QDF_STATUS_E_RESOURCES;
  5778. return QDF_STATUS_SUCCESS;
  5779. }
  5780. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5781. {
  5782. uint8_t num_pool;
  5783. uint32_t num_desc;
  5784. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5785. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5786. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5787. return QDF_STATUS_E_RESOURCES;
  5788. dp_tx_flow_control_init(soc);
  5789. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5790. return QDF_STATUS_SUCCESS;
  5791. }
  5792. #endif
  5793. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc)
  5794. {
  5795. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  5796. uint8_t num_pool;
  5797. uint32_t num_ext_desc;
  5798. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5799. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5800. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5801. return QDF_STATUS_E_FAILURE;
  5802. if (dp_tx_tso_cmn_desc_pool_init(soc, num_pool, num_ext_desc))
  5803. return QDF_STATUS_E_FAILURE;
  5804. return QDF_STATUS_SUCCESS;
  5805. }
  5806. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc)
  5807. {
  5808. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  5809. uint8_t num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5810. dp_tx_tso_cmn_desc_pool_deinit(soc, num_pool);
  5811. dp_tx_tso_cmn_desc_pool_free(soc, num_pool);
  5812. return QDF_STATUS_SUCCESS;
  5813. }
  5814. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  5815. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  5816. enum qdf_pkt_timestamp_index index, uint64_t time,
  5817. qdf_nbuf_t nbuf)
  5818. {
  5819. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled())) {
  5820. uint64_t tsf_time;
  5821. if (vdev->get_tsf_time) {
  5822. vdev->get_tsf_time(vdev->osif_vdev, time, &tsf_time);
  5823. qdf_add_dp_pkt_timestamp(nbuf, index, tsf_time);
  5824. }
  5825. }
  5826. }
  5827. void dp_pkt_get_timestamp(uint64_t *time)
  5828. {
  5829. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled()))
  5830. *time = qdf_get_log_timestamp();
  5831. }
  5832. #endif
  5833. #ifdef QCA_MULTIPASS_SUPPORT
  5834. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  5835. struct dp_tx_msdu_info_s *msdu_info,
  5836. uint16_t group_key)
  5837. {
  5838. struct htt_tx_msdu_desc_ext2_t *meta_data =
  5839. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  5840. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  5841. /*
  5842. * When attempting to send a multicast packet with multi-passphrase,
  5843. * host shall add HTT EXT meta data "struct htt_tx_msdu_desc_ext2_t"
  5844. * ref htt.h indicating the group_id field in "key_flags" also having
  5845. * "valid_key_flags" as 1. Assign “key_flags = group_key_ix”.
  5846. */
  5847. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info->meta_data[0],
  5848. 1);
  5849. HTT_TX_MSDU_EXT2_DESC_KEY_FLAGS_SET(msdu_info->meta_data[2], group_key);
  5850. }
  5851. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  5852. defined(WLAN_MCAST_MLO)
  5853. /**
  5854. * dp_tx_need_mcast_reinject() - If frame needs to be processed in reinject path
  5855. * @vdev: DP vdev handle
  5856. *
  5857. * Return: true if reinject handling is required else false
  5858. */
  5859. static inline bool
  5860. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  5861. {
  5862. if (vdev->mlo_vdev && vdev->opmode == wlan_op_mode_ap)
  5863. return true;
  5864. return false;
  5865. }
  5866. #else
  5867. static inline bool
  5868. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  5869. {
  5870. return false;
  5871. }
  5872. #endif
  5873. /**
  5874. * dp_tx_need_multipass_process() - If frame needs multipass phrase processing
  5875. * @soc: dp soc handle
  5876. * @vdev: DP vdev handle
  5877. * @buf: frame
  5878. * @vlan_id: vlan id of frame
  5879. *
  5880. * Return: whether peer is special or classic
  5881. */
  5882. static
  5883. uint8_t dp_tx_need_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  5884. qdf_nbuf_t buf, uint16_t *vlan_id)
  5885. {
  5886. struct dp_txrx_peer *txrx_peer = NULL;
  5887. struct dp_peer *peer = NULL;
  5888. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(buf);
  5889. struct vlan_ethhdr *veh = NULL;
  5890. bool not_vlan = ((vdev->tx_encap_type == htt_cmn_pkt_type_raw) ||
  5891. (htons(eh->ether_type) != ETH_P_8021Q));
  5892. if (qdf_unlikely(not_vlan))
  5893. return DP_VLAN_UNTAGGED;
  5894. veh = (struct vlan_ethhdr *)eh;
  5895. *vlan_id = (ntohs(veh->h_vlan_TCI) & VLAN_VID_MASK);
  5896. if (qdf_unlikely(DP_FRAME_IS_MULTICAST((eh)->ether_dhost))) {
  5897. /* look for handling of multicast packets in reinject path */
  5898. if (dp_tx_need_mcast_reinject(vdev))
  5899. return DP_VLAN_UNTAGGED;
  5900. qdf_spin_lock_bh(&vdev->mpass_peer_mutex);
  5901. TAILQ_FOREACH(txrx_peer, &vdev->mpass_peer_list,
  5902. mpass_peer_list_elem) {
  5903. if (*vlan_id == txrx_peer->vlan_id) {
  5904. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  5905. return DP_VLAN_TAGGED_MULTICAST;
  5906. }
  5907. }
  5908. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  5909. return DP_VLAN_UNTAGGED;
  5910. }
  5911. peer = dp_peer_find_hash_find(soc, eh->ether_dhost, 0, DP_VDEV_ALL,
  5912. DP_MOD_ID_TX_MULTIPASS);
  5913. if (qdf_unlikely(!peer))
  5914. return DP_VLAN_UNTAGGED;
  5915. /*
  5916. * Do not drop the frame when vlan_id doesn't match.
  5917. * Send the frame as it is.
  5918. */
  5919. if (*vlan_id == peer->txrx_peer->vlan_id) {
  5920. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  5921. return DP_VLAN_TAGGED_UNICAST;
  5922. }
  5923. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  5924. return DP_VLAN_UNTAGGED;
  5925. }
  5926. #ifndef WLAN_REPEATER_NOT_SUPPORTED
  5927. static inline void
  5928. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  5929. qdf_nbuf_t nbuf,
  5930. struct dp_tx_msdu_info_s *msdu_info)
  5931. {
  5932. qdf_nbuf_t nbuf_copy = NULL;
  5933. /* AP can have classic clients, special clients &
  5934. * classic repeaters.
  5935. * 1. Classic clients & special client:
  5936. * Remove vlan header, find corresponding group key
  5937. * index, fill in metaheader and enqueue multicast
  5938. * frame to TCL.
  5939. * 2. Classic repeater:
  5940. * Pass through to classic repeater with vlan tag
  5941. * intact without any group key index. Hardware
  5942. * will know which key to use to send frame to
  5943. * repeater.
  5944. */
  5945. nbuf_copy = qdf_nbuf_copy(nbuf);
  5946. /*
  5947. * Send multicast frame to special peers even
  5948. * if pass through to classic repeater fails.
  5949. */
  5950. if (nbuf_copy) {
  5951. struct dp_tx_msdu_info_s msdu_info_copy;
  5952. qdf_mem_zero(&msdu_info_copy, sizeof(msdu_info_copy));
  5953. msdu_info_copy.tid = HTT_TX_EXT_TID_INVALID;
  5954. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info_copy.meta_data[0], 1);
  5955. nbuf_copy = dp_tx_send_msdu_single(vdev, nbuf_copy,
  5956. &msdu_info_copy,
  5957. HTT_INVALID_PEER, NULL);
  5958. if (nbuf_copy) {
  5959. qdf_nbuf_free(nbuf_copy);
  5960. dp_info_rl("nbuf_copy send failed");
  5961. }
  5962. }
  5963. }
  5964. #else
  5965. static inline void
  5966. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  5967. qdf_nbuf_t nbuf,
  5968. struct dp_tx_msdu_info_s *msdu_info)
  5969. {
  5970. }
  5971. #endif
  5972. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  5973. qdf_nbuf_t nbuf,
  5974. struct dp_tx_msdu_info_s *msdu_info)
  5975. {
  5976. uint16_t vlan_id = 0;
  5977. uint16_t group_key = 0;
  5978. uint8_t is_spcl_peer = DP_VLAN_UNTAGGED;
  5979. if (HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->meta_data[0]))
  5980. return true;
  5981. is_spcl_peer = dp_tx_need_multipass_process(soc, vdev, nbuf, &vlan_id);
  5982. if ((is_spcl_peer != DP_VLAN_TAGGED_MULTICAST) &&
  5983. (is_spcl_peer != DP_VLAN_TAGGED_UNICAST))
  5984. return true;
  5985. if (is_spcl_peer == DP_VLAN_TAGGED_UNICAST) {
  5986. dp_tx_remove_vlan_tag(vdev, nbuf);
  5987. return true;
  5988. }
  5989. dp_tx_multipass_send_pkt_to_repeater(soc, vdev, nbuf, msdu_info);
  5990. group_key = vdev->iv_vlan_map[vlan_id];
  5991. /*
  5992. * If group key is not installed, drop the frame.
  5993. */
  5994. if (!group_key)
  5995. return false;
  5996. dp_tx_remove_vlan_tag(vdev, nbuf);
  5997. dp_tx_add_groupkey_metadata(vdev, msdu_info, group_key);
  5998. msdu_info->exception_fw = 1;
  5999. return true;
  6000. }
  6001. #endif /* QCA_MULTIPASS_SUPPORT */