dp_be.c 88 KB

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  1. /*
  2. * Copyright (c) 2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <wlan_utility.h>
  20. #include <dp_internal.h>
  21. #include "dp_rings.h"
  22. #include <dp_htt.h>
  23. #include "dp_be.h"
  24. #include "dp_be_tx.h"
  25. #include "dp_be_rx.h"
  26. #ifdef WIFI_MONITOR_SUPPORT
  27. #if !defined(DISABLE_MON_CONFIG) && (defined(WLAN_PKT_CAPTURE_TX_2_0) || \
  28. defined(WLAN_PKT_CAPTURE_RX_2_0))
  29. #include "dp_mon_2.0.h"
  30. #endif
  31. #include "dp_mon.h"
  32. #endif
  33. #include <hal_be_api.h>
  34. #ifdef WLAN_SUPPORT_PPEDS
  35. #include "be/dp_ppeds.h"
  36. #include <ppe_vp_public.h>
  37. #include <ppe_drv_sc.h>
  38. #endif
  39. #ifdef WLAN_SUPPORT_PPEDS
  40. static const char *ring_usage_dump[RING_USAGE_MAX] = {
  41. "100%",
  42. "Greater than 90%",
  43. "70 to 90%",
  44. "50 to 70%",
  45. "Less than 50%"
  46. };
  47. #endif
  48. /* Generic AST entry aging timer value */
  49. #define DP_AST_AGING_TIMER_DEFAULT_MS 5000
  50. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  51. #define DP_TX_VDEV_ID_CHECK_ENABLE 0
  52. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  53. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  54. {1, 4, HAL_BE_WBM_SW4_BM_ID, 0},
  55. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  56. #ifdef QCA_WIFI_KIWI_V2
  57. {3, 5, HAL_BE_WBM_SW5_BM_ID, 0},
  58. {4, 6, HAL_BE_WBM_SW6_BM_ID, 0}
  59. #else
  60. {3, 6, HAL_BE_WBM_SW5_BM_ID, 0},
  61. {4, 7, HAL_BE_WBM_SW6_BM_ID, 0}
  62. #endif
  63. };
  64. #else
  65. #define DP_TX_VDEV_ID_CHECK_ENABLE 1
  66. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  67. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  68. {1, 1, HAL_BE_WBM_SW1_BM_ID, 0},
  69. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  70. {3, 3, HAL_BE_WBM_SW3_BM_ID, 0},
  71. {4, 4, HAL_BE_WBM_SW4_BM_ID, 0}
  72. };
  73. #endif
  74. #ifdef WLAN_SUPPORT_PPEDS
  75. static struct cdp_ppeds_txrx_ops dp_ops_ppeds_be = {
  76. .ppeds_entry_attach = dp_ppeds_attach_vdev_be,
  77. .ppeds_entry_detach = dp_ppeds_detach_vdev_be,
  78. .ppeds_set_int_pri2tid = dp_ppeds_set_int_pri2tid_be,
  79. .ppeds_update_int_pri2tid = dp_ppeds_update_int_pri2tid_be,
  80. .ppeds_entry_dump = dp_ppeds_dump_ppe_vp_tbl_be,
  81. .ppeds_enable_pri2tid = dp_ppeds_vdev_enable_pri2tid_be,
  82. .ppeds_vp_setup_recovery = dp_ppeds_vp_setup_on_fw_recovery,
  83. .ppeds_stats_sync = dp_ppeds_stats_sync_be,
  84. };
  85. static void dp_ppeds_rings_status(struct dp_soc *soc)
  86. {
  87. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  88. dp_print_ring_stat_from_hal(soc, &be_soc->reo2ppe_ring, REO2PPE);
  89. dp_print_ring_stat_from_hal(soc, &be_soc->ppe2tcl_ring, PPE2TCL);
  90. dp_print_ring_stat_from_hal(soc, &be_soc->ppeds_wbm_release_ring,
  91. WBM2SW_RELEASE);
  92. }
  93. static void dp_ppeds_inuse_desc(struct dp_soc *soc)
  94. {
  95. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  96. DP_PRINT_STATS("PPE-DS Tx Descriptors in Use = %u num_free %u",
  97. be_soc->ppeds_tx_desc.num_allocated,
  98. be_soc->ppeds_tx_desc.num_free);
  99. DP_PRINT_STATS("PPE-DS Tx desc alloc failed %u",
  100. be_soc->ppeds_stats.tx.desc_alloc_failed);
  101. }
  102. static void dp_ppeds_clear_stats(struct dp_soc *soc)
  103. {
  104. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  105. be_soc->ppeds_stats.tx.desc_alloc_failed = 0;
  106. }
  107. static void dp_ppeds_rings_stats(struct dp_soc *soc)
  108. {
  109. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  110. int i = 0;
  111. DP_PRINT_STATS("Ring utilization statistics");
  112. DP_PRINT_STATS("WBM2SW_RELEASE");
  113. for (i = 0; i < RING_USAGE_MAX; i++)
  114. DP_PRINT_STATS("\t %s utilized %d instances",
  115. ring_usage_dump[i],
  116. be_soc->ppeds_wbm_release_ring.stats.util[i]);
  117. DP_PRINT_STATS("PPE2TCL");
  118. for (i = 0; i < RING_USAGE_MAX; i++)
  119. DP_PRINT_STATS("\t %s utilized %d instances",
  120. ring_usage_dump[i],
  121. be_soc->ppe2tcl_ring.stats.util[i]);
  122. }
  123. static void dp_ppeds_clear_rings_stats(struct dp_soc *soc)
  124. {
  125. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  126. memset(&be_soc->ppeds_wbm_release_ring.stats, 0,
  127. sizeof(struct ring_util_stats));
  128. memset(&be_soc->ppe2tcl_ring.stats, 0, sizeof(struct ring_util_stats));
  129. }
  130. #endif
  131. static void dp_soc_cfg_attach_be(struct dp_soc *soc)
  132. {
  133. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  134. dp_soc_cfg_attach(soc);
  135. wlan_cfg_set_rx_rel_ring_id(soc_cfg_ctx, WBM2SW_REL_ERR_RING_NUM);
  136. soc->wlan_cfg_ctx->tcl_wbm_map_array = g_tcl_wbm_map_array;
  137. /* this is used only when dmac mode is enabled */
  138. soc->num_rx_refill_buf_rings = 1;
  139. soc->wlan_cfg_ctx->notify_frame_support =
  140. DP_MARK_NOTIFY_FRAME_SUPPORT;
  141. }
  142. qdf_size_t dp_get_context_size_be(enum dp_context_type context_type)
  143. {
  144. switch (context_type) {
  145. case DP_CONTEXT_TYPE_SOC:
  146. return sizeof(struct dp_soc_be);
  147. case DP_CONTEXT_TYPE_PDEV:
  148. return sizeof(struct dp_pdev_be);
  149. case DP_CONTEXT_TYPE_VDEV:
  150. return sizeof(struct dp_vdev_be);
  151. case DP_CONTEXT_TYPE_PEER:
  152. return sizeof(struct dp_peer_be);
  153. default:
  154. return 0;
  155. }
  156. }
  157. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  158. static uint64_t dp_get_cmem_chunk(struct dp_soc *soc, uint64_t size,
  159. enum CMEM_MEM_CLIENTS client)
  160. {
  161. uint64_t cmem_chunk;
  162. dp_info("cmem base 0x%llx, total size 0x%llx avail_size 0x%llx",
  163. soc->cmem_base, soc->cmem_total_size, soc->cmem_avail_size);
  164. /* Check if requested cmem space is available */
  165. if (soc->cmem_avail_size < size) {
  166. dp_err("cmem_size 0x%llx bytes < requested size 0x%llx bytes",
  167. soc->cmem_avail_size, size);
  168. return 0;
  169. }
  170. cmem_chunk = soc->cmem_base +
  171. (soc->cmem_total_size - soc->cmem_avail_size);
  172. soc->cmem_avail_size -= size;
  173. dp_info("Reserved cmem space 0x%llx, size 0x%llx for client %d",
  174. cmem_chunk, size, client);
  175. return cmem_chunk;
  176. }
  177. #endif
  178. #ifdef WLAN_SUPPORT_RX_FISA
  179. static uint64_t dp_get_fst_cmem_base_be(struct dp_soc *soc, uint64_t size)
  180. {
  181. return dp_get_cmem_chunk(soc, size, FISA_FST);
  182. }
  183. static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
  184. {
  185. arch_ops->dp_get_fst_cmem_base = dp_get_fst_cmem_base_be;
  186. }
  187. #else
  188. static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
  189. {
  190. }
  191. #endif
  192. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  193. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  194. /**
  195. * dp_cc_wbm_sw_en_cfg() - configure HW cookie conversion enablement
  196. * per wbm2sw ring
  197. *
  198. * @cc_cfg: HAL HW cookie conversion configuration structure pointer
  199. *
  200. * Return: None
  201. */
  202. #ifdef IPA_OPT_WIFI_DP
  203. static inline
  204. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  205. {
  206. cc_cfg->wbm2sw6_cc_en = 1;
  207. cc_cfg->wbm2sw5_cc_en = 0;
  208. cc_cfg->wbm2sw4_cc_en = 1;
  209. cc_cfg->wbm2sw3_cc_en = 1;
  210. cc_cfg->wbm2sw2_cc_en = 1;
  211. /* disable wbm2sw1 hw cc as it's for FW */
  212. cc_cfg->wbm2sw1_cc_en = 0;
  213. cc_cfg->wbm2sw0_cc_en = 1;
  214. cc_cfg->wbm2fw_cc_en = 0;
  215. }
  216. #else
  217. static inline
  218. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  219. {
  220. cc_cfg->wbm2sw6_cc_en = 1;
  221. cc_cfg->wbm2sw5_cc_en = 1;
  222. cc_cfg->wbm2sw4_cc_en = 1;
  223. cc_cfg->wbm2sw3_cc_en = 1;
  224. cc_cfg->wbm2sw2_cc_en = 1;
  225. /* disable wbm2sw1 hw cc as it's for FW */
  226. cc_cfg->wbm2sw1_cc_en = 0;
  227. cc_cfg->wbm2sw0_cc_en = 1;
  228. cc_cfg->wbm2fw_cc_en = 0;
  229. }
  230. #endif
  231. #else
  232. static inline
  233. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  234. {
  235. cc_cfg->wbm2sw6_cc_en = 1;
  236. cc_cfg->wbm2sw5_cc_en = 1;
  237. cc_cfg->wbm2sw4_cc_en = 1;
  238. cc_cfg->wbm2sw3_cc_en = 1;
  239. cc_cfg->wbm2sw2_cc_en = 1;
  240. cc_cfg->wbm2sw1_cc_en = 1;
  241. cc_cfg->wbm2sw0_cc_en = 1;
  242. cc_cfg->wbm2fw_cc_en = 0;
  243. }
  244. #endif
  245. /**
  246. * dp_cc_reg_cfg_init() - initialize and configure HW cookie
  247. * conversion register
  248. *
  249. * @soc: SOC handle
  250. * @is_4k_align: page address 4k aligned
  251. *
  252. * Return: None
  253. */
  254. static void dp_cc_reg_cfg_init(struct dp_soc *soc,
  255. bool is_4k_align)
  256. {
  257. struct hal_hw_cc_config cc_cfg = { 0 };
  258. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  259. if (soc->cdp_soc.ol_ops->get_con_mode &&
  260. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_FTM_MODE)
  261. return;
  262. if (!soc->wlan_cfg_ctx->hw_cc_enabled) {
  263. dp_info("INI skip HW CC register setting");
  264. return;
  265. }
  266. cc_cfg.lut_base_addr_31_0 = be_soc->cc_cmem_base;
  267. cc_cfg.cc_global_en = true;
  268. cc_cfg.page_4k_align = is_4k_align;
  269. cc_cfg.cookie_offset_msb = DP_CC_DESC_ID_SPT_VA_OS_MSB;
  270. cc_cfg.cookie_page_msb = DP_CC_DESC_ID_PPT_PAGE_OS_MSB;
  271. /* 36th bit should be 1 then HW know this is CMEM address */
  272. cc_cfg.lut_base_addr_39_32 = 0x10;
  273. cc_cfg.error_path_cookie_conv_en = true;
  274. cc_cfg.release_path_cookie_conv_en = true;
  275. dp_cc_wbm_sw_en_cfg(&cc_cfg);
  276. hal_cookie_conversion_reg_cfg_be(soc->hal_soc, &cc_cfg);
  277. }
  278. /**
  279. * dp_hw_cc_cmem_write() - DP wrapper function for CMEM buffer writing
  280. * @hal_soc_hdl: HAL SOC handle
  281. * @offset: CMEM address
  282. * @value: value to write
  283. *
  284. * Return: None.
  285. */
  286. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  287. uint32_t offset,
  288. uint32_t value)
  289. {
  290. hal_cmem_write(hal_soc_hdl, offset, value);
  291. }
  292. /**
  293. * dp_hw_cc_cmem_addr_init() - Check and initialize CMEM base address for
  294. * HW cookie conversion
  295. *
  296. * @soc: SOC handle
  297. *
  298. * Return: 0 in case of success, else error value
  299. */
  300. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  301. {
  302. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  303. be_soc->cc_cmem_base = dp_get_cmem_chunk(soc, DP_CC_PPT_MEM_SIZE,
  304. COOKIE_CONVERSION);
  305. return QDF_STATUS_SUCCESS;
  306. }
  307. #else
  308. static inline void dp_cc_reg_cfg_init(struct dp_soc *soc,
  309. bool is_4k_align) {}
  310. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  311. uint32_t offset,
  312. uint32_t value)
  313. { }
  314. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  315. {
  316. return QDF_STATUS_SUCCESS;
  317. }
  318. #endif
  319. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  320. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  321. uint8_t for_feature)
  322. {
  323. QDF_STATUS status = QDF_STATUS_E_NOMEM;
  324. switch (for_feature) {
  325. case COOKIE_CONVERSION:
  326. status = dp_hw_cc_cmem_addr_init(soc);
  327. break;
  328. default:
  329. dp_err("Invalid CMEM request");
  330. }
  331. return status;
  332. }
  333. #else
  334. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  335. uint8_t for_feature)
  336. {
  337. return QDF_STATUS_SUCCESS;
  338. }
  339. #endif
  340. QDF_STATUS
  341. dp_hw_cookie_conversion_attach(struct dp_soc_be *be_soc,
  342. struct dp_hw_cookie_conversion_t *cc_ctx,
  343. uint32_t num_descs,
  344. enum qdf_dp_desc_type desc_type,
  345. uint8_t desc_pool_id)
  346. {
  347. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  348. uint32_t num_spt_pages, i = 0;
  349. struct dp_spt_page_desc *spt_desc;
  350. struct qdf_mem_dma_page_t *dma_page;
  351. uint8_t chip_id;
  352. /* estimate how many SPT DDR pages needed */
  353. num_spt_pages = num_descs / DP_CC_SPT_PAGE_MAX_ENTRIES;
  354. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  355. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  356. dp_info("num_spt_pages needed %d", num_spt_pages);
  357. dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  358. &cc_ctx->page_pool, qdf_page_size,
  359. num_spt_pages, 0, false);
  360. if (!cc_ctx->page_pool.dma_pages) {
  361. dp_err("spt ddr pages allocation failed");
  362. return QDF_STATUS_E_RESOURCES;
  363. }
  364. cc_ctx->page_desc_base = qdf_mem_malloc(
  365. num_spt_pages * sizeof(struct dp_spt_page_desc));
  366. if (!cc_ctx->page_desc_base) {
  367. dp_err("spt page descs allocation failed");
  368. goto fail_0;
  369. }
  370. chip_id = dp_mlo_get_chip_id(soc);
  371. cc_ctx->cmem_offset = dp_desc_pool_get_cmem_base(chip_id, desc_pool_id,
  372. desc_type);
  373. /* initial page desc */
  374. spt_desc = cc_ctx->page_desc_base;
  375. dma_page = cc_ctx->page_pool.dma_pages;
  376. while (i < num_spt_pages) {
  377. /* check if page address 4K aligned */
  378. if (qdf_unlikely(dma_page[i].page_p_addr & 0xFFF)) {
  379. dp_err("non-4k aligned pages addr %pK",
  380. (void *)dma_page[i].page_p_addr);
  381. goto fail_1;
  382. }
  383. spt_desc[i].page_v_addr =
  384. dma_page[i].page_v_addr_start;
  385. spt_desc[i].page_p_addr =
  386. dma_page[i].page_p_addr;
  387. i++;
  388. }
  389. cc_ctx->total_page_num = num_spt_pages;
  390. qdf_spinlock_create(&cc_ctx->cc_lock);
  391. return QDF_STATUS_SUCCESS;
  392. fail_1:
  393. qdf_mem_free(cc_ctx->page_desc_base);
  394. fail_0:
  395. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  396. &cc_ctx->page_pool, 0, false);
  397. return QDF_STATUS_E_FAILURE;
  398. }
  399. QDF_STATUS
  400. dp_hw_cookie_conversion_detach(struct dp_soc_be *be_soc,
  401. struct dp_hw_cookie_conversion_t *cc_ctx)
  402. {
  403. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  404. qdf_mem_free(cc_ctx->page_desc_base);
  405. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  406. &cc_ctx->page_pool, 0, false);
  407. qdf_spinlock_destroy(&cc_ctx->cc_lock);
  408. return QDF_STATUS_SUCCESS;
  409. }
  410. QDF_STATUS
  411. dp_hw_cookie_conversion_init(struct dp_soc_be *be_soc,
  412. struct dp_hw_cookie_conversion_t *cc_ctx)
  413. {
  414. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  415. uint32_t i = 0;
  416. struct dp_spt_page_desc *spt_desc;
  417. uint32_t ppt_index;
  418. uint32_t ppt_id_start;
  419. if (!cc_ctx->total_page_num) {
  420. dp_err("total page num is 0");
  421. return QDF_STATUS_E_INVAL;
  422. }
  423. ppt_id_start = DP_CMEM_OFFSET_TO_PPT_ID(cc_ctx->cmem_offset);
  424. spt_desc = cc_ctx->page_desc_base;
  425. while (i < cc_ctx->total_page_num) {
  426. /* write page PA to CMEM */
  427. dp_hw_cc_cmem_write(soc->hal_soc,
  428. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  429. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  430. (spt_desc[i].page_p_addr >>
  431. DP_CC_PPT_ENTRY_HW_APEND_BITS_4K_ALIGNED));
  432. ppt_index = ppt_id_start + i;
  433. if (ppt_index >= DP_CC_PPT_MAX_ENTRIES)
  434. qdf_assert_always(0);
  435. spt_desc[i].ppt_index = ppt_index;
  436. be_soc->page_desc_base[ppt_index].page_v_addr =
  437. spt_desc[i].page_v_addr;
  438. i++;
  439. }
  440. return QDF_STATUS_SUCCESS;
  441. }
  442. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  443. QDF_STATUS
  444. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  445. struct dp_hw_cookie_conversion_t *cc_ctx)
  446. {
  447. uint32_t ppt_index;
  448. struct dp_spt_page_desc *spt_desc;
  449. int i = 0;
  450. spt_desc = cc_ctx->page_desc_base;
  451. while (i < cc_ctx->total_page_num) {
  452. ppt_index = spt_desc[i].ppt_index;
  453. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  454. i++;
  455. }
  456. return QDF_STATUS_SUCCESS;
  457. }
  458. #else
  459. QDF_STATUS
  460. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  461. struct dp_hw_cookie_conversion_t *cc_ctx)
  462. {
  463. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  464. uint32_t ppt_index;
  465. struct dp_spt_page_desc *spt_desc;
  466. int i = 0;
  467. spt_desc = cc_ctx->page_desc_base;
  468. while (i < cc_ctx->total_page_num) {
  469. /* reset PA in CMEM to NULL */
  470. dp_hw_cc_cmem_write(soc->hal_soc,
  471. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  472. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  473. 0);
  474. ppt_index = spt_desc[i].ppt_index;
  475. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  476. i++;
  477. }
  478. return QDF_STATUS_SUCCESS;
  479. }
  480. #endif
  481. #ifdef WLAN_SUPPORT_PPEDS
  482. static QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  483. {
  484. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  485. int target_type = hal_get_target_type(soc->hal_soc);
  486. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  487. /*
  488. * Check if PPE DS is enabled and wlan soc supports it.
  489. */
  490. if (!wlan_cfg_get_dp_soc_ppeds_enable(soc->wlan_cfg_ctx) ||
  491. !dp_ppeds_target_supported(target_type))
  492. return QDF_STATUS_SUCCESS;
  493. if (dp_ppeds_attach_soc_be(be_soc) != QDF_STATUS_SUCCESS)
  494. return QDF_STATUS_SUCCESS;
  495. cdp_ops->ppeds_ops = &dp_ops_ppeds_be;
  496. return QDF_STATUS_SUCCESS;
  497. }
  498. static QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  499. {
  500. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  501. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  502. if (!be_soc->ppeds_handle)
  503. return QDF_STATUS_E_FAILURE;
  504. dp_ppeds_detach_soc_be(be_soc);
  505. cdp_ops->ppeds_ops = NULL;
  506. return QDF_STATUS_SUCCESS;
  507. }
  508. static QDF_STATUS dp_peer_ppeds_default_route_be(struct dp_soc *soc,
  509. struct dp_peer_be *be_peer,
  510. uint8_t vdev_id,
  511. uint16_t src_info)
  512. {
  513. uint16_t service_code;
  514. uint8_t priority_valid;
  515. uint8_t use_ppe_ds = PEER_ROUTING_USE_PPE;
  516. uint8_t peer_routing_enabled = PEER_ROUTING_ENABLED;
  517. QDF_STATUS status = QDF_STATUS_SUCCESS;
  518. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  519. struct dp_vdev_be *be_vdev;
  520. be_vdev = dp_get_be_vdev_from_dp_vdev(be_peer->peer.vdev);
  521. /*
  522. * Program service code bypass to avoid L2 new mac address
  523. * learning exception when fdb learning is disabled.
  524. */
  525. service_code = PPE_DRV_SC_SPF_BYPASS;
  526. priority_valid = be_peer->priority_valid;
  527. /*
  528. * if FST is enabled then let flow rule take the decision of
  529. * routing the pkt to DS or host
  530. */
  531. if (wlan_cfg_is_rx_flow_tag_enabled(cfg))
  532. use_ppe_ds = 0;
  533. if (soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing) {
  534. status =
  535. soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing
  536. (soc->ctrl_psoc,
  537. be_peer->peer.mac_addr.raw,
  538. service_code, priority_valid,
  539. src_info, vdev_id, use_ppe_ds,
  540. peer_routing_enabled);
  541. if (status != QDF_STATUS_SUCCESS) {
  542. dp_err("vdev_id: %d, PPE peer routing mac:"
  543. QDF_MAC_ADDR_FMT, vdev_id,
  544. QDF_MAC_ADDR_REF(be_peer->peer.mac_addr.raw));
  545. return QDF_STATUS_E_FAILURE;
  546. }
  547. }
  548. return QDF_STATUS_SUCCESS;
  549. }
  550. #ifdef WLAN_FEATURE_11BE_MLO
  551. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  552. struct dp_peer *peer,
  553. struct dp_vdev_be *be_vdev,
  554. void *args)
  555. {
  556. struct dp_peer *mld_peer;
  557. struct dp_soc *mld_soc;
  558. struct dp_soc_be *be_soc;
  559. struct cdp_soc_t *cdp_soc;
  560. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  561. struct cdp_ds_vp_params vp_params = {0};
  562. struct dp_ppe_vp_profile *ppe_vp_profile = (struct dp_ppe_vp_profile *)args;
  563. uint16_t src_info = ppe_vp_profile->vp_num;
  564. uint8_t vdev_id = be_vdev->vdev.vdev_id;
  565. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  566. if (!be_peer) {
  567. dp_err("BE peer is null");
  568. return QDF_STATUS_E_NULL_VALUE;
  569. }
  570. if (IS_DP_LEGACY_PEER(peer)) {
  571. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  572. vdev_id, src_info);
  573. } else if (IS_MLO_DP_MLD_PEER(peer)) {
  574. int i;
  575. struct dp_peer *link_peer = NULL;
  576. struct dp_mld_link_peers link_peers_info;
  577. /* get link peers with reference */
  578. dp_get_link_peers_ref_from_mld_peer(soc, peer, &link_peers_info,
  579. DP_MOD_ID_DS);
  580. for (i = 0; i < link_peers_info.num_links; i++) {
  581. link_peer = link_peers_info.link_peers[i];
  582. be_peer = dp_get_be_peer_from_dp_peer(link_peer);
  583. if (!be_peer) {
  584. dp_err("BE peer is null");
  585. continue;
  586. }
  587. be_vdev = dp_get_be_vdev_from_dp_vdev(link_peer->vdev);
  588. if (!be_vdev) {
  589. dp_err("BE vap is null for peer id %d ",
  590. link_peer->peer_id);
  591. continue;
  592. }
  593. vdev_id = be_vdev->vdev.vdev_id;
  594. soc = link_peer->vdev->pdev->soc;
  595. qdf_status = dp_peer_ppeds_default_route_be(soc,
  596. be_peer,
  597. vdev_id,
  598. src_info);
  599. }
  600. dp_release_link_peers_ref(&link_peers_info, DP_MOD_ID_DS);
  601. } else {
  602. mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
  603. if (!mld_peer)
  604. return qdf_status;
  605. /*
  606. * In case of MLO link peer,
  607. * Fetch the VP profile from the mld vdev.
  608. */
  609. be_vdev = dp_get_be_vdev_from_dp_vdev(mld_peer->vdev);
  610. if (!be_vdev) {
  611. dp_err("BE vap is null");
  612. return QDF_STATUS_E_NULL_VALUE;
  613. }
  614. /*
  615. * Extract the VP profile from the vap
  616. * in case of MLO peer, we have to get the profile from
  617. * the MLD vdev's osif handle and not the link peer.
  618. */
  619. mld_soc = mld_peer->vdev->pdev->soc;
  620. cdp_soc = &mld_soc->cdp_soc;
  621. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  622. dp_err("%pK: Register PPEDS profile info API before use", cdp_soc);
  623. return QDF_STATUS_E_NULL_VALUE;
  624. }
  625. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(mld_soc->ctrl_psoc,
  626. mld_peer->vdev->vdev_id,
  627. &vp_params);
  628. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  629. dp_err("%pK: Failed to get ppeds profile for mld soc", mld_soc);
  630. return qdf_status;
  631. }
  632. /*
  633. * Check if PPE DS routing is enabled on
  634. * the associated vap.
  635. */
  636. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  637. return qdf_status;
  638. be_soc = dp_get_be_soc_from_dp_soc(mld_soc);
  639. ppe_vp_profile = &be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx];
  640. src_info = ppe_vp_profile->vp_num;
  641. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  642. vdev_id, src_info);
  643. }
  644. return qdf_status;
  645. }
  646. #else
  647. static QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  648. struct dp_peer *peer,
  649. struct dp_vdev_be *be_vdev
  650. void *args)
  651. {
  652. struct dp_ppe_vp_profile *vp_profile = (struct dp_ppe_vp_profile *)args;
  653. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  654. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  655. if (!be_peer) {
  656. dp_err("BE peer is null");
  657. return QDF_STATUS_E_NULL_VALUE;
  658. }
  659. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  660. be_vdev->vdev.vdev_id,
  661. vp_profile->vp_num);
  662. return qdf_status;
  663. }
  664. #endif
  665. #else
  666. static QDF_STATUS dp_ppeds_init_soc_be(struct dp_soc *soc)
  667. {
  668. return QDF_STATUS_SUCCESS;
  669. }
  670. static QDF_STATUS dp_ppeds_deinit_soc_be(struct dp_soc *soc)
  671. {
  672. return QDF_STATUS_SUCCESS;
  673. }
  674. static inline QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  675. {
  676. return QDF_STATUS_SUCCESS;
  677. }
  678. static inline QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  679. {
  680. return QDF_STATUS_SUCCESS;
  681. }
  682. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc, struct dp_peer *peer,
  683. struct dp_vdev_be *be_vdev,
  684. void *args)
  685. {
  686. return QDF_STATUS_SUCCESS;
  687. }
  688. static inline void dp_ppeds_stop_soc_be(struct dp_soc *soc)
  689. {
  690. }
  691. #endif /* WLAN_SUPPORT_PPEDS */
  692. void dp_reo_shared_qaddr_detach(struct dp_soc *soc)
  693. {
  694. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  695. REO_QUEUE_REF_ML_TABLE_SIZE,
  696. soc->reo_qref.mlo_reo_qref_table_vaddr,
  697. soc->reo_qref.mlo_reo_qref_table_paddr, 0);
  698. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  699. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  700. soc->reo_qref.non_mlo_reo_qref_table_vaddr,
  701. soc->reo_qref.non_mlo_reo_qref_table_paddr, 0);
  702. }
  703. static QDF_STATUS dp_soc_detach_be(struct dp_soc *soc)
  704. {
  705. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  706. int i = 0;
  707. dp_soc_ppeds_detach_be(soc);
  708. dp_reo_shared_qaddr_detach(soc);
  709. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  710. dp_hw_cookie_conversion_detach(be_soc,
  711. &be_soc->tx_cc_ctx[i]);
  712. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  713. dp_hw_cookie_conversion_detach(be_soc,
  714. &be_soc->rx_cc_ctx[i]);
  715. qdf_mem_free(be_soc->page_desc_base);
  716. be_soc->page_desc_base = NULL;
  717. return QDF_STATUS_SUCCESS;
  718. }
  719. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  720. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  721. {
  722. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  723. if (dp_global)
  724. dp_global->fst_ctx = fst;
  725. }
  726. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  727. {
  728. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  729. if (dp_global)
  730. return dp_global->fst_ctx;
  731. return NULL;
  732. }
  733. static uint32_t dp_rx_fst_release_ref_be(void)
  734. {
  735. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  736. uint32_t rx_fst_ref_cnt;
  737. if (dp_global) {
  738. rx_fst_ref_cnt = qdf_atomic_read(&dp_global->rx_fst_ref_cnt);
  739. qdf_atomic_dec(&dp_global->rx_fst_ref_cnt);
  740. return rx_fst_ref_cnt;
  741. }
  742. return 1;
  743. }
  744. static void dp_rx_fst_get_ref_be(void)
  745. {
  746. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  747. if (dp_global)
  748. qdf_atomic_inc(&dp_global->rx_fst_ref_cnt);
  749. }
  750. #else
  751. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  752. {
  753. }
  754. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  755. {
  756. return NULL;
  757. }
  758. static uint32_t dp_rx_fst_release_ref_be(void)
  759. {
  760. return 1;
  761. }
  762. static void dp_rx_fst_get_ref_be(void)
  763. {
  764. }
  765. #endif
  766. #ifdef WLAN_MLO_MULTI_CHIP
  767. #ifdef WLAN_MCAST_MLO
  768. static inline void
  769. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  770. {
  771. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  772. be_vdev->mcast_primary = false;
  773. be_vdev->seq_num = 0;
  774. hal_tx_mcast_mlo_reinject_routing_set(
  775. soc->hal_soc,
  776. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  777. if (vdev->opmode == wlan_op_mode_ap) {
  778. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  779. vdev->vdev_id,
  780. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  781. }
  782. }
  783. static inline void
  784. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  785. {
  786. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  787. be_vdev->seq_num = 0;
  788. be_vdev->mcast_primary = false;
  789. vdev->mlo_vdev = false;
  790. }
  791. #else
  792. static inline void
  793. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  794. {
  795. }
  796. static inline void
  797. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  798. {
  799. }
  800. #endif
  801. static void dp_mlo_init_ptnr_list(struct dp_vdev *vdev)
  802. {
  803. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  804. qdf_mem_set(be_vdev->partner_vdev_list,
  805. WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
  806. CDP_INVALID_VDEV_ID);
  807. }
  808. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  809. struct cdp_lro_hash_config *lro_hash)
  810. {
  811. dp_mlo_get_rx_hash_key(soc, lro_hash);
  812. }
  813. #else
  814. static inline void
  815. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  816. {
  817. }
  818. static inline void
  819. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  820. {
  821. }
  822. static void dp_mlo_init_ptnr_list(struct dp_vdev *vdev)
  823. {
  824. }
  825. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  826. struct cdp_lro_hash_config *lro_hash)
  827. {
  828. dp_get_rx_hash_key_bytes(lro_hash);
  829. }
  830. #endif
  831. static QDF_STATUS dp_soc_attach_be(struct dp_soc *soc,
  832. struct cdp_soc_attach_params *params)
  833. {
  834. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  835. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  836. uint32_t max_tx_rx_desc_num, num_spt_pages;
  837. uint32_t num_entries;
  838. int i = 0;
  839. max_tx_rx_desc_num = WLAN_CFG_NUM_TX_DESC_MAX * MAX_TXDESC_POOLS +
  840. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX * MAX_RXDESC_POOLS +
  841. WLAN_CFG_NUM_PPEDS_TX_DESC_MAX * MAX_PPE_TXDESC_POOLS;
  842. /* estimate how many SPT DDR pages needed */
  843. num_spt_pages = max_tx_rx_desc_num / DP_CC_SPT_PAGE_MAX_ENTRIES;
  844. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  845. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  846. be_soc->page_desc_base = qdf_mem_malloc(
  847. DP_CC_PPT_MAX_ENTRIES * sizeof(struct dp_spt_page_desc));
  848. if (!be_soc->page_desc_base) {
  849. dp_err("spt page descs allocation failed");
  850. return QDF_STATUS_E_NOMEM;
  851. }
  852. soc->wbm_sw0_bm_id = hal_tx_get_wbm_sw0_bm_id();
  853. qdf_status = dp_get_cmem_allocation(soc, COOKIE_CONVERSION);
  854. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  855. goto fail;
  856. dp_soc_mlo_fill_params(soc, params);
  857. qdf_status = dp_soc_ppeds_attach_be(soc);
  858. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  859. goto fail;
  860. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  861. num_entries = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  862. qdf_status =
  863. dp_hw_cookie_conversion_attach(be_soc,
  864. &be_soc->tx_cc_ctx[i],
  865. num_entries,
  866. QDF_DP_TX_DESC_TYPE, i);
  867. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  868. goto fail;
  869. }
  870. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  871. num_entries =
  872. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  873. qdf_status =
  874. dp_hw_cookie_conversion_attach(be_soc,
  875. &be_soc->rx_cc_ctx[i],
  876. num_entries,
  877. QDF_DP_RX_DESC_BUF_TYPE,
  878. i);
  879. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  880. goto fail;
  881. }
  882. return qdf_status;
  883. fail:
  884. dp_soc_detach_be(soc);
  885. return qdf_status;
  886. }
  887. static QDF_STATUS dp_soc_deinit_be(struct dp_soc *soc)
  888. {
  889. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  890. int i = 0;
  891. qdf_atomic_set(&soc->cmn_init_done, 0);
  892. dp_ppeds_stop_soc_be(soc);
  893. dp_tx_deinit_bank_profiles(be_soc);
  894. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  895. dp_hw_cookie_conversion_deinit(be_soc,
  896. &be_soc->tx_cc_ctx[i]);
  897. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  898. dp_hw_cookie_conversion_deinit(be_soc,
  899. &be_soc->rx_cc_ctx[i]);
  900. dp_ppeds_deinit_soc_be(soc);
  901. return QDF_STATUS_SUCCESS;
  902. }
  903. static QDF_STATUS dp_soc_deinit_be_wrapper(struct dp_soc *soc)
  904. {
  905. QDF_STATUS qdf_status;
  906. qdf_status = dp_soc_deinit_be(soc);
  907. if (QDF_IS_STATUS_ERROR(qdf_status))
  908. return qdf_status;
  909. dp_soc_deinit(soc);
  910. return QDF_STATUS_SUCCESS;
  911. }
  912. static void *dp_soc_init_be(struct dp_soc *soc, HTC_HANDLE htc_handle,
  913. struct hif_opaque_softc *hif_handle)
  914. {
  915. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  916. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  917. int i = 0;
  918. void *ret_addr;
  919. wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
  920. WLAN_MD_DP_SOC, "dp_soc");
  921. soc->hif_handle = hif_handle;
  922. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  923. if (!soc->hal_soc)
  924. return NULL;
  925. dp_ppeds_init_soc_be(soc);
  926. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  927. qdf_status =
  928. dp_hw_cookie_conversion_init(be_soc,
  929. &be_soc->tx_cc_ctx[i]);
  930. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  931. goto fail;
  932. }
  933. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  934. qdf_status =
  935. dp_hw_cookie_conversion_init(be_soc,
  936. &be_soc->rx_cc_ctx[i]);
  937. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  938. goto fail;
  939. }
  940. /* route vdev_id mismatch notification via FW completion */
  941. hal_tx_vdev_mismatch_routing_set(soc->hal_soc,
  942. HAL_TX_VDEV_MISMATCH_FW_NOTIFY);
  943. qdf_status = dp_tx_init_bank_profiles(be_soc);
  944. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  945. goto fail;
  946. /* write WBM/REO cookie conversion CFG register */
  947. dp_cc_reg_cfg_init(soc, true);
  948. ret_addr = dp_soc_init(soc, htc_handle, hif_handle);
  949. if (!ret_addr)
  950. goto fail;
  951. return ret_addr;
  952. fail:
  953. dp_soc_deinit_be(soc);
  954. return NULL;
  955. }
  956. static QDF_STATUS dp_pdev_attach_be(struct dp_pdev *pdev,
  957. struct cdp_pdev_attach_params *params)
  958. {
  959. dp_pdev_mlo_fill_params(pdev, params);
  960. return QDF_STATUS_SUCCESS;
  961. }
  962. static QDF_STATUS dp_pdev_detach_be(struct dp_pdev *pdev)
  963. {
  964. dp_mlo_update_link_to_pdev_unmap(pdev->soc, pdev);
  965. return QDF_STATUS_SUCCESS;
  966. }
  967. #ifdef INTRA_BSS_FWD_OFFLOAD
  968. static
  969. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  970. {
  971. soc->cdp_soc.ol_ops->vdev_set_intra_bss(soc->ctrl_psoc, vdev_id,
  972. enable);
  973. }
  974. #else
  975. static
  976. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  977. {
  978. }
  979. #endif
  980. static QDF_STATUS dp_vdev_attach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  981. {
  982. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  983. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  984. struct dp_pdev *pdev = vdev->pdev;
  985. if (vdev->opmode == wlan_op_mode_monitor)
  986. return QDF_STATUS_SUCCESS;
  987. be_vdev->vdev_id_check_en = DP_TX_VDEV_ID_CHECK_ENABLE;
  988. be_vdev->bank_id = dp_tx_get_bank_profile(be_soc, be_vdev);
  989. vdev->bank_id = be_vdev->bank_id;
  990. if (be_vdev->bank_id == DP_BE_INVALID_BANK_ID) {
  991. QDF_BUG(0);
  992. return QDF_STATUS_E_FAULT;
  993. }
  994. if (vdev->opmode == wlan_op_mode_sta) {
  995. if (soc->cdp_soc.ol_ops->set_mec_timer)
  996. soc->cdp_soc.ol_ops->set_mec_timer(
  997. soc->ctrl_psoc,
  998. vdev->vdev_id,
  999. DP_AST_AGING_TIMER_DEFAULT_MS);
  1000. if (pdev->isolation)
  1001. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  1002. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1003. else
  1004. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  1005. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  1006. } else if (vdev->ap_bridge_enabled) {
  1007. dp_vdev_set_intra_bss(soc, vdev->vdev_id, true);
  1008. }
  1009. dp_mlo_mcast_init(soc, vdev);
  1010. dp_mlo_init_ptnr_list(vdev);
  1011. return QDF_STATUS_SUCCESS;
  1012. }
  1013. static QDF_STATUS dp_vdev_detach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  1014. {
  1015. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1016. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1017. if (vdev->opmode == wlan_op_mode_monitor)
  1018. return QDF_STATUS_SUCCESS;
  1019. if (vdev->opmode == wlan_op_mode_ap)
  1020. dp_mlo_mcast_deinit(soc, vdev);
  1021. dp_tx_put_bank_profile(be_soc, be_vdev);
  1022. dp_clr_mlo_ptnr_list(soc, vdev);
  1023. return QDF_STATUS_SUCCESS;
  1024. }
  1025. #ifdef WLAN_SUPPORT_PPEDS
  1026. static void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1027. uint8_t *peer_mac)
  1028. {
  1029. struct dp_vdev_be *be_vdev;
  1030. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1031. struct dp_soc_be *be_soc;
  1032. struct cdp_ds_vp_params vp_params = {0};
  1033. struct cdp_soc_t *cdp_soc;
  1034. enum wlan_op_mode vdev_opmode;
  1035. struct dp_peer *peer;
  1036. struct dp_peer *tgt_peer = NULL;
  1037. struct dp_soc *tgt_soc = NULL;
  1038. peer = dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id, DP_MOD_ID_CDP);
  1039. if (!peer)
  1040. return;
  1041. vdev_opmode = peer->vdev->opmode;
  1042. if (vdev_opmode != wlan_op_mode_ap &&
  1043. vdev_opmode != wlan_op_mode_sta) {
  1044. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1045. return;
  1046. }
  1047. tgt_peer = dp_get_tgt_peer_from_peer(peer);
  1048. tgt_soc = tgt_peer->vdev->pdev->soc;
  1049. be_soc = dp_get_be_soc_from_dp_soc(tgt_soc);
  1050. cdp_soc = &tgt_soc->cdp_soc;
  1051. be_vdev = dp_get_be_vdev_from_dp_vdev(tgt_peer->vdev);
  1052. if (!be_vdev) {
  1053. qdf_err("BE vap is null");
  1054. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1055. goto fail;
  1056. }
  1057. /*
  1058. * Extract the VP profile from the VAP
  1059. */
  1060. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  1061. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  1062. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1063. goto fail;
  1064. }
  1065. /*
  1066. * Check if PPE DS routing is enabled on the associated vap.
  1067. */
  1068. qdf_status =
  1069. cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(tgt_soc->ctrl_psoc,
  1070. tgt_peer->vdev->vdev_id,
  1071. &vp_params);
  1072. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  1073. dp_err("%pK: Could not find ppeds profile info vdev", be_vdev);
  1074. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1075. goto fail;
  1076. }
  1077. if (vp_params.ppe_vp_type == PPE_VP_USER_TYPE_DS) {
  1078. qdf_status = dp_peer_setup_ppeds_be(tgt_soc, tgt_peer, be_vdev,
  1079. (void *)&be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx]);
  1080. }
  1081. fail:
  1082. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1083. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1084. dp_err("Unable to do ppeds peer setup");
  1085. qdf_assert_always(0);
  1086. }
  1087. }
  1088. #else
  1089. static inline
  1090. void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1091. uint8_t *peer_mac)
  1092. {
  1093. }
  1094. #endif
  1095. static QDF_STATUS dp_peer_setup_be(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1096. uint8_t *peer_mac,
  1097. struct cdp_peer_setup_info *setup_info)
  1098. {
  1099. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  1100. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1101. qdf_status = dp_peer_setup_wifi3(soc_hdl, vdev_id, peer_mac,
  1102. setup_info);
  1103. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1104. dp_err("Unable to dp peer setup");
  1105. return qdf_status;
  1106. }
  1107. dp_soc_txrx_peer_setup_be(soc, vdev_id, peer_mac);
  1108. return QDF_STATUS_SUCCESS;
  1109. }
  1110. qdf_size_t dp_get_soc_context_size_be(void)
  1111. {
  1112. return sizeof(struct dp_soc_be);
  1113. }
  1114. #ifdef CONFIG_WORD_BASED_TLV
  1115. /**
  1116. * dp_rxdma_ring_wmask_cfg_be() - Setup RXDMA ring word mask config
  1117. * @soc: Common DP soc handle
  1118. * @htt_tlv_filter: Rx SRNG TLV and filter setting
  1119. *
  1120. * Return: none
  1121. */
  1122. static inline void
  1123. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1124. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1125. {
  1126. htt_tlv_filter->rx_msdu_end_wmask =
  1127. hal_rx_msdu_end_wmask_get(soc->hal_soc);
  1128. htt_tlv_filter->rx_mpdu_start_wmask =
  1129. hal_rx_mpdu_start_wmask_get(soc->hal_soc);
  1130. }
  1131. #else
  1132. static inline void
  1133. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1134. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1135. {
  1136. }
  1137. #endif
  1138. #ifdef WLAN_SUPPORT_PPEDS
  1139. static
  1140. void dp_free_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1141. int ring_type, int ring_num)
  1142. {
  1143. if (srng->irq >= 0) {
  1144. qdf_dev_clear_irq_status_flags(srng->irq, IRQ_DISABLE_UNLAZY);
  1145. if (ring_type == WBM2SW_RELEASE &&
  1146. ring_num == WBM2_SW_PPE_REL_RING_ID)
  1147. pld_pfrm_free_irq(soc->osdev->dev, srng->irq, soc);
  1148. else if (ring_type == REO2PPE || ring_type == PPE2TCL)
  1149. pld_pfrm_free_irq(soc->osdev->dev, srng->irq,
  1150. dp_get_ppe_ds_ctxt(soc));
  1151. }
  1152. }
  1153. static
  1154. int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1155. int vector, int ring_type, int ring_num)
  1156. {
  1157. int irq = -1, ret = 0;
  1158. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1159. int pci_slot = pld_get_pci_slot(soc->osdev->dev);
  1160. srng->irq = -1;
  1161. irq = pld_get_msi_irq(soc->osdev->dev, vector);
  1162. qdf_dev_set_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1163. if (ring_type == WBM2SW_RELEASE &&
  1164. ring_num == WBM2_SW_PPE_REL_RING_ID) {
  1165. snprintf(be_soc->irq_name[2], DP_PPE_INTR_STRNG_LEN,
  1166. "pci%d_ppe_wbm_rel", pci_slot);
  1167. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1168. dp_ppeds_handle_tx_comp,
  1169. IRQF_SHARED | IRQF_NO_SUSPEND,
  1170. be_soc->irq_name[2], (void *)soc);
  1171. if (ret)
  1172. goto fail;
  1173. } else if (ring_type == REO2PPE && be_soc->ppeds_int_mode_enabled) {
  1174. snprintf(be_soc->irq_name[0], DP_PPE_INTR_STRNG_LEN,
  1175. "pci%d_reo2ppe", pci_slot);
  1176. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1177. dp_ppe_ds_reo2ppe_irq_handler,
  1178. IRQF_SHARED | IRQF_NO_SUSPEND,
  1179. be_soc->irq_name[0],
  1180. dp_get_ppe_ds_ctxt(soc));
  1181. if (ret)
  1182. goto fail;
  1183. } else if (ring_type == PPE2TCL && be_soc->ppeds_int_mode_enabled) {
  1184. snprintf(be_soc->irq_name[1], DP_PPE_INTR_STRNG_LEN,
  1185. "pci%d_ppe2tcl", pci_slot);
  1186. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1187. dp_ppe_ds_ppe2tcl_irq_handler,
  1188. IRQF_NO_SUSPEND,
  1189. be_soc->irq_name[1],
  1190. dp_get_ppe_ds_ctxt(soc));
  1191. if (ret)
  1192. goto fail;
  1193. pld_pfrm_disable_irq_nosync(soc->osdev->dev, irq);
  1194. } else {
  1195. return 0;
  1196. }
  1197. srng->irq = irq;
  1198. dp_info("Registered irq %d for soc %pK ring type %d",
  1199. irq, soc, ring_type);
  1200. return 0;
  1201. fail:
  1202. dp_err("Unable to config irq : ring type %d irq %d vector %d",
  1203. ring_type, irq, vector);
  1204. qdf_dev_clear_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1205. return ret;
  1206. }
  1207. void dp_ppeds_disable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1208. {
  1209. if (srng->irq >= 0)
  1210. pld_pfrm_disable_irq_nosync(soc->osdev->dev, srng->irq);
  1211. }
  1212. void dp_ppeds_enable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1213. {
  1214. if (srng->irq >= 0)
  1215. pld_pfrm_enable_irq(soc->osdev->dev, srng->irq);
  1216. }
  1217. #endif
  1218. #ifdef NO_RX_PKT_HDR_TLV
  1219. /**
  1220. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1221. * @soc: Common DP soc handle
  1222. *
  1223. * Return: QDF_STATUS
  1224. */
  1225. static QDF_STATUS
  1226. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1227. {
  1228. int i;
  1229. int mac_id;
  1230. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1231. struct dp_srng *rx_mac_srng;
  1232. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1233. /*
  1234. * In Beryllium chipset msdu_start, mpdu_end
  1235. * and rx_attn are part of msdu_end/mpdu_start
  1236. */
  1237. htt_tlv_filter.msdu_start = 0;
  1238. htt_tlv_filter.mpdu_end = 0;
  1239. htt_tlv_filter.attention = 0;
  1240. htt_tlv_filter.mpdu_start = 1;
  1241. htt_tlv_filter.msdu_end = 1;
  1242. htt_tlv_filter.packet = 1;
  1243. htt_tlv_filter.packet_header = 0;
  1244. htt_tlv_filter.ppdu_start = 0;
  1245. htt_tlv_filter.ppdu_end = 0;
  1246. htt_tlv_filter.ppdu_end_user_stats = 0;
  1247. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1248. htt_tlv_filter.ppdu_end_status_done = 0;
  1249. htt_tlv_filter.enable_fp = 1;
  1250. htt_tlv_filter.enable_md = 0;
  1251. htt_tlv_filter.enable_md = 0;
  1252. htt_tlv_filter.enable_mo = 0;
  1253. htt_tlv_filter.fp_mgmt_filter = 0;
  1254. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1255. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1256. FILTER_DATA_DATA);
  1257. htt_tlv_filter.fp_data_filter |=
  1258. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1259. FILTER_DATA_MCAST : 0;
  1260. htt_tlv_filter.mo_mgmt_filter = 0;
  1261. htt_tlv_filter.mo_ctrl_filter = 0;
  1262. htt_tlv_filter.mo_data_filter = 0;
  1263. htt_tlv_filter.md_data_filter = 0;
  1264. htt_tlv_filter.offset_valid = true;
  1265. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1266. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1267. htt_tlv_filter.rx_msdu_start_offset = 0;
  1268. htt_tlv_filter.rx_attn_offset = 0;
  1269. /*
  1270. * For monitor mode, the packet hdr tlv is enabled later during
  1271. * filter update
  1272. */
  1273. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1274. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1275. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1276. else
  1277. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1278. /*Not subscribing rx_pkt_header*/
  1279. htt_tlv_filter.rx_header_offset = 0;
  1280. htt_tlv_filter.rx_mpdu_start_offset =
  1281. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1282. htt_tlv_filter.rx_msdu_end_offset =
  1283. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1284. dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
  1285. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1286. struct dp_pdev *pdev = soc->pdev_list[i];
  1287. if (!pdev)
  1288. continue;
  1289. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1290. int mac_for_pdev =
  1291. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1292. /*
  1293. * Obtain lmac id from pdev to access the LMAC ring
  1294. * in soc context
  1295. */
  1296. int lmac_id =
  1297. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1298. pdev->pdev_id);
  1299. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1300. if (!rx_mac_srng->hal_srng)
  1301. continue;
  1302. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1303. rx_mac_srng->hal_srng,
  1304. RXDMA_BUF, RX_DATA_BUFFER_SIZE,
  1305. &htt_tlv_filter);
  1306. }
  1307. }
  1308. return status;
  1309. }
  1310. #else
  1311. /**
  1312. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1313. * @soc: Common DP soc handle
  1314. *
  1315. * Return: QDF_STATUS
  1316. */
  1317. static QDF_STATUS
  1318. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1319. {
  1320. int i;
  1321. int mac_id;
  1322. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1323. struct dp_srng *rx_mac_srng;
  1324. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1325. /*
  1326. * In Beryllium chipset msdu_start, mpdu_end
  1327. * and rx_attn are part of msdu_end/mpdu_start
  1328. */
  1329. htt_tlv_filter.msdu_start = 0;
  1330. htt_tlv_filter.mpdu_end = 0;
  1331. htt_tlv_filter.attention = 0;
  1332. htt_tlv_filter.mpdu_start = 1;
  1333. htt_tlv_filter.msdu_end = 1;
  1334. htt_tlv_filter.packet = 1;
  1335. htt_tlv_filter.packet_header = 1;
  1336. htt_tlv_filter.ppdu_start = 0;
  1337. htt_tlv_filter.ppdu_end = 0;
  1338. htt_tlv_filter.ppdu_end_user_stats = 0;
  1339. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1340. htt_tlv_filter.ppdu_end_status_done = 0;
  1341. htt_tlv_filter.enable_fp = 1;
  1342. htt_tlv_filter.enable_md = 0;
  1343. htt_tlv_filter.enable_md = 0;
  1344. htt_tlv_filter.enable_mo = 0;
  1345. htt_tlv_filter.fp_mgmt_filter = 0;
  1346. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1347. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1348. FILTER_DATA_DATA);
  1349. htt_tlv_filter.fp_data_filter |=
  1350. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1351. FILTER_DATA_MCAST : 0;
  1352. htt_tlv_filter.mo_mgmt_filter = 0;
  1353. htt_tlv_filter.mo_ctrl_filter = 0;
  1354. htt_tlv_filter.mo_data_filter = 0;
  1355. htt_tlv_filter.md_data_filter = 0;
  1356. htt_tlv_filter.offset_valid = true;
  1357. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1358. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1359. htt_tlv_filter.rx_msdu_start_offset = 0;
  1360. htt_tlv_filter.rx_attn_offset = 0;
  1361. /*
  1362. * For monitor mode, the packet hdr tlv is enabled later during
  1363. * filter update
  1364. */
  1365. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1366. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1367. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1368. else
  1369. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1370. htt_tlv_filter.rx_header_offset =
  1371. hal_rx_pkt_tlv_offset_get(soc->hal_soc);
  1372. htt_tlv_filter.rx_mpdu_start_offset =
  1373. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1374. htt_tlv_filter.rx_msdu_end_offset =
  1375. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1376. dp_info("TLV subscription\n"
  1377. "msdu_start %d, mpdu_end %d, attention %d"
  1378. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n"
  1379. "TLV offsets\n"
  1380. "msdu_start %d, mpdu_end %d, attention %d"
  1381. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n",
  1382. htt_tlv_filter.msdu_start,
  1383. htt_tlv_filter.mpdu_end,
  1384. htt_tlv_filter.attention,
  1385. htt_tlv_filter.mpdu_start,
  1386. htt_tlv_filter.msdu_end,
  1387. htt_tlv_filter.packet_header,
  1388. htt_tlv_filter.packet,
  1389. htt_tlv_filter.rx_msdu_start_offset,
  1390. htt_tlv_filter.rx_mpdu_end_offset,
  1391. htt_tlv_filter.rx_attn_offset,
  1392. htt_tlv_filter.rx_mpdu_start_offset,
  1393. htt_tlv_filter.rx_msdu_end_offset,
  1394. htt_tlv_filter.rx_header_offset,
  1395. htt_tlv_filter.rx_packet_offset);
  1396. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1397. struct dp_pdev *pdev = soc->pdev_list[i];
  1398. if (!pdev)
  1399. continue;
  1400. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1401. int mac_for_pdev =
  1402. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1403. /*
  1404. * Obtain lmac id from pdev to access the LMAC ring
  1405. * in soc context
  1406. */
  1407. int lmac_id =
  1408. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1409. pdev->pdev_id);
  1410. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1411. if (!rx_mac_srng->hal_srng)
  1412. continue;
  1413. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1414. rx_mac_srng->hal_srng,
  1415. RXDMA_BUF, RX_DATA_BUFFER_SIZE,
  1416. &htt_tlv_filter);
  1417. }
  1418. }
  1419. return status;
  1420. }
  1421. #endif
  1422. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1423. /**
  1424. * dp_service_near_full_srngs_be() - Main bottom half callback for the
  1425. * near-full IRQs.
  1426. * @soc: Datapath SoC handle
  1427. * @int_ctx: Interrupt context
  1428. * @dp_budget: Budget of the work that can be done in the bottom half
  1429. *
  1430. * Return: work done in the handler
  1431. */
  1432. static uint32_t
  1433. dp_service_near_full_srngs_be(struct dp_soc *soc, struct dp_intr *int_ctx,
  1434. uint32_t dp_budget)
  1435. {
  1436. int ring = 0;
  1437. int budget = dp_budget;
  1438. uint32_t work_done = 0;
  1439. uint32_t remaining_quota = dp_budget;
  1440. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  1441. int tx_ring_near_full_mask = int_ctx->tx_ring_near_full_mask;
  1442. int rx_near_full_grp_1_mask = int_ctx->rx_near_full_grp_1_mask;
  1443. int rx_near_full_grp_2_mask = int_ctx->rx_near_full_grp_2_mask;
  1444. int rx_near_full_mask = rx_near_full_grp_1_mask |
  1445. rx_near_full_grp_2_mask;
  1446. dp_verbose_debug("rx_ring_near_full 0x%x tx_ring_near_full 0x%x",
  1447. rx_near_full_mask,
  1448. tx_ring_near_full_mask);
  1449. if (rx_near_full_mask) {
  1450. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1451. if (!(rx_near_full_mask & (1 << ring)))
  1452. continue;
  1453. work_done = dp_rx_nf_process(int_ctx,
  1454. soc->reo_dest_ring[ring].hal_srng,
  1455. ring, remaining_quota);
  1456. if (work_done) {
  1457. intr_stats->num_rx_ring_near_full_masks[ring]++;
  1458. dp_verbose_debug("rx NF mask 0x%x ring %d, work_done %d budget %d",
  1459. rx_near_full_mask, ring,
  1460. work_done,
  1461. budget);
  1462. budget -= work_done;
  1463. if (budget <= 0)
  1464. goto budget_done;
  1465. remaining_quota = budget;
  1466. }
  1467. }
  1468. }
  1469. if (tx_ring_near_full_mask) {
  1470. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  1471. if (!(tx_ring_near_full_mask & (1 << ring)))
  1472. continue;
  1473. work_done = dp_tx_comp_nf_handler(int_ctx, soc,
  1474. soc->tx_comp_ring[ring].hal_srng,
  1475. ring, remaining_quota);
  1476. if (work_done) {
  1477. intr_stats->num_tx_comp_ring_near_full_masks[ring]++;
  1478. dp_verbose_debug("tx NF mask 0x%x ring %d, work_done %d budget %d",
  1479. tx_ring_near_full_mask, ring,
  1480. work_done, budget);
  1481. budget -= work_done;
  1482. if (budget <= 0)
  1483. break;
  1484. remaining_quota = budget;
  1485. }
  1486. }
  1487. }
  1488. intr_stats->num_near_full_masks++;
  1489. budget_done:
  1490. return dp_budget - budget;
  1491. }
  1492. /**
  1493. * dp_srng_test_and_update_nf_params_be() - Check if the srng is in near full
  1494. * state and set the reap_limit appropriately
  1495. * as per the near full state
  1496. * @soc: Datapath soc handle
  1497. * @dp_srng: Datapath handle for SRNG
  1498. * @max_reap_limit: [Output Buffer] Buffer to set the max reap limit as per
  1499. * the srng near-full state
  1500. *
  1501. * Return: 1, if the srng is in near-full state
  1502. * 0, if the srng is not in near-full state
  1503. */
  1504. static int
  1505. dp_srng_test_and_update_nf_params_be(struct dp_soc *soc,
  1506. struct dp_srng *dp_srng,
  1507. int *max_reap_limit)
  1508. {
  1509. return _dp_srng_test_and_update_nf_params(soc, dp_srng, max_reap_limit);
  1510. }
  1511. /**
  1512. * dp_init_near_full_arch_ops_be() - Initialize the arch ops handler for the
  1513. * near full IRQ handling operations.
  1514. * @arch_ops: arch ops handle
  1515. *
  1516. * Return: none
  1517. */
  1518. static inline void
  1519. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1520. {
  1521. arch_ops->dp_service_near_full_srngs = dp_service_near_full_srngs_be;
  1522. arch_ops->dp_srng_test_and_update_nf_params =
  1523. dp_srng_test_and_update_nf_params_be;
  1524. }
  1525. #else
  1526. static inline void
  1527. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1528. {
  1529. }
  1530. #endif
  1531. static inline
  1532. QDF_STATUS dp_srng_init_be(struct dp_soc *soc, struct dp_srng *srng,
  1533. int ring_type, int ring_num, int mac_id)
  1534. {
  1535. return dp_srng_init_idx(soc, srng, ring_type, ring_num, mac_id, 0);
  1536. }
  1537. #ifdef WLAN_SUPPORT_PPEDS
  1538. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1539. {
  1540. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1541. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1542. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1543. if (!be_soc->ppeds_handle)
  1544. return;
  1545. dp_srng_deinit(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0);
  1546. wlan_minidump_remove(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1547. be_soc->ppe2tcl_ring.alloc_size,
  1548. soc->ctrl_psoc,
  1549. WLAN_MD_DP_SRNG_PPE2TCL,
  1550. "ppe2tcl_ring");
  1551. dp_srng_deinit(soc, &be_soc->reo2ppe_ring, REO2PPE, 0);
  1552. wlan_minidump_remove(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1553. be_soc->reo2ppe_ring.alloc_size,
  1554. soc->ctrl_psoc,
  1555. WLAN_MD_DP_SRNG_REO2PPE,
  1556. "reo2ppe_ring");
  1557. dp_srng_deinit(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1558. WBM2_SW_PPE_REL_RING_ID);
  1559. wlan_minidump_remove(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1560. be_soc->ppeds_wbm_release_ring.alloc_size,
  1561. soc->ctrl_psoc,
  1562. WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1563. "ppeds_wbm_release_ring");
  1564. }
  1565. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1566. {
  1567. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1568. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1569. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1570. dp_srng_free(soc, &be_soc->ppeds_wbm_release_ring);
  1571. dp_srng_free(soc, &be_soc->ppe2tcl_ring);
  1572. dp_srng_free(soc, &be_soc->reo2ppe_ring);
  1573. }
  1574. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1575. {
  1576. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1577. uint32_t entries;
  1578. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1579. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1580. if (!be_soc->ppeds_handle)
  1581. return QDF_STATUS_SUCCESS;
  1582. entries = wlan_cfg_get_dp_soc_reo2ppe_ring_size(soc_cfg_ctx);
  1583. if (dp_srng_alloc(soc, &be_soc->reo2ppe_ring, REO2PPE,
  1584. entries, 0)) {
  1585. dp_err("%pK: dp_srng_alloc failed for reo2ppe", soc);
  1586. goto fail;
  1587. }
  1588. entries = wlan_cfg_get_dp_soc_ppe2tcl_ring_size(soc_cfg_ctx);
  1589. if (dp_srng_alloc(soc, &be_soc->ppe2tcl_ring, PPE2TCL,
  1590. entries, 0)) {
  1591. dp_err("%pK: dp_srng_alloc failed for ppe2tcl_ring", soc);
  1592. goto fail;
  1593. }
  1594. entries = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  1595. if (dp_srng_alloc(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1596. entries, 1)) {
  1597. dp_err("%pK: dp_srng_alloc failed for ppeds_wbm_release_ring",
  1598. soc);
  1599. goto fail;
  1600. }
  1601. return QDF_STATUS_SUCCESS;
  1602. fail:
  1603. dp_soc_ppeds_srng_free(soc);
  1604. return QDF_STATUS_E_NOMEM;
  1605. }
  1606. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1607. {
  1608. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1609. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1610. hal_soc_handle_t hal_soc = soc->hal_soc;
  1611. struct dp_ppe_ds_idxs idx = {0};
  1612. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1613. if (!be_soc->ppeds_handle)
  1614. return QDF_STATUS_SUCCESS;
  1615. if (dp_ppeds_register_soc_be(be_soc, &idx)) {
  1616. dp_err("%pK: ppeds registration failed", soc);
  1617. goto fail;
  1618. }
  1619. if (dp_srng_init_idx(soc, &be_soc->reo2ppe_ring, REO2PPE, 0, 0,
  1620. idx.reo2ppe_start_idx)) {
  1621. dp_err("%pK: dp_srng_init failed for reo2ppe", soc);
  1622. goto fail;
  1623. }
  1624. wlan_minidump_log(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1625. be_soc->reo2ppe_ring.alloc_size,
  1626. soc->ctrl_psoc,
  1627. WLAN_MD_DP_SRNG_REO2PPE,
  1628. "reo2ppe_ring");
  1629. hal_reo_config_reo2ppe_dest_info(hal_soc);
  1630. if (dp_srng_init_idx(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0, 0,
  1631. idx.ppe2tcl_start_idx)) {
  1632. dp_err("%pK: dp_srng_init failed for ppe2tcl_ring", soc);
  1633. goto fail;
  1634. }
  1635. wlan_minidump_log(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1636. be_soc->ppe2tcl_ring.alloc_size,
  1637. soc->ctrl_psoc,
  1638. WLAN_MD_DP_SRNG_PPE2TCL,
  1639. "ppe2tcl_ring");
  1640. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  1641. be_soc->ppe2tcl_ring.hal_srng,
  1642. WBM2_SW_PPE_REL_MAP_ID);
  1643. if (dp_srng_init(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1644. WBM2_SW_PPE_REL_RING_ID, 0)) {
  1645. dp_err("%pK: dp_srng_init failed for ppeds_wbm_release_ring",
  1646. soc);
  1647. goto fail;
  1648. }
  1649. wlan_minidump_log(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1650. be_soc->ppeds_wbm_release_ring.alloc_size,
  1651. soc->ctrl_psoc, WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1652. "ppeds_wbm_release_ring");
  1653. return QDF_STATUS_SUCCESS;
  1654. fail:
  1655. dp_soc_ppeds_srng_deinit(soc);
  1656. return QDF_STATUS_E_NOMEM;
  1657. }
  1658. #else
  1659. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1660. {
  1661. }
  1662. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1663. {
  1664. }
  1665. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1666. {
  1667. return QDF_STATUS_SUCCESS;
  1668. }
  1669. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1670. {
  1671. return QDF_STATUS_SUCCESS;
  1672. }
  1673. #endif
  1674. static void dp_soc_srng_deinit_be(struct dp_soc *soc)
  1675. {
  1676. uint32_t i;
  1677. dp_soc_ppeds_srng_deinit(soc);
  1678. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1679. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1680. dp_srng_deinit(soc, &soc->rx_refill_buf_ring[i],
  1681. RXDMA_BUF, 0);
  1682. }
  1683. }
  1684. }
  1685. static void dp_soc_srng_free_be(struct dp_soc *soc)
  1686. {
  1687. uint32_t i;
  1688. dp_soc_ppeds_srng_free(soc);
  1689. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1690. for (i = 0; i < soc->num_rx_refill_buf_rings; i++)
  1691. dp_srng_free(soc, &soc->rx_refill_buf_ring[i]);
  1692. }
  1693. }
  1694. static QDF_STATUS dp_soc_srng_alloc_be(struct dp_soc *soc)
  1695. {
  1696. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1697. uint32_t ring_size;
  1698. uint32_t i;
  1699. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1700. ring_size = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  1701. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1702. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1703. if (dp_srng_alloc(soc, &soc->rx_refill_buf_ring[i],
  1704. RXDMA_BUF, ring_size, 0)) {
  1705. dp_err("%pK: dp_srng_alloc failed refill ring",
  1706. soc);
  1707. goto fail;
  1708. }
  1709. }
  1710. }
  1711. if (dp_soc_ppeds_srng_alloc(soc)) {
  1712. dp_err("%pK: ppe rings alloc failed",
  1713. soc);
  1714. goto fail;
  1715. }
  1716. return QDF_STATUS_SUCCESS;
  1717. fail:
  1718. dp_soc_srng_free_be(soc);
  1719. return QDF_STATUS_E_NOMEM;
  1720. }
  1721. static QDF_STATUS dp_soc_srng_init_be(struct dp_soc *soc)
  1722. {
  1723. int i = 0;
  1724. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1725. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1726. if (dp_srng_init(soc, &soc->rx_refill_buf_ring[i],
  1727. RXDMA_BUF, 0, 0)) {
  1728. dp_err("%pK: dp_srng_init failed refill ring",
  1729. soc);
  1730. goto fail;
  1731. }
  1732. }
  1733. }
  1734. if (dp_soc_ppeds_srng_init(soc)) {
  1735. dp_err("%pK: ppe ds rings init failed",
  1736. soc);
  1737. goto fail;
  1738. }
  1739. return QDF_STATUS_SUCCESS;
  1740. fail:
  1741. dp_soc_srng_deinit_be(soc);
  1742. return QDF_STATUS_E_NOMEM;
  1743. }
  1744. #ifdef WLAN_FEATURE_11BE_MLO
  1745. static inline unsigned
  1746. dp_mlo_peer_find_hash_index(dp_mld_peer_hash_obj_t mld_hash_obj,
  1747. union dp_align_mac_addr *mac_addr)
  1748. {
  1749. uint32_t index;
  1750. index =
  1751. mac_addr->align2.bytes_ab ^
  1752. mac_addr->align2.bytes_cd ^
  1753. mac_addr->align2.bytes_ef;
  1754. index ^= index >> mld_hash_obj->mld_peer_hash.idx_bits;
  1755. index &= mld_hash_obj->mld_peer_hash.mask;
  1756. return index;
  1757. }
  1758. QDF_STATUS
  1759. dp_mlo_peer_find_hash_attach_be(dp_mld_peer_hash_obj_t mld_hash_obj,
  1760. int hash_elems)
  1761. {
  1762. int i, log2;
  1763. if (!mld_hash_obj)
  1764. return QDF_STATUS_E_FAILURE;
  1765. hash_elems *= DP_PEER_HASH_LOAD_MULT;
  1766. hash_elems >>= DP_PEER_HASH_LOAD_SHIFT;
  1767. log2 = dp_log2_ceil(hash_elems);
  1768. hash_elems = 1 << log2;
  1769. mld_hash_obj->mld_peer_hash.mask = hash_elems - 1;
  1770. mld_hash_obj->mld_peer_hash.idx_bits = log2;
  1771. /* allocate an array of TAILQ peer object lists */
  1772. mld_hash_obj->mld_peer_hash.bins = qdf_mem_malloc(
  1773. hash_elems * sizeof(TAILQ_HEAD(anonymous_tail_q, dp_peer)));
  1774. if (!mld_hash_obj->mld_peer_hash.bins)
  1775. return QDF_STATUS_E_NOMEM;
  1776. for (i = 0; i < hash_elems; i++)
  1777. TAILQ_INIT(&mld_hash_obj->mld_peer_hash.bins[i]);
  1778. qdf_spinlock_create(&mld_hash_obj->mld_peer_hash_lock);
  1779. return QDF_STATUS_SUCCESS;
  1780. }
  1781. void
  1782. dp_mlo_peer_find_hash_detach_be(dp_mld_peer_hash_obj_t mld_hash_obj)
  1783. {
  1784. if (!mld_hash_obj)
  1785. return;
  1786. if (mld_hash_obj->mld_peer_hash.bins) {
  1787. qdf_mem_free(mld_hash_obj->mld_peer_hash.bins);
  1788. mld_hash_obj->mld_peer_hash.bins = NULL;
  1789. qdf_spinlock_destroy(&mld_hash_obj->mld_peer_hash_lock);
  1790. }
  1791. }
  1792. #ifdef WLAN_MLO_MULTI_CHIP
  1793. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  1794. {
  1795. /* In case of MULTI chip MLO peer hash table when MLO global object
  1796. * is created, avoid from SOC attach path
  1797. */
  1798. return QDF_STATUS_SUCCESS;
  1799. }
  1800. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  1801. {
  1802. }
  1803. #else
  1804. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  1805. {
  1806. dp_mld_peer_hash_obj_t mld_hash_obj;
  1807. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1808. if (!mld_hash_obj)
  1809. return QDF_STATUS_E_FAILURE;
  1810. return dp_mlo_peer_find_hash_attach_be(mld_hash_obj, soc->max_peers);
  1811. }
  1812. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  1813. {
  1814. dp_mld_peer_hash_obj_t mld_hash_obj;
  1815. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1816. if (!mld_hash_obj)
  1817. return;
  1818. return dp_mlo_peer_find_hash_detach_be(mld_hash_obj);
  1819. }
  1820. #endif
  1821. #ifdef QCA_ENHANCED_STATS_SUPPORT
  1822. static uint8_t
  1823. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  1824. {
  1825. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  1826. return be_pdev->mlo_link_id;
  1827. }
  1828. #else
  1829. static uint8_t
  1830. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  1831. {
  1832. return 0;
  1833. }
  1834. #endif /* QCA_ENHANCED_STATS_SUPPORT */
  1835. static struct dp_peer *
  1836. dp_mlo_peer_find_hash_find_be(struct dp_soc *soc,
  1837. uint8_t *peer_mac_addr,
  1838. int mac_addr_is_aligned,
  1839. enum dp_mod_id mod_id,
  1840. uint8_t vdev_id)
  1841. {
  1842. union dp_align_mac_addr local_mac_addr_aligned, *mac_addr;
  1843. uint32_t index;
  1844. struct dp_peer *peer;
  1845. struct dp_vdev *vdev;
  1846. dp_mld_peer_hash_obj_t mld_hash_obj;
  1847. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1848. if (!mld_hash_obj)
  1849. return NULL;
  1850. if (!mld_hash_obj->mld_peer_hash.bins)
  1851. return NULL;
  1852. if (mac_addr_is_aligned) {
  1853. mac_addr = (union dp_align_mac_addr *)peer_mac_addr;
  1854. } else {
  1855. qdf_mem_copy(
  1856. &local_mac_addr_aligned.raw[0],
  1857. peer_mac_addr, QDF_MAC_ADDR_SIZE);
  1858. mac_addr = &local_mac_addr_aligned;
  1859. }
  1860. if (vdev_id != DP_VDEV_ALL) {
  1861. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, mod_id);
  1862. if (!vdev) {
  1863. dp_err("vdev is null");
  1864. return NULL;
  1865. }
  1866. } else {
  1867. vdev = NULL;
  1868. }
  1869. /* search mld peer table if no link peer for given mac address */
  1870. index = dp_mlo_peer_find_hash_index(mld_hash_obj, mac_addr);
  1871. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1872. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  1873. hash_list_elem) {
  1874. if (dp_peer_find_mac_addr_cmp(mac_addr, &peer->mac_addr) == 0) {
  1875. if ((vdev_id == DP_VDEV_ALL) || (
  1876. dp_peer_find_mac_addr_cmp(
  1877. &peer->vdev->mld_mac_addr,
  1878. &vdev->mld_mac_addr) == 0)) {
  1879. /* take peer reference before returning */
  1880. if (dp_peer_get_ref(NULL, peer, mod_id) !=
  1881. QDF_STATUS_SUCCESS)
  1882. peer = NULL;
  1883. if (vdev)
  1884. dp_vdev_unref_delete(soc, vdev, mod_id);
  1885. qdf_spin_unlock_bh(
  1886. &mld_hash_obj->mld_peer_hash_lock);
  1887. return peer;
  1888. }
  1889. }
  1890. }
  1891. if (vdev)
  1892. dp_vdev_unref_delete(soc, vdev, mod_id);
  1893. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1894. return NULL; /* failure */
  1895. }
  1896. static void
  1897. dp_mlo_peer_find_hash_remove_be(struct dp_soc *soc, struct dp_peer *peer)
  1898. {
  1899. uint32_t index;
  1900. struct dp_peer *tmppeer = NULL;
  1901. int found = 0;
  1902. dp_mld_peer_hash_obj_t mld_hash_obj;
  1903. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1904. if (!mld_hash_obj)
  1905. return;
  1906. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  1907. QDF_ASSERT(!TAILQ_EMPTY(&mld_hash_obj->mld_peer_hash.bins[index]));
  1908. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1909. TAILQ_FOREACH(tmppeer, &mld_hash_obj->mld_peer_hash.bins[index],
  1910. hash_list_elem) {
  1911. if (tmppeer == peer) {
  1912. found = 1;
  1913. break;
  1914. }
  1915. }
  1916. QDF_ASSERT(found);
  1917. TAILQ_REMOVE(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  1918. hash_list_elem);
  1919. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") removed. (found %u)",
  1920. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw), found);
  1921. dp_peer_unref_delete(peer, DP_MOD_ID_CONFIG);
  1922. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1923. }
  1924. static void
  1925. dp_mlo_peer_find_hash_add_be(struct dp_soc *soc, struct dp_peer *peer)
  1926. {
  1927. uint32_t index;
  1928. dp_mld_peer_hash_obj_t mld_hash_obj;
  1929. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1930. if (!mld_hash_obj)
  1931. return;
  1932. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  1933. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1934. if (QDF_IS_STATUS_ERROR(dp_peer_get_ref(NULL, peer,
  1935. DP_MOD_ID_CONFIG))) {
  1936. dp_err("fail to get peer ref:" QDF_MAC_ADDR_FMT,
  1937. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1938. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1939. return;
  1940. }
  1941. TAILQ_INSERT_TAIL(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  1942. hash_list_elem);
  1943. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1944. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") added",
  1945. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1946. }
  1947. void dp_print_mlo_ast_stats_be(struct dp_soc *soc)
  1948. {
  1949. uint32_t index;
  1950. struct dp_peer *peer;
  1951. dp_mld_peer_hash_obj_t mld_hash_obj;
  1952. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1953. if (!mld_hash_obj)
  1954. return;
  1955. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1956. for (index = 0; index < mld_hash_obj->mld_peer_hash.mask; index++) {
  1957. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  1958. hash_list_elem) {
  1959. dp_print_peer_ast_entries(soc, peer, NULL);
  1960. }
  1961. }
  1962. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1963. }
  1964. #endif
  1965. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  1966. static void dp_reconfig_tx_vdev_mcast_ctrl_be(struct dp_soc *soc,
  1967. struct dp_vdev *vdev)
  1968. {
  1969. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1970. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1971. hal_soc_handle_t hal_soc = soc->hal_soc;
  1972. uint8_t vdev_id = vdev->vdev_id;
  1973. if (vdev->opmode == wlan_op_mode_sta) {
  1974. if (vdev->pdev->isolation)
  1975. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  1976. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1977. else
  1978. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  1979. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  1980. } else if (vdev->opmode == wlan_op_mode_ap) {
  1981. hal_tx_mcast_mlo_reinject_routing_set(
  1982. hal_soc,
  1983. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  1984. if (vdev->mlo_vdev) {
  1985. hal_tx_vdev_mcast_ctrl_set(
  1986. hal_soc,
  1987. vdev_id,
  1988. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  1989. } else {
  1990. hal_tx_vdev_mcast_ctrl_set(hal_soc,
  1991. vdev_id,
  1992. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1993. }
  1994. }
  1995. }
  1996. static void dp_bank_reconfig_be(struct dp_soc *soc, struct dp_vdev *vdev)
  1997. {
  1998. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1999. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2000. union hal_tx_bank_config *bank_config;
  2001. if (!be_vdev || be_vdev->bank_id == DP_BE_INVALID_BANK_ID)
  2002. return;
  2003. bank_config = &be_soc->bank_profiles[be_vdev->bank_id].bank_config;
  2004. hal_tx_populate_bank_register(be_soc->soc.hal_soc, bank_config,
  2005. be_vdev->bank_id);
  2006. }
  2007. #endif
  2008. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  2009. defined(WLAN_MCAST_MLO)
  2010. static void dp_mlo_mcast_reset_pri_mcast(struct dp_vdev_be *be_vdev,
  2011. struct dp_vdev *ptnr_vdev,
  2012. void *arg)
  2013. {
  2014. struct dp_vdev_be *be_ptnr_vdev =
  2015. dp_get_be_vdev_from_dp_vdev(ptnr_vdev);
  2016. be_ptnr_vdev->mcast_primary = false;
  2017. }
  2018. #if defined(CONFIG_MLO_SINGLE_DEV)
  2019. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2020. struct dp_vdev *vdev,
  2021. cdp_config_param_type val)
  2022. {
  2023. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2024. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2025. be_vdev->vdev.pdev->soc);
  2026. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2027. vdev->mlo_vdev = true;
  2028. if (be_vdev->mcast_primary) {
  2029. struct cdp_txrx_peer_params_update params = {0};
  2030. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2031. dp_mlo_mcast_reset_pri_mcast,
  2032. (void *)&be_vdev->mcast_primary,
  2033. DP_MOD_ID_TX_MCAST);
  2034. params.chip_id = be_soc->mlo_chip_id;
  2035. params.pdev_id = be_vdev->vdev.pdev->pdev_id;
  2036. params.osif_vdev = be_vdev->vdev.osif_vdev;
  2037. dp_wdi_event_handler(
  2038. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2039. be_vdev->vdev.pdev->soc,
  2040. (void *)&params, CDP_INVALID_PEER,
  2041. WDI_NO_VAL, params.pdev_id);
  2042. }
  2043. }
  2044. static
  2045. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2046. struct dp_peer *peer,
  2047. struct cdp_vdev_stats **vdev_stats)
  2048. {
  2049. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2050. if (!IS_DP_LEGACY_PEER(peer))
  2051. *vdev_stats = &be_vdev->mlo_stats;
  2052. }
  2053. #else
  2054. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2055. struct dp_vdev *vdev,
  2056. cdp_config_param_type val)
  2057. {
  2058. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2059. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2060. be_vdev->vdev.pdev->soc);
  2061. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2062. vdev->mlo_vdev = true;
  2063. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2064. vdev->vdev_id,
  2065. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  2066. if (be_vdev->mcast_primary) {
  2067. struct cdp_txrx_peer_params_update params = {0};
  2068. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2069. dp_mlo_mcast_reset_pri_mcast,
  2070. (void *)&be_vdev->mcast_primary,
  2071. DP_MOD_ID_TX_MCAST);
  2072. params.chip_id = be_soc->mlo_chip_id;
  2073. params.pdev_id = vdev->pdev->pdev_id;
  2074. params.osif_vdev = vdev->osif_vdev;
  2075. dp_wdi_event_handler(
  2076. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2077. vdev->pdev->soc,
  2078. (void *)&params, CDP_INVALID_PEER,
  2079. WDI_NO_VAL, params.pdev_id);
  2080. }
  2081. }
  2082. #endif
  2083. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2084. struct dp_vdev *vdev,
  2085. cdp_config_param_type val)
  2086. {
  2087. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2088. be_vdev->mcast_primary = false;
  2089. vdev->mlo_vdev = false;
  2090. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2091. vdev->vdev_id,
  2092. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2093. }
  2094. /**
  2095. * dp_txrx_get_vdev_mcast_param_be() - Target specific ops for getting vdev
  2096. * params related to multicast
  2097. * @soc: DP soc handle
  2098. * @vdev: pointer to vdev structure
  2099. * @val: buffer address
  2100. *
  2101. * Return: QDF_STATUS
  2102. */
  2103. static
  2104. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2105. struct dp_vdev *vdev,
  2106. cdp_config_param_type *val)
  2107. {
  2108. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2109. if (be_vdev->mcast_primary)
  2110. val->cdp_vdev_param_mcast_vdev = true;
  2111. else
  2112. val->cdp_vdev_param_mcast_vdev = false;
  2113. return QDF_STATUS_SUCCESS;
  2114. }
  2115. #else
  2116. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2117. struct dp_vdev *vdev,
  2118. cdp_config_param_type val)
  2119. {
  2120. }
  2121. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2122. struct dp_vdev *vdev,
  2123. cdp_config_param_type val)
  2124. {
  2125. }
  2126. static
  2127. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2128. struct dp_vdev *vdev,
  2129. cdp_config_param_type *val)
  2130. {
  2131. return QDF_STATUS_SUCCESS;
  2132. }
  2133. static
  2134. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2135. struct dp_peer *peer,
  2136. struct cdp_vdev_stats **vdev_stats)
  2137. {
  2138. }
  2139. #endif
  2140. #ifdef DP_TX_IMPLICIT_RBM_MAPPING
  2141. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2142. uint8_t tx_ring_id,
  2143. uint8_t bm_id)
  2144. {
  2145. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  2146. soc->tcl_data_ring[tx_ring_id].hal_srng,
  2147. bm_id);
  2148. }
  2149. #else
  2150. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2151. uint8_t tx_ring_id,
  2152. uint8_t bm_id)
  2153. {
  2154. }
  2155. #endif
  2156. /**
  2157. * dp_txrx_set_vdev_param_be() - Target specific ops while setting vdev params
  2158. * @soc: DP soc handle
  2159. * @vdev: pointer to vdev structure
  2160. * @param: parameter type to get value
  2161. * @val: value
  2162. *
  2163. * Return: QDF_STATUS
  2164. */
  2165. static
  2166. QDF_STATUS dp_txrx_set_vdev_param_be(struct dp_soc *soc,
  2167. struct dp_vdev *vdev,
  2168. enum cdp_vdev_param_type param,
  2169. cdp_config_param_type val)
  2170. {
  2171. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2172. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2173. switch (param) {
  2174. case CDP_TX_ENCAP_TYPE:
  2175. case CDP_UPDATE_DSCP_TO_TID_MAP:
  2176. case CDP_UPDATE_TDLS_FLAGS:
  2177. dp_tx_update_bank_profile(be_soc, be_vdev);
  2178. break;
  2179. case CDP_ENABLE_CIPHER:
  2180. if (vdev->tx_encap_type == htt_cmn_pkt_type_raw)
  2181. dp_tx_update_bank_profile(be_soc, be_vdev);
  2182. break;
  2183. case CDP_SET_MCAST_VDEV:
  2184. dp_txrx_set_mlo_mcast_primary_vdev_param_be(vdev, val);
  2185. break;
  2186. case CDP_RESET_MLO_MCAST_VDEV:
  2187. dp_txrx_reset_mlo_mcast_primary_vdev_param_be(vdev, val);
  2188. break;
  2189. default:
  2190. dp_warn("invalid param %d", param);
  2191. break;
  2192. }
  2193. return QDF_STATUS_SUCCESS;
  2194. }
  2195. #ifdef WLAN_FEATURE_11BE_MLO
  2196. #ifdef DP_USE_REDUCED_PEER_ID_FIELD_WIDTH
  2197. static inline void
  2198. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2199. {
  2200. soc->peer_id_shift = dp_log2_ceil(soc->max_peers);
  2201. soc->peer_id_mask = (1 << soc->peer_id_shift) - 1;
  2202. /*
  2203. * Double the peers since we use ML indication bit
  2204. * alongwith peer_id to find peers.
  2205. */
  2206. soc->max_peer_id = 1 << (soc->peer_id_shift + 1);
  2207. }
  2208. #else
  2209. static inline void
  2210. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2211. {
  2212. soc->max_peer_id =
  2213. (1 << (HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_S + 1)) - 1;
  2214. }
  2215. #endif /* DP_USE_REDUCED_PEER_ID_FIELD_WIDTH */
  2216. #else
  2217. static inline void
  2218. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2219. {
  2220. soc->max_peer_id = soc->max_peers;
  2221. }
  2222. #endif /* WLAN_FEATURE_11BE_MLO */
  2223. static void dp_peer_map_detach_be(struct dp_soc *soc)
  2224. {
  2225. if (soc->host_ast_db_enable)
  2226. dp_peer_ast_hash_detach(soc);
  2227. }
  2228. static QDF_STATUS dp_peer_map_attach_be(struct dp_soc *soc)
  2229. {
  2230. QDF_STATUS status;
  2231. if (soc->host_ast_db_enable) {
  2232. status = dp_peer_ast_hash_attach(soc);
  2233. if (QDF_IS_STATUS_ERROR(status))
  2234. return status;
  2235. }
  2236. dp_soc_max_peer_id_set(soc);
  2237. return QDF_STATUS_SUCCESS;
  2238. }
  2239. static struct dp_peer *dp_find_peer_by_destmac_be(struct dp_soc *soc,
  2240. uint8_t *dest_mac,
  2241. uint8_t vdev_id)
  2242. {
  2243. struct dp_peer *peer = NULL;
  2244. struct dp_peer *tgt_peer = NULL;
  2245. struct dp_ast_entry *ast_entry = NULL;
  2246. uint16_t peer_id;
  2247. qdf_spin_lock_bh(&soc->ast_lock);
  2248. ast_entry = dp_peer_ast_hash_find_soc(soc, dest_mac);
  2249. if (!ast_entry) {
  2250. qdf_spin_unlock_bh(&soc->ast_lock);
  2251. dp_err("NULL ast entry");
  2252. return NULL;
  2253. }
  2254. peer_id = ast_entry->peer_id;
  2255. qdf_spin_unlock_bh(&soc->ast_lock);
  2256. if (peer_id == HTT_INVALID_PEER)
  2257. return NULL;
  2258. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_SAWF);
  2259. if (!peer) {
  2260. dp_err("NULL peer for peer_id:%d", peer_id);
  2261. return NULL;
  2262. }
  2263. tgt_peer = dp_get_tgt_peer_from_peer(peer);
  2264. /*
  2265. * Once tgt_peer is obtained,
  2266. * release the ref taken for original peer.
  2267. */
  2268. dp_peer_get_ref(NULL, tgt_peer, DP_MOD_ID_SAWF);
  2269. dp_peer_unref_delete(peer, DP_MOD_ID_SAWF);
  2270. return tgt_peer;
  2271. }
  2272. #ifdef WLAN_FEATURE_11BE_MLO
  2273. #ifdef WLAN_MCAST_MLO
  2274. static inline void
  2275. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2276. {
  2277. arch_ops->dp_tx_mcast_handler = dp_tx_mlo_mcast_handler_be;
  2278. arch_ops->dp_rx_mcast_handler = dp_rx_mlo_igmp_handler;
  2279. arch_ops->dp_tx_is_mcast_primary = dp_tx_mlo_is_mcast_primary_be;
  2280. }
  2281. #else /* WLAN_MCAST_MLO */
  2282. static inline void
  2283. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2284. {
  2285. }
  2286. #endif /* WLAN_MCAST_MLO */
  2287. #ifdef WLAN_MLO_MULTI_CHIP
  2288. static inline void
  2289. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2290. {
  2291. arch_ops->dp_partner_chips_map = dp_mlo_partner_chips_map;
  2292. arch_ops->dp_partner_chips_unmap = dp_mlo_partner_chips_unmap;
  2293. arch_ops->dp_soc_get_by_idle_bm_id = dp_soc_get_by_idle_bm_id;
  2294. }
  2295. #else
  2296. static inline void
  2297. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2298. {
  2299. }
  2300. #endif
  2301. static inline void
  2302. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2303. {
  2304. dp_initialize_arch_ops_be_mcast_mlo(arch_ops);
  2305. dp_initialize_arch_ops_be_mlo_multi_chip(arch_ops);
  2306. arch_ops->mlo_peer_find_hash_detach =
  2307. dp_mlo_peer_find_hash_detach_wrapper;
  2308. arch_ops->mlo_peer_find_hash_attach =
  2309. dp_mlo_peer_find_hash_attach_wrapper;
  2310. arch_ops->mlo_peer_find_hash_add = dp_mlo_peer_find_hash_add_be;
  2311. arch_ops->mlo_peer_find_hash_remove = dp_mlo_peer_find_hash_remove_be;
  2312. arch_ops->mlo_peer_find_hash_find = dp_mlo_peer_find_hash_find_be;
  2313. arch_ops->get_hw_link_id = dp_get_hw_link_id_be;
  2314. }
  2315. #else /* WLAN_FEATURE_11BE_MLO */
  2316. static inline void
  2317. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2318. {
  2319. }
  2320. #endif /* WLAN_FEATURE_11BE_MLO */
  2321. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  2322. #define DP_LMAC_PEER_ID_MSB_LEGACY 2
  2323. #define DP_LMAC_PEER_ID_MSB_MLO 3
  2324. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2325. struct cdp_peer_setup_info *setup_info,
  2326. enum cdp_host_reo_dest_ring *reo_dest,
  2327. bool *hash_based,
  2328. uint8_t *lmac_peer_id_msb)
  2329. {
  2330. struct dp_soc *soc = vdev->pdev->soc;
  2331. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2332. if (!be_soc->mlo_enabled)
  2333. return dp_vdev_get_default_reo_hash(vdev, reo_dest,
  2334. hash_based);
  2335. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2336. *reo_dest = vdev->pdev->reo_dest;
  2337. /* Not a ML link peer use non-mlo */
  2338. if (!setup_info) {
  2339. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2340. return;
  2341. }
  2342. /* For STA ML VAP we do not have num links info at this point
  2343. * use MLO case always
  2344. */
  2345. if (vdev->opmode == wlan_op_mode_sta) {
  2346. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2347. return;
  2348. }
  2349. /* For AP ML VAP consider the peer as ML only it associates with
  2350. * multiple links
  2351. */
  2352. if (setup_info->num_links == 1) {
  2353. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2354. return;
  2355. }
  2356. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2357. }
  2358. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2359. uint32_t *remap0,
  2360. uint32_t *remap1,
  2361. uint32_t *remap2)
  2362. {
  2363. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2364. uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
  2365. uint32_t reo_mlo_config =
  2366. wlan_cfg_mlo_rx_ring_map_get(soc->wlan_cfg_ctx);
  2367. if (!be_soc->mlo_enabled)
  2368. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  2369. *remap0 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  2370. *remap1 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_config);
  2371. *remap2 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  2372. return true;
  2373. }
  2374. #else
  2375. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2376. struct cdp_peer_setup_info *setup_info,
  2377. enum cdp_host_reo_dest_ring *reo_dest,
  2378. bool *hash_based,
  2379. uint8_t *lmac_peer_id_msb)
  2380. {
  2381. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  2382. }
  2383. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2384. uint32_t *remap0,
  2385. uint32_t *remap1,
  2386. uint32_t *remap2)
  2387. {
  2388. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  2389. }
  2390. #endif
  2391. #ifdef CONFIG_MLO_SINGLE_DEV
  2392. static inline
  2393. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  2394. {
  2395. arch_ops->dp_tx_mlo_mcast_send = dp_tx_mlo_mcast_send_be;
  2396. }
  2397. #else
  2398. static inline
  2399. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  2400. {
  2401. }
  2402. #endif
  2403. #ifdef IPA_OFFLOAD
  2404. static int8_t dp_ipa_get_bank_id_be(struct dp_soc *soc)
  2405. {
  2406. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2407. return be_soc->ipa_bank_id;
  2408. }
  2409. #ifdef QCA_IPA_LL_TX_FLOW_CONTROL
  2410. static void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  2411. {
  2412. *wdi_ver = IPA_WDI_4;
  2413. }
  2414. #else
  2415. static inline void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  2416. {
  2417. }
  2418. #endif
  2419. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  2420. {
  2421. arch_ops->ipa_get_bank_id = dp_ipa_get_bank_id_be;
  2422. arch_ops->ipa_get_wdi_ver = dp_ipa_get_wdi_version_be;
  2423. }
  2424. #else /* !IPA_OFFLOAD */
  2425. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  2426. {
  2427. }
  2428. #endif /* IPA_OFFLOAD */
  2429. void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
  2430. {
  2431. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2432. arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_be;
  2433. arch_ops->dp_rx_process = dp_rx_process_be;
  2434. arch_ops->dp_tx_send_fast = dp_tx_fast_send_be;
  2435. arch_ops->tx_comp_get_params_from_hal_desc =
  2436. dp_tx_comp_get_params_from_hal_desc_be;
  2437. arch_ops->dp_tx_process_htt_completion =
  2438. dp_tx_process_htt_completion_be;
  2439. arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_be;
  2440. arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_be;
  2441. arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_be;
  2442. arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_be;
  2443. arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_be;
  2444. arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_be;
  2445. arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
  2446. dp_wbm_get_rx_desc_from_hal_desc_be;
  2447. arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_be;
  2448. arch_ops->dp_rx_chain_msdus = dp_rx_chain_msdus_be;
  2449. arch_ops->dp_rx_wbm_err_reap_desc = dp_rx_wbm_err_reap_desc_be;
  2450. arch_ops->dp_rx_null_q_desc_handle = dp_rx_null_q_desc_handle_be;
  2451. #endif
  2452. arch_ops->txrx_get_context_size = dp_get_context_size_be;
  2453. #ifdef WIFI_MONITOR_SUPPORT
  2454. arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_be;
  2455. #endif
  2456. arch_ops->dp_rx_desc_cookie_2_va =
  2457. dp_rx_desc_cookie_2_va_be;
  2458. arch_ops->dp_rx_intrabss_mcast_handler =
  2459. dp_rx_intrabss_mcast_handler_be;
  2460. arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_be;
  2461. arch_ops->txrx_soc_attach = dp_soc_attach_be;
  2462. arch_ops->txrx_soc_detach = dp_soc_detach_be;
  2463. arch_ops->txrx_soc_init = dp_soc_init_be;
  2464. arch_ops->txrx_soc_deinit = dp_soc_deinit_be_wrapper;
  2465. arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_be;
  2466. arch_ops->txrx_soc_srng_init = dp_soc_srng_init_be;
  2467. arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_be;
  2468. arch_ops->txrx_soc_srng_free = dp_soc_srng_free_be;
  2469. arch_ops->txrx_pdev_attach = dp_pdev_attach_be;
  2470. arch_ops->txrx_pdev_detach = dp_pdev_detach_be;
  2471. arch_ops->txrx_vdev_attach = dp_vdev_attach_be;
  2472. arch_ops->txrx_vdev_detach = dp_vdev_detach_be;
  2473. arch_ops->txrx_peer_setup = dp_peer_setup_be;
  2474. arch_ops->txrx_peer_map_attach = dp_peer_map_attach_be;
  2475. arch_ops->txrx_peer_map_detach = dp_peer_map_detach_be;
  2476. arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_be;
  2477. arch_ops->dp_rx_peer_metadata_peer_id_get =
  2478. dp_rx_peer_metadata_peer_id_get_be;
  2479. arch_ops->soc_cfg_attach = dp_soc_cfg_attach_be;
  2480. arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_be;
  2481. arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_be;
  2482. dp_initialize_arch_ops_be_mlo(arch_ops);
  2483. #ifdef WLAN_MLO_MULTI_CHIP
  2484. arch_ops->dp_get_soc_by_chip_id = dp_get_soc_by_chip_id_be;
  2485. #endif
  2486. arch_ops->dp_soc_get_num_soc = dp_soc_get_num_soc_be;
  2487. arch_ops->dp_peer_rx_reorder_queue_setup =
  2488. dp_peer_rx_reorder_queue_setup_be;
  2489. arch_ops->dp_rx_peer_set_link_id = dp_rx_set_link_id_be;
  2490. arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_be;
  2491. arch_ops->dp_find_peer_by_destmac = dp_find_peer_by_destmac_be;
  2492. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  2493. arch_ops->dp_bank_reconfig = dp_bank_reconfig_be;
  2494. arch_ops->dp_reconfig_tx_vdev_mcast_ctrl =
  2495. dp_reconfig_tx_vdev_mcast_ctrl_be;
  2496. arch_ops->dp_cc_reg_cfg_init = dp_cc_reg_cfg_init;
  2497. #endif
  2498. #ifdef WLAN_SUPPORT_PPEDS
  2499. arch_ops->ppeds_handle_attached = dp_ppeds_handle_attached;
  2500. arch_ops->dp_txrx_ppeds_rings_status = dp_ppeds_rings_status;
  2501. arch_ops->txrx_soc_ppeds_start = dp_ppeds_start_soc_be;
  2502. arch_ops->txrx_soc_ppeds_stop = dp_ppeds_stop_soc_be;
  2503. arch_ops->dp_register_ppeds_interrupts = dp_register_ppeds_interrupts;
  2504. arch_ops->dp_free_ppeds_interrupts = dp_free_ppeds_interrupts;
  2505. arch_ops->dp_tx_ppeds_inuse_desc = dp_ppeds_inuse_desc;
  2506. arch_ops->dp_ppeds_clear_stats = dp_ppeds_clear_stats;
  2507. arch_ops->dp_txrx_ppeds_rings_stats = dp_ppeds_rings_stats;
  2508. arch_ops->dp_txrx_ppeds_clear_rings_stats = dp_ppeds_clear_rings_stats;
  2509. arch_ops->dp_tx_ppeds_cfg_astidx_cache_mapping =
  2510. dp_tx_ppeds_cfg_astidx_cache_mapping;
  2511. #ifdef DP_UMAC_HW_RESET_SUPPORT
  2512. arch_ops->txrx_soc_ppeds_interrupt_stop = dp_ppeds_interrupt_stop_be;
  2513. arch_ops->txrx_soc_ppeds_interrupt_start = dp_ppeds_interrupt_start_be;
  2514. arch_ops->txrx_soc_ppeds_service_status_update =
  2515. dp_ppeds_service_status_update_be;
  2516. arch_ops->txrx_soc_ppeds_enabled_check = dp_ppeds_is_enabled_on_soc;
  2517. arch_ops->txrx_soc_ppeds_txdesc_pool_reset =
  2518. dp_ppeds_tx_desc_pool_reset;
  2519. #endif
  2520. #endif
  2521. dp_init_near_full_arch_ops_be(arch_ops);
  2522. arch_ops->get_reo_qdesc_addr = dp_rx_get_reo_qdesc_addr_be;
  2523. arch_ops->get_rx_hash_key = dp_get_rx_hash_key_be;
  2524. arch_ops->dp_set_rx_fst = dp_set_rx_fst_be;
  2525. arch_ops->dp_get_rx_fst = dp_get_rx_fst_be;
  2526. arch_ops->dp_rx_fst_deref = dp_rx_fst_release_ref_be;
  2527. arch_ops->dp_rx_fst_ref = dp_rx_fst_get_ref_be;
  2528. arch_ops->print_mlo_ast_stats = dp_print_mlo_ast_stats_be;
  2529. arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_be;
  2530. arch_ops->reo_remap_config = dp_reo_remap_config_be;
  2531. arch_ops->txrx_get_vdev_mcast_param = dp_txrx_get_vdev_mcast_param_be;
  2532. arch_ops->txrx_srng_init = dp_srng_init_be;
  2533. arch_ops->dp_get_vdev_stats_for_unmap_peer =
  2534. dp_get_vdev_stats_for_unmap_peer_be;
  2535. #ifdef WLAN_MLO_MULTI_CHIP
  2536. arch_ops->dp_get_interface_stats = dp_get_interface_stats_be;
  2537. #endif
  2538. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  2539. arch_ops->dp_update_ring_hptp = dp_update_ring_hptp;
  2540. #endif
  2541. dp_initialize_arch_ops_be_ipa(arch_ops);
  2542. dp_initialize_arch_ops_be_single_dev(arch_ops);
  2543. dp_initialize_arch_ops_be_fisa(arch_ops);
  2544. }
  2545. #ifdef QCA_SUPPORT_PRIMARY_LINK_MIGRATE
  2546. static void
  2547. dp_primary_link_migration(struct dp_soc *soc, void *cb_ctxt,
  2548. union hal_reo_status *reo_status)
  2549. {
  2550. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2551. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  2552. struct dp_soc *pr_soc = NULL;
  2553. struct dp_peer_info *pr_peer_info = (struct dp_peer_info *)cb_ctxt;
  2554. struct dp_peer *new_primary_peer = NULL;
  2555. struct dp_peer *mld_peer = NULL;
  2556. uint8_t primary_vdev_id;
  2557. struct cdp_txrx_peer_params_update params = {0};
  2558. uint8_t tid;
  2559. uint8_t is_wds = 0;
  2560. uint16_t hw_peer_id;
  2561. uint16_t ast_hash;
  2562. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, pr_peer_info->chip_id);
  2563. if (!pr_soc) {
  2564. dp_htt_err("Invalid soc");
  2565. qdf_mem_free(pr_peer_info);
  2566. return;
  2567. }
  2568. new_primary_peer = pr_soc->peer_id_to_obj_map[
  2569. pr_peer_info->primary_peer_id];
  2570. if (!new_primary_peer) {
  2571. dp_htt_err("New primary peer is NULL");
  2572. qdf_mem_free(pr_peer_info);
  2573. return;
  2574. }
  2575. mld_peer = DP_GET_MLD_PEER_FROM_PEER(new_primary_peer);
  2576. if (!mld_peer) {
  2577. dp_htt_err("MLD peer is NULL");
  2578. qdf_mem_free(pr_peer_info);
  2579. return;
  2580. }
  2581. new_primary_peer->primary_link = 1;
  2582. hw_peer_id = pr_peer_info->hw_peer_id;
  2583. ast_hash = pr_peer_info->ast_hash;
  2584. /* Add ast enteries for new primary peer */
  2585. if (pr_soc->ast_offload_support && pr_soc->host_ast_db_enable) {
  2586. dp_peer_host_add_map_ast(pr_soc, mld_peer->peer_id, mld_peer->mac_addr.raw,
  2587. hw_peer_id, new_primary_peer->vdev->vdev_id,
  2588. ast_hash, is_wds);
  2589. }
  2590. /*
  2591. * Check if reo_qref_table_en is set and if
  2592. * rx_tid qdesc for tid 0 is already setup and perform
  2593. * qref write to LUT for Tid 0 and 16.
  2594. *
  2595. */
  2596. if (hal_reo_shared_qaddr_is_enable(pr_soc->hal_soc) &&
  2597. mld_peer->rx_tid[0].hw_qdesc_vaddr_unaligned) {
  2598. for (tid = 0; tid < DP_MAX_TIDS; tid++)
  2599. hal_reo_shared_qaddr_write(pr_soc->hal_soc,
  2600. mld_peer->peer_id,
  2601. tid,
  2602. mld_peer->rx_tid[tid].hw_qdesc_paddr);
  2603. }
  2604. if (pr_soc && pr_soc->cdp_soc.ol_ops->update_primary_link)
  2605. pr_soc->cdp_soc.ol_ops->update_primary_link(pr_soc->ctrl_psoc,
  2606. new_primary_peer->mac_addr.raw);
  2607. primary_vdev_id = new_primary_peer->vdev->vdev_id;
  2608. dp_vdev_unref_delete(soc, mld_peer->vdev, DP_MOD_ID_CHILD);
  2609. mld_peer->vdev = dp_vdev_get_ref_by_id(pr_soc, primary_vdev_id,
  2610. DP_MOD_ID_CHILD);
  2611. mld_peer->txrx_peer->vdev = mld_peer->vdev;
  2612. params.osif_vdev = (void *)new_primary_peer->vdev->osif_vdev;
  2613. params.peer_mac = mld_peer->mac_addr.raw;
  2614. params.chip_id = pr_peer_info->chip_id;
  2615. params.pdev_id = new_primary_peer->vdev->pdev->pdev_id;
  2616. if (new_primary_peer->vdev->opmode == wlan_op_mode_sta) {
  2617. dp_wdi_event_handler(
  2618. WDI_EVENT_STA_PRIMARY_UMAC_UPDATE,
  2619. pr_soc, (void *)&params,
  2620. new_primary_peer->peer_id,
  2621. WDI_NO_VAL, params.pdev_id);
  2622. } else {
  2623. dp_wdi_event_handler(
  2624. WDI_EVENT_PEER_PRIMARY_UMAC_UPDATE,
  2625. pr_soc, (void *)&params,
  2626. new_primary_peer->peer_id,
  2627. WDI_NO_VAL, params.pdev_id);
  2628. }
  2629. qdf_mem_free(pr_peer_info);
  2630. }
  2631. #ifdef WLAN_SUPPORT_PPEDS
  2632. static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
  2633. struct dp_peer *pr_peer,
  2634. uint16_t *src_info)
  2635. {
  2636. struct dp_soc_be *be_soc_mld = NULL;
  2637. struct cdp_ds_vp_params vp_params = {0};
  2638. struct dp_ppe_vp_profile *ppe_vp_profile;
  2639. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  2640. struct cdp_soc_t *cdp_soc = &pr_soc->cdp_soc;
  2641. /*
  2642. * Extract the VP profile from the VAP
  2643. */
  2644. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  2645. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  2646. return QDF_STATUS_E_NULL_VALUE;
  2647. }
  2648. /*
  2649. * Check if PPE DS routing is enabled on the associated vap.
  2650. */
  2651. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(
  2652. pr_soc->ctrl_psoc,
  2653. pr_peer->vdev->vdev_id,
  2654. &vp_params);
  2655. if (QDF_IS_STATUS_ERROR(qdf_status)) {
  2656. dp_err("Could not find ppeds profile info");
  2657. return QDF_STATUS_E_NULL_VALUE;
  2658. }
  2659. /* Check if PPE DS routing is enabled on
  2660. * the associated vap.
  2661. */
  2662. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  2663. return qdf_status;
  2664. be_soc_mld = dp_get_be_soc_from_dp_soc(pr_soc);
  2665. ppe_vp_profile = &be_soc_mld->ppe_vp_profile[
  2666. vp_params.ppe_vp_profile_idx];
  2667. *src_info = ppe_vp_profile->vp_num;
  2668. return qdf_status;
  2669. }
  2670. #else
  2671. static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
  2672. struct dp_peer *pr_peer,
  2673. uint16_t *src_info)
  2674. {
  2675. return QDF_STATUS_E_NOSUPPORT;
  2676. }
  2677. #endif
  2678. QDF_STATUS dp_htt_reo_migration(struct dp_soc *soc, uint16_t peer_id,
  2679. uint16_t ml_peer_id, uint16_t vdev_id,
  2680. uint8_t pdev_id, uint8_t chip_id)
  2681. {
  2682. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2683. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  2684. uint16_t mld_peer_id = dp_gen_ml_peer_id(soc, ml_peer_id);
  2685. struct dp_soc *pr_soc = NULL;
  2686. struct dp_soc *current_pr_soc = NULL;
  2687. struct hal_reo_cmd_params params;
  2688. struct dp_rx_tid *rx_tid;
  2689. struct dp_peer *pr_peer = NULL;
  2690. struct dp_peer *mld_peer = NULL;
  2691. struct dp_soc *mld_soc = NULL;
  2692. struct dp_peer *current_pr_peer = NULL;
  2693. struct dp_peer_info *peer_info;
  2694. struct dp_vdev_be *be_vdev;
  2695. uint16_t src_info = 0;
  2696. QDF_STATUS status;
  2697. struct dp_ast_entry *ast_entry;
  2698. uint16_t hw_peer_id;
  2699. uint16_t ast_hash;
  2700. if (!dp_mlo) {
  2701. dp_htt_err("Invalid dp_mlo ctxt");
  2702. return QDF_STATUS_E_FAILURE;
  2703. }
  2704. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, chip_id);
  2705. if (!pr_soc) {
  2706. dp_htt_err("Invalid soc");
  2707. return QDF_STATUS_E_FAILURE;
  2708. }
  2709. pr_peer = pr_soc->peer_id_to_obj_map[peer_id];
  2710. if (!pr_peer || !(IS_MLO_DP_LINK_PEER(pr_peer))) {
  2711. dp_htt_err("Invalid peer");
  2712. return QDF_STATUS_E_FAILURE;
  2713. }
  2714. mld_peer = DP_GET_MLD_PEER_FROM_PEER(pr_peer);
  2715. if (!mld_peer || (mld_peer->peer_id != mld_peer_id)) {
  2716. dp_htt_err("Invalid mld peer");
  2717. return QDF_STATUS_E_FAILURE;
  2718. }
  2719. current_pr_peer = dp_get_primary_link_peer_by_id(
  2720. pr_soc,
  2721. mld_peer->peer_id,
  2722. DP_MOD_ID_HTT);
  2723. if (!current_pr_peer || (current_pr_peer == pr_peer)) {
  2724. dp_htt_err("Invalid peer");
  2725. return QDF_STATUS_E_FAILURE;
  2726. }
  2727. be_vdev = dp_get_be_vdev_from_dp_vdev(pr_peer->vdev);
  2728. if (!be_vdev) {
  2729. dp_htt_err("Invalid be vdev");
  2730. return QDF_STATUS_E_FAILURE;
  2731. }
  2732. mld_soc = mld_peer->vdev->pdev->soc;
  2733. status = dp_get_ppe_info_for_vap(pr_soc, pr_peer, &src_info);
  2734. if (status == QDF_STATUS_E_NULL_VALUE) {
  2735. dp_htt_err("Invalid ppe info for the vdev");
  2736. return QDF_STATUS_E_FAILURE;
  2737. }
  2738. current_pr_soc = current_pr_peer->vdev->pdev->soc;
  2739. /* Making existing primary peer as non primary */
  2740. current_pr_peer->primary_link = 0;
  2741. dp_peer_unref_delete(current_pr_peer, DP_MOD_ID_HTT);
  2742. dp_peer_rx_reo_shared_qaddr_delete(current_pr_soc, mld_peer);
  2743. /* delete ast entry for current primary peer */
  2744. qdf_spin_lock_bh(&current_pr_soc->ast_lock);
  2745. ast_entry = dp_peer_ast_hash_find_soc(current_pr_soc, mld_peer->mac_addr.raw);
  2746. if (!ast_entry) {
  2747. dp_htt_err("Invalid ast entry");
  2748. qdf_spin_unlock_bh(&current_pr_soc->ast_lock);
  2749. return QDF_STATUS_E_FAILURE;
  2750. }
  2751. hw_peer_id = ast_entry->ast_idx;
  2752. ast_hash = ast_entry->ast_hash_value;
  2753. dp_peer_unlink_ast_entry(current_pr_soc, ast_entry, mld_peer);
  2754. if (ast_entry->is_mapped)
  2755. current_pr_soc->ast_table[ast_entry->ast_idx] = NULL;
  2756. dp_peer_free_ast_entry(current_pr_soc, ast_entry);
  2757. mld_peer->self_ast_entry = NULL;
  2758. qdf_spin_unlock_bh(&current_pr_soc->ast_lock);
  2759. peer_info = qdf_mem_malloc(sizeof(struct dp_peer_info));
  2760. if (!peer_info) {
  2761. dp_htt_err("Malloc failed");
  2762. return QDF_STATUS_E_FAILURE;
  2763. }
  2764. peer_info->primary_peer_id = peer_id;
  2765. peer_info->chip_id = chip_id;
  2766. peer_info->hw_peer_id = hw_peer_id;
  2767. peer_info->ast_hash = ast_hash;
  2768. qdf_mem_zero(&params, sizeof(params));
  2769. rx_tid = &mld_peer->rx_tid[0];
  2770. params.std.need_status = 1;
  2771. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  2772. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  2773. params.u.fl_cache_params.flush_no_inval = 0;
  2774. params.u.fl_cache_params.flush_entire_cache = 1;
  2775. status = dp_reo_send_cmd(current_pr_soc, CMD_FLUSH_CACHE, &params,
  2776. dp_primary_link_migration,
  2777. (void *)peer_info);
  2778. if (status != QDF_STATUS_SUCCESS) {
  2779. dp_htt_err("Reo flush failed");
  2780. qdf_mem_free(peer_info);
  2781. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  2782. chip_id, peer_id, ml_peer_id,
  2783. src_info, QDF_STATUS_E_FAILURE);
  2784. }
  2785. qdf_mem_zero(&params, sizeof(params));
  2786. params.std.need_status = 0;
  2787. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  2788. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  2789. params.u.unblk_cache_params.type = UNBLOCK_CACHE;
  2790. dp_reo_send_cmd(current_pr_soc, CMD_UNBLOCK_CACHE, &params, NULL, NULL);
  2791. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  2792. chip_id, peer_id, ml_peer_id,
  2793. src_info, QDF_STATUS_SUCCESS);
  2794. return QDF_STATUS_SUCCESS;
  2795. }
  2796. #endif