eht_sig_usr_ofdma_info.h 8.1 KB

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  1. /*
  2. * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _EHT_SIG_USR_OFDMA_INFO_H_
  17. #define _EHT_SIG_USR_OFDMA_INFO_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #define NUM_OF_DWORDS_EHT_SIG_USR_OFDMA_INFO 2
  21. struct eht_sig_usr_ofdma_info {
  22. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  23. uint32_t sta_id : 11, // [10:0]
  24. sta_mcs : 4, // [14:11]
  25. validate_0a : 1, // [15:15]
  26. nss : 4, // [19:16]
  27. txbf : 1, // [20:20]
  28. sta_coding : 1, // [21:21]
  29. reserved_0b : 1, // [22:22]
  30. rx_integrity_check_passed : 1, // [23:23]
  31. subband80_cc_mask : 8; // [31:24]
  32. uint32_t user_order_subband80_0 : 8, // [7:0]
  33. user_order_subband80_1 : 8, // [15:8]
  34. user_order_subband80_2 : 8, // [23:16]
  35. user_order_subband80_3 : 8; // [31:24]
  36. #else
  37. uint32_t subband80_cc_mask : 8, // [31:24]
  38. rx_integrity_check_passed : 1, // [23:23]
  39. reserved_0b : 1, // [22:22]
  40. sta_coding : 1, // [21:21]
  41. txbf : 1, // [20:20]
  42. nss : 4, // [19:16]
  43. validate_0a : 1, // [15:15]
  44. sta_mcs : 4, // [14:11]
  45. sta_id : 11; // [10:0]
  46. uint32_t user_order_subband80_3 : 8, // [31:24]
  47. user_order_subband80_2 : 8, // [23:16]
  48. user_order_subband80_1 : 8, // [15:8]
  49. user_order_subband80_0 : 8; // [7:0]
  50. #endif
  51. };
  52. #define EHT_SIG_USR_OFDMA_INFO_STA_ID_OFFSET 0x00000000
  53. #define EHT_SIG_USR_OFDMA_INFO_STA_ID_LSB 0
  54. #define EHT_SIG_USR_OFDMA_INFO_STA_ID_MSB 10
  55. #define EHT_SIG_USR_OFDMA_INFO_STA_ID_MASK 0x000007ff
  56. #define EHT_SIG_USR_OFDMA_INFO_STA_MCS_OFFSET 0x00000000
  57. #define EHT_SIG_USR_OFDMA_INFO_STA_MCS_LSB 11
  58. #define EHT_SIG_USR_OFDMA_INFO_STA_MCS_MSB 14
  59. #define EHT_SIG_USR_OFDMA_INFO_STA_MCS_MASK 0x00007800
  60. #define EHT_SIG_USR_OFDMA_INFO_VALIDATE_0A_OFFSET 0x00000000
  61. #define EHT_SIG_USR_OFDMA_INFO_VALIDATE_0A_LSB 15
  62. #define EHT_SIG_USR_OFDMA_INFO_VALIDATE_0A_MSB 15
  63. #define EHT_SIG_USR_OFDMA_INFO_VALIDATE_0A_MASK 0x00008000
  64. #define EHT_SIG_USR_OFDMA_INFO_NSS_OFFSET 0x00000000
  65. #define EHT_SIG_USR_OFDMA_INFO_NSS_LSB 16
  66. #define EHT_SIG_USR_OFDMA_INFO_NSS_MSB 19
  67. #define EHT_SIG_USR_OFDMA_INFO_NSS_MASK 0x000f0000
  68. #define EHT_SIG_USR_OFDMA_INFO_TXBF_OFFSET 0x00000000
  69. #define EHT_SIG_USR_OFDMA_INFO_TXBF_LSB 20
  70. #define EHT_SIG_USR_OFDMA_INFO_TXBF_MSB 20
  71. #define EHT_SIG_USR_OFDMA_INFO_TXBF_MASK 0x00100000
  72. #define EHT_SIG_USR_OFDMA_INFO_STA_CODING_OFFSET 0x00000000
  73. #define EHT_SIG_USR_OFDMA_INFO_STA_CODING_LSB 21
  74. #define EHT_SIG_USR_OFDMA_INFO_STA_CODING_MSB 21
  75. #define EHT_SIG_USR_OFDMA_INFO_STA_CODING_MASK 0x00200000
  76. #define EHT_SIG_USR_OFDMA_INFO_RESERVED_0B_OFFSET 0x00000000
  77. #define EHT_SIG_USR_OFDMA_INFO_RESERVED_0B_LSB 22
  78. #define EHT_SIG_USR_OFDMA_INFO_RESERVED_0B_MSB 22
  79. #define EHT_SIG_USR_OFDMA_INFO_RESERVED_0B_MASK 0x00400000
  80. #define EHT_SIG_USR_OFDMA_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000
  81. #define EHT_SIG_USR_OFDMA_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 23
  82. #define EHT_SIG_USR_OFDMA_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 23
  83. #define EHT_SIG_USR_OFDMA_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x00800000
  84. #define EHT_SIG_USR_OFDMA_INFO_SUBBAND80_CC_MASK_OFFSET 0x00000000
  85. #define EHT_SIG_USR_OFDMA_INFO_SUBBAND80_CC_MASK_LSB 24
  86. #define EHT_SIG_USR_OFDMA_INFO_SUBBAND80_CC_MASK_MSB 31
  87. #define EHT_SIG_USR_OFDMA_INFO_SUBBAND80_CC_MASK_MASK 0xff000000
  88. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_0_OFFSET 0x00000004
  89. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_0_LSB 0
  90. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_0_MSB 7
  91. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_0_MASK 0x000000ff
  92. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_1_OFFSET 0x00000004
  93. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_1_LSB 8
  94. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_1_MSB 15
  95. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_1_MASK 0x0000ff00
  96. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_2_OFFSET 0x00000004
  97. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_2_LSB 16
  98. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_2_MSB 23
  99. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_2_MASK 0x00ff0000
  100. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_3_OFFSET 0x00000004
  101. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_3_LSB 24
  102. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_3_MSB 31
  103. #define EHT_SIG_USR_OFDMA_INFO_USER_ORDER_SUBBAND80_3_MASK 0xff000000
  104. #endif