resources.c 42 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
  4. */
  5. /* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */
  6. #include <linux/sort.h>
  7. #include <linux/clk.h>
  8. #include <linux/reset.h>
  9. #include <linux/interconnect.h>
  10. #include <linux/soc/qcom/llcc-qcom.h>
  11. #ifdef CONFIG_MSM_MMRM
  12. #include <linux/soc/qcom/msm_mmrm.h>
  13. #endif
  14. #include "msm_vidc_core.h"
  15. #include "msm_vidc_power.h"
  16. #include "msm_vidc_debug.h"
  17. #include "msm_vidc_driver.h"
  18. #include "msm_vidc_platform.h"
  19. #include "venus_hfi.h"
  20. /* Less than 50MBps is treated as trivial BW change */
  21. #define TRIVIAL_BW_THRESHOLD 50000
  22. #define TRIVIAL_BW_CHANGE(a, b) \
  23. ((a) > (b) ? (a) - (b) < TRIVIAL_BW_THRESHOLD : \
  24. (b) - (a) < TRIVIAL_BW_THRESHOLD)
  25. enum reset_state {
  26. INIT = 1,
  27. ASSERT,
  28. DEASSERT,
  29. };
  30. static void __fatal_error(bool fatal)
  31. {
  32. WARN_ON(fatal);
  33. }
  34. static void devm_llcc_release(struct device *dev, void *res)
  35. {
  36. d_vpr_h("%s()\n", __func__);
  37. llcc_slice_putd(*(struct llcc_slice_desc **)res);
  38. }
  39. static struct llcc_slice_desc *devm_llcc_get(struct device *dev, u32 id)
  40. {
  41. struct llcc_slice_desc **ptr, *llcc;
  42. ptr = devres_alloc(devm_llcc_release, sizeof(*ptr), GFP_KERNEL);
  43. if (!ptr)
  44. return ERR_PTR(-ENOMEM);
  45. llcc = llcc_slice_getd(id);
  46. if (!IS_ERR(llcc)) {
  47. *ptr = llcc;
  48. devres_add(dev, ptr);
  49. } else {
  50. devres_free(ptr);
  51. }
  52. return llcc;
  53. }
  54. #ifdef CONFIG_MSM_MMRM
  55. static void devm_mmrm_release(struct device *dev, void *res)
  56. {
  57. d_vpr_h("%s()\n", __func__);
  58. mmrm_client_deregister(*(struct mmrm_client **)res);
  59. }
  60. static struct mmrm_client *devm_mmrm_get(struct device *dev, struct mmrm_client_desc *desc)
  61. {
  62. struct mmrm_client **ptr, *mmrm;
  63. ptr = devres_alloc(devm_mmrm_release, sizeof(*ptr), GFP_KERNEL);
  64. if (!ptr)
  65. return ERR_PTR(-ENOMEM);
  66. mmrm = mmrm_client_register(desc);
  67. if (!IS_ERR(mmrm)) {
  68. *ptr = mmrm;
  69. devres_add(dev, ptr);
  70. } else {
  71. devres_free(ptr);
  72. }
  73. return mmrm;
  74. }
  75. #endif
  76. /* A comparator to compare loads (needed later on) */
  77. static inline int cmp(const void *a, const void *b)
  78. {
  79. /* want to sort in reverse so flip the comparison */
  80. return ((struct freq_table *)b)->freq -
  81. ((struct freq_table *)a)->freq;
  82. }
  83. static int __init_register_base(struct msm_vidc_core *core)
  84. {
  85. struct msm_vidc_resource *res;
  86. if (!core || !core->pdev || !core->resource) {
  87. d_vpr_e("%s: invalid params\n", __func__);
  88. return -EINVAL;
  89. }
  90. res = core->resource;
  91. res->register_base_addr = devm_platform_ioremap_resource(core->pdev, 0);
  92. if (IS_ERR(res->register_base_addr)) {
  93. d_vpr_e("%s: map reg addr failed %ld\n",
  94. __func__, PTR_ERR(res->register_base_addr));
  95. return -EINVAL;
  96. }
  97. d_vpr_h("%s: reg_base %#x\n", __func__, res->register_base_addr);
  98. return 0;
  99. }
  100. static int __init_irq(struct msm_vidc_core *core)
  101. {
  102. struct msm_vidc_resource *res;
  103. #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 16, 0))
  104. struct resource *kres;
  105. #endif
  106. int rc = 0;
  107. if (!core || !core->pdev || !core->resource) {
  108. d_vpr_e("%s: invalid params\n", __func__);
  109. return -EINVAL;
  110. }
  111. res = core->resource;
  112. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 16, 0))
  113. res->irq = platform_get_irq(core->pdev, 0);
  114. #else
  115. kres = platform_get_resource(core->pdev, IORESOURCE_IRQ, 0);
  116. res->irq = kres ? kres->start : -1;
  117. #endif
  118. if (res->irq < 0)
  119. d_vpr_e("%s: get irq failed, %d\n", __func__, res->irq);
  120. d_vpr_h("%s: irq %d\n", __func__, res->irq);
  121. rc = devm_request_threaded_irq(&core->pdev->dev, res->irq, venus_hfi_isr,
  122. venus_hfi_isr_handler, IRQF_TRIGGER_HIGH, "msm-vidc", core);
  123. if (rc) {
  124. d_vpr_e("%s: Failed to allocate venus IRQ\n", __func__);
  125. return rc;
  126. }
  127. disable_irq_nosync(res->irq);
  128. return rc;
  129. }
  130. static int __init_bus(struct msm_vidc_core *core)
  131. {
  132. const struct bw_table *bus_tbl;
  133. struct bus_set *interconnects;
  134. struct bus_info *binfo = NULL;
  135. u32 bus_count = 0, cnt = 0;
  136. int rc = 0;
  137. if (!core || !core->resource || !core->platform) {
  138. d_vpr_e("%s: invalid params\n", __func__);
  139. return -EINVAL;
  140. }
  141. interconnects = &core->resource->bus_set;
  142. bus_tbl = core->platform->data.bw_tbl;
  143. bus_count = core->platform->data.bw_tbl_size;
  144. if (!bus_tbl || !bus_count) {
  145. d_vpr_e("%s: invalid bus tbl %#x or count %d\n",
  146. __func__, bus_tbl, bus_count);
  147. return -EINVAL;
  148. }
  149. /* allocate bus_set */
  150. interconnects->bus_tbl = devm_kzalloc(&core->pdev->dev,
  151. sizeof(*interconnects->bus_tbl) * bus_count, GFP_KERNEL);
  152. if (!interconnects->bus_tbl) {
  153. d_vpr_e("%s: failed to alloc memory for bus table\n", __func__);
  154. return -ENOMEM;
  155. }
  156. interconnects->count = bus_count;
  157. /* populate bus field from platform data */
  158. for (cnt = 0; cnt < interconnects->count; cnt++) {
  159. interconnects->bus_tbl[cnt].name = bus_tbl[cnt].name;
  160. interconnects->bus_tbl[cnt].min_kbps = bus_tbl[cnt].min_kbps;
  161. interconnects->bus_tbl[cnt].max_kbps = bus_tbl[cnt].max_kbps;
  162. }
  163. /* print bus fields */
  164. venus_hfi_for_each_bus(core, binfo) {
  165. d_vpr_h("%s: name %s min_kbps %u max_kbps %u\n",
  166. __func__, binfo->name, binfo->min_kbps, binfo->max_kbps);
  167. }
  168. /* get interconnect handle */
  169. venus_hfi_for_each_bus(core, binfo) {
  170. if (!strcmp(binfo->name, "venus-llcc")) {
  171. if (msm_vidc_syscache_disable) {
  172. d_vpr_h("%s: skipping LLC bus init: %s\n", __func__,
  173. binfo->name);
  174. continue;
  175. }
  176. }
  177. binfo->icc = devm_of_icc_get(&core->pdev->dev, binfo->name);
  178. if (IS_ERR_OR_NULL(binfo->icc)) {
  179. d_vpr_e("%s: failed to get bus: %s\n", __func__, binfo->name);
  180. rc = PTR_ERR(binfo->icc) ?
  181. PTR_ERR(binfo->icc) : -EBADHANDLE;
  182. binfo->icc = NULL;
  183. return rc;
  184. }
  185. }
  186. return rc;
  187. }
  188. static int __init_regulators(struct msm_vidc_core *core)
  189. {
  190. const struct regulator_table *regulator_tbl;
  191. struct regulator_set *regulators;
  192. struct regulator_info *rinfo = NULL;
  193. u32 regulator_count = 0, cnt = 0;
  194. int rc = 0;
  195. if (!core || !core->resource || !core->platform) {
  196. d_vpr_e("%s: invalid params\n", __func__);
  197. return -EINVAL;
  198. }
  199. regulators = &core->resource->regulator_set;
  200. /* skip init if regulators not supported */
  201. if (!is_regulator_supported(core)) {
  202. d_vpr_h("%s: regulators are not available in database\n", __func__);
  203. return 0;
  204. }
  205. regulator_tbl = core->platform->data.regulator_tbl;
  206. regulator_count = core->platform->data.regulator_tbl_size;
  207. if (!regulator_tbl || !regulator_count) {
  208. d_vpr_e("%s: invalid regulator tbl %#x or count %d\n",
  209. __func__, regulator_tbl, regulator_count);
  210. return -EINVAL;
  211. }
  212. /* allocate regulator_set */
  213. regulators->regulator_tbl = devm_kzalloc(&core->pdev->dev,
  214. sizeof(*regulators->regulator_tbl) * regulator_count, GFP_KERNEL);
  215. if (!regulators->regulator_tbl) {
  216. d_vpr_e("%s: failed to alloc memory for regulator table\n", __func__);
  217. return -ENOMEM;
  218. }
  219. regulators->count = regulator_count;
  220. /* populate regulator fields */
  221. for (cnt = 0; cnt < regulators->count; cnt++) {
  222. regulators->regulator_tbl[cnt].name = regulator_tbl[cnt].name;
  223. regulators->regulator_tbl[cnt].hw_power_collapse = regulator_tbl[cnt].hw_trigger;
  224. }
  225. /* print regulator fields */
  226. venus_hfi_for_each_regulator(core, rinfo) {
  227. d_vpr_h("%s: name %s hw_power_collapse %d\n",
  228. __func__, rinfo->name, rinfo->hw_power_collapse);
  229. }
  230. /* get regulator handle */
  231. venus_hfi_for_each_regulator(core, rinfo) {
  232. rinfo->regulator = devm_regulator_get(&core->pdev->dev, rinfo->name);
  233. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  234. rc = PTR_ERR(rinfo->regulator) ?
  235. PTR_ERR(rinfo->regulator) : -EBADHANDLE;
  236. d_vpr_e("%s: failed to get regulator: %s\n", __func__, rinfo->name);
  237. rinfo->regulator = NULL;
  238. return rc;
  239. }
  240. }
  241. return rc;
  242. }
  243. static int __init_clocks(struct msm_vidc_core *core)
  244. {
  245. struct clock_residency *residency = NULL;
  246. const struct clk_table *clk_tbl;
  247. struct freq_table *freq_tbl;
  248. struct clock_set *clocks;
  249. struct clock_info *cinfo = NULL;
  250. u32 clk_count = 0, freq_count = 0;
  251. int fcnt = 0, cnt = 0, rc = 0;
  252. if (!core || !core->resource || !core->platform) {
  253. d_vpr_e("%s: invalid params\n", __func__);
  254. return -EINVAL;
  255. }
  256. clocks = &core->resource->clock_set;
  257. clk_tbl = core->platform->data.clk_tbl;
  258. clk_count = core->platform->data.clk_tbl_size;
  259. if (!clk_tbl || !clk_count) {
  260. d_vpr_e("%s: invalid clock tbl %#x or count %d\n",
  261. __func__, clk_tbl, clk_count);
  262. return -EINVAL;
  263. }
  264. /* allocate clock_set */
  265. clocks->clock_tbl = devm_kzalloc(&core->pdev->dev,
  266. sizeof(*clocks->clock_tbl) * clk_count, GFP_KERNEL);
  267. if (!clocks->clock_tbl) {
  268. d_vpr_e("%s: failed to alloc memory for clock table\n", __func__);
  269. return -ENOMEM;
  270. }
  271. clocks->count = clk_count;
  272. /* populate clock field from platform data */
  273. for (cnt = 0; cnt < clocks->count; cnt++) {
  274. clocks->clock_tbl[cnt].name = clk_tbl[cnt].name;
  275. clocks->clock_tbl[cnt].clk_id = clk_tbl[cnt].clk_id;
  276. clocks->clock_tbl[cnt].has_scaling = clk_tbl[cnt].scaling;
  277. }
  278. freq_tbl = core->platform->data.freq_tbl;
  279. freq_count = core->platform->data.freq_tbl_size;
  280. /* populate clk residency stats table */
  281. for (cnt = 0; cnt < clocks->count; cnt++) {
  282. /* initialize residency_list */
  283. INIT_LIST_HEAD(&clocks->clock_tbl[cnt].residency_list);
  284. /* skip if scaling not supported */
  285. if (!clocks->clock_tbl[cnt].has_scaling)
  286. continue;
  287. for (fcnt = 0; fcnt < freq_count; fcnt++) {
  288. residency = devm_kzalloc(&core->pdev->dev,
  289. sizeof(struct clock_residency), GFP_KERNEL);
  290. if (!residency) {
  291. d_vpr_e("%s: failed to alloc clk residency stat node\n", __func__);
  292. return -ENOMEM;
  293. }
  294. if (!freq_tbl) {
  295. d_vpr_e("%s: invalid freq tbl %#x\n", __func__, freq_tbl);
  296. return -EINVAL;
  297. }
  298. /* update residency node */
  299. residency->rate = freq_tbl[fcnt].freq;
  300. residency->start_time_us = 0;
  301. residency->total_time_us = 0;
  302. INIT_LIST_HEAD(&residency->list);
  303. /* add entry into residency_list */
  304. list_add_tail(&residency->list, &clocks->clock_tbl[cnt].residency_list);
  305. }
  306. }
  307. /* print clock fields */
  308. venus_hfi_for_each_clock(core, cinfo) {
  309. d_vpr_h("%s: clock name %s clock id %#x scaling %d\n",
  310. __func__, cinfo->name, cinfo->clk_id, cinfo->has_scaling);
  311. }
  312. /* get clock handle */
  313. venus_hfi_for_each_clock(core, cinfo) {
  314. cinfo->clk = devm_clk_get(&core->pdev->dev, cinfo->name);
  315. if (IS_ERR_OR_NULL(cinfo->clk)) {
  316. d_vpr_e("%s: failed to get clock: %s\n", __func__, cinfo->name);
  317. rc = PTR_ERR(cinfo->clk) ?
  318. PTR_ERR(cinfo->clk) : -EINVAL;
  319. cinfo->clk = NULL;
  320. return rc;
  321. }
  322. }
  323. return rc;
  324. }
  325. static int __clock_set_flag(struct msm_vidc_core *core,
  326. const char *name, enum branch_mem_flags flag)
  327. {
  328. struct clock_info *cinfo = NULL;
  329. bool found = false;
  330. /* get clock handle */
  331. venus_hfi_for_each_clock(core, cinfo) {
  332. if (strcmp(cinfo->name, name))
  333. continue;
  334. found = true;
  335. qcom_clk_set_flags(cinfo->clk, flag);
  336. d_vpr_h("%s: set flag %d on clock %s\n", __func__, flag, name);
  337. break;
  338. }
  339. if (!found) {
  340. d_vpr_e("%s: failed to find clock: %s\n", __func__, name);
  341. return -EINVAL;
  342. }
  343. return 0;
  344. }
  345. static int __init_reset_clocks(struct msm_vidc_core *core)
  346. {
  347. const struct clk_rst_table *rst_tbl;
  348. struct reset_set *rsts;
  349. struct reset_info *rinfo = NULL;
  350. u32 rst_count = 0, cnt = 0;
  351. int rc = 0;
  352. if (!core || !core->resource || !core->platform) {
  353. d_vpr_e("%s: invalid params\n", __func__);
  354. return -EINVAL;
  355. }
  356. rsts = &core->resource->reset_set;
  357. rst_tbl = core->platform->data.clk_rst_tbl;
  358. rst_count = core->platform->data.clk_rst_tbl_size;
  359. if (!rst_tbl || !rst_count) {
  360. d_vpr_e("%s: invalid reset tbl %#x or count %d\n",
  361. __func__, rst_tbl, rst_count);
  362. return -EINVAL;
  363. }
  364. /* allocate reset_set */
  365. rsts->reset_tbl = devm_kzalloc(&core->pdev->dev,
  366. sizeof(*rsts->reset_tbl) * rst_count, GFP_KERNEL);
  367. if (!rsts->reset_tbl) {
  368. d_vpr_e("%s: failed to alloc memory for reset table\n", __func__);
  369. return -ENOMEM;
  370. }
  371. rsts->count = rst_count;
  372. /* populate clock field from platform data */
  373. for (cnt = 0; cnt < rsts->count; cnt++) {
  374. rsts->reset_tbl[cnt].name = rst_tbl[cnt].name;
  375. rsts->reset_tbl[cnt].exclusive_release = rst_tbl[cnt].exclusive_release;
  376. }
  377. /* print reset clock fields */
  378. venus_hfi_for_each_reset_clock(core, rinfo) {
  379. d_vpr_h("%s: reset clk %s, exclusive %d\n",
  380. __func__, rinfo->name, rinfo->exclusive_release);
  381. }
  382. /* get reset clock handle */
  383. venus_hfi_for_each_reset_clock(core, rinfo) {
  384. if (rinfo->exclusive_release)
  385. rinfo->rst = devm_reset_control_get_exclusive_released(
  386. &core->pdev->dev, rinfo->name);
  387. else
  388. rinfo->rst = devm_reset_control_get(&core->pdev->dev, rinfo->name);
  389. if (IS_ERR_OR_NULL(rinfo->rst)) {
  390. d_vpr_e("%s: failed to get reset clock: %s\n", __func__, rinfo->name);
  391. rc = PTR_ERR(rinfo->rst) ?
  392. PTR_ERR(rinfo->rst) : -EINVAL;
  393. rinfo->rst = NULL;
  394. return rc;
  395. }
  396. }
  397. return rc;
  398. }
  399. static int __init_subcaches(struct msm_vidc_core *core)
  400. {
  401. const struct subcache_table *llcc_tbl;
  402. struct subcache_set *caches;
  403. struct subcache_info *sinfo = NULL;
  404. u32 llcc_count = 0, cnt = 0;
  405. int rc = 0;
  406. if (!core || !core->resource || !core->platform) {
  407. d_vpr_e("%s: invalid params\n", __func__);
  408. return -EINVAL;
  409. }
  410. caches = &core->resource->subcache_set;
  411. /* skip init if subcache not available */
  412. if (!is_sys_cache_present(core))
  413. return 0;
  414. llcc_tbl = core->platform->data.subcache_tbl;
  415. llcc_count = core->platform->data.subcache_tbl_size;
  416. if (!llcc_tbl || !llcc_count) {
  417. d_vpr_e("%s: invalid llcc tbl %#x or count %d\n",
  418. __func__, llcc_tbl, llcc_count);
  419. return -EINVAL;
  420. }
  421. /* allocate clock_set */
  422. caches->subcache_tbl = devm_kzalloc(&core->pdev->dev,
  423. sizeof(*caches->subcache_tbl) * llcc_count, GFP_KERNEL);
  424. if (!caches->subcache_tbl) {
  425. d_vpr_e("%s: failed to alloc memory for subcache table\n", __func__);
  426. return -ENOMEM;
  427. }
  428. caches->count = llcc_count;
  429. /* populate subcache fields from platform data */
  430. for (cnt = 0; cnt < caches->count; cnt++) {
  431. caches->subcache_tbl[cnt].name = llcc_tbl[cnt].name;
  432. caches->subcache_tbl[cnt].llcc_id = llcc_tbl[cnt].llcc_id;
  433. }
  434. /* print subcache fields */
  435. venus_hfi_for_each_subcache(core, sinfo) {
  436. d_vpr_h("%s: name %s subcache id %d\n",
  437. __func__, sinfo->name, sinfo->llcc_id);
  438. }
  439. /* get subcache/llcc handle */
  440. venus_hfi_for_each_subcache(core, sinfo) {
  441. sinfo->subcache = devm_llcc_get(&core->pdev->dev, sinfo->llcc_id);
  442. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  443. d_vpr_e("%s: failed to get subcache: %d\n", __func__, sinfo->llcc_id);
  444. rc = PTR_ERR(sinfo->subcache) ?
  445. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  446. sinfo->subcache = NULL;
  447. return rc;
  448. }
  449. }
  450. return rc;
  451. }
  452. static int __init_freq_table(struct msm_vidc_core *core)
  453. {
  454. struct freq_table *freq_tbl;
  455. struct freq_set *clks;
  456. u32 freq_count = 0, cnt = 0;
  457. int rc = 0;
  458. if (!core || !core->resource || !core->platform) {
  459. d_vpr_e("%s: invalid params\n", __func__);
  460. return -EINVAL;
  461. }
  462. clks = &core->resource->freq_set;
  463. freq_tbl = core->platform->data.freq_tbl;
  464. freq_count = core->platform->data.freq_tbl_size;
  465. if (!freq_tbl || !freq_count) {
  466. d_vpr_e("%s: invalid freq tbl %#x or count %d\n",
  467. __func__, freq_tbl, freq_count);
  468. return -EINVAL;
  469. }
  470. /* allocate freq_set */
  471. clks->freq_tbl = devm_kzalloc(&core->pdev->dev,
  472. sizeof(*clks->freq_tbl) * freq_count, GFP_KERNEL);
  473. if (!clks->freq_tbl) {
  474. d_vpr_e("%s: failed to alloc memory for freq table\n", __func__);
  475. return -ENOMEM;
  476. }
  477. clks->count = freq_count;
  478. /* populate freq field from platform data */
  479. for (cnt = 0; cnt < clks->count; cnt++)
  480. clks->freq_tbl[cnt].freq = freq_tbl[cnt].freq;
  481. /* sort freq table */
  482. sort(clks->freq_tbl, clks->count, sizeof(*clks->freq_tbl), cmp, NULL);
  483. /* print freq field freq_set */
  484. d_vpr_h("%s: updated freq table\n", __func__);
  485. for (cnt = 0; cnt < clks->count; cnt++)
  486. d_vpr_h("%s:\t %lu\n", __func__, clks->freq_tbl[cnt].freq);
  487. return rc;
  488. }
  489. static int __init_context_banks(struct msm_vidc_core *core)
  490. {
  491. const struct context_bank_table *cb_tbl;
  492. struct context_bank_set *cbs;
  493. struct context_bank_info *cbinfo = NULL;
  494. u32 cb_count = 0, cnt = 0;
  495. int rc = 0;
  496. if (!core || !core->resource || !core->platform) {
  497. d_vpr_e("%s: invalid params\n", __func__);
  498. return -EINVAL;
  499. }
  500. cbs = &core->resource->context_bank_set;
  501. cb_tbl = core->platform->data.context_bank_tbl;
  502. cb_count = core->platform->data.context_bank_tbl_size;
  503. if (!cb_tbl || !cb_count) {
  504. d_vpr_e("%s: invalid context bank tbl %#x or count %d\n",
  505. __func__, cb_tbl, cb_count);
  506. return -EINVAL;
  507. }
  508. /* allocate context_bank table */
  509. cbs->context_bank_tbl = devm_kzalloc(&core->pdev->dev,
  510. sizeof(*cbs->context_bank_tbl) * cb_count, GFP_KERNEL);
  511. if (!cbs->context_bank_tbl) {
  512. d_vpr_e("%s: failed to alloc memory for context_bank table\n", __func__);
  513. return -ENOMEM;
  514. }
  515. cbs->count = cb_count;
  516. /**
  517. * populate context bank field from platform data except
  518. * dev & domain which are assigned as part of context bank
  519. * probe sequence
  520. */
  521. for (cnt = 0; cnt < cbs->count; cnt++) {
  522. cbs->context_bank_tbl[cnt].name = cb_tbl[cnt].name;
  523. cbs->context_bank_tbl[cnt].addr_range.start = cb_tbl[cnt].start;
  524. cbs->context_bank_tbl[cnt].addr_range.size = cb_tbl[cnt].size;
  525. cbs->context_bank_tbl[cnt].secure = cb_tbl[cnt].secure;
  526. cbs->context_bank_tbl[cnt].dma_coherant = cb_tbl[cnt].dma_coherant;
  527. cbs->context_bank_tbl[cnt].region = cb_tbl[cnt].region;
  528. cbs->context_bank_tbl[cnt].dma_mask = cb_tbl[cnt].dma_mask;
  529. }
  530. /* print context_bank fiels */
  531. venus_hfi_for_each_context_bank(core, cbinfo) {
  532. d_vpr_h("%s: name %s addr start %#x size %#x secure %d "
  533. "coherant %d region %d dma_mask %llu\n",
  534. __func__, cbinfo->name, cbinfo->addr_range.start,
  535. cbinfo->addr_range.size, cbinfo->secure,
  536. cbinfo->dma_coherant, cbinfo->region, cbinfo->dma_mask);
  537. }
  538. return rc;
  539. }
  540. #ifdef CONFIG_MSM_MMRM
  541. static int __register_mmrm(struct msm_vidc_core *core)
  542. {
  543. int rc = 0;
  544. struct clock_info *cl;
  545. if (!core || !core->platform) {
  546. d_vpr_e("%s: invalid params\n", __func__);
  547. return -EINVAL;
  548. }
  549. /* skip if platform does not support mmrm */
  550. if (!is_mmrm_supported(core)) {
  551. d_vpr_h("%s: MMRM not supported\n", __func__);
  552. return 0;
  553. }
  554. /* get mmrm handle for each clock sources */
  555. venus_hfi_for_each_clock(core, cl) {
  556. struct mmrm_client_desc desc;
  557. char *name = (char *)desc.client_info.desc.name;
  558. // TODO: set notifier data vals
  559. struct mmrm_client_notifier_data notifier_data = {
  560. MMRM_CLIENT_RESOURCE_VALUE_CHANGE,
  561. {{0, 0}},
  562. NULL};
  563. // TODO: add callback fn
  564. desc.notifier_callback_fn = NULL;
  565. if (!cl->has_scaling)
  566. continue;
  567. if (IS_ERR_OR_NULL(cl->clk)) {
  568. d_vpr_e("%s: Invalid clock: %s\n", __func__, cl->name);
  569. return PTR_ERR(cl->clk) ? PTR_ERR(cl->clk) : -EINVAL;
  570. }
  571. desc.client_type = MMRM_CLIENT_CLOCK;
  572. desc.client_info.desc.client_domain = MMRM_CLIENT_DOMAIN_VIDEO;
  573. desc.client_info.desc.client_id = cl->clk_id;
  574. strscpy(name, cl->name, sizeof(desc.client_info.desc.name));
  575. desc.client_info.desc.clk = cl->clk;
  576. desc.priority = MMRM_CLIENT_PRIOR_LOW;
  577. desc.pvt_data = notifier_data.pvt_data;
  578. d_vpr_h("%s: domain(%d) cid(%d) name(%s) clk(%pK)\n",
  579. __func__,
  580. desc.client_info.desc.client_domain,
  581. desc.client_info.desc.client_id,
  582. desc.client_info.desc.name,
  583. desc.client_info.desc.clk);
  584. d_vpr_h("%s: type(%d) pri(%d) pvt(%pK) notifier(%pK)\n",
  585. __func__,
  586. desc.client_type,
  587. desc.priority,
  588. desc.pvt_data,
  589. desc.notifier_callback_fn);
  590. cl->mmrm_client = devm_mmrm_get(&core->pdev->dev, &desc);
  591. if (!cl->mmrm_client) {
  592. d_vpr_e("%s: Failed to register clk(%s): %d\n",
  593. __func__, cl->name, rc);
  594. return -EINVAL;
  595. }
  596. }
  597. return rc;
  598. }
  599. #else
  600. static int __register_mmrm(struct msm_vidc_core *core)
  601. {
  602. return 0;
  603. }
  604. #endif
  605. static int __acquire_regulator(struct msm_vidc_core *core,
  606. struct regulator_info *rinfo)
  607. {
  608. int rc = 0;
  609. if (!core || !rinfo) {
  610. d_vpr_e("%s: invalid params\n", __func__);
  611. return -EINVAL;
  612. }
  613. if (rinfo->hw_power_collapse) {
  614. if (!rinfo->regulator) {
  615. d_vpr_e("%s: invalid regulator\n", __func__);
  616. rc = -EINVAL;
  617. goto exit;
  618. }
  619. if (regulator_get_mode(rinfo->regulator) ==
  620. REGULATOR_MODE_NORMAL) {
  621. /* clear handoff from core sub_state */
  622. msm_vidc_change_core_sub_state(core,
  623. CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__);
  624. d_vpr_h("Skip acquire regulator %s\n", rinfo->name);
  625. goto exit;
  626. }
  627. rc = regulator_set_mode(rinfo->regulator,
  628. REGULATOR_MODE_NORMAL);
  629. if (rc) {
  630. /*
  631. * This is somewhat fatal, but nothing we can do
  632. * about it. We can't disable the regulator w/o
  633. * getting it back under s/w control
  634. */
  635. d_vpr_e("Failed to acquire regulator control: %s\n",
  636. rinfo->name);
  637. goto exit;
  638. } else {
  639. /* reset handoff from core sub_state */
  640. msm_vidc_change_core_sub_state(core,
  641. CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__);
  642. d_vpr_h("Acquired regulator control from HW: %s\n",
  643. rinfo->name);
  644. }
  645. if (!regulator_is_enabled(rinfo->regulator)) {
  646. d_vpr_e("%s: Regulator is not enabled %s\n",
  647. __func__, rinfo->name);
  648. __fatal_error(true);
  649. }
  650. }
  651. exit:
  652. return rc;
  653. }
  654. static int __acquire_regulators(struct msm_vidc_core *core)
  655. {
  656. int rc = 0;
  657. struct regulator_info *rinfo;
  658. venus_hfi_for_each_regulator(core, rinfo)
  659. __acquire_regulator(core, rinfo);
  660. return rc;
  661. }
  662. static int __hand_off_regulator(struct msm_vidc_core *core,
  663. struct regulator_info *rinfo)
  664. {
  665. int rc = 0;
  666. if (rinfo->hw_power_collapse) {
  667. if (!rinfo->regulator) {
  668. d_vpr_e("%s: invalid regulator\n", __func__);
  669. return -EINVAL;
  670. }
  671. rc = regulator_set_mode(rinfo->regulator,
  672. REGULATOR_MODE_FAST);
  673. if (rc) {
  674. d_vpr_e("Failed to hand off regulator control: %s\n",
  675. rinfo->name);
  676. return rc;
  677. } else {
  678. /* set handoff done in core sub_state */
  679. msm_vidc_change_core_sub_state(core,
  680. 0, CORE_SUBSTATE_GDSC_HANDOFF, __func__);
  681. d_vpr_h("Hand off regulator control to HW: %s\n",
  682. rinfo->name);
  683. }
  684. if (!regulator_is_enabled(rinfo->regulator)) {
  685. d_vpr_e("%s: Regulator is not enabled %s\n",
  686. __func__, rinfo->name);
  687. __fatal_error(true);
  688. }
  689. }
  690. return rc;
  691. }
  692. static int __hand_off_regulators(struct msm_vidc_core *core)
  693. {
  694. struct regulator_info *rinfo;
  695. int rc = 0, c = 0;
  696. venus_hfi_for_each_regulator(core, rinfo) {
  697. rc = __hand_off_regulator(core, rinfo);
  698. /*
  699. * If one regulator hand off failed, driver should take
  700. * the control for other regulators back.
  701. */
  702. if (rc)
  703. goto err_reg_handoff_failed;
  704. c++;
  705. }
  706. return rc;
  707. err_reg_handoff_failed:
  708. venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c)
  709. __acquire_regulator(core, rinfo);
  710. return rc;
  711. }
  712. static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name)
  713. {
  714. int rc = 0;
  715. struct regulator_info *rinfo;
  716. bool found;
  717. if (!core || !reg_name) {
  718. d_vpr_e("%s: invalid params\n", __func__);
  719. return -EINVAL;
  720. }
  721. found = false;
  722. venus_hfi_for_each_regulator(core, rinfo) {
  723. if (!rinfo->regulator) {
  724. d_vpr_e("%s: invalid regulator %s\n",
  725. __func__, rinfo->name);
  726. return -EINVAL;
  727. }
  728. if (strcmp(rinfo->name, reg_name))
  729. continue;
  730. found = true;
  731. rc = __acquire_regulator(core, rinfo);
  732. if (rc) {
  733. d_vpr_e("%s: failed to acquire %s, rc = %d\n",
  734. __func__, rinfo->name, rc);
  735. /* Bring attention to this issue */
  736. WARN_ON(true);
  737. return rc;
  738. }
  739. /* reset handoff done from core sub_state */
  740. msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__);
  741. rc = regulator_disable(rinfo->regulator);
  742. if (rc) {
  743. d_vpr_e("%s: failed to disable %s, rc = %d\n",
  744. __func__, rinfo->name, rc);
  745. return rc;
  746. }
  747. d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name);
  748. break;
  749. }
  750. if (!found) {
  751. d_vpr_e("%s: regulator %s not found\n", __func__, reg_name);
  752. return -EINVAL;
  753. }
  754. return rc;
  755. }
  756. static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name)
  757. {
  758. int rc = 0;
  759. struct regulator_info *rinfo;
  760. bool found;
  761. if (!core || !reg_name) {
  762. d_vpr_e("%s: invalid params\n", __func__);
  763. return -EINVAL;
  764. }
  765. found = false;
  766. venus_hfi_for_each_regulator(core, rinfo) {
  767. if (!rinfo->regulator) {
  768. d_vpr_e("%s: invalid regulator %s\n",
  769. __func__, rinfo->name);
  770. return -EINVAL;
  771. }
  772. if (strcmp(rinfo->name, reg_name))
  773. continue;
  774. found = true;
  775. rc = regulator_enable(rinfo->regulator);
  776. if (rc) {
  777. d_vpr_e("%s: failed to enable %s, rc = %d\n",
  778. __func__, rinfo->name, rc);
  779. return rc;
  780. }
  781. if (!regulator_is_enabled(rinfo->regulator)) {
  782. d_vpr_e("%s: regulator %s not enabled\n",
  783. __func__, rinfo->name);
  784. regulator_disable(rinfo->regulator);
  785. return -EINVAL;
  786. }
  787. d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name);
  788. break;
  789. }
  790. if (!found) {
  791. d_vpr_e("%s: regulator %s not found\n", __func__, reg_name);
  792. return -EINVAL;
  793. }
  794. return rc;
  795. }
  796. static int __disable_subcaches(struct msm_vidc_core *core)
  797. {
  798. struct subcache_info *sinfo;
  799. int rc = 0;
  800. if (msm_vidc_syscache_disable || !is_sys_cache_present(core))
  801. return 0;
  802. /* De-activate subcaches */
  803. venus_hfi_for_each_subcache_reverse(core, sinfo) {
  804. if (!sinfo->isactive)
  805. continue;
  806. d_vpr_h("%s: De-activate subcache %s\n", __func__, sinfo->name);
  807. rc = llcc_slice_deactivate(sinfo->subcache);
  808. if (rc) {
  809. d_vpr_e("Failed to de-activate %s: %d\n",
  810. sinfo->name, rc);
  811. }
  812. sinfo->isactive = false;
  813. }
  814. return 0;
  815. }
  816. static int __enable_subcaches(struct msm_vidc_core *core)
  817. {
  818. int rc = 0;
  819. u32 c = 0;
  820. struct subcache_info *sinfo;
  821. if (msm_vidc_syscache_disable || !is_sys_cache_present(core))
  822. return 0;
  823. /* Activate subcaches */
  824. venus_hfi_for_each_subcache(core, sinfo) {
  825. rc = llcc_slice_activate(sinfo->subcache);
  826. if (rc) {
  827. d_vpr_e("Failed to activate %s: %d\n", sinfo->name, rc);
  828. __fatal_error(true);
  829. goto err_activate_fail;
  830. }
  831. sinfo->isactive = true;
  832. d_vpr_h("Activated subcache %s\n", sinfo->name);
  833. c++;
  834. }
  835. d_vpr_h("Activated %d Subcaches to Venus\n", c);
  836. return 0;
  837. err_activate_fail:
  838. __disable_subcaches(core);
  839. return rc;
  840. }
  841. static int llcc_enable(struct msm_vidc_core *core, bool enable)
  842. {
  843. int ret;
  844. if (enable)
  845. ret = __enable_subcaches(core);
  846. else
  847. ret = __disable_subcaches(core);
  848. return ret;
  849. }
  850. static int __vote_bandwidth(struct bus_info *bus, unsigned long bw_kbps)
  851. {
  852. int rc = 0;
  853. if (!bus->icc) {
  854. d_vpr_e("%s: invalid bus\n", __func__);
  855. return -EINVAL;
  856. }
  857. d_vpr_p("Voting bus %s to ab %lu kBps\n", bus->name, bw_kbps);
  858. rc = icc_set_bw(bus->icc, bw_kbps, 0);
  859. if (rc)
  860. d_vpr_e("Failed voting bus %s to ab %lu, rc=%d\n",
  861. bus->name, bw_kbps, rc);
  862. return rc;
  863. }
  864. static int __unvote_buses(struct msm_vidc_core *core)
  865. {
  866. int rc = 0;
  867. struct bus_info *bus = NULL;
  868. if (!core) {
  869. d_vpr_e("%s: invalid params\n", __func__);
  870. return -EINVAL;
  871. }
  872. core->power.bw_ddr = 0;
  873. core->power.bw_llcc = 0;
  874. venus_hfi_for_each_bus(core, bus) {
  875. rc = __vote_bandwidth(bus, 0);
  876. if (rc)
  877. goto err_unknown_device;
  878. }
  879. err_unknown_device:
  880. return rc;
  881. }
  882. static int __vote_buses(struct msm_vidc_core *core,
  883. unsigned long bw_ddr, unsigned long bw_llcc)
  884. {
  885. int rc = 0;
  886. struct bus_info *bus = NULL;
  887. unsigned long bw_kbps = 0, bw_prev = 0;
  888. enum vidc_bus_type type;
  889. if (!core) {
  890. d_vpr_e("%s: invalid params\n", __func__);
  891. return -EINVAL;
  892. }
  893. venus_hfi_for_each_bus(core, bus) {
  894. if (bus && bus->icc) {
  895. type = get_type_frm_name(bus->name);
  896. if (type == DDR) {
  897. bw_kbps = bw_ddr;
  898. bw_prev = core->power.bw_ddr;
  899. } else if (type == LLCC) {
  900. bw_kbps = bw_llcc;
  901. bw_prev = core->power.bw_llcc;
  902. } else {
  903. bw_kbps = bus->max_kbps;
  904. bw_prev = core->power.bw_ddr ?
  905. bw_kbps : 0;
  906. }
  907. /* ensure freq is within limits */
  908. bw_kbps = clamp_t(typeof(bw_kbps), bw_kbps,
  909. bus->min_kbps, bus->max_kbps);
  910. if (TRIVIAL_BW_CHANGE(bw_kbps, bw_prev) && bw_prev) {
  911. d_vpr_l("Skip voting bus %s to %lu kBps\n",
  912. bus->name, bw_kbps);
  913. continue;
  914. }
  915. rc = __vote_bandwidth(bus, bw_kbps);
  916. if (type == DDR)
  917. core->power.bw_ddr = bw_kbps;
  918. else if (type == LLCC)
  919. core->power.bw_llcc = bw_kbps;
  920. } else {
  921. d_vpr_e("No BUS to Vote\n");
  922. }
  923. }
  924. return rc;
  925. }
  926. static int set_bw(struct msm_vidc_core *core, unsigned long bw_ddr,
  927. unsigned long bw_llcc)
  928. {
  929. if (!bw_ddr && !bw_llcc)
  930. return __unvote_buses(core);
  931. return __vote_buses(core, bw_ddr, bw_llcc);
  932. }
  933. static int print_residency_stats(struct msm_vidc_core *core, struct clock_info *cl)
  934. {
  935. struct clock_residency *residency = NULL;
  936. u64 total_time_us = 0;
  937. int rc = 0;
  938. if (!core || !cl) {
  939. d_vpr_e("%s: invalid params\n", __func__);
  940. return -EINVAL;
  941. }
  942. /* skip if scaling not supported */
  943. if (!cl->has_scaling)
  944. return 0;
  945. /* grand total residency time */
  946. list_for_each_entry(residency, &cl->residency_list, list)
  947. total_time_us += residency->total_time_us;
  948. /* sanity check to avoid divide by 0 */
  949. total_time_us = (total_time_us > 0) ? total_time_us : 1;
  950. /* print residency percent for each clock */
  951. list_for_each_entry(residency, &cl->residency_list, list) {
  952. d_vpr_h("%s: %s clock rate [%d] total %lluus residency %u%%\n",
  953. __func__, cl->name, residency->rate, residency->total_time_us,
  954. residency->total_time_us * 100 / total_time_us);
  955. }
  956. return rc;
  957. }
  958. static int reset_residency_stats(struct msm_vidc_core *core, struct clock_info *cl)
  959. {
  960. struct clock_residency *residency = NULL;
  961. int rc = 0;
  962. if (!core || !cl) {
  963. d_vpr_e("%s: invalid params\n", __func__);
  964. return -EINVAL;
  965. }
  966. /* skip if scaling not supported */
  967. if (!cl->has_scaling)
  968. return 0;
  969. d_vpr_h("%s: reset %s residency stats\n", __func__, cl->name);
  970. /* reset clock residency stats */
  971. list_for_each_entry(residency, &cl->residency_list, list) {
  972. residency->start_time_us = 0;
  973. residency->total_time_us = 0;
  974. }
  975. return rc;
  976. }
  977. static struct clock_residency *get_residency_stats(struct clock_info *cl, u64 rate)
  978. {
  979. struct clock_residency *residency = NULL;
  980. bool found = false;
  981. if (!cl) {
  982. d_vpr_e("%s: invalid params\n", __func__);
  983. return NULL;
  984. }
  985. list_for_each_entry(residency, &cl->residency_list, list) {
  986. if (residency->rate == rate) {
  987. found = true;
  988. break;
  989. }
  990. }
  991. return found ? residency : NULL;
  992. }
  993. static int update_residency_stats(
  994. struct msm_vidc_core *core, struct clock_info *cl, u64 rate)
  995. {
  996. struct clock_residency *cur_residency = NULL, *prev_residency = NULL;
  997. u64 cur_time_us = 0;
  998. int rc = 0;
  999. if (!core || !cl) {
  1000. d_vpr_e("%s: invalid params\n", __func__);
  1001. return -EINVAL;
  1002. }
  1003. /* skip update if scaling not supported */
  1004. if (!cl->has_scaling)
  1005. return 0;
  1006. /* skip update if rate not changed */
  1007. if (rate == cl->prev)
  1008. return 0;
  1009. /* get current time in ns */
  1010. cur_time_us = ktime_get_ns() / 1000;
  1011. /* update previous rate residency end or total time */
  1012. prev_residency = get_residency_stats(cl, cl->prev);
  1013. if (prev_residency) {
  1014. if (prev_residency->start_time_us)
  1015. prev_residency->total_time_us = cur_time_us - prev_residency->start_time_us;
  1016. /* reset start time us */
  1017. prev_residency->start_time_us = 0;
  1018. }
  1019. /* clk disable case - no need to update new entry */
  1020. if (rate == 0)
  1021. return 0;
  1022. /* check if rate entry is present */
  1023. cur_residency = get_residency_stats(cl, rate);
  1024. if (!cur_residency) {
  1025. d_vpr_e("%s: entry not found. rate %llu\n", __func__, rate);
  1026. return -EINVAL;
  1027. }
  1028. /* update residency start time for current rate/freq */
  1029. cur_residency->start_time_us = cur_time_us;
  1030. return rc;
  1031. }
  1032. #ifdef CONFIG_MSM_MMRM
  1033. static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl,
  1034. u64 rate)
  1035. {
  1036. int rc = 0;
  1037. struct mmrm_client_data client_data;
  1038. struct mmrm_client *client;
  1039. u64 srate;
  1040. /* not registered */
  1041. if (!core || !cl || !core->platform) {
  1042. d_vpr_e("%s: invalid params\n", __func__);
  1043. return -EINVAL;
  1044. }
  1045. if (is_mmrm_supported(core) && !cl->mmrm_client) {
  1046. d_vpr_e("%s: invalid mmrm client\n", __func__);
  1047. return -EINVAL;
  1048. }
  1049. /* update clock residency stats */
  1050. update_residency_stats(core, cl, rate);
  1051. /*
  1052. * This conversion is necessary since we are scaling clock values based on
  1053. * the branch clock. However, mmrm driver expects source clock to be registered
  1054. * and used for scaling.
  1055. * TODO: Remove this scaling if using source clock instead of branch clock.
  1056. */
  1057. srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO;
  1058. /* bail early if requested clk rate is not changed */
  1059. if (rate == cl->prev)
  1060. return 0;
  1061. d_vpr_p("Scaling clock %s to %llu, prev %llu\n",
  1062. cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO);
  1063. if (is_mmrm_supported(core)) {
  1064. /* set clock rate to mmrm driver */
  1065. client = cl->mmrm_client;
  1066. memset(&client_data, 0, sizeof(client_data));
  1067. client_data.num_hw_blocks = 1;
  1068. rc = mmrm_client_set_value(client, &client_data, srate);
  1069. if (rc) {
  1070. d_vpr_e("%s: Failed to set mmrm clock rate %llu %s: %d\n",
  1071. __func__, srate, cl->name, rc);
  1072. return rc;
  1073. }
  1074. } else {
  1075. /* set clock rate to clock driver */
  1076. rc = clk_set_rate(cl->clk, srate);
  1077. if (rc) {
  1078. d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n",
  1079. __func__, srate, cl->name, rc);
  1080. return rc;
  1081. }
  1082. }
  1083. cl->prev = rate;
  1084. return rc;
  1085. }
  1086. #else
  1087. static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl,
  1088. u64 rate)
  1089. {
  1090. u64 srate;
  1091. int rc = 0;
  1092. /* not registered */
  1093. if (!core || !cl || !core->capabilities) {
  1094. d_vpr_e("%s: invalid params\n", __func__);
  1095. return -EINVAL;
  1096. }
  1097. /* update clock residency stats */
  1098. update_residency_stats(core, cl, rate);
  1099. /*
  1100. * This conversion is necessary since we are scaling clock values based on
  1101. * the branch clock. However, mmrm driver expects source clock to be registered
  1102. * and used for scaling.
  1103. * TODO: Remove this scaling if using source clock instead of branch clock.
  1104. */
  1105. srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO;
  1106. /* bail early if requested clk rate is not changed */
  1107. if (rate == cl->prev)
  1108. return 0;
  1109. d_vpr_p("Scaling clock %s to %llu, prev %llu\n",
  1110. cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO);
  1111. rc = clk_set_rate(cl->clk, srate);
  1112. if (rc) {
  1113. d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n",
  1114. __func__, srate, cl->name, rc);
  1115. return rc;
  1116. }
  1117. cl->prev = rate;
  1118. return rc;
  1119. }
  1120. #endif
  1121. static int __set_clocks(struct msm_vidc_core *core, u64 freq)
  1122. {
  1123. int rc = 0;
  1124. struct clock_info *cl;
  1125. venus_hfi_for_each_clock(core, cl) {
  1126. if (cl->has_scaling) {
  1127. rc = __set_clk_rate(core, cl, freq);
  1128. if (rc)
  1129. return rc;
  1130. }
  1131. }
  1132. return 0;
  1133. }
  1134. static int __disable_unprepare_clock(struct msm_vidc_core *core,
  1135. const char *clk_name)
  1136. {
  1137. int rc = 0;
  1138. struct clock_info *cl;
  1139. bool found;
  1140. if (!core || !clk_name) {
  1141. d_vpr_e("%s: invalid params\n", __func__);
  1142. return -EINVAL;
  1143. }
  1144. found = false;
  1145. venus_hfi_for_each_clock(core, cl) {
  1146. if (!cl->clk) {
  1147. d_vpr_e("%s: invalid clock %s\n", __func__, cl->name);
  1148. return -EINVAL;
  1149. }
  1150. if (strcmp(cl->name, clk_name))
  1151. continue;
  1152. found = true;
  1153. clk_disable_unprepare(cl->clk);
  1154. if (cl->has_scaling)
  1155. __set_clk_rate(core, cl, 0);
  1156. cl->prev = 0;
  1157. d_vpr_h("%s: clock %s disable unprepared\n", __func__, cl->name);
  1158. break;
  1159. }
  1160. if (!found) {
  1161. d_vpr_e("%s: clock %s not found\n", __func__, clk_name);
  1162. return -EINVAL;
  1163. }
  1164. return rc;
  1165. }
  1166. static int __prepare_enable_clock(struct msm_vidc_core *core,
  1167. const char *clk_name)
  1168. {
  1169. int rc = 0;
  1170. struct clock_info *cl;
  1171. bool found;
  1172. u64 rate = 0;
  1173. if (!core || !clk_name) {
  1174. d_vpr_e("%s: invalid params\n", __func__);
  1175. return -EINVAL;
  1176. }
  1177. found = false;
  1178. venus_hfi_for_each_clock(core, cl) {
  1179. if (!cl->clk) {
  1180. d_vpr_e("%s: invalid clock\n", __func__);
  1181. return -EINVAL;
  1182. }
  1183. if (strcmp(cl->name, clk_name))
  1184. continue;
  1185. found = true;
  1186. /*
  1187. * For the clocks we control, set the rate prior to preparing
  1188. * them. Since we don't really have a load at this point, scale
  1189. * it to the lowest frequency possible
  1190. */
  1191. if (cl->has_scaling) {
  1192. /* reset clk residency stats */
  1193. reset_residency_stats(core, cl);
  1194. rate = clk_round_rate(cl->clk, 0);
  1195. /**
  1196. * source clock is already multipled with scaling ratio and __set_clk_rate
  1197. * attempts to multiply again. So divide scaling ratio before calling
  1198. * __set_clk_rate.
  1199. */
  1200. rate = rate / MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO;
  1201. __set_clk_rate(core, cl, rate);
  1202. }
  1203. rc = clk_prepare_enable(cl->clk);
  1204. if (rc) {
  1205. d_vpr_e("%s: failed to enable clock %s\n",
  1206. __func__, cl->name);
  1207. return rc;
  1208. }
  1209. if (!__clk_is_enabled(cl->clk)) {
  1210. d_vpr_e("%s: clock %s not enabled\n",
  1211. __func__, cl->name);
  1212. clk_disable_unprepare(cl->clk);
  1213. if (cl->has_scaling)
  1214. __set_clk_rate(core, cl, 0);
  1215. return -EINVAL;
  1216. }
  1217. d_vpr_h("%s: clock %s prepare enabled\n", __func__, cl->name);
  1218. break;
  1219. }
  1220. if (!found) {
  1221. d_vpr_e("%s: clock %s not found\n", __func__, clk_name);
  1222. return -EINVAL;
  1223. }
  1224. return rc;
  1225. }
  1226. static int __init_resources(struct msm_vidc_core *core)
  1227. {
  1228. int rc = 0;
  1229. rc = __init_register_base(core);
  1230. if (rc)
  1231. return rc;
  1232. rc = __init_irq(core);
  1233. if (rc)
  1234. return rc;
  1235. rc = __init_bus(core);
  1236. if (rc)
  1237. return rc;
  1238. rc = __init_regulators(core);
  1239. if (rc)
  1240. return rc;
  1241. rc = __init_clocks(core);
  1242. if (rc)
  1243. return rc;
  1244. rc = __init_reset_clocks(core);
  1245. if (rc)
  1246. return rc;
  1247. rc = __init_subcaches(core);
  1248. if (rc)
  1249. return rc;
  1250. rc = __init_freq_table(core);
  1251. if (rc)
  1252. return rc;
  1253. rc = __init_context_banks(core);
  1254. if (rc)
  1255. return rc;
  1256. rc = __register_mmrm(core);
  1257. if (rc)
  1258. return rc;
  1259. return rc;
  1260. }
  1261. static int __reset_control_acquire_name(struct msm_vidc_core *core,
  1262. const char *name)
  1263. {
  1264. struct reset_info *rcinfo = NULL;
  1265. int rc = 0;
  1266. bool found = false;
  1267. venus_hfi_for_each_reset_clock(core, rcinfo) {
  1268. if (strcmp(rcinfo->name, name))
  1269. continue;
  1270. /* this function is valid only for exclusive_release reset clocks*/
  1271. if (!rcinfo->exclusive_release) {
  1272. d_vpr_e("%s: unsupported reset control (%s), exclusive %d\n",
  1273. __func__, name, rcinfo->exclusive_release);
  1274. return -EINVAL;
  1275. }
  1276. found = true;
  1277. rc = reset_control_acquire(rcinfo->rst);
  1278. if (rc)
  1279. d_vpr_e("%s: failed to acquire reset control (%s), rc = %d\n",
  1280. __func__, rcinfo->name, rc);
  1281. else
  1282. d_vpr_h("%s: acquire reset control (%s)\n",
  1283. __func__, rcinfo->name);
  1284. break;
  1285. }
  1286. if (!found) {
  1287. d_vpr_e("%s: reset control (%s) not found\n", __func__, name);
  1288. rc = -EINVAL;
  1289. }
  1290. return rc;
  1291. }
  1292. static int __reset_control_release_name(struct msm_vidc_core *core,
  1293. const char *name)
  1294. {
  1295. struct reset_info *rcinfo = NULL;
  1296. int rc = 0;
  1297. bool found = false;
  1298. venus_hfi_for_each_reset_clock(core, rcinfo) {
  1299. if (strcmp(rcinfo->name, name))
  1300. continue;
  1301. /* this function is valid only for exclusive_release reset clocks*/
  1302. if (!rcinfo->exclusive_release) {
  1303. d_vpr_e("%s: unsupported reset control (%s), exclusive %d\n",
  1304. __func__, name, rcinfo->exclusive_release);
  1305. return -EINVAL;
  1306. }
  1307. found = true;
  1308. reset_control_release(rcinfo->rst);
  1309. d_vpr_h("%s: release reset control (%s)\n", __func__, rcinfo->name);
  1310. break;
  1311. }
  1312. if (!found) {
  1313. d_vpr_e("%s: reset control (%s) not found\n", __func__, name);
  1314. rc = -EINVAL;
  1315. }
  1316. return rc;
  1317. }
  1318. static int __reset_control_assert_name(struct msm_vidc_core *core,
  1319. const char *name)
  1320. {
  1321. struct reset_info *rcinfo = NULL;
  1322. int rc = 0;
  1323. bool found = false;
  1324. venus_hfi_for_each_reset_clock(core, rcinfo) {
  1325. if (strcmp(rcinfo->name, name))
  1326. continue;
  1327. found = true;
  1328. rc = reset_control_assert(rcinfo->rst);
  1329. if (rc)
  1330. d_vpr_e("%s: failed to assert reset control (%s), rc = %d\n",
  1331. __func__, rcinfo->name, rc);
  1332. else
  1333. d_vpr_h("%s: assert reset control (%s)\n",
  1334. __func__, rcinfo->name);
  1335. break;
  1336. }
  1337. if (!found) {
  1338. d_vpr_e("%s: reset control (%s) not found\n", __func__, name);
  1339. rc = -EINVAL;
  1340. }
  1341. return rc;
  1342. }
  1343. static int __reset_control_deassert_name(struct msm_vidc_core *core,
  1344. const char *name)
  1345. {
  1346. struct reset_info *rcinfo = NULL;
  1347. int rc = 0;
  1348. bool found = false;
  1349. venus_hfi_for_each_reset_clock(core, rcinfo) {
  1350. if (strcmp(rcinfo->name, name))
  1351. continue;
  1352. found = true;
  1353. rc = reset_control_deassert(rcinfo->rst);
  1354. if (rc)
  1355. d_vpr_e("%s: deassert reset control for (%s) failed, rc %d\n",
  1356. __func__, rcinfo->name, rc);
  1357. else
  1358. d_vpr_h("%s: deassert reset control (%s)\n",
  1359. __func__, rcinfo->name);
  1360. break;
  1361. }
  1362. if (!found) {
  1363. d_vpr_e("%s: reset control (%s) not found\n", __func__, name);
  1364. rc = -EINVAL;
  1365. }
  1366. return rc;
  1367. }
  1368. static int __reset_control_deassert(struct msm_vidc_core *core)
  1369. {
  1370. struct reset_info *rcinfo = NULL;
  1371. int rc = 0;
  1372. venus_hfi_for_each_reset_clock(core, rcinfo) {
  1373. rc = reset_control_deassert(rcinfo->rst);
  1374. if (rc) {
  1375. d_vpr_e("%s: deassert reset control failed. rc = %d\n", __func__, rc);
  1376. continue;
  1377. }
  1378. d_vpr_h("%s: deassert reset control %s\n", __func__, rcinfo->name);
  1379. }
  1380. return rc;
  1381. }
  1382. static int __reset_control_assert(struct msm_vidc_core *core)
  1383. {
  1384. struct reset_info *rcinfo = NULL;
  1385. int rc = 0, cnt = 0;
  1386. venus_hfi_for_each_reset_clock(core, rcinfo) {
  1387. if (!rcinfo->rst) {
  1388. d_vpr_e("%s: invalid reset clock %s\n",
  1389. __func__, rcinfo->name);
  1390. return -EINVAL;
  1391. }
  1392. rc = reset_control_assert(rcinfo->rst);
  1393. if (rc) {
  1394. d_vpr_e("%s: failed to assert reset control %s, rc = %d\n",
  1395. __func__, rcinfo->name, rc);
  1396. goto deassert_reset_control;
  1397. }
  1398. cnt++;
  1399. d_vpr_h("%s: assert reset control %s, count %d\n", __func__, rcinfo->name, cnt);
  1400. usleep_range(1000, 1100);
  1401. }
  1402. return rc;
  1403. deassert_reset_control:
  1404. venus_hfi_for_each_reset_clock_reverse_continue(core, rcinfo, cnt) {
  1405. d_vpr_e("%s: deassert reset control %s\n", __func__, rcinfo->name);
  1406. reset_control_deassert(rcinfo->rst);
  1407. }
  1408. return rc;
  1409. }
  1410. static int __reset_ahb2axi_bridge(struct msm_vidc_core *core)
  1411. {
  1412. int rc = 0;
  1413. rc = __reset_control_assert(core);
  1414. if (rc)
  1415. return rc;
  1416. rc = __reset_control_deassert(core);
  1417. if (rc)
  1418. return rc;
  1419. return rc;
  1420. }
  1421. static int __print_clock_residency_stats(struct msm_vidc_core *core)
  1422. {
  1423. struct clock_info *cl;
  1424. int rc = 0;
  1425. if (!core) {
  1426. d_vpr_e("%s: invalid params\n", __func__);
  1427. return -EINVAL;
  1428. }
  1429. venus_hfi_for_each_clock(core, cl) {
  1430. /* skip if scaling not supported */
  1431. if (!cl->has_scaling)
  1432. continue;
  1433. /* print clock residency stats */
  1434. print_residency_stats(core, cl);
  1435. }
  1436. return rc;
  1437. }
  1438. static int __reset_clock_residency_stats(struct msm_vidc_core *core)
  1439. {
  1440. struct clock_info *cl;
  1441. int rc = 0;
  1442. if (!core) {
  1443. d_vpr_e("%s: invalid params\n", __func__);
  1444. return -EINVAL;
  1445. }
  1446. venus_hfi_for_each_clock(core, cl) {
  1447. /* skip if scaling not supported */
  1448. if (!cl->has_scaling)
  1449. continue;
  1450. /* reset clock residency stats */
  1451. reset_residency_stats(core, cl);
  1452. }
  1453. return rc;
  1454. }
  1455. static const struct msm_vidc_resources_ops res_ops = {
  1456. .init = __init_resources,
  1457. .reset_bridge = __reset_ahb2axi_bridge,
  1458. .reset_control_acquire = __reset_control_acquire_name,
  1459. .reset_control_release = __reset_control_release_name,
  1460. .reset_control_assert = __reset_control_assert_name,
  1461. .reset_control_deassert = __reset_control_deassert_name,
  1462. .gdsc_on = __enable_regulator,
  1463. .gdsc_off = __disable_regulator,
  1464. .gdsc_hw_ctrl = __hand_off_regulators,
  1465. .gdsc_sw_ctrl = __acquire_regulators,
  1466. .llcc = llcc_enable,
  1467. .set_bw = set_bw,
  1468. .set_clks = __set_clocks,
  1469. .clk_enable = __prepare_enable_clock,
  1470. .clk_disable = __disable_unprepare_clock,
  1471. .clk_set_flag = __clock_set_flag,
  1472. .clk_print_residency_stats = __print_clock_residency_stats,
  1473. .clk_reset_residency_stats = __reset_clock_residency_stats,
  1474. };
  1475. const struct msm_vidc_resources_ops *get_resources_ops(void)
  1476. {
  1477. return &res_ops;
  1478. }