dsi_panel.c 104 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "msm-dsi-panel:[%s:%d] " fmt, __func__, __LINE__
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. /**
  16. * topology is currently defined by a set of following 3 values:
  17. * 1. num of layer mixers
  18. * 2. num of compression encoders
  19. * 3. num of interfaces
  20. */
  21. #define TOPOLOGY_SET_LEN 3
  22. #define MAX_TOPOLOGY 5
  23. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  24. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  25. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  26. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  27. #define MAX_PANEL_JITTER 10
  28. #define DEFAULT_PANEL_PREFILL_LINES 25
  29. enum dsi_dsc_ratio_type {
  30. DSC_8BPC_8BPP,
  31. DSC_10BPC_8BPP,
  32. DSC_12BPC_8BPP,
  33. DSC_10BPC_10BPP,
  34. DSC_RATIO_TYPE_MAX
  35. };
  36. static u32 dsi_dsc_rc_buf_thresh[] = {0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54,
  37. 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e};
  38. /*
  39. * DSC 1.1
  40. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  41. */
  42. static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
  43. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
  44. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
  45. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
  46. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  47. };
  48. /*
  49. * DSC 1.1 SCR
  50. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  51. */
  52. static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
  53. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
  54. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
  55. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
  56. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  57. };
  58. /*
  59. * DSC 1.1
  60. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  61. */
  62. static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
  63. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
  64. {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
  65. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
  66. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  67. };
  68. /*
  69. * DSC 1.1 SCR
  70. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  71. */
  72. static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
  73. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
  74. {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
  75. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
  76. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  77. };
  78. /*
  79. * DSC 1.1 and DSC 1.1 SCR
  80. * Rate control - bpg offset values
  81. */
  82. static char dsi_dsc_rc_range_bpg_offset[] = {2, 0, 0, -2, -4, -6, -8, -8,
  83. -8, -10, -10, -12, -12, -12, -12};
  84. int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc, char *buf,
  85. int pps_id)
  86. {
  87. char *bp;
  88. char data;
  89. int i, bpp;
  90. char *dbgbp;
  91. dbgbp = buf;
  92. bp = buf;
  93. /* First 7 bytes are cmd header */
  94. *bp++ = 0x0A;
  95. *bp++ = 1;
  96. *bp++ = 0;
  97. *bp++ = 0;
  98. *bp++ = 10;
  99. *bp++ = 0;
  100. *bp++ = 128;
  101. *bp++ = (dsc->version & 0xff); /* pps0 */
  102. *bp++ = (pps_id & 0xff); /* pps1 */
  103. bp++; /* pps2, reserved */
  104. data = dsc->line_buf_depth & 0x0f;
  105. data |= ((dsc->bpc & 0xf) << 4);
  106. *bp++ = data; /* pps3 */
  107. bpp = dsc->bpp;
  108. bpp <<= 4; /* 4 fraction bits */
  109. data = (bpp >> 8);
  110. data &= 0x03; /* upper two bits */
  111. data |= ((dsc->block_pred_enable & 0x1) << 5);
  112. data |= ((dsc->convert_rgb & 0x1) << 4);
  113. data |= ((dsc->enable_422 & 0x1) << 3);
  114. data |= ((dsc->vbr_enable & 0x1) << 2);
  115. *bp++ = data; /* pps4 */
  116. *bp++ = (bpp & 0xff); /* pps5 */
  117. *bp++ = ((dsc->pic_height >> 8) & 0xff); /* pps6 */
  118. *bp++ = (dsc->pic_height & 0x0ff); /* pps7 */
  119. *bp++ = ((dsc->pic_width >> 8) & 0xff); /* pps8 */
  120. *bp++ = (dsc->pic_width & 0x0ff); /* pps9 */
  121. *bp++ = ((dsc->slice_height >> 8) & 0xff);/* pps10 */
  122. *bp++ = (dsc->slice_height & 0x0ff); /* pps11 */
  123. *bp++ = ((dsc->slice_width >> 8) & 0xff); /* pps12 */
  124. *bp++ = (dsc->slice_width & 0x0ff); /* pps13 */
  125. *bp++ = ((dsc->chunk_size >> 8) & 0xff);/* pps14 */
  126. *bp++ = (dsc->chunk_size & 0x0ff); /* pps15 */
  127. *bp++ = (dsc->initial_xmit_delay >> 8) & 0x3; /* pps16, bit 0, 1 */
  128. *bp++ = (dsc->initial_xmit_delay & 0xff);/* pps17 */
  129. *bp++ = ((dsc->initial_dec_delay >> 8) & 0xff); /* pps18 */
  130. *bp++ = (dsc->initial_dec_delay & 0xff);/* pps19 */
  131. bp++; /* pps20, reserved */
  132. *bp++ = (dsc->initial_scale_value & 0x3f); /* pps21 */
  133. *bp++ = ((dsc->scale_increment_interval >> 8) & 0xff); /* pps22 */
  134. *bp++ = (dsc->scale_increment_interval & 0xff); /* pps23 */
  135. *bp++ = ((dsc->scale_decrement_interval >> 8) & 0xf); /* pps24 */
  136. *bp++ = (dsc->scale_decrement_interval & 0x0ff);/* pps25 */
  137. bp++; /* pps26, reserved */
  138. *bp++ = (dsc->first_line_bpg_offset & 0x1f);/* pps27 */
  139. *bp++ = ((dsc->nfl_bpg_offset >> 8) & 0xff);/* pps28 */
  140. *bp++ = (dsc->nfl_bpg_offset & 0x0ff); /* pps29 */
  141. *bp++ = ((dsc->slice_bpg_offset >> 8) & 0xff);/* pps30 */
  142. *bp++ = (dsc->slice_bpg_offset & 0x0ff);/* pps31 */
  143. *bp++ = ((dsc->initial_offset >> 8) & 0xff);/* pps32 */
  144. *bp++ = (dsc->initial_offset & 0x0ff); /* pps33 */
  145. *bp++ = ((dsc->final_offset >> 8) & 0xff);/* pps34 */
  146. *bp++ = (dsc->final_offset & 0x0ff); /* pps35 */
  147. *bp++ = (dsc->min_qp_flatness & 0x1f); /* pps36 */
  148. *bp++ = (dsc->max_qp_flatness & 0x1f); /* pps37 */
  149. *bp++ = ((dsc->rc_model_size >> 8) & 0xff);/* pps38 */
  150. *bp++ = (dsc->rc_model_size & 0x0ff); /* pps39 */
  151. *bp++ = (dsc->edge_factor & 0x0f); /* pps40 */
  152. *bp++ = (dsc->quant_incr_limit0 & 0x1f); /* pps41 */
  153. *bp++ = (dsc->quant_incr_limit1 & 0x1f); /* pps42 */
  154. data = ((dsc->tgt_offset_hi & 0xf) << 4);
  155. data |= (dsc->tgt_offset_lo & 0x0f);
  156. *bp++ = data; /* pps43 */
  157. for (i = 0; i < 14; i++)
  158. *bp++ = (dsc->buf_thresh[i] & 0xff); /* pps44 - pps57 */
  159. for (i = 0; i < 15; i++) { /* pps58 - pps87 */
  160. data = (dsc->range_min_qp[i] & 0x1f);
  161. data <<= 3;
  162. data |= ((dsc->range_max_qp[i] >> 2) & 0x07);
  163. *bp++ = data;
  164. data = (dsc->range_max_qp[i] & 0x03);
  165. data <<= 6;
  166. data |= (dsc->range_bpg_offset[i] & 0x3f);
  167. *bp++ = data;
  168. }
  169. return 128;
  170. }
  171. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  172. {
  173. int rc = 0;
  174. int i;
  175. struct regulator *vreg = NULL;
  176. for (i = 0; i < panel->power_info.count; i++) {
  177. vreg = devm_regulator_get(panel->parent,
  178. panel->power_info.vregs[i].vreg_name);
  179. rc = PTR_RET(vreg);
  180. if (rc) {
  181. pr_err("failed to get %s regulator\n",
  182. panel->power_info.vregs[i].vreg_name);
  183. goto error_put;
  184. }
  185. panel->power_info.vregs[i].vreg = vreg;
  186. }
  187. return rc;
  188. error_put:
  189. for (i = i - 1; i >= 0; i--) {
  190. devm_regulator_put(panel->power_info.vregs[i].vreg);
  191. panel->power_info.vregs[i].vreg = NULL;
  192. }
  193. return rc;
  194. }
  195. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  196. {
  197. int rc = 0;
  198. int i;
  199. for (i = panel->power_info.count - 1; i >= 0; i--)
  200. devm_regulator_put(panel->power_info.vregs[i].vreg);
  201. return rc;
  202. }
  203. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  204. {
  205. int rc = 0;
  206. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  207. if (gpio_is_valid(r_config->reset_gpio)) {
  208. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  209. if (rc) {
  210. pr_err("request for reset_gpio failed, rc=%d\n", rc);
  211. goto error;
  212. }
  213. }
  214. if (gpio_is_valid(r_config->disp_en_gpio)) {
  215. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  216. if (rc) {
  217. pr_err("request for disp_en_gpio failed, rc=%d\n", rc);
  218. goto error_release_reset;
  219. }
  220. }
  221. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  222. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  223. if (rc) {
  224. pr_err("request for bklt_en_gpio failed, rc=%d\n", rc);
  225. goto error_release_disp_en;
  226. }
  227. }
  228. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  229. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  230. if (rc) {
  231. pr_err("request for mode_gpio failed, rc=%d\n", rc);
  232. goto error_release_mode_sel;
  233. }
  234. }
  235. if (gpio_is_valid(panel->panel_test_gpio)) {
  236. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  237. if (rc) {
  238. pr_warn("request for panel_test_gpio failed, rc=%d\n",
  239. rc);
  240. panel->panel_test_gpio = -1;
  241. rc = 0;
  242. }
  243. }
  244. goto error;
  245. error_release_mode_sel:
  246. if (gpio_is_valid(panel->bl_config.en_gpio))
  247. gpio_free(panel->bl_config.en_gpio);
  248. error_release_disp_en:
  249. if (gpio_is_valid(r_config->disp_en_gpio))
  250. gpio_free(r_config->disp_en_gpio);
  251. error_release_reset:
  252. if (gpio_is_valid(r_config->reset_gpio))
  253. gpio_free(r_config->reset_gpio);
  254. error:
  255. return rc;
  256. }
  257. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  258. {
  259. int rc = 0;
  260. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  261. if (gpio_is_valid(r_config->reset_gpio))
  262. gpio_free(r_config->reset_gpio);
  263. if (gpio_is_valid(r_config->disp_en_gpio))
  264. gpio_free(r_config->disp_en_gpio);
  265. if (gpio_is_valid(panel->bl_config.en_gpio))
  266. gpio_free(panel->bl_config.en_gpio);
  267. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  268. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  269. if (gpio_is_valid(panel->panel_test_gpio))
  270. gpio_free(panel->panel_test_gpio);
  271. return rc;
  272. }
  273. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  274. {
  275. struct dsi_panel_reset_config *r_config;
  276. if (!panel) {
  277. pr_err("Invalid panel param\n");
  278. return -EINVAL;
  279. }
  280. r_config = &panel->reset_config;
  281. if (!r_config) {
  282. pr_err("Invalid panel reset configuration\n");
  283. return -EINVAL;
  284. }
  285. if (gpio_is_valid(r_config->reset_gpio)) {
  286. gpio_set_value(r_config->reset_gpio, 0);
  287. pr_info("GPIO pulled low to simulate ESD\n");
  288. return 0;
  289. }
  290. pr_err("failed to pull down gpio\n");
  291. return -EINVAL;
  292. }
  293. static int dsi_panel_reset(struct dsi_panel *panel)
  294. {
  295. int rc = 0;
  296. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  297. int i;
  298. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  299. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  300. if (rc) {
  301. pr_err("unable to set dir for disp gpio rc=%d\n", rc);
  302. goto exit;
  303. }
  304. }
  305. if (r_config->count) {
  306. rc = gpio_direction_output(r_config->reset_gpio,
  307. r_config->sequence[0].level);
  308. if (rc) {
  309. pr_err("unable to set dir for rst gpio rc=%d\n", rc);
  310. goto exit;
  311. }
  312. }
  313. for (i = 0; i < r_config->count; i++) {
  314. gpio_set_value(r_config->reset_gpio,
  315. r_config->sequence[i].level);
  316. if (r_config->sequence[i].sleep_ms)
  317. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  318. (r_config->sequence[i].sleep_ms * 1000) + 100);
  319. }
  320. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  321. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  322. if (rc)
  323. pr_err("unable to set dir for bklt gpio rc=%d\n", rc);
  324. }
  325. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  326. bool out = true;
  327. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  328. || (panel->reset_config.mode_sel_state
  329. == MODE_GPIO_LOW))
  330. out = false;
  331. else if ((panel->reset_config.mode_sel_state
  332. == MODE_SEL_SINGLE_PORT) ||
  333. (panel->reset_config.mode_sel_state
  334. == MODE_GPIO_HIGH))
  335. out = true;
  336. rc = gpio_direction_output(
  337. panel->reset_config.lcd_mode_sel_gpio, out);
  338. if (rc)
  339. pr_err("unable to set dir for mode gpio rc=%d\n", rc);
  340. }
  341. if (gpio_is_valid(panel->panel_test_gpio)) {
  342. rc = gpio_direction_input(panel->panel_test_gpio);
  343. if (rc)
  344. pr_warn("unable to set dir for panel test gpio rc=%d\n",
  345. rc);
  346. }
  347. exit:
  348. return rc;
  349. }
  350. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  351. {
  352. int rc = 0;
  353. struct pinctrl_state *state;
  354. if (panel->host_config.ext_bridge_mode)
  355. return 0;
  356. if (enable)
  357. state = panel->pinctrl.active;
  358. else
  359. state = panel->pinctrl.suspend;
  360. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  361. if (rc)
  362. pr_err("[%s] failed to set pin state, rc=%d\n", panel->name,
  363. rc);
  364. return rc;
  365. }
  366. static int dsi_panel_power_on(struct dsi_panel *panel)
  367. {
  368. int rc = 0;
  369. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  370. if (rc) {
  371. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  372. goto exit;
  373. }
  374. rc = dsi_panel_set_pinctrl_state(panel, true);
  375. if (rc) {
  376. pr_err("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  377. goto error_disable_vregs;
  378. }
  379. rc = dsi_panel_reset(panel);
  380. if (rc) {
  381. pr_err("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  382. goto error_disable_gpio;
  383. }
  384. goto exit;
  385. error_disable_gpio:
  386. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  387. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  388. if (gpio_is_valid(panel->bl_config.en_gpio))
  389. gpio_set_value(panel->bl_config.en_gpio, 0);
  390. (void)dsi_panel_set_pinctrl_state(panel, false);
  391. error_disable_vregs:
  392. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  393. exit:
  394. return rc;
  395. }
  396. static int dsi_panel_power_off(struct dsi_panel *panel)
  397. {
  398. int rc = 0;
  399. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  400. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  401. if (gpio_is_valid(panel->reset_config.reset_gpio))
  402. gpio_set_value(panel->reset_config.reset_gpio, 0);
  403. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  404. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  405. rc = dsi_panel_set_pinctrl_state(panel, false);
  406. if (rc) {
  407. pr_err("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  408. rc);
  409. }
  410. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  411. if (rc)
  412. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  413. return rc;
  414. }
  415. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  416. enum dsi_cmd_set_type type)
  417. {
  418. int rc = 0, i = 0;
  419. ssize_t len;
  420. struct dsi_cmd_desc *cmds;
  421. u32 count;
  422. enum dsi_cmd_set_state state;
  423. struct dsi_display_mode *mode;
  424. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  425. if (!panel || !panel->cur_mode)
  426. return -EINVAL;
  427. mode = panel->cur_mode;
  428. cmds = mode->priv_info->cmd_sets[type].cmds;
  429. count = mode->priv_info->cmd_sets[type].count;
  430. state = mode->priv_info->cmd_sets[type].state;
  431. if (count == 0) {
  432. pr_debug("[%s] No commands to be sent for state(%d)\n",
  433. panel->name, type);
  434. goto error;
  435. }
  436. for (i = 0; i < count; i++) {
  437. if (state == DSI_CMD_SET_STATE_LP)
  438. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  439. if (cmds->last_command)
  440. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  441. len = ops->transfer(panel->host, &cmds->msg);
  442. if (len < 0) {
  443. rc = len;
  444. pr_err("failed to set cmds(%d), rc=%d\n", type, rc);
  445. goto error;
  446. }
  447. if (cmds->post_wait_ms)
  448. usleep_range(cmds->post_wait_ms*1000,
  449. ((cmds->post_wait_ms*1000)+10));
  450. cmds++;
  451. }
  452. error:
  453. return rc;
  454. }
  455. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  456. {
  457. int rc = 0;
  458. if (panel->host_config.ext_bridge_mode)
  459. return 0;
  460. devm_pinctrl_put(panel->pinctrl.pinctrl);
  461. return rc;
  462. }
  463. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  464. {
  465. int rc = 0;
  466. if (panel->host_config.ext_bridge_mode)
  467. return 0;
  468. /* TODO: pinctrl is defined in dsi dt node */
  469. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  470. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  471. rc = PTR_ERR(panel->pinctrl.pinctrl);
  472. pr_err("failed to get pinctrl, rc=%d\n", rc);
  473. goto error;
  474. }
  475. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  476. "panel_active");
  477. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  478. rc = PTR_ERR(panel->pinctrl.active);
  479. pr_err("failed to get pinctrl active state, rc=%d\n", rc);
  480. goto error;
  481. }
  482. panel->pinctrl.suspend =
  483. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  484. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  485. rc = PTR_ERR(panel->pinctrl.suspend);
  486. pr_err("failed to get pinctrl suspend state, rc=%d\n", rc);
  487. goto error;
  488. }
  489. error:
  490. return rc;
  491. }
  492. static int dsi_panel_wled_register(struct dsi_panel *panel,
  493. struct dsi_backlight_config *bl)
  494. {
  495. struct backlight_device *bd;
  496. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  497. if (!bd) {
  498. pr_err("[%s] fail raw backlight register\n", panel->name);
  499. return -EPROBE_DEFER;
  500. }
  501. bl->raw_bd = bd;
  502. return 0;
  503. }
  504. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  505. u32 bl_lvl)
  506. {
  507. int rc = 0;
  508. struct mipi_dsi_device *dsi;
  509. if (!panel || (bl_lvl > 0xffff)) {
  510. pr_err("invalid params\n");
  511. return -EINVAL;
  512. }
  513. dsi = &panel->mipi_device;
  514. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  515. if (rc < 0)
  516. pr_err("failed to update dcs backlight:%d\n", bl_lvl);
  517. return rc;
  518. }
  519. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  520. u32 bl_lvl)
  521. {
  522. int rc = 0;
  523. u32 duty = 0;
  524. u32 period_ns = 0;
  525. struct dsi_backlight_config *bl;
  526. if (!panel) {
  527. pr_err("Invalid Params\n");
  528. return -EINVAL;
  529. }
  530. bl = &panel->bl_config;
  531. if (!bl->pwm_bl) {
  532. pr_err("pwm device not found\n");
  533. return -EINVAL;
  534. }
  535. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  536. duty = bl_lvl * period_ns;
  537. duty /= bl->bl_max_level;
  538. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  539. if (rc) {
  540. pr_err("[%s] failed to change pwm config, rc=\n", panel->name,
  541. rc);
  542. goto error;
  543. }
  544. if (bl_lvl == 0 && bl->pwm_enabled) {
  545. pwm_disable(bl->pwm_bl);
  546. bl->pwm_enabled = false;
  547. return 0;
  548. }
  549. if (!bl->pwm_enabled) {
  550. rc = pwm_enable(bl->pwm_bl);
  551. if (rc) {
  552. pr_err("[%s] failed to enable pwm, rc=\n", panel->name,
  553. rc);
  554. goto error;
  555. }
  556. bl->pwm_enabled = true;
  557. }
  558. error:
  559. return rc;
  560. }
  561. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  562. {
  563. int rc = 0;
  564. struct dsi_backlight_config *bl = &panel->bl_config;
  565. if (panel->host_config.ext_bridge_mode)
  566. return 0;
  567. pr_debug("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  568. switch (bl->type) {
  569. case DSI_BACKLIGHT_WLED:
  570. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  571. break;
  572. case DSI_BACKLIGHT_DCS:
  573. rc = dsi_panel_update_backlight(panel, bl_lvl);
  574. break;
  575. case DSI_BACKLIGHT_EXTERNAL:
  576. break;
  577. case DSI_BACKLIGHT_PWM:
  578. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  579. break;
  580. default:
  581. pr_err("Backlight type(%d) not supported\n", bl->type);
  582. rc = -ENOTSUPP;
  583. }
  584. return rc;
  585. }
  586. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  587. {
  588. u32 cur_bl_level;
  589. struct backlight_device *bd = bl->raw_bd;
  590. /* default the brightness level to 50% */
  591. cur_bl_level = bl->bl_max_level >> 1;
  592. switch (bl->type) {
  593. case DSI_BACKLIGHT_WLED:
  594. /* Try to query the backlight level from the backlight device */
  595. if (bd->ops && bd->ops->get_brightness)
  596. cur_bl_level = bd->ops->get_brightness(bd);
  597. break;
  598. case DSI_BACKLIGHT_DCS:
  599. case DSI_BACKLIGHT_EXTERNAL:
  600. case DSI_BACKLIGHT_PWM:
  601. default:
  602. /*
  603. * Ideally, we should read the backlight level from the
  604. * panel. For now, just set it default value.
  605. */
  606. break;
  607. }
  608. pr_debug("cur_bl_level=%d\n", cur_bl_level);
  609. return cur_bl_level;
  610. }
  611. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  612. {
  613. struct dsi_backlight_config *bl = &panel->bl_config;
  614. bl->bl_level = dsi_panel_get_brightness(bl);
  615. }
  616. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  617. {
  618. int rc = 0;
  619. struct dsi_backlight_config *bl = &panel->bl_config;
  620. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  621. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  622. rc = PTR_ERR(bl->pwm_bl);
  623. pr_err("[%s] failed to request pwm, rc=%d\n", panel->name,
  624. rc);
  625. return rc;
  626. }
  627. return 0;
  628. }
  629. static int dsi_panel_bl_register(struct dsi_panel *panel)
  630. {
  631. int rc = 0;
  632. struct dsi_backlight_config *bl = &panel->bl_config;
  633. if (panel->host_config.ext_bridge_mode)
  634. return 0;
  635. switch (bl->type) {
  636. case DSI_BACKLIGHT_WLED:
  637. rc = dsi_panel_wled_register(panel, bl);
  638. break;
  639. case DSI_BACKLIGHT_DCS:
  640. break;
  641. case DSI_BACKLIGHT_EXTERNAL:
  642. break;
  643. case DSI_BACKLIGHT_PWM:
  644. rc = dsi_panel_pwm_register(panel);
  645. break;
  646. default:
  647. pr_err("Backlight type(%d) not supported\n", bl->type);
  648. rc = -ENOTSUPP;
  649. goto error;
  650. }
  651. error:
  652. return rc;
  653. }
  654. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  655. {
  656. struct dsi_backlight_config *bl = &panel->bl_config;
  657. devm_pwm_put(panel->parent, bl->pwm_bl);
  658. }
  659. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  660. {
  661. int rc = 0;
  662. struct dsi_backlight_config *bl = &panel->bl_config;
  663. if (panel->host_config.ext_bridge_mode)
  664. return 0;
  665. switch (bl->type) {
  666. case DSI_BACKLIGHT_WLED:
  667. break;
  668. case DSI_BACKLIGHT_DCS:
  669. break;
  670. case DSI_BACKLIGHT_EXTERNAL:
  671. break;
  672. case DSI_BACKLIGHT_PWM:
  673. dsi_panel_pwm_unregister(panel);
  674. break;
  675. default:
  676. pr_err("Backlight type(%d) not supported\n", bl->type);
  677. rc = -ENOTSUPP;
  678. goto error;
  679. }
  680. error:
  681. return rc;
  682. }
  683. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  684. struct dsi_parser_utils *utils)
  685. {
  686. int rc = 0;
  687. u64 tmp64 = 0;
  688. struct dsi_display_mode *display_mode;
  689. struct dsi_display_mode_priv_info *priv_info;
  690. display_mode = container_of(mode, struct dsi_display_mode, timing);
  691. priv_info = display_mode->priv_info;
  692. rc = utils->read_u64(utils->data,
  693. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  694. if (rc == -EOVERFLOW) {
  695. tmp64 = 0;
  696. rc = utils->read_u32(utils->data,
  697. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  698. }
  699. mode->clk_rate_hz = !rc ? tmp64 : 0;
  700. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  701. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  702. &mode->mdp_transfer_time_us);
  703. if (!rc)
  704. display_mode->priv_info->mdp_transfer_time_us =
  705. mode->mdp_transfer_time_us;
  706. else
  707. display_mode->priv_info->mdp_transfer_time_us = 0;
  708. rc = utils->read_u32(utils->data,
  709. "qcom,mdss-dsi-panel-framerate",
  710. &mode->refresh_rate);
  711. if (rc) {
  712. pr_err("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  713. rc);
  714. goto error;
  715. }
  716. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  717. &mode->h_active);
  718. if (rc) {
  719. pr_err("failed to read qcom,mdss-dsi-panel-width, rc=%d\n", rc);
  720. goto error;
  721. }
  722. rc = utils->read_u32(utils->data,
  723. "qcom,mdss-dsi-h-front-porch",
  724. &mode->h_front_porch);
  725. if (rc) {
  726. pr_err("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  727. rc);
  728. goto error;
  729. }
  730. rc = utils->read_u32(utils->data,
  731. "qcom,mdss-dsi-h-back-porch",
  732. &mode->h_back_porch);
  733. if (rc) {
  734. pr_err("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  735. rc);
  736. goto error;
  737. }
  738. rc = utils->read_u32(utils->data,
  739. "qcom,mdss-dsi-h-pulse-width",
  740. &mode->h_sync_width);
  741. if (rc) {
  742. pr_err("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  743. rc);
  744. goto error;
  745. }
  746. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  747. &mode->h_skew);
  748. if (rc)
  749. pr_err("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n", rc);
  750. pr_debug("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  751. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  752. mode->h_sync_width);
  753. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  754. &mode->v_active);
  755. if (rc) {
  756. pr_err("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  757. rc);
  758. goto error;
  759. }
  760. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  761. &mode->v_back_porch);
  762. if (rc) {
  763. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  764. rc);
  765. goto error;
  766. }
  767. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  768. &mode->v_front_porch);
  769. if (rc) {
  770. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  771. rc);
  772. goto error;
  773. }
  774. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  775. &mode->v_sync_width);
  776. if (rc) {
  777. pr_err("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  778. rc);
  779. goto error;
  780. }
  781. pr_debug("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  782. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  783. mode->v_sync_width);
  784. error:
  785. return rc;
  786. }
  787. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  788. struct dsi_parser_utils *utils,
  789. const char *name)
  790. {
  791. int rc = 0;
  792. u32 bpp = 0;
  793. enum dsi_pixel_format fmt;
  794. const char *packing;
  795. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  796. if (rc) {
  797. pr_err("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  798. name, rc);
  799. return rc;
  800. }
  801. host->bpp = bpp;
  802. switch (bpp) {
  803. case 3:
  804. fmt = DSI_PIXEL_FORMAT_RGB111;
  805. break;
  806. case 8:
  807. fmt = DSI_PIXEL_FORMAT_RGB332;
  808. break;
  809. case 12:
  810. fmt = DSI_PIXEL_FORMAT_RGB444;
  811. break;
  812. case 16:
  813. fmt = DSI_PIXEL_FORMAT_RGB565;
  814. break;
  815. case 18:
  816. fmt = DSI_PIXEL_FORMAT_RGB666;
  817. break;
  818. case 24:
  819. default:
  820. fmt = DSI_PIXEL_FORMAT_RGB888;
  821. break;
  822. }
  823. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  824. packing = utils->get_property(utils->data,
  825. "qcom,mdss-dsi-pixel-packing",
  826. NULL);
  827. if (packing && !strcmp(packing, "loose"))
  828. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  829. }
  830. host->dst_format = fmt;
  831. return rc;
  832. }
  833. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  834. struct dsi_parser_utils *utils,
  835. const char *name)
  836. {
  837. int rc = 0;
  838. bool lane_enabled;
  839. u32 num_of_lanes = 0;
  840. lane_enabled = utils->read_bool(utils->data,
  841. "qcom,mdss-dsi-lane-0-state");
  842. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  843. lane_enabled = utils->read_bool(utils->data,
  844. "qcom,mdss-dsi-lane-1-state");
  845. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  846. lane_enabled = utils->read_bool(utils->data,
  847. "qcom,mdss-dsi-lane-2-state");
  848. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  849. lane_enabled = utils->read_bool(utils->data,
  850. "qcom,mdss-dsi-lane-3-state");
  851. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  852. if (host->data_lanes & DSI_DATA_LANE_0)
  853. num_of_lanes++;
  854. if (host->data_lanes & DSI_DATA_LANE_1)
  855. num_of_lanes++;
  856. if (host->data_lanes & DSI_DATA_LANE_2)
  857. num_of_lanes++;
  858. if (host->data_lanes & DSI_DATA_LANE_3)
  859. num_of_lanes++;
  860. host->num_data_lanes = num_of_lanes;
  861. if (host->data_lanes == 0) {
  862. pr_err("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  863. rc = -EINVAL;
  864. }
  865. return rc;
  866. }
  867. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  868. struct dsi_parser_utils *utils,
  869. const char *name)
  870. {
  871. int rc = 0;
  872. const char *swap_mode;
  873. swap_mode = utils->get_property(utils->data,
  874. "qcom,mdss-dsi-color-order", NULL);
  875. if (swap_mode) {
  876. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  877. host->swap_mode = DSI_COLOR_SWAP_RGB;
  878. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  879. host->swap_mode = DSI_COLOR_SWAP_RBG;
  880. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  881. host->swap_mode = DSI_COLOR_SWAP_BRG;
  882. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  883. host->swap_mode = DSI_COLOR_SWAP_GRB;
  884. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  885. host->swap_mode = DSI_COLOR_SWAP_GBR;
  886. } else {
  887. pr_err("[%s] Unrecognized color order-%s\n",
  888. name, swap_mode);
  889. rc = -EINVAL;
  890. }
  891. } else {
  892. pr_debug("[%s] Falling back to default color order\n", name);
  893. host->swap_mode = DSI_COLOR_SWAP_RGB;
  894. }
  895. /* bit swap on color channel is not defined in dt */
  896. host->bit_swap_red = false;
  897. host->bit_swap_green = false;
  898. host->bit_swap_blue = false;
  899. return rc;
  900. }
  901. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  902. struct dsi_parser_utils *utils,
  903. const char *name)
  904. {
  905. const char *trig;
  906. int rc = 0;
  907. trig = utils->get_property(utils->data,
  908. "qcom,mdss-dsi-mdp-trigger", NULL);
  909. if (trig) {
  910. if (!strcmp(trig, "none")) {
  911. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  912. } else if (!strcmp(trig, "trigger_te")) {
  913. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  914. } else if (!strcmp(trig, "trigger_sw")) {
  915. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  916. } else if (!strcmp(trig, "trigger_sw_te")) {
  917. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  918. } else {
  919. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  920. name, trig);
  921. rc = -EINVAL;
  922. }
  923. } else {
  924. pr_debug("[%s] Falling back to default MDP trigger\n",
  925. name);
  926. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  927. }
  928. trig = utils->get_property(utils->data,
  929. "qcom,mdss-dsi-dma-trigger", NULL);
  930. if (trig) {
  931. if (!strcmp(trig, "none")) {
  932. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  933. } else if (!strcmp(trig, "trigger_te")) {
  934. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  935. } else if (!strcmp(trig, "trigger_sw")) {
  936. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  937. } else if (!strcmp(trig, "trigger_sw_seof")) {
  938. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  939. } else if (!strcmp(trig, "trigger_sw_te")) {
  940. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  941. } else {
  942. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  943. name, trig);
  944. rc = -EINVAL;
  945. }
  946. } else {
  947. pr_debug("[%s] Falling back to default MDP trigger\n", name);
  948. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  949. }
  950. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  951. &host->te_mode);
  952. if (rc) {
  953. pr_warn("[%s] fallback to default te-pin-select\n", name);
  954. host->te_mode = 1;
  955. rc = 0;
  956. }
  957. return rc;
  958. }
  959. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  960. struct dsi_parser_utils *utils,
  961. const char *name)
  962. {
  963. u32 val = 0;
  964. int rc = 0;
  965. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  966. if (!rc) {
  967. host->t_clk_post = val;
  968. pr_debug("[%s] t_clk_post = %d\n", name, val);
  969. }
  970. val = 0;
  971. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  972. if (!rc) {
  973. host->t_clk_pre = val;
  974. pr_debug("[%s] t_clk_pre = %d\n", name, val);
  975. }
  976. host->ignore_rx_eot = utils->read_bool(utils->data,
  977. "qcom,mdss-dsi-rx-eot-ignore");
  978. host->append_tx_eot = utils->read_bool(utils->data,
  979. "qcom,mdss-dsi-tx-eot-append");
  980. host->ext_bridge_mode = utils->read_bool(utils->data,
  981. "qcom,mdss-dsi-ext-bridge-mode");
  982. host->force_hs_clk_lane = utils->read_bool(utils->data,
  983. "qcom,mdss-dsi-force-clock-lane-hs");
  984. return 0;
  985. }
  986. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  987. struct dsi_parser_utils *utils,
  988. const char *name)
  989. {
  990. int rc = 0;
  991. u32 val = 0;
  992. bool supported = false;
  993. struct dsi_split_link_config *split_link = &host->split_link;
  994. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  995. if (!supported) {
  996. pr_debug("[%s] Split link is not supported\n", name);
  997. split_link->split_link_enabled = false;
  998. return;
  999. }
  1000. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1001. if (rc || val < 1) {
  1002. pr_debug("[%s] Using default sublinks count\n", name);
  1003. split_link->num_sublinks = 2;
  1004. } else {
  1005. split_link->num_sublinks = val;
  1006. }
  1007. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1008. if (rc || val < 1) {
  1009. pr_debug("[%s] Using default lanes per sublink\n", name);
  1010. split_link->lanes_per_sublink = 2;
  1011. } else {
  1012. split_link->lanes_per_sublink = val;
  1013. }
  1014. pr_debug("[%s] Split link is supported %d-%d\n", name,
  1015. split_link->num_sublinks, split_link->lanes_per_sublink);
  1016. split_link->split_link_enabled = true;
  1017. }
  1018. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1019. {
  1020. int rc = 0;
  1021. struct dsi_parser_utils *utils = &panel->utils;
  1022. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1023. panel->name);
  1024. if (rc) {
  1025. pr_err("[%s] failed to get pixel format, rc=%d\n",
  1026. panel->name, rc);
  1027. goto error;
  1028. }
  1029. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1030. panel->name);
  1031. if (rc) {
  1032. pr_err("[%s] failed to parse lane states, rc=%d\n",
  1033. panel->name, rc);
  1034. goto error;
  1035. }
  1036. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1037. panel->name);
  1038. if (rc) {
  1039. pr_err("[%s] failed to parse color swap config, rc=%d\n",
  1040. panel->name, rc);
  1041. goto error;
  1042. }
  1043. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1044. panel->name);
  1045. if (rc) {
  1046. pr_err("[%s] failed to parse triggers, rc=%d\n",
  1047. panel->name, rc);
  1048. goto error;
  1049. }
  1050. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1051. panel->name);
  1052. if (rc) {
  1053. pr_err("[%s] failed to parse misc host config, rc=%d\n",
  1054. panel->name, rc);
  1055. goto error;
  1056. }
  1057. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1058. panel->name);
  1059. error:
  1060. return rc;
  1061. }
  1062. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1063. struct device_node *of_node)
  1064. {
  1065. int rc = 0;
  1066. u32 val = 0;
  1067. rc = of_property_read_u32(of_node,
  1068. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1069. &val);
  1070. if (rc)
  1071. pr_err("[%s] qsync min fps not defined rc:%d\n",
  1072. panel->name, rc);
  1073. panel->qsync_min_fps = val;
  1074. return rc;
  1075. }
  1076. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1077. {
  1078. int rc = 0;
  1079. bool supported = false;
  1080. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1081. struct dsi_parser_utils *utils = &panel->utils;
  1082. const char *name = panel->name;
  1083. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1084. if (!supported) {
  1085. dyn_clk_caps->dyn_clk_support = false;
  1086. return rc;
  1087. }
  1088. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1089. "qcom,dsi-dyn-clk-list");
  1090. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1091. pr_err("[%s] failed to get supported bit clk list\n", name);
  1092. return -EINVAL;
  1093. }
  1094. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1095. sizeof(u32), GFP_KERNEL);
  1096. if (!dyn_clk_caps->bit_clk_list)
  1097. return -ENOMEM;
  1098. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1099. dyn_clk_caps->bit_clk_list,
  1100. dyn_clk_caps->bit_clk_list_len);
  1101. if (rc) {
  1102. pr_err("[%s] failed to parse supported bit clk list\n", name);
  1103. return -EINVAL;
  1104. }
  1105. dyn_clk_caps->dyn_clk_support = true;
  1106. return 0;
  1107. }
  1108. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1109. {
  1110. int rc = 0;
  1111. bool supported = false;
  1112. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1113. struct dsi_parser_utils *utils = &panel->utils;
  1114. const char *name = panel->name;
  1115. const char *type;
  1116. u32 i;
  1117. supported = utils->read_bool(utils->data,
  1118. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1119. if (!supported) {
  1120. pr_debug("[%s] DFPS is not supported\n", name);
  1121. dfps_caps->dfps_support = false;
  1122. return rc;
  1123. }
  1124. type = utils->get_property(utils->data,
  1125. "qcom,mdss-dsi-pan-fps-update", NULL);
  1126. if (!type) {
  1127. pr_err("[%s] dfps type not defined\n", name);
  1128. rc = -EINVAL;
  1129. goto error;
  1130. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1131. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1132. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1133. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1134. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1135. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1136. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1137. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1138. } else {
  1139. pr_err("[%s] dfps type is not recognized\n", name);
  1140. rc = -EINVAL;
  1141. goto error;
  1142. }
  1143. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1144. "qcom,dsi-supported-dfps-list");
  1145. if (dfps_caps->dfps_list_len < 1) {
  1146. pr_err("[%s] dfps refresh list not present\n", name);
  1147. rc = -EINVAL;
  1148. goto error;
  1149. }
  1150. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1151. GFP_KERNEL);
  1152. if (!dfps_caps->dfps_list) {
  1153. rc = -ENOMEM;
  1154. goto error;
  1155. }
  1156. rc = utils->read_u32_array(utils->data,
  1157. "qcom,dsi-supported-dfps-list",
  1158. dfps_caps->dfps_list,
  1159. dfps_caps->dfps_list_len);
  1160. if (rc) {
  1161. pr_err("[%s] dfps refresh rate list parse failed\n", name);
  1162. rc = -EINVAL;
  1163. goto error;
  1164. }
  1165. dfps_caps->dfps_support = true;
  1166. /* calculate max and min fps */
  1167. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1168. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1169. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1170. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1171. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1172. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1173. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1174. }
  1175. error:
  1176. return rc;
  1177. }
  1178. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1179. struct dsi_parser_utils *utils,
  1180. const char *name)
  1181. {
  1182. int rc = 0;
  1183. const char *traffic_mode;
  1184. u32 vc_id = 0;
  1185. u32 val = 0;
  1186. u32 line_no = 0;
  1187. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1188. if (rc) {
  1189. pr_debug("[%s] fallback to default h-sync-pulse\n", name);
  1190. cfg->pulse_mode_hsa_he = false;
  1191. } else if (val == 1) {
  1192. cfg->pulse_mode_hsa_he = true;
  1193. } else if (val == 0) {
  1194. cfg->pulse_mode_hsa_he = false;
  1195. } else {
  1196. pr_err("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1197. name);
  1198. rc = -EINVAL;
  1199. goto error;
  1200. }
  1201. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1202. "qcom,mdss-dsi-hfp-power-mode");
  1203. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1204. "qcom,mdss-dsi-hbp-power-mode");
  1205. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1206. "qcom,mdss-dsi-hsa-power-mode");
  1207. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1208. "qcom,mdss-dsi-last-line-interleave");
  1209. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1210. "qcom,mdss-dsi-bllp-eof-power-mode");
  1211. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1212. "qcom,mdss-dsi-bllp-power-mode");
  1213. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1214. "qcom,mdss-dsi-force-clock-lane-hs");
  1215. traffic_mode = utils->get_property(utils->data,
  1216. "qcom,mdss-dsi-traffic-mode",
  1217. NULL);
  1218. if (!traffic_mode) {
  1219. pr_debug("[%s] Falling back to default traffic mode\n", name);
  1220. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1221. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1222. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1223. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1224. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1225. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1226. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1227. } else {
  1228. pr_err("[%s] Unrecognized traffic mode-%s\n", name,
  1229. traffic_mode);
  1230. rc = -EINVAL;
  1231. goto error;
  1232. }
  1233. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1234. &vc_id);
  1235. if (rc) {
  1236. pr_debug("[%s] Fallback to default vc id\n", name);
  1237. cfg->vc_id = 0;
  1238. } else {
  1239. cfg->vc_id = vc_id;
  1240. }
  1241. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1242. &line_no);
  1243. if (rc) {
  1244. pr_debug("[%s] set default dma scheduling line no\n", name);
  1245. cfg->dma_sched_line = 0x1;
  1246. /* do not fail since we have default value */
  1247. rc = 0;
  1248. } else {
  1249. cfg->dma_sched_line = line_no;
  1250. }
  1251. error:
  1252. return rc;
  1253. }
  1254. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1255. struct dsi_parser_utils *utils,
  1256. const char *name)
  1257. {
  1258. u32 val = 0;
  1259. int rc = 0;
  1260. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1261. if (rc) {
  1262. pr_debug("[%s] Fallback to default wr-mem-start\n", name);
  1263. cfg->wr_mem_start = 0x2C;
  1264. } else {
  1265. cfg->wr_mem_start = val;
  1266. }
  1267. val = 0;
  1268. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1269. &val);
  1270. if (rc) {
  1271. pr_debug("[%s] Fallback to default wr-mem-continue\n", name);
  1272. cfg->wr_mem_continue = 0x3C;
  1273. } else {
  1274. cfg->wr_mem_continue = val;
  1275. }
  1276. /* TODO: fix following */
  1277. cfg->max_cmd_packets_interleave = 0;
  1278. val = 0;
  1279. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1280. &val);
  1281. if (rc) {
  1282. pr_debug("[%s] fallback to default te-dcs-cmd\n", name);
  1283. cfg->insert_dcs_command = true;
  1284. } else if (val == 1) {
  1285. cfg->insert_dcs_command = true;
  1286. } else if (val == 0) {
  1287. cfg->insert_dcs_command = false;
  1288. } else {
  1289. pr_err("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1290. name);
  1291. rc = -EINVAL;
  1292. goto error;
  1293. }
  1294. error:
  1295. return rc;
  1296. }
  1297. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1298. {
  1299. int rc = 0;
  1300. struct dsi_parser_utils *utils = &panel->utils;
  1301. bool panel_mode_switch_enabled;
  1302. enum dsi_op_mode panel_mode;
  1303. const char *mode;
  1304. mode = utils->get_property(utils->data,
  1305. "qcom,mdss-dsi-panel-type", NULL);
  1306. if (!mode) {
  1307. pr_debug("[%s] Fallback to default panel mode\n", panel->name);
  1308. panel_mode = DSI_OP_VIDEO_MODE;
  1309. } else if (!strcmp(mode, "dsi_video_mode")) {
  1310. panel_mode = DSI_OP_VIDEO_MODE;
  1311. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1312. panel_mode = DSI_OP_CMD_MODE;
  1313. } else {
  1314. pr_err("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1315. rc = -EINVAL;
  1316. goto error;
  1317. }
  1318. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1319. "qcom,mdss-dsi-panel-mode-switch");
  1320. pr_info("%s: panel operating mode switch feature %s\n", __func__,
  1321. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1322. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1323. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1324. utils,
  1325. panel->name);
  1326. if (rc) {
  1327. pr_err("[%s] Failed to parse video host cfg, rc=%d\n",
  1328. panel->name, rc);
  1329. goto error;
  1330. }
  1331. }
  1332. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1333. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1334. utils,
  1335. panel->name);
  1336. if (rc) {
  1337. pr_err("[%s] Failed to parse cmd host config, rc=%d\n",
  1338. panel->name, rc);
  1339. goto error;
  1340. }
  1341. }
  1342. panel->panel_mode = panel_mode;
  1343. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1344. error:
  1345. return rc;
  1346. }
  1347. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1348. {
  1349. int rc = 0;
  1350. u32 val = 0;
  1351. const char *str;
  1352. struct dsi_panel_phy_props *props = &panel->phy_props;
  1353. struct dsi_parser_utils *utils = &panel->utils;
  1354. const char *name = panel->name;
  1355. rc = utils->read_u32(utils->data,
  1356. "qcom,mdss-pan-physical-width-dimension", &val);
  1357. if (rc) {
  1358. pr_debug("[%s] Physical panel width is not defined\n", name);
  1359. props->panel_width_mm = 0;
  1360. rc = 0;
  1361. } else {
  1362. props->panel_width_mm = val;
  1363. }
  1364. rc = utils->read_u32(utils->data,
  1365. "qcom,mdss-pan-physical-height-dimension",
  1366. &val);
  1367. if (rc) {
  1368. pr_debug("[%s] Physical panel height is not defined\n", name);
  1369. props->panel_height_mm = 0;
  1370. rc = 0;
  1371. } else {
  1372. props->panel_height_mm = val;
  1373. }
  1374. str = utils->get_property(utils->data,
  1375. "qcom,mdss-dsi-panel-orientation", NULL);
  1376. if (!str) {
  1377. props->rotation = DSI_PANEL_ROTATE_NONE;
  1378. } else if (!strcmp(str, "180")) {
  1379. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1380. } else if (!strcmp(str, "hflip")) {
  1381. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1382. } else if (!strcmp(str, "vflip")) {
  1383. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1384. } else {
  1385. pr_err("[%s] Unrecognized panel rotation-%s\n", name, str);
  1386. rc = -EINVAL;
  1387. goto error;
  1388. }
  1389. error:
  1390. return rc;
  1391. }
  1392. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1393. "qcom,mdss-dsi-pre-on-command",
  1394. "qcom,mdss-dsi-on-command",
  1395. "qcom,mdss-dsi-post-panel-on-command",
  1396. "qcom,mdss-dsi-pre-off-command",
  1397. "qcom,mdss-dsi-off-command",
  1398. "qcom,mdss-dsi-post-off-command",
  1399. "qcom,mdss-dsi-pre-res-switch",
  1400. "qcom,mdss-dsi-res-switch",
  1401. "qcom,mdss-dsi-post-res-switch",
  1402. "qcom,cmd-to-video-mode-switch-commands",
  1403. "qcom,cmd-to-video-mode-post-switch-commands",
  1404. "qcom,video-to-cmd-mode-switch-commands",
  1405. "qcom,video-to-cmd-mode-post-switch-commands",
  1406. "qcom,mdss-dsi-panel-status-command",
  1407. "qcom,mdss-dsi-lp1-command",
  1408. "qcom,mdss-dsi-lp2-command",
  1409. "qcom,mdss-dsi-nolp-command",
  1410. "PPS not parsed from DTSI, generated dynamically",
  1411. "ROI not parsed from DTSI, generated dynamically",
  1412. "qcom,mdss-dsi-timing-switch-command",
  1413. "qcom,mdss-dsi-post-mode-switch-on-command",
  1414. "qcom,mdss-dsi-qsync-on-commands",
  1415. "qcom,mdss-dsi-qsync-off-commands",
  1416. };
  1417. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1418. "qcom,mdss-dsi-pre-on-command-state",
  1419. "qcom,mdss-dsi-on-command-state",
  1420. "qcom,mdss-dsi-post-on-command-state",
  1421. "qcom,mdss-dsi-pre-off-command-state",
  1422. "qcom,mdss-dsi-off-command-state",
  1423. "qcom,mdss-dsi-post-off-command-state",
  1424. "qcom,mdss-dsi-pre-res-switch-state",
  1425. "qcom,mdss-dsi-res-switch-state",
  1426. "qcom,mdss-dsi-post-res-switch-state",
  1427. "qcom,cmd-to-video-mode-switch-commands-state",
  1428. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1429. "qcom,video-to-cmd-mode-switch-commands-state",
  1430. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1431. "qcom,mdss-dsi-panel-status-command-state",
  1432. "qcom,mdss-dsi-lp1-command-state",
  1433. "qcom,mdss-dsi-lp2-command-state",
  1434. "qcom,mdss-dsi-nolp-command-state",
  1435. "PPS not parsed from DTSI, generated dynamically",
  1436. "ROI not parsed from DTSI, generated dynamically",
  1437. "qcom,mdss-dsi-timing-switch-command-state",
  1438. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1439. "qcom,mdss-dsi-qsync-on-commands-state",
  1440. "qcom,mdss-dsi-qsync-off-commands-state",
  1441. };
  1442. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1443. {
  1444. const u32 cmd_set_min_size = 7;
  1445. u32 count = 0;
  1446. u32 packet_length;
  1447. u32 tmp;
  1448. while (length >= cmd_set_min_size) {
  1449. packet_length = cmd_set_min_size;
  1450. tmp = ((data[5] << 8) | (data[6]));
  1451. packet_length += tmp;
  1452. if (packet_length > length) {
  1453. pr_err("format error\n");
  1454. return -EINVAL;
  1455. }
  1456. length -= packet_length;
  1457. data += packet_length;
  1458. count++;
  1459. }
  1460. *cnt = count;
  1461. return 0;
  1462. }
  1463. static int dsi_panel_create_cmd_packets(const char *data,
  1464. u32 length,
  1465. u32 count,
  1466. struct dsi_cmd_desc *cmd)
  1467. {
  1468. int rc = 0;
  1469. int i, j;
  1470. u8 *payload;
  1471. for (i = 0; i < count; i++) {
  1472. u32 size;
  1473. cmd[i].msg.type = data[0];
  1474. cmd[i].last_command = (data[1] == 1);
  1475. cmd[i].msg.channel = data[2];
  1476. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1477. cmd[i].msg.ctrl = 0;
  1478. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1479. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1480. size = cmd[i].msg.tx_len * sizeof(u8);
  1481. payload = kzalloc(size, GFP_KERNEL);
  1482. if (!payload) {
  1483. rc = -ENOMEM;
  1484. goto error_free_payloads;
  1485. }
  1486. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1487. payload[j] = data[7 + j];
  1488. cmd[i].msg.tx_buf = payload;
  1489. data += (7 + cmd[i].msg.tx_len);
  1490. }
  1491. return rc;
  1492. error_free_payloads:
  1493. for (i = i - 1; i >= 0; i--) {
  1494. cmd--;
  1495. kfree(cmd->msg.tx_buf);
  1496. }
  1497. return rc;
  1498. }
  1499. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1500. {
  1501. u32 i = 0;
  1502. struct dsi_cmd_desc *cmd;
  1503. for (i = 0; i < set->count; i++) {
  1504. cmd = &set->cmds[i];
  1505. kfree(cmd->msg.tx_buf);
  1506. }
  1507. }
  1508. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1509. {
  1510. kfree(set->cmds);
  1511. }
  1512. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1513. u32 packet_count)
  1514. {
  1515. u32 size;
  1516. size = packet_count * sizeof(*cmd->cmds);
  1517. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1518. if (!cmd->cmds)
  1519. return -ENOMEM;
  1520. cmd->count = packet_count;
  1521. return 0;
  1522. }
  1523. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1524. enum dsi_cmd_set_type type,
  1525. struct dsi_parser_utils *utils)
  1526. {
  1527. int rc = 0;
  1528. u32 length = 0;
  1529. const char *data;
  1530. const char *state;
  1531. u32 packet_count = 0;
  1532. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1533. &length);
  1534. if (!data) {
  1535. pr_debug("%s commands not defined\n", cmd_set_prop_map[type]);
  1536. rc = -ENOTSUPP;
  1537. goto error;
  1538. }
  1539. pr_debug("type=%d, name=%s, length=%d\n", type,
  1540. cmd_set_prop_map[type], length);
  1541. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1542. 8, 1, data, length, false);
  1543. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1544. if (rc) {
  1545. pr_err("commands failed, rc=%d\n", rc);
  1546. goto error;
  1547. }
  1548. pr_debug("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1549. packet_count, length);
  1550. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1551. if (rc) {
  1552. pr_err("failed to allocate cmd packets, rc=%d\n", rc);
  1553. goto error;
  1554. }
  1555. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1556. cmd->cmds);
  1557. if (rc) {
  1558. pr_err("failed to create cmd packets, rc=%d\n", rc);
  1559. goto error_free_mem;
  1560. }
  1561. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1562. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1563. cmd->state = DSI_CMD_SET_STATE_LP;
  1564. } else if (!strcmp(state, "dsi_hs_mode")) {
  1565. cmd->state = DSI_CMD_SET_STATE_HS;
  1566. } else {
  1567. pr_err("[%s] command state unrecognized-%s\n",
  1568. cmd_set_state_map[type], state);
  1569. goto error_free_mem;
  1570. }
  1571. return rc;
  1572. error_free_mem:
  1573. kfree(cmd->cmds);
  1574. cmd->cmds = NULL;
  1575. error:
  1576. return rc;
  1577. }
  1578. static int dsi_panel_parse_cmd_sets(
  1579. struct dsi_display_mode_priv_info *priv_info,
  1580. struct dsi_parser_utils *utils)
  1581. {
  1582. int rc = 0;
  1583. struct dsi_panel_cmd_set *set;
  1584. u32 i;
  1585. if (!priv_info) {
  1586. pr_err("invalid mode priv info\n");
  1587. return -EINVAL;
  1588. }
  1589. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1590. set = &priv_info->cmd_sets[i];
  1591. set->type = i;
  1592. set->count = 0;
  1593. if (i == DSI_CMD_SET_PPS) {
  1594. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1595. if (rc)
  1596. pr_err("failed to allocate cmd set %d, rc = %d\n",
  1597. i, rc);
  1598. set->state = DSI_CMD_SET_STATE_LP;
  1599. } else {
  1600. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1601. if (rc)
  1602. pr_debug("failed to parse set %d\n", i);
  1603. }
  1604. }
  1605. rc = 0;
  1606. return rc;
  1607. }
  1608. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1609. {
  1610. int rc = 0;
  1611. int i;
  1612. u32 length = 0;
  1613. u32 count = 0;
  1614. u32 size = 0;
  1615. u32 *arr_32 = NULL;
  1616. const u32 *arr;
  1617. struct dsi_parser_utils *utils = &panel->utils;
  1618. struct dsi_reset_seq *seq;
  1619. if (panel->host_config.ext_bridge_mode)
  1620. return 0;
  1621. arr = utils->get_property(utils->data,
  1622. "qcom,mdss-dsi-reset-sequence", &length);
  1623. if (!arr) {
  1624. pr_err("[%s] dsi-reset-sequence not found\n", panel->name);
  1625. rc = -EINVAL;
  1626. goto error;
  1627. }
  1628. if (length & 0x1) {
  1629. pr_err("[%s] syntax error for dsi-reset-sequence\n",
  1630. panel->name);
  1631. rc = -EINVAL;
  1632. goto error;
  1633. }
  1634. pr_err("RESET SEQ LENGTH = %d\n", length);
  1635. length = length / sizeof(u32);
  1636. size = length * sizeof(u32);
  1637. arr_32 = kzalloc(size, GFP_KERNEL);
  1638. if (!arr_32) {
  1639. rc = -ENOMEM;
  1640. goto error;
  1641. }
  1642. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1643. arr_32, length);
  1644. if (rc) {
  1645. pr_err("[%s] cannot read dso-reset-seqience\n", panel->name);
  1646. goto error_free_arr_32;
  1647. }
  1648. count = length / 2;
  1649. size = count * sizeof(*seq);
  1650. seq = kzalloc(size, GFP_KERNEL);
  1651. if (!seq) {
  1652. rc = -ENOMEM;
  1653. goto error_free_arr_32;
  1654. }
  1655. panel->reset_config.sequence = seq;
  1656. panel->reset_config.count = count;
  1657. for (i = 0; i < length; i += 2) {
  1658. seq->level = arr_32[i];
  1659. seq->sleep_ms = arr_32[i + 1];
  1660. seq++;
  1661. }
  1662. error_free_arr_32:
  1663. kfree(arr_32);
  1664. error:
  1665. return rc;
  1666. }
  1667. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1668. {
  1669. struct dsi_parser_utils *utils = &panel->utils;
  1670. panel->ulps_feature_enabled =
  1671. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1672. pr_info("%s: ulps feature %s\n", __func__,
  1673. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1674. panel->ulps_suspend_enabled =
  1675. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1676. pr_info("%s: ulps during suspend feature %s\n", __func__,
  1677. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1678. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1679. "qcom,mdss-dsi-te-using-wd");
  1680. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1681. "qcom,cmd-sync-wait-broadcast");
  1682. panel->lp11_init = utils->read_bool(utils->data,
  1683. "qcom,mdss-dsi-lp11-init");
  1684. return 0;
  1685. }
  1686. static int dsi_panel_parse_jitter_config(
  1687. struct dsi_display_mode *mode,
  1688. struct dsi_parser_utils *utils)
  1689. {
  1690. int rc;
  1691. struct dsi_display_mode_priv_info *priv_info;
  1692. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1693. u64 jitter_val = 0;
  1694. priv_info = mode->priv_info;
  1695. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1696. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1697. if (rc) {
  1698. pr_debug("panel jitter not defined rc=%d\n", rc);
  1699. } else {
  1700. jitter_val = jitter[0];
  1701. jitter_val = div_u64(jitter_val, jitter[1]);
  1702. }
  1703. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1704. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1705. priv_info->panel_jitter_denom =
  1706. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1707. } else {
  1708. priv_info->panel_jitter_numer = jitter[0];
  1709. priv_info->panel_jitter_denom = jitter[1];
  1710. }
  1711. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1712. &priv_info->panel_prefill_lines);
  1713. if (rc) {
  1714. pr_debug("panel prefill lines are not defined rc=%d\n", rc);
  1715. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1716. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1717. } else if (priv_info->panel_prefill_lines >=
  1718. DSI_V_TOTAL(&mode->timing)) {
  1719. pr_debug("invalid prefill lines config=%d setting to:%d\n",
  1720. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1721. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1722. }
  1723. return 0;
  1724. }
  1725. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1726. {
  1727. int rc = 0;
  1728. char *supply_name;
  1729. if (panel->host_config.ext_bridge_mode)
  1730. return 0;
  1731. if (!strcmp(panel->type, "primary"))
  1732. supply_name = "qcom,panel-supply-entries";
  1733. else
  1734. supply_name = "qcom,panel-sec-supply-entries";
  1735. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1736. &panel->power_info, supply_name);
  1737. if (rc) {
  1738. pr_err("[%s] failed to parse vregs\n", panel->name);
  1739. goto error;
  1740. }
  1741. error:
  1742. return rc;
  1743. }
  1744. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1745. {
  1746. int rc = 0;
  1747. const char *data;
  1748. struct dsi_parser_utils *utils = &panel->utils;
  1749. char *reset_gpio_name, *mode_set_gpio_name;
  1750. if (!strcmp(panel->type, "primary")) {
  1751. reset_gpio_name = "qcom,platform-reset-gpio";
  1752. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1753. } else {
  1754. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1755. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1756. }
  1757. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1758. reset_gpio_name, 0);
  1759. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1760. !panel->host_config.ext_bridge_mode) {
  1761. rc = panel->reset_config.reset_gpio;
  1762. pr_err("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1763. goto error;
  1764. }
  1765. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1766. "qcom,5v-boost-gpio",
  1767. 0);
  1768. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1769. pr_debug("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1770. panel->name, rc);
  1771. panel->reset_config.disp_en_gpio =
  1772. utils->get_named_gpio(utils->data,
  1773. "qcom,platform-en-gpio", 0);
  1774. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1775. pr_debug("[%s] platform-en-gpio is not set, rc=%d\n",
  1776. panel->name, rc);
  1777. }
  1778. }
  1779. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1780. utils->data, mode_set_gpio_name, 0);
  1781. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1782. pr_debug("%s:%d mode gpio not specified\n", __func__, __LINE__);
  1783. pr_debug("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1784. data = utils->get_property(utils->data,
  1785. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1786. if (data) {
  1787. if (!strcmp(data, "single_port"))
  1788. panel->reset_config.mode_sel_state =
  1789. MODE_SEL_SINGLE_PORT;
  1790. else if (!strcmp(data, "dual_port"))
  1791. panel->reset_config.mode_sel_state =
  1792. MODE_SEL_DUAL_PORT;
  1793. else if (!strcmp(data, "high"))
  1794. panel->reset_config.mode_sel_state =
  1795. MODE_GPIO_HIGH;
  1796. else if (!strcmp(data, "low"))
  1797. panel->reset_config.mode_sel_state =
  1798. MODE_GPIO_LOW;
  1799. } else {
  1800. /* Set default mode as SPLIT mode */
  1801. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1802. }
  1803. /* TODO: release memory */
  1804. rc = dsi_panel_parse_reset_sequence(panel);
  1805. if (rc) {
  1806. pr_err("[%s] failed to parse reset sequence, rc=%d\n",
  1807. panel->name, rc);
  1808. goto error;
  1809. }
  1810. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1811. "qcom,mdss-dsi-panel-test-pin",
  1812. 0);
  1813. if (!gpio_is_valid(panel->panel_test_gpio))
  1814. pr_debug("%s:%d panel test gpio not specified\n", __func__,
  1815. __LINE__);
  1816. error:
  1817. return rc;
  1818. }
  1819. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1820. {
  1821. int rc = 0;
  1822. u32 val;
  1823. struct dsi_backlight_config *config = &panel->bl_config;
  1824. struct dsi_parser_utils *utils = &panel->utils;
  1825. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1826. &val);
  1827. if (rc) {
  1828. pr_err("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1829. goto error;
  1830. }
  1831. config->pwm_period_usecs = val;
  1832. error:
  1833. return rc;
  1834. }
  1835. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1836. {
  1837. int rc = 0;
  1838. u32 val = 0;
  1839. const char *bl_type;
  1840. const char *data;
  1841. struct dsi_parser_utils *utils = &panel->utils;
  1842. char *bl_name;
  1843. if (!strcmp(panel->type, "primary"))
  1844. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1845. else
  1846. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1847. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1848. if (!bl_type) {
  1849. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1850. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1851. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1852. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1853. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1854. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1855. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1856. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1857. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1858. } else {
  1859. pr_debug("[%s] bl-pmic-control-type unknown-%s\n",
  1860. panel->name, bl_type);
  1861. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1862. }
  1863. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1864. if (!data) {
  1865. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1866. } else if (!strcmp(data, "delay_until_first_frame")) {
  1867. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1868. } else {
  1869. pr_debug("[%s] No valid bl-update-flag: %s\n",
  1870. panel->name, data);
  1871. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1872. }
  1873. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1874. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1875. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1876. if (rc) {
  1877. pr_debug("[%s] bl-min-level unspecified, defaulting to zero\n",
  1878. panel->name);
  1879. panel->bl_config.bl_min_level = 0;
  1880. } else {
  1881. panel->bl_config.bl_min_level = val;
  1882. }
  1883. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1884. if (rc) {
  1885. pr_debug("[%s] bl-max-level unspecified, defaulting to max level\n",
  1886. panel->name);
  1887. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1888. } else {
  1889. panel->bl_config.bl_max_level = val;
  1890. }
  1891. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1892. &val);
  1893. if (rc) {
  1894. pr_debug("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1895. panel->name);
  1896. panel->bl_config.brightness_max_level = 255;
  1897. } else {
  1898. panel->bl_config.brightness_max_level = val;
  1899. }
  1900. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1901. rc = dsi_panel_parse_bl_pwm_config(panel);
  1902. if (rc) {
  1903. pr_err("[%s] failed to parse pwm config, rc=%d\n",
  1904. panel->name, rc);
  1905. goto error;
  1906. }
  1907. }
  1908. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1909. "qcom,platform-bklight-en-gpio",
  1910. 0);
  1911. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1912. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1913. pr_debug("[%s] failed to get bklt gpio, rc=%d\n",
  1914. panel->name, rc);
  1915. rc = -EPROBE_DEFER;
  1916. goto error;
  1917. } else {
  1918. pr_debug("[%s] failed to get bklt gpio, rc=%d\n",
  1919. panel->name, rc);
  1920. rc = 0;
  1921. goto error;
  1922. }
  1923. }
  1924. error:
  1925. return rc;
  1926. }
  1927. void dsi_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, int intf_width)
  1928. {
  1929. int slice_per_pkt, slice_per_intf;
  1930. int bytes_in_slice, total_bytes_per_intf;
  1931. if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt ||
  1932. (intf_width < dsc->slice_width)) {
  1933. pr_err("invalid input, intf_width=%d slice_width=%d\n",
  1934. intf_width, dsc ? dsc->slice_width : -1);
  1935. return;
  1936. }
  1937. slice_per_pkt = dsc->slice_per_pkt;
  1938. slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width);
  1939. /*
  1940. * If slice_per_pkt is greater than slice_per_intf then default to 1.
  1941. * This can happen during partial update.
  1942. */
  1943. if (slice_per_pkt > slice_per_intf)
  1944. slice_per_pkt = 1;
  1945. bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8);
  1946. total_bytes_per_intf = bytes_in_slice * slice_per_intf;
  1947. dsc->eol_byte_num = total_bytes_per_intf % 3;
  1948. dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
  1949. dsc->bytes_in_slice = bytes_in_slice;
  1950. dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
  1951. dsc->pkt_per_line = slice_per_intf / slice_per_pkt;
  1952. }
  1953. int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
  1954. {
  1955. int bpp, bpc;
  1956. int mux_words_size;
  1957. int groups_per_line, groups_total;
  1958. int min_rate_buffer_size;
  1959. int hrd_delay;
  1960. int pre_num_extra_mux_bits, num_extra_mux_bits;
  1961. int slice_bits;
  1962. int data;
  1963. int final_value, final_scale;
  1964. int ratio_index, mod_offset;
  1965. dsc->rc_model_size = 8192;
  1966. if (dsc->version == 0x11 && dsc->scr_rev == 0x1)
  1967. dsc->first_line_bpg_offset = 15;
  1968. else
  1969. dsc->first_line_bpg_offset = 12;
  1970. dsc->edge_factor = 6;
  1971. dsc->tgt_offset_hi = 3;
  1972. dsc->tgt_offset_lo = 3;
  1973. dsc->enable_422 = 0;
  1974. dsc->convert_rgb = 1;
  1975. dsc->vbr_enable = 0;
  1976. dsc->buf_thresh = dsi_dsc_rc_buf_thresh;
  1977. bpp = dsc->bpp;
  1978. bpc = dsc->bpc;
  1979. if ((bpc == 12) && (bpp == 8))
  1980. ratio_index = DSC_12BPC_8BPP;
  1981. else if ((bpc == 10) && (bpp == 8))
  1982. ratio_index = DSC_10BPC_8BPP;
  1983. else if ((bpc == 10) && (bpp == 10))
  1984. ratio_index = DSC_10BPC_10BPP;
  1985. else
  1986. ratio_index = DSC_8BPC_8BPP;
  1987. if (dsc->version == 0x11 && dsc->scr_rev == 0x1) {
  1988. dsc->range_min_qp =
  1989. dsi_dsc_rc_range_min_qp_1_1_scr1[ratio_index];
  1990. dsc->range_max_qp =
  1991. dsi_dsc_rc_range_max_qp_1_1_scr1[ratio_index];
  1992. } else {
  1993. dsc->range_min_qp = dsi_dsc_rc_range_min_qp_1_1[ratio_index];
  1994. dsc->range_max_qp = dsi_dsc_rc_range_max_qp_1_1[ratio_index];
  1995. }
  1996. dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
  1997. if (bpp == 8) {
  1998. dsc->initial_offset = 6144;
  1999. dsc->initial_xmit_delay = 512;
  2000. } else if (bpp == 10) {
  2001. dsc->initial_offset = 5632;
  2002. dsc->initial_xmit_delay = 410;
  2003. } else {
  2004. dsc->initial_offset = 2048;
  2005. dsc->initial_xmit_delay = 341;
  2006. }
  2007. dsc->line_buf_depth = bpc + 1;
  2008. if (bpc == 8) {
  2009. dsc->input_10_bits = 0;
  2010. dsc->min_qp_flatness = 3;
  2011. dsc->max_qp_flatness = 12;
  2012. dsc->quant_incr_limit0 = 11;
  2013. dsc->quant_incr_limit1 = 11;
  2014. mux_words_size = 48;
  2015. } else if (bpc == 10) { /* 10bpc */
  2016. dsc->input_10_bits = 1;
  2017. dsc->min_qp_flatness = 7;
  2018. dsc->max_qp_flatness = 16;
  2019. dsc->quant_incr_limit0 = 15;
  2020. dsc->quant_incr_limit1 = 15;
  2021. mux_words_size = 48;
  2022. } else { /* 12 bpc */
  2023. dsc->input_10_bits = 0;
  2024. dsc->min_qp_flatness = 11;
  2025. dsc->max_qp_flatness = 20;
  2026. dsc->quant_incr_limit0 = 19;
  2027. dsc->quant_incr_limit1 = 19;
  2028. mux_words_size = 64;
  2029. }
  2030. mod_offset = dsc->slice_width % 3;
  2031. switch (mod_offset) {
  2032. case 0:
  2033. dsc->slice_last_group_size = 2;
  2034. break;
  2035. case 1:
  2036. dsc->slice_last_group_size = 0;
  2037. break;
  2038. case 2:
  2039. dsc->slice_last_group_size = 1;
  2040. break;
  2041. default:
  2042. break;
  2043. }
  2044. dsc->det_thresh_flatness = 2 << (bpc - 8);
  2045. groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
  2046. dsc->chunk_size = dsc->slice_width * bpp / 8;
  2047. if ((dsc->slice_width * bpp) % 8)
  2048. dsc->chunk_size++;
  2049. /* rbs-min */
  2050. min_rate_buffer_size = dsc->rc_model_size - dsc->initial_offset +
  2051. dsc->initial_xmit_delay * bpp +
  2052. groups_per_line * dsc->first_line_bpg_offset;
  2053. hrd_delay = DIV_ROUND_UP(min_rate_buffer_size, bpp);
  2054. dsc->initial_dec_delay = hrd_delay - dsc->initial_xmit_delay;
  2055. dsc->initial_scale_value = 8 * dsc->rc_model_size /
  2056. (dsc->rc_model_size - dsc->initial_offset);
  2057. slice_bits = 8 * dsc->chunk_size * dsc->slice_height;
  2058. groups_total = groups_per_line * dsc->slice_height;
  2059. data = dsc->first_line_bpg_offset * 2048;
  2060. dsc->nfl_bpg_offset = DIV_ROUND_UP(data, (dsc->slice_height - 1));
  2061. pre_num_extra_mux_bits = 3 * (mux_words_size + (4 * bpc + 4) - 2);
  2062. num_extra_mux_bits = pre_num_extra_mux_bits - (mux_words_size -
  2063. ((slice_bits - pre_num_extra_mux_bits) % mux_words_size));
  2064. data = 2048 * (dsc->rc_model_size - dsc->initial_offset
  2065. + num_extra_mux_bits);
  2066. dsc->slice_bpg_offset = DIV_ROUND_UP(data, groups_total);
  2067. data = dsc->initial_xmit_delay * bpp;
  2068. final_value = dsc->rc_model_size - data + num_extra_mux_bits;
  2069. final_scale = 8 * dsc->rc_model_size /
  2070. (dsc->rc_model_size - final_value);
  2071. dsc->final_offset = final_value;
  2072. data = (final_scale - 9) * (dsc->nfl_bpg_offset +
  2073. dsc->slice_bpg_offset);
  2074. dsc->scale_increment_interval = (2048 * dsc->final_offset) / data;
  2075. dsc->scale_decrement_interval = groups_per_line /
  2076. (dsc->initial_scale_value - 8);
  2077. return 0;
  2078. }
  2079. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2080. struct dsi_parser_utils *utils)
  2081. {
  2082. const char *data;
  2083. u32 len, i;
  2084. int rc = 0;
  2085. struct dsi_display_mode_priv_info *priv_info;
  2086. if (!mode || !mode->priv_info)
  2087. return -EINVAL;
  2088. priv_info = mode->priv_info;
  2089. data = utils->get_property(utils->data,
  2090. "qcom,mdss-dsi-panel-phy-timings", &len);
  2091. if (!data) {
  2092. pr_debug("Unable to read Phy timing settings\n");
  2093. } else {
  2094. priv_info->phy_timing_val =
  2095. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2096. if (!priv_info->phy_timing_val)
  2097. return -EINVAL;
  2098. for (i = 0; i < len; i++)
  2099. priv_info->phy_timing_val[i] = data[i];
  2100. priv_info->phy_timing_len = len;
  2101. }
  2102. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  2103. /*
  2104. * For command mode we update the pclk as part of
  2105. * function dsi_panel_calc_dsi_transfer_time( )
  2106. * as we set it based on dsi clock or mdp transfer time.
  2107. */
  2108. mode->pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *
  2109. DSI_V_TOTAL(&mode->timing) *
  2110. mode->timing.refresh_rate) / 1000;
  2111. }
  2112. return rc;
  2113. }
  2114. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2115. struct dsi_parser_utils *utils)
  2116. {
  2117. u32 data;
  2118. int rc = -EINVAL;
  2119. int intf_width;
  2120. const char *compression;
  2121. struct dsi_display_mode_priv_info *priv_info;
  2122. if (!mode || !mode->priv_info)
  2123. return -EINVAL;
  2124. priv_info = mode->priv_info;
  2125. priv_info->dsc_enabled = false;
  2126. compression = utils->get_property(utils->data,
  2127. "qcom,compression-mode", NULL);
  2128. if (compression && !strcmp(compression, "dsc"))
  2129. priv_info->dsc_enabled = true;
  2130. if (!priv_info->dsc_enabled) {
  2131. pr_debug("dsc compression is not enabled for the mode\n");
  2132. return 0;
  2133. }
  2134. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2135. if (rc) {
  2136. priv_info->dsc.version = 0x11;
  2137. rc = 0;
  2138. } else {
  2139. priv_info->dsc.version = data & 0xff;
  2140. /* only support DSC 1.1 rev */
  2141. if (priv_info->dsc.version != 0x11) {
  2142. pr_err("%s: DSC version:%d not supported\n", __func__,
  2143. priv_info->dsc.version);
  2144. rc = -EINVAL;
  2145. goto error;
  2146. }
  2147. }
  2148. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2149. if (rc) {
  2150. priv_info->dsc.scr_rev = 0x0;
  2151. rc = 0;
  2152. } else {
  2153. priv_info->dsc.scr_rev = data & 0xff;
  2154. /* only one scr rev supported */
  2155. if (priv_info->dsc.scr_rev > 0x1) {
  2156. pr_err("%s: DSC scr version:%d not supported\n",
  2157. __func__, priv_info->dsc.scr_rev);
  2158. rc = -EINVAL;
  2159. goto error;
  2160. }
  2161. }
  2162. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2163. if (rc) {
  2164. pr_err("failed to parse qcom,mdss-dsc-slice-height\n");
  2165. goto error;
  2166. }
  2167. priv_info->dsc.slice_height = data;
  2168. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2169. if (rc) {
  2170. pr_err("failed to parse qcom,mdss-dsc-slice-width\n");
  2171. goto error;
  2172. }
  2173. priv_info->dsc.slice_width = data;
  2174. intf_width = mode->timing.h_active;
  2175. if (intf_width % priv_info->dsc.slice_width) {
  2176. pr_err("invalid slice width for the intf width:%d slice width:%d\n",
  2177. intf_width, priv_info->dsc.slice_width);
  2178. rc = -EINVAL;
  2179. goto error;
  2180. }
  2181. priv_info->dsc.pic_width = mode->timing.h_active;
  2182. priv_info->dsc.pic_height = mode->timing.v_active;
  2183. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2184. if (rc) {
  2185. pr_err("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2186. goto error;
  2187. } else if (!data || (data > 2)) {
  2188. pr_err("invalid dsc slice-per-pkt:%d\n", data);
  2189. goto error;
  2190. }
  2191. priv_info->dsc.slice_per_pkt = data;
  2192. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2193. &data);
  2194. if (rc) {
  2195. pr_err("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2196. goto error;
  2197. }
  2198. priv_info->dsc.bpc = data;
  2199. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2200. &data);
  2201. if (rc) {
  2202. pr_err("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2203. goto error;
  2204. }
  2205. priv_info->dsc.bpp = data;
  2206. priv_info->dsc.block_pred_enable = utils->read_bool(utils->data,
  2207. "qcom,mdss-dsc-block-prediction-enable");
  2208. priv_info->dsc.full_frame_slices = DIV_ROUND_UP(intf_width,
  2209. priv_info->dsc.slice_width);
  2210. dsi_dsc_populate_static_param(&priv_info->dsc);
  2211. dsi_dsc_pclk_param_calc(&priv_info->dsc, intf_width);
  2212. mode->timing.dsc_enabled = true;
  2213. mode->timing.dsc = &priv_info->dsc;
  2214. error:
  2215. return rc;
  2216. }
  2217. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2218. {
  2219. int rc = 0;
  2220. struct drm_panel_hdr_properties *hdr_prop;
  2221. struct dsi_parser_utils *utils = &panel->utils;
  2222. hdr_prop = &panel->hdr_props;
  2223. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2224. "qcom,mdss-dsi-panel-hdr-enabled");
  2225. if (hdr_prop->hdr_enabled) {
  2226. rc = utils->read_u32_array(utils->data,
  2227. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2228. hdr_prop->display_primaries,
  2229. DISPLAY_PRIMARIES_MAX);
  2230. if (rc) {
  2231. pr_err("%s:%d, Unable to read color primaries,rc:%u\n",
  2232. __func__, __LINE__, rc);
  2233. hdr_prop->hdr_enabled = false;
  2234. return rc;
  2235. }
  2236. rc = utils->read_u32(utils->data,
  2237. "qcom,mdss-dsi-panel-peak-brightness",
  2238. &(hdr_prop->peak_brightness));
  2239. if (rc) {
  2240. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2241. __func__, __LINE__, rc);
  2242. hdr_prop->hdr_enabled = false;
  2243. return rc;
  2244. }
  2245. rc = utils->read_u32(utils->data,
  2246. "qcom,mdss-dsi-panel-blackness-level",
  2247. &(hdr_prop->blackness_level));
  2248. if (rc) {
  2249. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2250. __func__, __LINE__, rc);
  2251. hdr_prop->hdr_enabled = false;
  2252. return rc;
  2253. }
  2254. }
  2255. return 0;
  2256. }
  2257. static int dsi_panel_parse_topology(
  2258. struct dsi_display_mode_priv_info *priv_info,
  2259. struct dsi_parser_utils *utils,
  2260. int topology_override)
  2261. {
  2262. struct msm_display_topology *topology;
  2263. u32 top_count, top_sel, *array = NULL;
  2264. int i, len = 0;
  2265. int rc = -EINVAL;
  2266. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2267. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2268. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2269. pr_err("invalid topology list for the panel, rc = %d\n", rc);
  2270. return rc;
  2271. }
  2272. top_count = len / TOPOLOGY_SET_LEN;
  2273. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2274. if (!array)
  2275. return -ENOMEM;
  2276. rc = utils->read_u32_array(utils->data,
  2277. "qcom,display-topology", array, len);
  2278. if (rc) {
  2279. pr_err("unable to read the display topologies, rc = %d\n", rc);
  2280. goto read_fail;
  2281. }
  2282. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2283. if (!topology) {
  2284. rc = -ENOMEM;
  2285. goto read_fail;
  2286. }
  2287. for (i = 0; i < top_count; i++) {
  2288. struct msm_display_topology *top = &topology[i];
  2289. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2290. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2291. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2292. }
  2293. if (topology_override >= 0 && topology_override < top_count) {
  2294. pr_info("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2295. topology_override,
  2296. topology[topology_override].num_lm,
  2297. topology[topology_override].num_enc,
  2298. topology[topology_override].num_intf);
  2299. top_sel = topology_override;
  2300. goto parse_done;
  2301. }
  2302. rc = utils->read_u32(utils->data,
  2303. "qcom,default-topology-index", &top_sel);
  2304. if (rc) {
  2305. pr_err("no default topology selected, rc = %d\n", rc);
  2306. goto parse_fail;
  2307. }
  2308. if (top_sel >= top_count) {
  2309. rc = -EINVAL;
  2310. pr_err("default topology is specified is not valid, rc = %d\n",
  2311. rc);
  2312. goto parse_fail;
  2313. }
  2314. pr_info("default topology: lm: %d comp_enc:%d intf: %d\n",
  2315. topology[top_sel].num_lm,
  2316. topology[top_sel].num_enc,
  2317. topology[top_sel].num_intf);
  2318. parse_done:
  2319. memcpy(&priv_info->topology, &topology[top_sel],
  2320. sizeof(struct msm_display_topology));
  2321. parse_fail:
  2322. kfree(topology);
  2323. read_fail:
  2324. kfree(array);
  2325. return rc;
  2326. }
  2327. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2328. struct msm_roi_alignment *align)
  2329. {
  2330. int len = 0, rc = 0;
  2331. u32 value[6];
  2332. struct property *data;
  2333. if (!align)
  2334. return -EINVAL;
  2335. memset(align, 0, sizeof(*align));
  2336. data = utils->find_property(utils->data,
  2337. "qcom,panel-roi-alignment", &len);
  2338. len /= sizeof(u32);
  2339. if (!data) {
  2340. pr_err("panel roi alignment not found\n");
  2341. rc = -EINVAL;
  2342. } else if (len != 6) {
  2343. pr_err("incorrect roi alignment len %d\n", len);
  2344. rc = -EINVAL;
  2345. } else {
  2346. rc = utils->read_u32_array(utils->data,
  2347. "qcom,panel-roi-alignment", value, len);
  2348. if (rc)
  2349. pr_debug("error reading panel roi alignment values\n");
  2350. else {
  2351. align->xstart_pix_align = value[0];
  2352. align->ystart_pix_align = value[1];
  2353. align->width_pix_align = value[2];
  2354. align->height_pix_align = value[3];
  2355. align->min_width = value[4];
  2356. align->min_height = value[5];
  2357. }
  2358. pr_info("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2359. align->xstart_pix_align,
  2360. align->width_pix_align,
  2361. align->ystart_pix_align,
  2362. align->height_pix_align,
  2363. align->min_width,
  2364. align->min_height);
  2365. }
  2366. return rc;
  2367. }
  2368. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2369. struct dsi_parser_utils *utils)
  2370. {
  2371. struct msm_roi_caps *roi_caps = NULL;
  2372. const char *data;
  2373. int rc = 0;
  2374. if (!mode || !mode->priv_info) {
  2375. pr_err("invalid arguments\n");
  2376. return -EINVAL;
  2377. }
  2378. roi_caps = &mode->priv_info->roi_caps;
  2379. memset(roi_caps, 0, sizeof(*roi_caps));
  2380. data = utils->get_property(utils->data,
  2381. "qcom,partial-update-enabled", NULL);
  2382. if (data) {
  2383. if (!strcmp(data, "dual_roi"))
  2384. roi_caps->num_roi = 2;
  2385. else if (!strcmp(data, "single_roi"))
  2386. roi_caps->num_roi = 1;
  2387. else {
  2388. pr_info(
  2389. "invalid value for qcom,partial-update-enabled: %s\n",
  2390. data);
  2391. return 0;
  2392. }
  2393. } else {
  2394. pr_info("partial update disabled as the property is not set\n");
  2395. return 0;
  2396. }
  2397. roi_caps->merge_rois = utils->read_bool(utils->data,
  2398. "qcom,partial-update-roi-merge");
  2399. roi_caps->enabled = roi_caps->num_roi > 0;
  2400. pr_info("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2401. roi_caps->enabled);
  2402. if (roi_caps->enabled)
  2403. rc = dsi_panel_parse_roi_alignment(utils,
  2404. &roi_caps->align);
  2405. if (rc)
  2406. memset(roi_caps, 0, sizeof(*roi_caps));
  2407. return rc;
  2408. }
  2409. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2410. struct dsi_parser_utils *utils)
  2411. {
  2412. bool vid_mode_support, cmd_mode_support;
  2413. if (!mode || !mode->priv_info) {
  2414. pr_err("invalid arguments\n");
  2415. return -EINVAL;
  2416. }
  2417. vid_mode_support = utils->read_bool(utils->data,
  2418. "qcom,mdss-dsi-video-mode");
  2419. cmd_mode_support = utils->read_bool(utils->data,
  2420. "qcom,mdss-dsi-cmd-mode");
  2421. if (cmd_mode_support)
  2422. mode->panel_mode = DSI_OP_CMD_MODE;
  2423. else if (vid_mode_support)
  2424. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2425. else
  2426. return -EINVAL;
  2427. return 0;
  2428. };
  2429. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2430. {
  2431. int dms_enabled;
  2432. const char *data;
  2433. struct dsi_parser_utils *utils = &panel->utils;
  2434. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2435. dms_enabled = utils->read_bool(utils->data,
  2436. "qcom,dynamic-mode-switch-enabled");
  2437. if (!dms_enabled)
  2438. return 0;
  2439. data = utils->get_property(utils->data,
  2440. "qcom,dynamic-mode-switch-type", NULL);
  2441. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2442. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2443. } else {
  2444. pr_err("[%s] unsupported dynamic switch mode: %s\n",
  2445. panel->name, data);
  2446. return -EINVAL;
  2447. }
  2448. return 0;
  2449. };
  2450. /*
  2451. * The length of all the valid values to be checked should not be greater
  2452. * than the length of returned data from read command.
  2453. */
  2454. static bool
  2455. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2456. {
  2457. int i;
  2458. struct drm_panel_esd_config *config = &panel->esd_config;
  2459. for (i = 0; i < count; ++i) {
  2460. if (config->status_valid_params[i] >
  2461. config->status_cmds_rlen[i]) {
  2462. pr_debug("ignore valid params\n");
  2463. return false;
  2464. }
  2465. }
  2466. return true;
  2467. }
  2468. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2469. char *prop_key, u32 **target, u32 cmd_cnt)
  2470. {
  2471. int tmp;
  2472. if (!utils->find_property(utils->data, prop_key, &tmp))
  2473. return false;
  2474. tmp /= sizeof(u32);
  2475. if (tmp != cmd_cnt) {
  2476. pr_err("request property(%d) do not match cmd count(%d)\n",
  2477. tmp, cmd_cnt);
  2478. return false;
  2479. }
  2480. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2481. if (IS_ERR_OR_NULL(*target)) {
  2482. pr_err("Error allocating memory for property\n");
  2483. return false;
  2484. }
  2485. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2486. pr_err("cannot get values from dts\n");
  2487. kfree(*target);
  2488. *target = NULL;
  2489. return false;
  2490. }
  2491. return true;
  2492. }
  2493. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2494. {
  2495. kfree(esd_config->status_buf);
  2496. kfree(esd_config->return_buf);
  2497. kfree(esd_config->status_value);
  2498. kfree(esd_config->status_valid_params);
  2499. kfree(esd_config->status_cmds_rlen);
  2500. kfree(esd_config->status_cmd.cmds);
  2501. }
  2502. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2503. {
  2504. struct drm_panel_esd_config *esd_config;
  2505. int rc = 0;
  2506. u32 tmp;
  2507. u32 i, status_len, *lenp;
  2508. struct property *data;
  2509. struct dsi_parser_utils *utils = &panel->utils;
  2510. if (!panel) {
  2511. pr_err("Invalid Params\n");
  2512. return -EINVAL;
  2513. }
  2514. esd_config = &panel->esd_config;
  2515. if (!esd_config)
  2516. return -EINVAL;
  2517. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2518. DSI_CMD_SET_PANEL_STATUS, utils);
  2519. if (!esd_config->status_cmd.count) {
  2520. pr_err("panel status command parsing failed\n");
  2521. rc = -EINVAL;
  2522. goto error;
  2523. }
  2524. if (!dsi_panel_parse_esd_status_len(utils,
  2525. "qcom,mdss-dsi-panel-status-read-length",
  2526. &panel->esd_config.status_cmds_rlen,
  2527. esd_config->status_cmd.count)) {
  2528. pr_err("Invalid status read length\n");
  2529. rc = -EINVAL;
  2530. goto error1;
  2531. }
  2532. if (dsi_panel_parse_esd_status_len(utils,
  2533. "qcom,mdss-dsi-panel-status-valid-params",
  2534. &panel->esd_config.status_valid_params,
  2535. esd_config->status_cmd.count)) {
  2536. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2537. esd_config->status_cmd.count)) {
  2538. rc = -EINVAL;
  2539. goto error2;
  2540. }
  2541. }
  2542. status_len = 0;
  2543. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2544. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2545. status_len += lenp[i];
  2546. if (!status_len) {
  2547. rc = -EINVAL;
  2548. goto error2;
  2549. }
  2550. /*
  2551. * Some panel may need multiple read commands to properly
  2552. * check panel status. Do a sanity check for proper status
  2553. * value which will be compared with the value read by dsi
  2554. * controller during ESD check. Also check if multiple read
  2555. * commands are there then, there should be corresponding
  2556. * status check values for each read command.
  2557. */
  2558. data = utils->find_property(utils->data,
  2559. "qcom,mdss-dsi-panel-status-value", &tmp);
  2560. tmp /= sizeof(u32);
  2561. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2562. esd_config->groups = tmp / status_len;
  2563. } else {
  2564. pr_err("error parse panel-status-value\n");
  2565. rc = -EINVAL;
  2566. goto error2;
  2567. }
  2568. esd_config->status_value =
  2569. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2570. GFP_KERNEL);
  2571. if (!esd_config->status_value) {
  2572. rc = -ENOMEM;
  2573. goto error2;
  2574. }
  2575. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2576. sizeof(unsigned char), GFP_KERNEL);
  2577. if (!esd_config->return_buf) {
  2578. rc = -ENOMEM;
  2579. goto error3;
  2580. }
  2581. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2582. if (!esd_config->status_buf) {
  2583. rc = -ENOMEM;
  2584. goto error4;
  2585. }
  2586. rc = utils->read_u32_array(utils->data,
  2587. "qcom,mdss-dsi-panel-status-value",
  2588. esd_config->status_value, esd_config->groups * status_len);
  2589. if (rc) {
  2590. pr_debug("error reading panel status values\n");
  2591. memset(esd_config->status_value, 0,
  2592. esd_config->groups * status_len);
  2593. }
  2594. return 0;
  2595. error4:
  2596. kfree(esd_config->return_buf);
  2597. error3:
  2598. kfree(esd_config->status_value);
  2599. error2:
  2600. kfree(esd_config->status_valid_params);
  2601. kfree(esd_config->status_cmds_rlen);
  2602. error1:
  2603. kfree(esd_config->status_cmd.cmds);
  2604. error:
  2605. return rc;
  2606. }
  2607. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2608. {
  2609. int rc = 0;
  2610. const char *string;
  2611. struct drm_panel_esd_config *esd_config;
  2612. struct dsi_parser_utils *utils = &panel->utils;
  2613. u8 *esd_mode = NULL;
  2614. esd_config = &panel->esd_config;
  2615. esd_config->status_mode = ESD_MODE_MAX;
  2616. esd_config->esd_enabled = utils->read_bool(utils->data,
  2617. "qcom,esd-check-enabled");
  2618. if (!esd_config->esd_enabled)
  2619. return 0;
  2620. rc = utils->read_string(utils->data,
  2621. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2622. if (!rc) {
  2623. if (!strcmp(string, "bta_check")) {
  2624. esd_config->status_mode = ESD_MODE_SW_BTA;
  2625. } else if (!strcmp(string, "reg_read")) {
  2626. esd_config->status_mode = ESD_MODE_REG_READ;
  2627. } else if (!strcmp(string, "te_signal_check")) {
  2628. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2629. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2630. } else {
  2631. pr_err("TE-ESD not valid for video mode\n");
  2632. rc = -EINVAL;
  2633. goto error;
  2634. }
  2635. } else {
  2636. pr_err("No valid panel-status-check-mode string\n");
  2637. rc = -EINVAL;
  2638. goto error;
  2639. }
  2640. } else {
  2641. pr_debug("status check method not defined!\n");
  2642. rc = -EINVAL;
  2643. goto error;
  2644. }
  2645. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2646. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2647. if (rc) {
  2648. pr_err("failed to parse esd reg read mode params, rc=%d\n",
  2649. rc);
  2650. goto error;
  2651. }
  2652. esd_mode = "register_read";
  2653. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2654. esd_mode = "bta_trigger";
  2655. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2656. esd_mode = "te_check";
  2657. }
  2658. pr_info("ESD enabled with mode: %s\n", esd_mode);
  2659. return 0;
  2660. error:
  2661. panel->esd_config.esd_enabled = false;
  2662. return rc;
  2663. }
  2664. static void dsi_panel_update_util(struct dsi_panel *panel,
  2665. struct device_node *parser_node)
  2666. {
  2667. struct dsi_parser_utils *utils = &panel->utils;
  2668. if (parser_node) {
  2669. *utils = *dsi_parser_get_parser_utils();
  2670. utils->data = parser_node;
  2671. pr_debug("switching to parser APIs\n");
  2672. goto end;
  2673. }
  2674. *utils = *dsi_parser_get_of_utils();
  2675. utils->data = panel->panel_of_node;
  2676. end:
  2677. utils->node = panel->panel_of_node;
  2678. }
  2679. struct dsi_panel *dsi_panel_get(struct device *parent,
  2680. struct device_node *of_node,
  2681. struct device_node *parser_node,
  2682. const char *type,
  2683. int topology_override)
  2684. {
  2685. struct dsi_panel *panel;
  2686. struct dsi_parser_utils *utils;
  2687. int rc = 0;
  2688. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2689. if (!panel)
  2690. return ERR_PTR(-ENOMEM);
  2691. panel->panel_of_node = of_node;
  2692. panel->parent = parent;
  2693. panel->type = type;
  2694. dsi_panel_update_util(panel, parser_node);
  2695. utils = &panel->utils;
  2696. panel->name = utils->get_property(utils->data,
  2697. "qcom,mdss-dsi-panel-name", NULL);
  2698. if (!panel->name)
  2699. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2700. rc = dsi_panel_parse_host_config(panel);
  2701. if (rc) {
  2702. pr_err("failed to parse host configuration, rc=%d\n", rc);
  2703. goto error;
  2704. }
  2705. rc = dsi_panel_parse_panel_mode(panel);
  2706. if (rc) {
  2707. pr_err("failed to parse panel mode configuration, rc=%d\n", rc);
  2708. goto error;
  2709. }
  2710. rc = dsi_panel_parse_dfps_caps(panel);
  2711. if (rc)
  2712. pr_err("failed to parse dfps configuration, rc=%d\n", rc);
  2713. if (!(panel->dfps_caps.dfps_support)) {
  2714. /* qsync and dfps are mutually exclusive features */
  2715. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2716. if (rc)
  2717. pr_err("failed to parse qsync features, rc=%d\n", rc);
  2718. }
  2719. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2720. if (rc)
  2721. pr_err("failed to parse dynamic clk config, rc=%d\n", rc);
  2722. rc = dsi_panel_parse_phy_props(panel);
  2723. if (rc) {
  2724. pr_err("failed to parse panel physical dimension, rc=%d\n", rc);
  2725. goto error;
  2726. }
  2727. rc = dsi_panel_parse_gpios(panel);
  2728. if (rc) {
  2729. pr_err("failed to parse panel gpios, rc=%d\n", rc);
  2730. goto error;
  2731. }
  2732. rc = dsi_panel_parse_power_cfg(panel);
  2733. if (rc)
  2734. pr_err("failed to parse power config, rc=%d\n", rc);
  2735. rc = dsi_panel_parse_bl_config(panel);
  2736. if (rc) {
  2737. pr_err("failed to parse backlight config, rc=%d\n", rc);
  2738. if (rc == -EPROBE_DEFER)
  2739. goto error;
  2740. }
  2741. rc = dsi_panel_parse_misc_features(panel);
  2742. if (rc)
  2743. pr_err("failed to parse misc features, rc=%d\n", rc);
  2744. rc = dsi_panel_parse_hdr_config(panel);
  2745. if (rc)
  2746. pr_err("failed to parse hdr config, rc=%d\n", rc);
  2747. rc = dsi_panel_get_mode_count(panel);
  2748. if (rc) {
  2749. pr_err("failed to get mode count, rc=%d\n", rc);
  2750. goto error;
  2751. }
  2752. rc = dsi_panel_parse_dms_info(panel);
  2753. if (rc)
  2754. pr_debug("failed to get dms info, rc=%d\n", rc);
  2755. rc = dsi_panel_parse_esd_config(panel);
  2756. if (rc)
  2757. pr_debug("failed to parse esd config, rc=%d\n", rc);
  2758. drm_panel_init(&panel->drm_panel);
  2759. panel->drm_panel.dev = &panel->mipi_device.dev;
  2760. panel->mipi_device.dev.of_node = of_node;
  2761. rc = drm_panel_add(&panel->drm_panel);
  2762. if (rc)
  2763. goto error;
  2764. mutex_init(&panel->panel_lock);
  2765. return panel;
  2766. error:
  2767. kfree(panel);
  2768. return ERR_PTR(rc);
  2769. }
  2770. void dsi_panel_put(struct dsi_panel *panel)
  2771. {
  2772. drm_panel_remove(&panel->drm_panel);
  2773. /* free resources allocated for ESD check */
  2774. dsi_panel_esd_config_deinit(&panel->esd_config);
  2775. kfree(panel);
  2776. }
  2777. int dsi_panel_drv_init(struct dsi_panel *panel,
  2778. struct mipi_dsi_host *host)
  2779. {
  2780. int rc = 0;
  2781. struct mipi_dsi_device *dev;
  2782. if (!panel || !host) {
  2783. pr_err("invalid params\n");
  2784. return -EINVAL;
  2785. }
  2786. mutex_lock(&panel->panel_lock);
  2787. dev = &panel->mipi_device;
  2788. dev->host = host;
  2789. /*
  2790. * We dont have device structure since panel is not a device node.
  2791. * When using drm panel framework, the device is probed when the host is
  2792. * create.
  2793. */
  2794. dev->channel = 0;
  2795. dev->lanes = 4;
  2796. panel->host = host;
  2797. rc = dsi_panel_vreg_get(panel);
  2798. if (rc) {
  2799. pr_err("[%s] failed to get panel regulators, rc=%d\n",
  2800. panel->name, rc);
  2801. goto exit;
  2802. }
  2803. rc = dsi_panel_pinctrl_init(panel);
  2804. if (rc) {
  2805. pr_err("[%s] failed to init pinctrl, rc=%d\n", panel->name, rc);
  2806. goto error_vreg_put;
  2807. }
  2808. rc = dsi_panel_gpio_request(panel);
  2809. if (rc) {
  2810. pr_err("[%s] failed to request gpios, rc=%d\n", panel->name,
  2811. rc);
  2812. goto error_pinctrl_deinit;
  2813. }
  2814. rc = dsi_panel_bl_register(panel);
  2815. if (rc) {
  2816. if (rc != -EPROBE_DEFER)
  2817. pr_err("[%s] failed to register backlight, rc=%d\n",
  2818. panel->name, rc);
  2819. goto error_gpio_release;
  2820. }
  2821. goto exit;
  2822. error_gpio_release:
  2823. (void)dsi_panel_gpio_release(panel);
  2824. error_pinctrl_deinit:
  2825. (void)dsi_panel_pinctrl_deinit(panel);
  2826. error_vreg_put:
  2827. (void)dsi_panel_vreg_put(panel);
  2828. exit:
  2829. mutex_unlock(&panel->panel_lock);
  2830. return rc;
  2831. }
  2832. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2833. {
  2834. int rc = 0;
  2835. if (!panel) {
  2836. pr_err("invalid params\n");
  2837. return -EINVAL;
  2838. }
  2839. mutex_lock(&panel->panel_lock);
  2840. rc = dsi_panel_bl_unregister(panel);
  2841. if (rc)
  2842. pr_err("[%s] failed to unregister backlight, rc=%d\n",
  2843. panel->name, rc);
  2844. rc = dsi_panel_gpio_release(panel);
  2845. if (rc)
  2846. pr_err("[%s] failed to release gpios, rc=%d\n", panel->name,
  2847. rc);
  2848. rc = dsi_panel_pinctrl_deinit(panel);
  2849. if (rc)
  2850. pr_err("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2851. rc);
  2852. rc = dsi_panel_vreg_put(panel);
  2853. if (rc)
  2854. pr_err("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2855. panel->host = NULL;
  2856. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2857. mutex_unlock(&panel->panel_lock);
  2858. return rc;
  2859. }
  2860. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2861. struct dsi_display_mode *mode)
  2862. {
  2863. return 0;
  2864. }
  2865. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2866. {
  2867. const u32 SINGLE_MODE_SUPPORT = 1;
  2868. struct dsi_parser_utils *utils;
  2869. struct device_node *timings_np;
  2870. int count, rc = 0;
  2871. if (!panel) {
  2872. pr_err("invalid params\n");
  2873. return -EINVAL;
  2874. }
  2875. utils = &panel->utils;
  2876. panel->num_timing_nodes = 0;
  2877. timings_np = utils->get_child_by_name(utils->data,
  2878. "qcom,mdss-dsi-display-timings");
  2879. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2880. pr_err("no display timing nodes defined\n");
  2881. rc = -EINVAL;
  2882. goto error;
  2883. }
  2884. count = utils->get_child_count(timings_np);
  2885. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2886. count > DSI_MODE_MAX) {
  2887. pr_err("invalid count of timing nodes: %d\n", count);
  2888. rc = -EINVAL;
  2889. goto error;
  2890. }
  2891. /* No multiresolution support is available for video mode panels */
  2892. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2893. !panel->host_config.ext_bridge_mode)
  2894. count = SINGLE_MODE_SUPPORT;
  2895. panel->num_timing_nodes = count;
  2896. error:
  2897. return rc;
  2898. }
  2899. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2900. struct dsi_panel_phy_props *phy_props)
  2901. {
  2902. int rc = 0;
  2903. if (!panel || !phy_props) {
  2904. pr_err("invalid params\n");
  2905. return -EINVAL;
  2906. }
  2907. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2908. return rc;
  2909. }
  2910. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2911. struct dsi_dfps_capabilities *dfps_caps)
  2912. {
  2913. int rc = 0;
  2914. if (!panel || !dfps_caps) {
  2915. pr_err("invalid params\n");
  2916. return -EINVAL;
  2917. }
  2918. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2919. return rc;
  2920. }
  2921. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2922. {
  2923. int i;
  2924. if (!mode->priv_info)
  2925. return;
  2926. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2927. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2928. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2929. }
  2930. kfree(mode->priv_info);
  2931. }
  2932. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2933. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2934. {
  2935. u32 frame_time_us,nslices;
  2936. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz;
  2937. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2938. struct dsi_mode_info *timing = &mode->timing;
  2939. struct dsi_display_mode *display_mode;
  2940. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2941. * + 1 byte dcs data command.
  2942. */
  2943. const u32 packet_overhead = 56;
  2944. display_mode = container_of(timing, struct dsi_display_mode, timing);
  2945. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  2946. if (timing->dsc_enabled) {
  2947. nslices = (timing->h_active)/(dsc->slice_width);
  2948. /* (slice width x bit-per-pixel + packet overhead) x
  2949. * number of slices x height x fps / lane
  2950. */
  2951. bits_per_line = ((dsc->slice_width * dsc->bpp) +
  2952. packet_overhead) * nslices;
  2953. bits_per_line = bits_per_line / (config->num_data_lanes);
  2954. min_bitclk_hz = (bits_per_line * timing->v_active *
  2955. timing->refresh_rate);
  2956. } else {
  2957. total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)
  2958. * timing->v_active));
  2959. /* calculate the actual bitclk needed to transfer the frame */
  2960. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  2961. (config->bpp)) / (config->num_data_lanes);
  2962. }
  2963. timing->min_dsi_clk_hz = min_bitclk_hz;
  2964. if (timing->clk_rate_hz) {
  2965. /* adjust the transfer time proportionately for bit clk*/
  2966. timing->dsi_transfer_time_us = mult_frac(frame_time_us,
  2967. min_bitclk_hz, timing->clk_rate_hz);
  2968. } else if (mode->priv_info->mdp_transfer_time_us) {
  2969. timing->dsi_transfer_time_us =
  2970. mode->priv_info->mdp_transfer_time_us;
  2971. } else {
  2972. timing->dsi_transfer_time_us = frame_time_us -
  2973. frame_threshold_us;
  2974. }
  2975. /* Calculate pclk_khz to update modeinfo */
  2976. pclk_rate_hz = mult_frac(min_bitclk_hz, frame_time_us,
  2977. timing->dsi_transfer_time_us);
  2978. display_mode->pixel_clk_khz = mult_frac(pclk_rate_hz,
  2979. config->num_data_lanes, config->bpp);
  2980. do_div(display_mode->pixel_clk_khz, 1000);
  2981. }
  2982. int dsi_panel_get_mode(struct dsi_panel *panel,
  2983. u32 index, struct dsi_display_mode *mode,
  2984. int topology_override)
  2985. {
  2986. struct device_node *timings_np, *child_np;
  2987. struct dsi_parser_utils *utils;
  2988. struct dsi_display_mode_priv_info *prv_info;
  2989. u32 child_idx = 0;
  2990. int rc = 0, num_timings;
  2991. void *utils_data = NULL;
  2992. if (!panel || !mode) {
  2993. pr_err("invalid params\n");
  2994. return -EINVAL;
  2995. }
  2996. mutex_lock(&panel->panel_lock);
  2997. utils = &panel->utils;
  2998. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  2999. if (!mode->priv_info) {
  3000. rc = -ENOMEM;
  3001. goto done;
  3002. }
  3003. prv_info = mode->priv_info;
  3004. timings_np = utils->get_child_by_name(utils->data,
  3005. "qcom,mdss-dsi-display-timings");
  3006. if (!timings_np) {
  3007. pr_err("no display timing nodes defined\n");
  3008. rc = -EINVAL;
  3009. goto parse_fail;
  3010. }
  3011. num_timings = utils->get_child_count(timings_np);
  3012. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3013. pr_err("invalid count of timing nodes: %d\n", num_timings);
  3014. rc = -EINVAL;
  3015. goto parse_fail;
  3016. }
  3017. utils_data = utils->data;
  3018. dsi_for_each_child_node(timings_np, child_np) {
  3019. if (index != child_idx++)
  3020. continue;
  3021. utils->data = child_np;
  3022. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3023. if (rc) {
  3024. pr_err("failed to parse panel timing, rc=%d\n", rc);
  3025. goto parse_fail;
  3026. }
  3027. rc = dsi_panel_parse_dsc_params(mode, utils);
  3028. if (rc) {
  3029. pr_err("failed to parse dsc params, rc=%d\n", rc);
  3030. goto parse_fail;
  3031. }
  3032. rc = dsi_panel_parse_topology(prv_info, utils,
  3033. topology_override);
  3034. if (rc) {
  3035. pr_err("failed to parse panel topology, rc=%d\n", rc);
  3036. goto parse_fail;
  3037. }
  3038. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3039. if (rc) {
  3040. pr_err("failed to parse command sets, rc=%d\n", rc);
  3041. goto parse_fail;
  3042. }
  3043. rc = dsi_panel_parse_jitter_config(mode, utils);
  3044. if (rc)
  3045. pr_err(
  3046. "failed to parse panel jitter config, rc=%d\n", rc);
  3047. rc = dsi_panel_parse_phy_timing(mode, utils);
  3048. if (rc) {
  3049. pr_err(
  3050. "failed to parse panel phy timings, rc=%d\n", rc);
  3051. goto parse_fail;
  3052. }
  3053. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3054. if (rc)
  3055. pr_err("failed to partial update caps, rc=%d\n", rc);
  3056. if (panel->panel_mode_switch_enabled) {
  3057. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3058. if (rc) {
  3059. pr_err("PMS: failed to parse panel mode\n");
  3060. rc = 0;
  3061. mode->panel_mode = panel->panel_mode;
  3062. }
  3063. } else {
  3064. mode->panel_mode = panel->panel_mode;
  3065. }
  3066. }
  3067. goto done;
  3068. parse_fail:
  3069. kfree(mode->priv_info);
  3070. mode->priv_info = NULL;
  3071. done:
  3072. utils->data = utils_data;
  3073. mutex_unlock(&panel->panel_lock);
  3074. return rc;
  3075. }
  3076. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3077. struct dsi_display_mode *mode,
  3078. struct dsi_host_config *config)
  3079. {
  3080. int rc = 0;
  3081. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3082. if (!panel || !mode || !config) {
  3083. pr_err("invalid params\n");
  3084. return -EINVAL;
  3085. }
  3086. mutex_lock(&panel->panel_lock);
  3087. config->panel_mode = panel->panel_mode;
  3088. memcpy(&config->common_config, &panel->host_config,
  3089. sizeof(config->common_config));
  3090. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3091. memcpy(&config->u.video_engine, &panel->video_config,
  3092. sizeof(config->u.video_engine));
  3093. } else {
  3094. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3095. sizeof(config->u.cmd_engine));
  3096. }
  3097. memcpy(&config->video_timing, &mode->timing,
  3098. sizeof(config->video_timing));
  3099. config->video_timing.mdp_transfer_time_us =
  3100. mode->priv_info->mdp_transfer_time_us;
  3101. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3102. config->video_timing.dsc = &mode->priv_info->dsc;
  3103. if (dyn_clk_caps->dyn_clk_support)
  3104. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3105. else
  3106. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3107. config->esc_clk_rate_hz = 19200000;
  3108. mutex_unlock(&panel->panel_lock);
  3109. return rc;
  3110. }
  3111. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3112. {
  3113. int rc = 0;
  3114. if (!panel) {
  3115. pr_err("invalid params\n");
  3116. return -EINVAL;
  3117. }
  3118. mutex_lock(&panel->panel_lock);
  3119. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3120. if (panel->lp11_init)
  3121. goto error;
  3122. rc = dsi_panel_power_on(panel);
  3123. if (rc) {
  3124. pr_err("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3125. goto error;
  3126. }
  3127. error:
  3128. mutex_unlock(&panel->panel_lock);
  3129. return rc;
  3130. }
  3131. int dsi_panel_update_pps(struct dsi_panel *panel)
  3132. {
  3133. int rc = 0;
  3134. struct dsi_panel_cmd_set *set = NULL;
  3135. struct dsi_display_mode_priv_info *priv_info = NULL;
  3136. if (!panel || !panel->cur_mode) {
  3137. pr_err("invalid params\n");
  3138. return -EINVAL;
  3139. }
  3140. mutex_lock(&panel->panel_lock);
  3141. priv_info = panel->cur_mode->priv_info;
  3142. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3143. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc, panel->dsc_pps_cmd, 0);
  3144. rc = dsi_panel_create_cmd_packets(panel->dsc_pps_cmd,
  3145. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3146. if (rc) {
  3147. pr_err("failed to create cmd packets, rc=%d\n", rc);
  3148. goto error;
  3149. }
  3150. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3151. if (rc) {
  3152. pr_err("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3153. panel->name, rc);
  3154. }
  3155. dsi_panel_destroy_cmd_packets(set);
  3156. error:
  3157. mutex_unlock(&panel->panel_lock);
  3158. return rc;
  3159. }
  3160. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3161. {
  3162. int rc = 0;
  3163. if (!panel) {
  3164. pr_err("invalid params\n");
  3165. return -EINVAL;
  3166. }
  3167. mutex_lock(&panel->panel_lock);
  3168. if (!panel->panel_initialized)
  3169. goto exit;
  3170. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3171. if (rc)
  3172. pr_err("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3173. panel->name, rc);
  3174. exit:
  3175. mutex_unlock(&panel->panel_lock);
  3176. return rc;
  3177. }
  3178. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3179. {
  3180. int rc = 0;
  3181. if (!panel) {
  3182. pr_err("invalid params\n");
  3183. return -EINVAL;
  3184. }
  3185. mutex_lock(&panel->panel_lock);
  3186. if (!panel->panel_initialized)
  3187. goto exit;
  3188. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3189. if (rc)
  3190. pr_err("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3191. panel->name, rc);
  3192. exit:
  3193. mutex_unlock(&panel->panel_lock);
  3194. return rc;
  3195. }
  3196. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3197. {
  3198. int rc = 0;
  3199. if (!panel) {
  3200. pr_err("invalid params\n");
  3201. return -EINVAL;
  3202. }
  3203. mutex_lock(&panel->panel_lock);
  3204. if (!panel->panel_initialized)
  3205. goto exit;
  3206. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3207. if (rc)
  3208. pr_err("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3209. panel->name, rc);
  3210. exit:
  3211. mutex_unlock(&panel->panel_lock);
  3212. return rc;
  3213. }
  3214. int dsi_panel_prepare(struct dsi_panel *panel)
  3215. {
  3216. int rc = 0;
  3217. if (!panel) {
  3218. pr_err("invalid params\n");
  3219. return -EINVAL;
  3220. }
  3221. mutex_lock(&panel->panel_lock);
  3222. if (panel->lp11_init) {
  3223. rc = dsi_panel_power_on(panel);
  3224. if (rc) {
  3225. pr_err("[%s] panel power on failed, rc=%d\n",
  3226. panel->name, rc);
  3227. goto error;
  3228. }
  3229. }
  3230. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3231. if (rc) {
  3232. pr_err("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3233. panel->name, rc);
  3234. goto error;
  3235. }
  3236. error:
  3237. mutex_unlock(&panel->panel_lock);
  3238. return rc;
  3239. }
  3240. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3241. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3242. {
  3243. static const int ROI_CMD_LEN = 5;
  3244. int rc = 0;
  3245. /* DTYPE_DCS_LWRITE */
  3246. char *caset, *paset;
  3247. set->cmds = NULL;
  3248. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3249. if (!caset) {
  3250. rc = -ENOMEM;
  3251. goto exit;
  3252. }
  3253. caset[0] = 0x2a;
  3254. caset[1] = (roi->x & 0xFF00) >> 8;
  3255. caset[2] = roi->x & 0xFF;
  3256. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3257. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3258. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3259. if (!paset) {
  3260. rc = -ENOMEM;
  3261. goto error_free_mem;
  3262. }
  3263. paset[0] = 0x2b;
  3264. paset[1] = (roi->y & 0xFF00) >> 8;
  3265. paset[2] = roi->y & 0xFF;
  3266. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3267. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3268. set->type = DSI_CMD_SET_ROI;
  3269. set->state = DSI_CMD_SET_STATE_LP;
  3270. set->count = 2; /* send caset + paset together */
  3271. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3272. if (!set->cmds) {
  3273. rc = -ENOMEM;
  3274. goto error_free_mem;
  3275. }
  3276. set->cmds[0].msg.channel = 0;
  3277. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3278. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3279. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3280. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3281. set->cmds[0].msg.tx_buf = caset;
  3282. set->cmds[0].msg.rx_len = 0;
  3283. set->cmds[0].msg.rx_buf = 0;
  3284. set->cmds[0].msg.wait_ms = 0;
  3285. set->cmds[0].last_command = 0;
  3286. set->cmds[0].post_wait_ms = 0;
  3287. set->cmds[1].msg.channel = 0;
  3288. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3289. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3290. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3291. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3292. set->cmds[1].msg.tx_buf = paset;
  3293. set->cmds[1].msg.rx_len = 0;
  3294. set->cmds[1].msg.rx_buf = 0;
  3295. set->cmds[1].msg.wait_ms = 0;
  3296. set->cmds[1].last_command = 1;
  3297. set->cmds[1].post_wait_ms = 0;
  3298. goto exit;
  3299. error_free_mem:
  3300. kfree(caset);
  3301. kfree(paset);
  3302. kfree(set->cmds);
  3303. exit:
  3304. return rc;
  3305. }
  3306. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3307. int ctrl_idx)
  3308. {
  3309. int rc = 0;
  3310. if (!panel) {
  3311. pr_err("invalid params\n");
  3312. return -EINVAL;
  3313. }
  3314. mutex_lock(&panel->panel_lock);
  3315. pr_debug("ctrl:%d qsync on\n", ctrl_idx);
  3316. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3317. if (rc)
  3318. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3319. panel->name, rc);
  3320. mutex_unlock(&panel->panel_lock);
  3321. return rc;
  3322. }
  3323. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3324. int ctrl_idx)
  3325. {
  3326. int rc = 0;
  3327. if (!panel) {
  3328. pr_err("invalid params\n");
  3329. return -EINVAL;
  3330. }
  3331. mutex_lock(&panel->panel_lock);
  3332. pr_debug("ctrl:%d qsync off\n", ctrl_idx);
  3333. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3334. if (rc)
  3335. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3336. panel->name, rc);
  3337. mutex_unlock(&panel->panel_lock);
  3338. return rc;
  3339. }
  3340. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3341. struct dsi_rect *roi)
  3342. {
  3343. int rc = 0;
  3344. struct dsi_panel_cmd_set *set;
  3345. struct dsi_display_mode_priv_info *priv_info;
  3346. if (!panel || !panel->cur_mode) {
  3347. pr_err("Invalid params\n");
  3348. return -EINVAL;
  3349. }
  3350. priv_info = panel->cur_mode->priv_info;
  3351. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3352. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3353. if (rc) {
  3354. pr_err("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3355. panel->name, rc);
  3356. return rc;
  3357. }
  3358. pr_debug("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3359. roi->x, roi->y, roi->w, roi->h);
  3360. mutex_lock(&panel->panel_lock);
  3361. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3362. if (rc)
  3363. pr_err("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3364. panel->name, rc);
  3365. mutex_unlock(&panel->panel_lock);
  3366. dsi_panel_destroy_cmd_packets(set);
  3367. dsi_panel_dealloc_cmd_packets(set);
  3368. return rc;
  3369. }
  3370. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3371. {
  3372. int rc = 0;
  3373. if (!panel) {
  3374. pr_err("Invalid params\n");
  3375. return -EINVAL;
  3376. }
  3377. mutex_lock(&panel->panel_lock);
  3378. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3379. if (rc)
  3380. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3381. panel->name, rc);
  3382. mutex_unlock(&panel->panel_lock);
  3383. return rc;
  3384. }
  3385. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3386. {
  3387. int rc = 0;
  3388. if (!panel) {
  3389. pr_err("Invalid params\n");
  3390. return -EINVAL;
  3391. }
  3392. mutex_lock(&panel->panel_lock);
  3393. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3394. if (rc)
  3395. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3396. panel->name, rc);
  3397. mutex_unlock(&panel->panel_lock);
  3398. return rc;
  3399. }
  3400. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3401. {
  3402. int rc = 0;
  3403. if (!panel) {
  3404. pr_err("Invalid params\n");
  3405. return -EINVAL;
  3406. }
  3407. mutex_lock(&panel->panel_lock);
  3408. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3409. if (rc)
  3410. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3411. panel->name, rc);
  3412. mutex_unlock(&panel->panel_lock);
  3413. return rc;
  3414. }
  3415. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3416. {
  3417. int rc = 0;
  3418. if (!panel) {
  3419. pr_err("Invalid params\n");
  3420. return -EINVAL;
  3421. }
  3422. mutex_lock(&panel->panel_lock);
  3423. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3424. if (rc)
  3425. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3426. panel->name, rc);
  3427. mutex_unlock(&panel->panel_lock);
  3428. return rc;
  3429. }
  3430. int dsi_panel_switch(struct dsi_panel *panel)
  3431. {
  3432. int rc = 0;
  3433. if (!panel) {
  3434. pr_err("Invalid params\n");
  3435. return -EINVAL;
  3436. }
  3437. mutex_lock(&panel->panel_lock);
  3438. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3439. if (rc)
  3440. pr_err("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3441. panel->name, rc);
  3442. mutex_unlock(&panel->panel_lock);
  3443. return rc;
  3444. }
  3445. int dsi_panel_post_switch(struct dsi_panel *panel)
  3446. {
  3447. int rc = 0;
  3448. if (!panel) {
  3449. pr_err("Invalid params\n");
  3450. return -EINVAL;
  3451. }
  3452. mutex_lock(&panel->panel_lock);
  3453. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3454. if (rc)
  3455. pr_err("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3456. panel->name, rc);
  3457. mutex_unlock(&panel->panel_lock);
  3458. return rc;
  3459. }
  3460. int dsi_panel_enable(struct dsi_panel *panel)
  3461. {
  3462. int rc = 0;
  3463. if (!panel) {
  3464. pr_err("Invalid params\n");
  3465. return -EINVAL;
  3466. }
  3467. mutex_lock(&panel->panel_lock);
  3468. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3469. if (rc)
  3470. pr_err("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3471. panel->name, rc);
  3472. else
  3473. panel->panel_initialized = true;
  3474. mutex_unlock(&panel->panel_lock);
  3475. return rc;
  3476. }
  3477. int dsi_panel_post_enable(struct dsi_panel *panel)
  3478. {
  3479. int rc = 0;
  3480. if (!panel) {
  3481. pr_err("invalid params\n");
  3482. return -EINVAL;
  3483. }
  3484. mutex_lock(&panel->panel_lock);
  3485. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3486. if (rc) {
  3487. pr_err("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3488. panel->name, rc);
  3489. goto error;
  3490. }
  3491. error:
  3492. mutex_unlock(&panel->panel_lock);
  3493. return rc;
  3494. }
  3495. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3496. {
  3497. int rc = 0;
  3498. if (!panel) {
  3499. pr_err("invalid params\n");
  3500. return -EINVAL;
  3501. }
  3502. mutex_lock(&panel->panel_lock);
  3503. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3504. if (rc) {
  3505. pr_err("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3506. panel->name, rc);
  3507. goto error;
  3508. }
  3509. error:
  3510. mutex_unlock(&panel->panel_lock);
  3511. return rc;
  3512. }
  3513. int dsi_panel_disable(struct dsi_panel *panel)
  3514. {
  3515. int rc = 0;
  3516. if (!panel) {
  3517. pr_err("invalid params\n");
  3518. return -EINVAL;
  3519. }
  3520. mutex_lock(&panel->panel_lock);
  3521. /* Avoid sending panel off commands when ESD recovery is underway */
  3522. if (!atomic_read(&panel->esd_recovery_pending)) {
  3523. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3524. if (rc) {
  3525. /*
  3526. * Sending panel off commands may fail when DSI
  3527. * controller is in a bad state. These failures can be
  3528. * ignored since controller will go for full reset on
  3529. * subsequent display enable anyway.
  3530. */
  3531. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3532. panel->name, rc);
  3533. rc = 0;
  3534. }
  3535. }
  3536. panel->panel_initialized = false;
  3537. mutex_unlock(&panel->panel_lock);
  3538. return rc;
  3539. }
  3540. int dsi_panel_unprepare(struct dsi_panel *panel)
  3541. {
  3542. int rc = 0;
  3543. if (!panel) {
  3544. pr_err("invalid params\n");
  3545. return -EINVAL;
  3546. }
  3547. mutex_lock(&panel->panel_lock);
  3548. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3549. if (rc) {
  3550. pr_err("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3551. panel->name, rc);
  3552. goto error;
  3553. }
  3554. error:
  3555. mutex_unlock(&panel->panel_lock);
  3556. return rc;
  3557. }
  3558. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3559. {
  3560. int rc = 0;
  3561. if (!panel) {
  3562. pr_err("invalid params\n");
  3563. return -EINVAL;
  3564. }
  3565. mutex_lock(&panel->panel_lock);
  3566. rc = dsi_panel_power_off(panel);
  3567. if (rc) {
  3568. pr_err("[%s] panel power_Off failed, rc=%d\n",
  3569. panel->name, rc);
  3570. goto error;
  3571. }
  3572. error:
  3573. mutex_unlock(&panel->panel_lock);
  3574. return rc;
  3575. }