main.c 137 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  36. #include <linux/soc/qcom/smem.h>
  37. #define PERISEC_SMEM_ID 651
  38. #define HW_WIFI_UID 0x508
  39. #else
  40. #include "smcinvoke.h"
  41. #include "smcinvoke_object.h"
  42. #include "IClientEnv.h"
  43. #define HW_STATE_UID 0x108
  44. #define HW_OP_GET_STATE 1
  45. #define HW_WIFI_UID 0x508
  46. #define FEATURE_NOT_SUPPORTED 12
  47. #define PERIPHERAL_NOT_FOUND 10
  48. #endif
  49. #endif
  50. #define CNSS_DUMP_FORMAT_VER 0x11
  51. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  52. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  53. #define CNSS_DUMP_NAME "CNSS_WLAN"
  54. #define CNSS_DUMP_DESC_SIZE 0x1000
  55. #define CNSS_DUMP_SEG_VER 0x1
  56. #define FILE_SYSTEM_READY 1
  57. #define FW_READY_TIMEOUT 20000
  58. #define FW_ASSERT_TIMEOUT 5000
  59. #define CNSS_EVENT_PENDING 2989
  60. #define POWER_RESET_MIN_DELAY_MS 100
  61. #define CNSS_QUIRKS_DEFAULT 0
  62. #ifdef CONFIG_CNSS_EMULATION
  63. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  64. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  65. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  66. #else
  67. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  68. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  69. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  70. #endif
  71. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  72. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  73. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  74. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  75. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  76. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  77. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  78. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  79. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  80. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  81. enum cnss_cal_db_op {
  82. CNSS_CAL_DB_UPLOAD,
  83. CNSS_CAL_DB_DOWNLOAD,
  84. CNSS_CAL_DB_INVALID_OP,
  85. };
  86. enum cnss_recovery_type {
  87. CNSS_WLAN_RECOVERY = 0x1,
  88. CNSS_PCSS_RECOVERY = 0x2,
  89. };
  90. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  91. #define CNSS_MAX_DEV_NUM 2
  92. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  93. static int plat_env_count;
  94. #else
  95. static struct cnss_plat_data *plat_env;
  96. #endif
  97. static bool cnss_allow_driver_loading;
  98. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  99. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  100. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  101. };
  102. static struct cnss_fw_files FW_FILES_DEFAULT = {
  103. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  104. "utfbd.bin", "epping.bin", "evicted.bin"
  105. };
  106. struct cnss_driver_event {
  107. struct list_head list;
  108. enum cnss_driver_event_type type;
  109. bool sync;
  110. struct completion complete;
  111. int ret;
  112. void *data;
  113. };
  114. bool cnss_check_driver_loading_allowed(void)
  115. {
  116. return cnss_allow_driver_loading;
  117. }
  118. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  119. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  120. struct cnss_plat_data *plat_priv)
  121. {
  122. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  123. if (plat_priv) {
  124. plat_priv->plat_idx = plat_env_count;
  125. plat_env[plat_priv->plat_idx] = plat_priv;
  126. plat_env_count++;
  127. }
  128. }
  129. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  130. *plat_dev)
  131. {
  132. int i;
  133. if (!plat_dev)
  134. return NULL;
  135. for (i = 0; i < plat_env_count; i++) {
  136. if (plat_env[i]->plat_dev == plat_dev)
  137. return plat_env[i];
  138. }
  139. return NULL;
  140. }
  141. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  142. *plat_dev)
  143. {
  144. int i;
  145. if (!plat_dev) {
  146. for (i = 0; i < plat_env_count; i++) {
  147. if (plat_env[i])
  148. return plat_env[i];
  149. }
  150. }
  151. return NULL;
  152. }
  153. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  154. {
  155. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  156. plat_env[plat_priv->plat_idx] = NULL;
  157. plat_env_count--;
  158. }
  159. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  160. {
  161. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  162. "wlan_%d", plat_priv->plat_idx);
  163. return 0;
  164. }
  165. static int cnss_plat_env_available(void)
  166. {
  167. int ret = 0;
  168. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  169. cnss_pr_err("ERROR: No space to store plat_priv\n");
  170. ret = -ENOMEM;
  171. }
  172. return ret;
  173. }
  174. int cnss_get_plat_env_count(void)
  175. {
  176. return plat_env_count;
  177. }
  178. struct cnss_plat_data *cnss_get_plat_env(int index)
  179. {
  180. return plat_env[index];
  181. }
  182. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  183. {
  184. int i;
  185. for (i = 0; i < plat_env_count; i++) {
  186. if (plat_env[i]->rc_num == rc_num)
  187. return plat_env[i];
  188. }
  189. return NULL;
  190. }
  191. static inline int
  192. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  193. {
  194. return of_property_read_u32(plat_priv->dev_node,
  195. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  196. }
  197. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  198. {
  199. int ret = 0;
  200. ret = cnss_get_qrtr_node_id(plat_priv);
  201. if (ret) {
  202. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  203. plat_priv->qrtr_node_id = 0;
  204. plat_priv->wlfw_service_instance_id = 0;
  205. } else {
  206. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  207. QRTR_NODE_FW_ID_BASE;
  208. cnss_pr_dbg("service_instance_id=0x%x\n",
  209. plat_priv->wlfw_service_instance_id);
  210. }
  211. }
  212. static inline int
  213. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  214. {
  215. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  216. "qcom,pld_bus_ops_name",
  217. &plat_priv->pld_bus_ops_name);
  218. }
  219. #else
  220. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  221. struct cnss_plat_data *plat_priv)
  222. {
  223. plat_env = plat_priv;
  224. }
  225. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  226. {
  227. return plat_env;
  228. }
  229. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  230. {
  231. plat_env = NULL;
  232. }
  233. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  234. {
  235. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  236. "wlan");
  237. return 0;
  238. }
  239. static int cnss_plat_env_available(void)
  240. {
  241. return 0;
  242. }
  243. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  244. {
  245. return cnss_bus_dev_to_plat_priv(NULL);
  246. }
  247. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  248. {
  249. }
  250. static int
  251. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  252. {
  253. return 0;
  254. }
  255. #endif
  256. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  257. {
  258. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  259. "qcom,sleep-clk-support");
  260. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  261. plat_priv->sleep_clk);
  262. }
  263. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  264. {
  265. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  266. "qcom,no-bwscale");
  267. }
  268. static inline int
  269. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  270. {
  271. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  272. "qcom,wlan-rc-num", &plat_priv->rc_num);
  273. }
  274. bool cnss_is_dual_wlan_enabled(void)
  275. {
  276. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  277. }
  278. /**
  279. * cnss_get_mem_seg_count - Get segment count of memory
  280. * @type: memory type
  281. * @seg: segment count
  282. *
  283. * Return: 0 on success, negative value on failure
  284. */
  285. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  286. {
  287. struct cnss_plat_data *plat_priv;
  288. plat_priv = cnss_get_plat_priv(NULL);
  289. if (!plat_priv)
  290. return -ENODEV;
  291. switch (type) {
  292. case CNSS_REMOTE_MEM_TYPE_FW:
  293. *seg = plat_priv->fw_mem_seg_len;
  294. break;
  295. case CNSS_REMOTE_MEM_TYPE_QDSS:
  296. *seg = plat_priv->qdss_mem_seg_len;
  297. break;
  298. default:
  299. return -EINVAL;
  300. }
  301. return 0;
  302. }
  303. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  304. /**
  305. * cnss_get_wifi_kobject -return wifi kobject
  306. * Return: Null, to maintain driver comnpatibilty
  307. */
  308. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  309. {
  310. struct cnss_plat_data *plat_priv;
  311. plat_priv = cnss_get_plat_priv(NULL);
  312. if (!plat_priv)
  313. return NULL;
  314. return plat_priv->wifi_kobj;
  315. }
  316. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  317. /**
  318. * cnss_get_mem_segment_info - Get memory info of different type
  319. * @type: memory type
  320. * @segment: array to save the segment info
  321. * @seg: segment count
  322. *
  323. * Return: 0 on success, negative value on failure
  324. */
  325. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  326. struct cnss_mem_segment segment[],
  327. u32 segment_count)
  328. {
  329. struct cnss_plat_data *plat_priv;
  330. u32 i;
  331. plat_priv = cnss_get_plat_priv(NULL);
  332. if (!plat_priv)
  333. return -ENODEV;
  334. switch (type) {
  335. case CNSS_REMOTE_MEM_TYPE_FW:
  336. if (segment_count > plat_priv->fw_mem_seg_len)
  337. segment_count = plat_priv->fw_mem_seg_len;
  338. for (i = 0; i < segment_count; i++) {
  339. segment[i].size = plat_priv->fw_mem[i].size;
  340. segment[i].va = plat_priv->fw_mem[i].va;
  341. segment[i].pa = plat_priv->fw_mem[i].pa;
  342. }
  343. break;
  344. case CNSS_REMOTE_MEM_TYPE_QDSS:
  345. if (segment_count > plat_priv->qdss_mem_seg_len)
  346. segment_count = plat_priv->qdss_mem_seg_len;
  347. for (i = 0; i < segment_count; i++) {
  348. segment[i].size = plat_priv->qdss_mem[i].size;
  349. segment[i].va = plat_priv->qdss_mem[i].va;
  350. segment[i].pa = plat_priv->qdss_mem[i].pa;
  351. }
  352. break;
  353. default:
  354. return -EINVAL;
  355. }
  356. return 0;
  357. }
  358. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  359. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  360. {
  361. struct device_node *audio_ion_node;
  362. struct platform_device *audio_ion_pdev;
  363. audio_ion_node = of_find_compatible_node(NULL, NULL,
  364. "qcom,msm-audio-ion");
  365. if (!audio_ion_node) {
  366. cnss_pr_err("Unable to get Audio ion node");
  367. return -EINVAL;
  368. }
  369. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  370. of_node_put(audio_ion_node);
  371. if (!audio_ion_pdev) {
  372. cnss_pr_err("Unable to get Audio ion platform device");
  373. return -EINVAL;
  374. }
  375. plat_priv->audio_iommu_domain =
  376. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  377. put_device(&audio_ion_pdev->dev);
  378. if (!plat_priv->audio_iommu_domain) {
  379. cnss_pr_err("Unable to get Audio ion iommu domain");
  380. return -EINVAL;
  381. }
  382. return 0;
  383. }
  384. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  385. enum cnss_feature_v01 feature)
  386. {
  387. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  388. return -EINVAL;
  389. plat_priv->feature_list |= 1 << feature;
  390. return 0;
  391. }
  392. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  393. enum cnss_feature_v01 feature)
  394. {
  395. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  396. return -EINVAL;
  397. plat_priv->feature_list &= ~(1 << feature);
  398. return 0;
  399. }
  400. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  401. u64 *feature_list)
  402. {
  403. if (unlikely(!plat_priv))
  404. return -EINVAL;
  405. *feature_list = plat_priv->feature_list;
  406. return 0;
  407. }
  408. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  409. char *buf, const size_t buf_len)
  410. {
  411. if (unlikely(!plat_priv || !buf || !buf_len))
  412. return 0;
  413. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  414. "platform-name-required")) {
  415. struct device_node *root;
  416. root = of_find_node_by_path("/");
  417. if (root) {
  418. const char *model;
  419. size_t model_len;
  420. model = of_get_property(root, "model", NULL);
  421. if (model) {
  422. model_len = strlcpy(buf, model, buf_len);
  423. cnss_pr_dbg("Platform name: %s (%zu)\n",
  424. buf, model_len);
  425. return model_len;
  426. }
  427. }
  428. }
  429. return 0;
  430. }
  431. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  432. {
  433. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  434. return;
  435. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  436. plat_priv->driver_state,
  437. atomic_read(&plat_priv->pm_count));
  438. pm_stay_awake(&plat_priv->plat_dev->dev);
  439. }
  440. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  441. {
  442. int r = atomic_dec_return(&plat_priv->pm_count);
  443. WARN_ON(r < 0);
  444. if (r != 0)
  445. return;
  446. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  447. plat_priv->driver_state,
  448. atomic_read(&plat_priv->pm_count));
  449. pm_relax(&plat_priv->plat_dev->dev);
  450. }
  451. int cnss_get_fw_files_for_target(struct device *dev,
  452. struct cnss_fw_files *pfw_files,
  453. u32 target_type, u32 target_version)
  454. {
  455. if (!pfw_files)
  456. return -ENODEV;
  457. switch (target_version) {
  458. case QCA6174_REV3_VERSION:
  459. case QCA6174_REV3_2_VERSION:
  460. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  461. break;
  462. default:
  463. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  464. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  465. target_type, target_version);
  466. break;
  467. }
  468. return 0;
  469. }
  470. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  471. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  472. {
  473. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  474. if (!plat_priv)
  475. return -ENODEV;
  476. if (!cap)
  477. return -EINVAL;
  478. *cap = plat_priv->cap;
  479. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  480. return 0;
  481. }
  482. EXPORT_SYMBOL(cnss_get_platform_cap);
  483. /**
  484. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  485. * @dev: Device
  486. * @fw_cap: FW Capability which needs to be checked
  487. *
  488. * Return: TRUE if supported, FALSE on failure or if not supported
  489. */
  490. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  491. {
  492. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  493. bool is_supported = false;
  494. if (!plat_priv)
  495. return is_supported;
  496. if (!plat_priv->fw_caps)
  497. return is_supported;
  498. switch (fw_cap) {
  499. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  500. is_supported = !!(plat_priv->fw_caps &
  501. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  502. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  503. is_supported = false;
  504. break;
  505. default:
  506. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  507. }
  508. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  509. is_supported ? "supported" : "not supported");
  510. return is_supported;
  511. }
  512. EXPORT_SYMBOL(cnss_get_fw_cap);
  513. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  514. {
  515. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  516. if (!plat_priv)
  517. return;
  518. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  519. }
  520. EXPORT_SYMBOL(cnss_request_pm_qos);
  521. void cnss_remove_pm_qos(struct device *dev)
  522. {
  523. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  524. if (!plat_priv)
  525. return;
  526. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  527. }
  528. EXPORT_SYMBOL(cnss_remove_pm_qos);
  529. int cnss_wlan_enable(struct device *dev,
  530. struct cnss_wlan_enable_cfg *config,
  531. enum cnss_driver_mode mode,
  532. const char *host_version)
  533. {
  534. int ret = 0;
  535. struct cnss_plat_data *plat_priv;
  536. if (!dev) {
  537. cnss_pr_err("Invalid dev pointer\n");
  538. return -EINVAL;
  539. }
  540. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  541. if (!plat_priv)
  542. return -ENODEV;
  543. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  544. return 0;
  545. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  546. return 0;
  547. if (!config || !host_version) {
  548. cnss_pr_err("Invalid config or host_version pointer\n");
  549. return -EINVAL;
  550. }
  551. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  552. mode, config, host_version);
  553. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  554. goto skip_cfg;
  555. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  556. config->send_msi_ce = true;
  557. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  558. if (ret)
  559. goto out;
  560. skip_cfg:
  561. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  562. out:
  563. return ret;
  564. }
  565. EXPORT_SYMBOL(cnss_wlan_enable);
  566. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  567. {
  568. int ret = 0;
  569. struct cnss_plat_data *plat_priv;
  570. if (!dev) {
  571. cnss_pr_err("Invalid dev pointer\n");
  572. return -EINVAL;
  573. }
  574. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  575. if (!plat_priv)
  576. return -ENODEV;
  577. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  578. return 0;
  579. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  580. return 0;
  581. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  582. cnss_bus_free_qdss_mem(plat_priv);
  583. return ret;
  584. }
  585. EXPORT_SYMBOL(cnss_wlan_disable);
  586. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  587. dma_addr_t iova, size_t size)
  588. {
  589. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  590. uint32_t page_offset;
  591. if (!plat_priv)
  592. return -ENODEV;
  593. if (!plat_priv->audio_iommu_domain)
  594. return -EINVAL;
  595. page_offset = iova & (PAGE_SIZE - 1);
  596. if (page_offset + size > PAGE_SIZE)
  597. size += PAGE_SIZE;
  598. iova -= page_offset;
  599. paddr -= page_offset;
  600. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  601. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  602. IOMMU_CACHE);
  603. }
  604. EXPORT_SYMBOL(cnss_audio_smmu_map);
  605. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  606. {
  607. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  608. uint32_t page_offset;
  609. if (!plat_priv)
  610. return;
  611. if (!plat_priv->audio_iommu_domain)
  612. return;
  613. page_offset = iova & (PAGE_SIZE - 1);
  614. if (page_offset + size > PAGE_SIZE)
  615. size += PAGE_SIZE;
  616. iova -= page_offset;
  617. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  618. roundup(size, PAGE_SIZE));
  619. }
  620. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  621. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  622. u32 data_len, u8 *output)
  623. {
  624. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  625. int ret = 0;
  626. if (!plat_priv) {
  627. cnss_pr_err("plat_priv is NULL!\n");
  628. return -EINVAL;
  629. }
  630. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  631. return 0;
  632. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  633. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  634. plat_priv->driver_state);
  635. ret = -EINVAL;
  636. goto out;
  637. }
  638. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  639. data_len, output);
  640. out:
  641. return ret;
  642. }
  643. EXPORT_SYMBOL(cnss_athdiag_read);
  644. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  645. u32 data_len, u8 *input)
  646. {
  647. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  648. int ret = 0;
  649. if (!plat_priv) {
  650. cnss_pr_err("plat_priv is NULL!\n");
  651. return -EINVAL;
  652. }
  653. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  654. return 0;
  655. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  656. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  657. plat_priv->driver_state);
  658. ret = -EINVAL;
  659. goto out;
  660. }
  661. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  662. data_len, input);
  663. out:
  664. return ret;
  665. }
  666. EXPORT_SYMBOL(cnss_athdiag_write);
  667. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  668. {
  669. struct cnss_plat_data *plat_priv;
  670. if (!dev) {
  671. cnss_pr_err("Invalid dev pointer\n");
  672. return -EINVAL;
  673. }
  674. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  675. if (!plat_priv)
  676. return -ENODEV;
  677. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  678. return 0;
  679. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  680. }
  681. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  682. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  683. {
  684. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  685. if (!plat_priv)
  686. return -EINVAL;
  687. if (!plat_priv->fw_pcie_gen_switch) {
  688. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  689. return -EOPNOTSUPP;
  690. }
  691. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  692. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  693. return -EINVAL;
  694. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  695. plat_priv->pcie_gen_speed = pcie_gen_speed;
  696. return 0;
  697. }
  698. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  699. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  700. {
  701. switch (plat_priv->device_id) {
  702. case PEACH_DEVICE_ID:
  703. if (!plat_priv->fw_aux_uc_support) {
  704. cnss_pr_dbg("FW does not support aux uc capability\n");
  705. return false;
  706. }
  707. break;
  708. default:
  709. cnss_pr_dbg("Host does not support aux uc capability\n");
  710. return false;
  711. }
  712. return true;
  713. }
  714. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  715. {
  716. int ret = 0;
  717. if (!plat_priv)
  718. return -ENODEV;
  719. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  720. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  721. if (ret)
  722. goto out;
  723. cnss_bus_load_tme_patch(plat_priv);
  724. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  725. WLFW_TME_LITE_PATCH_FILE_V01);
  726. if (plat_priv->hds_enabled)
  727. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  728. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  729. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  730. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  731. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  732. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  733. plat_priv->ctrl_params.bdf_type);
  734. if (ret)
  735. goto out;
  736. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  737. return 0;
  738. ret = cnss_bus_load_m3(plat_priv);
  739. if (ret)
  740. goto out;
  741. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  742. if (ret)
  743. goto out;
  744. if (cnss_is_aux_support_enabled(plat_priv)) {
  745. ret = cnss_bus_load_aux(plat_priv);
  746. if (ret)
  747. goto out;
  748. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  749. if (ret)
  750. goto out;
  751. }
  752. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  753. return 0;
  754. out:
  755. return ret;
  756. }
  757. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  758. {
  759. int ret = 0;
  760. if (!plat_priv->antenna) {
  761. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  762. if (ret)
  763. goto out;
  764. }
  765. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  766. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  767. if (ret)
  768. goto out;
  769. }
  770. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  771. if (ret)
  772. goto out;
  773. return 0;
  774. out:
  775. return ret;
  776. }
  777. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  778. {
  779. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  780. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  781. }
  782. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  783. {
  784. u32 i;
  785. int ret = 0;
  786. struct cnss_plat_ipc_daemon_config *cfg;
  787. ret = cnss_qmi_get_dms_mac(plat_priv);
  788. if (ret == 0 && plat_priv->dms.mac_valid)
  789. goto qmi_send;
  790. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  791. * Thus assert on failure to get MAC from DMS even after retries
  792. */
  793. if (plat_priv->use_nv_mac) {
  794. /* Check if Daemon says platform support DMS MAC provisioning */
  795. cfg = cnss_plat_ipc_qmi_daemon_config();
  796. if (cfg) {
  797. if (!cfg->dms_mac_addr_supported) {
  798. cnss_pr_err("DMS MAC address not supported\n");
  799. CNSS_ASSERT(0);
  800. return -EINVAL;
  801. }
  802. }
  803. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  804. if (plat_priv->dms.mac_valid)
  805. break;
  806. ret = cnss_qmi_get_dms_mac(plat_priv);
  807. if (ret == 0)
  808. break;
  809. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  810. }
  811. if (!plat_priv->dms.mac_valid) {
  812. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  813. CNSS_ASSERT(0);
  814. return -EINVAL;
  815. }
  816. }
  817. qmi_send:
  818. if (plat_priv->dms.mac_valid)
  819. ret =
  820. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  821. ARRAY_SIZE(plat_priv->dms.mac));
  822. return ret;
  823. }
  824. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  825. enum cnss_cal_db_op op, u32 *size)
  826. {
  827. int ret = 0;
  828. u32 timeout = cnss_get_timeout(plat_priv,
  829. CNSS_TIMEOUT_DAEMON_CONNECTION);
  830. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  831. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  832. if (op >= CNSS_CAL_DB_INVALID_OP)
  833. return -EINVAL;
  834. if (!plat_priv->cbc_file_download) {
  835. cnss_pr_info("CAL DB file not required as per BDF\n");
  836. return 0;
  837. }
  838. if (*size == 0) {
  839. cnss_pr_err("Invalid cal file size\n");
  840. return -EINVAL;
  841. }
  842. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  843. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  844. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  845. msecs_to_jiffies(timeout));
  846. if (!ret) {
  847. cnss_pr_err("Daemon not yet connected\n");
  848. CNSS_ASSERT(0);
  849. return ret;
  850. }
  851. }
  852. if (!plat_priv->cal_mem->va) {
  853. cnss_pr_err("CAL DB Memory not setup for FW\n");
  854. return -EINVAL;
  855. }
  856. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  857. if (op == CNSS_CAL_DB_DOWNLOAD) {
  858. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  859. ret = cnss_plat_ipc_qmi_file_download(client_id,
  860. CNSS_CAL_DB_FILE_NAME,
  861. plat_priv->cal_mem->va,
  862. size);
  863. } else {
  864. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  865. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  866. CNSS_CAL_DB_FILE_NAME,
  867. plat_priv->cal_mem->va,
  868. *size);
  869. }
  870. if (ret)
  871. cnss_pr_err("Cal DB file %s %s failure\n",
  872. CNSS_CAL_DB_FILE_NAME,
  873. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  874. else
  875. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  876. CNSS_CAL_DB_FILE_NAME,
  877. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  878. *size);
  879. return ret;
  880. }
  881. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  882. {
  883. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  884. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  885. return -EINVAL;
  886. }
  887. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  888. &plat_priv->cal_file_size);
  889. }
  890. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  891. u32 *cal_file_size)
  892. {
  893. /* To download pass the total size of cal DB mem allocated.
  894. * After cal file is download to mem, its size is updated in
  895. * return pointer
  896. */
  897. *cal_file_size = plat_priv->cal_mem->size;
  898. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  899. cal_file_size);
  900. }
  901. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  902. {
  903. int ret = 0;
  904. u32 cal_file_size = 0;
  905. if (!plat_priv)
  906. return -ENODEV;
  907. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  908. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  909. return -EINVAL;
  910. }
  911. cnss_pr_dbg("Processing FW Init Done..\n");
  912. del_timer(&plat_priv->fw_boot_timer);
  913. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  914. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  915. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  916. cnss_send_subsys_restart_level_msg(plat_priv);
  917. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  918. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  919. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  920. }
  921. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  922. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  923. CNSS_WALTEST);
  924. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  925. cnss_request_antenna_sharing(plat_priv);
  926. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  927. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  928. plat_priv->cal_time = jiffies;
  929. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  930. CNSS_CALIBRATION);
  931. } else {
  932. ret = cnss_setup_dms_mac(plat_priv);
  933. ret = cnss_bus_call_driver_probe(plat_priv);
  934. }
  935. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  936. goto out;
  937. else if (ret)
  938. goto shutdown;
  939. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  940. return 0;
  941. shutdown:
  942. cnss_bus_dev_shutdown(plat_priv);
  943. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  944. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  945. out:
  946. return ret;
  947. }
  948. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  949. {
  950. switch (type) {
  951. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  952. return "SERVER_ARRIVE";
  953. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  954. return "SERVER_EXIT";
  955. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  956. return "REQUEST_MEM";
  957. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  958. return "FW_MEM_READY";
  959. case CNSS_DRIVER_EVENT_FW_READY:
  960. return "FW_READY";
  961. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  962. return "COLD_BOOT_CAL_START";
  963. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  964. return "COLD_BOOT_CAL_DONE";
  965. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  966. return "REGISTER_DRIVER";
  967. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  968. return "UNREGISTER_DRIVER";
  969. case CNSS_DRIVER_EVENT_RECOVERY:
  970. return "RECOVERY";
  971. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  972. return "FORCE_FW_ASSERT";
  973. case CNSS_DRIVER_EVENT_POWER_UP:
  974. return "POWER_UP";
  975. case CNSS_DRIVER_EVENT_POWER_DOWN:
  976. return "POWER_DOWN";
  977. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  978. return "IDLE_RESTART";
  979. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  980. return "IDLE_SHUTDOWN";
  981. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  982. return "IMS_WFC_CALL_IND";
  983. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  984. return "WLFW_TWC_CFG_IND";
  985. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  986. return "QDSS_TRACE_REQ_MEM";
  987. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  988. return "FW_MEM_FILE_SAVE";
  989. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  990. return "QDSS_TRACE_FREE";
  991. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  992. return "QDSS_TRACE_REQ_DATA";
  993. case CNSS_DRIVER_EVENT_MAX:
  994. return "EVENT_MAX";
  995. }
  996. return "UNKNOWN";
  997. };
  998. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  999. enum cnss_driver_event_type type,
  1000. u32 flags, void *data)
  1001. {
  1002. struct cnss_driver_event *event;
  1003. unsigned long irq_flags;
  1004. int gfp = GFP_KERNEL;
  1005. int ret = 0;
  1006. if (!plat_priv)
  1007. return -ENODEV;
  1008. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1009. cnss_driver_event_to_str(type), type,
  1010. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1011. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1012. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1013. return -EINVAL;
  1014. }
  1015. if (in_interrupt() || irqs_disabled())
  1016. gfp = GFP_ATOMIC;
  1017. event = kzalloc(sizeof(*event), gfp);
  1018. if (!event)
  1019. return -ENOMEM;
  1020. cnss_pm_stay_awake(plat_priv);
  1021. event->type = type;
  1022. event->data = data;
  1023. init_completion(&event->complete);
  1024. event->ret = CNSS_EVENT_PENDING;
  1025. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1026. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1027. list_add_tail(&event->list, &plat_priv->event_list);
  1028. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1029. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1030. if (!(flags & CNSS_EVENT_SYNC))
  1031. goto out;
  1032. if (flags & CNSS_EVENT_UNKILLABLE)
  1033. wait_for_completion(&event->complete);
  1034. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1035. ret = wait_for_completion_killable(&event->complete);
  1036. else
  1037. ret = wait_for_completion_interruptible(&event->complete);
  1038. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1039. cnss_driver_event_to_str(type), type,
  1040. plat_priv->driver_state, ret, event->ret);
  1041. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1042. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1043. event->sync = false;
  1044. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1045. ret = -EINTR;
  1046. goto out;
  1047. }
  1048. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1049. ret = event->ret;
  1050. kfree(event);
  1051. out:
  1052. cnss_pm_relax(plat_priv);
  1053. return ret;
  1054. }
  1055. /**
  1056. * cnss_get_timeout - Get timeout for corresponding type.
  1057. * @plat_priv: Pointer to platform driver context.
  1058. * @cnss_timeout_type: Timeout type.
  1059. *
  1060. * Return: Timeout in milliseconds.
  1061. */
  1062. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1063. enum cnss_timeout_type timeout_type)
  1064. {
  1065. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1066. switch (timeout_type) {
  1067. case CNSS_TIMEOUT_QMI:
  1068. return qmi_timeout;
  1069. case CNSS_TIMEOUT_POWER_UP:
  1070. return (qmi_timeout << 2);
  1071. case CNSS_TIMEOUT_IDLE_RESTART:
  1072. /* In idle restart power up sequence, we have fw_boot_timer to
  1073. * handle FW initialization failure.
  1074. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1075. * account for FW dump collection and FW re-initialization on
  1076. * retry.
  1077. */
  1078. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1079. case CNSS_TIMEOUT_CALIBRATION:
  1080. /* Similar to mission mode, in CBC if FW init fails
  1081. * fw recovery is tried. Thus return 2x the CBC timeout.
  1082. */
  1083. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1084. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1085. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1086. case CNSS_TIMEOUT_RDDM:
  1087. return CNSS_RDDM_TIMEOUT_MS;
  1088. case CNSS_TIMEOUT_RECOVERY:
  1089. return RECOVERY_TIMEOUT;
  1090. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1091. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1092. default:
  1093. return qmi_timeout;
  1094. }
  1095. }
  1096. unsigned int cnss_get_boot_timeout(struct device *dev)
  1097. {
  1098. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1099. if (!plat_priv) {
  1100. cnss_pr_err("plat_priv is NULL\n");
  1101. return 0;
  1102. }
  1103. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1104. }
  1105. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1106. int cnss_power_up(struct device *dev)
  1107. {
  1108. int ret = 0;
  1109. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1110. unsigned int timeout;
  1111. if (!plat_priv) {
  1112. cnss_pr_err("plat_priv is NULL\n");
  1113. return -ENODEV;
  1114. }
  1115. cnss_pr_dbg("Powering up device\n");
  1116. ret = cnss_driver_event_post(plat_priv,
  1117. CNSS_DRIVER_EVENT_POWER_UP,
  1118. CNSS_EVENT_SYNC, NULL);
  1119. if (ret)
  1120. goto out;
  1121. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1122. goto out;
  1123. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1124. reinit_completion(&plat_priv->power_up_complete);
  1125. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1126. msecs_to_jiffies(timeout));
  1127. if (!ret) {
  1128. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1129. timeout);
  1130. ret = -EAGAIN;
  1131. goto out;
  1132. }
  1133. return 0;
  1134. out:
  1135. return ret;
  1136. }
  1137. EXPORT_SYMBOL(cnss_power_up);
  1138. int cnss_power_down(struct device *dev)
  1139. {
  1140. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1141. if (!plat_priv) {
  1142. cnss_pr_err("plat_priv is NULL\n");
  1143. return -ENODEV;
  1144. }
  1145. cnss_pr_dbg("Powering down device\n");
  1146. return cnss_driver_event_post(plat_priv,
  1147. CNSS_DRIVER_EVENT_POWER_DOWN,
  1148. CNSS_EVENT_SYNC, NULL);
  1149. }
  1150. EXPORT_SYMBOL(cnss_power_down);
  1151. int cnss_idle_restart(struct device *dev)
  1152. {
  1153. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1154. unsigned int timeout;
  1155. int ret = 0;
  1156. if (!plat_priv) {
  1157. cnss_pr_err("plat_priv is NULL\n");
  1158. return -ENODEV;
  1159. }
  1160. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1161. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1162. return -EBUSY;
  1163. }
  1164. cnss_pr_dbg("Doing idle restart\n");
  1165. reinit_completion(&plat_priv->power_up_complete);
  1166. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1167. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1168. ret = -EINVAL;
  1169. goto out;
  1170. }
  1171. ret = cnss_driver_event_post(plat_priv,
  1172. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1173. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1174. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1175. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1176. else if (ret)
  1177. goto out;
  1178. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1179. ret = cnss_bus_call_driver_probe(plat_priv);
  1180. goto out;
  1181. }
  1182. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1183. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1184. msecs_to_jiffies(timeout));
  1185. if (plat_priv->power_up_error) {
  1186. ret = plat_priv->power_up_error;
  1187. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1188. cnss_pr_dbg("Power up error:%d, exiting\n",
  1189. plat_priv->power_up_error);
  1190. goto out;
  1191. }
  1192. if (!ret) {
  1193. /* This exception occurs after attempting retry of FW recovery.
  1194. * Thus we can safely power off the device.
  1195. */
  1196. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1197. timeout);
  1198. ret = -ETIMEDOUT;
  1199. cnss_power_down(dev);
  1200. CNSS_ASSERT(0);
  1201. goto out;
  1202. }
  1203. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1204. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1205. del_timer(&plat_priv->fw_boot_timer);
  1206. ret = -EINVAL;
  1207. goto out;
  1208. }
  1209. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1210. * non-DRV is supported only once after device reboots and before wifi
  1211. * is turned on. We do not allow switching back to DRV.
  1212. * To bring device back into DRV, user needs to reboot device.
  1213. */
  1214. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1215. cnss_pr_dbg("DRV is disabled\n");
  1216. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1217. }
  1218. mutex_unlock(&plat_priv->driver_ops_lock);
  1219. return 0;
  1220. out:
  1221. mutex_unlock(&plat_priv->driver_ops_lock);
  1222. return ret;
  1223. }
  1224. EXPORT_SYMBOL(cnss_idle_restart);
  1225. int cnss_idle_shutdown(struct device *dev)
  1226. {
  1227. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1228. if (!plat_priv) {
  1229. cnss_pr_err("plat_priv is NULL\n");
  1230. return -ENODEV;
  1231. }
  1232. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1233. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1234. return -EAGAIN;
  1235. }
  1236. cnss_pr_dbg("Doing idle shutdown\n");
  1237. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1238. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1239. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1240. return -EBUSY;
  1241. }
  1242. return cnss_driver_event_post(plat_priv,
  1243. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1244. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1245. }
  1246. EXPORT_SYMBOL(cnss_idle_shutdown);
  1247. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1248. {
  1249. int ret = 0;
  1250. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1251. if (ret < 0) {
  1252. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1253. goto out;
  1254. }
  1255. ret = cnss_get_clk(plat_priv);
  1256. if (ret) {
  1257. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1258. goto put_vreg;
  1259. }
  1260. ret = cnss_get_pinctrl(plat_priv);
  1261. if (ret) {
  1262. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1263. goto put_clk;
  1264. }
  1265. return 0;
  1266. put_clk:
  1267. cnss_put_clk(plat_priv);
  1268. put_vreg:
  1269. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1270. out:
  1271. return ret;
  1272. }
  1273. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1274. {
  1275. cnss_put_clk(plat_priv);
  1276. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1277. }
  1278. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1279. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1280. unsigned long code,
  1281. void *ss_handle)
  1282. {
  1283. struct cnss_plat_data *plat_priv =
  1284. container_of(nb, struct cnss_plat_data, modem_nb);
  1285. struct cnss_esoc_info *esoc_info;
  1286. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1287. if (!plat_priv)
  1288. return NOTIFY_DONE;
  1289. esoc_info = &plat_priv->esoc_info;
  1290. if (code == SUBSYS_AFTER_POWERUP)
  1291. esoc_info->modem_current_status = 1;
  1292. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1293. esoc_info->modem_current_status = 0;
  1294. else
  1295. return NOTIFY_DONE;
  1296. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1297. esoc_info->modem_current_status))
  1298. return NOTIFY_DONE;
  1299. return NOTIFY_OK;
  1300. }
  1301. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1302. {
  1303. int ret = 0;
  1304. struct device *dev;
  1305. struct cnss_esoc_info *esoc_info;
  1306. struct esoc_desc *esoc_desc;
  1307. const char *client_desc;
  1308. dev = &plat_priv->plat_dev->dev;
  1309. esoc_info = &plat_priv->esoc_info;
  1310. esoc_info->notify_modem_status =
  1311. of_property_read_bool(dev->of_node,
  1312. "qcom,notify-modem-status");
  1313. if (!esoc_info->notify_modem_status)
  1314. goto out;
  1315. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1316. &client_desc);
  1317. if (ret) {
  1318. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1319. } else {
  1320. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1321. if (IS_ERR_OR_NULL(esoc_desc)) {
  1322. ret = PTR_RET(esoc_desc);
  1323. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1324. ret);
  1325. goto out;
  1326. }
  1327. esoc_info->esoc_desc = esoc_desc;
  1328. }
  1329. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1330. esoc_info->modem_current_status = 0;
  1331. esoc_info->modem_notify_handler =
  1332. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1333. esoc_info->esoc_desc->name :
  1334. "modem", &plat_priv->modem_nb);
  1335. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1336. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1337. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1338. ret);
  1339. goto unreg_esoc;
  1340. }
  1341. return 0;
  1342. unreg_esoc:
  1343. if (esoc_info->esoc_desc)
  1344. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1345. out:
  1346. return ret;
  1347. }
  1348. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1349. {
  1350. struct device *dev;
  1351. struct cnss_esoc_info *esoc_info;
  1352. dev = &plat_priv->plat_dev->dev;
  1353. esoc_info = &plat_priv->esoc_info;
  1354. if (esoc_info->notify_modem_status)
  1355. subsys_notif_unregister_notifier
  1356. (esoc_info->modem_notify_handler,
  1357. &plat_priv->modem_nb);
  1358. if (esoc_info->esoc_desc)
  1359. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1360. }
  1361. #else
  1362. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1363. {
  1364. return 0;
  1365. }
  1366. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1367. #endif
  1368. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1369. {
  1370. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1371. int ret = 0;
  1372. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1373. return 0;
  1374. enable_irq(sol_gpio->dev_sol_irq);
  1375. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1376. if (ret)
  1377. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1378. ret);
  1379. return ret;
  1380. }
  1381. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1382. {
  1383. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1384. int ret = 0;
  1385. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1386. return 0;
  1387. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1388. if (ret)
  1389. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1390. ret);
  1391. disable_irq(sol_gpio->dev_sol_irq);
  1392. return ret;
  1393. }
  1394. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1395. {
  1396. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1397. if (sol_gpio->dev_sol_gpio < 0)
  1398. return -EINVAL;
  1399. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1400. }
  1401. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1402. {
  1403. struct cnss_plat_data *plat_priv = data;
  1404. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1405. sol_gpio->dev_sol_counter++;
  1406. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1407. irq, sol_gpio->dev_sol_counter);
  1408. /* Make sure abort current suspend */
  1409. cnss_pm_stay_awake(plat_priv);
  1410. cnss_pm_relax(plat_priv);
  1411. pm_system_wakeup();
  1412. cnss_bus_handle_dev_sol_irq(plat_priv);
  1413. return IRQ_HANDLED;
  1414. }
  1415. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1416. {
  1417. struct device *dev = &plat_priv->plat_dev->dev;
  1418. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1419. int ret = 0;
  1420. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1421. "wlan-dev-sol-gpio", 0);
  1422. if (sol_gpio->dev_sol_gpio < 0)
  1423. goto out;
  1424. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1425. sol_gpio->dev_sol_gpio);
  1426. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1427. if (ret) {
  1428. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1429. ret);
  1430. goto out;
  1431. }
  1432. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1433. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1434. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1435. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1436. if (ret) {
  1437. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1438. goto free_gpio;
  1439. }
  1440. return 0;
  1441. free_gpio:
  1442. gpio_free(sol_gpio->dev_sol_gpio);
  1443. out:
  1444. return ret;
  1445. }
  1446. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1447. {
  1448. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1449. if (sol_gpio->dev_sol_gpio < 0)
  1450. return;
  1451. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1452. gpio_free(sol_gpio->dev_sol_gpio);
  1453. }
  1454. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1455. {
  1456. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1457. if (sol_gpio->host_sol_gpio < 0)
  1458. return -EINVAL;
  1459. if (value)
  1460. cnss_pr_dbg("Assert host SOL GPIO\n");
  1461. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1462. return 0;
  1463. }
  1464. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1465. {
  1466. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1467. if (sol_gpio->host_sol_gpio < 0)
  1468. return -EINVAL;
  1469. return gpio_get_value(sol_gpio->host_sol_gpio);
  1470. }
  1471. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1472. {
  1473. struct device *dev = &plat_priv->plat_dev->dev;
  1474. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1475. int ret = 0;
  1476. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1477. "wlan-host-sol-gpio", 0);
  1478. if (sol_gpio->host_sol_gpio < 0)
  1479. goto out;
  1480. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1481. sol_gpio->host_sol_gpio);
  1482. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1483. if (ret) {
  1484. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1485. ret);
  1486. goto out;
  1487. }
  1488. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1489. return 0;
  1490. out:
  1491. return ret;
  1492. }
  1493. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1494. {
  1495. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1496. if (sol_gpio->host_sol_gpio < 0)
  1497. return;
  1498. gpio_free(sol_gpio->host_sol_gpio);
  1499. }
  1500. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1501. {
  1502. int ret;
  1503. ret = cnss_init_dev_sol_gpio(plat_priv);
  1504. if (ret)
  1505. goto out;
  1506. ret = cnss_init_host_sol_gpio(plat_priv);
  1507. if (ret)
  1508. goto deinit_dev_sol;
  1509. return 0;
  1510. deinit_dev_sol:
  1511. cnss_deinit_dev_sol_gpio(plat_priv);
  1512. out:
  1513. return ret;
  1514. }
  1515. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1516. {
  1517. cnss_deinit_host_sol_gpio(plat_priv);
  1518. cnss_deinit_dev_sol_gpio(plat_priv);
  1519. }
  1520. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1521. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1522. {
  1523. struct cnss_plat_data *plat_priv;
  1524. int ret = 0;
  1525. if (!subsys_desc->dev) {
  1526. cnss_pr_err("dev from subsys_desc is NULL\n");
  1527. return -ENODEV;
  1528. }
  1529. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1530. if (!plat_priv) {
  1531. cnss_pr_err("plat_priv is NULL\n");
  1532. return -ENODEV;
  1533. }
  1534. if (!plat_priv->driver_state) {
  1535. cnss_pr_dbg("subsys powerup is ignored\n");
  1536. return 0;
  1537. }
  1538. ret = cnss_bus_dev_powerup(plat_priv);
  1539. if (ret)
  1540. __pm_relax(plat_priv->recovery_ws);
  1541. return ret;
  1542. }
  1543. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1544. bool force_stop)
  1545. {
  1546. struct cnss_plat_data *plat_priv;
  1547. if (!subsys_desc->dev) {
  1548. cnss_pr_err("dev from subsys_desc is NULL\n");
  1549. return -ENODEV;
  1550. }
  1551. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1552. if (!plat_priv) {
  1553. cnss_pr_err("plat_priv is NULL\n");
  1554. return -ENODEV;
  1555. }
  1556. if (!plat_priv->driver_state) {
  1557. cnss_pr_dbg("subsys shutdown is ignored\n");
  1558. return 0;
  1559. }
  1560. return cnss_bus_dev_shutdown(plat_priv);
  1561. }
  1562. void cnss_device_crashed(struct device *dev)
  1563. {
  1564. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1565. struct cnss_subsys_info *subsys_info;
  1566. if (!plat_priv)
  1567. return;
  1568. subsys_info = &plat_priv->subsys_info;
  1569. if (subsys_info->subsys_device) {
  1570. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1571. subsys_set_crash_status(subsys_info->subsys_device, true);
  1572. subsystem_restart_dev(subsys_info->subsys_device);
  1573. }
  1574. }
  1575. EXPORT_SYMBOL(cnss_device_crashed);
  1576. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1577. {
  1578. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1579. if (!plat_priv) {
  1580. cnss_pr_err("plat_priv is NULL\n");
  1581. return;
  1582. }
  1583. cnss_bus_dev_crash_shutdown(plat_priv);
  1584. }
  1585. static int cnss_subsys_ramdump(int enable,
  1586. const struct subsys_desc *subsys_desc)
  1587. {
  1588. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1589. if (!plat_priv) {
  1590. cnss_pr_err("plat_priv is NULL\n");
  1591. return -ENODEV;
  1592. }
  1593. if (!enable)
  1594. return 0;
  1595. return cnss_bus_dev_ramdump(plat_priv);
  1596. }
  1597. static void cnss_recovery_work_handler(struct work_struct *work)
  1598. {
  1599. }
  1600. #else
  1601. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1602. {
  1603. int ret;
  1604. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1605. if (!plat_priv->recovery_enabled)
  1606. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1607. cnss_bus_dev_shutdown(plat_priv);
  1608. cnss_bus_dev_ramdump(plat_priv);
  1609. /* If recovery is triggered before Host driver registration,
  1610. * avoid device power up because eventually device will be
  1611. * power up as part of driver registration.
  1612. */
  1613. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1614. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1615. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1616. plat_priv->driver_state);
  1617. return;
  1618. }
  1619. msleep(POWER_RESET_MIN_DELAY_MS);
  1620. ret = cnss_bus_dev_powerup(plat_priv);
  1621. if (ret)
  1622. __pm_relax(plat_priv->recovery_ws);
  1623. return;
  1624. }
  1625. static void cnss_recovery_work_handler(struct work_struct *work)
  1626. {
  1627. struct cnss_plat_data *plat_priv =
  1628. container_of(work, struct cnss_plat_data, recovery_work);
  1629. cnss_recovery_handler(plat_priv);
  1630. }
  1631. void cnss_device_crashed(struct device *dev)
  1632. {
  1633. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1634. if (!plat_priv)
  1635. return;
  1636. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1637. schedule_work(&plat_priv->recovery_work);
  1638. }
  1639. EXPORT_SYMBOL(cnss_device_crashed);
  1640. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1641. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1642. {
  1643. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1644. struct cnss_ramdump_info *ramdump_info;
  1645. if (!plat_priv)
  1646. return NULL;
  1647. ramdump_info = &plat_priv->ramdump_info;
  1648. *size = ramdump_info->ramdump_size;
  1649. return ramdump_info->ramdump_va;
  1650. }
  1651. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1652. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1653. {
  1654. switch (reason) {
  1655. case CNSS_REASON_DEFAULT:
  1656. return "DEFAULT";
  1657. case CNSS_REASON_LINK_DOWN:
  1658. return "LINK_DOWN";
  1659. case CNSS_REASON_RDDM:
  1660. return "RDDM";
  1661. case CNSS_REASON_TIMEOUT:
  1662. return "TIMEOUT";
  1663. }
  1664. return "UNKNOWN";
  1665. };
  1666. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1667. enum cnss_recovery_reason reason)
  1668. {
  1669. plat_priv->recovery_count++;
  1670. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1671. goto self_recovery;
  1672. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1673. cnss_pr_dbg("Skip device recovery\n");
  1674. return 0;
  1675. }
  1676. /* FW recovery sequence has multiple steps and firmware load requires
  1677. * linux PM in awake state. Thus hold the cnss wake source until
  1678. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1679. * time taken in this process.
  1680. */
  1681. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1682. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1683. true);
  1684. switch (reason) {
  1685. case CNSS_REASON_LINK_DOWN:
  1686. if (!cnss_bus_check_link_status(plat_priv)) {
  1687. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1688. return 0;
  1689. }
  1690. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1691. &plat_priv->ctrl_params.quirks))
  1692. goto self_recovery;
  1693. if (!cnss_bus_recover_link_down(plat_priv)) {
  1694. /* clear recovery bit here to avoid skipping
  1695. * the recovery work for RDDM later
  1696. */
  1697. clear_bit(CNSS_DRIVER_RECOVERY,
  1698. &plat_priv->driver_state);
  1699. return 0;
  1700. }
  1701. break;
  1702. case CNSS_REASON_RDDM:
  1703. cnss_bus_collect_dump_info(plat_priv, false);
  1704. break;
  1705. case CNSS_REASON_DEFAULT:
  1706. case CNSS_REASON_TIMEOUT:
  1707. break;
  1708. default:
  1709. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1710. cnss_recovery_reason_to_str(reason), reason);
  1711. break;
  1712. }
  1713. cnss_bus_device_crashed(plat_priv);
  1714. return 0;
  1715. self_recovery:
  1716. cnss_pr_dbg("Going for self recovery\n");
  1717. cnss_bus_dev_shutdown(plat_priv);
  1718. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1719. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1720. &plat_priv->ctrl_params.quirks);
  1721. /* If link down self recovery is triggered before Host driver
  1722. * registration, avoid device power up because eventually device
  1723. * will be power up as part of driver registration.
  1724. */
  1725. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1726. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1727. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1728. plat_priv->driver_state);
  1729. return 0;
  1730. }
  1731. cnss_bus_dev_powerup(plat_priv);
  1732. return 0;
  1733. }
  1734. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1735. void *data)
  1736. {
  1737. struct cnss_recovery_data *recovery_data = data;
  1738. int ret = 0;
  1739. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1740. cnss_recovery_reason_to_str(recovery_data->reason),
  1741. recovery_data->reason);
  1742. if (!plat_priv->driver_state) {
  1743. cnss_pr_err("Improper driver state, ignore recovery\n");
  1744. ret = -EINVAL;
  1745. goto out;
  1746. }
  1747. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1748. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1749. ret = -EINVAL;
  1750. goto out;
  1751. }
  1752. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1753. cnss_pr_err("Recovery is already in progress\n");
  1754. CNSS_ASSERT(0);
  1755. ret = -EINVAL;
  1756. goto out;
  1757. }
  1758. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1759. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1760. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1761. ret = -EINVAL;
  1762. goto out;
  1763. }
  1764. switch (plat_priv->device_id) {
  1765. case QCA6174_DEVICE_ID:
  1766. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1767. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1768. &plat_priv->driver_state)) {
  1769. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1770. ret = -EINVAL;
  1771. goto out;
  1772. }
  1773. break;
  1774. default:
  1775. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1776. set_bit(CNSS_FW_BOOT_RECOVERY,
  1777. &plat_priv->driver_state);
  1778. }
  1779. break;
  1780. }
  1781. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1782. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1783. out:
  1784. kfree(data);
  1785. return ret;
  1786. }
  1787. int cnss_self_recovery(struct device *dev,
  1788. enum cnss_recovery_reason reason)
  1789. {
  1790. cnss_schedule_recovery(dev, reason);
  1791. return 0;
  1792. }
  1793. EXPORT_SYMBOL(cnss_self_recovery);
  1794. void cnss_schedule_recovery(struct device *dev,
  1795. enum cnss_recovery_reason reason)
  1796. {
  1797. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1798. struct cnss_recovery_data *data;
  1799. int gfp = GFP_KERNEL;
  1800. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1801. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1802. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1803. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1804. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1805. return;
  1806. }
  1807. if (in_interrupt() || irqs_disabled())
  1808. gfp = GFP_ATOMIC;
  1809. data = kzalloc(sizeof(*data), gfp);
  1810. if (!data)
  1811. return;
  1812. data->reason = reason;
  1813. cnss_driver_event_post(plat_priv,
  1814. CNSS_DRIVER_EVENT_RECOVERY,
  1815. 0, data);
  1816. }
  1817. EXPORT_SYMBOL(cnss_schedule_recovery);
  1818. int cnss_force_fw_assert(struct device *dev)
  1819. {
  1820. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1821. if (!plat_priv) {
  1822. cnss_pr_err("plat_priv is NULL\n");
  1823. return -ENODEV;
  1824. }
  1825. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1826. cnss_pr_info("Forced FW assert is not supported\n");
  1827. return -EOPNOTSUPP;
  1828. }
  1829. if (cnss_bus_is_device_down(plat_priv)) {
  1830. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1831. return 0;
  1832. }
  1833. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1834. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1835. return 0;
  1836. }
  1837. if (in_interrupt() || irqs_disabled())
  1838. cnss_driver_event_post(plat_priv,
  1839. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1840. 0, NULL);
  1841. else
  1842. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1843. return 0;
  1844. }
  1845. EXPORT_SYMBOL(cnss_force_fw_assert);
  1846. int cnss_force_collect_rddm(struct device *dev)
  1847. {
  1848. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1849. unsigned int timeout;
  1850. int ret = 0;
  1851. if (!plat_priv) {
  1852. cnss_pr_err("plat_priv is NULL\n");
  1853. return -ENODEV;
  1854. }
  1855. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1856. cnss_pr_info("Force collect rddm is not supported\n");
  1857. return -EOPNOTSUPP;
  1858. }
  1859. if (cnss_bus_is_device_down(plat_priv)) {
  1860. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1861. goto wait_rddm;
  1862. }
  1863. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1864. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1865. goto wait_rddm;
  1866. }
  1867. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1868. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1869. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1870. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1871. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1872. return 0;
  1873. }
  1874. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1875. if (ret)
  1876. return ret;
  1877. wait_rddm:
  1878. reinit_completion(&plat_priv->rddm_complete);
  1879. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1880. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1881. msecs_to_jiffies(timeout));
  1882. if (!ret) {
  1883. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1884. timeout);
  1885. ret = -ETIMEDOUT;
  1886. } else if (ret > 0) {
  1887. ret = 0;
  1888. }
  1889. return ret;
  1890. }
  1891. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1892. int cnss_qmi_send_get(struct device *dev)
  1893. {
  1894. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1895. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1896. return 0;
  1897. return cnss_bus_qmi_send_get(plat_priv);
  1898. }
  1899. EXPORT_SYMBOL(cnss_qmi_send_get);
  1900. int cnss_qmi_send_put(struct device *dev)
  1901. {
  1902. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1903. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1904. return 0;
  1905. return cnss_bus_qmi_send_put(plat_priv);
  1906. }
  1907. EXPORT_SYMBOL(cnss_qmi_send_put);
  1908. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1909. int cmd_len, void *cb_ctx,
  1910. int (*cb)(void *ctx, void *event, int event_len))
  1911. {
  1912. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1913. int ret;
  1914. if (!plat_priv)
  1915. return -ENODEV;
  1916. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1917. return -EINVAL;
  1918. plat_priv->get_info_cb = cb;
  1919. plat_priv->get_info_cb_ctx = cb_ctx;
  1920. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1921. if (ret) {
  1922. plat_priv->get_info_cb = NULL;
  1923. plat_priv->get_info_cb_ctx = NULL;
  1924. }
  1925. return ret;
  1926. }
  1927. EXPORT_SYMBOL(cnss_qmi_send);
  1928. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1929. {
  1930. int ret = 0;
  1931. u32 retry = 0, timeout;
  1932. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1933. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1934. goto out;
  1935. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1936. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1937. goto out;
  1938. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1939. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1940. goto out;
  1941. }
  1942. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1943. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1944. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1945. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1946. CNSS_ASSERT(0);
  1947. return -EINVAL;
  1948. }
  1949. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1950. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1951. break;
  1952. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1953. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1954. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1955. CNSS_ASSERT(0);
  1956. ret = -EINVAL;
  1957. goto mark_cal_fail;
  1958. }
  1959. }
  1960. switch (plat_priv->device_id) {
  1961. case QCA6290_DEVICE_ID:
  1962. case QCA6390_DEVICE_ID:
  1963. case QCA6490_DEVICE_ID:
  1964. case KIWI_DEVICE_ID:
  1965. case MANGO_DEVICE_ID:
  1966. case PEACH_DEVICE_ID:
  1967. break;
  1968. default:
  1969. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1970. plat_priv->device_id);
  1971. ret = -EINVAL;
  1972. goto mark_cal_fail;
  1973. }
  1974. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1975. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1976. timeout = cnss_get_timeout(plat_priv,
  1977. CNSS_TIMEOUT_CALIBRATION);
  1978. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1979. timeout / 1000);
  1980. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1981. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1982. msecs_to_jiffies(timeout));
  1983. }
  1984. reinit_completion(&plat_priv->cal_complete);
  1985. ret = cnss_bus_dev_powerup(plat_priv);
  1986. mark_cal_fail:
  1987. if (ret) {
  1988. complete(&plat_priv->cal_complete);
  1989. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1990. /* Set CBC done in driver state to mark attempt and note error
  1991. * since calibration cannot be retried at boot.
  1992. */
  1993. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1994. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1995. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1996. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1997. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1998. goto out;
  1999. cnss_pr_info("Schedule WLAN driver load\n");
  2000. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2001. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2002. 0);
  2003. }
  2004. }
  2005. out:
  2006. return ret;
  2007. }
  2008. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2009. void *data)
  2010. {
  2011. struct cnss_cal_info *cal_info = data;
  2012. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2013. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2014. goto out;
  2015. switch (cal_info->cal_status) {
  2016. case CNSS_CAL_DONE:
  2017. cnss_pr_dbg("Calibration completed successfully\n");
  2018. plat_priv->cal_done = true;
  2019. break;
  2020. case CNSS_CAL_TIMEOUT:
  2021. case CNSS_CAL_FAILURE:
  2022. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2023. cal_info->cal_status);
  2024. break;
  2025. default:
  2026. cnss_pr_err("Unknown calibration status: %u\n",
  2027. cal_info->cal_status);
  2028. break;
  2029. }
  2030. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2031. cnss_bus_free_qdss_mem(plat_priv);
  2032. cnss_release_antenna_sharing(plat_priv);
  2033. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2034. goto skip_shutdown;
  2035. cnss_bus_dev_shutdown(plat_priv);
  2036. msleep(POWER_RESET_MIN_DELAY_MS);
  2037. skip_shutdown:
  2038. complete(&plat_priv->cal_complete);
  2039. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2040. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2041. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2042. cnss_cal_mem_upload_to_file(plat_priv);
  2043. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2044. goto out;
  2045. cnss_pr_dbg("Schedule WLAN driver load\n");
  2046. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2047. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2048. 0);
  2049. }
  2050. out:
  2051. kfree(data);
  2052. return 0;
  2053. }
  2054. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2055. {
  2056. int ret;
  2057. ret = cnss_bus_dev_powerup(plat_priv);
  2058. if (ret)
  2059. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2060. return ret;
  2061. }
  2062. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2063. {
  2064. cnss_bus_dev_shutdown(plat_priv);
  2065. return 0;
  2066. }
  2067. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2068. {
  2069. int ret = 0;
  2070. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2071. if (ret < 0)
  2072. return ret;
  2073. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2074. }
  2075. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2076. u32 mem_seg_len, u64 pa, u32 size)
  2077. {
  2078. int i = 0;
  2079. u64 offset = 0;
  2080. void *va = NULL;
  2081. u64 local_pa;
  2082. u32 local_size;
  2083. for (i = 0; i < mem_seg_len; i++) {
  2084. local_pa = (u64)fw_mem[i].pa;
  2085. local_size = (u32)fw_mem[i].size;
  2086. if (pa == local_pa && size <= local_size) {
  2087. va = fw_mem[i].va;
  2088. break;
  2089. }
  2090. if (pa > local_pa &&
  2091. pa < local_pa + local_size &&
  2092. pa + size <= local_pa + local_size) {
  2093. offset = pa - local_pa;
  2094. va = fw_mem[i].va + offset;
  2095. break;
  2096. }
  2097. }
  2098. return va;
  2099. }
  2100. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2101. void *data)
  2102. {
  2103. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2104. struct cnss_fw_mem *fw_mem_seg;
  2105. int ret = 0L;
  2106. void *va = NULL;
  2107. u32 i, fw_mem_seg_len;
  2108. switch (event_data->mem_type) {
  2109. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2110. if (!plat_priv->fw_mem_seg_len)
  2111. goto invalid_mem_save;
  2112. fw_mem_seg = plat_priv->fw_mem;
  2113. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2114. break;
  2115. case QMI_WLFW_MEM_QDSS_V01:
  2116. if (!plat_priv->qdss_mem_seg_len)
  2117. goto invalid_mem_save;
  2118. fw_mem_seg = plat_priv->qdss_mem;
  2119. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2120. break;
  2121. default:
  2122. goto invalid_mem_save;
  2123. }
  2124. for (i = 0; i < event_data->mem_seg_len; i++) {
  2125. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2126. event_data->mem_seg[i].addr,
  2127. event_data->mem_seg[i].size);
  2128. if (!va) {
  2129. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2130. &event_data->mem_seg[i].addr,
  2131. event_data->mem_type);
  2132. ret = -EINVAL;
  2133. break;
  2134. }
  2135. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2136. event_data->file_name,
  2137. event_data->mem_seg[i].size);
  2138. if (ret < 0) {
  2139. cnss_pr_err("Fail to save fw mem data: %d\n",
  2140. ret);
  2141. break;
  2142. }
  2143. }
  2144. kfree(data);
  2145. return ret;
  2146. invalid_mem_save:
  2147. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2148. event_data->mem_type);
  2149. kfree(data);
  2150. return -EINVAL;
  2151. }
  2152. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2153. {
  2154. cnss_bus_free_qdss_mem(plat_priv);
  2155. return 0;
  2156. }
  2157. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2158. void *data)
  2159. {
  2160. int ret = 0;
  2161. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2162. if (!plat_priv)
  2163. return -ENODEV;
  2164. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2165. event_data->total_size);
  2166. kfree(data);
  2167. return ret;
  2168. }
  2169. static void cnss_driver_event_work(struct work_struct *work)
  2170. {
  2171. struct cnss_plat_data *plat_priv =
  2172. container_of(work, struct cnss_plat_data, event_work);
  2173. struct cnss_driver_event *event;
  2174. unsigned long flags;
  2175. int ret = 0;
  2176. if (!plat_priv) {
  2177. cnss_pr_err("plat_priv is NULL!\n");
  2178. return;
  2179. }
  2180. cnss_pm_stay_awake(plat_priv);
  2181. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2182. while (!list_empty(&plat_priv->event_list)) {
  2183. event = list_first_entry(&plat_priv->event_list,
  2184. struct cnss_driver_event, list);
  2185. list_del(&event->list);
  2186. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2187. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2188. cnss_driver_event_to_str(event->type),
  2189. event->sync ? "-sync" : "", event->type,
  2190. plat_priv->driver_state);
  2191. switch (event->type) {
  2192. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2193. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2194. break;
  2195. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2196. ret = cnss_wlfw_server_exit(plat_priv);
  2197. break;
  2198. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2199. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2200. if (ret)
  2201. break;
  2202. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2203. break;
  2204. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2205. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2206. break;
  2207. case CNSS_DRIVER_EVENT_FW_READY:
  2208. ret = cnss_fw_ready_hdlr(plat_priv);
  2209. break;
  2210. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2211. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2212. break;
  2213. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2214. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2215. event->data);
  2216. break;
  2217. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2218. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2219. event->data);
  2220. break;
  2221. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2222. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2223. break;
  2224. case CNSS_DRIVER_EVENT_RECOVERY:
  2225. ret = cnss_driver_recovery_hdlr(plat_priv,
  2226. event->data);
  2227. break;
  2228. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2229. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2230. break;
  2231. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2232. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2233. &plat_priv->driver_state);
  2234. fallthrough;
  2235. case CNSS_DRIVER_EVENT_POWER_UP:
  2236. ret = cnss_power_up_hdlr(plat_priv);
  2237. break;
  2238. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2239. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2240. &plat_priv->driver_state);
  2241. fallthrough;
  2242. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2243. ret = cnss_power_down_hdlr(plat_priv);
  2244. break;
  2245. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2246. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2247. event->data);
  2248. break;
  2249. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2250. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2251. event->data);
  2252. break;
  2253. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2254. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2255. break;
  2256. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2257. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2258. event->data);
  2259. break;
  2260. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2261. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2262. break;
  2263. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2264. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2265. event->data);
  2266. break;
  2267. default:
  2268. cnss_pr_err("Invalid driver event type: %d",
  2269. event->type);
  2270. kfree(event);
  2271. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2272. continue;
  2273. }
  2274. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2275. if (event->sync) {
  2276. event->ret = ret;
  2277. complete(&event->complete);
  2278. continue;
  2279. }
  2280. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2281. kfree(event);
  2282. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2283. }
  2284. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2285. cnss_pm_relax(plat_priv);
  2286. }
  2287. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2288. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2289. {
  2290. int ret = 0;
  2291. struct cnss_subsys_info *subsys_info;
  2292. subsys_info = &plat_priv->subsys_info;
  2293. subsys_info->subsys_desc.name = plat_priv->device_name;
  2294. subsys_info->subsys_desc.owner = THIS_MODULE;
  2295. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2296. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2297. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2298. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2299. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2300. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2301. if (IS_ERR(subsys_info->subsys_device)) {
  2302. ret = PTR_ERR(subsys_info->subsys_device);
  2303. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2304. goto out;
  2305. }
  2306. subsys_info->subsys_handle =
  2307. subsystem_get(subsys_info->subsys_desc.name);
  2308. if (!subsys_info->subsys_handle) {
  2309. cnss_pr_err("Failed to get subsys_handle!\n");
  2310. ret = -EINVAL;
  2311. goto unregister_subsys;
  2312. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2313. ret = PTR_ERR(subsys_info->subsys_handle);
  2314. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2315. goto unregister_subsys;
  2316. }
  2317. return 0;
  2318. unregister_subsys:
  2319. subsys_unregister(subsys_info->subsys_device);
  2320. out:
  2321. return ret;
  2322. }
  2323. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2324. {
  2325. struct cnss_subsys_info *subsys_info;
  2326. subsys_info = &plat_priv->subsys_info;
  2327. subsystem_put(subsys_info->subsys_handle);
  2328. subsys_unregister(subsys_info->subsys_device);
  2329. }
  2330. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2331. {
  2332. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2333. return create_ramdump_device(subsys_info->subsys_desc.name,
  2334. subsys_info->subsys_desc.dev);
  2335. }
  2336. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2337. void *ramdump_dev)
  2338. {
  2339. destroy_ramdump_device(ramdump_dev);
  2340. }
  2341. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2342. {
  2343. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2344. struct ramdump_segment segment;
  2345. memset(&segment, 0, sizeof(segment));
  2346. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2347. segment.size = ramdump_info->ramdump_size;
  2348. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2349. }
  2350. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2351. {
  2352. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2353. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2354. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2355. struct ramdump_segment *ramdump_segs, *s;
  2356. struct cnss_dump_meta_info meta_info = {0};
  2357. int i, ret = 0;
  2358. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2359. sizeof(*ramdump_segs),
  2360. GFP_KERNEL);
  2361. if (!ramdump_segs)
  2362. return -ENOMEM;
  2363. s = ramdump_segs + 1;
  2364. for (i = 0; i < dump_data->nentries; i++) {
  2365. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2366. cnss_pr_err("Unsupported dump type: %d",
  2367. dump_seg->type);
  2368. continue;
  2369. }
  2370. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2371. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2372. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2373. }
  2374. meta_info.entry[dump_seg->type].entry_num++;
  2375. s->address = dump_seg->address;
  2376. s->v_address = (void __iomem *)dump_seg->v_address;
  2377. s->size = dump_seg->size;
  2378. s++;
  2379. dump_seg++;
  2380. }
  2381. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2382. meta_info.version = CNSS_RAMDUMP_VERSION;
  2383. meta_info.chipset = plat_priv->device_id;
  2384. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2385. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2386. ramdump_segs->size = sizeof(meta_info);
  2387. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2388. dump_data->nentries + 1);
  2389. kfree(ramdump_segs);
  2390. return ret;
  2391. }
  2392. #else
  2393. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2394. void *data)
  2395. {
  2396. struct cnss_plat_data *plat_priv =
  2397. container_of(nb, struct cnss_plat_data, panic_nb);
  2398. cnss_bus_dev_crash_shutdown(plat_priv);
  2399. return NOTIFY_DONE;
  2400. }
  2401. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2402. {
  2403. int ret;
  2404. if (!plat_priv)
  2405. return -ENODEV;
  2406. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2407. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2408. &plat_priv->panic_nb);
  2409. if (ret) {
  2410. cnss_pr_err("Failed to register panic handler\n");
  2411. return -EINVAL;
  2412. }
  2413. return 0;
  2414. }
  2415. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2416. {
  2417. int ret;
  2418. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2419. &plat_priv->panic_nb);
  2420. if (ret)
  2421. cnss_pr_err("Failed to unregister panic handler\n");
  2422. }
  2423. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2424. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2425. {
  2426. return &plat_priv->plat_dev->dev;
  2427. }
  2428. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2429. void *ramdump_dev)
  2430. {
  2431. }
  2432. #endif
  2433. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2434. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2435. {
  2436. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2437. struct qcom_dump_segment segment;
  2438. struct list_head head;
  2439. INIT_LIST_HEAD(&head);
  2440. memset(&segment, 0, sizeof(segment));
  2441. segment.va = ramdump_info->ramdump_va;
  2442. segment.size = ramdump_info->ramdump_size;
  2443. list_add(&segment.node, &head);
  2444. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2445. }
  2446. #else
  2447. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2448. {
  2449. return 0;
  2450. }
  2451. /* Using completion event inside dynamically allocated ramdump_desc
  2452. * may result a race between freeing the event after setting it to
  2453. * complete inside dev coredump free callback and the thread that is
  2454. * waiting for completion.
  2455. */
  2456. DECLARE_COMPLETION(dump_done);
  2457. #define TIMEOUT_SAVE_DUMP_MS 30000
  2458. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2459. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2460. { \
  2461. if (class == ELFCLASS32) \
  2462. return sizeof(struct elf32_##__xhdr); \
  2463. else \
  2464. return sizeof(struct elf64_##__xhdr); \
  2465. }
  2466. SIZEOF_ELF_STRUCT(phdr)
  2467. SIZEOF_ELF_STRUCT(hdr)
  2468. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2469. do { \
  2470. if (class == ELFCLASS32) \
  2471. ((struct elf32_##__xhdr *)arg)->member = value; \
  2472. else \
  2473. ((struct elf64_##__xhdr *)arg)->member = value; \
  2474. } while (0)
  2475. #define set_ehdr_property(arg, class, member, value) \
  2476. set_xhdr_property(hdr, arg, class, member, value)
  2477. #define set_phdr_property(arg, class, member, value) \
  2478. set_xhdr_property(phdr, arg, class, member, value)
  2479. /* These replace qcom_ramdump driver APIs called from common API
  2480. * cnss_do_elf_dump() by the ones defined here.
  2481. */
  2482. #define qcom_dump_segment cnss_qcom_dump_segment
  2483. #define qcom_elf_dump cnss_qcom_elf_dump
  2484. #define dump_enabled cnss_dump_enabled
  2485. struct cnss_qcom_dump_segment {
  2486. struct list_head node;
  2487. dma_addr_t da;
  2488. void *va;
  2489. size_t size;
  2490. };
  2491. struct cnss_qcom_ramdump_desc {
  2492. void *data;
  2493. struct completion dump_done;
  2494. };
  2495. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2496. void *data, size_t datalen)
  2497. {
  2498. struct cnss_qcom_ramdump_desc *desc = data;
  2499. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2500. datalen);
  2501. }
  2502. static void cnss_qcom_devcd_freev(void *data)
  2503. {
  2504. struct cnss_qcom_ramdump_desc *desc = data;
  2505. cnss_pr_dbg("Free dump data for dev coredump\n");
  2506. complete(&dump_done);
  2507. vfree(desc->data);
  2508. kfree(desc);
  2509. }
  2510. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2511. gfp_t gfp)
  2512. {
  2513. struct cnss_qcom_ramdump_desc *desc;
  2514. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2515. int ret;
  2516. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2517. if (!desc)
  2518. return -ENOMEM;
  2519. desc->data = data;
  2520. reinit_completion(&dump_done);
  2521. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2522. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2523. ret = wait_for_completion_timeout(&dump_done,
  2524. msecs_to_jiffies(timeout));
  2525. if (!ret)
  2526. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2527. timeout);
  2528. return ret ? 0 : -ETIMEDOUT;
  2529. }
  2530. /* Since the elf32 and elf64 identification is identical apart from
  2531. * the class, use elf32 by default.
  2532. */
  2533. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2534. {
  2535. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2536. ehdr->e_ident[EI_CLASS] = class;
  2537. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2538. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2539. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2540. }
  2541. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2542. unsigned char class)
  2543. {
  2544. struct cnss_qcom_dump_segment *segment;
  2545. void *phdr, *ehdr;
  2546. size_t data_size, offset;
  2547. int phnum = 0;
  2548. void *data;
  2549. void __iomem *ptr;
  2550. if (!segs || list_empty(segs))
  2551. return -EINVAL;
  2552. data_size = sizeof_elf_hdr(class);
  2553. list_for_each_entry(segment, segs, node) {
  2554. data_size += sizeof_elf_phdr(class) + segment->size;
  2555. phnum++;
  2556. }
  2557. data = vmalloc(data_size);
  2558. if (!data)
  2559. return -ENOMEM;
  2560. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2561. ehdr = data;
  2562. memset(ehdr, 0, sizeof_elf_hdr(class));
  2563. init_elf_identification(ehdr, class);
  2564. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2565. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2566. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2567. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2568. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2569. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2570. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2571. phdr = data + sizeof_elf_hdr(class);
  2572. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2573. list_for_each_entry(segment, segs, node) {
  2574. memset(phdr, 0, sizeof_elf_phdr(class));
  2575. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2576. set_phdr_property(phdr, class, p_offset, offset);
  2577. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2578. set_phdr_property(phdr, class, p_paddr, segment->da);
  2579. set_phdr_property(phdr, class, p_filesz, segment->size);
  2580. set_phdr_property(phdr, class, p_memsz, segment->size);
  2581. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2582. set_phdr_property(phdr, class, p_align, 0);
  2583. if (segment->va) {
  2584. memcpy(data + offset, segment->va, segment->size);
  2585. } else {
  2586. ptr = devm_ioremap(dev, segment->da, segment->size);
  2587. if (!ptr) {
  2588. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2589. &segment->da, segment->size);
  2590. memset(data + offset, 0xff, segment->size);
  2591. } else {
  2592. memcpy_fromio(data + offset, ptr,
  2593. segment->size);
  2594. }
  2595. }
  2596. offset += segment->size;
  2597. phdr += sizeof_elf_phdr(class);
  2598. }
  2599. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2600. }
  2601. /* Saving dump to file system is always needed in this case. */
  2602. static bool cnss_dump_enabled(void)
  2603. {
  2604. return true;
  2605. }
  2606. #endif /* CONFIG_QCOM_RAMDUMP */
  2607. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2608. {
  2609. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2610. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2611. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2612. struct qcom_dump_segment *seg;
  2613. struct cnss_dump_meta_info meta_info = {0};
  2614. struct list_head head;
  2615. int i, ret = 0;
  2616. if (!dump_enabled()) {
  2617. cnss_pr_info("Dump collection is not enabled\n");
  2618. return ret;
  2619. }
  2620. INIT_LIST_HEAD(&head);
  2621. for (i = 0; i < dump_data->nentries; i++) {
  2622. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2623. cnss_pr_err("Unsupported dump type: %d",
  2624. dump_seg->type);
  2625. continue;
  2626. }
  2627. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2628. if (!seg) {
  2629. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2630. __func__, i);
  2631. continue;
  2632. }
  2633. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2634. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2635. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2636. }
  2637. meta_info.entry[dump_seg->type].entry_num++;
  2638. seg->da = dump_seg->address;
  2639. seg->va = dump_seg->v_address;
  2640. seg->size = dump_seg->size;
  2641. list_add_tail(&seg->node, &head);
  2642. dump_seg++;
  2643. }
  2644. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2645. if (!seg) {
  2646. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2647. __func__);
  2648. goto skip_elf_dump;
  2649. }
  2650. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2651. meta_info.version = CNSS_RAMDUMP_VERSION;
  2652. meta_info.chipset = plat_priv->device_id;
  2653. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2654. seg->va = &meta_info;
  2655. seg->size = sizeof(meta_info);
  2656. list_add(&seg->node, &head);
  2657. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2658. skip_elf_dump:
  2659. while (!list_empty(&head)) {
  2660. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2661. list_del(&seg->node);
  2662. kfree(seg);
  2663. }
  2664. return ret;
  2665. }
  2666. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2667. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2668. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2669. size_t num_entries_loaded)
  2670. {
  2671. struct qcom_dump_segment *seg;
  2672. struct cnss_host_dump_meta_info meta_info = {0};
  2673. struct list_head head;
  2674. int dev_ret = 0;
  2675. struct device *new_device;
  2676. static const char * const wlan_str[] = {
  2677. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2678. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2679. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2680. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2681. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2682. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2683. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2684. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2685. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2686. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2687. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2688. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2689. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2690. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2691. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2692. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2693. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data",
  2694. [CNSS_HOST_CE_DESC_HIST] = "hif_ce_desc_hist",
  2695. [CNSS_HOST_CE_COUNT_MAX] = "hif_ce_count_max",
  2696. [CNSS_HOST_CE_HISTORY_MAX] = "hif_ce_history_max",
  2697. [CNSS_HOST_ONLY_FOR_CRIT_CE] = "hif_ce_only_for_crit",
  2698. [CNSS_HOST_HIF_EVENT_HISTORY] = "hif_event_history",
  2699. [CNSS_HOST_HIF_EVENT_HIST_MAX] = "hif_event_hist_max"
  2700. };
  2701. int i;
  2702. int ret = 0;
  2703. enum cnss_host_dump_type j;
  2704. if (!dump_enabled()) {
  2705. cnss_pr_info("Dump collection is not enabled\n");
  2706. return ret;
  2707. }
  2708. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2709. if (!new_device) {
  2710. cnss_pr_err("Failed to alloc device mem\n");
  2711. return -ENOMEM;
  2712. }
  2713. device_initialize(new_device);
  2714. dev_set_name(new_device, "wlan_driver");
  2715. dev_ret = device_add(new_device);
  2716. if (dev_ret) {
  2717. cnss_pr_err("Failed to add new device\n");
  2718. goto put_device;
  2719. }
  2720. INIT_LIST_HEAD(&head);
  2721. for (i = 0; i < num_entries_loaded; i++) {
  2722. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2723. if (!seg) {
  2724. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2725. continue;
  2726. }
  2727. seg->va = ssr_entry[i].buffer_pointer;
  2728. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2729. seg->size = ssr_entry[i].buffer_size;
  2730. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2731. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2732. strlen(wlan_str[j])) == 0) {
  2733. meta_info.entry[i].type = j;
  2734. }
  2735. }
  2736. meta_info.entry[i].entry_start = i + 1;
  2737. meta_info.entry[i].entry_num++;
  2738. list_add_tail(&seg->node, &head);
  2739. }
  2740. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2741. if (!seg) {
  2742. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2743. __func__);
  2744. goto skip_host_dump;
  2745. }
  2746. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2747. meta_info.version = CNSS_RAMDUMP_VERSION;
  2748. meta_info.chipset = plat_priv->device_id;
  2749. meta_info.total_entries = num_entries_loaded;
  2750. seg->va = &meta_info;
  2751. seg->da = (dma_addr_t)&meta_info;
  2752. seg->size = sizeof(meta_info);
  2753. list_add(&seg->node, &head);
  2754. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2755. skip_host_dump:
  2756. while (!list_empty(&head)) {
  2757. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2758. list_del(&seg->node);
  2759. kfree(seg);
  2760. }
  2761. device_del(new_device);
  2762. put_device:
  2763. put_device(new_device);
  2764. kfree(new_device);
  2765. return ret;
  2766. }
  2767. #endif
  2768. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2769. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2770. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2771. {
  2772. struct cnss_ramdump_info *ramdump_info;
  2773. struct msm_dump_entry dump_entry;
  2774. ramdump_info = &plat_priv->ramdump_info;
  2775. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2776. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2777. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2778. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2779. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2780. sizeof(ramdump_info->dump_data.name));
  2781. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2782. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2783. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2784. &dump_entry);
  2785. }
  2786. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2787. {
  2788. int ret = 0;
  2789. struct device *dev;
  2790. struct cnss_ramdump_info *ramdump_info;
  2791. u32 ramdump_size = 0;
  2792. dev = &plat_priv->plat_dev->dev;
  2793. ramdump_info = &plat_priv->ramdump_info;
  2794. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2795. /* dt type: legacy or converged */
  2796. ret = of_property_read_u32(dev->of_node,
  2797. "qcom,wlan-ramdump-dynamic",
  2798. &ramdump_size);
  2799. } else {
  2800. ret = of_property_read_u32(plat_priv->dev_node,
  2801. "qcom,wlan-ramdump-dynamic",
  2802. &ramdump_size);
  2803. }
  2804. if (ret == 0) {
  2805. ramdump_info->ramdump_va =
  2806. dma_alloc_coherent(dev, ramdump_size,
  2807. &ramdump_info->ramdump_pa,
  2808. GFP_KERNEL);
  2809. if (ramdump_info->ramdump_va)
  2810. ramdump_info->ramdump_size = ramdump_size;
  2811. }
  2812. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2813. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2814. if (ramdump_info->ramdump_size == 0) {
  2815. cnss_pr_info("Ramdump will not be collected");
  2816. goto out;
  2817. }
  2818. ret = cnss_init_dump_entry(plat_priv);
  2819. if (ret) {
  2820. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2821. goto free_ramdump;
  2822. }
  2823. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2824. if (!ramdump_info->ramdump_dev) {
  2825. cnss_pr_err("Failed to create ramdump device!");
  2826. ret = -ENOMEM;
  2827. goto free_ramdump;
  2828. }
  2829. return 0;
  2830. free_ramdump:
  2831. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2832. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2833. out:
  2834. return ret;
  2835. }
  2836. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2837. {
  2838. struct device *dev;
  2839. struct cnss_ramdump_info *ramdump_info;
  2840. dev = &plat_priv->plat_dev->dev;
  2841. ramdump_info = &plat_priv->ramdump_info;
  2842. if (ramdump_info->ramdump_dev)
  2843. cnss_destroy_ramdump_device(plat_priv,
  2844. ramdump_info->ramdump_dev);
  2845. if (ramdump_info->ramdump_va)
  2846. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2847. ramdump_info->ramdump_va,
  2848. ramdump_info->ramdump_pa);
  2849. }
  2850. /**
  2851. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2852. * @ret: Error returned by msm_dump_data_register_nominidump
  2853. *
  2854. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2855. * ignore failure.
  2856. *
  2857. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2858. */
  2859. static int cnss_ignore_dump_data_reg_fail(int ret)
  2860. {
  2861. return ret;
  2862. }
  2863. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2864. {
  2865. int ret = 0;
  2866. struct cnss_ramdump_info_v2 *info_v2;
  2867. struct cnss_dump_data *dump_data;
  2868. struct msm_dump_entry dump_entry;
  2869. struct device *dev = &plat_priv->plat_dev->dev;
  2870. u32 ramdump_size = 0;
  2871. info_v2 = &plat_priv->ramdump_info_v2;
  2872. dump_data = &info_v2->dump_data;
  2873. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2874. /* dt type: legacy or converged */
  2875. ret = of_property_read_u32(dev->of_node,
  2876. "qcom,wlan-ramdump-dynamic",
  2877. &ramdump_size);
  2878. } else {
  2879. ret = of_property_read_u32(plat_priv->dev_node,
  2880. "qcom,wlan-ramdump-dynamic",
  2881. &ramdump_size);
  2882. }
  2883. if (ret == 0)
  2884. info_v2->ramdump_size = ramdump_size;
  2885. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2886. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2887. if (!info_v2->dump_data_vaddr)
  2888. return -ENOMEM;
  2889. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2890. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2891. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2892. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2893. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2894. sizeof(dump_data->name));
  2895. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2896. dump_entry.addr = virt_to_phys(dump_data);
  2897. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2898. &dump_entry);
  2899. if (ret) {
  2900. ret = cnss_ignore_dump_data_reg_fail(ret);
  2901. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2902. ret ? "Error" : "Ignoring", ret);
  2903. goto free_ramdump;
  2904. }
  2905. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2906. if (!info_v2->ramdump_dev) {
  2907. cnss_pr_err("Failed to create ramdump device!\n");
  2908. ret = -ENOMEM;
  2909. goto free_ramdump;
  2910. }
  2911. return 0;
  2912. free_ramdump:
  2913. kfree(info_v2->dump_data_vaddr);
  2914. info_v2->dump_data_vaddr = NULL;
  2915. return ret;
  2916. }
  2917. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2918. {
  2919. struct cnss_ramdump_info_v2 *info_v2;
  2920. info_v2 = &plat_priv->ramdump_info_v2;
  2921. if (info_v2->ramdump_dev)
  2922. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2923. kfree(info_v2->dump_data_vaddr);
  2924. info_v2->dump_data_vaddr = NULL;
  2925. info_v2->dump_data_valid = false;
  2926. }
  2927. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2928. {
  2929. int ret = 0;
  2930. switch (plat_priv->device_id) {
  2931. case QCA6174_DEVICE_ID:
  2932. ret = cnss_register_ramdump_v1(plat_priv);
  2933. break;
  2934. case QCA6290_DEVICE_ID:
  2935. case QCA6390_DEVICE_ID:
  2936. case QCN7605_DEVICE_ID:
  2937. case QCA6490_DEVICE_ID:
  2938. case KIWI_DEVICE_ID:
  2939. case MANGO_DEVICE_ID:
  2940. case PEACH_DEVICE_ID:
  2941. ret = cnss_register_ramdump_v2(plat_priv);
  2942. break;
  2943. default:
  2944. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2945. ret = -ENODEV;
  2946. break;
  2947. }
  2948. return ret;
  2949. }
  2950. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2951. {
  2952. switch (plat_priv->device_id) {
  2953. case QCA6174_DEVICE_ID:
  2954. cnss_unregister_ramdump_v1(plat_priv);
  2955. break;
  2956. case QCA6290_DEVICE_ID:
  2957. case QCA6390_DEVICE_ID:
  2958. case QCN7605_DEVICE_ID:
  2959. case QCA6490_DEVICE_ID:
  2960. case KIWI_DEVICE_ID:
  2961. case MANGO_DEVICE_ID:
  2962. case PEACH_DEVICE_ID:
  2963. cnss_unregister_ramdump_v2(plat_priv);
  2964. break;
  2965. default:
  2966. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2967. break;
  2968. }
  2969. }
  2970. #else
  2971. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2972. {
  2973. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2974. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2975. struct device *dev = &plat_priv->plat_dev->dev;
  2976. u32 ramdump_size = 0;
  2977. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2978. &ramdump_size) == 0)
  2979. info_v2->ramdump_size = ramdump_size;
  2980. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2981. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2982. if (!info_v2->dump_data_vaddr)
  2983. return -ENOMEM;
  2984. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2985. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2986. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2987. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2988. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2989. sizeof(dump_data->name));
  2990. info_v2->ramdump_dev = dev;
  2991. return 0;
  2992. }
  2993. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2994. {
  2995. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2996. info_v2->ramdump_dev = NULL;
  2997. kfree(info_v2->dump_data_vaddr);
  2998. info_v2->dump_data_vaddr = NULL;
  2999. info_v2->dump_data_valid = false;
  3000. }
  3001. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  3002. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  3003. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3004. phys_addr_t *pa, unsigned long attrs)
  3005. {
  3006. struct sg_table sgt;
  3007. int ret;
  3008. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  3009. if (ret) {
  3010. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3011. va, &dma, size, attrs);
  3012. return -EINVAL;
  3013. }
  3014. *pa = page_to_phys(sg_page(sgt.sgl));
  3015. sg_free_table(&sgt);
  3016. return 0;
  3017. }
  3018. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3019. enum cnss_fw_dump_type type, int seg_no,
  3020. void *va, phys_addr_t pa, size_t size)
  3021. {
  3022. struct md_region md_entry;
  3023. int ret;
  3024. switch (type) {
  3025. case CNSS_FW_IMAGE:
  3026. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3027. seg_no);
  3028. break;
  3029. case CNSS_FW_RDDM:
  3030. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3031. seg_no);
  3032. break;
  3033. case CNSS_FW_REMOTE_HEAP:
  3034. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3035. seg_no);
  3036. break;
  3037. default:
  3038. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3039. return -EINVAL;
  3040. }
  3041. md_entry.phys_addr = pa;
  3042. md_entry.virt_addr = (uintptr_t)va;
  3043. md_entry.size = size;
  3044. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3045. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3046. md_entry.name, va, &pa, size);
  3047. ret = msm_minidump_add_region(&md_entry);
  3048. if (ret < 0)
  3049. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3050. return ret;
  3051. }
  3052. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3053. enum cnss_fw_dump_type type, int seg_no,
  3054. void *va, phys_addr_t pa, size_t size)
  3055. {
  3056. struct md_region md_entry;
  3057. int ret;
  3058. switch (type) {
  3059. case CNSS_FW_IMAGE:
  3060. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3061. seg_no);
  3062. break;
  3063. case CNSS_FW_RDDM:
  3064. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3065. seg_no);
  3066. break;
  3067. case CNSS_FW_REMOTE_HEAP:
  3068. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3069. seg_no);
  3070. break;
  3071. default:
  3072. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3073. return -EINVAL;
  3074. }
  3075. md_entry.phys_addr = pa;
  3076. md_entry.virt_addr = (uintptr_t)va;
  3077. md_entry.size = size;
  3078. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3079. cnss_pr_vdbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3080. md_entry.name, va, &pa, size);
  3081. ret = msm_minidump_remove_region(&md_entry);
  3082. if (ret)
  3083. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3084. ret);
  3085. return ret;
  3086. }
  3087. #else
  3088. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3089. phys_addr_t *pa, unsigned long attrs)
  3090. {
  3091. return 0;
  3092. }
  3093. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3094. enum cnss_fw_dump_type type, int seg_no,
  3095. void *va, phys_addr_t pa, size_t size)
  3096. {
  3097. return 0;
  3098. }
  3099. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3100. enum cnss_fw_dump_type type, int seg_no,
  3101. void *va, phys_addr_t pa, size_t size)
  3102. {
  3103. return 0;
  3104. }
  3105. #endif /* CONFIG_QCOM_MINIDUMP */
  3106. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3107. const struct firmware **fw_entry,
  3108. const char *filename)
  3109. {
  3110. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3111. return request_firmware_direct(fw_entry, filename,
  3112. &plat_priv->plat_dev->dev);
  3113. else
  3114. return firmware_request_nowarn(fw_entry, filename,
  3115. &plat_priv->plat_dev->dev);
  3116. }
  3117. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3118. /**
  3119. * cnss_register_bus_scale() - Setup interconnect voting data
  3120. * @plat_priv: Platform data structure
  3121. *
  3122. * For different interconnect path configured in device tree setup voting data
  3123. * for list of bandwidth requirements.
  3124. *
  3125. * Result: 0 for success. -EINVAL if not configured
  3126. */
  3127. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3128. {
  3129. int ret = -EINVAL;
  3130. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3131. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3132. struct device *dev = &plat_priv->plat_dev->dev;
  3133. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3134. ret = of_property_read_u32(dev->of_node,
  3135. "qcom,icc-path-count",
  3136. &plat_priv->icc.path_count);
  3137. if (ret) {
  3138. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3139. return 0;
  3140. }
  3141. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3142. "qcom,bus-bw-cfg-count",
  3143. &plat_priv->icc.bus_bw_cfg_count);
  3144. if (ret) {
  3145. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3146. goto cleanup;
  3147. }
  3148. cfg_arr_size = plat_priv->icc.path_count *
  3149. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3150. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3151. if (!cfg_arr) {
  3152. cnss_pr_err("Failed to alloc cfg table mem\n");
  3153. ret = -ENOMEM;
  3154. goto cleanup;
  3155. }
  3156. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3157. "qcom,bus-bw-cfg", cfg_arr,
  3158. cfg_arr_size);
  3159. if (ret) {
  3160. cnss_pr_err("Invalid Bus BW Config Table\n");
  3161. goto cleanup;
  3162. }
  3163. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3164. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3165. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3166. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3167. GFP_KERNEL);
  3168. if (!bus_bw_info) {
  3169. ret = -ENOMEM;
  3170. goto out;
  3171. }
  3172. ret = of_property_read_string_index(dev->of_node,
  3173. "interconnect-names", idx,
  3174. &bus_bw_info->icc_name);
  3175. if (ret)
  3176. goto out;
  3177. bus_bw_info->icc_path =
  3178. of_icc_get(&plat_priv->plat_dev->dev,
  3179. bus_bw_info->icc_name);
  3180. if (IS_ERR(bus_bw_info->icc_path)) {
  3181. ret = PTR_ERR(bus_bw_info->icc_path);
  3182. if (ret != -EPROBE_DEFER) {
  3183. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3184. bus_bw_info->icc_name, ret);
  3185. goto out;
  3186. }
  3187. }
  3188. bus_bw_info->cfg_table =
  3189. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3190. sizeof(*bus_bw_info->cfg_table),
  3191. GFP_KERNEL);
  3192. if (!bus_bw_info->cfg_table) {
  3193. ret = -ENOMEM;
  3194. goto out;
  3195. }
  3196. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3197. bus_bw_info->icc_name);
  3198. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3199. CNSS_ICC_VOTE_MAX);
  3200. i < plat_priv->icc.bus_bw_cfg_count;
  3201. i++, j += 2) {
  3202. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3203. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3204. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3205. i, bus_bw_info->cfg_table[i].avg_bw,
  3206. bus_bw_info->cfg_table[i].peak_bw);
  3207. }
  3208. list_add_tail(&bus_bw_info->list,
  3209. &plat_priv->icc.list_head);
  3210. }
  3211. kfree(cfg_arr);
  3212. return 0;
  3213. out:
  3214. list_for_each_entry_safe(bus_bw_info, tmp,
  3215. &plat_priv->icc.list_head, list) {
  3216. list_del(&bus_bw_info->list);
  3217. }
  3218. cleanup:
  3219. kfree(cfg_arr);
  3220. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3221. return ret;
  3222. }
  3223. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3224. {
  3225. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3226. list_for_each_entry_safe(bus_bw_info, tmp,
  3227. &plat_priv->icc.list_head, list) {
  3228. list_del(&bus_bw_info->list);
  3229. if (bus_bw_info->icc_path)
  3230. icc_put(bus_bw_info->icc_path);
  3231. }
  3232. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3233. }
  3234. #else
  3235. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3236. {
  3237. return 0;
  3238. }
  3239. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3240. #endif /* CONFIG_INTERCONNECT */
  3241. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3242. {
  3243. struct cnss_plat_data *plat_priv = cb_ctx;
  3244. if (!plat_priv) {
  3245. cnss_pr_err("%s: Invalid context\n", __func__);
  3246. return;
  3247. }
  3248. if (status) {
  3249. cnss_pr_info("CNSS Daemon connected\n");
  3250. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3251. complete(&plat_priv->daemon_connected);
  3252. } else {
  3253. cnss_pr_info("CNSS Daemon disconnected\n");
  3254. reinit_completion(&plat_priv->daemon_connected);
  3255. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3256. }
  3257. }
  3258. static ssize_t enable_hds_store(struct device *dev,
  3259. struct device_attribute *attr,
  3260. const char *buf, size_t count)
  3261. {
  3262. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3263. unsigned int enable_hds = 0;
  3264. if (!plat_priv)
  3265. return -ENODEV;
  3266. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3267. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3268. return -EINVAL;
  3269. }
  3270. if (enable_hds)
  3271. plat_priv->hds_enabled = true;
  3272. else
  3273. plat_priv->hds_enabled = false;
  3274. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3275. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3276. return count;
  3277. }
  3278. static ssize_t recovery_show(struct device *dev,
  3279. struct device_attribute *attr,
  3280. char *buf)
  3281. {
  3282. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3283. u32 buf_size = PAGE_SIZE;
  3284. u32 curr_len = 0;
  3285. u32 buf_written = 0;
  3286. if (!plat_priv)
  3287. return -ENODEV;
  3288. buf_written = scnprintf(buf, buf_size,
  3289. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3290. "BIT0 -- wlan fw recovery\n"
  3291. "BIT1 -- wlan pcss recovery\n"
  3292. "---------------------------------\n");
  3293. curr_len += buf_written;
  3294. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3295. "WLAN recovery %s[%d]\n",
  3296. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3297. plat_priv->recovery_enabled);
  3298. curr_len += buf_written;
  3299. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3300. "WLAN PCSS recovery %s[%d]\n",
  3301. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3302. plat_priv->recovery_pcss_enabled);
  3303. curr_len += buf_written;
  3304. /*
  3305. * Now size of curr_len is not over page size for sure,
  3306. * later if new item or none-fixed size item added, need
  3307. * add check to make sure curr_len is not over page size.
  3308. */
  3309. return curr_len;
  3310. }
  3311. static ssize_t time_sync_period_show(struct device *dev,
  3312. struct device_attribute *attr,
  3313. char *buf)
  3314. {
  3315. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3316. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3317. plat_priv->ctrl_params.time_sync_period);
  3318. }
  3319. /**
  3320. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3321. * @plat_priv: Platform data structure
  3322. *
  3323. * Result: return minimum time sync period present in vote from wlan and sys
  3324. */
  3325. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3326. {
  3327. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3328. unsigned int time_sync_period;
  3329. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3330. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3331. if (min_time_sync_period > time_sync_period)
  3332. min_time_sync_period = time_sync_period;
  3333. }
  3334. return min_time_sync_period;
  3335. }
  3336. static ssize_t time_sync_period_store(struct device *dev,
  3337. struct device_attribute *attr,
  3338. const char *buf, size_t count)
  3339. {
  3340. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3341. unsigned int time_sync_period = 0;
  3342. if (!plat_priv)
  3343. return -ENODEV;
  3344. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3345. cnss_pr_err("Invalid time sync sysfs command\n");
  3346. return -EINVAL;
  3347. }
  3348. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3349. cnss_pr_err("Invalid time sync value\n");
  3350. return -EINVAL;
  3351. }
  3352. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3353. time_sync_period;
  3354. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3355. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3356. cnss_pr_err("Invalid min time sync value\n");
  3357. return -EINVAL;
  3358. }
  3359. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3360. return count;
  3361. }
  3362. /**
  3363. * cnss_update_time_sync_period() - Set time sync period given by driver
  3364. * @dev: device structure
  3365. * @time_sync_period: time sync period value
  3366. *
  3367. * Update time sync period vote of driver and set minimum of time sync period
  3368. * from stored vote through wlan and sys config
  3369. * Result: return 0 for success, error in case of invalid value and no dev
  3370. */
  3371. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3372. {
  3373. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3374. if (!plat_priv)
  3375. return -ENODEV;
  3376. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3377. cnss_pr_err("Invalid time sync value\n");
  3378. return -EINVAL;
  3379. }
  3380. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3381. time_sync_period;
  3382. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3383. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3384. cnss_pr_err("Invalid min time sync value\n");
  3385. return -EINVAL;
  3386. }
  3387. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3388. return 0;
  3389. }
  3390. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3391. /**
  3392. * cnss_reset_time_sync_period() - Reset time sync period
  3393. * @dev: device structure
  3394. *
  3395. * Update time sync period vote of driver as invalid
  3396. * and reset minimum of time sync period from
  3397. * stored vote through wlan and sys config
  3398. * Result: return 0 for success, error in case of no dev
  3399. */
  3400. int cnss_reset_time_sync_period(struct device *dev)
  3401. {
  3402. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3403. unsigned int time_sync_period = 0;
  3404. if (!plat_priv)
  3405. return -ENODEV;
  3406. /* Driver vote is set to invalid in case of reset
  3407. * In this case, only vote valid to check is sys config
  3408. */
  3409. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3410. CNSS_TIME_SYNC_PERIOD_INVALID;
  3411. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3412. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3413. cnss_pr_err("Invalid min time sync value\n");
  3414. return -EINVAL;
  3415. }
  3416. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3417. return 0;
  3418. }
  3419. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3420. static ssize_t recovery_store(struct device *dev,
  3421. struct device_attribute *attr,
  3422. const char *buf, size_t count)
  3423. {
  3424. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3425. unsigned int recovery = 0;
  3426. if (!plat_priv)
  3427. return -ENODEV;
  3428. if (sscanf(buf, "%du", &recovery) != 1) {
  3429. cnss_pr_err("Invalid recovery sysfs command\n");
  3430. return -EINVAL;
  3431. }
  3432. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3433. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3434. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3435. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3436. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3437. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3438. cnss_send_subsys_restart_level_msg(plat_priv);
  3439. return count;
  3440. }
  3441. static ssize_t shutdown_store(struct device *dev,
  3442. struct device_attribute *attr,
  3443. const char *buf, size_t count)
  3444. {
  3445. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3446. cnss_pr_dbg("Received shutdown notification\n");
  3447. if (plat_priv) {
  3448. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3449. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3450. del_timer(&plat_priv->fw_boot_timer);
  3451. complete_all(&plat_priv->power_up_complete);
  3452. complete_all(&plat_priv->cal_complete);
  3453. cnss_pr_dbg("Shutdown notification handled\n");
  3454. }
  3455. return count;
  3456. }
  3457. static ssize_t fs_ready_store(struct device *dev,
  3458. struct device_attribute *attr,
  3459. const char *buf, size_t count)
  3460. {
  3461. int fs_ready = 0;
  3462. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3463. if (sscanf(buf, "%du", &fs_ready) != 1)
  3464. return -EINVAL;
  3465. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3466. fs_ready, count);
  3467. if (!plat_priv) {
  3468. cnss_pr_err("plat_priv is NULL\n");
  3469. return count;
  3470. }
  3471. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3472. cnss_pr_dbg("QMI is bypassed\n");
  3473. return count;
  3474. }
  3475. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3476. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3477. cnss_driver_event_post(plat_priv,
  3478. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3479. 0, NULL);
  3480. }
  3481. return count;
  3482. }
  3483. static ssize_t qdss_trace_start_store(struct device *dev,
  3484. struct device_attribute *attr,
  3485. const char *buf, size_t count)
  3486. {
  3487. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3488. wlfw_qdss_trace_start(plat_priv);
  3489. cnss_pr_dbg("Received QDSS start command\n");
  3490. return count;
  3491. }
  3492. static ssize_t qdss_trace_stop_store(struct device *dev,
  3493. struct device_attribute *attr,
  3494. const char *buf, size_t count)
  3495. {
  3496. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3497. u32 option = 0;
  3498. if (sscanf(buf, "%du", &option) != 1)
  3499. return -EINVAL;
  3500. wlfw_qdss_trace_stop(plat_priv, option);
  3501. cnss_pr_dbg("Received QDSS stop command\n");
  3502. return count;
  3503. }
  3504. static ssize_t qdss_conf_download_store(struct device *dev,
  3505. struct device_attribute *attr,
  3506. const char *buf, size_t count)
  3507. {
  3508. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3509. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3510. cnss_pr_dbg("Received QDSS download config command\n");
  3511. return count;
  3512. }
  3513. static ssize_t hw_trace_override_store(struct device *dev,
  3514. struct device_attribute *attr,
  3515. const char *buf, size_t count)
  3516. {
  3517. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3518. int tmp = 0;
  3519. if (sscanf(buf, "%du", &tmp) != 1)
  3520. return -EINVAL;
  3521. plat_priv->hw_trc_override = tmp;
  3522. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3523. return count;
  3524. }
  3525. static ssize_t charger_mode_store(struct device *dev,
  3526. struct device_attribute *attr,
  3527. const char *buf, size_t count)
  3528. {
  3529. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3530. int tmp = 0;
  3531. if (sscanf(buf, "%du", &tmp) != 1)
  3532. return -EINVAL;
  3533. plat_priv->charger_mode = tmp;
  3534. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3535. return count;
  3536. }
  3537. static DEVICE_ATTR_WO(fs_ready);
  3538. static DEVICE_ATTR_WO(shutdown);
  3539. static DEVICE_ATTR_RW(recovery);
  3540. static DEVICE_ATTR_WO(enable_hds);
  3541. static DEVICE_ATTR_WO(qdss_trace_start);
  3542. static DEVICE_ATTR_WO(qdss_trace_stop);
  3543. static DEVICE_ATTR_WO(qdss_conf_download);
  3544. static DEVICE_ATTR_WO(hw_trace_override);
  3545. static DEVICE_ATTR_WO(charger_mode);
  3546. static DEVICE_ATTR_RW(time_sync_period);
  3547. static struct attribute *cnss_attrs[] = {
  3548. &dev_attr_fs_ready.attr,
  3549. &dev_attr_shutdown.attr,
  3550. &dev_attr_recovery.attr,
  3551. &dev_attr_enable_hds.attr,
  3552. &dev_attr_qdss_trace_start.attr,
  3553. &dev_attr_qdss_trace_stop.attr,
  3554. &dev_attr_qdss_conf_download.attr,
  3555. &dev_attr_hw_trace_override.attr,
  3556. &dev_attr_charger_mode.attr,
  3557. &dev_attr_time_sync_period.attr,
  3558. NULL,
  3559. };
  3560. static struct attribute_group cnss_attr_group = {
  3561. .attrs = cnss_attrs,
  3562. };
  3563. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3564. {
  3565. struct device *dev = &plat_priv->plat_dev->dev;
  3566. int ret;
  3567. char cnss_name[CNSS_FS_NAME_SIZE];
  3568. char shutdown_name[32];
  3569. if (cnss_is_dual_wlan_enabled()) {
  3570. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3571. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3572. snprintf(shutdown_name, sizeof(shutdown_name),
  3573. "shutdown_wlan_%d", plat_priv->plat_idx);
  3574. } else {
  3575. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3576. snprintf(shutdown_name, sizeof(shutdown_name),
  3577. "shutdown_wlan");
  3578. }
  3579. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3580. if (ret) {
  3581. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3582. ret);
  3583. goto out;
  3584. }
  3585. /* This is only for backward compatibility. */
  3586. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3587. if (ret) {
  3588. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3589. ret);
  3590. goto rm_cnss_link;
  3591. }
  3592. return 0;
  3593. rm_cnss_link:
  3594. sysfs_remove_link(kernel_kobj, cnss_name);
  3595. out:
  3596. return ret;
  3597. }
  3598. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3599. {
  3600. char cnss_name[CNSS_FS_NAME_SIZE];
  3601. char shutdown_name[32];
  3602. if (cnss_is_dual_wlan_enabled()) {
  3603. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3604. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3605. snprintf(shutdown_name, sizeof(shutdown_name),
  3606. "shutdown_wlan_%d", plat_priv->plat_idx);
  3607. } else {
  3608. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3609. snprintf(shutdown_name, sizeof(shutdown_name),
  3610. "shutdown_wlan");
  3611. }
  3612. sysfs_remove_link(kernel_kobj, shutdown_name);
  3613. sysfs_remove_link(kernel_kobj, cnss_name);
  3614. }
  3615. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3616. {
  3617. int ret = 0;
  3618. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3619. &cnss_attr_group);
  3620. if (ret) {
  3621. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3622. ret);
  3623. goto out;
  3624. }
  3625. cnss_create_sysfs_link(plat_priv);
  3626. return 0;
  3627. out:
  3628. return ret;
  3629. }
  3630. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3631. {
  3632. cnss_remove_sysfs_link(plat_priv);
  3633. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3634. }
  3635. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3636. {
  3637. spin_lock_init(&plat_priv->event_lock);
  3638. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3639. WQ_UNBOUND, 1);
  3640. if (!plat_priv->event_wq) {
  3641. cnss_pr_err("Failed to create event workqueue!\n");
  3642. return -EFAULT;
  3643. }
  3644. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3645. INIT_LIST_HEAD(&plat_priv->event_list);
  3646. return 0;
  3647. }
  3648. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3649. {
  3650. destroy_workqueue(plat_priv->event_wq);
  3651. }
  3652. static int cnss_reboot_notifier(struct notifier_block *nb,
  3653. unsigned long action,
  3654. void *data)
  3655. {
  3656. struct cnss_plat_data *plat_priv =
  3657. container_of(nb, struct cnss_plat_data, reboot_nb);
  3658. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3659. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3660. del_timer(&plat_priv->fw_boot_timer);
  3661. complete_all(&plat_priv->power_up_complete);
  3662. complete_all(&plat_priv->cal_complete);
  3663. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3664. return NOTIFY_DONE;
  3665. }
  3666. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3667. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  3668. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3669. {
  3670. uint32_t *peripheralStateInfo = NULL;
  3671. size_t size = 0;
  3672. /* Once this flag is set, secure peripheral feature
  3673. * will not be supported till next reboot
  3674. */
  3675. if (plat_priv->sec_peri_feature_disable)
  3676. return 0;
  3677. peripheralStateInfo = qcom_smem_get(QCOM_SMEM_HOST_ANY, PERISEC_SMEM_ID, &size);
  3678. if (IS_ERR_OR_NULL(peripheralStateInfo)) {
  3679. if (PTR_ERR(peripheralStateInfo) != -ENOENT)
  3680. CNSS_ASSERT(0);
  3681. cnss_pr_dbg("Secure HW feature not enabled. ret = %d\n",
  3682. PTR_ERR(peripheralStateInfo));
  3683. plat_priv->sec_peri_feature_disable = true;
  3684. return 0;
  3685. }
  3686. cnss_pr_dbg("Secure HW state: %d\n", *peripheralStateInfo);
  3687. if ((*peripheralStateInfo >> (HW_WIFI_UID - 0x500)) & 0x1)
  3688. set_bit(CNSS_WLAN_HW_DISABLED,
  3689. &plat_priv->driver_state);
  3690. else
  3691. clear_bit(CNSS_WLAN_HW_DISABLED,
  3692. &plat_priv->driver_state);
  3693. return 0;
  3694. }
  3695. #else
  3696. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3697. {
  3698. struct Object client_env;
  3699. struct Object app_object;
  3700. u32 wifi_uid = HW_WIFI_UID;
  3701. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3702. int ret;
  3703. u8 state = 0;
  3704. /* Once this flag is set, secure peripheral feature
  3705. * will not be supported till next reboot
  3706. */
  3707. if (plat_priv->sec_peri_feature_disable)
  3708. return 0;
  3709. /* get rootObj */
  3710. ret = get_client_env_object(&client_env);
  3711. if (ret) {
  3712. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3713. goto end;
  3714. }
  3715. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3716. if (ret) {
  3717. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3718. if (ret == FEATURE_NOT_SUPPORTED) {
  3719. ret = 0; /* Do not Assert */
  3720. plat_priv->sec_peri_feature_disable = true;
  3721. cnss_pr_dbg("Secure HW feature not supported\n");
  3722. }
  3723. goto exit_release_clientenv;
  3724. }
  3725. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3726. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3727. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3728. ObjectCounts_pack(1, 1, 0, 0));
  3729. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3730. if (ret) {
  3731. if (ret == PERIPHERAL_NOT_FOUND) {
  3732. ret = 0; /* Do not Assert */
  3733. plat_priv->sec_peri_feature_disable = true;
  3734. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3735. }
  3736. goto exit_release_app_obj;
  3737. }
  3738. if (state == 1)
  3739. set_bit(CNSS_WLAN_HW_DISABLED,
  3740. &plat_priv->driver_state);
  3741. else
  3742. clear_bit(CNSS_WLAN_HW_DISABLED,
  3743. &plat_priv->driver_state);
  3744. exit_release_app_obj:
  3745. Object_release(app_object);
  3746. exit_release_clientenv:
  3747. Object_release(client_env);
  3748. end:
  3749. if (ret) {
  3750. cnss_pr_err("Unable to get HW disable status\n");
  3751. CNSS_ASSERT(0);
  3752. }
  3753. return ret;
  3754. }
  3755. #endif
  3756. #else
  3757. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3758. {
  3759. return 0;
  3760. }
  3761. #endif
  3762. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3763. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3764. {
  3765. }
  3766. #else
  3767. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3768. {
  3769. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3770. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3771. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3772. }
  3773. #endif
  3774. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3775. static void cnss_initialize_mem_pool(unsigned long device_id)
  3776. {
  3777. cnss_initialize_prealloc_pool(device_id);
  3778. }
  3779. static void cnss_deinitialize_mem_pool(void)
  3780. {
  3781. cnss_deinitialize_prealloc_pool();
  3782. }
  3783. #else
  3784. static void cnss_initialize_mem_pool(unsigned long device_id)
  3785. {
  3786. }
  3787. static void cnss_deinitialize_mem_pool(void)
  3788. {
  3789. }
  3790. #endif
  3791. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3792. {
  3793. int ret;
  3794. ret = cnss_init_sol_gpio(plat_priv);
  3795. if (ret)
  3796. return ret;
  3797. timer_setup(&plat_priv->fw_boot_timer,
  3798. cnss_bus_fw_boot_timeout_hdlr, 0);
  3799. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3800. if (ret)
  3801. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3802. ret);
  3803. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3804. init_completion(&plat_priv->power_up_complete);
  3805. init_completion(&plat_priv->cal_complete);
  3806. init_completion(&plat_priv->rddm_complete);
  3807. init_completion(&plat_priv->recovery_complete);
  3808. init_completion(&plat_priv->daemon_connected);
  3809. mutex_init(&plat_priv->dev_lock);
  3810. mutex_init(&plat_priv->driver_ops_lock);
  3811. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3812. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3813. if (ret)
  3814. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3815. ret);
  3816. plat_priv->recovery_ws =
  3817. wakeup_source_register(&plat_priv->plat_dev->dev,
  3818. "CNSS_FW_RECOVERY");
  3819. if (!plat_priv->recovery_ws)
  3820. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3821. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3822. cnss_daemon_connection_update_cb,
  3823. plat_priv);
  3824. if (ret)
  3825. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3826. ret);
  3827. cnss_sram_dump_init(plat_priv);
  3828. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3829. "qcom,rc-ep-short-channel"))
  3830. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3831. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3832. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  3833. return 0;
  3834. }
  3835. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3836. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3837. {
  3838. }
  3839. #else
  3840. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3841. {
  3842. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3843. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3844. kfree(plat_priv->sram_dump);
  3845. }
  3846. #endif
  3847. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3848. {
  3849. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3850. plat_priv);
  3851. complete_all(&plat_priv->recovery_complete);
  3852. complete_all(&plat_priv->rddm_complete);
  3853. complete_all(&plat_priv->cal_complete);
  3854. complete_all(&plat_priv->power_up_complete);
  3855. complete_all(&plat_priv->daemon_connected);
  3856. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3857. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3858. del_timer(&plat_priv->fw_boot_timer);
  3859. wakeup_source_unregister(plat_priv->recovery_ws);
  3860. cnss_deinit_sol_gpio(plat_priv);
  3861. cnss_sram_dump_deinit(plat_priv);
  3862. kfree(plat_priv->on_chip_pmic_board_ids);
  3863. }
  3864. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  3865. {
  3866. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3867. CNSS_TIME_SYNC_PERIOD_INVALID;
  3868. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3869. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3870. }
  3871. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3872. {
  3873. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3874. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3875. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3876. "qcom,wlan-cbc-enabled");
  3877. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3878. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3879. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3880. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3881. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3882. cnss_init_time_sync_period_default(plat_priv);
  3883. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3884. * enabled by default
  3885. */
  3886. plat_priv->adsp_pc_enabled = true;
  3887. }
  3888. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3889. {
  3890. struct device *dev = &plat_priv->plat_dev->dev;
  3891. plat_priv->use_pm_domain =
  3892. of_property_read_bool(dev->of_node, "use-pm-domain");
  3893. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3894. }
  3895. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3896. {
  3897. struct device *dev = &plat_priv->plat_dev->dev;
  3898. plat_priv->set_wlaon_pwr_ctrl =
  3899. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3900. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3901. plat_priv->set_wlaon_pwr_ctrl);
  3902. }
  3903. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3904. {
  3905. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3906. "qcom,converged-dt") ||
  3907. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3908. "qcom,same-dt-multi-dev") ||
  3909. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3910. "qcom,multi-wlan-exchg"));
  3911. }
  3912. static const struct platform_device_id cnss_platform_id_table[] = {
  3913. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3914. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3915. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3916. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3917. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3918. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3919. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3920. { .name = "qcaconv", .driver_data = 0, },
  3921. { },
  3922. };
  3923. static const struct of_device_id cnss_of_match_table[] = {
  3924. {
  3925. .compatible = "qcom,cnss",
  3926. .data = (void *)&cnss_platform_id_table[0]},
  3927. {
  3928. .compatible = "qcom,cnss-qca6290",
  3929. .data = (void *)&cnss_platform_id_table[1]},
  3930. {
  3931. .compatible = "qcom,cnss-qca6390",
  3932. .data = (void *)&cnss_platform_id_table[2]},
  3933. {
  3934. .compatible = "qcom,cnss-qca6490",
  3935. .data = (void *)&cnss_platform_id_table[3]},
  3936. {
  3937. .compatible = "qcom,cnss-kiwi",
  3938. .data = (void *)&cnss_platform_id_table[4]},
  3939. {
  3940. .compatible = "qcom,cnss-mango",
  3941. .data = (void *)&cnss_platform_id_table[5]},
  3942. {
  3943. .compatible = "qcom,cnss-peach",
  3944. .data = (void *)&cnss_platform_id_table[6]},
  3945. {
  3946. .compatible = "qcom,cnss-qca-converged",
  3947. .data = (void *)&cnss_platform_id_table[7]},
  3948. { },
  3949. };
  3950. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3951. static inline bool
  3952. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3953. {
  3954. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3955. "use-nv-mac");
  3956. }
  3957. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3958. {
  3959. struct device_node *child;
  3960. u32 id, i;
  3961. int id_n, device_identifier_gpio, ret;
  3962. u8 gpio_value;
  3963. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3964. return 0;
  3965. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3966. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3967. if (ret) {
  3968. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3969. return ret;
  3970. }
  3971. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3972. gpio_value = gpio_get_value(device_identifier_gpio);
  3973. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3974. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3975. child) {
  3976. if (strcmp(child->name, "chip_cfg"))
  3977. continue;
  3978. id_n = of_property_count_u32_elems(child, "supported-ids");
  3979. if (id_n <= 0) {
  3980. cnss_pr_err("Device id is NOT set\n");
  3981. return -EINVAL;
  3982. }
  3983. for (i = 0; i < id_n; i++) {
  3984. ret = of_property_read_u32_index(child,
  3985. "supported-ids",
  3986. i, &id);
  3987. if (ret) {
  3988. cnss_pr_err("Failed to read supported ids\n");
  3989. return -EINVAL;
  3990. }
  3991. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3992. plat_priv->plat_dev->dev.of_node = child;
  3993. plat_priv->device_id = QCA6490_DEVICE_ID;
  3994. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3995. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3996. child->name, i, id);
  3997. return 0;
  3998. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3999. plat_priv->plat_dev->dev.of_node = child;
  4000. plat_priv->device_id = KIWI_DEVICE_ID;
  4001. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  4002. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4003. child->name, i, id);
  4004. return 0;
  4005. }
  4006. }
  4007. }
  4008. return -EINVAL;
  4009. }
  4010. static inline u32
  4011. cnss_dt_type(struct cnss_plat_data *plat_priv)
  4012. {
  4013. bool is_converged_dt = of_property_read_bool(
  4014. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  4015. bool is_multi_wlan_xchg;
  4016. if (is_converged_dt)
  4017. return CNSS_DTT_CONVERGED;
  4018. is_multi_wlan_xchg = of_property_read_bool(
  4019. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  4020. if (is_multi_wlan_xchg)
  4021. return CNSS_DTT_MULTIEXCHG;
  4022. return CNSS_DTT_LEGACY;
  4023. }
  4024. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  4025. {
  4026. int ret = 0;
  4027. int retry = 0;
  4028. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  4029. return 0;
  4030. retry:
  4031. ret = cnss_power_on_device(plat_priv, true);
  4032. if (ret)
  4033. goto end;
  4034. ret = cnss_bus_init(plat_priv);
  4035. if (ret) {
  4036. if ((ret != -EPROBE_DEFER) &&
  4037. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  4038. cnss_power_off_device(plat_priv);
  4039. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  4040. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4041. goto retry;
  4042. }
  4043. goto power_off;
  4044. }
  4045. return 0;
  4046. power_off:
  4047. cnss_power_off_device(plat_priv);
  4048. end:
  4049. return ret;
  4050. }
  4051. int cnss_wlan_hw_enable(void)
  4052. {
  4053. struct cnss_plat_data *plat_priv;
  4054. int ret = 0;
  4055. if (cnss_is_dual_wlan_enabled())
  4056. plat_priv = cnss_get_first_plat_priv(NULL);
  4057. else
  4058. plat_priv = cnss_get_plat_priv(NULL);
  4059. if (!plat_priv)
  4060. return -ENODEV;
  4061. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4062. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4063. goto register_driver;
  4064. ret = cnss_wlan_device_init(plat_priv);
  4065. if (ret) {
  4066. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4067. CNSS_ASSERT(0);
  4068. return ret;
  4069. }
  4070. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4071. cnss_driver_event_post(plat_priv,
  4072. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4073. 0, NULL);
  4074. register_driver:
  4075. if (plat_priv->driver_ops)
  4076. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4077. return ret;
  4078. }
  4079. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4080. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4081. {
  4082. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4083. int ret = 0;
  4084. if (!plat_priv)
  4085. return -ENODEV;
  4086. /* If IMS server is connected, return success without QMI send */
  4087. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4088. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4089. return ret;
  4090. }
  4091. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4092. return ret;
  4093. }
  4094. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4095. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4096. unsigned long *thermal_state)
  4097. {
  4098. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4099. if (!tcdev || !tcdev->devdata) {
  4100. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4101. return -EINVAL;
  4102. }
  4103. cnss_tcdev = tcdev->devdata;
  4104. *thermal_state = cnss_tcdev->max_thermal_state;
  4105. return 0;
  4106. }
  4107. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4108. unsigned long *thermal_state)
  4109. {
  4110. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4111. if (!tcdev || !tcdev->devdata) {
  4112. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4113. return -EINVAL;
  4114. }
  4115. cnss_tcdev = tcdev->devdata;
  4116. *thermal_state = cnss_tcdev->curr_thermal_state;
  4117. return 0;
  4118. }
  4119. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4120. unsigned long thermal_state)
  4121. {
  4122. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4123. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4124. int ret = 0;
  4125. if (!tcdev || !tcdev->devdata) {
  4126. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4127. return -EINVAL;
  4128. }
  4129. cnss_tcdev = tcdev->devdata;
  4130. if (thermal_state > cnss_tcdev->max_thermal_state)
  4131. return -EINVAL;
  4132. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4133. thermal_state, cnss_tcdev->tcdev_id);
  4134. mutex_lock(&plat_priv->tcdev_lock);
  4135. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4136. thermal_state,
  4137. cnss_tcdev->tcdev_id);
  4138. if (!ret)
  4139. cnss_tcdev->curr_thermal_state = thermal_state;
  4140. mutex_unlock(&plat_priv->tcdev_lock);
  4141. if (ret) {
  4142. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4143. ret, cnss_tcdev->tcdev_id);
  4144. return ret;
  4145. }
  4146. return 0;
  4147. }
  4148. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4149. .get_max_state = cnss_tcdev_get_max_state,
  4150. .get_cur_state = cnss_tcdev_get_cur_state,
  4151. .set_cur_state = cnss_tcdev_set_cur_state,
  4152. };
  4153. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4154. int tcdev_id)
  4155. {
  4156. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4157. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4158. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4159. struct device_node *dev_node;
  4160. int ret = 0;
  4161. if (!priv) {
  4162. cnss_pr_err("Platform driver is not initialized!\n");
  4163. return -ENODEV;
  4164. }
  4165. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4166. if (!cnss_tcdev) {
  4167. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4168. return -ENOMEM;
  4169. }
  4170. cnss_tcdev->tcdev_id = tcdev_id;
  4171. cnss_tcdev->max_thermal_state = max_state;
  4172. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4173. "qcom,cnss_cdev%d", tcdev_id);
  4174. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4175. if (!dev_node) {
  4176. cnss_pr_err("Failed to get cooling device node\n");
  4177. kfree(cnss_tcdev);
  4178. return -EINVAL;
  4179. }
  4180. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4181. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4182. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4183. cdev_node_name,
  4184. cnss_tcdev,
  4185. &cnss_cooling_ops);
  4186. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4187. ret = PTR_ERR(cnss_tcdev->tcdev);
  4188. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4189. ret, cnss_tcdev->tcdev_id);
  4190. kfree(cnss_tcdev);
  4191. } else {
  4192. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4193. cnss_tcdev->tcdev_id);
  4194. mutex_lock(&priv->tcdev_lock);
  4195. list_add(&cnss_tcdev->tcdev_list,
  4196. &priv->cnss_tcdev_list);
  4197. mutex_unlock(&priv->tcdev_lock);
  4198. }
  4199. } else {
  4200. cnss_pr_dbg("Cooling device registration not supported");
  4201. kfree(cnss_tcdev);
  4202. ret = -EOPNOTSUPP;
  4203. }
  4204. return ret;
  4205. }
  4206. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4207. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4208. {
  4209. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4210. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4211. if (!priv) {
  4212. cnss_pr_err("Platform driver is not initialized!\n");
  4213. return;
  4214. }
  4215. mutex_lock(&priv->tcdev_lock);
  4216. while (!list_empty(&priv->cnss_tcdev_list)) {
  4217. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4218. struct cnss_thermal_cdev,
  4219. tcdev_list);
  4220. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4221. list_del(&cnss_tcdev->tcdev_list);
  4222. kfree(cnss_tcdev);
  4223. }
  4224. mutex_unlock(&priv->tcdev_lock);
  4225. }
  4226. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4227. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4228. unsigned long *thermal_state,
  4229. int tcdev_id)
  4230. {
  4231. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4232. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4233. if (!priv) {
  4234. cnss_pr_err("Platform driver is not initialized!\n");
  4235. return -ENODEV;
  4236. }
  4237. mutex_lock(&priv->tcdev_lock);
  4238. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4239. if (cnss_tcdev->tcdev_id != tcdev_id)
  4240. continue;
  4241. *thermal_state = cnss_tcdev->curr_thermal_state;
  4242. mutex_unlock(&priv->tcdev_lock);
  4243. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4244. cnss_tcdev->curr_thermal_state, tcdev_id);
  4245. return 0;
  4246. }
  4247. mutex_unlock(&priv->tcdev_lock);
  4248. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4249. return -EINVAL;
  4250. }
  4251. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4252. static int cnss_probe(struct platform_device *plat_dev)
  4253. {
  4254. int ret = 0;
  4255. struct cnss_plat_data *plat_priv;
  4256. const struct of_device_id *of_id;
  4257. const struct platform_device_id *device_id;
  4258. if (cnss_get_plat_priv(plat_dev)) {
  4259. cnss_pr_err("Driver is already initialized!\n");
  4260. ret = -EEXIST;
  4261. goto out;
  4262. }
  4263. ret = cnss_plat_env_available();
  4264. if (ret)
  4265. goto out;
  4266. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4267. if (!of_id || !of_id->data) {
  4268. cnss_pr_err("Failed to find of match device!\n");
  4269. ret = -ENODEV;
  4270. goto out;
  4271. }
  4272. device_id = of_id->data;
  4273. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4274. GFP_KERNEL);
  4275. if (!plat_priv) {
  4276. ret = -ENOMEM;
  4277. goto out;
  4278. }
  4279. plat_priv->plat_dev = plat_dev;
  4280. plat_priv->dev_node = NULL;
  4281. plat_priv->device_id = device_id->driver_data;
  4282. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4283. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4284. plat_priv->dt_type);
  4285. plat_priv->use_fw_path_with_prefix =
  4286. cnss_use_fw_path_with_prefix(plat_priv);
  4287. ret = cnss_get_dev_cfg_node(plat_priv);
  4288. if (ret) {
  4289. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4290. goto reset_plat_dev;
  4291. }
  4292. cnss_initialize_mem_pool(plat_priv->device_id);
  4293. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4294. if (ret)
  4295. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4296. ret);
  4297. ret = cnss_get_rc_num(plat_priv);
  4298. if (ret)
  4299. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4300. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4301. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4302. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4303. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4304. cnss_set_plat_priv(plat_dev, plat_priv);
  4305. cnss_set_device_name(plat_priv);
  4306. platform_set_drvdata(plat_dev, plat_priv);
  4307. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4308. INIT_LIST_HEAD(&plat_priv->clk_list);
  4309. cnss_get_pm_domain_info(plat_priv);
  4310. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4311. cnss_power_misc_params_init(plat_priv);
  4312. cnss_get_tcs_info(plat_priv);
  4313. cnss_get_cpr_info(plat_priv);
  4314. cnss_aop_interface_init(plat_priv);
  4315. cnss_init_control_params(plat_priv);
  4316. ret = cnss_get_resources(plat_priv);
  4317. if (ret)
  4318. goto reset_ctx;
  4319. ret = cnss_register_esoc(plat_priv);
  4320. if (ret)
  4321. goto free_res;
  4322. ret = cnss_register_bus_scale(plat_priv);
  4323. if (ret)
  4324. goto unreg_esoc;
  4325. ret = cnss_create_sysfs(plat_priv);
  4326. if (ret)
  4327. goto unreg_bus_scale;
  4328. ret = cnss_event_work_init(plat_priv);
  4329. if (ret)
  4330. goto remove_sysfs;
  4331. ret = cnss_dms_init(plat_priv);
  4332. if (ret)
  4333. goto deinit_event_work;
  4334. ret = cnss_debugfs_create(plat_priv);
  4335. if (ret)
  4336. goto deinit_dms;
  4337. ret = cnss_misc_init(plat_priv);
  4338. if (ret)
  4339. goto destroy_debugfs;
  4340. ret = cnss_wlan_hw_disable_check(plat_priv);
  4341. if (ret)
  4342. goto deinit_misc;
  4343. /* Make sure all platform related init are done before
  4344. * device power on and bus init.
  4345. */
  4346. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4347. ret = cnss_wlan_device_init(plat_priv);
  4348. if (ret)
  4349. goto deinit_misc;
  4350. } else {
  4351. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4352. }
  4353. cnss_register_coex_service(plat_priv);
  4354. cnss_register_ims_service(plat_priv);
  4355. mutex_init(&plat_priv->tcdev_lock);
  4356. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4357. cnss_pr_info("Platform driver probed successfully.\n");
  4358. return 0;
  4359. deinit_misc:
  4360. cnss_misc_deinit(plat_priv);
  4361. destroy_debugfs:
  4362. cnss_debugfs_destroy(plat_priv);
  4363. deinit_dms:
  4364. cnss_dms_deinit(plat_priv);
  4365. deinit_event_work:
  4366. cnss_event_work_deinit(plat_priv);
  4367. remove_sysfs:
  4368. cnss_remove_sysfs(plat_priv);
  4369. unreg_bus_scale:
  4370. cnss_unregister_bus_scale(plat_priv);
  4371. unreg_esoc:
  4372. cnss_unregister_esoc(plat_priv);
  4373. free_res:
  4374. cnss_put_resources(plat_priv);
  4375. reset_ctx:
  4376. cnss_aop_interface_deinit(plat_priv);
  4377. platform_set_drvdata(plat_dev, NULL);
  4378. cnss_deinitialize_mem_pool();
  4379. reset_plat_dev:
  4380. cnss_clear_plat_priv(plat_priv);
  4381. out:
  4382. return ret;
  4383. }
  4384. static int cnss_remove(struct platform_device *plat_dev)
  4385. {
  4386. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4387. plat_priv->audio_iommu_domain = NULL;
  4388. cnss_genl_exit();
  4389. cnss_unregister_ims_service(plat_priv);
  4390. cnss_unregister_coex_service(plat_priv);
  4391. cnss_bus_deinit(plat_priv);
  4392. cnss_misc_deinit(plat_priv);
  4393. cnss_debugfs_destroy(plat_priv);
  4394. cnss_dms_deinit(plat_priv);
  4395. cnss_qmi_deinit(plat_priv);
  4396. cnss_event_work_deinit(plat_priv);
  4397. cnss_cancel_dms_work();
  4398. cnss_remove_sysfs(plat_priv);
  4399. cnss_unregister_bus_scale(plat_priv);
  4400. cnss_unregister_esoc(plat_priv);
  4401. cnss_put_resources(plat_priv);
  4402. cnss_aop_interface_deinit(plat_priv);
  4403. cnss_deinitialize_mem_pool();
  4404. platform_set_drvdata(plat_dev, NULL);
  4405. cnss_clear_plat_priv(plat_priv);
  4406. return 0;
  4407. }
  4408. static struct platform_driver cnss_platform_driver = {
  4409. .probe = cnss_probe,
  4410. .remove = cnss_remove,
  4411. .driver = {
  4412. .name = "cnss2",
  4413. .of_match_table = cnss_of_match_table,
  4414. #ifdef CONFIG_CNSS_ASYNC
  4415. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4416. #endif
  4417. },
  4418. };
  4419. static bool cnss_check_compatible_node(void)
  4420. {
  4421. struct device_node *dn = NULL;
  4422. for_each_matching_node(dn, cnss_of_match_table) {
  4423. if (of_device_is_available(dn)) {
  4424. cnss_allow_driver_loading = true;
  4425. return true;
  4426. }
  4427. }
  4428. return false;
  4429. }
  4430. /**
  4431. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4432. *
  4433. * Valid device tree node means a node with "compatible" property from the
  4434. * device match table and "status" property is not disabled.
  4435. *
  4436. * Return: true if valid device tree node found, false if not found
  4437. */
  4438. static bool cnss_is_valid_dt_node_found(void)
  4439. {
  4440. struct device_node *dn = NULL;
  4441. for_each_matching_node(dn, cnss_of_match_table) {
  4442. if (of_device_is_available(dn))
  4443. break;
  4444. }
  4445. if (dn)
  4446. return true;
  4447. return false;
  4448. }
  4449. static int __init cnss_initialize(void)
  4450. {
  4451. int ret = 0;
  4452. if (!cnss_is_valid_dt_node_found())
  4453. return -ENODEV;
  4454. if (!cnss_check_compatible_node())
  4455. return ret;
  4456. cnss_debug_init();
  4457. ret = platform_driver_register(&cnss_platform_driver);
  4458. if (ret)
  4459. cnss_debug_deinit();
  4460. ret = cnss_genl_init();
  4461. if (ret < 0)
  4462. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4463. return ret;
  4464. }
  4465. static void __exit cnss_exit(void)
  4466. {
  4467. cnss_genl_exit();
  4468. platform_driver_unregister(&cnss_platform_driver);
  4469. cnss_debug_deinit();
  4470. }
  4471. module_init(cnss_initialize);
  4472. module_exit(cnss_exit);
  4473. MODULE_LICENSE("GPL v2");
  4474. MODULE_DESCRIPTION("CNSS2 Platform Driver");