msm_vidc_debug.h 6.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef __MSM_VIDC_DEBUG__
  7. #define __MSM_VIDC_DEBUG__
  8. #include <linux/types.h>
  9. #include <linux/errno.h>
  10. #include <linux/debugfs.h>
  11. #include <linux/delay.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. struct msm_vidc_core;
  15. struct msm_vidc_inst;
  16. #ifndef VIDC_DBG_LABEL
  17. #define VIDC_DBG_LABEL "msm_vidc"
  18. #endif
  19. /* Allow only 6 prints/sec */
  20. #define VIDC_DBG_SESSION_RATELIMIT_INTERVAL (1 * HZ)
  21. #define VIDC_DBG_SESSION_RATELIMIT_BURST 6
  22. #define VIDC_DBG_TAG_INST VIDC_DBG_LABEL ": %4s: %s: "
  23. #define VIDC_DBG_TAG_CORE VIDC_DBG_LABEL ": %4s: %08x: %s: "
  24. #define FW_DBG_TAG VIDC_DBG_LABEL ": %6s: "
  25. #define DEFAULT_SID ((u32)-1)
  26. #ifndef MSM_VIDC_EMPTY_BRACE
  27. #define MSM_VIDC_EMPTY_BRACE {},
  28. #endif
  29. extern unsigned int msm_vidc_debug;
  30. extern unsigned int msm_fw_debug;
  31. extern bool msm_vidc_lossless_encode;
  32. extern bool msm_vidc_syscache_disable;
  33. extern int msm_vidc_clock_voting;
  34. extern int msm_vidc_ddr_bw;
  35. extern int msm_vidc_llc_bw;
  36. extern bool msm_vidc_fw_dump;
  37. extern unsigned int msm_vidc_enable_bugon;
  38. extern bool msm_vidc_synx_fence_enable;
  39. /* do not modify the log message as it is used in test scripts */
  40. #define FMT_STRING_SET_CTRL \
  41. "%s: state %s, name %s, id 0x%x value %d\n"
  42. #define FMT_STRING_STATE_CHANGE \
  43. "%s: state changed to %s from %s\n"
  44. #define FMT_STRING_MSG_SFR \
  45. "SFR Message from FW: %s\n"
  46. #define FMT_STRING_FAULT_HANDLER \
  47. "%s: faulting address: %lx\n"
  48. #define FMT_STRING_SET_CAP \
  49. "set cap: name: %24s, cap value: %#10x, hfi: %#10llx\n"
  50. #define FMT_STRING_SYSTEM_ERROR \
  51. "%s: system error received\n"
  52. #define FMT_STRING_BOOT_FIRMWARE_ERROR \
  53. "Error booting up vidc firmware, ctrl status %#x, ctrl init %#x\n"
  54. /* To enable messages OR these values and
  55. * echo the result to debugfs file.
  56. *
  57. * To enable all messages set msm_vidc_debug = 0x101F
  58. */
  59. enum vidc_msg_prio_drv {
  60. VIDC_ERR = 0x00000001,
  61. VIDC_HIGH = 0x00000002,
  62. VIDC_LOW = 0x00000004,
  63. VIDC_PERF = 0x00000008,
  64. VIDC_PKT = 0x00000010,
  65. VIDC_BUS = 0x00000020,
  66. VIDC_STAT = 0x00000040,
  67. VIDC_ENCODER = 0x00000100,
  68. VIDC_DECODER = 0x00000200,
  69. VIDC_PRINTK = 0x10000000,
  70. VIDC_FTRACE = 0x20000000,
  71. };
  72. enum vidc_msg_prio_fw {
  73. FW_LOW = 0x00000001,
  74. FW_MED = 0x00000002,
  75. FW_HIGH = 0x00000004,
  76. FW_ERROR = 0x00000008,
  77. FW_FATAL = 0x00000010,
  78. FW_PERF = 0x00000020,
  79. FW_CACHE_LOW = 0x00000100,
  80. FW_CACHE_MED = 0x00000200,
  81. FW_CACHE_HIGH = 0x00000400,
  82. FW_CACHE_ERROR = 0x00000800,
  83. FW_CACHE_FATAL = 0x00001000,
  84. FW_CACHE_PERF = 0x00002000,
  85. FW_PRINTK = 0x10000000,
  86. FW_FTRACE = 0x20000000,
  87. };
  88. #define DRV_LOG (VIDC_ERR | VIDC_PRINTK)
  89. #define DRV_LOGSHIFT (0)
  90. #define DRV_LOGMASK (0x0FFFFFFF)
  91. #define FW_LOG (FW_ERROR | FW_FATAL | FW_PRINTK)
  92. #define FW_LOGSHIFT (0)
  93. #define FW_LOGMASK (0x0FFFFFFF)
  94. #define dprintk_inst(__level, __level_str, inst, __fmt, ...) \
  95. do { \
  96. if (inst && (msm_vidc_debug & (__level))) { \
  97. pr_info(VIDC_DBG_TAG_INST __fmt, \
  98. __level_str, \
  99. inst->debug_str, \
  100. ##__VA_ARGS__); \
  101. } \
  102. } while (0)
  103. #define i_vpr_e(inst, __fmt, ...) dprintk_inst(VIDC_ERR, "err ", inst, __fmt, ##__VA_ARGS__)
  104. #define i_vpr_i(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, "high", inst, __fmt, ##__VA_ARGS__)
  105. #define i_vpr_h(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, "high", inst, __fmt, ##__VA_ARGS__)
  106. #define i_vpr_l(inst, __fmt, ...) dprintk_inst(VIDC_LOW, "low ", inst, __fmt, ##__VA_ARGS__)
  107. #define i_vpr_p(inst, __fmt, ...) dprintk_inst(VIDC_PERF, "perf", inst, __fmt, ##__VA_ARGS__)
  108. #define i_vpr_t(inst, __fmt, ...) dprintk_inst(VIDC_PKT, "pkt ", inst, __fmt, ##__VA_ARGS__)
  109. #define i_vpr_b(inst, __fmt, ...) dprintk_inst(VIDC_BUS, "bus ", inst, __fmt, ##__VA_ARGS__)
  110. #define i_vpr_s(inst, __fmt, ...) dprintk_inst(VIDC_STAT, "stat", inst, __fmt, ##__VA_ARGS__)
  111. #define i_vpr_hp(inst, __fmt, ...) \
  112. dprintk_inst(VIDC_HIGH | VIDC_PERF, "high", inst, __fmt, ##__VA_ARGS__)
  113. #define i_vpr_hs(inst, __fmt, ...) \
  114. dprintk_inst(VIDC_HIGH | VIDC_STAT, "stat", inst, __fmt, ##__VA_ARGS__)
  115. #define dprintk_core(__level, __level_str, __fmt, ...) \
  116. do { \
  117. if (msm_vidc_debug & (__level)) { \
  118. pr_info(VIDC_DBG_TAG_CORE __fmt, \
  119. __level_str, \
  120. DEFAULT_SID, \
  121. "codec", \
  122. ##__VA_ARGS__); \
  123. } \
  124. } while (0)
  125. #define d_vpr_e(__fmt, ...) dprintk_core(VIDC_ERR, "err ", __fmt, ##__VA_ARGS__)
  126. #define d_vpr_h(__fmt, ...) dprintk_core(VIDC_HIGH, "high", __fmt, ##__VA_ARGS__)
  127. #define d_vpr_l(__fmt, ...) dprintk_core(VIDC_LOW, "low ", __fmt, ##__VA_ARGS__)
  128. #define d_vpr_p(__fmt, ...) dprintk_core(VIDC_PERF, "perf", __fmt, ##__VA_ARGS__)
  129. #define d_vpr_t(__fmt, ...) dprintk_core(VIDC_PKT, "pkt ", __fmt, ##__VA_ARGS__)
  130. #define d_vpr_b(__fmt, ...) dprintk_core(VIDC_BUS, "bus ", __fmt, ##__VA_ARGS__)
  131. #define d_vpr_s(__fmt, ...) dprintk_core(VIDC_STAT, "stat", __fmt, ##__VA_ARGS__)
  132. #define d_vpr_hs(__fmt, ...) \
  133. dprintk_core(VIDC_HIGH | VIDC_STAT, "high", __fmt, ##__VA_ARGS__)
  134. #define dprintk_ratelimit(__level, __level_str, __fmt, ...) \
  135. do { \
  136. if (msm_vidc_check_ratelimit()) { \
  137. dprintk_core(__level, __level_str, __fmt, ##__VA_ARGS__); \
  138. } \
  139. } while (0)
  140. #define dprintk_firmware(__level, __fmt, ...) \
  141. do { \
  142. if ((msm_fw_debug & (__level)) & FW_PRINTK) { \
  143. pr_info(FW_DBG_TAG __fmt, \
  144. "fw", \
  145. ##__VA_ARGS__); \
  146. } \
  147. } while (0)
  148. #define MSM_VIDC_FATAL(value) \
  149. do { \
  150. if (value) { \
  151. d_vpr_e("bug on\n"); \
  152. BUG_ON(value); \
  153. } \
  154. } while (0)
  155. enum msm_vidc_debugfs_event {
  156. MSM_VIDC_DEBUGFS_EVENT_ETB,
  157. MSM_VIDC_DEBUGFS_EVENT_EBD,
  158. MSM_VIDC_DEBUGFS_EVENT_FTB,
  159. MSM_VIDC_DEBUGFS_EVENT_FBD,
  160. };
  161. enum msm_vidc_bug_on_error {
  162. MSM_VIDC_BUG_ON_FATAL = BIT(0),
  163. MSM_VIDC_BUG_ON_NOC = BIT(1),
  164. MSM_VIDC_BUG_ON_WD_TIMEOUT = BIT(2),
  165. };
  166. struct dentry *msm_vidc_debugfs_init_drv(void);
  167. struct dentry *msm_vidc_debugfs_init_core(struct msm_vidc_core *core);
  168. struct dentry *msm_vidc_debugfs_init_inst(struct msm_vidc_inst *inst,
  169. struct dentry *parent);
  170. void msm_vidc_debugfs_deinit_inst(struct msm_vidc_inst *inst);
  171. void msm_vidc_debugfs_update(struct msm_vidc_inst *inst,
  172. enum msm_vidc_debugfs_event e);
  173. int msm_vidc_check_ratelimit(void);
  174. void msm_vidc_show_stats(struct msm_vidc_inst *inst);
  175. static inline bool is_stats_enabled(void)
  176. {
  177. return !!(msm_vidc_debug & VIDC_STAT);
  178. }
  179. #endif