aqt1000-mbhc.c 30 KB

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  1. /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/device.h>
  16. #include <linux/printk.h>
  17. #include <linux/ratelimit.h>
  18. #include <linux/kernel.h>
  19. #include <linux/gpio.h>
  20. #include <linux/delay.h>
  21. #include <linux/regmap.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "aqt1000.h"
  27. #include "aqt1000-api.h"
  28. #include "aqt1000-mbhc.h"
  29. #include "aqt1000-registers.h"
  30. #include "aqt1000-irq.h"
  31. #include "pdata.h"
  32. #include "../wcdcal-hwdep.h"
  33. #include "../wcd-mbhc-v2-api.h"
  34. #define AQT_ZDET_SUPPORTED true
  35. /* Z value defined in milliohm */
  36. #define AQT_ZDET_VAL_32 32000
  37. #define AQT_ZDET_VAL_400 400000
  38. #define AQT_ZDET_VAL_1200 1200000
  39. #define AQT_ZDET_VAL_100K 100000000
  40. /* Z floating defined in ohms */
  41. #define AQT_ZDET_FLOATING_IMPEDANCE 0x0FFFFFFE
  42. #define AQT_ZDET_NUM_MEASUREMENTS 900
  43. #define AQT_MBHC_GET_C1(c) ((c & 0xC000) >> 14)
  44. #define AQT_MBHC_GET_X1(x) (x & 0x3FFF)
  45. /* Z value compared in milliOhm */
  46. #define AQT_MBHC_IS_SECOND_RAMP_REQUIRED(z) ((z > 400000) || (z < 32000))
  47. #define AQT_MBHC_ZDET_CONST (86 * 16384)
  48. #define AQT_MBHC_MOISTURE_RREF R_24_KOHM
  49. static struct wcd_mbhc_register
  50. wcd_mbhc_registers[WCD_MBHC_REG_FUNC_MAX] = {
  51. WCD_MBHC_REGISTER("WCD_MBHC_L_DET_EN",
  52. AQT1000_ANA_MBHC_MECH, 0x80, 7, 0),
  53. WCD_MBHC_REGISTER("WCD_MBHC_GND_DET_EN",
  54. AQT1000_ANA_MBHC_MECH, 0x40, 6, 0),
  55. WCD_MBHC_REGISTER("WCD_MBHC_MECH_DETECTION_TYPE",
  56. AQT1000_ANA_MBHC_MECH, 0x20, 5, 0),
  57. WCD_MBHC_REGISTER("WCD_MBHC_MIC_CLAMP_CTL",
  58. AQT1000_MBHC_NEW_PLUG_DETECT_CTL, 0x30, 4, 0),
  59. WCD_MBHC_REGISTER("WCD_MBHC_ELECT_DETECTION_TYPE",
  60. AQT1000_ANA_MBHC_ELECT, 0x08, 3, 0),
  61. WCD_MBHC_REGISTER("WCD_MBHC_HS_L_DET_PULL_UP_CTRL",
  62. AQT1000_MBHC_NEW_INT_MECH_DET_CURRENT, 0x1F, 0, 0),
  63. WCD_MBHC_REGISTER("WCD_MBHC_HS_L_DET_PULL_UP_COMP_CTRL",
  64. AQT1000_ANA_MBHC_MECH, 0x04, 2, 0),
  65. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_PLUG_TYPE",
  66. AQT1000_ANA_MBHC_MECH, 0x10, 4, 0),
  67. WCD_MBHC_REGISTER("WCD_MBHC_GND_PLUG_TYPE",
  68. AQT1000_ANA_MBHC_MECH, 0x08, 3, 0),
  69. WCD_MBHC_REGISTER("WCD_MBHC_SW_HPH_LP_100K_TO_GND",
  70. AQT1000_ANA_MBHC_MECH, 0x01, 0, 0),
  71. WCD_MBHC_REGISTER("WCD_MBHC_ELECT_SCHMT_ISRC",
  72. AQT1000_ANA_MBHC_ELECT, 0x06, 1, 0),
  73. WCD_MBHC_REGISTER("WCD_MBHC_FSM_EN",
  74. AQT1000_ANA_MBHC_ELECT, 0x80, 7, 0),
  75. WCD_MBHC_REGISTER("WCD_MBHC_INSREM_DBNC",
  76. AQT1000_MBHC_NEW_PLUG_DETECT_CTL, 0x0F, 0, 0),
  77. WCD_MBHC_REGISTER("WCD_MBHC_BTN_DBNC",
  78. AQT1000_MBHC_NEW_CTL_1, 0x03, 0, 0),
  79. WCD_MBHC_REGISTER("WCD_MBHC_HS_VREF",
  80. AQT1000_MBHC_NEW_CTL_2, 0x03, 0, 0),
  81. WCD_MBHC_REGISTER("WCD_MBHC_HS_COMP_RESULT",
  82. AQT1000_ANA_MBHC_RESULT_3, 0x08, 3, 0),
  83. WCD_MBHC_REGISTER("WCD_MBHC_MIC_SCHMT_RESULT",
  84. AQT1000_ANA_MBHC_RESULT_3, 0x20, 5, 0),
  85. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_SCHMT_RESULT",
  86. AQT1000_ANA_MBHC_RESULT_3, 0x80, 7, 0),
  87. WCD_MBHC_REGISTER("WCD_MBHC_HPHR_SCHMT_RESULT",
  88. AQT1000_ANA_MBHC_RESULT_3, 0x40, 6, 0),
  89. WCD_MBHC_REGISTER("WCD_MBHC_OCP_FSM_EN",
  90. AQT1000_HPH_OCP_CTL, 0x10, 4, 0),
  91. WCD_MBHC_REGISTER("WCD_MBHC_BTN_RESULT",
  92. AQT1000_ANA_MBHC_RESULT_3, 0x07, 0, 0),
  93. WCD_MBHC_REGISTER("WCD_MBHC_BTN_ISRC_CTL",
  94. AQT1000_ANA_MBHC_ELECT, 0x70, 4, 0),
  95. WCD_MBHC_REGISTER("WCD_MBHC_ELECT_RESULT",
  96. AQT1000_ANA_MBHC_RESULT_3, 0xFF, 0, 0),
  97. WCD_MBHC_REGISTER("WCD_MBHC_MICB_CTRL",
  98. AQT1000_ANA_MICB1, 0xC0, 6, 0),
  99. WCD_MBHC_REGISTER("WCD_MBHC_HPH_CNP_WG_TIME",
  100. AQT1000_HPH_CNP_WG_TIME, 0xFF, 0, 0),
  101. WCD_MBHC_REGISTER("WCD_MBHC_HPHR_PA_EN",
  102. AQT1000_ANA_HPH, 0x40, 6, 0),
  103. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_PA_EN",
  104. AQT1000_ANA_HPH, 0x80, 7, 0),
  105. WCD_MBHC_REGISTER("WCD_MBHC_HPH_PA_EN",
  106. AQT1000_ANA_HPH, 0xC0, 6, 0),
  107. WCD_MBHC_REGISTER("WCD_MBHC_SWCH_LEVEL_REMOVE",
  108. AQT1000_ANA_MBHC_RESULT_3, 0x10, 4, 0),
  109. WCD_MBHC_REGISTER("WCD_MBHC_PULLDOWN_CTRL",
  110. 0, 0, 0, 0),
  111. WCD_MBHC_REGISTER("WCD_MBHC_ANC_DET_EN",
  112. AQT1000_MBHC_CTL_BCS, 0x02, 1, 0),
  113. WCD_MBHC_REGISTER("WCD_MBHC_FSM_STATUS",
  114. AQT1000_MBHC_NEW_FSM_STATUS, 0x01, 0, 0),
  115. WCD_MBHC_REGISTER("WCD_MBHC_MUX_CTL",
  116. AQT1000_MBHC_NEW_CTL_2, 0x70, 4, 0),
  117. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_OCP_DET_EN",
  118. AQT1000_HPH_L_TEST, 0x01, 0, 0),
  119. WCD_MBHC_REGISTER("WCD_MBHC_HPHR_OCP_DET_EN",
  120. AQT1000_HPH_R_TEST, 0x01, 0, 0),
  121. WCD_MBHC_REGISTER("WCD_MBHC_HPHL_OCP_STATUS",
  122. AQT1000_INTR_CTRL_INT_STATUS_2, 0x20, 5, 0),
  123. WCD_MBHC_REGISTER("WCD_MBHC_HPHR_OCP_STATUS",
  124. AQT1000_INTR_CTRL_INT_STATUS_2, 0x40, 6, 0),
  125. WCD_MBHC_REGISTER("WCD_MBHC_ADC_EN",
  126. AQT1000_MBHC_NEW_CTL_1, 0x08, 3, 0),
  127. WCD_MBHC_REGISTER("WCD_MBHC_ADC_COMPLETE", AQT1000_MBHC_NEW_FSM_STATUS,
  128. 0x40, 6, 0),
  129. WCD_MBHC_REGISTER("WCD_MBHC_ADC_TIMEOUT", AQT1000_MBHC_NEW_FSM_STATUS,
  130. 0x80, 7, 0),
  131. WCD_MBHC_REGISTER("WCD_MBHC_ADC_RESULT", AQT1000_MBHC_NEW_ADC_RESULT,
  132. 0xFF, 0, 0),
  133. WCD_MBHC_REGISTER("WCD_MBHC_MICB2_VOUT", AQT1000_ANA_MICB1, 0x3F, 0, 0),
  134. WCD_MBHC_REGISTER("WCD_MBHC_ADC_MODE",
  135. AQT1000_MBHC_NEW_CTL_1, 0x10, 4, 0),
  136. WCD_MBHC_REGISTER("WCD_MBHC_DETECTION_DONE",
  137. AQT1000_MBHC_NEW_CTL_1, 0x04, 2, 0),
  138. WCD_MBHC_REGISTER("WCD_MBHC_ELECT_ISRC_EN",
  139. AQT1000_ANA_MBHC_ZDET, 0x02, 1, 0),
  140. };
  141. static const struct wcd_mbhc_intr intr_ids = {
  142. .mbhc_sw_intr = AQT1000_IRQ_MBHC_SW_DET,
  143. .mbhc_btn_press_intr = AQT1000_IRQ_MBHC_BUTTON_PRESS_DET,
  144. .mbhc_btn_release_intr = AQT1000_IRQ_MBHC_BUTTON_RELEASE_DET,
  145. .mbhc_hs_ins_intr = AQT1000_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  146. .mbhc_hs_rem_intr = AQT1000_IRQ_MBHC_ELECT_INS_REM_DET,
  147. .hph_left_ocp = AQT1000_IRQ_HPH_PA_OCPL_FAULT,
  148. .hph_right_ocp = AQT1000_IRQ_HPH_PA_OCPR_FAULT,
  149. };
  150. struct aqt_mbhc_zdet_param {
  151. u16 ldo_ctl;
  152. u16 noff;
  153. u16 nshift;
  154. u16 btn5;
  155. u16 btn6;
  156. u16 btn7;
  157. };
  158. static int aqt_mbhc_request_irq(struct snd_soc_codec *codec,
  159. int irq, irq_handler_t handler,
  160. const char *name, void *data)
  161. {
  162. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  163. return aqt_request_irq(aqt, irq, name, handler, data);
  164. }
  165. static void aqt_mbhc_irq_control(struct snd_soc_codec *codec,
  166. int irq, bool enable)
  167. {
  168. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  169. if (enable)
  170. aqt_enable_irq(aqt, irq);
  171. else
  172. aqt_disable_irq(aqt, irq);
  173. }
  174. static int aqt_mbhc_free_irq(struct snd_soc_codec *codec,
  175. int irq, void *data)
  176. {
  177. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  178. aqt_free_irq(aqt, irq, data);
  179. return 0;
  180. }
  181. static void aqt_mbhc_clk_setup(struct snd_soc_codec *codec,
  182. bool enable)
  183. {
  184. if (enable)
  185. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_1,
  186. 0x80, 0x80);
  187. else
  188. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_1,
  189. 0x80, 0x00);
  190. }
  191. static int aqt_mbhc_btn_to_num(struct snd_soc_codec *codec)
  192. {
  193. return snd_soc_read(codec, AQT1000_ANA_MBHC_RESULT_3) & 0x7;
  194. }
  195. static void aqt_mbhc_mbhc_bias_control(struct snd_soc_codec *codec,
  196. bool enable)
  197. {
  198. if (enable)
  199. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_ELECT,
  200. 0x01, 0x01);
  201. else
  202. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_ELECT,
  203. 0x01, 0x00);
  204. }
  205. static void aqt_mbhc_program_btn_thr(struct snd_soc_codec *codec,
  206. s16 *btn_low, s16 *btn_high,
  207. int num_btn, bool is_micbias)
  208. {
  209. int i;
  210. int vth;
  211. if (num_btn > WCD_MBHC_DEF_BUTTONS) {
  212. dev_err(codec->dev, "%s: invalid number of buttons: %d\n",
  213. __func__, num_btn);
  214. return;
  215. }
  216. for (i = 0; i < num_btn; i++) {
  217. vth = ((btn_high[i] * 2) / 25) & 0x3F;
  218. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_BTN0 + i,
  219. 0xFC, vth << 2);
  220. dev_dbg(codec->dev, "%s: btn_high[%d]: %d, vth: %d\n",
  221. __func__, i, btn_high[i], vth);
  222. }
  223. }
  224. static bool aqt_mbhc_lock_sleep(struct wcd_mbhc *mbhc, bool lock)
  225. {
  226. struct snd_soc_codec *codec = mbhc->codec;
  227. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  228. bool ret = 0;
  229. dev_dbg(aqt->dev, "%s: lock: %d\n", __func__, lock);
  230. return ret;
  231. }
  232. static int aqt_mbhc_register_notifier(struct wcd_mbhc *mbhc,
  233. struct notifier_block *nblock,
  234. bool enable)
  235. {
  236. struct aqt1000_mbhc *aqt_mbhc;
  237. aqt_mbhc = container_of(mbhc, struct aqt1000_mbhc, wcd_mbhc);
  238. if (enable)
  239. return blocking_notifier_chain_register(&aqt_mbhc->notifier,
  240. nblock);
  241. else
  242. return blocking_notifier_chain_unregister(
  243. &aqt_mbhc->notifier, nblock);
  244. }
  245. static bool aqt_mbhc_micb_en_status(struct wcd_mbhc *mbhc, int micb_num)
  246. {
  247. u8 val;
  248. if (micb_num == MIC_BIAS_1) {
  249. val = ((snd_soc_read(mbhc->codec, AQT1000_ANA_MICB1) & 0xC0)
  250. >> 6);
  251. if (val == 0x01)
  252. return true;
  253. }
  254. return false;
  255. }
  256. static bool aqt_mbhc_hph_pa_on_status(struct snd_soc_codec *codec)
  257. {
  258. return (snd_soc_read(codec, AQT1000_ANA_HPH) & 0xC0) ? true : false;
  259. }
  260. static void aqt_mbhc_hph_l_pull_up_control(struct snd_soc_codec *codec,
  261. int pull_up_cur)
  262. {
  263. /* Default pull up current to 2uA */
  264. if (pull_up_cur > HS_PULLUP_I_OFF || pull_up_cur < HS_PULLUP_I_3P0_UA ||
  265. pull_up_cur == HS_PULLUP_I_DEFAULT)
  266. pull_up_cur = HS_PULLUP_I_2P0_UA;
  267. dev_dbg(codec->dev, "%s: HS pull up current:%d\n",
  268. __func__, pull_up_cur);
  269. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_INT_MECH_DET_CURRENT,
  270. 0x1F, pull_up_cur);
  271. }
  272. static int aqt_mbhc_request_micbias(struct snd_soc_codec *codec,
  273. int micb_num, int req)
  274. {
  275. int ret = 0;
  276. /*
  277. * If micbias is requested, make sure that there
  278. * is vote to enable mclk
  279. */
  280. if (req == MICB_ENABLE)
  281. aqt_cdc_mclk_enable(codec, true);
  282. ret = aqt_micbias_control(codec, micb_num, req, false);
  283. /*
  284. * Release vote for mclk while requesting for
  285. * micbias disable
  286. */
  287. if (req == MICB_DISABLE)
  288. aqt_cdc_mclk_enable(codec, false);
  289. return ret;
  290. }
  291. static void aqt_mbhc_micb_ramp_control(struct snd_soc_codec *codec,
  292. bool enable)
  293. {
  294. if (enable) {
  295. snd_soc_update_bits(codec, AQT1000_ANA_MICB1_RAMP,
  296. 0x1C, 0x0C);
  297. snd_soc_update_bits(codec, AQT1000_ANA_MICB1_RAMP,
  298. 0x80, 0x80);
  299. } else {
  300. snd_soc_update_bits(codec, AQT1000_ANA_MICB1_RAMP,
  301. 0x80, 0x00);
  302. snd_soc_update_bits(codec, AQT1000_ANA_MICB1_RAMP,
  303. 0x1C, 0x00);
  304. }
  305. }
  306. static struct firmware_cal *aqt_get_hwdep_fw_cal(struct wcd_mbhc *mbhc,
  307. enum wcd_cal_type type)
  308. {
  309. struct aqt1000_mbhc *aqt_mbhc;
  310. struct firmware_cal *hwdep_cal;
  311. struct snd_soc_codec *codec = mbhc->codec;
  312. aqt_mbhc = container_of(mbhc, struct aqt1000_mbhc, wcd_mbhc);
  313. if (!codec) {
  314. pr_err("%s: NULL codec pointer\n", __func__);
  315. return NULL;
  316. }
  317. hwdep_cal = wcdcal_get_fw_cal(aqt_mbhc->fw_data, type);
  318. if (!hwdep_cal)
  319. dev_err(codec->dev, "%s: cal not sent by %d\n",
  320. __func__, type);
  321. return hwdep_cal;
  322. }
  323. static int aqt_mbhc_micb_ctrl_threshold_mic(struct snd_soc_codec *codec,
  324. int micb_num, bool req_en)
  325. {
  326. struct aqt1000_pdata *pdata = dev_get_platdata(codec->dev);
  327. int rc, micb_mv;
  328. if (micb_num != MIC_BIAS_1)
  329. return -EINVAL;
  330. /*
  331. * If device tree micbias level is already above the minimum
  332. * voltage needed to detect threshold microphone, then do
  333. * not change the micbias, just return.
  334. */
  335. if (pdata->micbias.micb1_mv >= WCD_MBHC_THR_HS_MICB_MV)
  336. return 0;
  337. micb_mv = req_en ? WCD_MBHC_THR_HS_MICB_MV : pdata->micbias.micb1_mv;
  338. rc = aqt_mbhc_micb_adjust_voltage(codec, micb_mv, MIC_BIAS_1);
  339. return rc;
  340. }
  341. static inline void aqt_mbhc_get_result_params(struct aqt1000 *aqt,
  342. s16 *d1_a, u16 noff,
  343. int32_t *zdet)
  344. {
  345. int i;
  346. int val, val1;
  347. s16 c1;
  348. s32 x1, d1;
  349. int32_t denom;
  350. int minCode_param[] = {
  351. 3277, 1639, 820, 410, 205, 103, 52, 26
  352. };
  353. regmap_update_bits(aqt->regmap, AQT1000_ANA_MBHC_ZDET, 0x20, 0x20);
  354. for (i = 0; i < AQT_ZDET_NUM_MEASUREMENTS; i++) {
  355. regmap_read(aqt->regmap, AQT1000_ANA_MBHC_RESULT_2, &val);
  356. if (val & 0x80)
  357. break;
  358. }
  359. val = val << 0x8;
  360. regmap_read(aqt->regmap, AQT1000_ANA_MBHC_RESULT_1, &val1);
  361. val |= val1;
  362. regmap_update_bits(aqt->regmap, AQT1000_ANA_MBHC_ZDET, 0x20, 0x00);
  363. x1 = AQT_MBHC_GET_X1(val);
  364. c1 = AQT_MBHC_GET_C1(val);
  365. /* If ramp is not complete, give additional 5ms */
  366. if ((c1 < 2) && x1)
  367. usleep_range(5000, 5050);
  368. if (!c1 || !x1) {
  369. dev_dbg(aqt->dev,
  370. "%s: Impedance detect ramp error, c1=%d, x1=0x%x\n",
  371. __func__, c1, x1);
  372. goto ramp_down;
  373. }
  374. d1 = d1_a[c1];
  375. denom = (x1 * d1) - (1 << (14 - noff));
  376. if (denom > 0)
  377. *zdet = (AQT_MBHC_ZDET_CONST * 1000) / denom;
  378. else if (x1 < minCode_param[noff])
  379. *zdet = AQT_ZDET_FLOATING_IMPEDANCE;
  380. dev_dbg(aqt->dev, "%s: d1=%d, c1=%d, x1=0x%x, z_val=%d(milliOhm)\n",
  381. __func__, d1, c1, x1, *zdet);
  382. ramp_down:
  383. i = 0;
  384. while (x1) {
  385. regmap_bulk_read(aqt->regmap,
  386. AQT1000_ANA_MBHC_RESULT_1, (u8 *)&val, 2);
  387. x1 = AQT_MBHC_GET_X1(val);
  388. i++;
  389. if (i == AQT_ZDET_NUM_MEASUREMENTS)
  390. break;
  391. }
  392. }
  393. static void aqt_mbhc_zdet_ramp(struct snd_soc_codec *codec,
  394. struct aqt_mbhc_zdet_param *zdet_param,
  395. int32_t *zl, int32_t *zr, s16 *d1_a)
  396. {
  397. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  398. int32_t zdet = 0;
  399. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_ZDET_ANA_CTL, 0x70,
  400. zdet_param->ldo_ctl << 4);
  401. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_BTN5, 0xFC,
  402. zdet_param->btn5);
  403. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_BTN6, 0xFC,
  404. zdet_param->btn6);
  405. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_BTN7, 0xFC,
  406. zdet_param->btn7);
  407. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_ZDET_ANA_CTL, 0x0F,
  408. zdet_param->noff);
  409. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_ZDET_RAMP_CTL, 0x0F,
  410. zdet_param->nshift);
  411. if (!zl)
  412. goto z_right;
  413. /* Start impedance measurement for HPH_L */
  414. regmap_update_bits(aqt->regmap,
  415. AQT1000_ANA_MBHC_ZDET, 0x80, 0x80);
  416. dev_dbg(aqt->dev, "%s: ramp for HPH_L, noff = %d\n",
  417. __func__, zdet_param->noff);
  418. aqt_mbhc_get_result_params(aqt, d1_a, zdet_param->noff, &zdet);
  419. regmap_update_bits(aqt->regmap,
  420. AQT1000_ANA_MBHC_ZDET, 0x80, 0x00);
  421. *zl = zdet;
  422. z_right:
  423. if (!zr)
  424. return;
  425. /* Start impedance measurement for HPH_R */
  426. regmap_update_bits(aqt->regmap,
  427. AQT1000_ANA_MBHC_ZDET, 0x40, 0x40);
  428. dev_dbg(aqt->dev, "%s: ramp for HPH_R, noff = %d\n",
  429. __func__, zdet_param->noff);
  430. aqt_mbhc_get_result_params(aqt, d1_a, zdet_param->noff, &zdet);
  431. regmap_update_bits(aqt->regmap,
  432. AQT1000_ANA_MBHC_ZDET, 0x40, 0x00);
  433. *zr = zdet;
  434. }
  435. static inline void aqt_wcd_mbhc_qfuse_cal(struct snd_soc_codec *codec,
  436. int32_t *z_val, int flag_l_r)
  437. {
  438. s16 q1;
  439. int q1_cal;
  440. if (*z_val < (AQT_ZDET_VAL_400/1000))
  441. q1 = snd_soc_read(codec,
  442. AQT1000_CHIP_CFG0_EFUSE_VAL_OUT1 + (2 * flag_l_r));
  443. else
  444. q1 = snd_soc_read(codec,
  445. AQT1000_CHIP_CFG0_EFUSE_VAL_OUT2 + (2 * flag_l_r));
  446. if (q1 & 0x80)
  447. q1_cal = (10000 - ((q1 & 0x7F) * 25));
  448. else
  449. q1_cal = (10000 + (q1 * 25));
  450. if (q1_cal > 0)
  451. *z_val = ((*z_val) * 10000) / q1_cal;
  452. }
  453. static void aqt_wcd_mbhc_calc_impedance(struct wcd_mbhc *mbhc, uint32_t *zl,
  454. uint32_t *zr)
  455. {
  456. struct snd_soc_codec *codec = mbhc->codec;
  457. struct aqt1000 *aqt = dev_get_drvdata(codec->dev);
  458. s16 reg0, reg1, reg2, reg3, reg4;
  459. int32_t z1L, z1R, z1Ls;
  460. int zMono, z_diff1, z_diff2;
  461. bool is_fsm_disable = false;
  462. struct aqt_mbhc_zdet_param zdet_param[] = {
  463. {4, 0, 4, 0x08, 0x14, 0x18}, /* < 32ohm */
  464. {2, 0, 3, 0x18, 0x7C, 0x90}, /* 32ohm < Z < 400ohm */
  465. {1, 4, 5, 0x18, 0x7C, 0x90}, /* 400ohm < Z < 1200ohm */
  466. {1, 6, 7, 0x18, 0x7C, 0x90}, /* >1200ohm */
  467. };
  468. struct aqt_mbhc_zdet_param *zdet_param_ptr = NULL;
  469. s16 d1_a[][4] = {
  470. {0, 30, 90, 30},
  471. {0, 30, 30, 5},
  472. {0, 30, 30, 5},
  473. {0, 30, 30, 5},
  474. };
  475. s16 *d1 = NULL;
  476. WCD_MBHC_RSC_ASSERT_LOCKED(mbhc);
  477. reg0 = snd_soc_read(codec, AQT1000_ANA_MBHC_BTN5);
  478. reg1 = snd_soc_read(codec, AQT1000_ANA_MBHC_BTN6);
  479. reg2 = snd_soc_read(codec, AQT1000_ANA_MBHC_BTN7);
  480. reg3 = snd_soc_read(codec, AQT1000_MBHC_CTL_CLK);
  481. reg4 = snd_soc_read(codec, AQT1000_MBHC_NEW_ZDET_ANA_CTL);
  482. if (snd_soc_read(codec, AQT1000_ANA_MBHC_ELECT) & 0x80) {
  483. is_fsm_disable = true;
  484. regmap_update_bits(aqt->regmap,
  485. AQT1000_ANA_MBHC_ELECT, 0x80, 0x00);
  486. }
  487. /* For NO-jack, disable L_DET_EN before Z-det measurements */
  488. if (mbhc->hphl_swh)
  489. regmap_update_bits(aqt->regmap,
  490. AQT1000_ANA_MBHC_MECH, 0x80, 0x00);
  491. /* Turn off 100k pull down on HPHL */
  492. regmap_update_bits(aqt->regmap,
  493. AQT1000_ANA_MBHC_MECH, 0x01, 0x00);
  494. /* First get impedance on Left */
  495. d1 = d1_a[1];
  496. zdet_param_ptr = &zdet_param[1];
  497. aqt_mbhc_zdet_ramp(codec, zdet_param_ptr, &z1L, NULL, d1);
  498. if (!AQT_MBHC_IS_SECOND_RAMP_REQUIRED(z1L))
  499. goto left_ch_impedance;
  500. /* Second ramp for left ch */
  501. if (z1L < AQT_ZDET_VAL_32) {
  502. zdet_param_ptr = &zdet_param[0];
  503. d1 = d1_a[0];
  504. } else if ((z1L > AQT_ZDET_VAL_400) && (z1L <= AQT_ZDET_VAL_1200)) {
  505. zdet_param_ptr = &zdet_param[2];
  506. d1 = d1_a[2];
  507. } else if (z1L > AQT_ZDET_VAL_1200) {
  508. zdet_param_ptr = &zdet_param[3];
  509. d1 = d1_a[3];
  510. }
  511. aqt_mbhc_zdet_ramp(codec, zdet_param_ptr, &z1L, NULL, d1);
  512. left_ch_impedance:
  513. if ((z1L == AQT_ZDET_FLOATING_IMPEDANCE) ||
  514. (z1L > AQT_ZDET_VAL_100K)) {
  515. *zl = AQT_ZDET_FLOATING_IMPEDANCE;
  516. zdet_param_ptr = &zdet_param[1];
  517. d1 = d1_a[1];
  518. } else {
  519. *zl = z1L/1000;
  520. aqt_wcd_mbhc_qfuse_cal(codec, zl, 0);
  521. }
  522. dev_dbg(codec->dev, "%s: impedance on HPH_L = %d(ohms)\n",
  523. __func__, *zl);
  524. /* Start of right impedance ramp and calculation */
  525. aqt_mbhc_zdet_ramp(codec, zdet_param_ptr, NULL, &z1R, d1);
  526. if (AQT_MBHC_IS_SECOND_RAMP_REQUIRED(z1R)) {
  527. if (((z1R > AQT_ZDET_VAL_1200) &&
  528. (zdet_param_ptr->noff == 0x6)) ||
  529. ((*zl) != AQT_ZDET_FLOATING_IMPEDANCE))
  530. goto right_ch_impedance;
  531. /* Second ramp for right ch */
  532. if (z1R < AQT_ZDET_VAL_32) {
  533. zdet_param_ptr = &zdet_param[0];
  534. d1 = d1_a[0];
  535. } else if ((z1R > AQT_ZDET_VAL_400) &&
  536. (z1R <= AQT_ZDET_VAL_1200)) {
  537. zdet_param_ptr = &zdet_param[2];
  538. d1 = d1_a[2];
  539. } else if (z1R > AQT_ZDET_VAL_1200) {
  540. zdet_param_ptr = &zdet_param[3];
  541. d1 = d1_a[3];
  542. }
  543. aqt_mbhc_zdet_ramp(codec, zdet_param_ptr, NULL, &z1R, d1);
  544. }
  545. right_ch_impedance:
  546. if ((z1R == AQT_ZDET_FLOATING_IMPEDANCE) ||
  547. (z1R > AQT_ZDET_VAL_100K)) {
  548. *zr = AQT_ZDET_FLOATING_IMPEDANCE;
  549. } else {
  550. *zr = z1R/1000;
  551. aqt_wcd_mbhc_qfuse_cal(codec, zr, 1);
  552. }
  553. dev_dbg(codec->dev, "%s: impedance on HPH_R = %d(ohms)\n",
  554. __func__, *zr);
  555. /* Mono/stereo detection */
  556. if ((*zl == AQT_ZDET_FLOATING_IMPEDANCE) &&
  557. (*zr == AQT_ZDET_FLOATING_IMPEDANCE)) {
  558. dev_dbg(codec->dev,
  559. "%s: plug type is invalid or extension cable\n",
  560. __func__);
  561. goto zdet_complete;
  562. }
  563. if ((*zl == AQT_ZDET_FLOATING_IMPEDANCE) ||
  564. (*zr == AQT_ZDET_FLOATING_IMPEDANCE) ||
  565. ((*zl < WCD_MONO_HS_MIN_THR) && (*zr > WCD_MONO_HS_MIN_THR)) ||
  566. ((*zl > WCD_MONO_HS_MIN_THR) && (*zr < WCD_MONO_HS_MIN_THR))) {
  567. dev_dbg(codec->dev,
  568. "%s: Mono plug type with one ch floating or shorted to GND\n",
  569. __func__);
  570. mbhc->hph_type = WCD_MBHC_HPH_MONO;
  571. goto zdet_complete;
  572. }
  573. snd_soc_update_bits(codec, AQT1000_HPH_R_ATEST, 0x02, 0x02);
  574. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2, 0x40, 0x01);
  575. if (*zl < (AQT_ZDET_VAL_32/1000))
  576. aqt_mbhc_zdet_ramp(codec, &zdet_param[0], &z1Ls, NULL, d1);
  577. else
  578. aqt_mbhc_zdet_ramp(codec, &zdet_param[1], &z1Ls, NULL, d1);
  579. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2, 0x40, 0x00);
  580. snd_soc_update_bits(codec, AQT1000_HPH_R_ATEST, 0x02, 0x00);
  581. z1Ls /= 1000;
  582. aqt_wcd_mbhc_qfuse_cal(codec, &z1Ls, 0);
  583. /* Parallel of left Z and 9 ohm pull down resistor */
  584. zMono = ((*zl) * 9) / ((*zl) + 9);
  585. z_diff1 = (z1Ls > zMono) ? (z1Ls - zMono) : (zMono - z1Ls);
  586. z_diff2 = ((*zl) > z1Ls) ? ((*zl) - z1Ls) : (z1Ls - (*zl));
  587. if ((z_diff1 * (*zl + z1Ls)) > (z_diff2 * (z1Ls + zMono))) {
  588. dev_dbg(codec->dev, "%s: stereo plug type detected\n",
  589. __func__);
  590. mbhc->hph_type = WCD_MBHC_HPH_STEREO;
  591. } else {
  592. dev_dbg(codec->dev, "%s: MONO plug type detected\n",
  593. __func__);
  594. mbhc->hph_type = WCD_MBHC_HPH_MONO;
  595. }
  596. zdet_complete:
  597. snd_soc_write(codec, AQT1000_ANA_MBHC_BTN5, reg0);
  598. snd_soc_write(codec, AQT1000_ANA_MBHC_BTN6, reg1);
  599. snd_soc_write(codec, AQT1000_ANA_MBHC_BTN7, reg2);
  600. /* Turn on 100k pull down on HPHL */
  601. regmap_update_bits(aqt->regmap,
  602. AQT1000_ANA_MBHC_MECH, 0x01, 0x01);
  603. /* For NO-jack, re-enable L_DET_EN after Z-det measurements */
  604. if (mbhc->hphl_swh)
  605. regmap_update_bits(aqt->regmap,
  606. AQT1000_ANA_MBHC_MECH, 0x80, 0x80);
  607. snd_soc_write(codec, AQT1000_MBHC_NEW_ZDET_ANA_CTL, reg4);
  608. snd_soc_write(codec, AQT1000_MBHC_CTL_CLK, reg3);
  609. if (is_fsm_disable)
  610. regmap_update_bits(aqt->regmap,
  611. AQT1000_ANA_MBHC_ELECT, 0x80, 0x80);
  612. }
  613. static void aqt_mbhc_gnd_det_ctrl(struct snd_soc_codec *codec, bool enable)
  614. {
  615. if (enable) {
  616. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_MECH,
  617. 0x02, 0x02);
  618. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_MECH,
  619. 0x40, 0x40);
  620. } else {
  621. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_MECH,
  622. 0x40, 0x00);
  623. snd_soc_update_bits(codec, AQT1000_ANA_MBHC_MECH,
  624. 0x02, 0x00);
  625. }
  626. }
  627. static void aqt_mbhc_hph_pull_down_ctrl(struct snd_soc_codec *codec,
  628. bool enable)
  629. {
  630. if (enable) {
  631. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2,
  632. 0x40, 0x40);
  633. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2,
  634. 0x10, 0x10);
  635. } else {
  636. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2,
  637. 0x40, 0x00);
  638. snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL2,
  639. 0x10, 0x00);
  640. }
  641. }
  642. static void aqt_mbhc_moisture_config(struct wcd_mbhc *mbhc)
  643. {
  644. struct snd_soc_codec *codec = mbhc->codec;
  645. if ((mbhc->moist_rref == R_OFF) ||
  646. (mbhc->mbhc_cfg->enable_usbc_analog)) {
  647. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_2,
  648. 0x0C, R_OFF << 2);
  649. return;
  650. }
  651. /* Do not enable moisture detection if jack type is NC */
  652. if (!mbhc->hphl_swh) {
  653. dev_dbg(codec->dev, "%s: disable moisture detection for NC\n",
  654. __func__);
  655. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_2,
  656. 0x0C, R_OFF << 2);
  657. return;
  658. }
  659. snd_soc_update_bits(codec, AQT1000_MBHC_NEW_CTL_2,
  660. 0x0C, mbhc->moist_rref << 2);
  661. }
  662. static void aqt_update_anc_state(struct snd_soc_codec *codec, bool enable,
  663. int anc_num)
  664. {
  665. if (enable)
  666. snd_soc_update_bits(codec, AQT1000_CDC_RX1_RX_PATH_CFG0 +
  667. (20 * anc_num), 0x10, 0x10);
  668. else
  669. snd_soc_update_bits(codec, AQT1000_CDC_RX1_RX_PATH_CFG0 +
  670. (20 * anc_num), 0x10, 0x00);
  671. }
  672. static bool aqt_is_anc_on(struct wcd_mbhc *mbhc)
  673. {
  674. bool anc_on = false;
  675. u16 ancl, ancr;
  676. ancl =
  677. (snd_soc_read(mbhc->codec, AQT1000_CDC_RX1_RX_PATH_CFG0)) & 0x10;
  678. ancr =
  679. (snd_soc_read(mbhc->codec, AQT1000_CDC_RX2_RX_PATH_CFG0)) & 0x10;
  680. anc_on = !!(ancl | ancr);
  681. return anc_on;
  682. }
  683. static const struct wcd_mbhc_cb mbhc_cb = {
  684. .request_irq = aqt_mbhc_request_irq,
  685. .irq_control = aqt_mbhc_irq_control,
  686. .free_irq = aqt_mbhc_free_irq,
  687. .clk_setup = aqt_mbhc_clk_setup,
  688. .map_btn_code_to_num = aqt_mbhc_btn_to_num,
  689. .mbhc_bias = aqt_mbhc_mbhc_bias_control,
  690. .set_btn_thr = aqt_mbhc_program_btn_thr,
  691. .lock_sleep = aqt_mbhc_lock_sleep,
  692. .register_notifier = aqt_mbhc_register_notifier,
  693. .micbias_enable_status = aqt_mbhc_micb_en_status,
  694. .hph_pa_on_status = aqt_mbhc_hph_pa_on_status,
  695. .hph_pull_up_control_v2 = aqt_mbhc_hph_l_pull_up_control,
  696. .mbhc_micbias_control = aqt_mbhc_request_micbias,
  697. .mbhc_micb_ramp_control = aqt_mbhc_micb_ramp_control,
  698. .get_hwdep_fw_cal = aqt_get_hwdep_fw_cal,
  699. .mbhc_micb_ctrl_thr_mic = aqt_mbhc_micb_ctrl_threshold_mic,
  700. .compute_impedance = aqt_wcd_mbhc_calc_impedance,
  701. .mbhc_gnd_det_ctrl = aqt_mbhc_gnd_det_ctrl,
  702. .hph_pull_down_ctrl = aqt_mbhc_hph_pull_down_ctrl,
  703. .mbhc_moisture_config = aqt_mbhc_moisture_config,
  704. .update_anc_state = aqt_update_anc_state,
  705. .is_anc_on = aqt_is_anc_on,
  706. };
  707. static int aqt_get_hph_type(struct snd_kcontrol *kcontrol,
  708. struct snd_ctl_elem_value *ucontrol)
  709. {
  710. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  711. struct aqt1000 *aqt = snd_soc_codec_get_drvdata(codec);
  712. struct aqt1000_mbhc *aqt_mbhc = aqt->mbhc;
  713. struct wcd_mbhc *mbhc;
  714. if (!aqt_mbhc) {
  715. dev_err(codec->dev, "%s: mbhc not initialized!\n", __func__);
  716. return -EINVAL;
  717. }
  718. mbhc = &aqt_mbhc->wcd_mbhc;
  719. ucontrol->value.integer.value[0] = (u32) mbhc->hph_type;
  720. dev_dbg(codec->dev, "%s: hph_type = %u\n", __func__, mbhc->hph_type);
  721. return 0;
  722. }
  723. static int aqt_hph_impedance_get(struct snd_kcontrol *kcontrol,
  724. struct snd_ctl_elem_value *ucontrol)
  725. {
  726. uint32_t zl, zr;
  727. bool hphr;
  728. struct soc_multi_mixer_control *mc;
  729. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  730. struct aqt1000 *aqt = snd_soc_codec_get_drvdata(codec);
  731. struct aqt1000_mbhc *aqt_mbhc = aqt->mbhc;
  732. if (!aqt_mbhc) {
  733. dev_err(codec->dev, "%s: mbhc not initialized!\n", __func__);
  734. return -EINVAL;
  735. }
  736. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  737. hphr = mc->shift;
  738. wcd_mbhc_get_impedance(&aqt_mbhc->wcd_mbhc, &zl, &zr);
  739. dev_dbg(codec->dev, "%s: zl=%u(ohms), zr=%u(ohms)\n", __func__, zl, zr);
  740. ucontrol->value.integer.value[0] = hphr ? zr : zl;
  741. return 0;
  742. }
  743. static const struct snd_kcontrol_new hph_type_detect_controls[] = {
  744. SOC_SINGLE_EXT("HPH Type", 0, 0, UINT_MAX, 0,
  745. aqt_get_hph_type, NULL),
  746. };
  747. static const struct snd_kcontrol_new impedance_detect_controls[] = {
  748. SOC_SINGLE_EXT("HPHL Impedance", 0, 0, UINT_MAX, 0,
  749. aqt_hph_impedance_get, NULL),
  750. SOC_SINGLE_EXT("HPHR Impedance", 0, 1, UINT_MAX, 0,
  751. aqt_hph_impedance_get, NULL),
  752. };
  753. /*
  754. * aqt_mbhc_get_impedance: get impedance of headphone left and right channels
  755. * @aqt_mbhc: handle to struct aqt_mbhc *
  756. * @zl: handle to left-ch impedance
  757. * @zr: handle to right-ch impedance
  758. * return 0 for success or error code in case of failure
  759. */
  760. int aqt_mbhc_get_impedance(struct aqt1000_mbhc *aqt_mbhc,
  761. uint32_t *zl, uint32_t *zr)
  762. {
  763. if (!aqt_mbhc) {
  764. pr_err("%s: mbhc not initialized!\n", __func__);
  765. return -EINVAL;
  766. }
  767. if (!zl || !zr) {
  768. pr_err("%s: zl or zr null!\n", __func__);
  769. return -EINVAL;
  770. }
  771. return wcd_mbhc_get_impedance(&aqt_mbhc->wcd_mbhc, zl, zr);
  772. }
  773. EXPORT_SYMBOL(aqt_mbhc_get_impedance);
  774. /*
  775. * aqt_mbhc_hs_detect: starts mbhc insertion/removal functionality
  776. * @codec: handle to snd_soc_codec *
  777. * @mbhc_cfg: handle to mbhc configuration structure
  778. * return 0 if mbhc_start is success or error code in case of failure
  779. */
  780. int aqt_mbhc_hs_detect(struct snd_soc_codec *codec,
  781. struct wcd_mbhc_config *mbhc_cfg)
  782. {
  783. struct aqt1000 *aqt;
  784. struct aqt1000_mbhc *aqt_mbhc;
  785. if (!codec) {
  786. pr_err("%s: codec is NULL\n", __func__);
  787. return -EINVAL;
  788. }
  789. aqt = snd_soc_codec_get_drvdata(codec);
  790. if (!aqt) {
  791. pr_err("%s: aqt is NULL\n", __func__);
  792. return -EINVAL;
  793. }
  794. aqt_mbhc = aqt->mbhc;
  795. if (!aqt_mbhc) {
  796. dev_err(codec->dev, "%s: mbhc not initialized!\n", __func__);
  797. return -EINVAL;
  798. }
  799. return wcd_mbhc_start(&aqt_mbhc->wcd_mbhc, mbhc_cfg);
  800. }
  801. EXPORT_SYMBOL(aqt_mbhc_hs_detect);
  802. /*
  803. * aqt_mbhc_hs_detect_exit: stop mbhc insertion/removal functionality
  804. * @codec: handle to snd_soc_codec *
  805. */
  806. void aqt_mbhc_hs_detect_exit(struct snd_soc_codec *codec)
  807. {
  808. struct aqt1000 *aqt;
  809. struct aqt1000_mbhc *aqt_mbhc;
  810. if (!codec) {
  811. pr_err("%s: codec is NULL\n", __func__);
  812. return;
  813. }
  814. aqt = snd_soc_codec_get_drvdata(codec);
  815. if (!aqt) {
  816. pr_err("%s: aqt is NULL\n", __func__);
  817. return;
  818. }
  819. aqt_mbhc = aqt->mbhc;
  820. if (!aqt_mbhc) {
  821. dev_err(codec->dev, "%s: mbhc not initialized!\n", __func__);
  822. return;
  823. }
  824. wcd_mbhc_stop(&aqt_mbhc->wcd_mbhc);
  825. }
  826. EXPORT_SYMBOL(aqt_mbhc_hs_detect_exit);
  827. /*
  828. * aqt_mbhc_post_ssr_init: initialize mbhc for aqt post subsystem restart
  829. * @mbhc: poniter to aqt_mbhc structure
  830. * @codec: handle to snd_soc_codec *
  831. *
  832. * return 0 if mbhc_init is success or error code in case of failure
  833. */
  834. int aqt_mbhc_post_ssr_init(struct aqt1000_mbhc *mbhc,
  835. struct snd_soc_codec *codec)
  836. {
  837. int ret;
  838. struct wcd_mbhc *wcd_mbhc;
  839. if (!mbhc || !codec)
  840. return -EINVAL;
  841. wcd_mbhc = &mbhc->wcd_mbhc;
  842. if (wcd_mbhc == NULL) {
  843. pr_err("%s: wcd_mbhc is NULL\n", __func__);
  844. return -EINVAL;
  845. }
  846. wcd_mbhc_deinit(wcd_mbhc);
  847. ret = wcd_mbhc_init(wcd_mbhc, codec, &mbhc_cb, &intr_ids,
  848. wcd_mbhc_registers, AQT_ZDET_SUPPORTED);
  849. if (ret) {
  850. dev_err(codec->dev, "%s: mbhc initialization failed\n",
  851. __func__);
  852. goto done;
  853. }
  854. done:
  855. return ret;
  856. }
  857. EXPORT_SYMBOL(aqt_mbhc_post_ssr_init);
  858. /*
  859. * aqt_mbhc_init: initialize mbhc for aqt
  860. * @mbhc: poniter to aqt_mbhc struct pointer to store the configs
  861. * @codec: handle to snd_soc_codec *
  862. * @fw_data: handle to firmware data
  863. *
  864. * return 0 if mbhc_init is success or error code in case of failure
  865. */
  866. int aqt_mbhc_init(struct aqt1000_mbhc **mbhc, struct snd_soc_codec *codec,
  867. struct fw_info *fw_data)
  868. {
  869. struct aqt1000_mbhc *aqt_mbhc;
  870. struct wcd_mbhc *wcd_mbhc;
  871. int ret;
  872. if (!codec) {
  873. pr_err("%s: codec is NULL\n", __func__);
  874. return -EINVAL;
  875. }
  876. aqt_mbhc = devm_kzalloc(codec->dev, sizeof(struct aqt1000_mbhc),
  877. GFP_KERNEL);
  878. if (!aqt_mbhc)
  879. return -ENOMEM;
  880. aqt_mbhc->aqt = dev_get_drvdata(codec->dev);
  881. aqt_mbhc->fw_data = fw_data;
  882. BLOCKING_INIT_NOTIFIER_HEAD(&aqt_mbhc->notifier);
  883. wcd_mbhc = &aqt_mbhc->wcd_mbhc;
  884. if (wcd_mbhc == NULL) {
  885. pr_err("%s: wcd_mbhc is NULL\n", __func__);
  886. ret = -EINVAL;
  887. goto err;
  888. }
  889. /* Setting default mbhc detection logic to ADC */
  890. wcd_mbhc->mbhc_detection_logic = WCD_DETECTION_ADC;
  891. ret = wcd_mbhc_init(wcd_mbhc, codec, &mbhc_cb,
  892. &intr_ids, wcd_mbhc_registers,
  893. AQT_ZDET_SUPPORTED);
  894. if (ret) {
  895. dev_err(codec->dev, "%s: mbhc initialization failed\n",
  896. __func__);
  897. goto err;
  898. }
  899. (*mbhc) = aqt_mbhc;
  900. snd_soc_add_codec_controls(codec, impedance_detect_controls,
  901. ARRAY_SIZE(impedance_detect_controls));
  902. snd_soc_add_codec_controls(codec, hph_type_detect_controls,
  903. ARRAY_SIZE(hph_type_detect_controls));
  904. return 0;
  905. err:
  906. devm_kfree(codec->dev, aqt_mbhc);
  907. return ret;
  908. }
  909. EXPORT_SYMBOL(aqt_mbhc_init);
  910. /*
  911. * aqt_mbhc_deinit: deinitialize mbhc for aqt
  912. * @codec: handle to snd_soc_codec *
  913. */
  914. void aqt_mbhc_deinit(struct snd_soc_codec *codec)
  915. {
  916. struct aqt1000 *aqt;
  917. struct aqt1000_mbhc *aqt_mbhc;
  918. if (!codec) {
  919. pr_err("%s: codec is NULL\n", __func__);
  920. return;
  921. }
  922. aqt = snd_soc_codec_get_drvdata(codec);
  923. if (!aqt) {
  924. pr_err("%s: aqt is NULL\n", __func__);
  925. return;
  926. }
  927. aqt_mbhc = aqt->mbhc;
  928. if (aqt_mbhc) {
  929. wcd_mbhc_deinit(&aqt_mbhc->wcd_mbhc);
  930. devm_kfree(codec->dev, aqt_mbhc);
  931. }
  932. }
  933. EXPORT_SYMBOL(aqt_mbhc_deinit);