sm6150.c 238 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733573457355736573757385739574057415742574357445745574657475748574957505751575257535754575557565757575857595760576157625763576457655766576757685769577057715772577357745775577657775778577957805781578257835784578557865787578857895790579157925793579457955796579757985799580058015802580358045805580658075808580958105811581258135814581558165817581858195820582158225823582458255826582758285829583058315832583358345835583658375838583958405841584258435844584558465847584858495850585158525853585458555856585758585859586058615862586358645865586658675868586958705871587258735874587558765877587858795880588158825883588458855886588758885889589058915892589358945895589658975898589959005901590259035904590559065907590859095910591159125913591459155916591759185919592059215922592359245925592659275928592959305931593259335934593559365937593859395940594159425943594459455946594759485949595059515952595359545955595659575958595959605961596259635964596559665967596859695970597159725973597459755976597759785979598059815982598359845985598659875988598959905991599259935994599559965997599859996000600160026003600460056006600760086009601060116012601360146015601660176018601960206021602260236024602560266027602860296030603160326033603460356036603760386039604060416042604360446045604660476048604960506051605260536054605560566057605860596060606160626063606460656066606760686069607060716072607360746075607660776078607960806081608260836084608560866087608860896090609160926093609460956096609760986099610061016102610361046105610661076108610961106111611261136114611561166117611861196120612161226123612461256126612761286129613061316132613361346135613661376138613961406141614261436144614561466147614861496150615161526153615461556156615761586159616061616162616361646165616661676168616961706171617261736174617561766177617861796180618161826183618461856186618761886189619061916192619361946195619661976198619962006201620262036204620562066207620862096210621162126213621462156216621762186219622062216222622362246225622662276228622962306231623262336234623562366237623862396240624162426243624462456246624762486249625062516252625362546255625662576258625962606261626262636264626562666267626862696270627162726273627462756276627762786279628062816282628362846285628662876288628962906291629262936294629562966297629862996300630163026303630463056306630763086309631063116312631363146315631663176318631963206321632263236324632563266327632863296330633163326333633463356336633763386339634063416342634363446345634663476348634963506351635263536354635563566357635863596360636163626363636463656366636763686369637063716372637363746375637663776378637963806381638263836384638563866387638863896390639163926393639463956396639763986399640064016402640364046405640664076408640964106411641264136414641564166417641864196420642164226423642464256426642764286429643064316432643364346435643664376438643964406441644264436444644564466447644864496450645164526453645464556456645764586459646064616462646364646465646664676468646964706471647264736474647564766477647864796480648164826483648464856486648764886489649064916492649364946495649664976498649965006501650265036504650565066507650865096510651165126513651465156516651765186519652065216522652365246525652665276528652965306531653265336534653565366537653865396540654165426543654465456546654765486549655065516552655365546555655665576558655965606561656265636564656565666567656865696570657165726573657465756576657765786579658065816582658365846585658665876588658965906591659265936594659565966597659865996600660166026603660466056606660766086609661066116612661366146615661666176618661966206621662266236624662566266627662866296630663166326633663466356636663766386639664066416642664366446645664666476648664966506651665266536654665566566657665866596660666166626663666466656666666766686669667066716672667366746675667666776678667966806681668266836684668566866687668866896690669166926693669466956696669766986699670067016702670367046705670667076708670967106711671267136714671567166717671867196720672167226723672467256726672767286729673067316732673367346735673667376738673967406741674267436744674567466747674867496750675167526753675467556756675767586759676067616762676367646765676667676768676967706771677267736774677567766777677867796780678167826783678467856786678767886789679067916792679367946795679667976798679968006801680268036804680568066807680868096810681168126813681468156816681768186819682068216822682368246825682668276828682968306831683268336834683568366837683868396840684168426843684468456846684768486849685068516852685368546855685668576858685968606861686268636864686568666867686868696870687168726873687468756876687768786879688068816882688368846885688668876888688968906891689268936894689568966897689868996900690169026903690469056906690769086909691069116912691369146915691669176918691969206921692269236924692569266927692869296930693169326933693469356936693769386939694069416942694369446945694669476948694969506951695269536954695569566957695869596960696169626963696469656966696769686969697069716972697369746975697669776978697969806981698269836984698569866987698869896990699169926993699469956996699769986999700070017002700370047005700670077008700970107011701270137014701570167017701870197020702170227023702470257026702770287029703070317032703370347035703670377038703970407041704270437044704570467047704870497050705170527053705470557056705770587059706070617062706370647065706670677068706970707071707270737074707570767077707870797080708170827083708470857086708770887089709070917092709370947095709670977098709971007101710271037104710571067107710871097110711171127113711471157116711771187119712071217122712371247125712671277128712971307131713271337134713571367137713871397140714171427143714471457146714771487149715071517152715371547155715671577158715971607161716271637164716571667167716871697170717171727173717471757176717771787179718071817182718371847185718671877188718971907191719271937194719571967197719871997200720172027203720472057206720772087209721072117212721372147215721672177218721972207221722272237224722572267227722872297230723172327233723472357236723772387239724072417242724372447245724672477248724972507251725272537254725572567257725872597260726172627263726472657266726772687269727072717272727372747275727672777278727972807281728272837284728572867287728872897290729172927293729472957296729772987299730073017302730373047305730673077308730973107311731273137314731573167317731873197320732173227323732473257326732773287329733073317332733373347335733673377338733973407341734273437344734573467347734873497350735173527353735473557356735773587359736073617362736373647365736673677368736973707371737273737374737573767377737873797380738173827383738473857386738773887389739073917392739373947395739673977398739974007401740274037404740574067407740874097410741174127413741474157416741774187419742074217422742374247425742674277428742974307431743274337434743574367437743874397440744174427443744474457446744774487449745074517452745374547455745674577458745974607461746274637464746574667467746874697470747174727473747474757476747774787479748074817482748374847485748674877488748974907491749274937494749574967497749874997500750175027503750475057506750775087509751075117512751375147515751675177518751975207521752275237524752575267527752875297530753175327533753475357536753775387539754075417542754375447545754675477548754975507551755275537554755575567557755875597560756175627563756475657566756775687569757075717572757375747575757675777578757975807581758275837584758575867587758875897590759175927593759475957596759775987599760076017602760376047605760676077608760976107611761276137614761576167617761876197620762176227623762476257626762776287629763076317632763376347635763676377638763976407641764276437644764576467647764876497650765176527653765476557656765776587659766076617662766376647665766676677668766976707671767276737674767576767677767876797680768176827683768476857686768776887689769076917692769376947695769676977698769977007701770277037704770577067707770877097710771177127713771477157716771777187719772077217722772377247725772677277728772977307731773277337734773577367737773877397740774177427743774477457746774777487749775077517752775377547755775677577758775977607761776277637764776577667767776877697770777177727773777477757776777777787779778077817782778377847785778677877788778977907791779277937794779577967797779877997800780178027803780478057806780778087809781078117812781378147815781678177818781978207821782278237824782578267827782878297830783178327833783478357836783778387839784078417842784378447845784678477848784978507851785278537854785578567857785878597860786178627863786478657866786778687869787078717872787378747875787678777878787978807881788278837884788578867887788878897890789178927893789478957896789778987899790079017902790379047905790679077908790979107911791279137914791579167917791879197920792179227923792479257926792779287929793079317932793379347935793679377938793979407941794279437944794579467947794879497950795179527953795479557956795779587959796079617962796379647965796679677968796979707971797279737974797579767977797879797980798179827983798479857986798779887989799079917992799379947995799679977998799980008001800280038004800580068007800880098010801180128013801480158016801780188019802080218022802380248025802680278028802980308031803280338034803580368037803880398040804180428043804480458046804780488049805080518052805380548055805680578058805980608061806280638064806580668067806880698070807180728073807480758076807780788079808080818082808380848085808680878088808980908091809280938094809580968097809880998100810181028103810481058106810781088109811081118112811381148115811681178118811981208121812281238124812581268127812881298130813181328133813481358136813781388139814081418142814381448145814681478148814981508151815281538154815581568157815881598160816181628163816481658166816781688169817081718172817381748175817681778178817981808181818281838184818581868187818881898190819181928193819481958196819781988199820082018202820382048205820682078208820982108211821282138214821582168217821882198220822182228223822482258226822782288229823082318232823382348235823682378238823982408241824282438244824582468247824882498250825182528253825482558256825782588259826082618262826382648265826682678268826982708271827282738274827582768277827882798280828182828283828482858286828782888289829082918292829382948295829682978298829983008301830283038304830583068307830883098310831183128313831483158316831783188319832083218322832383248325832683278328832983308331833283338334833583368337833883398340834183428343834483458346834783488349835083518352835383548355835683578358835983608361836283638364836583668367836883698370837183728373837483758376837783788379838083818382838383848385838683878388838983908391839283938394839583968397839883998400840184028403840484058406840784088409841084118412841384148415841684178418841984208421842284238424842584268427842884298430843184328433843484358436843784388439844084418442844384448445844684478448844984508451845284538454845584568457845884598460846184628463846484658466846784688469847084718472847384748475847684778478847984808481848284838484
  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <dsp/audio_notifier.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wcd937x/wcd937x-mbhc.h"
  39. #include "codecs/wsa881x.h"
  40. #include "codecs/bolero/bolero-cdc.h"
  41. #include <dt-bindings/sound/audio-codec-port-types.h>
  42. #include "codecs/bolero/wsa-macro.h"
  43. #include "codecs/wcd937x/internal.h"
  44. #define DRV_NAME "sm6150-asoc-snd"
  45. #define __CHIPSET__ "SM6150 "
  46. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  47. #define SAMPLING_RATE_8KHZ 8000
  48. #define SAMPLING_RATE_11P025KHZ 11025
  49. #define SAMPLING_RATE_16KHZ 16000
  50. #define SAMPLING_RATE_22P05KHZ 22050
  51. #define SAMPLING_RATE_32KHZ 32000
  52. #define SAMPLING_RATE_44P1KHZ 44100
  53. #define SAMPLING_RATE_48KHZ 48000
  54. #define SAMPLING_RATE_88P2KHZ 88200
  55. #define SAMPLING_RATE_96KHZ 96000
  56. #define SAMPLING_RATE_176P4KHZ 176400
  57. #define SAMPLING_RATE_192KHZ 192000
  58. #define SAMPLING_RATE_352P8KHZ 352800
  59. #define SAMPLING_RATE_384KHZ 384000
  60. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  61. #define WCD9XXX_MBHC_DEF_RLOADS 5
  62. #define CODEC_EXT_CLK_RATE 9600000
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define DEV_NAME_STR_LEN 32
  65. #define WSA8810_NAME_1 "wsa881x.20170211"
  66. #define WSA8810_NAME_2 "wsa881x.20170212"
  67. #define WCN_CDC_SLIM_RX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX 3
  69. #define TDM_CHANNEL_MAX 8
  70. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  71. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  72. #define MSM_HIFI_ON 1
  73. enum {
  74. SLIM_RX_0 = 0,
  75. SLIM_RX_1,
  76. SLIM_RX_2,
  77. SLIM_RX_3,
  78. SLIM_RX_4,
  79. SLIM_RX_5,
  80. SLIM_RX_6,
  81. SLIM_RX_7,
  82. SLIM_RX_MAX,
  83. };
  84. enum {
  85. SLIM_TX_0 = 0,
  86. SLIM_TX_1,
  87. SLIM_TX_2,
  88. SLIM_TX_3,
  89. SLIM_TX_4,
  90. SLIM_TX_5,
  91. SLIM_TX_6,
  92. SLIM_TX_7,
  93. SLIM_TX_8,
  94. SLIM_TX_MAX,
  95. };
  96. enum {
  97. PRIM_MI2S = 0,
  98. SEC_MI2S,
  99. TERT_MI2S,
  100. QUAT_MI2S,
  101. QUIN_MI2S,
  102. MI2S_MAX,
  103. };
  104. enum {
  105. PRIM_AUX_PCM = 0,
  106. SEC_AUX_PCM,
  107. TERT_AUX_PCM,
  108. QUAT_AUX_PCM,
  109. QUIN_AUX_PCM,
  110. AUX_PCM_MAX,
  111. };
  112. enum {
  113. WSA_CDC_DMA_RX_0 = 0,
  114. WSA_CDC_DMA_RX_1,
  115. RX_CDC_DMA_RX_0,
  116. RX_CDC_DMA_RX_1,
  117. RX_CDC_DMA_RX_2,
  118. RX_CDC_DMA_RX_3,
  119. RX_CDC_DMA_RX_5,
  120. CDC_DMA_RX_MAX,
  121. };
  122. enum {
  123. WSA_CDC_DMA_TX_0 = 0,
  124. WSA_CDC_DMA_TX_1,
  125. WSA_CDC_DMA_TX_2,
  126. TX_CDC_DMA_TX_0,
  127. TX_CDC_DMA_TX_3,
  128. TX_CDC_DMA_TX_4,
  129. CDC_DMA_TX_MAX,
  130. };
  131. struct mi2s_conf {
  132. struct mutex lock;
  133. u32 ref_cnt;
  134. u32 msm_is_mi2s_master;
  135. };
  136. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  137. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  140. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  141. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  142. };
  143. struct dev_config {
  144. u32 sample_rate;
  145. u32 bit_format;
  146. u32 channels;
  147. };
  148. enum {
  149. DP_RX_IDX = 0,
  150. EXT_DISP_RX_IDX_MAX,
  151. };
  152. struct msm_wsa881x_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. struct aux_codec_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. enum pinctrl_pin_state {
  161. STATE_DISABLE = 0, /* All pins are in sleep state */
  162. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  163. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  164. };
  165. struct msm_pinctrl_info {
  166. struct pinctrl *pinctrl;
  167. struct pinctrl_state *mi2s_disable;
  168. struct pinctrl_state *tdm_disable;
  169. struct pinctrl_state *mi2s_active;
  170. struct pinctrl_state *tdm_active;
  171. enum pinctrl_pin_state curr_state;
  172. };
  173. struct msm_asoc_mach_data {
  174. struct snd_info_entry *codec_root;
  175. struct msm_pinctrl_info pinctrl_info;
  176. int usbc_en2_gpio; /* used by gpio driver API */
  177. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  178. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  179. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  180. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  181. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  182. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  183. };
  184. struct msm_asoc_wcd93xx_codec {
  185. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  186. enum afe_config_type config_type);
  187. };
  188. static const char *const pin_states[] = {"sleep", "i2s-active",
  189. "tdm-active"};
  190. static struct snd_soc_card snd_soc_card_sm6150_msm;
  191. enum {
  192. TDM_0 = 0,
  193. TDM_1,
  194. TDM_2,
  195. TDM_3,
  196. TDM_4,
  197. TDM_5,
  198. TDM_6,
  199. TDM_7,
  200. TDM_PORT_MAX,
  201. };
  202. enum {
  203. TDM_PRI = 0,
  204. TDM_SEC,
  205. TDM_TERT,
  206. TDM_QUAT,
  207. TDM_QUIN,
  208. TDM_INTERFACE_MAX,
  209. };
  210. struct tdm_port {
  211. u32 mode;
  212. u32 channel;
  213. };
  214. /* TDM default config */
  215. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  216. { /* PRI TDM */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  225. },
  226. { /* SEC TDM */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  235. },
  236. { /* TERT TDM */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  245. },
  246. { /* QUAT TDM */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  255. },
  256. { /* QUIN TDM */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  265. }
  266. };
  267. /* TDM default config */
  268. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  269. { /* PRI TDM */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  278. },
  279. { /* SEC TDM */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  288. },
  289. { /* TERT TDM */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  298. },
  299. { /* QUAT TDM */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  308. },
  309. { /* QUIN TDM */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  318. }
  319. };
  320. /* Default configuration of slimbus channels */
  321. static struct dev_config slim_rx_cfg[] = {
  322. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. };
  331. static struct dev_config slim_tx_cfg[] = {
  332. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  340. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  341. };
  342. /* Default configuration of Codec DMA Interface Tx */
  343. static struct dev_config cdc_dma_rx_cfg[] = {
  344. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. };
  352. /* Default configuration of Codec DMA Interface Rx */
  353. static struct dev_config cdc_dma_tx_cfg[] = {
  354. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. };
  361. /* Default configuration of external display BE */
  362. static struct dev_config ext_disp_rx_cfg[] = {
  363. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  364. };
  365. static struct dev_config usb_rx_cfg = {
  366. .sample_rate = SAMPLING_RATE_48KHZ,
  367. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  368. .channels = 2,
  369. };
  370. static struct dev_config usb_tx_cfg = {
  371. .sample_rate = SAMPLING_RATE_48KHZ,
  372. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  373. .channels = 1,
  374. };
  375. static struct dev_config proxy_rx_cfg = {
  376. .sample_rate = SAMPLING_RATE_48KHZ,
  377. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  378. .channels = 2,
  379. };
  380. /* Default configuration of MI2S channels */
  381. static struct dev_config mi2s_rx_cfg[] = {
  382. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  386. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  387. };
  388. static struct dev_config mi2s_tx_cfg[] = {
  389. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. };
  395. static struct dev_config aux_pcm_rx_cfg[] = {
  396. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  401. };
  402. static struct dev_config aux_pcm_tx_cfg[] = {
  403. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  408. };
  409. static int msm_vi_feed_tx_ch = 2;
  410. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  411. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  412. "Five", "Six", "Seven",
  413. "Eight"};
  414. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  415. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  416. "S32_LE"};
  417. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  418. "S24_3LE"};
  419. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  420. "KHZ_32", "KHZ_44P1", "KHZ_48",
  421. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  422. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  423. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  424. "KHZ_44P1", "KHZ_48",
  425. "KHZ_88P2", "KHZ_96"};
  426. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  427. "Five", "Six", "Seven",
  428. "Eight"};
  429. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  430. "Six", "Seven", "Eight"};
  431. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  432. "KHZ_16", "KHZ_22P05",
  433. "KHZ_32", "KHZ_44P1", "KHZ_48",
  434. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  435. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  436. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  437. "KHZ_192", "KHZ_32", "KHZ_44P1",
  438. "KHZ_88P2", "KHZ_176P4" };
  439. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  440. "Five", "Six", "Seven", "Eight"};
  441. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  442. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  443. "KHZ_48", "KHZ_176P4",
  444. "KHZ_352P8"};
  445. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  446. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  447. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  448. "KHZ_48", "KHZ_96", "KHZ_192"};
  449. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  450. "Five", "Six", "Seven",
  451. "Eight"};
  452. static const char *const hifi_text[] = {"Off", "On"};
  453. static const char *const qos_text[] = {"Disable", "Enable"};
  454. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  455. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  456. "Five", "Six", "Seven",
  457. "Eight"};
  458. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  459. "KHZ_16", "KHZ_22P05",
  460. "KHZ_32", "KHZ_44P1", "KHZ_48",
  461. "KHZ_88P2", "KHZ_96",
  462. "KHZ_176P4", "KHZ_192",
  463. "KHZ_352P8", "KHZ_384"};
  464. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  491. ext_disp_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  559. cdc_dma_sample_rate_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  561. cdc_dma_sample_rate_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  563. cdc_dma_sample_rate_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  565. cdc_dma_sample_rate_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  567. cdc_dma_sample_rate_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  569. cdc_dma_sample_rate_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  571. cdc_dma_sample_rate_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  577. cdc_dma_sample_rate_text);
  578. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  579. cdc_dma_sample_rate_text);
  580. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  581. cdc_dma_sample_rate_text);
  582. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  583. cdc_dma_sample_rate_text);
  584. static struct platform_device *spdev;
  585. static int msm_hifi_control;
  586. static bool is_initial_boot;
  587. static bool codec_reg_done;
  588. static struct snd_soc_aux_dev *msm_aux_dev;
  589. static struct snd_soc_codec_conf *msm_codec_conf;
  590. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  591. static int dmic_0_1_gpio_cnt;
  592. static int dmic_2_3_gpio_cnt;
  593. static void *def_wcd_mbhc_cal(void);
  594. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  595. int enable, bool dapm);
  596. static int msm_wsa881x_init(struct snd_soc_component *component);
  597. static int msm_aux_codec_init(struct snd_soc_component *component);
  598. /*
  599. * Need to report LINEIN
  600. * if R/L channel impedance is larger than 5K ohm
  601. */
  602. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  603. .read_fw_bin = false,
  604. .calibration = NULL,
  605. .detect_extn_cable = true,
  606. .mono_stero_detection = false,
  607. .swap_gnd_mic = NULL,
  608. .hs_ext_micbias = true,
  609. .key_code[0] = KEY_MEDIA,
  610. .key_code[1] = KEY_VOICECOMMAND,
  611. .key_code[2] = KEY_VOLUMEUP,
  612. .key_code[3] = KEY_VOLUMEDOWN,
  613. .key_code[4] = 0,
  614. .key_code[5] = 0,
  615. .key_code[6] = 0,
  616. .key_code[7] = 0,
  617. .linein_th = 5000,
  618. .moisture_en = true,
  619. .mbhc_micbias = MIC_BIAS_2,
  620. .anc_micbias = MIC_BIAS_2,
  621. .enable_anc_mic_detect = false,
  622. };
  623. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  624. {"MIC BIAS1", NULL, "MCLK TX"},
  625. {"MIC BIAS2", NULL, "MCLK TX"},
  626. {"MIC BIAS3", NULL, "MCLK TX"},
  627. {"MIC BIAS4", NULL, "MCLK TX"},
  628. };
  629. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  630. {
  631. AFE_API_VERSION_I2S_CONFIG,
  632. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  633. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  634. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  635. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  636. 0,
  637. },
  638. {
  639. AFE_API_VERSION_I2S_CONFIG,
  640. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  641. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  642. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  643. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  644. 0,
  645. },
  646. {
  647. AFE_API_VERSION_I2S_CONFIG,
  648. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  649. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  650. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  651. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  652. 0,
  653. },
  654. {
  655. AFE_API_VERSION_I2S_CONFIG,
  656. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  657. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  658. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  659. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  660. 0,
  661. },
  662. {
  663. AFE_API_VERSION_I2S_CONFIG,
  664. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  665. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  666. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  667. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  668. 0,
  669. }
  670. };
  671. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  672. static int slim_get_sample_rate_val(int sample_rate)
  673. {
  674. int sample_rate_val = 0;
  675. switch (sample_rate) {
  676. case SAMPLING_RATE_8KHZ:
  677. sample_rate_val = 0;
  678. break;
  679. case SAMPLING_RATE_16KHZ:
  680. sample_rate_val = 1;
  681. break;
  682. case SAMPLING_RATE_32KHZ:
  683. sample_rate_val = 2;
  684. break;
  685. case SAMPLING_RATE_44P1KHZ:
  686. sample_rate_val = 3;
  687. break;
  688. case SAMPLING_RATE_48KHZ:
  689. sample_rate_val = 4;
  690. break;
  691. case SAMPLING_RATE_88P2KHZ:
  692. sample_rate_val = 5;
  693. break;
  694. case SAMPLING_RATE_96KHZ:
  695. sample_rate_val = 6;
  696. break;
  697. case SAMPLING_RATE_176P4KHZ:
  698. sample_rate_val = 7;
  699. break;
  700. case SAMPLING_RATE_192KHZ:
  701. sample_rate_val = 8;
  702. break;
  703. case SAMPLING_RATE_352P8KHZ:
  704. sample_rate_val = 9;
  705. break;
  706. case SAMPLING_RATE_384KHZ:
  707. sample_rate_val = 10;
  708. break;
  709. default:
  710. sample_rate_val = 4;
  711. break;
  712. }
  713. return sample_rate_val;
  714. }
  715. static int slim_get_sample_rate(int value)
  716. {
  717. int sample_rate = 0;
  718. switch (value) {
  719. case 0:
  720. sample_rate = SAMPLING_RATE_8KHZ;
  721. break;
  722. case 1:
  723. sample_rate = SAMPLING_RATE_16KHZ;
  724. break;
  725. case 2:
  726. sample_rate = SAMPLING_RATE_32KHZ;
  727. break;
  728. case 3:
  729. sample_rate = SAMPLING_RATE_44P1KHZ;
  730. break;
  731. case 4:
  732. sample_rate = SAMPLING_RATE_48KHZ;
  733. break;
  734. case 5:
  735. sample_rate = SAMPLING_RATE_88P2KHZ;
  736. break;
  737. case 6:
  738. sample_rate = SAMPLING_RATE_96KHZ;
  739. break;
  740. case 7:
  741. sample_rate = SAMPLING_RATE_176P4KHZ;
  742. break;
  743. case 8:
  744. sample_rate = SAMPLING_RATE_192KHZ;
  745. break;
  746. case 9:
  747. sample_rate = SAMPLING_RATE_352P8KHZ;
  748. break;
  749. case 10:
  750. sample_rate = SAMPLING_RATE_384KHZ;
  751. break;
  752. default:
  753. sample_rate = SAMPLING_RATE_48KHZ;
  754. break;
  755. }
  756. return sample_rate;
  757. }
  758. static int slim_get_bit_format_val(int bit_format)
  759. {
  760. int val = 0;
  761. switch (bit_format) {
  762. case SNDRV_PCM_FORMAT_S32_LE:
  763. val = 3;
  764. break;
  765. case SNDRV_PCM_FORMAT_S24_3LE:
  766. val = 2;
  767. break;
  768. case SNDRV_PCM_FORMAT_S24_LE:
  769. val = 1;
  770. break;
  771. case SNDRV_PCM_FORMAT_S16_LE:
  772. default:
  773. val = 0;
  774. break;
  775. }
  776. return val;
  777. }
  778. static int slim_get_bit_format(int val)
  779. {
  780. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  781. switch (val) {
  782. case 0:
  783. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  784. break;
  785. case 1:
  786. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  787. break;
  788. case 2:
  789. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  790. break;
  791. case 3:
  792. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  793. break;
  794. default:
  795. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  796. break;
  797. }
  798. return bit_fmt;
  799. }
  800. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  801. {
  802. int port_id = 0;
  803. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  804. port_id = SLIM_RX_0;
  805. } else if (strnstr(kcontrol->id.name,
  806. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  807. port_id = SLIM_RX_2;
  808. } else if (strnstr(kcontrol->id.name,
  809. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  810. port_id = SLIM_RX_5;
  811. } else if (strnstr(kcontrol->id.name,
  812. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  813. port_id = SLIM_RX_6;
  814. } else if (strnstr(kcontrol->id.name,
  815. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  816. port_id = SLIM_TX_0;
  817. } else if (strnstr(kcontrol->id.name,
  818. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  819. port_id = SLIM_TX_1;
  820. } else {
  821. pr_err("%s: unsupported channel: %s\n",
  822. __func__, kcontrol->id.name);
  823. return -EINVAL;
  824. }
  825. return port_id;
  826. }
  827. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  828. struct snd_ctl_elem_value *ucontrol)
  829. {
  830. int ch_num = slim_get_port_idx(kcontrol);
  831. if (ch_num < 0)
  832. return ch_num;
  833. ucontrol->value.enumerated.item[0] =
  834. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  835. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  836. ch_num, slim_rx_cfg[ch_num].sample_rate,
  837. ucontrol->value.enumerated.item[0]);
  838. return 0;
  839. }
  840. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  841. struct snd_ctl_elem_value *ucontrol)
  842. {
  843. int ch_num = slim_get_port_idx(kcontrol);
  844. if (ch_num < 0)
  845. return ch_num;
  846. slim_rx_cfg[ch_num].sample_rate =
  847. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  848. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  849. ch_num, slim_rx_cfg[ch_num].sample_rate,
  850. ucontrol->value.enumerated.item[0]);
  851. return 0;
  852. }
  853. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  854. struct snd_ctl_elem_value *ucontrol)
  855. {
  856. int ch_num = slim_get_port_idx(kcontrol);
  857. if (ch_num < 0)
  858. return ch_num;
  859. ucontrol->value.enumerated.item[0] =
  860. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  861. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  862. ch_num, slim_tx_cfg[ch_num].sample_rate,
  863. ucontrol->value.enumerated.item[0]);
  864. return 0;
  865. }
  866. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  867. struct snd_ctl_elem_value *ucontrol)
  868. {
  869. int sample_rate = 0;
  870. int ch_num = slim_get_port_idx(kcontrol);
  871. if (ch_num < 0)
  872. return ch_num;
  873. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  874. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  875. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  876. __func__, sample_rate);
  877. return -EINVAL;
  878. }
  879. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  880. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  881. ch_num, slim_tx_cfg[ch_num].sample_rate,
  882. ucontrol->value.enumerated.item[0]);
  883. return 0;
  884. }
  885. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  886. struct snd_ctl_elem_value *ucontrol)
  887. {
  888. int ch_num = slim_get_port_idx(kcontrol);
  889. if (ch_num < 0)
  890. return ch_num;
  891. ucontrol->value.enumerated.item[0] =
  892. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  893. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  894. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  895. ucontrol->value.enumerated.item[0]);
  896. return 0;
  897. }
  898. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  899. struct snd_ctl_elem_value *ucontrol)
  900. {
  901. int ch_num = slim_get_port_idx(kcontrol);
  902. if (ch_num < 0)
  903. return ch_num;
  904. slim_rx_cfg[ch_num].bit_format =
  905. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  906. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  907. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  908. ucontrol->value.enumerated.item[0]);
  909. return 0;
  910. }
  911. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  912. struct snd_ctl_elem_value *ucontrol)
  913. {
  914. int ch_num = slim_get_port_idx(kcontrol);
  915. if (ch_num < 0)
  916. return ch_num;
  917. ucontrol->value.enumerated.item[0] =
  918. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  919. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  920. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  921. ucontrol->value.enumerated.item[0]);
  922. return 0;
  923. }
  924. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  925. struct snd_ctl_elem_value *ucontrol)
  926. {
  927. int ch_num = slim_get_port_idx(kcontrol);
  928. if (ch_num < 0)
  929. return ch_num;
  930. slim_tx_cfg[ch_num].bit_format =
  931. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  932. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  933. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  934. ucontrol->value.enumerated.item[0]);
  935. return 0;
  936. }
  937. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  938. struct snd_ctl_elem_value *ucontrol)
  939. {
  940. int ch_num = slim_get_port_idx(kcontrol);
  941. if (ch_num < 0)
  942. return ch_num;
  943. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  944. ch_num, slim_rx_cfg[ch_num].channels);
  945. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  946. return 0;
  947. }
  948. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  949. struct snd_ctl_elem_value *ucontrol)
  950. {
  951. int ch_num = slim_get_port_idx(kcontrol);
  952. if (ch_num < 0)
  953. return ch_num;
  954. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  955. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  956. ch_num, slim_rx_cfg[ch_num].channels);
  957. return 1;
  958. }
  959. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. int ch_num = slim_get_port_idx(kcontrol);
  963. if (ch_num < 0)
  964. return ch_num;
  965. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  966. ch_num, slim_tx_cfg[ch_num].channels);
  967. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  968. return 0;
  969. }
  970. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  971. struct snd_ctl_elem_value *ucontrol)
  972. {
  973. int ch_num = slim_get_port_idx(kcontrol);
  974. if (ch_num < 0)
  975. return ch_num;
  976. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  977. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  978. ch_num, slim_tx_cfg[ch_num].channels);
  979. return 1;
  980. }
  981. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  982. struct snd_ctl_elem_value *ucontrol)
  983. {
  984. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  985. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  986. ucontrol->value.integer.value[0]);
  987. return 0;
  988. }
  989. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  990. struct snd_ctl_elem_value *ucontrol)
  991. {
  992. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  993. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  994. return 1;
  995. }
  996. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  997. struct snd_ctl_elem_value *ucontrol)
  998. {
  999. /*
  1000. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1001. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1002. * value.
  1003. */
  1004. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1005. case SAMPLING_RATE_96KHZ:
  1006. ucontrol->value.integer.value[0] = 5;
  1007. break;
  1008. case SAMPLING_RATE_88P2KHZ:
  1009. ucontrol->value.integer.value[0] = 4;
  1010. break;
  1011. case SAMPLING_RATE_48KHZ:
  1012. ucontrol->value.integer.value[0] = 3;
  1013. break;
  1014. case SAMPLING_RATE_44P1KHZ:
  1015. ucontrol->value.integer.value[0] = 2;
  1016. break;
  1017. case SAMPLING_RATE_16KHZ:
  1018. ucontrol->value.integer.value[0] = 1;
  1019. break;
  1020. case SAMPLING_RATE_8KHZ:
  1021. default:
  1022. ucontrol->value.integer.value[0] = 0;
  1023. break;
  1024. }
  1025. pr_debug("%s: sample rate = %d\n", __func__,
  1026. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1027. return 0;
  1028. }
  1029. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1030. struct snd_ctl_elem_value *ucontrol)
  1031. {
  1032. switch (ucontrol->value.integer.value[0]) {
  1033. case 1:
  1034. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1035. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1036. break;
  1037. case 2:
  1038. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1039. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1040. break;
  1041. case 3:
  1042. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1043. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1044. break;
  1045. case 4:
  1046. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1047. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1048. break;
  1049. case 5:
  1050. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1051. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1052. break;
  1053. case 0:
  1054. default:
  1055. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1056. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1057. break;
  1058. }
  1059. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1060. __func__,
  1061. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1062. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1063. ucontrol->value.enumerated.item[0]);
  1064. return 0;
  1065. }
  1066. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1067. {
  1068. int idx = 0;
  1069. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1070. sizeof("WSA_CDC_DMA_RX_0")))
  1071. idx = WSA_CDC_DMA_RX_0;
  1072. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1073. sizeof("WSA_CDC_DMA_RX_0")))
  1074. idx = WSA_CDC_DMA_RX_1;
  1075. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1076. sizeof("RX_CDC_DMA_RX_0")))
  1077. idx = RX_CDC_DMA_RX_0;
  1078. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1079. sizeof("RX_CDC_DMA_RX_1")))
  1080. idx = RX_CDC_DMA_RX_1;
  1081. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1082. sizeof("RX_CDC_DMA_RX_2")))
  1083. idx = RX_CDC_DMA_RX_2;
  1084. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1085. sizeof("RX_CDC_DMA_RX_3")))
  1086. idx = RX_CDC_DMA_RX_3;
  1087. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1088. sizeof("RX_CDC_DMA_RX_5")))
  1089. idx = RX_CDC_DMA_RX_5;
  1090. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1091. sizeof("WSA_CDC_DMA_TX_0")))
  1092. idx = WSA_CDC_DMA_TX_0;
  1093. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1094. sizeof("WSA_CDC_DMA_TX_1")))
  1095. idx = WSA_CDC_DMA_TX_1;
  1096. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1097. sizeof("WSA_CDC_DMA_TX_2")))
  1098. idx = WSA_CDC_DMA_TX_2;
  1099. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1100. sizeof("TX_CDC_DMA_TX_0")))
  1101. idx = TX_CDC_DMA_TX_0;
  1102. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1103. sizeof("TX_CDC_DMA_TX_3")))
  1104. idx = TX_CDC_DMA_TX_3;
  1105. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1106. sizeof("TX_CDC_DMA_TX_4")))
  1107. idx = TX_CDC_DMA_TX_4;
  1108. else {
  1109. pr_err("%s: unsupported channel: %s\n",
  1110. __func__, kcontrol->id.name);
  1111. return -EINVAL;
  1112. }
  1113. return idx;
  1114. }
  1115. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1116. struct snd_ctl_elem_value *ucontrol)
  1117. {
  1118. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1119. if (ch_num < 0)
  1120. return ch_num;
  1121. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1122. cdc_dma_rx_cfg[ch_num].channels - 1);
  1123. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1124. return 0;
  1125. }
  1126. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1127. struct snd_ctl_elem_value *ucontrol)
  1128. {
  1129. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1130. if (ch_num < 0)
  1131. return ch_num;
  1132. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1133. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1134. cdc_dma_rx_cfg[ch_num].channels);
  1135. return 1;
  1136. }
  1137. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1138. struct snd_ctl_elem_value *ucontrol)
  1139. {
  1140. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1141. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1142. case SNDRV_PCM_FORMAT_S32_LE:
  1143. ucontrol->value.integer.value[0] = 3;
  1144. break;
  1145. case SNDRV_PCM_FORMAT_S24_3LE:
  1146. ucontrol->value.integer.value[0] = 2;
  1147. break;
  1148. case SNDRV_PCM_FORMAT_S24_LE:
  1149. ucontrol->value.integer.value[0] = 1;
  1150. break;
  1151. case SNDRV_PCM_FORMAT_S16_LE:
  1152. default:
  1153. ucontrol->value.integer.value[0] = 0;
  1154. break;
  1155. }
  1156. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1157. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1158. ucontrol->value.integer.value[0]);
  1159. return 0;
  1160. }
  1161. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1162. struct snd_ctl_elem_value *ucontrol)
  1163. {
  1164. int rc = 0;
  1165. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1166. switch (ucontrol->value.integer.value[0]) {
  1167. case 3:
  1168. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1169. break;
  1170. case 2:
  1171. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1172. break;
  1173. case 1:
  1174. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1175. break;
  1176. case 0:
  1177. default:
  1178. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1179. break;
  1180. }
  1181. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1182. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1183. ucontrol->value.integer.value[0]);
  1184. return rc;
  1185. }
  1186. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1187. {
  1188. int sample_rate_val = 0;
  1189. switch (sample_rate) {
  1190. case SAMPLING_RATE_8KHZ:
  1191. sample_rate_val = 0;
  1192. break;
  1193. case SAMPLING_RATE_11P025KHZ:
  1194. sample_rate_val = 1;
  1195. break;
  1196. case SAMPLING_RATE_16KHZ:
  1197. sample_rate_val = 2;
  1198. break;
  1199. case SAMPLING_RATE_22P05KHZ:
  1200. sample_rate_val = 3;
  1201. break;
  1202. case SAMPLING_RATE_32KHZ:
  1203. sample_rate_val = 4;
  1204. break;
  1205. case SAMPLING_RATE_44P1KHZ:
  1206. sample_rate_val = 5;
  1207. break;
  1208. case SAMPLING_RATE_48KHZ:
  1209. sample_rate_val = 6;
  1210. break;
  1211. case SAMPLING_RATE_88P2KHZ:
  1212. sample_rate_val = 7;
  1213. break;
  1214. case SAMPLING_RATE_96KHZ:
  1215. sample_rate_val = 8;
  1216. break;
  1217. case SAMPLING_RATE_176P4KHZ:
  1218. sample_rate_val = 9;
  1219. break;
  1220. case SAMPLING_RATE_192KHZ:
  1221. sample_rate_val = 10;
  1222. break;
  1223. case SAMPLING_RATE_352P8KHZ:
  1224. sample_rate_val = 11;
  1225. break;
  1226. case SAMPLING_RATE_384KHZ:
  1227. sample_rate_val = 12;
  1228. break;
  1229. default:
  1230. sample_rate_val = 6;
  1231. break;
  1232. }
  1233. return sample_rate_val;
  1234. }
  1235. static int cdc_dma_get_sample_rate(int value)
  1236. {
  1237. int sample_rate = 0;
  1238. switch (value) {
  1239. case 0:
  1240. sample_rate = SAMPLING_RATE_8KHZ;
  1241. break;
  1242. case 1:
  1243. sample_rate = SAMPLING_RATE_11P025KHZ;
  1244. break;
  1245. case 2:
  1246. sample_rate = SAMPLING_RATE_16KHZ;
  1247. break;
  1248. case 3:
  1249. sample_rate = SAMPLING_RATE_22P05KHZ;
  1250. break;
  1251. case 4:
  1252. sample_rate = SAMPLING_RATE_32KHZ;
  1253. break;
  1254. case 5:
  1255. sample_rate = SAMPLING_RATE_44P1KHZ;
  1256. break;
  1257. case 6:
  1258. sample_rate = SAMPLING_RATE_48KHZ;
  1259. break;
  1260. case 7:
  1261. sample_rate = SAMPLING_RATE_88P2KHZ;
  1262. break;
  1263. case 8:
  1264. sample_rate = SAMPLING_RATE_96KHZ;
  1265. break;
  1266. case 9:
  1267. sample_rate = SAMPLING_RATE_176P4KHZ;
  1268. break;
  1269. case 10:
  1270. sample_rate = SAMPLING_RATE_192KHZ;
  1271. break;
  1272. case 11:
  1273. sample_rate = SAMPLING_RATE_352P8KHZ;
  1274. break;
  1275. case 12:
  1276. sample_rate = SAMPLING_RATE_384KHZ;
  1277. break;
  1278. default:
  1279. sample_rate = SAMPLING_RATE_48KHZ;
  1280. break;
  1281. }
  1282. return sample_rate;
  1283. }
  1284. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1285. struct snd_ctl_elem_value *ucontrol)
  1286. {
  1287. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1288. if (ch_num < 0)
  1289. return ch_num;
  1290. ucontrol->value.enumerated.item[0] =
  1291. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1292. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1293. cdc_dma_rx_cfg[ch_num].sample_rate);
  1294. return 0;
  1295. }
  1296. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1297. struct snd_ctl_elem_value *ucontrol)
  1298. {
  1299. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1300. if (ch_num < 0)
  1301. return ch_num;
  1302. cdc_dma_rx_cfg[ch_num].sample_rate =
  1303. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1304. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1305. __func__, ucontrol->value.enumerated.item[0],
  1306. cdc_dma_rx_cfg[ch_num].sample_rate);
  1307. return 0;
  1308. }
  1309. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1310. struct snd_ctl_elem_value *ucontrol)
  1311. {
  1312. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1313. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1314. cdc_dma_tx_cfg[ch_num].channels);
  1315. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1316. return 0;
  1317. }
  1318. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1319. struct snd_ctl_elem_value *ucontrol)
  1320. {
  1321. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1322. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1323. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1324. cdc_dma_tx_cfg[ch_num].channels);
  1325. return 1;
  1326. }
  1327. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1328. struct snd_ctl_elem_value *ucontrol)
  1329. {
  1330. int sample_rate_val;
  1331. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1332. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1333. case SAMPLING_RATE_384KHZ:
  1334. sample_rate_val = 12;
  1335. break;
  1336. case SAMPLING_RATE_352P8KHZ:
  1337. sample_rate_val = 11;
  1338. break;
  1339. case SAMPLING_RATE_192KHZ:
  1340. sample_rate_val = 10;
  1341. break;
  1342. case SAMPLING_RATE_176P4KHZ:
  1343. sample_rate_val = 9;
  1344. break;
  1345. case SAMPLING_RATE_96KHZ:
  1346. sample_rate_val = 8;
  1347. break;
  1348. case SAMPLING_RATE_88P2KHZ:
  1349. sample_rate_val = 7;
  1350. break;
  1351. case SAMPLING_RATE_48KHZ:
  1352. sample_rate_val = 6;
  1353. break;
  1354. case SAMPLING_RATE_44P1KHZ:
  1355. sample_rate_val = 5;
  1356. break;
  1357. case SAMPLING_RATE_32KHZ:
  1358. sample_rate_val = 4;
  1359. break;
  1360. case SAMPLING_RATE_22P05KHZ:
  1361. sample_rate_val = 3;
  1362. break;
  1363. case SAMPLING_RATE_16KHZ:
  1364. sample_rate_val = 2;
  1365. break;
  1366. case SAMPLING_RATE_11P025KHZ:
  1367. sample_rate_val = 1;
  1368. break;
  1369. case SAMPLING_RATE_8KHZ:
  1370. sample_rate_val = 0;
  1371. break;
  1372. default:
  1373. sample_rate_val = 6;
  1374. break;
  1375. }
  1376. ucontrol->value.integer.value[0] = sample_rate_val;
  1377. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1378. cdc_dma_tx_cfg[ch_num].sample_rate);
  1379. return 0;
  1380. }
  1381. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1382. struct snd_ctl_elem_value *ucontrol)
  1383. {
  1384. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1385. switch (ucontrol->value.integer.value[0]) {
  1386. case 12:
  1387. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1388. break;
  1389. case 11:
  1390. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1391. break;
  1392. case 10:
  1393. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1394. break;
  1395. case 9:
  1396. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1397. break;
  1398. case 8:
  1399. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1400. break;
  1401. case 7:
  1402. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1403. break;
  1404. case 6:
  1405. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1406. break;
  1407. case 5:
  1408. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1409. break;
  1410. case 4:
  1411. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1412. break;
  1413. case 3:
  1414. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1415. break;
  1416. case 2:
  1417. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1418. break;
  1419. case 1:
  1420. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1421. break;
  1422. case 0:
  1423. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1424. break;
  1425. default:
  1426. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1427. break;
  1428. }
  1429. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1430. __func__, ucontrol->value.integer.value[0],
  1431. cdc_dma_tx_cfg[ch_num].sample_rate);
  1432. return 0;
  1433. }
  1434. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1435. struct snd_ctl_elem_value *ucontrol)
  1436. {
  1437. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1438. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1439. case SNDRV_PCM_FORMAT_S32_LE:
  1440. ucontrol->value.integer.value[0] = 3;
  1441. break;
  1442. case SNDRV_PCM_FORMAT_S24_3LE:
  1443. ucontrol->value.integer.value[0] = 2;
  1444. break;
  1445. case SNDRV_PCM_FORMAT_S24_LE:
  1446. ucontrol->value.integer.value[0] = 1;
  1447. break;
  1448. case SNDRV_PCM_FORMAT_S16_LE:
  1449. default:
  1450. ucontrol->value.integer.value[0] = 0;
  1451. break;
  1452. }
  1453. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1454. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1455. ucontrol->value.integer.value[0]);
  1456. return 0;
  1457. }
  1458. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1459. struct snd_ctl_elem_value *ucontrol)
  1460. {
  1461. int rc = 0;
  1462. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1463. switch (ucontrol->value.integer.value[0]) {
  1464. case 3:
  1465. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1466. break;
  1467. case 2:
  1468. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1469. break;
  1470. case 1:
  1471. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1472. break;
  1473. case 0:
  1474. default:
  1475. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1476. break;
  1477. }
  1478. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1479. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1480. ucontrol->value.integer.value[0]);
  1481. return rc;
  1482. }
  1483. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1484. struct snd_ctl_elem_value *ucontrol)
  1485. {
  1486. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1487. usb_rx_cfg.channels);
  1488. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1489. return 0;
  1490. }
  1491. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1492. struct snd_ctl_elem_value *ucontrol)
  1493. {
  1494. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1495. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1496. return 1;
  1497. }
  1498. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1499. struct snd_ctl_elem_value *ucontrol)
  1500. {
  1501. int sample_rate_val;
  1502. switch (usb_rx_cfg.sample_rate) {
  1503. case SAMPLING_RATE_384KHZ:
  1504. sample_rate_val = 12;
  1505. break;
  1506. case SAMPLING_RATE_352P8KHZ:
  1507. sample_rate_val = 11;
  1508. break;
  1509. case SAMPLING_RATE_192KHZ:
  1510. sample_rate_val = 10;
  1511. break;
  1512. case SAMPLING_RATE_176P4KHZ:
  1513. sample_rate_val = 9;
  1514. break;
  1515. case SAMPLING_RATE_96KHZ:
  1516. sample_rate_val = 8;
  1517. break;
  1518. case SAMPLING_RATE_88P2KHZ:
  1519. sample_rate_val = 7;
  1520. break;
  1521. case SAMPLING_RATE_48KHZ:
  1522. sample_rate_val = 6;
  1523. break;
  1524. case SAMPLING_RATE_44P1KHZ:
  1525. sample_rate_val = 5;
  1526. break;
  1527. case SAMPLING_RATE_32KHZ:
  1528. sample_rate_val = 4;
  1529. break;
  1530. case SAMPLING_RATE_22P05KHZ:
  1531. sample_rate_val = 3;
  1532. break;
  1533. case SAMPLING_RATE_16KHZ:
  1534. sample_rate_val = 2;
  1535. break;
  1536. case SAMPLING_RATE_11P025KHZ:
  1537. sample_rate_val = 1;
  1538. break;
  1539. case SAMPLING_RATE_8KHZ:
  1540. default:
  1541. sample_rate_val = 0;
  1542. break;
  1543. }
  1544. ucontrol->value.integer.value[0] = sample_rate_val;
  1545. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1546. usb_rx_cfg.sample_rate);
  1547. return 0;
  1548. }
  1549. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1550. struct snd_ctl_elem_value *ucontrol)
  1551. {
  1552. switch (ucontrol->value.integer.value[0]) {
  1553. case 12:
  1554. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1555. break;
  1556. case 11:
  1557. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1558. break;
  1559. case 10:
  1560. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1561. break;
  1562. case 9:
  1563. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1564. break;
  1565. case 8:
  1566. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1567. break;
  1568. case 7:
  1569. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1570. break;
  1571. case 6:
  1572. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1573. break;
  1574. case 5:
  1575. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1576. break;
  1577. case 4:
  1578. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1579. break;
  1580. case 3:
  1581. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1582. break;
  1583. case 2:
  1584. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1585. break;
  1586. case 1:
  1587. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1588. break;
  1589. case 0:
  1590. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1591. break;
  1592. default:
  1593. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1594. break;
  1595. }
  1596. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1597. __func__, ucontrol->value.integer.value[0],
  1598. usb_rx_cfg.sample_rate);
  1599. return 0;
  1600. }
  1601. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1602. struct snd_ctl_elem_value *ucontrol)
  1603. {
  1604. switch (usb_rx_cfg.bit_format) {
  1605. case SNDRV_PCM_FORMAT_S32_LE:
  1606. ucontrol->value.integer.value[0] = 3;
  1607. break;
  1608. case SNDRV_PCM_FORMAT_S24_3LE:
  1609. ucontrol->value.integer.value[0] = 2;
  1610. break;
  1611. case SNDRV_PCM_FORMAT_S24_LE:
  1612. ucontrol->value.integer.value[0] = 1;
  1613. break;
  1614. case SNDRV_PCM_FORMAT_S16_LE:
  1615. default:
  1616. ucontrol->value.integer.value[0] = 0;
  1617. break;
  1618. }
  1619. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1620. __func__, usb_rx_cfg.bit_format,
  1621. ucontrol->value.integer.value[0]);
  1622. return 0;
  1623. }
  1624. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1625. struct snd_ctl_elem_value *ucontrol)
  1626. {
  1627. int rc = 0;
  1628. switch (ucontrol->value.integer.value[0]) {
  1629. case 3:
  1630. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1631. break;
  1632. case 2:
  1633. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1634. break;
  1635. case 1:
  1636. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1637. break;
  1638. case 0:
  1639. default:
  1640. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1641. break;
  1642. }
  1643. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1644. __func__, usb_rx_cfg.bit_format,
  1645. ucontrol->value.integer.value[0]);
  1646. return rc;
  1647. }
  1648. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1649. struct snd_ctl_elem_value *ucontrol)
  1650. {
  1651. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1652. usb_tx_cfg.channels);
  1653. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1654. return 0;
  1655. }
  1656. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1657. struct snd_ctl_elem_value *ucontrol)
  1658. {
  1659. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1660. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1661. return 1;
  1662. }
  1663. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1664. struct snd_ctl_elem_value *ucontrol)
  1665. {
  1666. int sample_rate_val;
  1667. switch (usb_tx_cfg.sample_rate) {
  1668. case SAMPLING_RATE_384KHZ:
  1669. sample_rate_val = 12;
  1670. break;
  1671. case SAMPLING_RATE_352P8KHZ:
  1672. sample_rate_val = 11;
  1673. break;
  1674. case SAMPLING_RATE_192KHZ:
  1675. sample_rate_val = 10;
  1676. break;
  1677. case SAMPLING_RATE_176P4KHZ:
  1678. sample_rate_val = 9;
  1679. break;
  1680. case SAMPLING_RATE_96KHZ:
  1681. sample_rate_val = 8;
  1682. break;
  1683. case SAMPLING_RATE_88P2KHZ:
  1684. sample_rate_val = 7;
  1685. break;
  1686. case SAMPLING_RATE_48KHZ:
  1687. sample_rate_val = 6;
  1688. break;
  1689. case SAMPLING_RATE_44P1KHZ:
  1690. sample_rate_val = 5;
  1691. break;
  1692. case SAMPLING_RATE_32KHZ:
  1693. sample_rate_val = 4;
  1694. break;
  1695. case SAMPLING_RATE_22P05KHZ:
  1696. sample_rate_val = 3;
  1697. break;
  1698. case SAMPLING_RATE_16KHZ:
  1699. sample_rate_val = 2;
  1700. break;
  1701. case SAMPLING_RATE_11P025KHZ:
  1702. sample_rate_val = 1;
  1703. break;
  1704. case SAMPLING_RATE_8KHZ:
  1705. sample_rate_val = 0;
  1706. break;
  1707. default:
  1708. sample_rate_val = 6;
  1709. break;
  1710. }
  1711. ucontrol->value.integer.value[0] = sample_rate_val;
  1712. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1713. usb_tx_cfg.sample_rate);
  1714. return 0;
  1715. }
  1716. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1717. struct snd_ctl_elem_value *ucontrol)
  1718. {
  1719. switch (ucontrol->value.integer.value[0]) {
  1720. case 12:
  1721. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1722. break;
  1723. case 11:
  1724. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1725. break;
  1726. case 10:
  1727. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1728. break;
  1729. case 9:
  1730. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1731. break;
  1732. case 8:
  1733. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1734. break;
  1735. case 7:
  1736. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1737. break;
  1738. case 6:
  1739. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1740. break;
  1741. case 5:
  1742. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1743. break;
  1744. case 4:
  1745. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1746. break;
  1747. case 3:
  1748. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1749. break;
  1750. case 2:
  1751. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1752. break;
  1753. case 1:
  1754. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1755. break;
  1756. case 0:
  1757. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1758. break;
  1759. default:
  1760. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1761. break;
  1762. }
  1763. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1764. __func__, ucontrol->value.integer.value[0],
  1765. usb_tx_cfg.sample_rate);
  1766. return 0;
  1767. }
  1768. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1769. struct snd_ctl_elem_value *ucontrol)
  1770. {
  1771. switch (usb_tx_cfg.bit_format) {
  1772. case SNDRV_PCM_FORMAT_S32_LE:
  1773. ucontrol->value.integer.value[0] = 3;
  1774. break;
  1775. case SNDRV_PCM_FORMAT_S24_3LE:
  1776. ucontrol->value.integer.value[0] = 2;
  1777. break;
  1778. case SNDRV_PCM_FORMAT_S24_LE:
  1779. ucontrol->value.integer.value[0] = 1;
  1780. break;
  1781. case SNDRV_PCM_FORMAT_S16_LE:
  1782. default:
  1783. ucontrol->value.integer.value[0] = 0;
  1784. break;
  1785. }
  1786. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1787. __func__, usb_tx_cfg.bit_format,
  1788. ucontrol->value.integer.value[0]);
  1789. return 0;
  1790. }
  1791. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1792. struct snd_ctl_elem_value *ucontrol)
  1793. {
  1794. int rc = 0;
  1795. switch (ucontrol->value.integer.value[0]) {
  1796. case 3:
  1797. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1798. break;
  1799. case 2:
  1800. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1801. break;
  1802. case 1:
  1803. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1804. break;
  1805. case 0:
  1806. default:
  1807. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1808. break;
  1809. }
  1810. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1811. __func__, usb_tx_cfg.bit_format,
  1812. ucontrol->value.integer.value[0]);
  1813. return rc;
  1814. }
  1815. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1816. {
  1817. int idx;
  1818. if (strnstr(kcontrol->id.name, "Display Port RX",
  1819. sizeof("Display Port RX"))) {
  1820. idx = DP_RX_IDX;
  1821. } else {
  1822. pr_err("%s: unsupported BE: %s\n",
  1823. __func__, kcontrol->id.name);
  1824. idx = -EINVAL;
  1825. }
  1826. return idx;
  1827. }
  1828. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1829. struct snd_ctl_elem_value *ucontrol)
  1830. {
  1831. int idx = ext_disp_get_port_idx(kcontrol);
  1832. if (idx < 0)
  1833. return idx;
  1834. switch (ext_disp_rx_cfg[idx].bit_format) {
  1835. case SNDRV_PCM_FORMAT_S24_3LE:
  1836. ucontrol->value.integer.value[0] = 2;
  1837. break;
  1838. case SNDRV_PCM_FORMAT_S24_LE:
  1839. ucontrol->value.integer.value[0] = 1;
  1840. break;
  1841. case SNDRV_PCM_FORMAT_S16_LE:
  1842. default:
  1843. ucontrol->value.integer.value[0] = 0;
  1844. break;
  1845. }
  1846. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1847. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1848. ucontrol->value.integer.value[0]);
  1849. return 0;
  1850. }
  1851. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1852. struct snd_ctl_elem_value *ucontrol)
  1853. {
  1854. int idx = ext_disp_get_port_idx(kcontrol);
  1855. if (idx < 0)
  1856. return idx;
  1857. switch (ucontrol->value.integer.value[0]) {
  1858. case 2:
  1859. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1860. break;
  1861. case 1:
  1862. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1863. break;
  1864. case 0:
  1865. default:
  1866. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1867. break;
  1868. }
  1869. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1870. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1871. ucontrol->value.integer.value[0]);
  1872. return 0;
  1873. }
  1874. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1875. struct snd_ctl_elem_value *ucontrol)
  1876. {
  1877. int idx = ext_disp_get_port_idx(kcontrol);
  1878. if (idx < 0)
  1879. return idx;
  1880. ucontrol->value.integer.value[0] =
  1881. ext_disp_rx_cfg[idx].channels - 2;
  1882. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1883. idx, ext_disp_rx_cfg[idx].channels);
  1884. return 0;
  1885. }
  1886. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1887. struct snd_ctl_elem_value *ucontrol)
  1888. {
  1889. int idx = ext_disp_get_port_idx(kcontrol);
  1890. if (idx < 0)
  1891. return idx;
  1892. ext_disp_rx_cfg[idx].channels =
  1893. ucontrol->value.integer.value[0] + 2;
  1894. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1895. idx, ext_disp_rx_cfg[idx].channels);
  1896. return 1;
  1897. }
  1898. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1899. struct snd_ctl_elem_value *ucontrol)
  1900. {
  1901. int sample_rate_val;
  1902. int idx = ext_disp_get_port_idx(kcontrol);
  1903. if (idx < 0)
  1904. return idx;
  1905. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1906. case SAMPLING_RATE_176P4KHZ:
  1907. sample_rate_val = 6;
  1908. break;
  1909. case SAMPLING_RATE_88P2KHZ:
  1910. sample_rate_val = 5;
  1911. break;
  1912. case SAMPLING_RATE_44P1KHZ:
  1913. sample_rate_val = 4;
  1914. break;
  1915. case SAMPLING_RATE_32KHZ:
  1916. sample_rate_val = 3;
  1917. break;
  1918. case SAMPLING_RATE_192KHZ:
  1919. sample_rate_val = 2;
  1920. break;
  1921. case SAMPLING_RATE_96KHZ:
  1922. sample_rate_val = 1;
  1923. break;
  1924. case SAMPLING_RATE_48KHZ:
  1925. default:
  1926. sample_rate_val = 0;
  1927. break;
  1928. }
  1929. ucontrol->value.integer.value[0] = sample_rate_val;
  1930. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1931. idx, ext_disp_rx_cfg[idx].sample_rate);
  1932. return 0;
  1933. }
  1934. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1935. struct snd_ctl_elem_value *ucontrol)
  1936. {
  1937. int idx = ext_disp_get_port_idx(kcontrol);
  1938. if (idx < 0)
  1939. return idx;
  1940. switch (ucontrol->value.integer.value[0]) {
  1941. case 6:
  1942. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1943. break;
  1944. case 5:
  1945. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1946. break;
  1947. case 4:
  1948. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1949. break;
  1950. case 3:
  1951. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1952. break;
  1953. case 2:
  1954. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1955. break;
  1956. case 1:
  1957. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1958. break;
  1959. case 0:
  1960. default:
  1961. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1962. break;
  1963. }
  1964. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1965. __func__, ucontrol->value.integer.value[0], idx,
  1966. ext_disp_rx_cfg[idx].sample_rate);
  1967. return 0;
  1968. }
  1969. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1970. struct snd_ctl_elem_value *ucontrol)
  1971. {
  1972. pr_debug("%s: proxy_rx channels = %d\n",
  1973. __func__, proxy_rx_cfg.channels);
  1974. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1975. return 0;
  1976. }
  1977. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1978. struct snd_ctl_elem_value *ucontrol)
  1979. {
  1980. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1981. pr_debug("%s: proxy_rx channels = %d\n",
  1982. __func__, proxy_rx_cfg.channels);
  1983. return 1;
  1984. }
  1985. static int tdm_get_sample_rate(int value)
  1986. {
  1987. int sample_rate = 0;
  1988. switch (value) {
  1989. case 0:
  1990. sample_rate = SAMPLING_RATE_8KHZ;
  1991. break;
  1992. case 1:
  1993. sample_rate = SAMPLING_RATE_16KHZ;
  1994. break;
  1995. case 2:
  1996. sample_rate = SAMPLING_RATE_32KHZ;
  1997. break;
  1998. case 3:
  1999. sample_rate = SAMPLING_RATE_48KHZ;
  2000. break;
  2001. case 4:
  2002. sample_rate = SAMPLING_RATE_176P4KHZ;
  2003. break;
  2004. case 5:
  2005. sample_rate = SAMPLING_RATE_352P8KHZ;
  2006. break;
  2007. default:
  2008. sample_rate = SAMPLING_RATE_48KHZ;
  2009. break;
  2010. }
  2011. return sample_rate;
  2012. }
  2013. static int aux_pcm_get_sample_rate(int value)
  2014. {
  2015. int sample_rate;
  2016. switch (value) {
  2017. case 1:
  2018. sample_rate = SAMPLING_RATE_16KHZ;
  2019. break;
  2020. case 0:
  2021. default:
  2022. sample_rate = SAMPLING_RATE_8KHZ;
  2023. break;
  2024. }
  2025. return sample_rate;
  2026. }
  2027. static int tdm_get_sample_rate_val(int sample_rate)
  2028. {
  2029. int sample_rate_val = 0;
  2030. switch (sample_rate) {
  2031. case SAMPLING_RATE_8KHZ:
  2032. sample_rate_val = 0;
  2033. break;
  2034. case SAMPLING_RATE_16KHZ:
  2035. sample_rate_val = 1;
  2036. break;
  2037. case SAMPLING_RATE_32KHZ:
  2038. sample_rate_val = 2;
  2039. break;
  2040. case SAMPLING_RATE_48KHZ:
  2041. sample_rate_val = 3;
  2042. break;
  2043. case SAMPLING_RATE_176P4KHZ:
  2044. sample_rate_val = 4;
  2045. break;
  2046. case SAMPLING_RATE_352P8KHZ:
  2047. sample_rate_val = 5;
  2048. break;
  2049. default:
  2050. sample_rate_val = 3;
  2051. break;
  2052. }
  2053. return sample_rate_val;
  2054. }
  2055. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2056. {
  2057. int sample_rate_val;
  2058. switch (sample_rate) {
  2059. case SAMPLING_RATE_16KHZ:
  2060. sample_rate_val = 1;
  2061. break;
  2062. case SAMPLING_RATE_8KHZ:
  2063. default:
  2064. sample_rate_val = 0;
  2065. break;
  2066. }
  2067. return sample_rate_val;
  2068. }
  2069. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2070. struct tdm_port *port)
  2071. {
  2072. if (port) {
  2073. if (strnstr(kcontrol->id.name, "PRI",
  2074. sizeof(kcontrol->id.name))) {
  2075. port->mode = TDM_PRI;
  2076. } else if (strnstr(kcontrol->id.name, "SEC",
  2077. sizeof(kcontrol->id.name))) {
  2078. port->mode = TDM_SEC;
  2079. } else if (strnstr(kcontrol->id.name, "TERT",
  2080. sizeof(kcontrol->id.name))) {
  2081. port->mode = TDM_TERT;
  2082. } else if (strnstr(kcontrol->id.name, "QUAT",
  2083. sizeof(kcontrol->id.name))) {
  2084. port->mode = TDM_QUAT;
  2085. } else if (strnstr(kcontrol->id.name, "QUIN",
  2086. sizeof(kcontrol->id.name))) {
  2087. port->mode = TDM_QUIN;
  2088. } else {
  2089. pr_err("%s: unsupported mode in: %s\n",
  2090. __func__, kcontrol->id.name);
  2091. return -EINVAL;
  2092. }
  2093. if (strnstr(kcontrol->id.name, "RX_0",
  2094. sizeof(kcontrol->id.name)) ||
  2095. strnstr(kcontrol->id.name, "TX_0",
  2096. sizeof(kcontrol->id.name))) {
  2097. port->channel = TDM_0;
  2098. } else if (strnstr(kcontrol->id.name, "RX_1",
  2099. sizeof(kcontrol->id.name)) ||
  2100. strnstr(kcontrol->id.name, "TX_1",
  2101. sizeof(kcontrol->id.name))) {
  2102. port->channel = TDM_1;
  2103. } else if (strnstr(kcontrol->id.name, "RX_2",
  2104. sizeof(kcontrol->id.name)) ||
  2105. strnstr(kcontrol->id.name, "TX_2",
  2106. sizeof(kcontrol->id.name))) {
  2107. port->channel = TDM_2;
  2108. } else if (strnstr(kcontrol->id.name, "RX_3",
  2109. sizeof(kcontrol->id.name)) ||
  2110. strnstr(kcontrol->id.name, "TX_3",
  2111. sizeof(kcontrol->id.name))) {
  2112. port->channel = TDM_3;
  2113. } else if (strnstr(kcontrol->id.name, "RX_4",
  2114. sizeof(kcontrol->id.name)) ||
  2115. strnstr(kcontrol->id.name, "TX_4",
  2116. sizeof(kcontrol->id.name))) {
  2117. port->channel = TDM_4;
  2118. } else if (strnstr(kcontrol->id.name, "RX_5",
  2119. sizeof(kcontrol->id.name)) ||
  2120. strnstr(kcontrol->id.name, "TX_5",
  2121. sizeof(kcontrol->id.name))) {
  2122. port->channel = TDM_5;
  2123. } else if (strnstr(kcontrol->id.name, "RX_6",
  2124. sizeof(kcontrol->id.name)) ||
  2125. strnstr(kcontrol->id.name, "TX_6",
  2126. sizeof(kcontrol->id.name))) {
  2127. port->channel = TDM_6;
  2128. } else if (strnstr(kcontrol->id.name, "RX_7",
  2129. sizeof(kcontrol->id.name)) ||
  2130. strnstr(kcontrol->id.name, "TX_7",
  2131. sizeof(kcontrol->id.name))) {
  2132. port->channel = TDM_7;
  2133. } else {
  2134. pr_err("%s: unsupported channel in: %s\n",
  2135. __func__, kcontrol->id.name);
  2136. return -EINVAL;
  2137. }
  2138. } else {
  2139. return -EINVAL;
  2140. }
  2141. return 0;
  2142. }
  2143. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2144. struct snd_ctl_elem_value *ucontrol)
  2145. {
  2146. struct tdm_port port;
  2147. int ret = tdm_get_port_idx(kcontrol, &port);
  2148. if (ret) {
  2149. pr_err("%s: unsupported control: %s\n",
  2150. __func__, kcontrol->id.name);
  2151. } else {
  2152. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2153. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2154. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2155. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2156. ucontrol->value.enumerated.item[0]);
  2157. }
  2158. return ret;
  2159. }
  2160. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2161. struct snd_ctl_elem_value *ucontrol)
  2162. {
  2163. struct tdm_port port;
  2164. int ret = tdm_get_port_idx(kcontrol, &port);
  2165. if (ret) {
  2166. pr_err("%s: unsupported control: %s\n",
  2167. __func__, kcontrol->id.name);
  2168. } else {
  2169. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2170. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2171. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2172. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2173. ucontrol->value.enumerated.item[0]);
  2174. }
  2175. return ret;
  2176. }
  2177. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2178. struct snd_ctl_elem_value *ucontrol)
  2179. {
  2180. struct tdm_port port;
  2181. int ret = tdm_get_port_idx(kcontrol, &port);
  2182. if (ret) {
  2183. pr_err("%s: unsupported control: %s\n",
  2184. __func__, kcontrol->id.name);
  2185. } else {
  2186. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2187. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2188. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2189. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2190. ucontrol->value.enumerated.item[0]);
  2191. }
  2192. return ret;
  2193. }
  2194. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2195. struct snd_ctl_elem_value *ucontrol)
  2196. {
  2197. struct tdm_port port;
  2198. int ret = tdm_get_port_idx(kcontrol, &port);
  2199. if (ret) {
  2200. pr_err("%s: unsupported control: %s\n",
  2201. __func__, kcontrol->id.name);
  2202. } else {
  2203. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2204. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2205. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2206. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2207. ucontrol->value.enumerated.item[0]);
  2208. }
  2209. return ret;
  2210. }
  2211. static int tdm_get_format(int value)
  2212. {
  2213. int format = 0;
  2214. switch (value) {
  2215. case 0:
  2216. format = SNDRV_PCM_FORMAT_S16_LE;
  2217. break;
  2218. case 1:
  2219. format = SNDRV_PCM_FORMAT_S24_LE;
  2220. break;
  2221. case 2:
  2222. format = SNDRV_PCM_FORMAT_S32_LE;
  2223. break;
  2224. default:
  2225. format = SNDRV_PCM_FORMAT_S16_LE;
  2226. break;
  2227. }
  2228. return format;
  2229. }
  2230. static int tdm_get_format_val(int format)
  2231. {
  2232. int value = 0;
  2233. switch (format) {
  2234. case SNDRV_PCM_FORMAT_S16_LE:
  2235. value = 0;
  2236. break;
  2237. case SNDRV_PCM_FORMAT_S24_LE:
  2238. value = 1;
  2239. break;
  2240. case SNDRV_PCM_FORMAT_S32_LE:
  2241. value = 2;
  2242. break;
  2243. default:
  2244. value = 0;
  2245. break;
  2246. }
  2247. return value;
  2248. }
  2249. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2250. struct snd_ctl_elem_value *ucontrol)
  2251. {
  2252. struct tdm_port port;
  2253. int ret = tdm_get_port_idx(kcontrol, &port);
  2254. if (ret) {
  2255. pr_err("%s: unsupported control: %s\n",
  2256. __func__, kcontrol->id.name);
  2257. } else {
  2258. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2259. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2260. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2261. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2262. ucontrol->value.enumerated.item[0]);
  2263. }
  2264. return ret;
  2265. }
  2266. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2267. struct snd_ctl_elem_value *ucontrol)
  2268. {
  2269. struct tdm_port port;
  2270. int ret = tdm_get_port_idx(kcontrol, &port);
  2271. if (ret) {
  2272. pr_err("%s: unsupported control: %s\n",
  2273. __func__, kcontrol->id.name);
  2274. } else {
  2275. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2276. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2277. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2278. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2279. ucontrol->value.enumerated.item[0]);
  2280. }
  2281. return ret;
  2282. }
  2283. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2284. struct snd_ctl_elem_value *ucontrol)
  2285. {
  2286. struct tdm_port port;
  2287. int ret = tdm_get_port_idx(kcontrol, &port);
  2288. if (ret) {
  2289. pr_err("%s: unsupported control: %s\n",
  2290. __func__, kcontrol->id.name);
  2291. } else {
  2292. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2293. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2294. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2295. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2296. ucontrol->value.enumerated.item[0]);
  2297. }
  2298. return ret;
  2299. }
  2300. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2301. struct snd_ctl_elem_value *ucontrol)
  2302. {
  2303. struct tdm_port port;
  2304. int ret = tdm_get_port_idx(kcontrol, &port);
  2305. if (ret) {
  2306. pr_err("%s: unsupported control: %s\n",
  2307. __func__, kcontrol->id.name);
  2308. } else {
  2309. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2310. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2311. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2312. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2313. ucontrol->value.enumerated.item[0]);
  2314. }
  2315. return ret;
  2316. }
  2317. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2318. struct snd_ctl_elem_value *ucontrol)
  2319. {
  2320. struct tdm_port port;
  2321. int ret = tdm_get_port_idx(kcontrol, &port);
  2322. if (ret) {
  2323. pr_err("%s: unsupported control: %s\n",
  2324. __func__, kcontrol->id.name);
  2325. } else {
  2326. ucontrol->value.enumerated.item[0] =
  2327. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2328. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2329. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2330. ucontrol->value.enumerated.item[0]);
  2331. }
  2332. return ret;
  2333. }
  2334. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2335. struct snd_ctl_elem_value *ucontrol)
  2336. {
  2337. struct tdm_port port;
  2338. int ret = tdm_get_port_idx(kcontrol, &port);
  2339. if (ret) {
  2340. pr_err("%s: unsupported control: %s\n",
  2341. __func__, kcontrol->id.name);
  2342. } else {
  2343. tdm_rx_cfg[port.mode][port.channel].channels =
  2344. ucontrol->value.enumerated.item[0] + 1;
  2345. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2346. tdm_rx_cfg[port.mode][port.channel].channels,
  2347. ucontrol->value.enumerated.item[0] + 1);
  2348. }
  2349. return ret;
  2350. }
  2351. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2352. struct snd_ctl_elem_value *ucontrol)
  2353. {
  2354. struct tdm_port port;
  2355. int ret = tdm_get_port_idx(kcontrol, &port);
  2356. if (ret) {
  2357. pr_err("%s: unsupported control: %s\n",
  2358. __func__, kcontrol->id.name);
  2359. } else {
  2360. ucontrol->value.enumerated.item[0] =
  2361. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2362. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2363. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2364. ucontrol->value.enumerated.item[0]);
  2365. }
  2366. return ret;
  2367. }
  2368. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2369. struct snd_ctl_elem_value *ucontrol)
  2370. {
  2371. struct tdm_port port;
  2372. int ret = tdm_get_port_idx(kcontrol, &port);
  2373. if (ret) {
  2374. pr_err("%s: unsupported control: %s\n",
  2375. __func__, kcontrol->id.name);
  2376. } else {
  2377. tdm_tx_cfg[port.mode][port.channel].channels =
  2378. ucontrol->value.enumerated.item[0] + 1;
  2379. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2380. tdm_tx_cfg[port.mode][port.channel].channels,
  2381. ucontrol->value.enumerated.item[0] + 1);
  2382. }
  2383. return ret;
  2384. }
  2385. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2386. {
  2387. int idx;
  2388. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2389. sizeof("PRIM_AUX_PCM"))) {
  2390. idx = PRIM_AUX_PCM;
  2391. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2392. sizeof("SEC_AUX_PCM"))) {
  2393. idx = SEC_AUX_PCM;
  2394. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2395. sizeof("TERT_AUX_PCM"))) {
  2396. idx = TERT_AUX_PCM;
  2397. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2398. sizeof("QUAT_AUX_PCM"))) {
  2399. idx = QUAT_AUX_PCM;
  2400. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2401. sizeof("QUIN_AUX_PCM"))) {
  2402. idx = QUIN_AUX_PCM;
  2403. } else {
  2404. pr_err("%s: unsupported port: %s\n",
  2405. __func__, kcontrol->id.name);
  2406. idx = -EINVAL;
  2407. }
  2408. return idx;
  2409. }
  2410. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2411. struct snd_ctl_elem_value *ucontrol)
  2412. {
  2413. int idx = aux_pcm_get_port_idx(kcontrol);
  2414. if (idx < 0)
  2415. return idx;
  2416. aux_pcm_rx_cfg[idx].sample_rate =
  2417. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2418. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2419. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2420. ucontrol->value.enumerated.item[0]);
  2421. return 0;
  2422. }
  2423. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2424. struct snd_ctl_elem_value *ucontrol)
  2425. {
  2426. int idx = aux_pcm_get_port_idx(kcontrol);
  2427. if (idx < 0)
  2428. return idx;
  2429. ucontrol->value.enumerated.item[0] =
  2430. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2431. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2432. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2433. ucontrol->value.enumerated.item[0]);
  2434. return 0;
  2435. }
  2436. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2437. struct snd_ctl_elem_value *ucontrol)
  2438. {
  2439. int idx = aux_pcm_get_port_idx(kcontrol);
  2440. if (idx < 0)
  2441. return idx;
  2442. aux_pcm_tx_cfg[idx].sample_rate =
  2443. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2444. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2445. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2446. ucontrol->value.enumerated.item[0]);
  2447. return 0;
  2448. }
  2449. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2450. struct snd_ctl_elem_value *ucontrol)
  2451. {
  2452. int idx = aux_pcm_get_port_idx(kcontrol);
  2453. if (idx < 0)
  2454. return idx;
  2455. ucontrol->value.enumerated.item[0] =
  2456. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2457. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2458. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2459. ucontrol->value.enumerated.item[0]);
  2460. return 0;
  2461. }
  2462. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2463. {
  2464. int idx;
  2465. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2466. sizeof("PRIM_MI2S_RX"))) {
  2467. idx = PRIM_MI2S;
  2468. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2469. sizeof("SEC_MI2S_RX"))) {
  2470. idx = SEC_MI2S;
  2471. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2472. sizeof("TERT_MI2S_RX"))) {
  2473. idx = TERT_MI2S;
  2474. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2475. sizeof("QUAT_MI2S_RX"))) {
  2476. idx = QUAT_MI2S;
  2477. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2478. sizeof("QUIN_MI2S_RX"))) {
  2479. idx = QUIN_MI2S;
  2480. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2481. sizeof("PRIM_MI2S_TX"))) {
  2482. idx = PRIM_MI2S;
  2483. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2484. sizeof("SEC_MI2S_TX"))) {
  2485. idx = SEC_MI2S;
  2486. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2487. sizeof("TERT_MI2S_TX"))) {
  2488. idx = TERT_MI2S;
  2489. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2490. sizeof("QUAT_MI2S_TX"))) {
  2491. idx = QUAT_MI2S;
  2492. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2493. sizeof("QUIN_MI2S_TX"))) {
  2494. idx = QUIN_MI2S;
  2495. } else {
  2496. pr_err("%s: unsupported channel: %s\n",
  2497. __func__, kcontrol->id.name);
  2498. idx = -EINVAL;
  2499. }
  2500. return idx;
  2501. }
  2502. static int mi2s_get_sample_rate_val(int sample_rate)
  2503. {
  2504. int sample_rate_val;
  2505. switch (sample_rate) {
  2506. case SAMPLING_RATE_8KHZ:
  2507. sample_rate_val = 0;
  2508. break;
  2509. case SAMPLING_RATE_11P025KHZ:
  2510. sample_rate_val = 1;
  2511. break;
  2512. case SAMPLING_RATE_16KHZ:
  2513. sample_rate_val = 2;
  2514. break;
  2515. case SAMPLING_RATE_22P05KHZ:
  2516. sample_rate_val = 3;
  2517. break;
  2518. case SAMPLING_RATE_32KHZ:
  2519. sample_rate_val = 4;
  2520. break;
  2521. case SAMPLING_RATE_44P1KHZ:
  2522. sample_rate_val = 5;
  2523. break;
  2524. case SAMPLING_RATE_48KHZ:
  2525. sample_rate_val = 6;
  2526. break;
  2527. case SAMPLING_RATE_96KHZ:
  2528. sample_rate_val = 7;
  2529. break;
  2530. case SAMPLING_RATE_192KHZ:
  2531. sample_rate_val = 8;
  2532. break;
  2533. default:
  2534. sample_rate_val = 6;
  2535. break;
  2536. }
  2537. return sample_rate_val;
  2538. }
  2539. static int mi2s_get_sample_rate(int value)
  2540. {
  2541. int sample_rate;
  2542. switch (value) {
  2543. case 0:
  2544. sample_rate = SAMPLING_RATE_8KHZ;
  2545. break;
  2546. case 1:
  2547. sample_rate = SAMPLING_RATE_11P025KHZ;
  2548. break;
  2549. case 2:
  2550. sample_rate = SAMPLING_RATE_16KHZ;
  2551. break;
  2552. case 3:
  2553. sample_rate = SAMPLING_RATE_22P05KHZ;
  2554. break;
  2555. case 4:
  2556. sample_rate = SAMPLING_RATE_32KHZ;
  2557. break;
  2558. case 5:
  2559. sample_rate = SAMPLING_RATE_44P1KHZ;
  2560. break;
  2561. case 6:
  2562. sample_rate = SAMPLING_RATE_48KHZ;
  2563. break;
  2564. case 7:
  2565. sample_rate = SAMPLING_RATE_96KHZ;
  2566. break;
  2567. case 8:
  2568. sample_rate = SAMPLING_RATE_192KHZ;
  2569. break;
  2570. default:
  2571. sample_rate = SAMPLING_RATE_48KHZ;
  2572. break;
  2573. }
  2574. return sample_rate;
  2575. }
  2576. static int mi2s_auxpcm_get_format(int value)
  2577. {
  2578. int format;
  2579. switch (value) {
  2580. case 0:
  2581. format = SNDRV_PCM_FORMAT_S16_LE;
  2582. break;
  2583. case 1:
  2584. format = SNDRV_PCM_FORMAT_S24_LE;
  2585. break;
  2586. case 2:
  2587. format = SNDRV_PCM_FORMAT_S24_3LE;
  2588. break;
  2589. case 3:
  2590. format = SNDRV_PCM_FORMAT_S32_LE;
  2591. break;
  2592. default:
  2593. format = SNDRV_PCM_FORMAT_S16_LE;
  2594. break;
  2595. }
  2596. return format;
  2597. }
  2598. static int mi2s_auxpcm_get_format_value(int format)
  2599. {
  2600. int value;
  2601. switch (format) {
  2602. case SNDRV_PCM_FORMAT_S16_LE:
  2603. value = 0;
  2604. break;
  2605. case SNDRV_PCM_FORMAT_S24_LE:
  2606. value = 1;
  2607. break;
  2608. case SNDRV_PCM_FORMAT_S24_3LE:
  2609. value = 2;
  2610. break;
  2611. case SNDRV_PCM_FORMAT_S32_LE:
  2612. value = 3;
  2613. break;
  2614. default:
  2615. value = 0;
  2616. break;
  2617. }
  2618. return value;
  2619. }
  2620. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2621. struct snd_ctl_elem_value *ucontrol)
  2622. {
  2623. int idx = mi2s_get_port_idx(kcontrol);
  2624. if (idx < 0)
  2625. return idx;
  2626. mi2s_rx_cfg[idx].sample_rate =
  2627. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2628. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2629. idx, mi2s_rx_cfg[idx].sample_rate,
  2630. ucontrol->value.enumerated.item[0]);
  2631. return 0;
  2632. }
  2633. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2634. struct snd_ctl_elem_value *ucontrol)
  2635. {
  2636. int idx = mi2s_get_port_idx(kcontrol);
  2637. if (idx < 0)
  2638. return idx;
  2639. ucontrol->value.enumerated.item[0] =
  2640. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2641. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2642. idx, mi2s_rx_cfg[idx].sample_rate,
  2643. ucontrol->value.enumerated.item[0]);
  2644. return 0;
  2645. }
  2646. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2647. struct snd_ctl_elem_value *ucontrol)
  2648. {
  2649. int idx = mi2s_get_port_idx(kcontrol);
  2650. if (idx < 0)
  2651. return idx;
  2652. mi2s_tx_cfg[idx].sample_rate =
  2653. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2654. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2655. idx, mi2s_tx_cfg[idx].sample_rate,
  2656. ucontrol->value.enumerated.item[0]);
  2657. return 0;
  2658. }
  2659. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2660. struct snd_ctl_elem_value *ucontrol)
  2661. {
  2662. int idx = mi2s_get_port_idx(kcontrol);
  2663. if (idx < 0)
  2664. return idx;
  2665. ucontrol->value.enumerated.item[0] =
  2666. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2667. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2668. idx, mi2s_tx_cfg[idx].sample_rate,
  2669. ucontrol->value.enumerated.item[0]);
  2670. return 0;
  2671. }
  2672. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2673. struct snd_ctl_elem_value *ucontrol)
  2674. {
  2675. int idx = mi2s_get_port_idx(kcontrol);
  2676. if (idx < 0)
  2677. return idx;
  2678. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2679. idx, mi2s_rx_cfg[idx].channels);
  2680. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2681. return 0;
  2682. }
  2683. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2684. struct snd_ctl_elem_value *ucontrol)
  2685. {
  2686. int idx = mi2s_get_port_idx(kcontrol);
  2687. if (idx < 0)
  2688. return idx;
  2689. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2690. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2691. idx, mi2s_rx_cfg[idx].channels);
  2692. return 1;
  2693. }
  2694. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2695. struct snd_ctl_elem_value *ucontrol)
  2696. {
  2697. int idx = mi2s_get_port_idx(kcontrol);
  2698. if (idx < 0)
  2699. return idx;
  2700. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2701. idx, mi2s_tx_cfg[idx].channels);
  2702. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2703. return 0;
  2704. }
  2705. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2706. struct snd_ctl_elem_value *ucontrol)
  2707. {
  2708. int idx = mi2s_get_port_idx(kcontrol);
  2709. if (idx < 0)
  2710. return idx;
  2711. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2712. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2713. idx, mi2s_tx_cfg[idx].channels);
  2714. return 1;
  2715. }
  2716. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2717. struct snd_ctl_elem_value *ucontrol)
  2718. {
  2719. int idx = mi2s_get_port_idx(kcontrol);
  2720. if (idx < 0)
  2721. return idx;
  2722. ucontrol->value.enumerated.item[0] =
  2723. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2724. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2725. idx, mi2s_rx_cfg[idx].bit_format,
  2726. ucontrol->value.enumerated.item[0]);
  2727. return 0;
  2728. }
  2729. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2730. struct snd_ctl_elem_value *ucontrol)
  2731. {
  2732. int idx = mi2s_get_port_idx(kcontrol);
  2733. if (idx < 0)
  2734. return idx;
  2735. mi2s_rx_cfg[idx].bit_format =
  2736. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2737. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2738. idx, mi2s_rx_cfg[idx].bit_format,
  2739. ucontrol->value.enumerated.item[0]);
  2740. return 0;
  2741. }
  2742. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2743. struct snd_ctl_elem_value *ucontrol)
  2744. {
  2745. int idx = mi2s_get_port_idx(kcontrol);
  2746. if (idx < 0)
  2747. return idx;
  2748. ucontrol->value.enumerated.item[0] =
  2749. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2750. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2751. idx, mi2s_tx_cfg[idx].bit_format,
  2752. ucontrol->value.enumerated.item[0]);
  2753. return 0;
  2754. }
  2755. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2756. struct snd_ctl_elem_value *ucontrol)
  2757. {
  2758. int idx = mi2s_get_port_idx(kcontrol);
  2759. if (idx < 0)
  2760. return idx;
  2761. mi2s_tx_cfg[idx].bit_format =
  2762. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2763. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2764. idx, mi2s_tx_cfg[idx].bit_format,
  2765. ucontrol->value.enumerated.item[0]);
  2766. return 0;
  2767. }
  2768. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2769. struct snd_ctl_elem_value *ucontrol)
  2770. {
  2771. int idx = aux_pcm_get_port_idx(kcontrol);
  2772. if (idx < 0)
  2773. return idx;
  2774. ucontrol->value.enumerated.item[0] =
  2775. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2776. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2777. idx, aux_pcm_rx_cfg[idx].bit_format,
  2778. ucontrol->value.enumerated.item[0]);
  2779. return 0;
  2780. }
  2781. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2782. struct snd_ctl_elem_value *ucontrol)
  2783. {
  2784. int idx = aux_pcm_get_port_idx(kcontrol);
  2785. if (idx < 0)
  2786. return idx;
  2787. aux_pcm_rx_cfg[idx].bit_format =
  2788. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2789. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2790. idx, aux_pcm_rx_cfg[idx].bit_format,
  2791. ucontrol->value.enumerated.item[0]);
  2792. return 0;
  2793. }
  2794. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2795. struct snd_ctl_elem_value *ucontrol)
  2796. {
  2797. int idx = aux_pcm_get_port_idx(kcontrol);
  2798. if (idx < 0)
  2799. return idx;
  2800. ucontrol->value.enumerated.item[0] =
  2801. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2802. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2803. idx, aux_pcm_tx_cfg[idx].bit_format,
  2804. ucontrol->value.enumerated.item[0]);
  2805. return 0;
  2806. }
  2807. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2808. struct snd_ctl_elem_value *ucontrol)
  2809. {
  2810. int idx = aux_pcm_get_port_idx(kcontrol);
  2811. if (idx < 0)
  2812. return idx;
  2813. aux_pcm_tx_cfg[idx].bit_format =
  2814. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2815. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2816. idx, aux_pcm_tx_cfg[idx].bit_format,
  2817. ucontrol->value.enumerated.item[0]);
  2818. return 0;
  2819. }
  2820. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2821. {
  2822. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2823. struct snd_soc_card *card = codec->component.card;
  2824. struct msm_asoc_mach_data *pdata =
  2825. snd_soc_card_get_drvdata(card);
  2826. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2827. msm_hifi_control);
  2828. if (!pdata || !pdata->hph_en1_gpio_p) {
  2829. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2830. return -EINVAL;
  2831. }
  2832. if (msm_hifi_control == MSM_HIFI_ON) {
  2833. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2834. /* 5msec delay needed as per HW requirement */
  2835. usleep_range(5000, 5010);
  2836. } else {
  2837. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2838. }
  2839. snd_soc_dapm_sync(dapm);
  2840. return 0;
  2841. }
  2842. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2843. struct snd_ctl_elem_value *ucontrol)
  2844. {
  2845. pr_debug("%s: msm_hifi_control = %d\n",
  2846. __func__, msm_hifi_control);
  2847. ucontrol->value.integer.value[0] = msm_hifi_control;
  2848. return 0;
  2849. }
  2850. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2851. struct snd_ctl_elem_value *ucontrol)
  2852. {
  2853. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2854. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2855. __func__, ucontrol->value.integer.value[0]);
  2856. msm_hifi_control = ucontrol->value.integer.value[0];
  2857. msm_hifi_ctrl(codec);
  2858. return 0;
  2859. }
  2860. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2861. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2862. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2863. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2864. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2865. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2866. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2867. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2868. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2869. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2870. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2871. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2872. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2873. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2874. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2875. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2876. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2877. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2878. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2879. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2880. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2881. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2882. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2883. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2884. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2885. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2886. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2887. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2888. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2889. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2890. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2891. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2892. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2893. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2894. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2895. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2896. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2897. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2898. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2899. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2900. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2901. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2902. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2903. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2904. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2905. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2906. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2907. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2908. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2909. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2910. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2911. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2912. wsa_cdc_dma_rx_0_sample_rate,
  2913. cdc_dma_rx_sample_rate_get,
  2914. cdc_dma_rx_sample_rate_put),
  2915. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2916. wsa_cdc_dma_rx_1_sample_rate,
  2917. cdc_dma_rx_sample_rate_get,
  2918. cdc_dma_rx_sample_rate_put),
  2919. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2920. rx_cdc_dma_rx_0_sample_rate,
  2921. cdc_dma_rx_sample_rate_get,
  2922. cdc_dma_rx_sample_rate_put),
  2923. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2924. rx_cdc_dma_rx_1_sample_rate,
  2925. cdc_dma_rx_sample_rate_get,
  2926. cdc_dma_rx_sample_rate_put),
  2927. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2928. rx_cdc_dma_rx_2_sample_rate,
  2929. cdc_dma_rx_sample_rate_get,
  2930. cdc_dma_rx_sample_rate_put),
  2931. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2932. rx_cdc_dma_rx_3_sample_rate,
  2933. cdc_dma_rx_sample_rate_get,
  2934. cdc_dma_rx_sample_rate_put),
  2935. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2936. rx_cdc_dma_rx_5_sample_rate,
  2937. cdc_dma_rx_sample_rate_get,
  2938. cdc_dma_rx_sample_rate_put),
  2939. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2940. wsa_cdc_dma_tx_0_sample_rate,
  2941. cdc_dma_tx_sample_rate_get,
  2942. cdc_dma_tx_sample_rate_put),
  2943. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2944. wsa_cdc_dma_tx_1_sample_rate,
  2945. cdc_dma_tx_sample_rate_get,
  2946. cdc_dma_tx_sample_rate_put),
  2947. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2948. wsa_cdc_dma_tx_2_sample_rate,
  2949. cdc_dma_tx_sample_rate_get,
  2950. cdc_dma_tx_sample_rate_put),
  2951. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2952. tx_cdc_dma_tx_0_sample_rate,
  2953. cdc_dma_tx_sample_rate_get,
  2954. cdc_dma_tx_sample_rate_put),
  2955. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2956. tx_cdc_dma_tx_3_sample_rate,
  2957. cdc_dma_tx_sample_rate_get,
  2958. cdc_dma_tx_sample_rate_put),
  2959. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2960. tx_cdc_dma_tx_4_sample_rate,
  2961. cdc_dma_tx_sample_rate_get,
  2962. cdc_dma_tx_sample_rate_put),
  2963. };
  2964. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  2965. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2966. slim_rx_ch_get, slim_rx_ch_put),
  2967. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2968. slim_rx_ch_get, slim_rx_ch_put),
  2969. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2970. slim_tx_ch_get, slim_tx_ch_put),
  2971. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2972. slim_tx_ch_get, slim_tx_ch_put),
  2973. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2974. slim_rx_ch_get, slim_rx_ch_put),
  2975. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2976. slim_rx_ch_get, slim_rx_ch_put),
  2977. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2978. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2979. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2980. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2981. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2982. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2983. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2984. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2985. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2986. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2987. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2988. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2989. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2990. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2991. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2992. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2993. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2994. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2995. };
  2996. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2997. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2998. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2999. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3000. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3001. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3002. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3003. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3004. proxy_rx_ch_get, proxy_rx_ch_put),
  3005. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3006. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3007. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3008. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3009. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3010. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3011. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3012. usb_audio_rx_sample_rate_get,
  3013. usb_audio_rx_sample_rate_put),
  3014. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3015. usb_audio_tx_sample_rate_get,
  3016. usb_audio_tx_sample_rate_put),
  3017. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3018. ext_disp_rx_sample_rate_get,
  3019. ext_disp_rx_sample_rate_put),
  3020. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3021. tdm_rx_sample_rate_get,
  3022. tdm_rx_sample_rate_put),
  3023. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3024. tdm_tx_sample_rate_get,
  3025. tdm_tx_sample_rate_put),
  3026. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3027. tdm_rx_format_get,
  3028. tdm_rx_format_put),
  3029. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3030. tdm_tx_format_get,
  3031. tdm_tx_format_put),
  3032. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3033. tdm_rx_ch_get,
  3034. tdm_rx_ch_put),
  3035. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3036. tdm_tx_ch_get,
  3037. tdm_tx_ch_put),
  3038. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3039. tdm_rx_sample_rate_get,
  3040. tdm_rx_sample_rate_put),
  3041. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3042. tdm_tx_sample_rate_get,
  3043. tdm_tx_sample_rate_put),
  3044. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3045. tdm_rx_format_get,
  3046. tdm_rx_format_put),
  3047. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3048. tdm_tx_format_get,
  3049. tdm_tx_format_put),
  3050. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3051. tdm_rx_ch_get,
  3052. tdm_rx_ch_put),
  3053. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3054. tdm_tx_ch_get,
  3055. tdm_tx_ch_put),
  3056. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3057. tdm_rx_sample_rate_get,
  3058. tdm_rx_sample_rate_put),
  3059. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3060. tdm_tx_sample_rate_get,
  3061. tdm_tx_sample_rate_put),
  3062. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3063. tdm_rx_format_get,
  3064. tdm_rx_format_put),
  3065. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3066. tdm_tx_format_get,
  3067. tdm_tx_format_put),
  3068. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3069. tdm_rx_ch_get,
  3070. tdm_rx_ch_put),
  3071. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3072. tdm_tx_ch_get,
  3073. tdm_tx_ch_put),
  3074. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3075. tdm_rx_sample_rate_get,
  3076. tdm_rx_sample_rate_put),
  3077. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3078. tdm_tx_sample_rate_get,
  3079. tdm_tx_sample_rate_put),
  3080. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3081. tdm_rx_format_get,
  3082. tdm_rx_format_put),
  3083. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3084. tdm_tx_format_get,
  3085. tdm_tx_format_put),
  3086. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3087. tdm_rx_ch_get,
  3088. tdm_rx_ch_put),
  3089. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3090. tdm_tx_ch_get,
  3091. tdm_tx_ch_put),
  3092. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3093. tdm_rx_sample_rate_get,
  3094. tdm_rx_sample_rate_put),
  3095. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3096. tdm_tx_sample_rate_get,
  3097. tdm_tx_sample_rate_put),
  3098. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3099. tdm_rx_format_get,
  3100. tdm_rx_format_put),
  3101. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3102. tdm_tx_format_get,
  3103. tdm_tx_format_put),
  3104. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3105. tdm_rx_ch_get,
  3106. tdm_rx_ch_put),
  3107. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3108. tdm_tx_ch_get,
  3109. tdm_tx_ch_put),
  3110. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3111. aux_pcm_rx_sample_rate_get,
  3112. aux_pcm_rx_sample_rate_put),
  3113. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3114. aux_pcm_rx_sample_rate_get,
  3115. aux_pcm_rx_sample_rate_put),
  3116. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3117. aux_pcm_rx_sample_rate_get,
  3118. aux_pcm_rx_sample_rate_put),
  3119. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3120. aux_pcm_rx_sample_rate_get,
  3121. aux_pcm_rx_sample_rate_put),
  3122. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3123. aux_pcm_rx_sample_rate_get,
  3124. aux_pcm_rx_sample_rate_put),
  3125. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3126. aux_pcm_tx_sample_rate_get,
  3127. aux_pcm_tx_sample_rate_put),
  3128. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3129. aux_pcm_tx_sample_rate_get,
  3130. aux_pcm_tx_sample_rate_put),
  3131. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3132. aux_pcm_tx_sample_rate_get,
  3133. aux_pcm_tx_sample_rate_put),
  3134. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3135. aux_pcm_tx_sample_rate_get,
  3136. aux_pcm_tx_sample_rate_put),
  3137. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3138. aux_pcm_tx_sample_rate_get,
  3139. aux_pcm_tx_sample_rate_put),
  3140. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3141. mi2s_rx_sample_rate_get,
  3142. mi2s_rx_sample_rate_put),
  3143. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3144. mi2s_rx_sample_rate_get,
  3145. mi2s_rx_sample_rate_put),
  3146. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3147. mi2s_rx_sample_rate_get,
  3148. mi2s_rx_sample_rate_put),
  3149. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3150. mi2s_rx_sample_rate_get,
  3151. mi2s_rx_sample_rate_put),
  3152. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3153. mi2s_rx_sample_rate_get,
  3154. mi2s_rx_sample_rate_put),
  3155. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3156. mi2s_tx_sample_rate_get,
  3157. mi2s_tx_sample_rate_put),
  3158. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3159. mi2s_tx_sample_rate_get,
  3160. mi2s_tx_sample_rate_put),
  3161. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3162. mi2s_tx_sample_rate_get,
  3163. mi2s_tx_sample_rate_put),
  3164. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3165. mi2s_tx_sample_rate_get,
  3166. mi2s_tx_sample_rate_put),
  3167. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3168. mi2s_tx_sample_rate_get,
  3169. mi2s_tx_sample_rate_put),
  3170. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3171. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3172. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3173. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3174. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3175. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3176. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3177. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3178. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3179. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3180. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3181. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3182. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3183. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3184. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3185. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3186. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3187. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3188. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3189. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3190. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3191. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3192. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3193. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3194. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3195. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3196. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3197. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3198. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3199. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3200. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3201. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3202. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3203. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3204. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3205. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3206. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3207. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3208. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3209. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3210. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3211. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3212. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3213. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3214. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3215. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3216. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3217. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3218. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3219. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3220. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3221. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3222. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3223. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3224. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3225. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3226. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3227. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3228. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3229. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3230. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3231. msm_hifi_put),
  3232. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3233. msm_bt_sample_rate_get,
  3234. msm_bt_sample_rate_put),
  3235. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3236. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3237. };
  3238. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3239. int enable, bool dapm)
  3240. {
  3241. int ret = 0;
  3242. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3243. ret = tavil_cdc_mclk_enable(codec, enable);
  3244. } else {
  3245. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3246. __func__);
  3247. ret = -EINVAL;
  3248. }
  3249. return ret;
  3250. }
  3251. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3252. int enable, bool dapm)
  3253. {
  3254. int ret = 0;
  3255. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3256. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3257. } else {
  3258. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3259. __func__);
  3260. ret = -EINVAL;
  3261. }
  3262. return ret;
  3263. }
  3264. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3265. struct snd_kcontrol *kcontrol, int event)
  3266. {
  3267. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3268. pr_debug("%s: event = %d\n", __func__, event);
  3269. switch (event) {
  3270. case SND_SOC_DAPM_PRE_PMU:
  3271. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3272. case SND_SOC_DAPM_POST_PMD:
  3273. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3274. }
  3275. return 0;
  3276. }
  3277. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3278. struct snd_kcontrol *kcontrol, int event)
  3279. {
  3280. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3281. pr_debug("%s: event = %d\n", __func__, event);
  3282. switch (event) {
  3283. case SND_SOC_DAPM_PRE_PMU:
  3284. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3285. case SND_SOC_DAPM_POST_PMD:
  3286. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3287. }
  3288. return 0;
  3289. }
  3290. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3291. struct snd_kcontrol *k, int event)
  3292. {
  3293. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3294. struct snd_soc_card *card = codec->component.card;
  3295. struct msm_asoc_mach_data *pdata =
  3296. snd_soc_card_get_drvdata(card);
  3297. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3298. __func__, msm_hifi_control);
  3299. if (!pdata || !pdata->hph_en0_gpio_p) {
  3300. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3301. return -EINVAL;
  3302. }
  3303. if (msm_hifi_control != MSM_HIFI_ON) {
  3304. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3305. __func__);
  3306. return 0;
  3307. }
  3308. switch (event) {
  3309. case SND_SOC_DAPM_POST_PMU:
  3310. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3311. break;
  3312. case SND_SOC_DAPM_PRE_PMD:
  3313. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3314. break;
  3315. }
  3316. return 0;
  3317. }
  3318. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3319. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3320. msm_mclk_event,
  3321. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3322. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3323. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3324. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3325. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3326. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3327. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3328. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3329. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3330. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3331. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3332. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3333. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3334. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3335. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3336. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3337. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3338. };
  3339. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3340. struct snd_kcontrol *kcontrol, int event)
  3341. {
  3342. struct msm_asoc_mach_data *pdata = NULL;
  3343. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3344. int ret = 0;
  3345. u32 dmic_idx;
  3346. int *dmic_gpio_cnt;
  3347. struct device_node *dmic_gpio;
  3348. char *wname;
  3349. wname = strpbrk(w->name, "0123");
  3350. if (!wname) {
  3351. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3352. return -EINVAL;
  3353. }
  3354. ret = kstrtouint(wname, 10, &dmic_idx);
  3355. if (ret < 0) {
  3356. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3357. __func__);
  3358. return -EINVAL;
  3359. }
  3360. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3361. switch (dmic_idx) {
  3362. case 0:
  3363. case 1:
  3364. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3365. dmic_gpio = pdata->dmic01_gpio_p;
  3366. break;
  3367. case 2:
  3368. case 3:
  3369. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3370. dmic_gpio = pdata->dmic23_gpio_p;
  3371. break;
  3372. default:
  3373. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3374. __func__);
  3375. return -EINVAL;
  3376. }
  3377. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3378. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3379. switch (event) {
  3380. case SND_SOC_DAPM_PRE_PMU:
  3381. (*dmic_gpio_cnt)++;
  3382. if (*dmic_gpio_cnt == 1) {
  3383. ret = msm_cdc_pinctrl_select_active_state(
  3384. dmic_gpio);
  3385. if (ret < 0) {
  3386. pr_err("%s: gpio set cannot be activated %sd",
  3387. __func__, "dmic_gpio");
  3388. return ret;
  3389. }
  3390. }
  3391. break;
  3392. case SND_SOC_DAPM_POST_PMD:
  3393. (*dmic_gpio_cnt)--;
  3394. if (*dmic_gpio_cnt == 0) {
  3395. ret = msm_cdc_pinctrl_select_sleep_state(
  3396. dmic_gpio);
  3397. if (ret < 0) {
  3398. pr_err("%s: gpio set cannot be de-activated %sd",
  3399. __func__, "dmic_gpio");
  3400. return ret;
  3401. }
  3402. }
  3403. break;
  3404. default:
  3405. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3406. return -EINVAL;
  3407. }
  3408. return 0;
  3409. }
  3410. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3411. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3412. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3413. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3414. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3415. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3416. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3417. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3418. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3419. };
  3420. static inline int param_is_mask(int p)
  3421. {
  3422. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3423. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3424. }
  3425. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3426. int n)
  3427. {
  3428. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3429. }
  3430. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3431. unsigned int bit)
  3432. {
  3433. if (bit >= SNDRV_MASK_MAX)
  3434. return;
  3435. if (param_is_mask(n)) {
  3436. struct snd_mask *m = param_to_mask(p, n);
  3437. m->bits[0] = 0;
  3438. m->bits[1] = 0;
  3439. m->bits[bit >> 5] |= (1 << (bit & 31));
  3440. }
  3441. }
  3442. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3443. {
  3444. int ch_id = 0;
  3445. switch (be_id) {
  3446. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3447. ch_id = SLIM_RX_0;
  3448. break;
  3449. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3450. ch_id = SLIM_RX_1;
  3451. break;
  3452. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3453. ch_id = SLIM_RX_2;
  3454. break;
  3455. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3456. ch_id = SLIM_RX_3;
  3457. break;
  3458. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3459. ch_id = SLIM_RX_4;
  3460. break;
  3461. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3462. ch_id = SLIM_RX_6;
  3463. break;
  3464. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3465. ch_id = SLIM_TX_0;
  3466. break;
  3467. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3468. ch_id = SLIM_TX_3;
  3469. break;
  3470. default:
  3471. ch_id = SLIM_RX_0;
  3472. break;
  3473. }
  3474. return ch_id;
  3475. }
  3476. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3477. {
  3478. int idx = 0;
  3479. switch (be_id) {
  3480. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3481. idx = WSA_CDC_DMA_RX_0;
  3482. break;
  3483. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3484. idx = WSA_CDC_DMA_TX_0;
  3485. break;
  3486. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3487. idx = WSA_CDC_DMA_RX_1;
  3488. break;
  3489. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3490. idx = WSA_CDC_DMA_TX_1;
  3491. break;
  3492. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3493. idx = WSA_CDC_DMA_TX_2;
  3494. break;
  3495. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3496. idx = RX_CDC_DMA_RX_0;
  3497. break;
  3498. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3499. idx = RX_CDC_DMA_RX_1;
  3500. break;
  3501. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3502. idx = RX_CDC_DMA_RX_2;
  3503. break;
  3504. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3505. idx = RX_CDC_DMA_RX_3;
  3506. break;
  3507. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3508. idx = RX_CDC_DMA_RX_5;
  3509. break;
  3510. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3511. idx = TX_CDC_DMA_TX_0;
  3512. break;
  3513. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3514. idx = TX_CDC_DMA_TX_3;
  3515. break;
  3516. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3517. idx = TX_CDC_DMA_TX_4;
  3518. break;
  3519. default:
  3520. idx = RX_CDC_DMA_RX_0;
  3521. break;
  3522. }
  3523. return idx;
  3524. }
  3525. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3526. {
  3527. int idx = -EINVAL;
  3528. switch (be_id) {
  3529. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3530. idx = DP_RX_IDX;
  3531. break;
  3532. default:
  3533. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3534. idx = -EINVAL;
  3535. break;
  3536. }
  3537. return idx;
  3538. }
  3539. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3540. struct snd_pcm_hw_params *params)
  3541. {
  3542. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3543. struct snd_interval *rate = hw_param_interval(params,
  3544. SNDRV_PCM_HW_PARAM_RATE);
  3545. struct snd_interval *channels = hw_param_interval(params,
  3546. SNDRV_PCM_HW_PARAM_CHANNELS);
  3547. int rc = 0;
  3548. int idx;
  3549. void *config = NULL;
  3550. struct snd_soc_codec *codec = NULL;
  3551. pr_debug("%s: format = %d, rate = %d\n",
  3552. __func__, params_format(params), params_rate(params));
  3553. switch (dai_link->id) {
  3554. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3555. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3556. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3557. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3558. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3559. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3560. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3561. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3562. slim_rx_cfg[idx].bit_format);
  3563. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3564. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3565. break;
  3566. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3567. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3568. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3569. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3570. slim_tx_cfg[idx].bit_format);
  3571. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3572. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3573. break;
  3574. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3575. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3576. slim_tx_cfg[1].bit_format);
  3577. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3578. channels->min = channels->max = slim_tx_cfg[1].channels;
  3579. break;
  3580. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3581. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3582. SNDRV_PCM_FORMAT_S32_LE);
  3583. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3584. channels->min = channels->max = msm_vi_feed_tx_ch;
  3585. break;
  3586. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3587. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3588. slim_rx_cfg[5].bit_format);
  3589. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3590. channels->min = channels->max = slim_rx_cfg[5].channels;
  3591. break;
  3592. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3593. codec = rtd->codec;
  3594. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3595. channels->min = channels->max = 1;
  3596. config = msm_codec_fn.get_afe_config_fn(codec,
  3597. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3598. if (config) {
  3599. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3600. config, SLIMBUS_5_TX);
  3601. if (rc)
  3602. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3603. __func__, rc);
  3604. }
  3605. break;
  3606. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3607. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3608. slim_rx_cfg[SLIM_RX_7].bit_format);
  3609. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3610. channels->min = channels->max =
  3611. slim_rx_cfg[SLIM_RX_7].channels;
  3612. break;
  3613. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3614. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3615. channels->min = channels->max =
  3616. slim_tx_cfg[SLIM_TX_7].channels;
  3617. break;
  3618. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3619. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3620. channels->min = channels->max =
  3621. slim_tx_cfg[SLIM_TX_8].channels;
  3622. break;
  3623. case MSM_BACKEND_DAI_USB_RX:
  3624. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3625. usb_rx_cfg.bit_format);
  3626. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3627. channels->min = channels->max = usb_rx_cfg.channels;
  3628. break;
  3629. case MSM_BACKEND_DAI_USB_TX:
  3630. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3631. usb_tx_cfg.bit_format);
  3632. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3633. channels->min = channels->max = usb_tx_cfg.channels;
  3634. break;
  3635. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3636. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3637. if (idx < 0) {
  3638. pr_err("%s: Incorrect ext disp idx %d\n",
  3639. __func__, idx);
  3640. rc = idx;
  3641. goto done;
  3642. }
  3643. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3644. ext_disp_rx_cfg[idx].bit_format);
  3645. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3646. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3647. break;
  3648. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3649. channels->min = channels->max = proxy_rx_cfg.channels;
  3650. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3651. break;
  3652. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3653. channels->min = channels->max =
  3654. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3655. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3656. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3657. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3658. break;
  3659. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3660. channels->min = channels->max =
  3661. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3662. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3663. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3664. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3665. break;
  3666. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3667. channels->min = channels->max =
  3668. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3669. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3670. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3671. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3672. break;
  3673. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3674. channels->min = channels->max =
  3675. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3676. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3677. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3678. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3679. break;
  3680. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3681. channels->min = channels->max =
  3682. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3683. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3684. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3685. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3686. break;
  3687. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3688. channels->min = channels->max =
  3689. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3690. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3691. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3692. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3693. break;
  3694. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3695. channels->min = channels->max =
  3696. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3697. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3698. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3699. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3700. break;
  3701. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3702. channels->min = channels->max =
  3703. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3704. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3705. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3706. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3707. break;
  3708. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3709. channels->min = channels->max =
  3710. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3711. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3712. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3713. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3714. break;
  3715. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3716. channels->min = channels->max =
  3717. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3718. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3719. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3720. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3721. break;
  3722. case MSM_BACKEND_DAI_AUXPCM_RX:
  3723. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3724. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3725. rate->min = rate->max =
  3726. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3727. channels->min = channels->max =
  3728. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3729. break;
  3730. case MSM_BACKEND_DAI_AUXPCM_TX:
  3731. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3732. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3733. rate->min = rate->max =
  3734. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3735. channels->min = channels->max =
  3736. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3737. break;
  3738. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3739. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3740. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3741. rate->min = rate->max =
  3742. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3743. channels->min = channels->max =
  3744. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3745. break;
  3746. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3747. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3748. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3749. rate->min = rate->max =
  3750. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3751. channels->min = channels->max =
  3752. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3753. break;
  3754. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3755. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3756. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3757. rate->min = rate->max =
  3758. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3759. channels->min = channels->max =
  3760. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3761. break;
  3762. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3763. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3764. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3765. rate->min = rate->max =
  3766. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3767. channels->min = channels->max =
  3768. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3769. break;
  3770. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3771. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3772. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3773. rate->min = rate->max =
  3774. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3775. channels->min = channels->max =
  3776. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3777. break;
  3778. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3779. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3780. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3781. rate->min = rate->max =
  3782. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3783. channels->min = channels->max =
  3784. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3785. break;
  3786. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3787. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3788. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3789. rate->min = rate->max =
  3790. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3791. channels->min = channels->max =
  3792. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3793. break;
  3794. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3795. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3796. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3797. rate->min = rate->max =
  3798. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3799. channels->min = channels->max =
  3800. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3801. break;
  3802. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3803. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3804. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3805. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3806. channels->min = channels->max =
  3807. mi2s_rx_cfg[PRIM_MI2S].channels;
  3808. break;
  3809. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3810. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3811. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3812. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3813. channels->min = channels->max =
  3814. mi2s_tx_cfg[PRIM_MI2S].channels;
  3815. break;
  3816. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3817. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3818. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3819. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3820. channels->min = channels->max =
  3821. mi2s_rx_cfg[SEC_MI2S].channels;
  3822. break;
  3823. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3824. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3825. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3826. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3827. channels->min = channels->max =
  3828. mi2s_tx_cfg[SEC_MI2S].channels;
  3829. break;
  3830. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3831. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3832. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3833. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3834. channels->min = channels->max =
  3835. mi2s_rx_cfg[TERT_MI2S].channels;
  3836. break;
  3837. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3838. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3839. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3840. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3841. channels->min = channels->max =
  3842. mi2s_tx_cfg[TERT_MI2S].channels;
  3843. break;
  3844. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3845. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3846. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3847. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3848. channels->min = channels->max =
  3849. mi2s_rx_cfg[QUAT_MI2S].channels;
  3850. break;
  3851. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3852. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3853. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3854. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3855. channels->min = channels->max =
  3856. mi2s_tx_cfg[QUAT_MI2S].channels;
  3857. break;
  3858. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3859. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3860. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3861. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3862. channels->min = channels->max =
  3863. mi2s_rx_cfg[QUIN_MI2S].channels;
  3864. break;
  3865. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3866. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3867. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3868. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3869. channels->min = channels->max =
  3870. mi2s_tx_cfg[QUIN_MI2S].channels;
  3871. break;
  3872. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3873. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3874. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3875. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3876. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3877. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3878. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3879. cdc_dma_rx_cfg[idx].bit_format);
  3880. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3881. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3882. break;
  3883. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3884. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3885. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3886. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3887. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3888. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3889. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3890. cdc_dma_tx_cfg[idx].bit_format);
  3891. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3892. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3893. break;
  3894. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3895. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3896. SNDRV_PCM_FORMAT_S32_LE);
  3897. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3898. channels->min = channels->max = msm_vi_feed_tx_ch;
  3899. break;
  3900. default:
  3901. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3902. break;
  3903. }
  3904. done:
  3905. return rc;
  3906. }
  3907. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3908. {
  3909. int value = 0;
  3910. bool ret = 0;
  3911. struct snd_soc_card *card = codec->component.card;
  3912. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3913. struct pinctrl_state *en2_pinctrl_active;
  3914. struct pinctrl_state *en2_pinctrl_sleep;
  3915. if (!pdata->usbc_en2_gpio_p) {
  3916. if (active) {
  3917. /* if active and usbc_en2_gpio undefined, get pin */
  3918. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3919. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3920. dev_err(card->dev,
  3921. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3922. __func__,
  3923. PTR_ERR(pdata->usbc_en2_gpio_p));
  3924. pdata->usbc_en2_gpio_p = NULL;
  3925. return false;
  3926. }
  3927. } else {
  3928. /* if not active and usbc_en2_gpio undefined, return */
  3929. return false;
  3930. }
  3931. }
  3932. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3933. "qcom,usbc-analog-en2-gpio", 0);
  3934. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3935. dev_err(card->dev, "%s, property %s not in node %s",
  3936. __func__, "qcom,usbc-analog-en2-gpio",
  3937. card->dev->of_node->full_name);
  3938. return false;
  3939. }
  3940. en2_pinctrl_active = pinctrl_lookup_state(
  3941. pdata->usbc_en2_gpio_p, "aud_active");
  3942. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3943. dev_err(card->dev,
  3944. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3945. __func__, PTR_ERR(en2_pinctrl_active));
  3946. ret = false;
  3947. goto err_lookup_state;
  3948. }
  3949. en2_pinctrl_sleep = pinctrl_lookup_state(
  3950. pdata->usbc_en2_gpio_p, "aud_sleep");
  3951. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3952. dev_err(card->dev,
  3953. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3954. __func__, PTR_ERR(en2_pinctrl_sleep));
  3955. ret = false;
  3956. goto err_lookup_state;
  3957. }
  3958. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3959. if (active) {
  3960. dev_dbg(codec->dev, "%s: enter\n", __func__);
  3961. if (pdata->usbc_en2_gpio_p) {
  3962. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3963. if (value)
  3964. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3965. en2_pinctrl_sleep);
  3966. else
  3967. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3968. en2_pinctrl_active);
  3969. } else if (pdata->usbc_en2_gpio >= 0) {
  3970. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3971. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  3972. }
  3973. pr_debug("%s: swap select switch %d to %d\n", __func__,
  3974. value, !value);
  3975. ret = true;
  3976. } else {
  3977. /* if not active, release usbc_en2_gpio_p pin */
  3978. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3979. en2_pinctrl_sleep);
  3980. }
  3981. err_lookup_state:
  3982. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  3983. pdata->usbc_en2_gpio_p = NULL;
  3984. return ret;
  3985. }
  3986. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3987. {
  3988. int value = 0;
  3989. bool ret = false;
  3990. struct snd_soc_card *card;
  3991. struct msm_asoc_mach_data *pdata;
  3992. if (!codec) {
  3993. pr_err("%s codec is NULL\n", __func__);
  3994. return false;
  3995. }
  3996. card = codec->component.card;
  3997. pdata = snd_soc_card_get_drvdata(card);
  3998. if (!pdata)
  3999. return false;
  4000. if (wcd_mbhc_cfg.enable_usbc_analog)
  4001. return msm_usbc_swap_gnd_mic(codec, active);
  4002. /* if usbc is not defined, swap using us_euro_gpio_p */
  4003. if (pdata->us_euro_gpio_p) {
  4004. value = msm_cdc_pinctrl_get_state(
  4005. pdata->us_euro_gpio_p);
  4006. if (value)
  4007. msm_cdc_pinctrl_select_sleep_state(
  4008. pdata->us_euro_gpio_p);
  4009. else
  4010. msm_cdc_pinctrl_select_active_state(
  4011. pdata->us_euro_gpio_p);
  4012. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4013. __func__, value, !value);
  4014. ret = true;
  4015. }
  4016. return ret;
  4017. }
  4018. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4019. {
  4020. int ret = 0;
  4021. void *config_data = NULL;
  4022. if (!msm_codec_fn.get_afe_config_fn) {
  4023. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4024. __func__);
  4025. return -EINVAL;
  4026. }
  4027. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4028. AFE_CDC_REGISTERS_CONFIG);
  4029. if (config_data) {
  4030. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4031. if (ret) {
  4032. dev_err(codec->dev,
  4033. "%s: Failed to set codec registers config %d\n",
  4034. __func__, ret);
  4035. return ret;
  4036. }
  4037. }
  4038. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4039. AFE_CDC_REGISTER_PAGE_CONFIG);
  4040. if (config_data) {
  4041. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4042. 0);
  4043. if (ret)
  4044. dev_err(codec->dev,
  4045. "%s: Failed to set cdc register page config\n",
  4046. __func__);
  4047. }
  4048. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4049. AFE_SLIMBUS_SLAVE_CONFIG);
  4050. if (config_data) {
  4051. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4052. if (ret) {
  4053. dev_err(codec->dev,
  4054. "%s: Failed to set slimbus slave config %d\n",
  4055. __func__, ret);
  4056. return ret;
  4057. }
  4058. }
  4059. return 0;
  4060. }
  4061. static void msm_afe_clear_config(void)
  4062. {
  4063. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4064. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4065. }
  4066. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  4067. struct snd_card *card)
  4068. {
  4069. int ret = 0;
  4070. unsigned long timeout;
  4071. int adsp_ready = 0;
  4072. bool snd_card_online = 0;
  4073. timeout = jiffies +
  4074. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  4075. do {
  4076. if (!snd_card_online) {
  4077. snd_card_online = snd_card_is_online_state(card);
  4078. pr_debug("%s: Sound card is %s\n", __func__,
  4079. snd_card_online ? "Online" : "Offline");
  4080. }
  4081. if (!adsp_ready) {
  4082. adsp_ready = q6core_is_adsp_ready();
  4083. pr_debug("%s: ADSP Audio is %s\n", __func__,
  4084. adsp_ready ? "ready" : "not ready");
  4085. }
  4086. if (snd_card_online && adsp_ready)
  4087. break;
  4088. /*
  4089. * Sound card/ADSP will be coming up after subsystem restart and
  4090. * it might not be fully up when the control reaches
  4091. * here. So, wait for 50msec before checking ADSP state
  4092. */
  4093. msleep(50);
  4094. } while (time_after(timeout, jiffies));
  4095. if (!snd_card_online || !adsp_ready) {
  4096. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  4097. __func__,
  4098. snd_card_online ? "Online" : "Offline",
  4099. adsp_ready ? "ready" : "not ready");
  4100. ret = -ETIMEDOUT;
  4101. goto err;
  4102. }
  4103. ret = msm_afe_set_config(codec);
  4104. if (ret)
  4105. pr_err("%s: Failed to set AFE config. err %d\n",
  4106. __func__, ret);
  4107. return 0;
  4108. err:
  4109. return ret;
  4110. }
  4111. static int sm6150_notifier_service_cb(struct notifier_block *this,
  4112. unsigned long opcode, void *ptr)
  4113. {
  4114. int ret;
  4115. struct snd_soc_card *card = NULL;
  4116. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  4117. struct snd_soc_pcm_runtime *rtd;
  4118. struct snd_soc_codec *codec;
  4119. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  4120. switch (opcode) {
  4121. case AUDIO_NOTIFIER_SERVICE_DOWN:
  4122. /*
  4123. * Use flag to ignore initial boot notifications
  4124. * On initial boot msm_adsp_power_up_config is
  4125. * called on init. There is no need to clear
  4126. * and set the config again on initial boot.
  4127. */
  4128. if (is_initial_boot)
  4129. break;
  4130. msm_afe_clear_config();
  4131. break;
  4132. case AUDIO_NOTIFIER_SERVICE_UP:
  4133. if (is_initial_boot) {
  4134. is_initial_boot = false;
  4135. break;
  4136. }
  4137. if (!spdev)
  4138. return -EINVAL;
  4139. card = platform_get_drvdata(spdev);
  4140. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  4141. if (!rtd) {
  4142. dev_err(card->dev,
  4143. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  4144. __func__, be_dl_name);
  4145. ret = -EINVAL;
  4146. goto err;
  4147. }
  4148. codec = rtd->codec;
  4149. ret = msm_adsp_power_up_config(codec, card->snd_card);
  4150. if (ret < 0) {
  4151. dev_err(card->dev,
  4152. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  4153. __func__, ret);
  4154. goto err;
  4155. }
  4156. break;
  4157. default:
  4158. break;
  4159. }
  4160. err:
  4161. return NOTIFY_OK;
  4162. }
  4163. static struct notifier_block service_nb = {
  4164. .notifier_call = sm6150_notifier_service_cb,
  4165. .priority = -INT_MAX,
  4166. };
  4167. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4168. {
  4169. int ret = 0;
  4170. void *config_data;
  4171. struct snd_soc_codec *codec = rtd->codec;
  4172. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4173. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4174. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4175. struct snd_soc_component *aux_comp;
  4176. struct snd_card *card;
  4177. struct snd_info_entry *entry;
  4178. struct msm_asoc_mach_data *pdata =
  4179. snd_soc_card_get_drvdata(rtd->card);
  4180. /*
  4181. * Codec SLIMBUS configuration
  4182. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4183. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4184. * TX14, TX15, TX16
  4185. */
  4186. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4187. 150, 151};
  4188. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4189. 134, 135, 136, 137, 138, 139,
  4190. 140, 141, 142, 143};
  4191. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4192. rtd->pmdown_time = 0;
  4193. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4194. ARRAY_SIZE(msm_tavil_snd_controls));
  4195. if (ret < 0) {
  4196. pr_err("%s: add_codec_controls failed, err %d\n",
  4197. __func__, ret);
  4198. return ret;
  4199. }
  4200. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4201. ARRAY_SIZE(msm_common_snd_controls));
  4202. if (ret < 0) {
  4203. pr_err("%s: add_codec_controls failed, err %d\n",
  4204. __func__, ret);
  4205. return ret;
  4206. }
  4207. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4208. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4209. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4210. ARRAY_SIZE(wcd_audio_paths_tavil));
  4211. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4212. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4213. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4214. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4215. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4216. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4217. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4218. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4219. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4220. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4221. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4222. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4223. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4224. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4225. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4226. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4227. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4228. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4229. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4230. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4231. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4232. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4233. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4234. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4235. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4236. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4237. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4238. snd_soc_dapm_sync(dapm);
  4239. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4240. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4241. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4242. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  4243. if (ret) {
  4244. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4245. goto err;
  4246. }
  4247. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4248. AFE_AANC_VERSION);
  4249. if (config_data) {
  4250. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4251. if (ret) {
  4252. pr_err("%s: Failed to set aanc version %d\n",
  4253. __func__, ret);
  4254. goto err;
  4255. }
  4256. }
  4257. /*
  4258. * Send speaker configuration only for WSA8810.
  4259. * Default configuration is for WSA8815.
  4260. */
  4261. pr_debug("%s: Number of aux devices: %d\n",
  4262. __func__, rtd->card->num_aux_devs);
  4263. if (rtd->card->num_aux_devs &&
  4264. !list_empty(&rtd->card->aux_comp_list)) {
  4265. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4266. struct snd_soc_component, card_aux_list);
  4267. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4268. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4269. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4270. tavil_set_spkr_gain_offset(rtd->codec,
  4271. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4272. }
  4273. }
  4274. card = rtd->card->snd_card;
  4275. entry = snd_info_create_subdir(card->module, "codecs",
  4276. card->proc_root);
  4277. if (!entry) {
  4278. pr_debug("%s: Cannot create codecs module entry\n",
  4279. __func__);
  4280. ret = 0;
  4281. goto err;
  4282. }
  4283. pdata->codec_root = entry;
  4284. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4285. codec_reg_done = true;
  4286. return 0;
  4287. err:
  4288. return ret;
  4289. }
  4290. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4291. {
  4292. int ret = 0;
  4293. struct snd_soc_codec *codec = rtd->codec;
  4294. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4295. struct snd_card *card;
  4296. struct snd_info_entry *entry;
  4297. struct snd_soc_component *aux_comp;
  4298. struct msm_asoc_mach_data *pdata =
  4299. snd_soc_card_get_drvdata(rtd->card);
  4300. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4301. ARRAY_SIZE(msm_int_snd_controls));
  4302. if (ret < 0) {
  4303. pr_err("%s: add_codec_controls failed: %d\n",
  4304. __func__, ret);
  4305. return ret;
  4306. }
  4307. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4308. ARRAY_SIZE(msm_common_snd_controls));
  4309. if (ret < 0) {
  4310. pr_err("%s: add common snd controls failed: %d\n",
  4311. __func__, ret);
  4312. return ret;
  4313. }
  4314. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4315. ARRAY_SIZE(msm_int_dapm_widgets));
  4316. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4317. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4318. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4319. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4320. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4321. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4322. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4323. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4324. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4325. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4326. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4327. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4328. snd_soc_dapm_sync(dapm);
  4329. /*
  4330. * Send speaker configuration only for WSA8810.
  4331. * Default configuration is for WSA8815.
  4332. */
  4333. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4334. __func__, rtd->card->num_aux_devs);
  4335. if (rtd->card->num_aux_devs &&
  4336. !list_empty(&rtd->card->component_dev_list)) {
  4337. aux_comp = list_first_entry(
  4338. &rtd->card->component_dev_list,
  4339. struct snd_soc_component,
  4340. card_aux_list);
  4341. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4342. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4343. wsa_macro_set_spkr_mode(rtd->codec,
  4344. WSA_MACRO_SPKR_MODE_1);
  4345. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4346. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4347. }
  4348. }
  4349. card = rtd->card->snd_card;
  4350. if (!pdata->codec_root) {
  4351. entry = snd_info_create_subdir(card->module, "codecs",
  4352. card->proc_root);
  4353. if (!entry) {
  4354. pr_debug("%s: Cannot create codecs module entry\n",
  4355. __func__);
  4356. ret = 0;
  4357. goto err;
  4358. }
  4359. pdata->codec_root = entry;
  4360. }
  4361. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4362. codec_reg_done = true;
  4363. return 0;
  4364. err:
  4365. return ret;
  4366. }
  4367. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4368. {
  4369. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4370. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4371. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4372. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4373. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4374. }
  4375. static void *def_wcd_mbhc_cal(void)
  4376. {
  4377. void *wcd_mbhc_cal;
  4378. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4379. u16 *btn_high;
  4380. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4381. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4382. if (!wcd_mbhc_cal)
  4383. return NULL;
  4384. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4385. S(v_hs_max, 1600);
  4386. #undef S
  4387. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4388. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4389. #undef S
  4390. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4391. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4392. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4393. btn_high[0] = 75;
  4394. btn_high[1] = 150;
  4395. btn_high[2] = 237;
  4396. btn_high[3] = 500;
  4397. btn_high[4] = 500;
  4398. btn_high[5] = 500;
  4399. btn_high[6] = 500;
  4400. btn_high[7] = 500;
  4401. return wcd_mbhc_cal;
  4402. }
  4403. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4404. struct snd_pcm_hw_params *params)
  4405. {
  4406. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4407. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4408. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4409. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4410. int ret = 0;
  4411. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4412. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4413. u32 user_set_tx_ch = 0;
  4414. u32 rx_ch_count;
  4415. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4416. ret = snd_soc_dai_get_channel_map(codec_dai,
  4417. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4418. if (ret < 0) {
  4419. pr_err("%s: failed to get codec chan map, err:%d\n",
  4420. __func__, ret);
  4421. goto err;
  4422. }
  4423. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4424. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4425. slim_rx_cfg[5].channels);
  4426. rx_ch_count = slim_rx_cfg[5].channels;
  4427. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4428. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4429. slim_rx_cfg[2].channels);
  4430. rx_ch_count = slim_rx_cfg[2].channels;
  4431. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4432. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4433. slim_rx_cfg[6].channels);
  4434. rx_ch_count = slim_rx_cfg[6].channels;
  4435. } else {
  4436. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4437. slim_rx_cfg[0].channels);
  4438. rx_ch_count = slim_rx_cfg[0].channels;
  4439. }
  4440. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4441. rx_ch_count, rx_ch);
  4442. if (ret < 0) {
  4443. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4444. __func__, ret);
  4445. goto err;
  4446. }
  4447. } else {
  4448. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4449. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4450. ret = snd_soc_dai_get_channel_map(codec_dai,
  4451. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4452. if (ret < 0) {
  4453. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4454. __func__, ret);
  4455. goto err;
  4456. }
  4457. /* For <codec>_tx1 case */
  4458. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4459. user_set_tx_ch = slim_tx_cfg[0].channels;
  4460. /* For <codec>_tx3 case */
  4461. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4462. user_set_tx_ch = slim_tx_cfg[1].channels;
  4463. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4464. user_set_tx_ch = msm_vi_feed_tx_ch;
  4465. else
  4466. user_set_tx_ch = tx_ch_cnt;
  4467. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4468. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4469. tx_ch_cnt, dai_link->id);
  4470. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4471. user_set_tx_ch, tx_ch, 0, 0);
  4472. if (ret < 0)
  4473. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4474. __func__, ret);
  4475. }
  4476. err:
  4477. return ret;
  4478. }
  4479. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4480. struct snd_pcm_hw_params *params)
  4481. {
  4482. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4483. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4484. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4485. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4486. int ret = 0;
  4487. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4488. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4489. u32 user_set_tx_ch = 0;
  4490. u32 user_set_rx_ch = 0;
  4491. u32 ch_id;
  4492. ret = snd_soc_dai_get_channel_map(codec_dai,
  4493. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4494. &rx_ch_cdc_dma);
  4495. if (ret < 0) {
  4496. pr_err("%s: failed to get codec chan map, err:%d\n",
  4497. __func__, ret);
  4498. goto err;
  4499. }
  4500. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4501. switch (dai_link->id) {
  4502. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4503. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4504. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4505. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4506. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4507. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4508. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4509. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4510. {
  4511. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4512. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4513. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4514. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4515. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4516. user_set_rx_ch, &rx_ch_cdc_dma);
  4517. if (ret < 0) {
  4518. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4519. __func__, ret);
  4520. goto err;
  4521. }
  4522. }
  4523. break;
  4524. }
  4525. } else {
  4526. switch (dai_link->id) {
  4527. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4528. {
  4529. user_set_tx_ch = msm_vi_feed_tx_ch;
  4530. }
  4531. break;
  4532. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4533. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4534. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4535. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4536. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4537. {
  4538. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4539. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4540. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4541. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4542. }
  4543. break;
  4544. }
  4545. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4546. &tx_ch_cdc_dma, 0, 0);
  4547. if (ret < 0) {
  4548. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4549. __func__, ret);
  4550. goto err;
  4551. }
  4552. }
  4553. err:
  4554. return ret;
  4555. }
  4556. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4557. struct snd_pcm_hw_params *params)
  4558. {
  4559. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4560. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4561. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4562. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4563. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4564. unsigned int num_tx_ch = 0;
  4565. unsigned int num_rx_ch = 0;
  4566. int ret = 0;
  4567. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4568. num_rx_ch = params_channels(params);
  4569. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4570. codec_dai->name, codec_dai->id, num_rx_ch);
  4571. ret = snd_soc_dai_get_channel_map(codec_dai,
  4572. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4573. if (ret < 0) {
  4574. pr_err("%s: failed to get codec chan map, err:%d\n",
  4575. __func__, ret);
  4576. goto err;
  4577. }
  4578. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4579. num_rx_ch, rx_ch);
  4580. if (ret < 0) {
  4581. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4582. __func__, ret);
  4583. goto err;
  4584. }
  4585. } else {
  4586. num_tx_ch = params_channels(params);
  4587. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4588. codec_dai->name, codec_dai->id, num_tx_ch);
  4589. ret = snd_soc_dai_get_channel_map(codec_dai,
  4590. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4591. if (ret < 0) {
  4592. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4593. __func__, ret);
  4594. goto err;
  4595. }
  4596. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4597. num_tx_ch, tx_ch, 0, 0);
  4598. if (ret < 0) {
  4599. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4600. __func__, ret);
  4601. goto err;
  4602. }
  4603. }
  4604. err:
  4605. return ret;
  4606. }
  4607. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4608. struct snd_pcm_hw_params *params)
  4609. {
  4610. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4611. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4612. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4613. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4614. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4615. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4616. int ret;
  4617. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4618. codec_dai->name, codec_dai->id);
  4619. ret = snd_soc_dai_get_channel_map(codec_dai,
  4620. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4621. if (ret) {
  4622. dev_err(rtd->dev,
  4623. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4624. __func__, ret);
  4625. goto err;
  4626. }
  4627. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4628. __func__, tx_ch_cnt, dai_link->id);
  4629. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4630. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4631. if (ret)
  4632. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4633. __func__, ret);
  4634. err:
  4635. return ret;
  4636. }
  4637. static int msm_get_port_id(int be_id)
  4638. {
  4639. int afe_port_id;
  4640. switch (be_id) {
  4641. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4642. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4643. break;
  4644. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4645. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4646. break;
  4647. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4648. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4649. break;
  4650. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4651. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4652. break;
  4653. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4654. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4655. break;
  4656. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4657. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4658. break;
  4659. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4660. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4661. break;
  4662. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4663. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4664. break;
  4665. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4666. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4667. break;
  4668. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4669. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4670. break;
  4671. default:
  4672. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4673. afe_port_id = -EINVAL;
  4674. }
  4675. return afe_port_id;
  4676. }
  4677. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4678. {
  4679. u32 bit_per_sample;
  4680. switch (bit_format) {
  4681. case SNDRV_PCM_FORMAT_S32_LE:
  4682. case SNDRV_PCM_FORMAT_S24_3LE:
  4683. case SNDRV_PCM_FORMAT_S24_LE:
  4684. bit_per_sample = 32;
  4685. break;
  4686. case SNDRV_PCM_FORMAT_S16_LE:
  4687. default:
  4688. bit_per_sample = 16;
  4689. break;
  4690. }
  4691. return bit_per_sample;
  4692. }
  4693. static void update_mi2s_clk_val(int dai_id, int stream)
  4694. {
  4695. u32 bit_per_sample;
  4696. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4697. bit_per_sample =
  4698. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4699. mi2s_clk[dai_id].clk_freq_in_hz =
  4700. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4701. } else {
  4702. bit_per_sample =
  4703. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4704. mi2s_clk[dai_id].clk_freq_in_hz =
  4705. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4706. }
  4707. }
  4708. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4709. {
  4710. int ret = 0;
  4711. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4712. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4713. int port_id = 0;
  4714. int index = cpu_dai->id;
  4715. port_id = msm_get_port_id(rtd->dai_link->id);
  4716. if (port_id < 0) {
  4717. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4718. ret = port_id;
  4719. goto err;
  4720. }
  4721. if (enable) {
  4722. update_mi2s_clk_val(index, substream->stream);
  4723. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4724. mi2s_clk[index].clk_freq_in_hz);
  4725. }
  4726. mi2s_clk[index].enable = enable;
  4727. ret = afe_set_lpass_clock_v2(port_id,
  4728. &mi2s_clk[index]);
  4729. if (ret < 0) {
  4730. dev_err(rtd->card->dev,
  4731. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4732. __func__, port_id, ret);
  4733. goto err;
  4734. }
  4735. err:
  4736. return ret;
  4737. }
  4738. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4739. enum pinctrl_pin_state new_state)
  4740. {
  4741. int ret = 0;
  4742. int curr_state = 0;
  4743. if (pinctrl_info == NULL) {
  4744. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4745. ret = -EINVAL;
  4746. goto err;
  4747. }
  4748. if (pinctrl_info->pinctrl == NULL) {
  4749. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4750. ret = -EINVAL;
  4751. goto err;
  4752. }
  4753. curr_state = pinctrl_info->curr_state;
  4754. pinctrl_info->curr_state = new_state;
  4755. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4756. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4757. if (curr_state == pinctrl_info->curr_state) {
  4758. pr_debug("%s: Already in same state\n", __func__);
  4759. goto err;
  4760. }
  4761. if (curr_state != STATE_DISABLE &&
  4762. pinctrl_info->curr_state != STATE_DISABLE) {
  4763. pr_debug("%s: state already active cannot switch\n", __func__);
  4764. ret = -EIO;
  4765. goto err;
  4766. }
  4767. switch (pinctrl_info->curr_state) {
  4768. case STATE_MI2S_ACTIVE:
  4769. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4770. pinctrl_info->mi2s_active);
  4771. if (ret) {
  4772. pr_err("%s: MI2S state select failed with %d\n",
  4773. __func__, ret);
  4774. ret = -EIO;
  4775. goto err;
  4776. }
  4777. break;
  4778. case STATE_TDM_ACTIVE:
  4779. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4780. pinctrl_info->tdm_active);
  4781. if (ret) {
  4782. pr_err("%s: TDM state select failed with %d\n",
  4783. __func__, ret);
  4784. ret = -EIO;
  4785. goto err;
  4786. }
  4787. break;
  4788. case STATE_DISABLE:
  4789. if (curr_state == STATE_MI2S_ACTIVE) {
  4790. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4791. pinctrl_info->mi2s_disable);
  4792. } else {
  4793. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4794. pinctrl_info->tdm_disable);
  4795. }
  4796. if (ret) {
  4797. pr_err("%s: state disable failed with %d\n",
  4798. __func__, ret);
  4799. ret = -EIO;
  4800. goto err;
  4801. }
  4802. break;
  4803. default:
  4804. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4805. return -EINVAL;
  4806. }
  4807. err:
  4808. return ret;
  4809. }
  4810. static int msm_get_pinctrl(struct platform_device *pdev)
  4811. {
  4812. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4813. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4814. struct msm_pinctrl_info *pinctrl_info = NULL;
  4815. struct pinctrl *pinctrl;
  4816. int ret = 0;
  4817. pinctrl_info = &pdata->pinctrl_info;
  4818. if (pinctrl_info == NULL) {
  4819. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4820. return -EINVAL;
  4821. }
  4822. pinctrl = devm_pinctrl_get(&pdev->dev);
  4823. if (IS_ERR_OR_NULL(pinctrl)) {
  4824. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4825. return -EINVAL;
  4826. }
  4827. pinctrl_info->pinctrl = pinctrl;
  4828. /* get all the states handles from Device Tree */
  4829. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4830. "quat-mi2s-sleep");
  4831. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4832. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4833. goto err;
  4834. }
  4835. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4836. "quat-mi2s-active");
  4837. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4838. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4839. goto err;
  4840. }
  4841. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4842. "quat-tdm-sleep");
  4843. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4844. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4845. goto err;
  4846. }
  4847. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4848. "quat-tdm-active");
  4849. if (IS_ERR(pinctrl_info->tdm_active)) {
  4850. pr_err("%s: could not get tdm_active pinstate\n",
  4851. __func__);
  4852. goto err;
  4853. }
  4854. /* Reset the TLMM pins to a default state */
  4855. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4856. pinctrl_info->mi2s_disable);
  4857. if (ret != 0) {
  4858. pr_err("%s: Disable TLMM pins failed with %d\n",
  4859. __func__, ret);
  4860. ret = -EIO;
  4861. goto err;
  4862. }
  4863. pinctrl_info->curr_state = STATE_DISABLE;
  4864. return 0;
  4865. err:
  4866. devm_pinctrl_put(pinctrl);
  4867. pinctrl_info->pinctrl = NULL;
  4868. return -EINVAL;
  4869. }
  4870. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4871. struct snd_pcm_hw_params *params)
  4872. {
  4873. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4874. struct snd_interval *rate = hw_param_interval(params,
  4875. SNDRV_PCM_HW_PARAM_RATE);
  4876. struct snd_interval *channels = hw_param_interval(params,
  4877. SNDRV_PCM_HW_PARAM_CHANNELS);
  4878. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4879. channels->min = channels->max =
  4880. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4881. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4882. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4883. rate->min = rate->max =
  4884. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4885. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4886. channels->min = channels->max =
  4887. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4888. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4889. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4890. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4891. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4892. channels->min = channels->max =
  4893. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4894. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4895. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4896. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4897. } else {
  4898. pr_err("%s: dai id 0x%x not supported\n",
  4899. __func__, cpu_dai->id);
  4900. return -EINVAL;
  4901. }
  4902. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4903. __func__, cpu_dai->id, channels->max, rate->max,
  4904. params_format(params));
  4905. return 0;
  4906. }
  4907. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4908. struct snd_pcm_hw_params *params)
  4909. {
  4910. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4911. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4912. int ret = 0;
  4913. int slot_width = 32;
  4914. int channels, slots;
  4915. unsigned int slot_mask, rate, clk_freq;
  4916. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4917. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4918. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4919. switch (cpu_dai->id) {
  4920. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4921. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4922. break;
  4923. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4924. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4925. break;
  4926. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4927. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4928. break;
  4929. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4930. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4931. break;
  4932. case AFE_PORT_ID_QUINARY_TDM_RX:
  4933. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4934. break;
  4935. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4936. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4937. break;
  4938. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4939. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4940. break;
  4941. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4942. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4943. break;
  4944. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4945. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4946. break;
  4947. case AFE_PORT_ID_QUINARY_TDM_TX:
  4948. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4949. break;
  4950. default:
  4951. pr_err("%s: dai id 0x%x not supported\n",
  4952. __func__, cpu_dai->id);
  4953. return -EINVAL;
  4954. }
  4955. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4956. /*2 slot config - bits 0 and 1 set for the first two slots */
  4957. slot_mask = 0x0000FFFF >> (16-slots);
  4958. channels = slots;
  4959. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4960. __func__, slot_width, slots);
  4961. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4962. slots, slot_width);
  4963. if (ret < 0) {
  4964. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4965. __func__, ret);
  4966. goto end;
  4967. }
  4968. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4969. 0, NULL, channels, slot_offset);
  4970. if (ret < 0) {
  4971. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4972. __func__, ret);
  4973. goto end;
  4974. }
  4975. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4976. /*2 slot config - bits 0 and 1 set for the first two slots */
  4977. slot_mask = 0x0000FFFF >> (16-slots);
  4978. channels = slots;
  4979. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4980. __func__, slot_width, slots);
  4981. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4982. slots, slot_width);
  4983. if (ret < 0) {
  4984. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4985. __func__, ret);
  4986. goto end;
  4987. }
  4988. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4989. channels, slot_offset, 0, NULL);
  4990. if (ret < 0) {
  4991. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4992. __func__, ret);
  4993. goto end;
  4994. }
  4995. } else {
  4996. ret = -EINVAL;
  4997. pr_err("%s: invalid use case, err:%d\n",
  4998. __func__, ret);
  4999. goto end;
  5000. }
  5001. rate = params_rate(params);
  5002. clk_freq = rate * slot_width * slots;
  5003. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5004. if (ret < 0)
  5005. pr_err("%s: failed to set tdm clk, err:%d\n",
  5006. __func__, ret);
  5007. end:
  5008. return ret;
  5009. }
  5010. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5011. {
  5012. int ret = 0;
  5013. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5014. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5015. struct snd_soc_card *card = rtd->card;
  5016. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5017. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5018. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5019. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5020. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5021. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5022. if (ret)
  5023. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5024. __func__, ret);
  5025. }
  5026. return ret;
  5027. }
  5028. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5029. {
  5030. int ret = 0;
  5031. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5032. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5033. struct snd_soc_card *card = rtd->card;
  5034. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5035. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5036. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5037. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5038. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5039. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5040. if (ret)
  5041. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5042. __func__, ret);
  5043. }
  5044. }
  5045. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5046. .hw_params = sm6150_tdm_snd_hw_params,
  5047. .startup = sm6150_tdm_snd_startup,
  5048. .shutdown = sm6150_tdm_snd_shutdown
  5049. };
  5050. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5051. {
  5052. cpumask_t mask;
  5053. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5054. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5055. cpumask_clear(&mask);
  5056. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5057. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5058. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5059. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5060. pm_qos_add_request(&substream->latency_pm_qos_req,
  5061. PM_QOS_CPU_DMA_LATENCY,
  5062. MSM_LL_QOS_VALUE);
  5063. return 0;
  5064. }
  5065. static struct snd_soc_ops msm_fe_qos_ops = {
  5066. .prepare = msm_fe_qos_prepare,
  5067. };
  5068. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5069. {
  5070. int ret = 0;
  5071. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5072. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5073. int index = cpu_dai->id;
  5074. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5075. struct snd_soc_card *card = rtd->card;
  5076. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5077. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5078. int ret_pinctrl = 0;
  5079. dev_dbg(rtd->card->dev,
  5080. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5081. __func__, substream->name, substream->stream,
  5082. cpu_dai->name, cpu_dai->id);
  5083. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5084. ret = -EINVAL;
  5085. dev_err(rtd->card->dev,
  5086. "%s: CPU DAI id (%d) out of range\n",
  5087. __func__, cpu_dai->id);
  5088. goto err;
  5089. }
  5090. /*
  5091. * Mutex protection in case the same MI2S
  5092. * interface using for both TX and RX so
  5093. * that the same clock won't be enable twice.
  5094. */
  5095. mutex_lock(&mi2s_intf_conf[index].lock);
  5096. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5097. /* Check if msm needs to provide the clock to the interface */
  5098. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5099. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5100. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5101. }
  5102. ret = msm_mi2s_set_sclk(substream, true);
  5103. if (ret < 0) {
  5104. dev_err(rtd->card->dev,
  5105. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5106. __func__, ret);
  5107. goto clean_up;
  5108. }
  5109. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5110. if (ret < 0) {
  5111. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5112. __func__, index, ret);
  5113. goto clk_off;
  5114. }
  5115. if (index == QUAT_MI2S) {
  5116. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5117. STATE_MI2S_ACTIVE);
  5118. if (ret_pinctrl)
  5119. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5120. __func__, ret_pinctrl);
  5121. }
  5122. }
  5123. clk_off:
  5124. if (ret < 0)
  5125. msm_mi2s_set_sclk(substream, false);
  5126. clean_up:
  5127. if (ret < 0)
  5128. mi2s_intf_conf[index].ref_cnt--;
  5129. mutex_unlock(&mi2s_intf_conf[index].lock);
  5130. err:
  5131. return ret;
  5132. }
  5133. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5134. {
  5135. int ret;
  5136. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5137. int index = rtd->cpu_dai->id;
  5138. struct snd_soc_card *card = rtd->card;
  5139. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5140. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5141. int ret_pinctrl = 0;
  5142. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5143. substream->name, substream->stream);
  5144. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5145. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5146. return;
  5147. }
  5148. mutex_lock(&mi2s_intf_conf[index].lock);
  5149. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5150. ret = msm_mi2s_set_sclk(substream, false);
  5151. if (ret < 0)
  5152. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5153. __func__, index, ret);
  5154. if (index == QUAT_MI2S) {
  5155. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5156. STATE_DISABLE);
  5157. if (ret_pinctrl)
  5158. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5159. __func__, ret_pinctrl);
  5160. }
  5161. }
  5162. mutex_unlock(&mi2s_intf_conf[index].lock);
  5163. }
  5164. static struct snd_soc_ops msm_mi2s_be_ops = {
  5165. .startup = msm_mi2s_snd_startup,
  5166. .shutdown = msm_mi2s_snd_shutdown,
  5167. };
  5168. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5169. .hw_params = msm_snd_cdc_dma_hw_params,
  5170. };
  5171. static struct snd_soc_ops msm_be_ops = {
  5172. .hw_params = msm_snd_hw_params,
  5173. };
  5174. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5175. .hw_params = msm_slimbus_2_hw_params,
  5176. };
  5177. static struct snd_soc_ops msm_wcn_ops = {
  5178. .hw_params = msm_wcn_hw_params,
  5179. };
  5180. /* Digital audio interface glue - connects codec <---> CPU */
  5181. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5182. /* FrontEnd DAI Links */
  5183. {/* hw:x,0 */
  5184. .name = MSM_DAILINK_NAME(Media1),
  5185. .stream_name = "MultiMedia1",
  5186. .cpu_dai_name = "MultiMedia1",
  5187. .platform_name = "msm-pcm-dsp.0",
  5188. .dynamic = 1,
  5189. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5190. .dpcm_playback = 1,
  5191. .dpcm_capture = 1,
  5192. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5193. SND_SOC_DPCM_TRIGGER_POST},
  5194. .codec_dai_name = "snd-soc-dummy-dai",
  5195. .codec_name = "snd-soc-dummy",
  5196. .ignore_suspend = 1,
  5197. /* this dainlink has playback support */
  5198. .ignore_pmdown_time = 1,
  5199. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5200. },
  5201. {/* hw:x,1 */
  5202. .name = MSM_DAILINK_NAME(Media2),
  5203. .stream_name = "MultiMedia2",
  5204. .cpu_dai_name = "MultiMedia2",
  5205. .platform_name = "msm-pcm-dsp.0",
  5206. .dynamic = 1,
  5207. .dpcm_playback = 1,
  5208. .dpcm_capture = 1,
  5209. .codec_dai_name = "snd-soc-dummy-dai",
  5210. .codec_name = "snd-soc-dummy",
  5211. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5212. SND_SOC_DPCM_TRIGGER_POST},
  5213. .ignore_suspend = 1,
  5214. /* this dainlink has playback support */
  5215. .ignore_pmdown_time = 1,
  5216. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5217. },
  5218. {/* hw:x,2 */
  5219. .name = "VoiceMMode1",
  5220. .stream_name = "VoiceMMode1",
  5221. .cpu_dai_name = "VoiceMMode1",
  5222. .platform_name = "msm-pcm-voice",
  5223. .dynamic = 1,
  5224. .dpcm_playback = 1,
  5225. .dpcm_capture = 1,
  5226. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5227. SND_SOC_DPCM_TRIGGER_POST},
  5228. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5229. .ignore_suspend = 1,
  5230. .ignore_pmdown_time = 1,
  5231. .codec_dai_name = "snd-soc-dummy-dai",
  5232. .codec_name = "snd-soc-dummy",
  5233. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5234. },
  5235. {/* hw:x,3 */
  5236. .name = "MSM VoIP",
  5237. .stream_name = "VoIP",
  5238. .cpu_dai_name = "VoIP",
  5239. .platform_name = "msm-voip-dsp",
  5240. .dynamic = 1,
  5241. .dpcm_playback = 1,
  5242. .dpcm_capture = 1,
  5243. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5244. SND_SOC_DPCM_TRIGGER_POST},
  5245. .codec_dai_name = "snd-soc-dummy-dai",
  5246. .codec_name = "snd-soc-dummy",
  5247. .ignore_suspend = 1,
  5248. /* this dainlink has playback support */
  5249. .ignore_pmdown_time = 1,
  5250. .id = MSM_FRONTEND_DAI_VOIP,
  5251. },
  5252. {/* hw:x,4 */
  5253. .name = MSM_DAILINK_NAME(ULL),
  5254. .stream_name = "MultiMedia3",
  5255. .cpu_dai_name = "MultiMedia3",
  5256. .platform_name = "msm-pcm-dsp.2",
  5257. .dynamic = 1,
  5258. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5259. .dpcm_playback = 1,
  5260. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5261. SND_SOC_DPCM_TRIGGER_POST},
  5262. .codec_dai_name = "snd-soc-dummy-dai",
  5263. .codec_name = "snd-soc-dummy",
  5264. .ignore_suspend = 1,
  5265. /* this dainlink has playback support */
  5266. .ignore_pmdown_time = 1,
  5267. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5268. },
  5269. /* Hostless PCM purpose */
  5270. {/* hw:x,5 */
  5271. .name = "SLIMBUS_0 Hostless",
  5272. .stream_name = "SLIMBUS_0 Hostless",
  5273. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5274. .platform_name = "msm-pcm-hostless",
  5275. .dynamic = 1,
  5276. .dpcm_playback = 1,
  5277. .dpcm_capture = 1,
  5278. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5279. SND_SOC_DPCM_TRIGGER_POST},
  5280. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5281. .ignore_suspend = 1,
  5282. /* this dailink has playback support */
  5283. .ignore_pmdown_time = 1,
  5284. .codec_dai_name = "snd-soc-dummy-dai",
  5285. .codec_name = "snd-soc-dummy",
  5286. },
  5287. {/* hw:x,6 */
  5288. .name = "MSM AFE-PCM RX",
  5289. .stream_name = "AFE-PROXY RX",
  5290. .cpu_dai_name = "msm-dai-q6-dev.241",
  5291. .codec_name = "msm-stub-codec.1",
  5292. .codec_dai_name = "msm-stub-rx",
  5293. .platform_name = "msm-pcm-afe",
  5294. .dpcm_playback = 1,
  5295. .ignore_suspend = 1,
  5296. /* this dainlink has playback support */
  5297. .ignore_pmdown_time = 1,
  5298. },
  5299. {/* hw:x,7 */
  5300. .name = "MSM AFE-PCM TX",
  5301. .stream_name = "AFE-PROXY TX",
  5302. .cpu_dai_name = "msm-dai-q6-dev.240",
  5303. .codec_name = "msm-stub-codec.1",
  5304. .codec_dai_name = "msm-stub-tx",
  5305. .platform_name = "msm-pcm-afe",
  5306. .dpcm_capture = 1,
  5307. .ignore_suspend = 1,
  5308. },
  5309. {/* hw:x,8 */
  5310. .name = MSM_DAILINK_NAME(Compress1),
  5311. .stream_name = "Compress1",
  5312. .cpu_dai_name = "MultiMedia4",
  5313. .platform_name = "msm-compress-dsp",
  5314. .dynamic = 1,
  5315. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5316. .dpcm_playback = 1,
  5317. .dpcm_capture = 1,
  5318. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5319. SND_SOC_DPCM_TRIGGER_POST},
  5320. .codec_dai_name = "snd-soc-dummy-dai",
  5321. .codec_name = "snd-soc-dummy",
  5322. .ignore_suspend = 1,
  5323. .ignore_pmdown_time = 1,
  5324. /* this dainlink has playback support */
  5325. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5326. },
  5327. {/* hw:x,9 */
  5328. .name = "AUXPCM Hostless",
  5329. .stream_name = "AUXPCM Hostless",
  5330. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5331. .platform_name = "msm-pcm-hostless",
  5332. .dynamic = 1,
  5333. .dpcm_playback = 1,
  5334. .dpcm_capture = 1,
  5335. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5336. SND_SOC_DPCM_TRIGGER_POST},
  5337. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5338. .ignore_suspend = 1,
  5339. /* this dainlink has playback support */
  5340. .ignore_pmdown_time = 1,
  5341. .codec_dai_name = "snd-soc-dummy-dai",
  5342. .codec_name = "snd-soc-dummy",
  5343. },
  5344. {/* hw:x,10 */
  5345. .name = "SLIMBUS_1 Hostless",
  5346. .stream_name = "SLIMBUS_1 Hostless",
  5347. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5348. .platform_name = "msm-pcm-hostless",
  5349. .dynamic = 1,
  5350. .dpcm_playback = 1,
  5351. .dpcm_capture = 1,
  5352. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5353. SND_SOC_DPCM_TRIGGER_POST},
  5354. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5355. .ignore_suspend = 1,
  5356. /* this dailink has playback support */
  5357. .ignore_pmdown_time = 1,
  5358. .codec_dai_name = "snd-soc-dummy-dai",
  5359. .codec_name = "snd-soc-dummy",
  5360. },
  5361. {/* hw:x,11 */
  5362. .name = "SLIMBUS_3 Hostless",
  5363. .stream_name = "SLIMBUS_3 Hostless",
  5364. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5365. .platform_name = "msm-pcm-hostless",
  5366. .dynamic = 1,
  5367. .dpcm_playback = 1,
  5368. .dpcm_capture = 1,
  5369. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5370. SND_SOC_DPCM_TRIGGER_POST},
  5371. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5372. .ignore_suspend = 1,
  5373. /* this dailink has playback support */
  5374. .ignore_pmdown_time = 1,
  5375. .codec_dai_name = "snd-soc-dummy-dai",
  5376. .codec_name = "snd-soc-dummy",
  5377. },
  5378. {/* hw:x,12 */
  5379. .name = "SLIMBUS_7 Hostless",
  5380. .stream_name = "SLIMBUS_7 Hostless",
  5381. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5382. .platform_name = "msm-pcm-hostless",
  5383. .dynamic = 1,
  5384. .dpcm_playback = 1,
  5385. .dpcm_capture = 1,
  5386. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5387. SND_SOC_DPCM_TRIGGER_POST},
  5388. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5389. .ignore_suspend = 1,
  5390. /* this dailink has playback support */
  5391. .ignore_pmdown_time = 1,
  5392. .codec_dai_name = "snd-soc-dummy-dai",
  5393. .codec_name = "snd-soc-dummy",
  5394. },
  5395. {/* hw:x,13 */
  5396. .name = MSM_DAILINK_NAME(LowLatency),
  5397. .stream_name = "MultiMedia5",
  5398. .cpu_dai_name = "MultiMedia5",
  5399. .platform_name = "msm-pcm-dsp.1",
  5400. .dynamic = 1,
  5401. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5402. .dpcm_playback = 1,
  5403. .dpcm_capture = 1,
  5404. .codec_dai_name = "snd-soc-dummy-dai",
  5405. .codec_name = "snd-soc-dummy",
  5406. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5407. SND_SOC_DPCM_TRIGGER_POST},
  5408. .ignore_suspend = 1,
  5409. /* this dainlink has playback support */
  5410. .ignore_pmdown_time = 1,
  5411. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5412. .ops = &msm_fe_qos_ops,
  5413. },
  5414. {/* hw:x,14 */
  5415. .name = "Listen 1 Audio Service",
  5416. .stream_name = "Listen 1 Audio Service",
  5417. .cpu_dai_name = "LSM1",
  5418. .platform_name = "msm-lsm-client",
  5419. .dynamic = 1,
  5420. .dpcm_capture = 1,
  5421. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5422. SND_SOC_DPCM_TRIGGER_POST },
  5423. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5424. .ignore_suspend = 1,
  5425. .codec_dai_name = "snd-soc-dummy-dai",
  5426. .codec_name = "snd-soc-dummy",
  5427. .id = MSM_FRONTEND_DAI_LSM1,
  5428. },
  5429. /* Multiple Tunnel instances */
  5430. {/* hw:x,15 */
  5431. .name = MSM_DAILINK_NAME(Compress2),
  5432. .stream_name = "Compress2",
  5433. .cpu_dai_name = "MultiMedia7",
  5434. .platform_name = "msm-compress-dsp",
  5435. .dynamic = 1,
  5436. .dpcm_playback = 1,
  5437. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5438. SND_SOC_DPCM_TRIGGER_POST},
  5439. .codec_dai_name = "snd-soc-dummy-dai",
  5440. .codec_name = "snd-soc-dummy",
  5441. .ignore_suspend = 1,
  5442. .ignore_pmdown_time = 1,
  5443. /* this dainlink has playback support */
  5444. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5445. },
  5446. {/* hw:x,16 */
  5447. .name = MSM_DAILINK_NAME(MultiMedia10),
  5448. .stream_name = "MultiMedia10",
  5449. .cpu_dai_name = "MultiMedia10",
  5450. .platform_name = "msm-pcm-dsp.1",
  5451. .dynamic = 1,
  5452. .dpcm_playback = 1,
  5453. .dpcm_capture = 1,
  5454. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5455. SND_SOC_DPCM_TRIGGER_POST},
  5456. .codec_dai_name = "snd-soc-dummy-dai",
  5457. .codec_name = "snd-soc-dummy",
  5458. .ignore_suspend = 1,
  5459. .ignore_pmdown_time = 1,
  5460. /* this dainlink has playback support */
  5461. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5462. },
  5463. {/* hw:x,17 */
  5464. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5465. .stream_name = "MM_NOIRQ",
  5466. .cpu_dai_name = "MultiMedia8",
  5467. .platform_name = "msm-pcm-dsp-noirq",
  5468. .dynamic = 1,
  5469. .dpcm_playback = 1,
  5470. .dpcm_capture = 1,
  5471. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5472. SND_SOC_DPCM_TRIGGER_POST},
  5473. .codec_dai_name = "snd-soc-dummy-dai",
  5474. .codec_name = "snd-soc-dummy",
  5475. .ignore_suspend = 1,
  5476. .ignore_pmdown_time = 1,
  5477. /* this dainlink has playback support */
  5478. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5479. .ops = &msm_fe_qos_ops,
  5480. },
  5481. /* HDMI Hostless */
  5482. {/* hw:x,18 */
  5483. .name = "HDMI_RX_HOSTLESS",
  5484. .stream_name = "HDMI_RX_HOSTLESS",
  5485. .cpu_dai_name = "HDMI_HOSTLESS",
  5486. .platform_name = "msm-pcm-hostless",
  5487. .dynamic = 1,
  5488. .dpcm_playback = 1,
  5489. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5490. SND_SOC_DPCM_TRIGGER_POST},
  5491. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5492. .ignore_suspend = 1,
  5493. .ignore_pmdown_time = 1,
  5494. .codec_dai_name = "snd-soc-dummy-dai",
  5495. .codec_name = "snd-soc-dummy",
  5496. },
  5497. {/* hw:x,19 */
  5498. .name = "VoiceMMode2",
  5499. .stream_name = "VoiceMMode2",
  5500. .cpu_dai_name = "VoiceMMode2",
  5501. .platform_name = "msm-pcm-voice",
  5502. .dynamic = 1,
  5503. .dpcm_playback = 1,
  5504. .dpcm_capture = 1,
  5505. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5506. SND_SOC_DPCM_TRIGGER_POST},
  5507. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5508. .ignore_suspend = 1,
  5509. .ignore_pmdown_time = 1,
  5510. .codec_dai_name = "snd-soc-dummy-dai",
  5511. .codec_name = "snd-soc-dummy",
  5512. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5513. },
  5514. /* LSM FE */
  5515. {/* hw:x,20 */
  5516. .name = "Listen 2 Audio Service",
  5517. .stream_name = "Listen 2 Audio Service",
  5518. .cpu_dai_name = "LSM2",
  5519. .platform_name = "msm-lsm-client",
  5520. .dynamic = 1,
  5521. .dpcm_capture = 1,
  5522. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5523. SND_SOC_DPCM_TRIGGER_POST },
  5524. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5525. .ignore_suspend = 1,
  5526. .codec_dai_name = "snd-soc-dummy-dai",
  5527. .codec_name = "snd-soc-dummy",
  5528. .id = MSM_FRONTEND_DAI_LSM2,
  5529. },
  5530. {/* hw:x,21 */
  5531. .name = "Listen 3 Audio Service",
  5532. .stream_name = "Listen 3 Audio Service",
  5533. .cpu_dai_name = "LSM3",
  5534. .platform_name = "msm-lsm-client",
  5535. .dynamic = 1,
  5536. .dpcm_capture = 1,
  5537. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5538. SND_SOC_DPCM_TRIGGER_POST },
  5539. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5540. .ignore_suspend = 1,
  5541. .codec_dai_name = "snd-soc-dummy-dai",
  5542. .codec_name = "snd-soc-dummy",
  5543. .id = MSM_FRONTEND_DAI_LSM3,
  5544. },
  5545. {/* hw:x,22 */
  5546. .name = "Listen 4 Audio Service",
  5547. .stream_name = "Listen 4 Audio Service",
  5548. .cpu_dai_name = "LSM4",
  5549. .platform_name = "msm-lsm-client",
  5550. .dynamic = 1,
  5551. .dpcm_capture = 1,
  5552. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5553. SND_SOC_DPCM_TRIGGER_POST },
  5554. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5555. .ignore_suspend = 1,
  5556. .codec_dai_name = "snd-soc-dummy-dai",
  5557. .codec_name = "snd-soc-dummy",
  5558. .id = MSM_FRONTEND_DAI_LSM4,
  5559. },
  5560. {/* hw:x,23 */
  5561. .name = "Listen 5 Audio Service",
  5562. .stream_name = "Listen 5 Audio Service",
  5563. .cpu_dai_name = "LSM5",
  5564. .platform_name = "msm-lsm-client",
  5565. .dynamic = 1,
  5566. .dpcm_capture = 1,
  5567. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5568. SND_SOC_DPCM_TRIGGER_POST },
  5569. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5570. .ignore_suspend = 1,
  5571. .codec_dai_name = "snd-soc-dummy-dai",
  5572. .codec_name = "snd-soc-dummy",
  5573. .id = MSM_FRONTEND_DAI_LSM5,
  5574. },
  5575. {/* hw:x,24 */
  5576. .name = "Listen 6 Audio Service",
  5577. .stream_name = "Listen 6 Audio Service",
  5578. .cpu_dai_name = "LSM6",
  5579. .platform_name = "msm-lsm-client",
  5580. .dynamic = 1,
  5581. .dpcm_capture = 1,
  5582. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5583. SND_SOC_DPCM_TRIGGER_POST },
  5584. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5585. .ignore_suspend = 1,
  5586. .codec_dai_name = "snd-soc-dummy-dai",
  5587. .codec_name = "snd-soc-dummy",
  5588. .id = MSM_FRONTEND_DAI_LSM6,
  5589. },
  5590. {/* hw:x,25 */
  5591. .name = "Listen 7 Audio Service",
  5592. .stream_name = "Listen 7 Audio Service",
  5593. .cpu_dai_name = "LSM7",
  5594. .platform_name = "msm-lsm-client",
  5595. .dynamic = 1,
  5596. .dpcm_capture = 1,
  5597. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5598. SND_SOC_DPCM_TRIGGER_POST },
  5599. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5600. .ignore_suspend = 1,
  5601. .codec_dai_name = "snd-soc-dummy-dai",
  5602. .codec_name = "snd-soc-dummy",
  5603. .id = MSM_FRONTEND_DAI_LSM7,
  5604. },
  5605. {/* hw:x,26 */
  5606. .name = "Listen 8 Audio Service",
  5607. .stream_name = "Listen 8 Audio Service",
  5608. .cpu_dai_name = "LSM8",
  5609. .platform_name = "msm-lsm-client",
  5610. .dynamic = 1,
  5611. .dpcm_capture = 1,
  5612. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5613. SND_SOC_DPCM_TRIGGER_POST },
  5614. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5615. .ignore_suspend = 1,
  5616. .codec_dai_name = "snd-soc-dummy-dai",
  5617. .codec_name = "snd-soc-dummy",
  5618. .id = MSM_FRONTEND_DAI_LSM8,
  5619. },
  5620. {/* hw:x,27 */
  5621. .name = MSM_DAILINK_NAME(Media9),
  5622. .stream_name = "MultiMedia9",
  5623. .cpu_dai_name = "MultiMedia9",
  5624. .platform_name = "msm-pcm-dsp.0",
  5625. .dynamic = 1,
  5626. .dpcm_playback = 1,
  5627. .dpcm_capture = 1,
  5628. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5629. SND_SOC_DPCM_TRIGGER_POST},
  5630. .codec_dai_name = "snd-soc-dummy-dai",
  5631. .codec_name = "snd-soc-dummy",
  5632. .ignore_suspend = 1,
  5633. /* this dainlink has playback support */
  5634. .ignore_pmdown_time = 1,
  5635. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5636. },
  5637. {/* hw:x,28 */
  5638. .name = MSM_DAILINK_NAME(Compress4),
  5639. .stream_name = "Compress4",
  5640. .cpu_dai_name = "MultiMedia11",
  5641. .platform_name = "msm-compress-dsp",
  5642. .dynamic = 1,
  5643. .dpcm_playback = 1,
  5644. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5645. SND_SOC_DPCM_TRIGGER_POST},
  5646. .codec_dai_name = "snd-soc-dummy-dai",
  5647. .codec_name = "snd-soc-dummy",
  5648. .ignore_suspend = 1,
  5649. .ignore_pmdown_time = 1,
  5650. /* this dainlink has playback support */
  5651. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5652. },
  5653. {/* hw:x,29 */
  5654. .name = MSM_DAILINK_NAME(Compress5),
  5655. .stream_name = "Compress5",
  5656. .cpu_dai_name = "MultiMedia12",
  5657. .platform_name = "msm-compress-dsp",
  5658. .dynamic = 1,
  5659. .dpcm_playback = 1,
  5660. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5661. SND_SOC_DPCM_TRIGGER_POST},
  5662. .codec_dai_name = "snd-soc-dummy-dai",
  5663. .codec_name = "snd-soc-dummy",
  5664. .ignore_suspend = 1,
  5665. .ignore_pmdown_time = 1,
  5666. /* this dainlink has playback support */
  5667. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5668. },
  5669. {/* hw:x,30 */
  5670. .name = MSM_DAILINK_NAME(Compress6),
  5671. .stream_name = "Compress6",
  5672. .cpu_dai_name = "MultiMedia13",
  5673. .platform_name = "msm-compress-dsp",
  5674. .dynamic = 1,
  5675. .dpcm_playback = 1,
  5676. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5677. SND_SOC_DPCM_TRIGGER_POST},
  5678. .codec_dai_name = "snd-soc-dummy-dai",
  5679. .codec_name = "snd-soc-dummy",
  5680. .ignore_suspend = 1,
  5681. .ignore_pmdown_time = 1,
  5682. /* this dainlink has playback support */
  5683. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5684. },
  5685. {/* hw:x,31 */
  5686. .name = MSM_DAILINK_NAME(Compress7),
  5687. .stream_name = "Compress7",
  5688. .cpu_dai_name = "MultiMedia14",
  5689. .platform_name = "msm-compress-dsp",
  5690. .dynamic = 1,
  5691. .dpcm_playback = 1,
  5692. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5693. SND_SOC_DPCM_TRIGGER_POST},
  5694. .codec_dai_name = "snd-soc-dummy-dai",
  5695. .codec_name = "snd-soc-dummy",
  5696. .ignore_suspend = 1,
  5697. .ignore_pmdown_time = 1,
  5698. /* this dainlink has playback support */
  5699. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5700. },
  5701. {/* hw:x,32 */
  5702. .name = MSM_DAILINK_NAME(Compress8),
  5703. .stream_name = "Compress8",
  5704. .cpu_dai_name = "MultiMedia15",
  5705. .platform_name = "msm-compress-dsp",
  5706. .dynamic = 1,
  5707. .dpcm_playback = 1,
  5708. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5709. SND_SOC_DPCM_TRIGGER_POST},
  5710. .codec_dai_name = "snd-soc-dummy-dai",
  5711. .codec_name = "snd-soc-dummy",
  5712. .ignore_suspend = 1,
  5713. .ignore_pmdown_time = 1,
  5714. /* this dainlink has playback support */
  5715. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5716. },
  5717. {/* hw:x,33 */
  5718. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5719. .stream_name = "MM_NOIRQ_2",
  5720. .cpu_dai_name = "MultiMedia16",
  5721. .platform_name = "msm-pcm-dsp-noirq",
  5722. .dynamic = 1,
  5723. .dpcm_playback = 1,
  5724. .dpcm_capture = 1,
  5725. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5726. SND_SOC_DPCM_TRIGGER_POST},
  5727. .codec_dai_name = "snd-soc-dummy-dai",
  5728. .codec_name = "snd-soc-dummy",
  5729. .ignore_suspend = 1,
  5730. .ignore_pmdown_time = 1,
  5731. /* this dainlink has playback support */
  5732. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5733. },
  5734. {/* hw:x,34 */
  5735. .name = "SLIMBUS_8 Hostless",
  5736. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5737. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5738. .platform_name = "msm-pcm-hostless",
  5739. .dynamic = 1,
  5740. .dpcm_capture = 1,
  5741. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5742. SND_SOC_DPCM_TRIGGER_POST},
  5743. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5744. .ignore_suspend = 1,
  5745. .codec_dai_name = "snd-soc-dummy-dai",
  5746. .codec_name = "snd-soc-dummy",
  5747. },
  5748. {/* hw:x,35 */
  5749. .name = "CDC_DMA Hostless",
  5750. .stream_name = "CDC_DMA Hostless",
  5751. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5752. .platform_name = "msm-pcm-hostless",
  5753. .dynamic = 1,
  5754. .dpcm_playback = 1,
  5755. .dpcm_capture = 1,
  5756. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5757. SND_SOC_DPCM_TRIGGER_POST},
  5758. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5759. .ignore_suspend = 1,
  5760. /* this dailink has playback support */
  5761. .ignore_pmdown_time = 1,
  5762. .codec_dai_name = "snd-soc-dummy-dai",
  5763. .codec_name = "snd-soc-dummy",
  5764. },
  5765. {/* hw:x,36 */
  5766. .name = "TX3_CDC_DMA Hostless",
  5767. .stream_name = "TX3_CDC_DMA Hostless",
  5768. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5769. .platform_name = "msm-pcm-hostless",
  5770. .dynamic = 1,
  5771. .dpcm_capture = 1,
  5772. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5773. SND_SOC_DPCM_TRIGGER_POST},
  5774. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5775. .ignore_suspend = 1,
  5776. .codec_dai_name = "snd-soc-dummy-dai",
  5777. .codec_name = "snd-soc-dummy",
  5778. },
  5779. };
  5780. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5781. {/* hw:x,37 */
  5782. .name = LPASS_BE_SLIMBUS_4_TX,
  5783. .stream_name = "Slimbus4 Capture",
  5784. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5785. .platform_name = "msm-pcm-hostless",
  5786. .codec_name = "tavil_codec",
  5787. .codec_dai_name = "tavil_vifeedback",
  5788. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5789. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5790. .ops = &msm_be_ops,
  5791. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5792. .ignore_suspend = 1,
  5793. },
  5794. /* Ultrasound RX DAI Link */
  5795. {/* hw:x,38 */
  5796. .name = "SLIMBUS_2 Hostless Playback",
  5797. .stream_name = "SLIMBUS_2 Hostless Playback",
  5798. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5799. .platform_name = "msm-pcm-hostless",
  5800. .codec_name = "tavil_codec",
  5801. .codec_dai_name = "tavil_rx2",
  5802. .ignore_suspend = 1,
  5803. .ignore_pmdown_time = 1,
  5804. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5805. .ops = &msm_slimbus_2_be_ops,
  5806. },
  5807. /* Ultrasound TX DAI Link */
  5808. {/* hw:x,39 */
  5809. .name = "SLIMBUS_2 Hostless Capture",
  5810. .stream_name = "SLIMBUS_2 Hostless Capture",
  5811. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5812. .platform_name = "msm-pcm-hostless",
  5813. .codec_name = "tavil_codec",
  5814. .codec_dai_name = "tavil_tx2",
  5815. .ignore_suspend = 1,
  5816. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5817. .ops = &msm_slimbus_2_be_ops,
  5818. },
  5819. };
  5820. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5821. {/* hw:x,37 */
  5822. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5823. .stream_name = "WSA CDC DMA0 Capture",
  5824. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5825. .platform_name = "msm-pcm-hostless",
  5826. .codec_name = "bolero_codec",
  5827. .codec_dai_name = "wsa_macro_vifeedback",
  5828. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5829. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5830. .ignore_suspend = 1,
  5831. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5832. .ops = &msm_cdc_dma_be_ops,
  5833. },
  5834. };
  5835. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5836. {
  5837. .name = MSM_DAILINK_NAME(ASM Loopback),
  5838. .stream_name = "MultiMedia6",
  5839. .cpu_dai_name = "MultiMedia6",
  5840. .platform_name = "msm-pcm-loopback",
  5841. .dynamic = 1,
  5842. .dpcm_playback = 1,
  5843. .dpcm_capture = 1,
  5844. .codec_dai_name = "snd-soc-dummy-dai",
  5845. .codec_name = "snd-soc-dummy",
  5846. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5847. SND_SOC_DPCM_TRIGGER_POST},
  5848. .ignore_suspend = 1,
  5849. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5850. .ignore_pmdown_time = 1,
  5851. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5852. },
  5853. {
  5854. .name = "USB Audio Hostless",
  5855. .stream_name = "USB Audio Hostless",
  5856. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5857. .platform_name = "msm-pcm-hostless",
  5858. .dynamic = 1,
  5859. .dpcm_playback = 1,
  5860. .dpcm_capture = 1,
  5861. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5862. SND_SOC_DPCM_TRIGGER_POST},
  5863. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5864. .ignore_suspend = 1,
  5865. .ignore_pmdown_time = 1,
  5866. .codec_dai_name = "snd-soc-dummy-dai",
  5867. .codec_name = "snd-soc-dummy",
  5868. },
  5869. };
  5870. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5871. /* Backend AFE DAI Links */
  5872. {
  5873. .name = LPASS_BE_AFE_PCM_RX,
  5874. .stream_name = "AFE Playback",
  5875. .cpu_dai_name = "msm-dai-q6-dev.224",
  5876. .platform_name = "msm-pcm-routing",
  5877. .codec_name = "msm-stub-codec.1",
  5878. .codec_dai_name = "msm-stub-rx",
  5879. .no_pcm = 1,
  5880. .dpcm_playback = 1,
  5881. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5882. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5883. /* this dainlink has playback support */
  5884. .ignore_pmdown_time = 1,
  5885. .ignore_suspend = 1,
  5886. },
  5887. {
  5888. .name = LPASS_BE_AFE_PCM_TX,
  5889. .stream_name = "AFE Capture",
  5890. .cpu_dai_name = "msm-dai-q6-dev.225",
  5891. .platform_name = "msm-pcm-routing",
  5892. .codec_name = "msm-stub-codec.1",
  5893. .codec_dai_name = "msm-stub-tx",
  5894. .no_pcm = 1,
  5895. .dpcm_capture = 1,
  5896. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5897. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5898. .ignore_suspend = 1,
  5899. },
  5900. /* Incall Record Uplink BACK END DAI Link */
  5901. {
  5902. .name = LPASS_BE_INCALL_RECORD_TX,
  5903. .stream_name = "Voice Uplink Capture",
  5904. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5905. .platform_name = "msm-pcm-routing",
  5906. .codec_name = "msm-stub-codec.1",
  5907. .codec_dai_name = "msm-stub-tx",
  5908. .no_pcm = 1,
  5909. .dpcm_capture = 1,
  5910. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5911. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5912. .ignore_suspend = 1,
  5913. },
  5914. /* Incall Record Downlink BACK END DAI Link */
  5915. {
  5916. .name = LPASS_BE_INCALL_RECORD_RX,
  5917. .stream_name = "Voice Downlink Capture",
  5918. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5919. .platform_name = "msm-pcm-routing",
  5920. .codec_name = "msm-stub-codec.1",
  5921. .codec_dai_name = "msm-stub-tx",
  5922. .no_pcm = 1,
  5923. .dpcm_capture = 1,
  5924. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5925. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5926. .ignore_suspend = 1,
  5927. },
  5928. /* Incall Music BACK END DAI Link */
  5929. {
  5930. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5931. .stream_name = "Voice Farend Playback",
  5932. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5933. .platform_name = "msm-pcm-routing",
  5934. .codec_name = "msm-stub-codec.1",
  5935. .codec_dai_name = "msm-stub-rx",
  5936. .no_pcm = 1,
  5937. .dpcm_playback = 1,
  5938. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5939. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5940. .ignore_suspend = 1,
  5941. .ignore_pmdown_time = 1,
  5942. },
  5943. /* Incall Music 2 BACK END DAI Link */
  5944. {
  5945. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5946. .stream_name = "Voice2 Farend Playback",
  5947. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5948. .platform_name = "msm-pcm-routing",
  5949. .codec_name = "msm-stub-codec.1",
  5950. .codec_dai_name = "msm-stub-rx",
  5951. .no_pcm = 1,
  5952. .dpcm_playback = 1,
  5953. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5954. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5955. .ignore_suspend = 1,
  5956. .ignore_pmdown_time = 1,
  5957. },
  5958. {
  5959. .name = LPASS_BE_USB_AUDIO_RX,
  5960. .stream_name = "USB Audio Playback",
  5961. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5962. .platform_name = "msm-pcm-routing",
  5963. .codec_name = "msm-stub-codec.1",
  5964. .codec_dai_name = "msm-stub-rx",
  5965. .no_pcm = 1,
  5966. .dpcm_playback = 1,
  5967. .id = MSM_BACKEND_DAI_USB_RX,
  5968. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5969. .ignore_pmdown_time = 1,
  5970. .ignore_suspend = 1,
  5971. },
  5972. {
  5973. .name = LPASS_BE_USB_AUDIO_TX,
  5974. .stream_name = "USB Audio Capture",
  5975. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5976. .platform_name = "msm-pcm-routing",
  5977. .codec_name = "msm-stub-codec.1",
  5978. .codec_dai_name = "msm-stub-tx",
  5979. .no_pcm = 1,
  5980. .dpcm_capture = 1,
  5981. .id = MSM_BACKEND_DAI_USB_TX,
  5982. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5983. .ignore_suspend = 1,
  5984. },
  5985. {
  5986. .name = LPASS_BE_PRI_TDM_RX_0,
  5987. .stream_name = "Primary TDM0 Playback",
  5988. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5989. .platform_name = "msm-pcm-routing",
  5990. .codec_name = "msm-stub-codec.1",
  5991. .codec_dai_name = "msm-stub-rx",
  5992. .no_pcm = 1,
  5993. .dpcm_playback = 1,
  5994. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5995. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5996. .ops = &sm6150_tdm_be_ops,
  5997. .ignore_suspend = 1,
  5998. .ignore_pmdown_time = 1,
  5999. },
  6000. {
  6001. .name = LPASS_BE_PRI_TDM_TX_0,
  6002. .stream_name = "Primary TDM0 Capture",
  6003. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6004. .platform_name = "msm-pcm-routing",
  6005. .codec_name = "msm-stub-codec.1",
  6006. .codec_dai_name = "msm-stub-tx",
  6007. .no_pcm = 1,
  6008. .dpcm_capture = 1,
  6009. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6010. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6011. .ops = &sm6150_tdm_be_ops,
  6012. .ignore_suspend = 1,
  6013. },
  6014. {
  6015. .name = LPASS_BE_SEC_TDM_RX_0,
  6016. .stream_name = "Secondary TDM0 Playback",
  6017. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6018. .platform_name = "msm-pcm-routing",
  6019. .codec_name = "msm-stub-codec.1",
  6020. .codec_dai_name = "msm-stub-rx",
  6021. .no_pcm = 1,
  6022. .dpcm_playback = 1,
  6023. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6024. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6025. .ops = &sm6150_tdm_be_ops,
  6026. .ignore_suspend = 1,
  6027. .ignore_pmdown_time = 1,
  6028. },
  6029. {
  6030. .name = LPASS_BE_SEC_TDM_TX_0,
  6031. .stream_name = "Secondary TDM0 Capture",
  6032. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6033. .platform_name = "msm-pcm-routing",
  6034. .codec_name = "msm-stub-codec.1",
  6035. .codec_dai_name = "msm-stub-tx",
  6036. .no_pcm = 1,
  6037. .dpcm_capture = 1,
  6038. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6039. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6040. .ops = &sm6150_tdm_be_ops,
  6041. .ignore_suspend = 1,
  6042. },
  6043. {
  6044. .name = LPASS_BE_TERT_TDM_RX_0,
  6045. .stream_name = "Tertiary TDM0 Playback",
  6046. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6047. .platform_name = "msm-pcm-routing",
  6048. .codec_name = "msm-stub-codec.1",
  6049. .codec_dai_name = "msm-stub-rx",
  6050. .no_pcm = 1,
  6051. .dpcm_playback = 1,
  6052. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6053. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6054. .ops = &sm6150_tdm_be_ops,
  6055. .ignore_suspend = 1,
  6056. .ignore_pmdown_time = 1,
  6057. },
  6058. {
  6059. .name = LPASS_BE_TERT_TDM_TX_0,
  6060. .stream_name = "Tertiary TDM0 Capture",
  6061. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6062. .platform_name = "msm-pcm-routing",
  6063. .codec_name = "msm-stub-codec.1",
  6064. .codec_dai_name = "msm-stub-tx",
  6065. .no_pcm = 1,
  6066. .dpcm_capture = 1,
  6067. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6068. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6069. .ops = &sm6150_tdm_be_ops,
  6070. .ignore_suspend = 1,
  6071. },
  6072. {
  6073. .name = LPASS_BE_QUAT_TDM_RX_0,
  6074. .stream_name = "Quaternary TDM0 Playback",
  6075. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6076. .platform_name = "msm-pcm-routing",
  6077. .codec_name = "msm-stub-codec.1",
  6078. .codec_dai_name = "msm-stub-rx",
  6079. .no_pcm = 1,
  6080. .dpcm_playback = 1,
  6081. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6082. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6083. .ops = &sm6150_tdm_be_ops,
  6084. .ignore_suspend = 1,
  6085. .ignore_pmdown_time = 1,
  6086. },
  6087. {
  6088. .name = LPASS_BE_QUAT_TDM_TX_0,
  6089. .stream_name = "Quaternary TDM0 Capture",
  6090. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6091. .platform_name = "msm-pcm-routing",
  6092. .codec_name = "msm-stub-codec.1",
  6093. .codec_dai_name = "msm-stub-tx",
  6094. .no_pcm = 1,
  6095. .dpcm_capture = 1,
  6096. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6097. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6098. .ops = &sm6150_tdm_be_ops,
  6099. .ignore_suspend = 1,
  6100. },
  6101. };
  6102. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6103. {
  6104. .name = LPASS_BE_SLIMBUS_0_RX,
  6105. .stream_name = "Slimbus Playback",
  6106. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6107. .platform_name = "msm-pcm-routing",
  6108. .codec_name = "tavil_codec",
  6109. .codec_dai_name = "tavil_rx1",
  6110. .no_pcm = 1,
  6111. .dpcm_playback = 1,
  6112. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6113. .init = &msm_audrx_tavil_init,
  6114. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6115. /* this dainlink has playback support */
  6116. .ignore_pmdown_time = 1,
  6117. .ignore_suspend = 1,
  6118. .ops = &msm_be_ops,
  6119. },
  6120. {
  6121. .name = LPASS_BE_SLIMBUS_0_TX,
  6122. .stream_name = "Slimbus Capture",
  6123. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6124. .platform_name = "msm-pcm-routing",
  6125. .codec_name = "tavil_codec",
  6126. .codec_dai_name = "tavil_tx1",
  6127. .no_pcm = 1,
  6128. .dpcm_capture = 1,
  6129. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6130. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6131. .ignore_suspend = 1,
  6132. .ops = &msm_be_ops,
  6133. },
  6134. {
  6135. .name = LPASS_BE_SLIMBUS_1_RX,
  6136. .stream_name = "Slimbus1 Playback",
  6137. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6138. .platform_name = "msm-pcm-routing",
  6139. .codec_name = "tavil_codec",
  6140. .codec_dai_name = "tavil_rx1",
  6141. .no_pcm = 1,
  6142. .dpcm_playback = 1,
  6143. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6144. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6145. .ops = &msm_be_ops,
  6146. /* dai link has playback support */
  6147. .ignore_pmdown_time = 1,
  6148. .ignore_suspend = 1,
  6149. },
  6150. {
  6151. .name = LPASS_BE_SLIMBUS_1_TX,
  6152. .stream_name = "Slimbus1 Capture",
  6153. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6154. .platform_name = "msm-pcm-routing",
  6155. .codec_name = "tavil_codec",
  6156. .codec_dai_name = "tavil_tx3",
  6157. .no_pcm = 1,
  6158. .dpcm_capture = 1,
  6159. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6160. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6161. .ops = &msm_be_ops,
  6162. .ignore_suspend = 1,
  6163. },
  6164. {
  6165. .name = LPASS_BE_SLIMBUS_2_RX,
  6166. .stream_name = "Slimbus2 Playback",
  6167. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6168. .platform_name = "msm-pcm-routing",
  6169. .codec_name = "tavil_codec",
  6170. .codec_dai_name = "tavil_rx2",
  6171. .no_pcm = 1,
  6172. .dpcm_playback = 1,
  6173. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6174. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6175. .ops = &msm_be_ops,
  6176. .ignore_pmdown_time = 1,
  6177. .ignore_suspend = 1,
  6178. },
  6179. {
  6180. .name = LPASS_BE_SLIMBUS_3_RX,
  6181. .stream_name = "Slimbus3 Playback",
  6182. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6183. .platform_name = "msm-pcm-routing",
  6184. .codec_name = "tavil_codec",
  6185. .codec_dai_name = "tavil_rx1",
  6186. .no_pcm = 1,
  6187. .dpcm_playback = 1,
  6188. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6189. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6190. .ops = &msm_be_ops,
  6191. /* dai link has playback support */
  6192. .ignore_pmdown_time = 1,
  6193. .ignore_suspend = 1,
  6194. },
  6195. {
  6196. .name = LPASS_BE_SLIMBUS_3_TX,
  6197. .stream_name = "Slimbus3 Capture",
  6198. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6199. .platform_name = "msm-pcm-routing",
  6200. .codec_name = "tavil_codec",
  6201. .codec_dai_name = "tavil_tx1",
  6202. .no_pcm = 1,
  6203. .dpcm_capture = 1,
  6204. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6205. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6206. .ops = &msm_be_ops,
  6207. .ignore_suspend = 1,
  6208. },
  6209. {
  6210. .name = LPASS_BE_SLIMBUS_4_RX,
  6211. .stream_name = "Slimbus4 Playback",
  6212. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6213. .platform_name = "msm-pcm-routing",
  6214. .codec_name = "tavil_codec",
  6215. .codec_dai_name = "tavil_rx1",
  6216. .no_pcm = 1,
  6217. .dpcm_playback = 1,
  6218. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6219. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6220. .ops = &msm_be_ops,
  6221. /* dai link has playback support */
  6222. .ignore_pmdown_time = 1,
  6223. .ignore_suspend = 1,
  6224. },
  6225. {
  6226. .name = LPASS_BE_SLIMBUS_5_RX,
  6227. .stream_name = "Slimbus5 Playback",
  6228. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6229. .platform_name = "msm-pcm-routing",
  6230. .codec_name = "tavil_codec",
  6231. .codec_dai_name = "tavil_rx3",
  6232. .no_pcm = 1,
  6233. .dpcm_playback = 1,
  6234. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6235. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6236. .ops = &msm_be_ops,
  6237. /* dai link has playback support */
  6238. .ignore_pmdown_time = 1,
  6239. .ignore_suspend = 1,
  6240. },
  6241. /* MAD BE */
  6242. {
  6243. .name = LPASS_BE_SLIMBUS_5_TX,
  6244. .stream_name = "Slimbus5 Capture",
  6245. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6246. .platform_name = "msm-pcm-routing",
  6247. .codec_name = "tavil_codec",
  6248. .codec_dai_name = "tavil_mad1",
  6249. .no_pcm = 1,
  6250. .dpcm_capture = 1,
  6251. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6252. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6253. .ops = &msm_be_ops,
  6254. .ignore_suspend = 1,
  6255. },
  6256. {
  6257. .name = LPASS_BE_SLIMBUS_6_RX,
  6258. .stream_name = "Slimbus6 Playback",
  6259. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6260. .platform_name = "msm-pcm-routing",
  6261. .codec_name = "tavil_codec",
  6262. .codec_dai_name = "tavil_rx4",
  6263. .no_pcm = 1,
  6264. .dpcm_playback = 1,
  6265. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6266. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6267. .ops = &msm_be_ops,
  6268. /* dai link has playback support */
  6269. .ignore_pmdown_time = 1,
  6270. .ignore_suspend = 1,
  6271. },
  6272. /* Slimbus VI Recording */
  6273. {
  6274. .name = LPASS_BE_SLIMBUS_TX_VI,
  6275. .stream_name = "Slimbus4 Capture",
  6276. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6277. .platform_name = "msm-pcm-routing",
  6278. .codec_name = "tavil_codec",
  6279. .codec_dai_name = "tavil_vifeedback",
  6280. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6281. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6282. .ops = &msm_be_ops,
  6283. .ignore_suspend = 1,
  6284. .no_pcm = 1,
  6285. .dpcm_capture = 1,
  6286. },
  6287. };
  6288. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6289. {
  6290. .name = LPASS_BE_SLIMBUS_7_RX,
  6291. .stream_name = "Slimbus7 Playback",
  6292. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6293. .platform_name = "msm-pcm-routing",
  6294. .codec_name = "btfmslim_slave",
  6295. /* BT codec driver determines capabilities based on
  6296. * dai name, bt codecdai name should always contains
  6297. * supported usecase information
  6298. */
  6299. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6300. .no_pcm = 1,
  6301. .dpcm_playback = 1,
  6302. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6303. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6304. .ops = &msm_wcn_ops,
  6305. /* dai link has playback support */
  6306. .ignore_pmdown_time = 1,
  6307. .ignore_suspend = 1,
  6308. },
  6309. {
  6310. .name = LPASS_BE_SLIMBUS_7_TX,
  6311. .stream_name = "Slimbus7 Capture",
  6312. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6313. .platform_name = "msm-pcm-routing",
  6314. .codec_name = "btfmslim_slave",
  6315. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6316. .no_pcm = 1,
  6317. .dpcm_capture = 1,
  6318. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6319. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6320. .ops = &msm_wcn_ops,
  6321. .ignore_suspend = 1,
  6322. },
  6323. {
  6324. .name = LPASS_BE_SLIMBUS_8_TX,
  6325. .stream_name = "Slimbus8 Capture",
  6326. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6327. .platform_name = "msm-pcm-routing",
  6328. .codec_name = "btfmslim_slave",
  6329. .codec_dai_name = "btfm_fm_slim_tx",
  6330. .no_pcm = 1,
  6331. .dpcm_capture = 1,
  6332. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6333. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6334. .init = &msm_wcn_init,
  6335. .ops = &msm_wcn_ops,
  6336. .ignore_suspend = 1,
  6337. },
  6338. };
  6339. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6340. /* DISP PORT BACK END DAI Link */
  6341. {
  6342. .name = LPASS_BE_DISPLAY_PORT,
  6343. .stream_name = "Display Port Playback",
  6344. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6345. .platform_name = "msm-pcm-routing",
  6346. .codec_name = "msm-ext-disp-audio-codec-rx",
  6347. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6348. .no_pcm = 1,
  6349. .dpcm_playback = 1,
  6350. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6351. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6352. .ignore_pmdown_time = 1,
  6353. .ignore_suspend = 1,
  6354. },
  6355. };
  6356. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6357. {
  6358. .name = LPASS_BE_PRI_MI2S_RX,
  6359. .stream_name = "Primary MI2S Playback",
  6360. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6361. .platform_name = "msm-pcm-routing",
  6362. .codec_name = "msm-stub-codec.1",
  6363. .codec_dai_name = "msm-stub-rx",
  6364. .no_pcm = 1,
  6365. .dpcm_playback = 1,
  6366. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6367. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6368. .ops = &msm_mi2s_be_ops,
  6369. .ignore_suspend = 1,
  6370. .ignore_pmdown_time = 1,
  6371. },
  6372. {
  6373. .name = LPASS_BE_PRI_MI2S_TX,
  6374. .stream_name = "Primary MI2S Capture",
  6375. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6376. .platform_name = "msm-pcm-routing",
  6377. .codec_name = "msm-stub-codec.1",
  6378. .codec_dai_name = "msm-stub-tx",
  6379. .no_pcm = 1,
  6380. .dpcm_capture = 1,
  6381. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6382. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6383. .ops = &msm_mi2s_be_ops,
  6384. .ignore_suspend = 1,
  6385. },
  6386. {
  6387. .name = LPASS_BE_SEC_MI2S_RX,
  6388. .stream_name = "Secondary MI2S Playback",
  6389. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6390. .platform_name = "msm-pcm-routing",
  6391. .codec_name = "msm-stub-codec.1",
  6392. .codec_dai_name = "msm-stub-rx",
  6393. .no_pcm = 1,
  6394. .dpcm_playback = 1,
  6395. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6396. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6397. .ops = &msm_mi2s_be_ops,
  6398. .ignore_suspend = 1,
  6399. .ignore_pmdown_time = 1,
  6400. },
  6401. {
  6402. .name = LPASS_BE_SEC_MI2S_TX,
  6403. .stream_name = "Secondary MI2S Capture",
  6404. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6405. .platform_name = "msm-pcm-routing",
  6406. .codec_name = "msm-stub-codec.1",
  6407. .codec_dai_name = "msm-stub-tx",
  6408. .no_pcm = 1,
  6409. .dpcm_capture = 1,
  6410. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6411. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6412. .ops = &msm_mi2s_be_ops,
  6413. .ignore_suspend = 1,
  6414. },
  6415. {
  6416. .name = LPASS_BE_TERT_MI2S_RX,
  6417. .stream_name = "Tertiary MI2S Playback",
  6418. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6419. .platform_name = "msm-pcm-routing",
  6420. .codec_name = "msm-stub-codec.1",
  6421. .codec_dai_name = "msm-stub-rx",
  6422. .no_pcm = 1,
  6423. .dpcm_playback = 1,
  6424. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6425. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6426. .ops = &msm_mi2s_be_ops,
  6427. .ignore_suspend = 1,
  6428. .ignore_pmdown_time = 1,
  6429. },
  6430. {
  6431. .name = LPASS_BE_TERT_MI2S_TX,
  6432. .stream_name = "Tertiary MI2S Capture",
  6433. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6434. .platform_name = "msm-pcm-routing",
  6435. .codec_name = "msm-stub-codec.1",
  6436. .codec_dai_name = "msm-stub-tx",
  6437. .no_pcm = 1,
  6438. .dpcm_capture = 1,
  6439. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6440. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6441. .ops = &msm_mi2s_be_ops,
  6442. .ignore_suspend = 1,
  6443. },
  6444. {
  6445. .name = LPASS_BE_QUAT_MI2S_RX,
  6446. .stream_name = "Quaternary MI2S Playback",
  6447. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6448. .platform_name = "msm-pcm-routing",
  6449. .codec_name = "msm-stub-codec.1",
  6450. .codec_dai_name = "msm-stub-rx",
  6451. .no_pcm = 1,
  6452. .dpcm_playback = 1,
  6453. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6454. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6455. .ops = &msm_mi2s_be_ops,
  6456. .ignore_suspend = 1,
  6457. .ignore_pmdown_time = 1,
  6458. },
  6459. {
  6460. .name = LPASS_BE_QUAT_MI2S_TX,
  6461. .stream_name = "Quaternary MI2S Capture",
  6462. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6463. .platform_name = "msm-pcm-routing",
  6464. .codec_name = "msm-stub-codec.1",
  6465. .codec_dai_name = "msm-stub-tx",
  6466. .no_pcm = 1,
  6467. .dpcm_capture = 1,
  6468. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6469. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6470. .ops = &msm_mi2s_be_ops,
  6471. .ignore_suspend = 1,
  6472. },
  6473. {
  6474. .name = LPASS_BE_QUIN_MI2S_RX,
  6475. .stream_name = "Quinary MI2S Playback",
  6476. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6477. .platform_name = "msm-pcm-routing",
  6478. .codec_name = "msm-stub-codec.1",
  6479. .codec_dai_name = "msm-stub-rx",
  6480. .no_pcm = 1,
  6481. .dpcm_playback = 1,
  6482. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6483. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6484. .ops = &msm_mi2s_be_ops,
  6485. .ignore_suspend = 1,
  6486. .ignore_pmdown_time = 1,
  6487. },
  6488. {
  6489. .name = LPASS_BE_QUIN_MI2S_TX,
  6490. .stream_name = "Quinary MI2S Capture",
  6491. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6492. .platform_name = "msm-pcm-routing",
  6493. .codec_name = "msm-stub-codec.1",
  6494. .codec_dai_name = "msm-stub-tx",
  6495. .no_pcm = 1,
  6496. .dpcm_capture = 1,
  6497. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6498. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6499. .ops = &msm_mi2s_be_ops,
  6500. .ignore_suspend = 1,
  6501. },
  6502. };
  6503. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6504. /* Primary AUX PCM Backend DAI Links */
  6505. {
  6506. .name = LPASS_BE_AUXPCM_RX,
  6507. .stream_name = "AUX PCM Playback",
  6508. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6509. .platform_name = "msm-pcm-routing",
  6510. .codec_name = "msm-stub-codec.1",
  6511. .codec_dai_name = "msm-stub-rx",
  6512. .no_pcm = 1,
  6513. .dpcm_playback = 1,
  6514. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6515. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6516. .ignore_pmdown_time = 1,
  6517. .ignore_suspend = 1,
  6518. },
  6519. {
  6520. .name = LPASS_BE_AUXPCM_TX,
  6521. .stream_name = "AUX PCM Capture",
  6522. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6523. .platform_name = "msm-pcm-routing",
  6524. .codec_name = "msm-stub-codec.1",
  6525. .codec_dai_name = "msm-stub-tx",
  6526. .no_pcm = 1,
  6527. .dpcm_capture = 1,
  6528. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6529. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6530. .ignore_suspend = 1,
  6531. },
  6532. /* Secondary AUX PCM Backend DAI Links */
  6533. {
  6534. .name = LPASS_BE_SEC_AUXPCM_RX,
  6535. .stream_name = "Sec AUX PCM Playback",
  6536. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6537. .platform_name = "msm-pcm-routing",
  6538. .codec_name = "msm-stub-codec.1",
  6539. .codec_dai_name = "msm-stub-rx",
  6540. .no_pcm = 1,
  6541. .dpcm_playback = 1,
  6542. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6543. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6544. .ignore_pmdown_time = 1,
  6545. .ignore_suspend = 1,
  6546. },
  6547. {
  6548. .name = LPASS_BE_SEC_AUXPCM_TX,
  6549. .stream_name = "Sec AUX PCM Capture",
  6550. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6551. .platform_name = "msm-pcm-routing",
  6552. .codec_name = "msm-stub-codec.1",
  6553. .codec_dai_name = "msm-stub-tx",
  6554. .no_pcm = 1,
  6555. .dpcm_capture = 1,
  6556. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6557. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6558. .ignore_suspend = 1,
  6559. },
  6560. /* Tertiary AUX PCM Backend DAI Links */
  6561. {
  6562. .name = LPASS_BE_TERT_AUXPCM_RX,
  6563. .stream_name = "Tert AUX PCM Playback",
  6564. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6565. .platform_name = "msm-pcm-routing",
  6566. .codec_name = "msm-stub-codec.1",
  6567. .codec_dai_name = "msm-stub-rx",
  6568. .no_pcm = 1,
  6569. .dpcm_playback = 1,
  6570. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6571. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6572. .ignore_suspend = 1,
  6573. },
  6574. {
  6575. .name = LPASS_BE_TERT_AUXPCM_TX,
  6576. .stream_name = "Tert AUX PCM Capture",
  6577. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6578. .platform_name = "msm-pcm-routing",
  6579. .codec_name = "msm-stub-codec.1",
  6580. .codec_dai_name = "msm-stub-tx",
  6581. .no_pcm = 1,
  6582. .dpcm_capture = 1,
  6583. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6584. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6585. .ignore_suspend = 1,
  6586. },
  6587. /* Quaternary AUX PCM Backend DAI Links */
  6588. {
  6589. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6590. .stream_name = "Quat AUX PCM Playback",
  6591. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6592. .platform_name = "msm-pcm-routing",
  6593. .codec_name = "msm-stub-codec.1",
  6594. .codec_dai_name = "msm-stub-rx",
  6595. .no_pcm = 1,
  6596. .dpcm_playback = 1,
  6597. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6598. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6599. .ignore_pmdown_time = 1,
  6600. .ignore_suspend = 1,
  6601. },
  6602. {
  6603. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6604. .stream_name = "Quat AUX PCM Capture",
  6605. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6606. .platform_name = "msm-pcm-routing",
  6607. .codec_name = "msm-stub-codec.1",
  6608. .codec_dai_name = "msm-stub-tx",
  6609. .no_pcm = 1,
  6610. .dpcm_capture = 1,
  6611. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6612. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6613. .ignore_suspend = 1,
  6614. },
  6615. /* Quinary AUX PCM Backend DAI Links */
  6616. {
  6617. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6618. .stream_name = "Quin AUX PCM Playback",
  6619. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6620. .platform_name = "msm-pcm-routing",
  6621. .codec_name = "msm-stub-codec.1",
  6622. .codec_dai_name = "msm-stub-rx",
  6623. .no_pcm = 1,
  6624. .dpcm_playback = 1,
  6625. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6626. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6627. .ignore_pmdown_time = 1,
  6628. .ignore_suspend = 1,
  6629. },
  6630. {
  6631. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6632. .stream_name = "Quin AUX PCM Capture",
  6633. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6634. .platform_name = "msm-pcm-routing",
  6635. .codec_name = "msm-stub-codec.1",
  6636. .codec_dai_name = "msm-stub-tx",
  6637. .no_pcm = 1,
  6638. .dpcm_capture = 1,
  6639. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6640. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6641. .ignore_suspend = 1,
  6642. },
  6643. };
  6644. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6645. /* WSA CDC DMA Backend DAI Links */
  6646. {
  6647. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6648. .stream_name = "WSA CDC DMA0 Playback",
  6649. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6650. .platform_name = "msm-pcm-routing",
  6651. .codec_name = "bolero_codec",
  6652. .codec_dai_name = "wsa_macro_rx1",
  6653. .no_pcm = 1,
  6654. .dpcm_playback = 1,
  6655. .init = &msm_int_audrx_init,
  6656. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6657. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6658. .ignore_pmdown_time = 1,
  6659. .ignore_suspend = 1,
  6660. .ops = &msm_cdc_dma_be_ops,
  6661. },
  6662. {
  6663. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6664. .stream_name = "WSA CDC DMA1 Playback",
  6665. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6666. .platform_name = "msm-pcm-routing",
  6667. .codec_name = "bolero_codec",
  6668. .codec_dai_name = "wsa_macro_rx_mix",
  6669. .no_pcm = 1,
  6670. .dpcm_playback = 1,
  6671. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6672. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6673. .ignore_pmdown_time = 1,
  6674. .ignore_suspend = 1,
  6675. .ops = &msm_cdc_dma_be_ops,
  6676. },
  6677. {
  6678. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6679. .stream_name = "WSA CDC DMA1 Capture",
  6680. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6681. .platform_name = "msm-pcm-routing",
  6682. .codec_name = "bolero_codec",
  6683. .codec_dai_name = "wsa_macro_echo",
  6684. .no_pcm = 1,
  6685. .dpcm_capture = 1,
  6686. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6687. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6688. .ignore_suspend = 1,
  6689. .ops = &msm_cdc_dma_be_ops,
  6690. },
  6691. };
  6692. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6693. /* RX CDC DMA Backend DAI Links */
  6694. {
  6695. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6696. .stream_name = "RX CDC DMA0 Playback",
  6697. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6698. .platform_name = "msm-pcm-routing",
  6699. .codec_name = "bolero_codec",
  6700. .codec_dai_name = "rx_macro_rx1",
  6701. .no_pcm = 1,
  6702. .dpcm_playback = 1,
  6703. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6704. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6705. .ignore_pmdown_time = 1,
  6706. .ignore_suspend = 1,
  6707. .ops = &msm_cdc_dma_be_ops,
  6708. },
  6709. {
  6710. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6711. .stream_name = "RX CDC DMA1 Playback",
  6712. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6713. .platform_name = "msm-pcm-routing",
  6714. .codec_name = "bolero_codec",
  6715. .codec_dai_name = "rx_macro_rx2",
  6716. .no_pcm = 1,
  6717. .dpcm_playback = 1,
  6718. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6719. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6720. .ignore_pmdown_time = 1,
  6721. .ignore_suspend = 1,
  6722. .ops = &msm_cdc_dma_be_ops,
  6723. },
  6724. {
  6725. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6726. .stream_name = "RX CDC DMA2 Playback",
  6727. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6728. .platform_name = "msm-pcm-routing",
  6729. .codec_name = "bolero_codec",
  6730. .codec_dai_name = "rx_macro_rx3",
  6731. .no_pcm = 1,
  6732. .dpcm_playback = 1,
  6733. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6734. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6735. .ignore_pmdown_time = 1,
  6736. .ignore_suspend = 1,
  6737. .ops = &msm_cdc_dma_be_ops,
  6738. },
  6739. {
  6740. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6741. .stream_name = "RX CDC DMA3 Playback",
  6742. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6743. .platform_name = "msm-pcm-routing",
  6744. .codec_name = "bolero_codec",
  6745. .codec_dai_name = "rx_macro_rx4",
  6746. .no_pcm = 1,
  6747. .dpcm_playback = 1,
  6748. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6749. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6750. .ignore_pmdown_time = 1,
  6751. .ignore_suspend = 1,
  6752. .ops = &msm_cdc_dma_be_ops,
  6753. },
  6754. /* TX CDC DMA Backend DAI Links */
  6755. {
  6756. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6757. .stream_name = "TX CDC DMA3 Capture",
  6758. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6759. .platform_name = "msm-pcm-routing",
  6760. .codec_name = "bolero_codec",
  6761. .codec_dai_name = "tx_macro_tx1",
  6762. .no_pcm = 1,
  6763. .dpcm_capture = 1,
  6764. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6765. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6766. .ignore_suspend = 1,
  6767. .ops = &msm_cdc_dma_be_ops,
  6768. },
  6769. {
  6770. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6771. .stream_name = "TX CDC DMA4 Capture",
  6772. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6773. .platform_name = "msm-pcm-routing",
  6774. .codec_name = "bolero_codec",
  6775. .codec_dai_name = "tx_macro_tx2",
  6776. .no_pcm = 1,
  6777. .dpcm_capture = 1,
  6778. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6779. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6780. .ignore_suspend = 1,
  6781. .ops = &msm_cdc_dma_be_ops,
  6782. },
  6783. };
  6784. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6785. ARRAY_SIZE(msm_common_dai_links) +
  6786. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6787. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6788. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6789. ARRAY_SIZE(msm_common_be_dai_links) +
  6790. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6791. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6792. ARRAY_SIZE(ext_disp_be_dai_link) +
  6793. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6794. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6795. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6796. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6797. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6798. {
  6799. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6800. struct snd_soc_pcm_runtime *rtd;
  6801. int ret = 0;
  6802. void *mbhc_calibration;
  6803. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6804. if (!rtd) {
  6805. dev_err(card->dev,
  6806. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6807. __func__, be_dl_name);
  6808. ret = -EINVAL;
  6809. goto err_pcm_runtime;
  6810. }
  6811. mbhc_calibration = def_wcd_mbhc_cal();
  6812. if (!mbhc_calibration) {
  6813. ret = -ENOMEM;
  6814. goto err_mbhc_cal;
  6815. }
  6816. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6817. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6818. if (ret) {
  6819. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6820. __func__, ret);
  6821. goto err_hs_detect;
  6822. }
  6823. return 0;
  6824. err_hs_detect:
  6825. kfree(mbhc_calibration);
  6826. err_mbhc_cal:
  6827. err_pcm_runtime:
  6828. return ret;
  6829. }
  6830. static int msm_populate_dai_link_component_of_node(
  6831. struct snd_soc_card *card)
  6832. {
  6833. int i, index, ret = 0;
  6834. struct device *cdev = card->dev;
  6835. struct snd_soc_dai_link *dai_link = card->dai_link;
  6836. struct device_node *np;
  6837. if (!cdev) {
  6838. pr_err("%s: Sound card device memory NULL\n", __func__);
  6839. return -ENODEV;
  6840. }
  6841. for (i = 0; i < card->num_links; i++) {
  6842. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6843. continue;
  6844. /* populate platform_of_node for snd card dai links */
  6845. if (dai_link[i].platform_name &&
  6846. !dai_link[i].platform_of_node) {
  6847. index = of_property_match_string(cdev->of_node,
  6848. "asoc-platform-names",
  6849. dai_link[i].platform_name);
  6850. if (index < 0) {
  6851. pr_err("%s: No match found for platform name: %s\n",
  6852. __func__, dai_link[i].platform_name);
  6853. ret = index;
  6854. goto err;
  6855. }
  6856. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6857. index);
  6858. if (!np) {
  6859. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6860. __func__, dai_link[i].platform_name,
  6861. index);
  6862. ret = -ENODEV;
  6863. goto err;
  6864. }
  6865. dai_link[i].platform_of_node = np;
  6866. dai_link[i].platform_name = NULL;
  6867. }
  6868. /* populate cpu_of_node for snd card dai links */
  6869. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6870. index = of_property_match_string(cdev->of_node,
  6871. "asoc-cpu-names",
  6872. dai_link[i].cpu_dai_name);
  6873. if (index >= 0) {
  6874. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6875. index);
  6876. if (!np) {
  6877. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6878. __func__,
  6879. dai_link[i].cpu_dai_name);
  6880. ret = -ENODEV;
  6881. goto err;
  6882. }
  6883. dai_link[i].cpu_of_node = np;
  6884. dai_link[i].cpu_dai_name = NULL;
  6885. }
  6886. }
  6887. /* populate codec_of_node for snd card dai links */
  6888. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6889. index = of_property_match_string(cdev->of_node,
  6890. "asoc-codec-names",
  6891. dai_link[i].codec_name);
  6892. if (index < 0)
  6893. continue;
  6894. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6895. index);
  6896. if (!np) {
  6897. pr_err("%s: retrieving phandle for codec %s failed\n",
  6898. __func__, dai_link[i].codec_name);
  6899. ret = -ENODEV;
  6900. goto err;
  6901. }
  6902. dai_link[i].codec_of_node = np;
  6903. dai_link[i].codec_name = NULL;
  6904. }
  6905. }
  6906. err:
  6907. return ret;
  6908. }
  6909. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6910. {
  6911. int ret = 0;
  6912. struct snd_soc_codec *codec = rtd->codec;
  6913. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6914. ARRAY_SIZE(msm_tavil_snd_controls));
  6915. if (ret < 0) {
  6916. dev_err(codec->dev,
  6917. "%s: add_codec_controls failed, err = %d\n",
  6918. __func__, ret);
  6919. return ret;
  6920. }
  6921. return 0;
  6922. }
  6923. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6924. struct snd_pcm_hw_params *params)
  6925. {
  6926. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6927. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6928. int ret = 0;
  6929. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6930. 151};
  6931. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6932. 134, 135, 136, 137, 138, 139,
  6933. 140, 141, 142, 143};
  6934. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6935. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6936. slim_rx_cfg[SLIM_RX_0].channels,
  6937. rx_ch);
  6938. if (ret < 0)
  6939. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6940. __func__, ret);
  6941. } else {
  6942. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6943. slim_tx_cfg[SLIM_TX_0].channels,
  6944. tx_ch, 0, 0);
  6945. if (ret < 0)
  6946. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6947. __func__, ret);
  6948. }
  6949. return ret;
  6950. }
  6951. static struct snd_soc_ops msm_stub_be_ops = {
  6952. .hw_params = msm_snd_stub_hw_params,
  6953. };
  6954. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6955. /* FrontEnd DAI Links */
  6956. {
  6957. .name = "MSMSTUB Media1",
  6958. .stream_name = "MultiMedia1",
  6959. .cpu_dai_name = "MultiMedia1",
  6960. .platform_name = "msm-pcm-dsp.0",
  6961. .dynamic = 1,
  6962. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6963. .dpcm_playback = 1,
  6964. .dpcm_capture = 1,
  6965. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6966. SND_SOC_DPCM_TRIGGER_POST},
  6967. .codec_dai_name = "snd-soc-dummy-dai",
  6968. .codec_name = "snd-soc-dummy",
  6969. .ignore_suspend = 1,
  6970. /* this dainlink has playback support */
  6971. .ignore_pmdown_time = 1,
  6972. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6973. },
  6974. };
  6975. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6976. /* Backend DAI Links */
  6977. {
  6978. .name = LPASS_BE_SLIMBUS_0_RX,
  6979. .stream_name = "Slimbus Playback",
  6980. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6981. .platform_name = "msm-pcm-routing",
  6982. .codec_name = "msm-stub-codec.1",
  6983. .codec_dai_name = "msm-stub-rx",
  6984. .no_pcm = 1,
  6985. .dpcm_playback = 1,
  6986. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6987. .init = &msm_audrx_stub_init,
  6988. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6989. .ignore_pmdown_time = 1, /* dai link has playback support */
  6990. .ignore_suspend = 1,
  6991. .ops = &msm_stub_be_ops,
  6992. },
  6993. {
  6994. .name = LPASS_BE_SLIMBUS_0_TX,
  6995. .stream_name = "Slimbus Capture",
  6996. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6997. .platform_name = "msm-pcm-routing",
  6998. .codec_name = "msm-stub-codec.1",
  6999. .codec_dai_name = "msm-stub-tx",
  7000. .no_pcm = 1,
  7001. .dpcm_capture = 1,
  7002. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7003. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7004. .ignore_suspend = 1,
  7005. .ops = &msm_stub_be_ops,
  7006. },
  7007. };
  7008. static struct snd_soc_dai_link msm_stub_dai_links[
  7009. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7010. ARRAY_SIZE(msm_stub_be_dai_links)];
  7011. struct snd_soc_card snd_soc_card_stub_msm = {
  7012. .name = "sm6150-stub-snd-card",
  7013. };
  7014. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7015. { .compatible = "qcom,sm6150-asoc-snd",
  7016. .data = "codec"},
  7017. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7018. .data = "stub_codec"},
  7019. {},
  7020. };
  7021. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7022. {
  7023. struct snd_soc_card *card = NULL;
  7024. struct snd_soc_dai_link *dailink;
  7025. int total_links = 0, rc = 0;
  7026. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7027. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7028. u32 wcn_btfm_intf = 0;
  7029. const struct of_device_id *match;
  7030. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7031. if (!match) {
  7032. dev_err(dev, "%s: No DT match found for sound card\n",
  7033. __func__);
  7034. return NULL;
  7035. }
  7036. if (!strcmp(match->data, "codec")) {
  7037. card = &snd_soc_card_sm6150_msm;
  7038. memcpy(msm_sm6150_dai_links + total_links,
  7039. msm_common_dai_links,
  7040. sizeof(msm_common_dai_links));
  7041. total_links += ARRAY_SIZE(msm_common_dai_links);
  7042. memcpy(msm_sm6150_dai_links + total_links,
  7043. msm_common_misc_fe_dai_links,
  7044. sizeof(msm_common_misc_fe_dai_links));
  7045. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7046. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7047. &tavil_codec);
  7048. if (rc) {
  7049. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7050. __func__);
  7051. } else {
  7052. if (tavil_codec) {
  7053. card->late_probe =
  7054. msm_snd_card_tavil_late_probe;
  7055. memcpy(msm_sm6150_dai_links + total_links,
  7056. msm_tavil_fe_dai_links,
  7057. sizeof(msm_tavil_fe_dai_links));
  7058. total_links +=
  7059. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7060. }
  7061. }
  7062. if (!tavil_codec) {
  7063. memcpy(msm_sm6150_dai_links + total_links,
  7064. msm_bolero_fe_dai_links,
  7065. sizeof(msm_bolero_fe_dai_links));
  7066. total_links +=
  7067. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7068. }
  7069. memcpy(msm_sm6150_dai_links + total_links,
  7070. msm_common_be_dai_links,
  7071. sizeof(msm_common_be_dai_links));
  7072. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7073. if (tavil_codec) {
  7074. memcpy(msm_sm6150_dai_links + total_links,
  7075. msm_tavil_be_dai_links,
  7076. sizeof(msm_tavil_be_dai_links));
  7077. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7078. } else {
  7079. memcpy(msm_sm6150_dai_links + total_links,
  7080. msm_wsa_cdc_dma_be_dai_links,
  7081. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7082. total_links +=
  7083. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7084. memcpy(msm_sm6150_dai_links + total_links,
  7085. msm_rx_tx_cdc_dma_be_dai_links,
  7086. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7087. total_links +=
  7088. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7089. }
  7090. rc = of_property_read_u32(dev->of_node,
  7091. "qcom,ext-disp-audio-rx",
  7092. &ext_disp_audio_intf);
  7093. if (rc) {
  7094. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7095. __func__);
  7096. } else {
  7097. if (ext_disp_audio_intf) {
  7098. memcpy(msm_sm6150_dai_links + total_links,
  7099. ext_disp_be_dai_link,
  7100. sizeof(ext_disp_be_dai_link));
  7101. total_links +=
  7102. ARRAY_SIZE(ext_disp_be_dai_link);
  7103. }
  7104. }
  7105. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7106. &mi2s_audio_intf);
  7107. if (rc) {
  7108. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7109. __func__);
  7110. } else {
  7111. if (mi2s_audio_intf) {
  7112. memcpy(msm_sm6150_dai_links + total_links,
  7113. msm_mi2s_be_dai_links,
  7114. sizeof(msm_mi2s_be_dai_links));
  7115. total_links +=
  7116. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7117. }
  7118. }
  7119. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7120. &wcn_btfm_intf);
  7121. if (rc) {
  7122. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7123. __func__);
  7124. } else {
  7125. if (wcn_btfm_intf) {
  7126. memcpy(msm_sm6150_dai_links + total_links,
  7127. msm_wcn_be_dai_links,
  7128. sizeof(msm_wcn_be_dai_links));
  7129. total_links +=
  7130. ARRAY_SIZE(msm_wcn_be_dai_links);
  7131. }
  7132. }
  7133. rc = of_property_read_u32(dev->of_node,
  7134. "qcom,auxpcm-audio-intf",
  7135. &auxpcm_audio_intf);
  7136. if (rc) {
  7137. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7138. __func__);
  7139. } else {
  7140. if (auxpcm_audio_intf) {
  7141. memcpy(msm_sm6150_dai_links + total_links,
  7142. msm_auxpcm_be_dai_links,
  7143. sizeof(msm_auxpcm_be_dai_links));
  7144. total_links +=
  7145. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7146. }
  7147. }
  7148. dailink = msm_sm6150_dai_links;
  7149. } else if (!strcmp(match->data, "stub_codec")) {
  7150. card = &snd_soc_card_stub_msm;
  7151. memcpy(msm_stub_dai_links + total_links,
  7152. msm_stub_fe_dai_links,
  7153. sizeof(msm_stub_fe_dai_links));
  7154. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7155. memcpy(msm_stub_dai_links + total_links,
  7156. msm_stub_be_dai_links,
  7157. sizeof(msm_stub_be_dai_links));
  7158. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7159. dailink = msm_stub_dai_links;
  7160. }
  7161. if (card) {
  7162. card->dai_link = dailink;
  7163. card->num_links = total_links;
  7164. }
  7165. return card;
  7166. }
  7167. static int msm_wsa881x_init(struct snd_soc_component *component)
  7168. {
  7169. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7170. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7171. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7172. SPKR_L_BOOST, SPKR_L_VI};
  7173. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7174. SPKR_R_BOOST, SPKR_R_VI};
  7175. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7176. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7177. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7178. struct msm_asoc_mach_data *pdata;
  7179. struct snd_soc_dapm_context *dapm;
  7180. struct snd_card *card = component->card->snd_card;
  7181. struct snd_info_entry *entry;
  7182. int ret = 0;
  7183. if (!codec) {
  7184. pr_err("%s codec is NULL\n", __func__);
  7185. return -EINVAL;
  7186. }
  7187. dapm = snd_soc_codec_get_dapm(codec);
  7188. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7189. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7190. __func__, codec->component.name);
  7191. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7192. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7193. &ch_rate[0], &spkleft_port_types[0]);
  7194. if (dapm->component) {
  7195. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7196. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7197. }
  7198. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7199. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7200. __func__, codec->component.name);
  7201. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7202. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7203. &ch_rate[0], &spkright_port_types[0]);
  7204. if (dapm->component) {
  7205. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7206. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7207. }
  7208. } else {
  7209. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7210. codec->component.name);
  7211. ret = -EINVAL;
  7212. goto err;
  7213. }
  7214. pdata = snd_soc_card_get_drvdata(component->card);
  7215. if (!pdata->codec_root) {
  7216. entry = snd_info_create_subdir(card->module, "codecs",
  7217. card->proc_root);
  7218. if (!entry) {
  7219. pr_err("%s: Cannot create codecs module entry\n",
  7220. __func__);
  7221. ret = 0;
  7222. goto err;
  7223. }
  7224. pdata->codec_root = entry;
  7225. }
  7226. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7227. codec);
  7228. err:
  7229. return ret;
  7230. }
  7231. static int msm_aux_codec_init(struct snd_soc_component *component)
  7232. {
  7233. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7234. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7235. int ret = 0;
  7236. void *mbhc_calibration;
  7237. struct snd_info_entry *entry;
  7238. struct snd_card *card = component->card->snd_card;
  7239. struct msm_asoc_mach_data *pdata;
  7240. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7241. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7242. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7243. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7244. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7245. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7246. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7247. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7248. snd_soc_dapm_sync(dapm);
  7249. pdata = snd_soc_card_get_drvdata(component->card);
  7250. if (!pdata->codec_root) {
  7251. entry = snd_info_create_subdir(card->module, "codecs",
  7252. card->proc_root);
  7253. if (!entry) {
  7254. pr_err("%s: Cannot create codecs module entry\n",
  7255. __func__);
  7256. ret = 0;
  7257. goto codec_root_err;
  7258. }
  7259. pdata->codec_root = entry;
  7260. }
  7261. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7262. codec_root_err:
  7263. mbhc_calibration = def_wcd_mbhc_cal();
  7264. if (!mbhc_calibration) {
  7265. return -ENOMEM;
  7266. }
  7267. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7268. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7269. return ret;
  7270. }
  7271. static int msm_init_aux_dev(struct platform_device *pdev,
  7272. struct snd_soc_card *card)
  7273. {
  7274. struct device_node *wsa_of_node;
  7275. struct device_node *aux_codec_of_node;
  7276. u32 wsa_max_devs;
  7277. u32 wsa_dev_cnt;
  7278. u32 codec_aux_dev_cnt = 0;
  7279. int i;
  7280. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7281. struct aux_codec_dev_info *aux_cdc_dev_info;
  7282. const char *auxdev_name_prefix[1];
  7283. char *dev_name_str = NULL;
  7284. int found = 0;
  7285. int codecs_found = 0;
  7286. int ret = 0;
  7287. /* Get maximum WSA device count for this platform */
  7288. ret = of_property_read_u32(pdev->dev.of_node,
  7289. "qcom,wsa-max-devs", &wsa_max_devs);
  7290. if (ret) {
  7291. dev_info(&pdev->dev,
  7292. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7293. __func__, pdev->dev.of_node->full_name, ret);
  7294. wsa_max_devs = 0;
  7295. goto codec_aux_dev;
  7296. }
  7297. if (wsa_max_devs == 0) {
  7298. dev_warn(&pdev->dev,
  7299. "%s: Max WSA devices is 0 for this target?\n",
  7300. __func__);
  7301. goto codec_aux_dev;
  7302. }
  7303. /* Get count of WSA device phandles for this platform */
  7304. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7305. "qcom,wsa-devs", NULL);
  7306. if (wsa_dev_cnt == -ENOENT) {
  7307. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7308. __func__);
  7309. goto err;
  7310. } else if (wsa_dev_cnt <= 0) {
  7311. dev_err(&pdev->dev,
  7312. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7313. __func__, wsa_dev_cnt);
  7314. ret = -EINVAL;
  7315. goto err;
  7316. }
  7317. /*
  7318. * Expect total phandles count to be NOT less than maximum possible
  7319. * WSA count. However, if it is less, then assign same value to
  7320. * max count as well.
  7321. */
  7322. if (wsa_dev_cnt < wsa_max_devs) {
  7323. dev_dbg(&pdev->dev,
  7324. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7325. __func__, wsa_max_devs, wsa_dev_cnt);
  7326. wsa_max_devs = wsa_dev_cnt;
  7327. }
  7328. /* Make sure prefix string passed for each WSA device */
  7329. ret = of_property_count_strings(pdev->dev.of_node,
  7330. "qcom,wsa-aux-dev-prefix");
  7331. if (ret != wsa_dev_cnt) {
  7332. dev_err(&pdev->dev,
  7333. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7334. __func__, wsa_dev_cnt, ret);
  7335. ret = -EINVAL;
  7336. goto err;
  7337. }
  7338. /*
  7339. * Alloc mem to store phandle and index info of WSA device, if already
  7340. * registered with ALSA core
  7341. */
  7342. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7343. sizeof(struct msm_wsa881x_dev_info),
  7344. GFP_KERNEL);
  7345. if (!wsa881x_dev_info) {
  7346. ret = -ENOMEM;
  7347. goto err;
  7348. }
  7349. /*
  7350. * search and check whether all WSA devices are already
  7351. * registered with ALSA core or not. If found a node, store
  7352. * the node and the index in a local array of struct for later
  7353. * use.
  7354. */
  7355. for (i = 0; i < wsa_dev_cnt; i++) {
  7356. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7357. "qcom,wsa-devs", i);
  7358. if (unlikely(!wsa_of_node)) {
  7359. /* we should not be here */
  7360. dev_err(&pdev->dev,
  7361. "%s: wsa dev node is not present\n",
  7362. __func__);
  7363. ret = -EINVAL;
  7364. goto err;
  7365. }
  7366. if (soc_find_component(wsa_of_node, NULL)) {
  7367. /* WSA device registered with ALSA core */
  7368. wsa881x_dev_info[found].of_node = wsa_of_node;
  7369. wsa881x_dev_info[found].index = i;
  7370. found++;
  7371. if (found == wsa_max_devs)
  7372. break;
  7373. }
  7374. }
  7375. if (found < wsa_max_devs) {
  7376. dev_dbg(&pdev->dev,
  7377. "%s: failed to find %d components. Found only %d\n",
  7378. __func__, wsa_max_devs, found);
  7379. return -EPROBE_DEFER;
  7380. }
  7381. dev_info(&pdev->dev,
  7382. "%s: found %d wsa881x devices registered with ALSA core\n",
  7383. __func__, found);
  7384. codec_aux_dev:
  7385. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7386. /* Get count of aux codec device phandles for this platform */
  7387. codec_aux_dev_cnt = of_count_phandle_with_args(
  7388. pdev->dev.of_node,
  7389. "qcom,codec-aux-devs", NULL);
  7390. if (codec_aux_dev_cnt == -ENOENT) {
  7391. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7392. __func__);
  7393. goto err;
  7394. } else if (codec_aux_dev_cnt <= 0) {
  7395. dev_err(&pdev->dev,
  7396. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7397. __func__, codec_aux_dev_cnt);
  7398. ret = -EINVAL;
  7399. goto err;
  7400. }
  7401. /*
  7402. * Alloc mem to store phandle and index info of aux codec
  7403. * if already registered with ALSA core
  7404. */
  7405. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7406. sizeof(struct aux_codec_dev_info),
  7407. GFP_KERNEL);
  7408. if (!aux_cdc_dev_info) {
  7409. ret = -ENOMEM;
  7410. goto err;
  7411. }
  7412. /*
  7413. * search and check whether all aux codecs are already
  7414. * registered with ALSA core or not. If found a node, store
  7415. * the node and the index in a local array of struct for later
  7416. * use.
  7417. */
  7418. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7419. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7420. "qcom,codec-aux-devs", i);
  7421. if (unlikely(!aux_codec_of_node)) {
  7422. /* we should not be here */
  7423. dev_err(&pdev->dev,
  7424. "%s: aux codec dev node is not present\n",
  7425. __func__);
  7426. ret = -EINVAL;
  7427. goto err;
  7428. }
  7429. if (soc_find_component(aux_codec_of_node, NULL)) {
  7430. /* AUX codec registered with ALSA core */
  7431. aux_cdc_dev_info[codecs_found].of_node =
  7432. aux_codec_of_node;
  7433. aux_cdc_dev_info[codecs_found].index = i;
  7434. codecs_found++;
  7435. }
  7436. }
  7437. if (codecs_found < codec_aux_dev_cnt) {
  7438. dev_dbg(&pdev->dev,
  7439. "%s: failed to find %d components. Found only %d\n",
  7440. __func__, codec_aux_dev_cnt, codecs_found);
  7441. return -EPROBE_DEFER;
  7442. }
  7443. dev_info(&pdev->dev,
  7444. "%s: found %d AUX codecs registered with ALSA core\n",
  7445. __func__, codecs_found);
  7446. }
  7447. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7448. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7449. /* Alloc array of AUX devs struct */
  7450. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7451. sizeof(struct snd_soc_aux_dev),
  7452. GFP_KERNEL);
  7453. if (!msm_aux_dev) {
  7454. ret = -ENOMEM;
  7455. goto err;
  7456. }
  7457. /* Alloc array of codec conf struct */
  7458. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7459. sizeof(struct snd_soc_codec_conf),
  7460. GFP_KERNEL);
  7461. if (!msm_codec_conf) {
  7462. ret = -ENOMEM;
  7463. goto err;
  7464. }
  7465. for (i = 0; i < wsa_max_devs; i++) {
  7466. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7467. GFP_KERNEL);
  7468. if (!dev_name_str) {
  7469. ret = -ENOMEM;
  7470. goto err;
  7471. }
  7472. ret = of_property_read_string_index(pdev->dev.of_node,
  7473. "qcom,wsa-aux-dev-prefix",
  7474. wsa881x_dev_info[i].index,
  7475. auxdev_name_prefix);
  7476. if (ret) {
  7477. dev_err(&pdev->dev,
  7478. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7479. __func__, ret);
  7480. ret = -EINVAL;
  7481. goto err;
  7482. }
  7483. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7484. msm_aux_dev[i].name = dev_name_str;
  7485. msm_aux_dev[i].codec_name = NULL;
  7486. msm_aux_dev[i].codec_of_node =
  7487. wsa881x_dev_info[i].of_node;
  7488. msm_aux_dev[i].init = msm_wsa881x_init;
  7489. msm_codec_conf[i].dev_name = NULL;
  7490. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7491. msm_codec_conf[i].of_node =
  7492. wsa881x_dev_info[i].of_node;
  7493. }
  7494. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7495. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7496. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7497. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7498. aux_cdc_dev_info[i].of_node;
  7499. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7500. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7501. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7502. NULL;
  7503. msm_codec_conf[wsa_max_devs + i].of_node =
  7504. aux_cdc_dev_info[i].of_node;
  7505. }
  7506. card->codec_conf = msm_codec_conf;
  7507. card->aux_dev = msm_aux_dev;
  7508. err:
  7509. return ret;
  7510. }
  7511. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7512. {
  7513. int count;
  7514. u32 mi2s_master_slave[MI2S_MAX];
  7515. int ret;
  7516. for (count = 0; count < MI2S_MAX; count++) {
  7517. mutex_init(&mi2s_intf_conf[count].lock);
  7518. mi2s_intf_conf[count].ref_cnt = 0;
  7519. }
  7520. ret = of_property_read_u32_array(pdev->dev.of_node,
  7521. "qcom,msm-mi2s-master",
  7522. mi2s_master_slave, MI2S_MAX);
  7523. if (ret) {
  7524. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7525. __func__);
  7526. } else {
  7527. for (count = 0; count < MI2S_MAX; count++) {
  7528. mi2s_intf_conf[count].msm_is_mi2s_master =
  7529. mi2s_master_slave[count];
  7530. }
  7531. }
  7532. }
  7533. static void msm_i2s_auxpcm_deinit(void)
  7534. {
  7535. int count;
  7536. for (count = 0; count < MI2S_MAX; count++) {
  7537. mutex_destroy(&mi2s_intf_conf[count].lock);
  7538. mi2s_intf_conf[count].ref_cnt = 0;
  7539. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7540. }
  7541. }
  7542. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7543. {
  7544. struct snd_soc_card *card;
  7545. struct msm_asoc_mach_data *pdata;
  7546. const char *mbhc_audio_jack_type = NULL;
  7547. int ret;
  7548. if (!pdev->dev.of_node) {
  7549. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7550. return -EINVAL;
  7551. }
  7552. pdata = devm_kzalloc(&pdev->dev,
  7553. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7554. if (!pdata)
  7555. return -ENOMEM;
  7556. card = populate_snd_card_dailinks(&pdev->dev);
  7557. if (!card) {
  7558. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7559. ret = -EINVAL;
  7560. goto err;
  7561. }
  7562. card->dev = &pdev->dev;
  7563. platform_set_drvdata(pdev, card);
  7564. snd_soc_card_set_drvdata(card, pdata);
  7565. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7566. if (ret) {
  7567. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7568. ret);
  7569. goto err;
  7570. }
  7571. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7572. if (ret) {
  7573. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7574. ret);
  7575. goto err;
  7576. }
  7577. ret = msm_populate_dai_link_component_of_node(card);
  7578. if (ret) {
  7579. ret = -EPROBE_DEFER;
  7580. goto err;
  7581. }
  7582. ret = msm_init_aux_dev(pdev, card);
  7583. if (ret)
  7584. goto err;
  7585. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7586. if (ret == -EPROBE_DEFER) {
  7587. if (codec_reg_done)
  7588. ret = -EINVAL;
  7589. goto err;
  7590. } else if (ret) {
  7591. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7592. ret);
  7593. goto err;
  7594. }
  7595. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7596. spdev = pdev;
  7597. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7598. "qcom,hph-en1-gpio", 0);
  7599. if (!pdata->hph_en1_gpio_p) {
  7600. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7601. "qcom,hph-en1-gpio",
  7602. pdev->dev.of_node->full_name);
  7603. }
  7604. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7605. "qcom,hph-en0-gpio", 0);
  7606. if (!pdata->hph_en0_gpio_p) {
  7607. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7608. "qcom,hph-en0-gpio",
  7609. pdev->dev.of_node->full_name);
  7610. }
  7611. ret = of_property_read_string(pdev->dev.of_node,
  7612. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7613. if (ret) {
  7614. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7615. "qcom,mbhc-audio-jack-type",
  7616. pdev->dev.of_node->full_name);
  7617. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7618. } else {
  7619. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7620. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7621. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7622. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7623. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7624. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7625. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7626. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7627. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7628. } else {
  7629. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7630. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7631. }
  7632. }
  7633. /*
  7634. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7635. * entry is not found in DT file as some targets do not support
  7636. * US-Euro detection
  7637. */
  7638. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7639. "qcom,us-euro-gpios", 0);
  7640. if (!pdata->us_euro_gpio_p) {
  7641. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7642. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7643. } else {
  7644. dev_dbg(&pdev->dev, "%s detected\n",
  7645. "qcom,us-euro-gpios");
  7646. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7647. }
  7648. /* Parse pinctrl info from devicetree */
  7649. ret = msm_get_pinctrl(pdev);
  7650. if (!ret) {
  7651. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7652. } else {
  7653. dev_dbg(&pdev->dev,
  7654. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7655. __func__, ret);
  7656. ret = 0;
  7657. }
  7658. msm_i2s_auxpcm_init(pdev);
  7659. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7660. is_initial_boot = true;
  7661. ret = audio_notifier_register("sm6150",
  7662. AUDIO_NOTIFIER_ADSP_DOMAIN,
  7663. &service_nb);
  7664. if (ret < 0)
  7665. pr_err("%s: Audio notifier register failed ret = %d\n",
  7666. __func__, ret);
  7667. } else {
  7668. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7669. "qcom,cdc-dmic01-gpios",
  7670. 0);
  7671. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7672. "qcom,cdc-dmic23-gpios",
  7673. 0);
  7674. }
  7675. err:
  7676. return ret;
  7677. }
  7678. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7679. {
  7680. audio_notifier_deregister("sm6150");
  7681. msm_i2s_auxpcm_deinit();
  7682. return 0;
  7683. }
  7684. static struct platform_driver sm6150_asoc_machine_driver = {
  7685. .driver = {
  7686. .name = DRV_NAME,
  7687. .owner = THIS_MODULE,
  7688. .pm = &snd_soc_pm_ops,
  7689. .of_match_table = sm6150_asoc_machine_of_match,
  7690. },
  7691. .probe = msm_asoc_machine_probe,
  7692. .remove = msm_asoc_machine_remove,
  7693. };
  7694. module_platform_driver(sm6150_asoc_machine_driver);
  7695. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7696. MODULE_LICENSE("GPL v2");
  7697. MODULE_ALIAS("platform:" DRV_NAME);
  7698. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);