main.c 116 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include "main.h"
  47. #include "qmi.h"
  48. #include "debug.h"
  49. #include "power.h"
  50. #include "genl.h"
  51. #define MAX_PROP_SIZE 32
  52. #define NUM_LOG_PAGES 10
  53. #define NUM_LOG_LONG_PAGES 4
  54. #define ICNSS_MAGIC 0x5abc5abc
  55. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  56. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  57. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  58. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  59. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  60. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  61. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  62. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  63. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  64. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  65. #define ICNSS_MAX_PROBE_CNT 2
  66. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  67. #define PROBE_TIMEOUT 15000
  68. #define SMP2P_SOC_WAKE_TIMEOUT 500
  69. #ifdef CONFIG_ICNSS2_DEBUG
  70. static unsigned long qmi_timeout = 3000;
  71. module_param(qmi_timeout, ulong, 0600);
  72. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  73. #else
  74. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  75. #endif
  76. static struct icnss_priv *penv;
  77. static struct work_struct wpss_loader;
  78. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  79. #define ICNSS_EVENT_PENDING 2989
  80. #define ICNSS_EVENT_SYNC BIT(0)
  81. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  82. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  83. ICNSS_EVENT_SYNC)
  84. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  85. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  86. #define SMP2P_GET_MAX_RETRY 4
  87. #define SMP2P_GET_RETRY_DELAY_MS 500
  88. #define RAMDUMP_NUM_DEVICES 256
  89. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  90. #define WLAN_EN_TEMP_THRESHOLD 5000
  91. #define WLAN_EN_DELAY 500
  92. #define ICNSS_RPROC_LEN 10
  93. static DEFINE_IDA(rd_minor_id);
  94. enum icnss_pdr_cause_index {
  95. ICNSS_FW_CRASH,
  96. ICNSS_ROOT_PD_CRASH,
  97. ICNSS_ROOT_PD_SHUTDOWN,
  98. ICNSS_HOST_ERROR,
  99. };
  100. static const char * const icnss_pdr_cause[] = {
  101. [ICNSS_FW_CRASH] = "FW crash",
  102. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  103. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  104. [ICNSS_HOST_ERROR] = "Host error",
  105. };
  106. static void icnss_set_plat_priv(struct icnss_priv *priv)
  107. {
  108. penv = priv;
  109. }
  110. static struct icnss_priv *icnss_get_plat_priv(void)
  111. {
  112. return penv;
  113. }
  114. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  115. struct kobj_attribute *attr,
  116. const char *buf, size_t count)
  117. {
  118. struct icnss_priv *priv = icnss_get_plat_priv();
  119. atomic_set(&priv->is_shutdown, true);
  120. icnss_pr_dbg("Received shutdown indication");
  121. return count;
  122. }
  123. static struct kobj_attribute icnss_sysfs_attribute =
  124. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  125. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  126. {
  127. if (atomic_inc_return(&priv->pm_count) != 1)
  128. return;
  129. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  130. atomic_read(&priv->pm_count));
  131. pm_stay_awake(&priv->pdev->dev);
  132. priv->stats.pm_stay_awake++;
  133. }
  134. static void icnss_pm_relax(struct icnss_priv *priv)
  135. {
  136. int r = atomic_dec_return(&priv->pm_count);
  137. WARN_ON(r < 0);
  138. if (r != 0)
  139. return;
  140. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_relax(&priv->pdev->dev);
  143. priv->stats.pm_relax++;
  144. }
  145. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  146. {
  147. switch (type) {
  148. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  149. return "SERVER_ARRIVE";
  150. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  151. return "SERVER_EXIT";
  152. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  153. return "FW_READY";
  154. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  155. return "REGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  157. return "UNREGISTER_DRIVER";
  158. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  159. return "PD_SERVICE_DOWN";
  160. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  161. return "FW_EARLY_CRASH_IND";
  162. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  163. return "IDLE_SHUTDOWN";
  164. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  165. return "IDLE_RESTART";
  166. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  167. return "FW_INIT_DONE";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  169. return "QDSS_TRACE_REQ_MEM";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  171. return "QDSS_TRACE_SAVE";
  172. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  173. return "QDSS_TRACE_FREE";
  174. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  175. return "M3_DUMP_UPLOAD";
  176. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  177. return "QDSS_TRACE_REQ_DATA";
  178. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  179. return "SUBSYS_RESTART_LEVEL";
  180. case ICNSS_DRIVER_EVENT_MAX:
  181. return "EVENT_MAX";
  182. }
  183. return "UNKNOWN";
  184. };
  185. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  186. {
  187. switch (type) {
  188. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  189. return "SOC_WAKE_REQUEST";
  190. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  191. return "SOC_WAKE_RELEASE";
  192. case ICNSS_SOC_WAKE_EVENT_MAX:
  193. return "SOC_EVENT_MAX";
  194. }
  195. return "UNKNOWN";
  196. };
  197. int icnss_driver_event_post(struct icnss_priv *priv,
  198. enum icnss_driver_event_type type,
  199. u32 flags, void *data)
  200. {
  201. struct icnss_driver_event *event;
  202. unsigned long irq_flags;
  203. int gfp = GFP_KERNEL;
  204. int ret = 0;
  205. if (!priv)
  206. return -ENODEV;
  207. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  208. icnss_driver_event_to_str(type), type, current->comm,
  209. flags, priv->state);
  210. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  211. icnss_pr_err("Invalid Event type: %d, can't post", type);
  212. return -EINVAL;
  213. }
  214. if (in_interrupt() || irqs_disabled())
  215. gfp = GFP_ATOMIC;
  216. event = kzalloc(sizeof(*event), gfp);
  217. if (event == NULL)
  218. return -ENOMEM;
  219. icnss_pm_stay_awake(priv);
  220. event->type = type;
  221. event->data = data;
  222. init_completion(&event->complete);
  223. event->ret = ICNSS_EVENT_PENDING;
  224. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  225. spin_lock_irqsave(&priv->event_lock, irq_flags);
  226. list_add_tail(&event->list, &priv->event_list);
  227. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  228. priv->stats.events[type].posted++;
  229. queue_work(priv->event_wq, &priv->event_work);
  230. if (!(flags & ICNSS_EVENT_SYNC))
  231. goto out;
  232. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  233. wait_for_completion(&event->complete);
  234. else
  235. ret = wait_for_completion_interruptible(&event->complete);
  236. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  237. icnss_driver_event_to_str(type), type, priv->state, ret,
  238. event->ret);
  239. spin_lock_irqsave(&priv->event_lock, irq_flags);
  240. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  241. event->sync = false;
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. ret = -EINTR;
  244. goto out;
  245. }
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. ret = event->ret;
  248. kfree(event);
  249. out:
  250. icnss_pm_relax(priv);
  251. return ret;
  252. }
  253. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  254. enum icnss_soc_wake_event_type type,
  255. u32 flags, void *data)
  256. {
  257. struct icnss_soc_wake_event *event;
  258. unsigned long irq_flags;
  259. int gfp = GFP_KERNEL;
  260. int ret = 0;
  261. if (!priv)
  262. return -ENODEV;
  263. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  264. icnss_soc_wake_event_to_str(type),
  265. type, current->comm, flags, priv->state);
  266. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  267. icnss_pr_err("Invalid Event type: %d, can't post", type);
  268. return -EINVAL;
  269. }
  270. if (in_interrupt() || irqs_disabled())
  271. gfp = GFP_ATOMIC;
  272. event = kzalloc(sizeof(*event), gfp);
  273. if (!event)
  274. return -ENOMEM;
  275. icnss_pm_stay_awake(priv);
  276. event->type = type;
  277. event->data = data;
  278. init_completion(&event->complete);
  279. event->ret = ICNSS_EVENT_PENDING;
  280. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  281. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  282. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  283. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  284. priv->stats.soc_wake_events[type].posted++;
  285. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  286. if (!(flags & ICNSS_EVENT_SYNC))
  287. goto out;
  288. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  289. wait_for_completion(&event->complete);
  290. else
  291. ret = wait_for_completion_interruptible(&event->complete);
  292. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, priv->state, ret, event->ret);
  295. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  296. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  297. event->sync = false;
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. ret = -EINTR;
  300. goto out;
  301. }
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. ret = event->ret;
  304. kfree(event);
  305. out:
  306. icnss_pm_relax(priv);
  307. return ret;
  308. }
  309. bool icnss_is_fw_ready(void)
  310. {
  311. if (!penv)
  312. return false;
  313. else
  314. return test_bit(ICNSS_FW_READY, &penv->state);
  315. }
  316. EXPORT_SYMBOL(icnss_is_fw_ready);
  317. void icnss_block_shutdown(bool status)
  318. {
  319. if (!penv)
  320. return;
  321. if (status) {
  322. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  323. reinit_completion(&penv->unblock_shutdown);
  324. } else {
  325. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  326. complete(&penv->unblock_shutdown);
  327. }
  328. }
  329. EXPORT_SYMBOL(icnss_block_shutdown);
  330. bool icnss_is_fw_down(void)
  331. {
  332. struct icnss_priv *priv = icnss_get_plat_priv();
  333. if (!priv)
  334. return false;
  335. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  336. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  337. test_bit(ICNSS_REJUVENATE, &priv->state);
  338. }
  339. EXPORT_SYMBOL(icnss_is_fw_down);
  340. unsigned long icnss_get_device_config(void)
  341. {
  342. struct icnss_priv *priv = icnss_get_plat_priv();
  343. if (!priv)
  344. return 0;
  345. return priv->device_config;
  346. }
  347. EXPORT_SYMBOL(icnss_get_device_config);
  348. bool icnss_is_rejuvenate(void)
  349. {
  350. if (!penv)
  351. return false;
  352. else
  353. return test_bit(ICNSS_REJUVENATE, &penv->state);
  354. }
  355. EXPORT_SYMBOL(icnss_is_rejuvenate);
  356. bool icnss_is_pdr(void)
  357. {
  358. if (!penv)
  359. return false;
  360. else
  361. return test_bit(ICNSS_PDR, &penv->state);
  362. }
  363. EXPORT_SYMBOL(icnss_is_pdr);
  364. static int icnss_send_smp2p(struct icnss_priv *priv,
  365. enum icnss_smp2p_msg_id msg_id,
  366. enum smp2p_out_entry smp2p_entry)
  367. {
  368. unsigned int value = 0;
  369. int ret;
  370. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  371. return -EINVAL;
  372. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  373. if (msg_id == ICNSS_RESET_MSG) {
  374. priv->smp2p_info[smp2p_entry].seq = 0;
  375. ret = qcom_smem_state_update_bits(
  376. priv->smp2p_info[smp2p_entry].smem_state,
  377. ICNSS_SMEM_VALUE_MASK,
  378. 0);
  379. if (ret)
  380. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  381. ret, icnss_smp2p_str[smp2p_entry]);
  382. return ret;
  383. }
  384. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  385. return -ENODEV;
  386. value |= priv->smp2p_info[smp2p_entry].seq++;
  387. value <<= ICNSS_SMEM_SEQ_NO_POS;
  388. value |= msg_id;
  389. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  390. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  391. reinit_completion(&penv->smp2p_soc_wake_wait);
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. value);
  396. if (ret) {
  397. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  398. icnss_smp2p_str[smp2p_entry]);
  399. } else {
  400. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  401. msg_id == ICNSS_SOC_WAKE_REL) {
  402. if (!wait_for_completion_timeout(
  403. &priv->smp2p_soc_wake_wait,
  404. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  405. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  406. icnss_smp2p_str[smp2p_entry]);
  407. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  408. ICNSS_ASSERT(0);
  409. }
  410. }
  411. }
  412. return ret;
  413. }
  414. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  415. {
  416. struct icnss_priv *priv = ctx;
  417. if (priv)
  418. priv->force_err_fatal = true;
  419. icnss_pr_err("Received force error fatal request from FW\n");
  420. return IRQ_HANDLED;
  421. }
  422. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  423. {
  424. struct icnss_priv *priv = ctx;
  425. struct icnss_uevent_fw_down_data fw_down_data = {0};
  426. icnss_pr_err("Received early crash indication from FW\n");
  427. if (priv) {
  428. set_bit(ICNSS_FW_DOWN, &priv->state);
  429. icnss_ignore_fw_timeout(true);
  430. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  431. clear_bit(ICNSS_FW_READY, &priv->state);
  432. fw_down_data.crashed = true;
  433. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  434. &fw_down_data);
  435. }
  436. }
  437. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  438. 0, NULL);
  439. return IRQ_HANDLED;
  440. }
  441. static void register_fw_error_notifications(struct device *dev)
  442. {
  443. struct icnss_priv *priv = dev_get_drvdata(dev);
  444. struct device_node *dev_node;
  445. int irq = 0, ret = 0;
  446. if (!priv)
  447. return;
  448. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  449. if (!dev_node) {
  450. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  451. return;
  452. }
  453. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  454. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  455. ret = irq = of_irq_get_byname(dev_node,
  456. "qcom,smp2p-force-fatal-error");
  457. if (ret < 0) {
  458. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  459. irq);
  460. return;
  461. }
  462. }
  463. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  464. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  465. "wlanfw-err", priv);
  466. if (ret < 0) {
  467. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  468. irq, ret);
  469. return;
  470. }
  471. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  472. priv->fw_error_fatal_irq = irq;
  473. }
  474. static void register_early_crash_notifications(struct device *dev)
  475. {
  476. struct icnss_priv *priv = dev_get_drvdata(dev);
  477. struct device_node *dev_node;
  478. int irq = 0, ret = 0;
  479. if (!priv)
  480. return;
  481. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  482. if (!dev_node) {
  483. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  484. return;
  485. }
  486. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  487. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  488. ret = irq = of_irq_get_byname(dev_node,
  489. "qcom,smp2p-early-crash-ind");
  490. if (ret < 0) {
  491. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  492. irq);
  493. return;
  494. }
  495. }
  496. ret = devm_request_threaded_irq(dev, irq, NULL,
  497. fw_crash_indication_handler,
  498. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  499. "wlanfw-early-crash-ind", priv);
  500. if (ret < 0) {
  501. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  502. irq, ret);
  503. return;
  504. }
  505. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  506. priv->fw_early_crash_irq = irq;
  507. }
  508. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  509. {
  510. struct thermal_zone_device *thermal_dev;
  511. const char *tsens;
  512. int ret;
  513. ret = of_property_read_string(priv->pdev->dev.of_node,
  514. "tsens",
  515. &tsens);
  516. if (ret)
  517. return ret;
  518. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  519. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  520. if (IS_ERR(thermal_dev)) {
  521. icnss_pr_err("Fail to get thermal zone. ret: %d",
  522. PTR_ERR(thermal_dev));
  523. return PTR_ERR(thermal_dev);
  524. }
  525. ret = thermal_zone_get_temp(thermal_dev, temp);
  526. if (ret)
  527. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  528. return ret;
  529. }
  530. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  531. {
  532. struct icnss_priv *priv = ctx;
  533. if (priv)
  534. complete(&priv->smp2p_soc_wake_wait);
  535. return IRQ_HANDLED;
  536. }
  537. static void register_soc_wake_notif(struct device *dev)
  538. {
  539. struct icnss_priv *priv = dev_get_drvdata(dev);
  540. struct device_node *dev_node;
  541. int irq = 0, ret = 0;
  542. if (!priv)
  543. return;
  544. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  545. if (!dev_node) {
  546. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  547. return;
  548. }
  549. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  550. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  551. ret = irq = of_irq_get_byname(dev_node,
  552. "qcom,smp2p-soc-wake-ack");
  553. if (ret < 0) {
  554. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  555. irq);
  556. return;
  557. }
  558. }
  559. ret = devm_request_threaded_irq(dev, irq, NULL,
  560. fw_soc_wake_ack_handler,
  561. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  562. IRQF_TRIGGER_FALLING,
  563. "wlanfw-soc-wake-ack", priv);
  564. if (ret < 0) {
  565. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  566. irq, ret);
  567. return;
  568. }
  569. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  570. priv->fw_soc_wake_ack_irq = irq;
  571. }
  572. int icnss_call_driver_uevent(struct icnss_priv *priv,
  573. enum icnss_uevent uevent, void *data)
  574. {
  575. struct icnss_uevent_data uevent_data;
  576. if (!priv->ops || !priv->ops->uevent)
  577. return 0;
  578. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  579. priv->state, uevent);
  580. uevent_data.uevent = uevent;
  581. uevent_data.data = data;
  582. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  583. }
  584. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  585. {
  586. int i;
  587. int ret = 0;
  588. ret = icnss_qmi_get_dms_mac(priv);
  589. if (ret == 0 && priv->dms.mac_valid)
  590. goto qmi_send;
  591. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  592. * Thus assert on failure to get MAC from DMS even after retries
  593. */
  594. if (priv->use_nv_mac) {
  595. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  596. if (priv->dms.mac_valid)
  597. break;
  598. ret = icnss_qmi_get_dms_mac(priv);
  599. if (ret != -EAGAIN)
  600. break;
  601. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  602. }
  603. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  604. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  605. ICNSS_ASSERT(0);
  606. return -EINVAL;
  607. }
  608. }
  609. qmi_send:
  610. if (priv->dms.mac_valid)
  611. ret =
  612. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  613. ARRAY_SIZE(priv->dms.mac));
  614. return ret;
  615. }
  616. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  617. enum smp2p_out_entry smp2p_entry)
  618. {
  619. int retry = 0;
  620. int error;
  621. if (priv->smp2p_info[smp2p_entry].smem_state)
  622. return;
  623. retry:
  624. priv->smp2p_info[smp2p_entry].smem_state =
  625. qcom_smem_state_get(&priv->pdev->dev,
  626. icnss_smp2p_str[smp2p_entry],
  627. &priv->smp2p_info[smp2p_entry].smem_bit);
  628. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  629. if (retry++ < SMP2P_GET_MAX_RETRY) {
  630. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  631. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  632. error, icnss_smp2p_str[smp2p_entry]);
  633. msleep(SMP2P_GET_RETRY_DELAY_MS);
  634. goto retry;
  635. }
  636. ICNSS_ASSERT(0);
  637. return;
  638. }
  639. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  640. }
  641. static inline
  642. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  643. {
  644. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  645. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  646. } else {
  647. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  648. }
  649. }
  650. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  651. {
  652. switch (val) {
  653. case WLAN_RF_SLATE:
  654. return WLFW_WLAN_RF_SLATE_V01;
  655. case WLAN_RF_APACHE:
  656. return WLFW_WLAN_RF_APACHE_V01;
  657. default:
  658. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  659. }
  660. }
  661. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  662. void *data)
  663. {
  664. int ret = 0;
  665. int temp = 0;
  666. bool ignore_assert = false;
  667. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  668. if (!priv)
  669. return -ENODEV;
  670. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  671. clear_bit(ICNSS_FW_DOWN, &priv->state);
  672. clear_bit(ICNSS_FW_READY, &priv->state);
  673. icnss_ignore_fw_timeout(false);
  674. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  675. icnss_pr_err("QMI Server already in Connected State\n");
  676. ICNSS_ASSERT(0);
  677. }
  678. ret = icnss_connect_to_fw_server(priv, data);
  679. if (ret)
  680. goto fail;
  681. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  682. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state)) {
  683. reinit_completion(&priv->slate_boot_complete);
  684. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  685. priv->state);
  686. wait_for_completion(&priv->slate_boot_complete);
  687. }
  688. ret = wlfw_ind_register_send_sync_msg(priv);
  689. if (ret < 0) {
  690. if (ret == -EALREADY) {
  691. ret = 0;
  692. goto qmi_registered;
  693. }
  694. ignore_assert = true;
  695. goto fail;
  696. }
  697. if (priv->is_rf_subtype_valid) {
  698. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  699. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  700. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  701. if (ret < 0)
  702. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  703. ret);
  704. } else {
  705. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  706. priv->rf_subtype);
  707. }
  708. }
  709. if (priv->device_id == WCN6750_DEVICE_ID) {
  710. if (!icnss_get_temperature(priv, &temp)) {
  711. icnss_pr_dbg("Temperature: %d\n", temp);
  712. if (temp < WLAN_EN_TEMP_THRESHOLD)
  713. icnss_set_wlan_en_delay(priv);
  714. }
  715. ret = wlfw_host_cap_send_sync(priv);
  716. if (ret < 0)
  717. goto fail;
  718. }
  719. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  720. if (!priv->msa_va) {
  721. icnss_pr_err("Invalid MSA address\n");
  722. ret = -EINVAL;
  723. goto fail;
  724. }
  725. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  726. if (ret < 0) {
  727. ignore_assert = true;
  728. goto fail;
  729. }
  730. ret = wlfw_msa_ready_send_sync_msg(priv);
  731. if (ret < 0) {
  732. ignore_assert = true;
  733. goto fail;
  734. }
  735. }
  736. ret = wlfw_cap_send_sync_msg(priv);
  737. if (ret < 0) {
  738. ignore_assert = true;
  739. goto fail;
  740. }
  741. ret = icnss_hw_power_on(priv);
  742. if (ret)
  743. goto fail;
  744. if (priv->device_id == WCN6750_DEVICE_ID) {
  745. ret = wlfw_device_info_send_msg(priv);
  746. if (ret < 0) {
  747. ignore_assert = true;
  748. goto device_info_failure;
  749. }
  750. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  751. priv->mem_base_pa,
  752. priv->mem_base_size);
  753. if (!priv->mem_base_va) {
  754. icnss_pr_err("Ioremap failed for bar address\n");
  755. goto device_info_failure;
  756. }
  757. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  758. &priv->mem_base_pa,
  759. priv->mem_base_va);
  760. if (priv->mhi_state_info_pa)
  761. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  762. priv->mhi_state_info_pa,
  763. PAGE_SIZE);
  764. if (!priv->mhi_state_info_va)
  765. icnss_pr_err("Ioremap failed for MHI info address\n");
  766. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  767. &priv->mhi_state_info_pa,
  768. priv->mhi_state_info_va);
  769. }
  770. if (priv->bdf_download_support) {
  771. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  772. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  773. priv->ctrl_params.bdf_type);
  774. if (ret < 0)
  775. goto device_info_failure;
  776. }
  777. if (priv->device_id == WCN6750_DEVICE_ID) {
  778. if (!priv->fw_soc_wake_ack_irq)
  779. register_soc_wake_notif(&priv->pdev->dev);
  780. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  781. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  782. }
  783. if (priv->wpss_supported)
  784. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  785. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  786. if (priv->bdf_download_support) {
  787. ret = wlfw_cal_report_req(priv);
  788. if (ret < 0)
  789. goto device_info_failure;
  790. }
  791. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  792. dynamic_feature_mask);
  793. }
  794. if (!priv->fw_error_fatal_irq)
  795. register_fw_error_notifications(&priv->pdev->dev);
  796. if (!priv->fw_early_crash_irq)
  797. register_early_crash_notifications(&priv->pdev->dev);
  798. if (priv->psf_supported)
  799. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  800. return ret;
  801. device_info_failure:
  802. icnss_hw_power_off(priv);
  803. fail:
  804. ICNSS_ASSERT(ignore_assert);
  805. qmi_registered:
  806. return ret;
  807. }
  808. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  809. {
  810. if (!priv)
  811. return -ENODEV;
  812. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  813. icnss_clear_server(priv);
  814. if (priv->psf_supported)
  815. priv->last_updated_voltage = 0;
  816. return 0;
  817. }
  818. static int icnss_call_driver_probe(struct icnss_priv *priv)
  819. {
  820. int ret = 0;
  821. int probe_cnt = 0;
  822. if (!priv->ops || !priv->ops->probe)
  823. return 0;
  824. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  825. return -EINVAL;
  826. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  827. icnss_hw_power_on(priv);
  828. icnss_block_shutdown(true);
  829. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  830. ret = priv->ops->probe(&priv->pdev->dev);
  831. probe_cnt++;
  832. if (ret != -EPROBE_DEFER)
  833. break;
  834. }
  835. if (ret < 0) {
  836. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  837. ret, priv->state, probe_cnt);
  838. icnss_block_shutdown(false);
  839. goto out;
  840. }
  841. icnss_block_shutdown(false);
  842. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  843. return 0;
  844. out:
  845. icnss_hw_power_off(priv);
  846. return ret;
  847. }
  848. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  849. {
  850. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  851. goto out;
  852. if (!priv->ops || !priv->ops->shutdown)
  853. goto out;
  854. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  855. goto out;
  856. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  857. priv->ops->shutdown(&priv->pdev->dev);
  858. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  859. out:
  860. return 0;
  861. }
  862. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  863. {
  864. int ret = 0;
  865. icnss_pm_relax(priv);
  866. icnss_call_driver_shutdown(priv);
  867. clear_bit(ICNSS_PDR, &priv->state);
  868. clear_bit(ICNSS_REJUVENATE, &priv->state);
  869. clear_bit(ICNSS_PD_RESTART, &priv->state);
  870. priv->early_crash_ind = false;
  871. priv->is_ssr = false;
  872. if (!priv->ops || !priv->ops->reinit)
  873. goto out;
  874. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  875. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  876. priv->state);
  877. goto out;
  878. }
  879. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  880. goto call_probe;
  881. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  882. icnss_hw_power_on(priv);
  883. icnss_block_shutdown(true);
  884. ret = priv->ops->reinit(&priv->pdev->dev);
  885. if (ret < 0) {
  886. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  887. ret, priv->state);
  888. if (!priv->allow_recursive_recovery)
  889. ICNSS_ASSERT(false);
  890. icnss_block_shutdown(false);
  891. goto out_power_off;
  892. }
  893. icnss_block_shutdown(false);
  894. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  895. return 0;
  896. call_probe:
  897. return icnss_call_driver_probe(priv);
  898. out_power_off:
  899. icnss_hw_power_off(priv);
  900. out:
  901. return ret;
  902. }
  903. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  904. {
  905. int ret = 0;
  906. if (!priv)
  907. return -ENODEV;
  908. set_bit(ICNSS_FW_READY, &priv->state);
  909. clear_bit(ICNSS_MODE_ON, &priv->state);
  910. atomic_set(&priv->soc_wake_ref_count, 0);
  911. if (priv->device_id == WCN6750_DEVICE_ID)
  912. icnss_free_qdss_mem(priv);
  913. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  914. icnss_hw_power_off(priv);
  915. if (!priv->pdev) {
  916. icnss_pr_err("Device is not ready\n");
  917. ret = -ENODEV;
  918. goto out;
  919. }
  920. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  921. ret = icnss_pd_restart_complete(priv);
  922. } else {
  923. if (priv->wpss_supported)
  924. icnss_setup_dms_mac(priv);
  925. ret = icnss_call_driver_probe(priv);
  926. }
  927. icnss_vreg_unvote(priv);
  928. out:
  929. return ret;
  930. }
  931. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  932. {
  933. int ret = 0;
  934. if (!priv)
  935. return -ENODEV;
  936. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  937. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  938. icnss_pr_info("Failed to download qdss configuration file");
  939. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  940. ret = wlfw_wlan_mode_send_sync_msg(priv,
  941. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  942. else
  943. icnss_driver_event_fw_ready_ind(priv, NULL);
  944. return ret;
  945. }
  946. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  947. {
  948. struct platform_device *pdev = priv->pdev;
  949. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  950. int i, j;
  951. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  952. if (!qdss_mem[i].va && qdss_mem[i].size) {
  953. qdss_mem[i].va =
  954. dma_alloc_coherent(&pdev->dev,
  955. qdss_mem[i].size,
  956. &qdss_mem[i].pa,
  957. GFP_KERNEL);
  958. if (!qdss_mem[i].va) {
  959. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  960. qdss_mem[i].size,
  961. qdss_mem[i].type, i);
  962. break;
  963. }
  964. }
  965. }
  966. /* Best-effort allocation for QDSS trace */
  967. if (i < priv->qdss_mem_seg_len) {
  968. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  969. qdss_mem[j].type = 0;
  970. qdss_mem[j].size = 0;
  971. }
  972. priv->qdss_mem_seg_len = i;
  973. }
  974. return 0;
  975. }
  976. void icnss_free_qdss_mem(struct icnss_priv *priv)
  977. {
  978. struct platform_device *pdev = priv->pdev;
  979. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  980. int i;
  981. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  982. if (qdss_mem[i].va && qdss_mem[i].size) {
  983. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  984. &qdss_mem[i].pa, qdss_mem[i].size,
  985. qdss_mem[i].type);
  986. dma_free_coherent(&pdev->dev,
  987. qdss_mem[i].size, qdss_mem[i].va,
  988. qdss_mem[i].pa);
  989. qdss_mem[i].va = NULL;
  990. qdss_mem[i].pa = 0;
  991. qdss_mem[i].size = 0;
  992. qdss_mem[i].type = 0;
  993. }
  994. }
  995. priv->qdss_mem_seg_len = 0;
  996. }
  997. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  998. {
  999. int ret = 0;
  1000. ret = icnss_alloc_qdss_mem(priv);
  1001. if (ret < 0)
  1002. return ret;
  1003. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1004. }
  1005. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1006. u64 pa, u32 size, int *seg_id)
  1007. {
  1008. int i = 0;
  1009. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1010. u64 offset = 0;
  1011. void *va = NULL;
  1012. u64 local_pa;
  1013. u32 local_size;
  1014. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1015. local_pa = (u64)qdss_mem[i].pa;
  1016. local_size = (u32)qdss_mem[i].size;
  1017. if (pa == local_pa && size <= local_size) {
  1018. va = qdss_mem[i].va;
  1019. break;
  1020. }
  1021. if (pa > local_pa &&
  1022. pa < local_pa + local_size &&
  1023. pa + size <= local_pa + local_size) {
  1024. offset = pa - local_pa;
  1025. va = qdss_mem[i].va + offset;
  1026. break;
  1027. }
  1028. }
  1029. *seg_id = i;
  1030. return va;
  1031. }
  1032. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1033. void *data)
  1034. {
  1035. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1036. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1037. int ret = 0;
  1038. int i;
  1039. void *va = NULL;
  1040. u64 pa;
  1041. u32 size;
  1042. int seg_id = 0;
  1043. if (!priv->qdss_mem_seg_len) {
  1044. icnss_pr_err("Memory for QDSS trace is not available\n");
  1045. return -ENOMEM;
  1046. }
  1047. if (event_data->mem_seg_len == 0) {
  1048. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1049. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1050. ICNSS_GENL_MSG_TYPE_QDSS,
  1051. event_data->file_name,
  1052. qdss_mem[i].size);
  1053. if (ret < 0) {
  1054. icnss_pr_err("Fail to save QDSS data: %d\n",
  1055. ret);
  1056. break;
  1057. }
  1058. }
  1059. } else {
  1060. for (i = 0; i < event_data->mem_seg_len; i++) {
  1061. pa = event_data->mem_seg[i].addr;
  1062. size = event_data->mem_seg[i].size;
  1063. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1064. size, &seg_id);
  1065. if (!va) {
  1066. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1067. &pa);
  1068. ret = -EINVAL;
  1069. break;
  1070. }
  1071. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1072. event_data->file_name, size);
  1073. if (ret < 0) {
  1074. icnss_pr_err("Fail to save QDSS data: %d\n",
  1075. ret);
  1076. break;
  1077. }
  1078. }
  1079. }
  1080. kfree(data);
  1081. return ret;
  1082. }
  1083. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1084. {
  1085. int dec, c = atomic_read(v);
  1086. do {
  1087. dec = c - 1;
  1088. if (unlikely(dec < 1))
  1089. break;
  1090. } while (!atomic_try_cmpxchg(v, &c, dec));
  1091. return dec;
  1092. }
  1093. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1094. void *data)
  1095. {
  1096. int ret = 0;
  1097. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1098. if (!priv)
  1099. return -ENODEV;
  1100. if (!data)
  1101. return -EINVAL;
  1102. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1103. event_data->total_size);
  1104. kfree(data);
  1105. return ret;
  1106. }
  1107. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1108. {
  1109. int ret = 0;
  1110. if (!priv)
  1111. return -ENODEV;
  1112. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1113. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1114. atomic_read(&priv->soc_wake_ref_count));
  1115. return 0;
  1116. }
  1117. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1118. ICNSS_SMP2P_OUT_SOC_WAKE);
  1119. if (!ret)
  1120. atomic_inc(&priv->soc_wake_ref_count);
  1121. return ret;
  1122. }
  1123. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1124. {
  1125. int ret = 0;
  1126. if (!priv)
  1127. return -ENODEV;
  1128. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1129. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1130. priv->soc_wake_ref_count);
  1131. return 0;
  1132. }
  1133. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1134. ICNSS_SMP2P_OUT_SOC_WAKE);
  1135. return ret;
  1136. }
  1137. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1138. void *data)
  1139. {
  1140. int ret = 0;
  1141. int probe_cnt = 0;
  1142. if (priv->ops)
  1143. return -EEXIST;
  1144. priv->ops = data;
  1145. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1146. set_bit(ICNSS_FW_READY, &priv->state);
  1147. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1148. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1149. priv->state);
  1150. return -ENODEV;
  1151. }
  1152. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1153. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1154. priv->state);
  1155. goto out;
  1156. }
  1157. ret = icnss_hw_power_on(priv);
  1158. if (ret)
  1159. goto out;
  1160. icnss_block_shutdown(true);
  1161. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1162. ret = priv->ops->probe(&priv->pdev->dev);
  1163. probe_cnt++;
  1164. if (ret != -EPROBE_DEFER)
  1165. break;
  1166. }
  1167. if (ret) {
  1168. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1169. ret, priv->state, probe_cnt);
  1170. icnss_block_shutdown(false);
  1171. goto power_off;
  1172. }
  1173. icnss_block_shutdown(false);
  1174. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1175. return 0;
  1176. power_off:
  1177. icnss_hw_power_off(priv);
  1178. out:
  1179. return ret;
  1180. }
  1181. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1182. void *data)
  1183. {
  1184. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1185. priv->ops = NULL;
  1186. goto out;
  1187. }
  1188. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1189. icnss_block_shutdown(true);
  1190. if (priv->ops)
  1191. priv->ops->remove(&priv->pdev->dev);
  1192. icnss_block_shutdown(false);
  1193. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1194. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1195. priv->ops = NULL;
  1196. icnss_hw_power_off(priv);
  1197. out:
  1198. return 0;
  1199. }
  1200. static int icnss_fw_crashed(struct icnss_priv *priv,
  1201. struct icnss_event_pd_service_down_data *event_data)
  1202. {
  1203. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1204. set_bit(ICNSS_PD_RESTART, &priv->state);
  1205. clear_bit(ICNSS_FW_READY, &priv->state);
  1206. icnss_pm_stay_awake(priv);
  1207. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1208. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1209. if (event_data && event_data->fw_rejuvenate)
  1210. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1211. return 0;
  1212. }
  1213. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1214. struct icnss_uevent_hang_data *hang_data)
  1215. {
  1216. if (!priv->hang_event_data_va)
  1217. return -EINVAL;
  1218. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1219. priv->hang_event_data_len,
  1220. GFP_ATOMIC);
  1221. if (!priv->hang_event_data)
  1222. return -ENOMEM;
  1223. // Update the hang event params
  1224. hang_data->hang_event_data = priv->hang_event_data;
  1225. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1226. return 0;
  1227. }
  1228. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1229. {
  1230. struct icnss_uevent_hang_data hang_data = {0};
  1231. int ret = 0xFF;
  1232. if (priv->early_crash_ind) {
  1233. ret = icnss_update_hang_event_data(priv, &hang_data);
  1234. if (ret)
  1235. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1236. }
  1237. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1238. &hang_data);
  1239. if (!ret) {
  1240. kfree(priv->hang_event_data);
  1241. priv->hang_event_data = NULL;
  1242. }
  1243. return 0;
  1244. }
  1245. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1246. void *data)
  1247. {
  1248. struct icnss_event_pd_service_down_data *event_data = data;
  1249. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1250. icnss_ignore_fw_timeout(false);
  1251. goto out;
  1252. }
  1253. if (priv->force_err_fatal)
  1254. ICNSS_ASSERT(0);
  1255. if (priv->device_id == WCN6750_DEVICE_ID) {
  1256. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1257. ICNSS_SMP2P_OUT_SOC_WAKE);
  1258. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1259. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1260. }
  1261. if (priv->wpss_supported)
  1262. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1263. ICNSS_SMP2P_OUT_POWER_SAVE);
  1264. icnss_send_hang_event_data(priv);
  1265. if (priv->early_crash_ind) {
  1266. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1267. event_data->crashed, priv->state);
  1268. goto out;
  1269. }
  1270. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1271. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1272. event_data->crashed, priv->state);
  1273. if (!priv->allow_recursive_recovery)
  1274. ICNSS_ASSERT(0);
  1275. goto out;
  1276. }
  1277. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1278. icnss_fw_crashed(priv, event_data);
  1279. out:
  1280. kfree(data);
  1281. return 0;
  1282. }
  1283. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1284. void *data)
  1285. {
  1286. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1287. icnss_ignore_fw_timeout(false);
  1288. goto out;
  1289. }
  1290. priv->early_crash_ind = true;
  1291. icnss_fw_crashed(priv, NULL);
  1292. out:
  1293. kfree(data);
  1294. return 0;
  1295. }
  1296. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1297. void *data)
  1298. {
  1299. int ret = 0;
  1300. if (!priv->ops || !priv->ops->idle_shutdown)
  1301. return 0;
  1302. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1303. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1304. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1305. ret = -EBUSY;
  1306. } else {
  1307. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1308. priv->state);
  1309. icnss_block_shutdown(true);
  1310. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1311. icnss_block_shutdown(false);
  1312. }
  1313. return ret;
  1314. }
  1315. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1316. void *data)
  1317. {
  1318. int ret = 0;
  1319. if (!priv->ops || !priv->ops->idle_restart)
  1320. return 0;
  1321. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1322. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1323. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1324. ret = -EBUSY;
  1325. } else {
  1326. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1327. priv->state);
  1328. icnss_block_shutdown(true);
  1329. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1330. icnss_block_shutdown(false);
  1331. }
  1332. return ret;
  1333. }
  1334. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1335. {
  1336. icnss_free_qdss_mem(priv);
  1337. return 0;
  1338. }
  1339. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1340. void *data)
  1341. {
  1342. struct icnss_m3_upload_segments_req_data *event_data = data;
  1343. struct qcom_dump_segment segment;
  1344. int i, status = 0, ret = 0;
  1345. struct list_head head;
  1346. if (!dump_enabled()) {
  1347. icnss_pr_info("Dump collection is not enabled\n");
  1348. return ret;
  1349. }
  1350. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1351. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1352. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1353. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1354. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1355. return ret;
  1356. INIT_LIST_HEAD(&head);
  1357. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1358. memset(&segment, 0, sizeof(segment));
  1359. segment.va = devm_ioremap(&priv->pdev->dev,
  1360. event_data->m3_segment[i].addr,
  1361. event_data->m3_segment[i].size);
  1362. if (!segment.va) {
  1363. icnss_pr_err("Failed to ioremap M3 Dump region");
  1364. ret = -ENOMEM;
  1365. goto send_resp;
  1366. }
  1367. segment.size = event_data->m3_segment[i].size;
  1368. list_add(&segment.node, &head);
  1369. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1370. event_data->m3_segment[i].name);
  1371. switch (event_data->m3_segment[i].type) {
  1372. case QMI_M3_SEGMENT_PHYAREG_V01:
  1373. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1374. break;
  1375. case QMI_M3_SEGMENT_PHYDBG_V01:
  1376. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1377. break;
  1378. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1379. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1380. break;
  1381. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1382. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1383. break;
  1384. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1385. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1386. break;
  1387. default:
  1388. icnss_pr_err("Invalid Segment type: %d",
  1389. event_data->m3_segment[i].type);
  1390. }
  1391. if (ret) {
  1392. status = ret;
  1393. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1394. event_data->m3_segment[i].name, ret);
  1395. }
  1396. list_del(&segment.node);
  1397. }
  1398. send_resp:
  1399. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1400. status);
  1401. return ret;
  1402. }
  1403. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1404. {
  1405. int ret = 0;
  1406. struct icnss_subsys_restart_level_data *event_data = data;
  1407. if (!priv)
  1408. return -ENODEV;
  1409. if (!data)
  1410. return -EINVAL;
  1411. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1412. kfree(data);
  1413. return ret;
  1414. }
  1415. static void icnss_driver_event_work(struct work_struct *work)
  1416. {
  1417. struct icnss_priv *priv =
  1418. container_of(work, struct icnss_priv, event_work);
  1419. struct icnss_driver_event *event;
  1420. unsigned long flags;
  1421. int ret;
  1422. icnss_pm_stay_awake(priv);
  1423. spin_lock_irqsave(&priv->event_lock, flags);
  1424. while (!list_empty(&priv->event_list)) {
  1425. event = list_first_entry(&priv->event_list,
  1426. struct icnss_driver_event, list);
  1427. list_del(&event->list);
  1428. spin_unlock_irqrestore(&priv->event_lock, flags);
  1429. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1430. icnss_driver_event_to_str(event->type),
  1431. event->sync ? "-sync" : "", event->type,
  1432. priv->state);
  1433. switch (event->type) {
  1434. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1435. ret = icnss_driver_event_server_arrive(priv,
  1436. event->data);
  1437. break;
  1438. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1439. ret = icnss_driver_event_server_exit(priv);
  1440. break;
  1441. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1442. ret = icnss_driver_event_fw_ready_ind(priv,
  1443. event->data);
  1444. break;
  1445. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1446. ret = icnss_driver_event_register_driver(priv,
  1447. event->data);
  1448. break;
  1449. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1450. ret = icnss_driver_event_unregister_driver(priv,
  1451. event->data);
  1452. break;
  1453. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1454. ret = icnss_driver_event_pd_service_down(priv,
  1455. event->data);
  1456. break;
  1457. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1458. ret = icnss_driver_event_early_crash_ind(priv,
  1459. event->data);
  1460. break;
  1461. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1462. ret = icnss_driver_event_idle_shutdown(priv,
  1463. event->data);
  1464. break;
  1465. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1466. ret = icnss_driver_event_idle_restart(priv,
  1467. event->data);
  1468. break;
  1469. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1470. ret = icnss_driver_event_fw_init_done(priv,
  1471. event->data);
  1472. break;
  1473. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1474. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1475. break;
  1476. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1477. ret = icnss_qdss_trace_save_hdlr(priv,
  1478. event->data);
  1479. break;
  1480. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1481. ret = icnss_qdss_trace_free_hdlr(priv);
  1482. break;
  1483. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1484. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1485. break;
  1486. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1487. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1488. event->data);
  1489. break;
  1490. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1491. ret = icnss_subsys_restart_level(priv, event->data);
  1492. break;
  1493. default:
  1494. icnss_pr_err("Invalid Event type: %d", event->type);
  1495. kfree(event);
  1496. continue;
  1497. }
  1498. priv->stats.events[event->type].processed++;
  1499. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1500. icnss_driver_event_to_str(event->type),
  1501. event->sync ? "-sync" : "", event->type, ret,
  1502. priv->state);
  1503. spin_lock_irqsave(&priv->event_lock, flags);
  1504. if (event->sync) {
  1505. event->ret = ret;
  1506. complete(&event->complete);
  1507. continue;
  1508. }
  1509. spin_unlock_irqrestore(&priv->event_lock, flags);
  1510. kfree(event);
  1511. spin_lock_irqsave(&priv->event_lock, flags);
  1512. }
  1513. spin_unlock_irqrestore(&priv->event_lock, flags);
  1514. icnss_pm_relax(priv);
  1515. }
  1516. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1517. {
  1518. struct icnss_priv *priv =
  1519. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1520. struct icnss_soc_wake_event *event;
  1521. unsigned long flags;
  1522. int ret;
  1523. icnss_pm_stay_awake(priv);
  1524. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1525. while (!list_empty(&priv->soc_wake_msg_list)) {
  1526. event = list_first_entry(&priv->soc_wake_msg_list,
  1527. struct icnss_soc_wake_event, list);
  1528. list_del(&event->list);
  1529. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1530. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1531. icnss_soc_wake_event_to_str(event->type),
  1532. event->sync ? "-sync" : "", event->type,
  1533. priv->state);
  1534. switch (event->type) {
  1535. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1536. ret = icnss_event_soc_wake_request(priv,
  1537. event->data);
  1538. break;
  1539. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1540. ret = icnss_event_soc_wake_release(priv,
  1541. event->data);
  1542. break;
  1543. default:
  1544. icnss_pr_err("Invalid Event type: %d", event->type);
  1545. kfree(event);
  1546. continue;
  1547. }
  1548. priv->stats.soc_wake_events[event->type].processed++;
  1549. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1550. icnss_soc_wake_event_to_str(event->type),
  1551. event->sync ? "-sync" : "", event->type, ret,
  1552. priv->state);
  1553. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1554. if (event->sync) {
  1555. event->ret = ret;
  1556. complete(&event->complete);
  1557. continue;
  1558. }
  1559. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1560. kfree(event);
  1561. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1562. }
  1563. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1564. icnss_pm_relax(priv);
  1565. }
  1566. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1567. {
  1568. int ret = 0;
  1569. struct qcom_dump_segment segment;
  1570. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1571. struct list_head head;
  1572. if (!dump_enabled()) {
  1573. icnss_pr_info("Dump collection is not enabled\n");
  1574. return ret;
  1575. }
  1576. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1577. return ret;
  1578. INIT_LIST_HEAD(&head);
  1579. memset(&segment, 0, sizeof(segment));
  1580. segment.va = priv->msa_va;
  1581. segment.size = priv->msa_mem_size;
  1582. list_add(&segment.node, &head);
  1583. if (!msa0_dump_dev->dev) {
  1584. icnss_pr_err("Created Dump Device not found\n");
  1585. return 0;
  1586. }
  1587. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1588. if (ret) {
  1589. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1590. return ret;
  1591. }
  1592. list_del(&segment.node);
  1593. return ret;
  1594. }
  1595. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1596. void *data)
  1597. {
  1598. struct qcom_ssr_notify_data *notif = data;
  1599. int ret = 0;
  1600. if (!notif->crashed) {
  1601. if (atomic_read(&priv->is_shutdown)) {
  1602. atomic_set(&priv->is_shutdown, false);
  1603. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1604. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1605. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1606. clear_bit(ICNSS_FW_READY, &priv->state);
  1607. icnss_driver_event_post(priv,
  1608. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1609. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1610. NULL);
  1611. }
  1612. }
  1613. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1614. if (!wait_for_completion_timeout(
  1615. &priv->unblock_shutdown,
  1616. msecs_to_jiffies(PROBE_TIMEOUT)))
  1617. icnss_pr_err("modem block shutdown timeout\n");
  1618. }
  1619. ret = wlfw_send_modem_shutdown_msg(priv);
  1620. if (ret < 0)
  1621. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1622. ret);
  1623. }
  1624. }
  1625. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1626. {
  1627. switch (code) {
  1628. case QCOM_SSR_BEFORE_POWERUP:
  1629. return "BEFORE_POWERUP";
  1630. case QCOM_SSR_AFTER_POWERUP:
  1631. return "AFTER_POWERUP";
  1632. case QCOM_SSR_BEFORE_SHUTDOWN:
  1633. return "BEFORE_SHUTDOWN";
  1634. case QCOM_SSR_AFTER_SHUTDOWN:
  1635. return "AFTER_SHUTDOWN";
  1636. default:
  1637. return "UNKNOWN";
  1638. }
  1639. };
  1640. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1641. unsigned long code,
  1642. void *data)
  1643. {
  1644. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1645. wpss_early_ssr_nb);
  1646. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1647. icnss_qcom_ssr_notify_state_to_str(code), code);
  1648. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1649. set_bit(ICNSS_FW_DOWN, &priv->state);
  1650. icnss_ignore_fw_timeout(true);
  1651. }
  1652. return NOTIFY_DONE;
  1653. }
  1654. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1655. unsigned long code,
  1656. void *data)
  1657. {
  1658. struct icnss_event_pd_service_down_data *event_data;
  1659. struct qcom_ssr_notify_data *notif = data;
  1660. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1661. wpss_ssr_nb);
  1662. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1663. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1664. icnss_qcom_ssr_notify_state_to_str(code), code);
  1665. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1666. icnss_pr_info("Collecting msa0 segment dump\n");
  1667. icnss_msa0_ramdump(priv);
  1668. goto out;
  1669. }
  1670. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1671. goto out;
  1672. priv->is_ssr = true;
  1673. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1674. priv->state, notif->crashed);
  1675. set_bit(ICNSS_FW_DOWN, &priv->state);
  1676. if (notif->crashed)
  1677. priv->stats.recovery.root_pd_crash++;
  1678. else
  1679. priv->stats.recovery.root_pd_shutdown++;
  1680. icnss_ignore_fw_timeout(true);
  1681. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1682. if (event_data == NULL)
  1683. return notifier_from_errno(-ENOMEM);
  1684. event_data->crashed = notif->crashed;
  1685. fw_down_data.crashed = !!notif->crashed;
  1686. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1687. clear_bit(ICNSS_FW_READY, &priv->state);
  1688. fw_down_data.crashed = !!notif->crashed;
  1689. icnss_call_driver_uevent(priv,
  1690. ICNSS_UEVENT_FW_DOWN,
  1691. &fw_down_data);
  1692. }
  1693. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1694. ICNSS_EVENT_SYNC, event_data);
  1695. out:
  1696. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1697. return NOTIFY_OK;
  1698. }
  1699. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1700. unsigned long code,
  1701. void *data)
  1702. {
  1703. struct icnss_event_pd_service_down_data *event_data;
  1704. struct qcom_ssr_notify_data *notif = data;
  1705. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1706. modem_ssr_nb);
  1707. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1708. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1709. icnss_qcom_ssr_notify_state_to_str(code), code);
  1710. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1711. icnss_pr_info("Collecting msa0 segment dump\n");
  1712. icnss_msa0_ramdump(priv);
  1713. goto out;
  1714. }
  1715. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1716. goto out;
  1717. priv->is_ssr = true;
  1718. if (notif->crashed) {
  1719. priv->stats.recovery.root_pd_crash++;
  1720. priv->root_pd_shutdown = false;
  1721. } else {
  1722. priv->stats.recovery.root_pd_shutdown++;
  1723. priv->root_pd_shutdown = true;
  1724. }
  1725. icnss_update_state_send_modem_shutdown(priv, data);
  1726. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1727. set_bit(ICNSS_FW_DOWN, &priv->state);
  1728. icnss_ignore_fw_timeout(true);
  1729. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1730. clear_bit(ICNSS_FW_READY, &priv->state);
  1731. fw_down_data.crashed = !!notif->crashed;
  1732. icnss_call_driver_uevent(priv,
  1733. ICNSS_UEVENT_FW_DOWN,
  1734. &fw_down_data);
  1735. }
  1736. goto out;
  1737. }
  1738. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1739. priv->state, notif->crashed);
  1740. set_bit(ICNSS_FW_DOWN, &priv->state);
  1741. icnss_ignore_fw_timeout(true);
  1742. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1743. if (event_data == NULL)
  1744. return notifier_from_errno(-ENOMEM);
  1745. event_data->crashed = notif->crashed;
  1746. fw_down_data.crashed = !!notif->crashed;
  1747. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1748. clear_bit(ICNSS_FW_READY, &priv->state);
  1749. fw_down_data.crashed = !!notif->crashed;
  1750. icnss_call_driver_uevent(priv,
  1751. ICNSS_UEVENT_FW_DOWN,
  1752. &fw_down_data);
  1753. }
  1754. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1755. ICNSS_EVENT_SYNC, event_data);
  1756. out:
  1757. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1758. return NOTIFY_OK;
  1759. }
  1760. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1761. {
  1762. int ret = 0;
  1763. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1764. priv->wpss_early_notify_handler =
  1765. qcom_register_early_ssr_notifier("wpss",
  1766. &priv->wpss_early_ssr_nb);
  1767. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1768. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1769. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1770. }
  1771. return ret;
  1772. }
  1773. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1774. {
  1775. int ret = 0;
  1776. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1777. /*
  1778. * Assign priority of icnss wpss notifier callback over IPA
  1779. * modem notifier callback which is 0
  1780. */
  1781. priv->wpss_ssr_nb.priority = 1;
  1782. priv->wpss_notify_handler =
  1783. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1784. if (IS_ERR(priv->wpss_notify_handler)) {
  1785. ret = PTR_ERR(priv->wpss_notify_handler);
  1786. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1787. }
  1788. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1789. return ret;
  1790. }
  1791. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1792. unsigned long code,
  1793. void *data)
  1794. {
  1795. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1796. slate_ssr_nb);
  1797. int ret = 0;
  1798. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1799. if (code == QCOM_SSR_AFTER_POWERUP) {
  1800. set_bit(ICNSS_SLATE_UP, &priv->state);
  1801. complete(&priv->slate_boot_complete);
  1802. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1803. priv->state);
  1804. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1805. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1806. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1807. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1808. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1809. priv->state);
  1810. goto skip_pdr;
  1811. }
  1812. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1813. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1814. if (ret < 0) {
  1815. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1816. ret, priv->state);
  1817. goto skip_pdr;
  1818. }
  1819. }
  1820. skip_pdr:
  1821. return NOTIFY_OK;
  1822. }
  1823. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1824. {
  1825. int ret = 0;
  1826. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1827. priv->slate_notify_handler =
  1828. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1829. if (IS_ERR(priv->slate_notify_handler)) {
  1830. ret = PTR_ERR(priv->slate_notify_handler);
  1831. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1832. }
  1833. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1834. return ret;
  1835. }
  1836. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1837. {
  1838. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1839. return 0;
  1840. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1841. &priv->slate_ssr_nb);
  1842. priv->slate_notify_handler = NULL;
  1843. return 0;
  1844. }
  1845. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1846. {
  1847. int ret = 0;
  1848. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1849. /*
  1850. * Assign priority of icnss modem notifier callback over IPA
  1851. * modem notifier callback which is 0
  1852. */
  1853. priv->modem_ssr_nb.priority = 1;
  1854. priv->modem_notify_handler =
  1855. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1856. if (IS_ERR(priv->modem_notify_handler)) {
  1857. ret = PTR_ERR(priv->modem_notify_handler);
  1858. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1859. }
  1860. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1861. return ret;
  1862. }
  1863. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1864. {
  1865. if (IS_ERR(priv->wpss_early_notify_handler))
  1866. return;
  1867. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1868. &priv->wpss_early_ssr_nb);
  1869. priv->wpss_early_notify_handler = NULL;
  1870. }
  1871. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1872. {
  1873. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1874. return 0;
  1875. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1876. &priv->wpss_ssr_nb);
  1877. priv->wpss_notify_handler = NULL;
  1878. return 0;
  1879. }
  1880. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1881. {
  1882. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1883. return 0;
  1884. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1885. &priv->modem_ssr_nb);
  1886. priv->modem_notify_handler = NULL;
  1887. return 0;
  1888. }
  1889. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1890. {
  1891. struct icnss_priv *priv = priv_cb;
  1892. struct icnss_event_pd_service_down_data *event_data;
  1893. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1894. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1895. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1896. state, priv->state);
  1897. switch (state) {
  1898. case SERVREG_SERVICE_STATE_DOWN:
  1899. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1900. if (!event_data)
  1901. return;
  1902. event_data->crashed = true;
  1903. if (!priv->is_ssr) {
  1904. set_bit(ICNSS_PDR, &penv->state);
  1905. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1906. cause = ICNSS_HOST_ERROR;
  1907. priv->stats.recovery.pdr_host_error++;
  1908. } else {
  1909. cause = ICNSS_FW_CRASH;
  1910. priv->stats.recovery.pdr_fw_crash++;
  1911. }
  1912. } else if (priv->root_pd_shutdown) {
  1913. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1914. event_data->crashed = false;
  1915. }
  1916. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1917. priv->state, icnss_pdr_cause[cause]);
  1918. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1919. set_bit(ICNSS_FW_DOWN, &priv->state);
  1920. icnss_ignore_fw_timeout(true);
  1921. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1922. clear_bit(ICNSS_FW_READY, &priv->state);
  1923. fw_down_data.crashed = event_data->crashed;
  1924. icnss_call_driver_uevent(priv,
  1925. ICNSS_UEVENT_FW_DOWN,
  1926. &fw_down_data);
  1927. }
  1928. }
  1929. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1930. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1931. ICNSS_EVENT_SYNC, event_data);
  1932. break;
  1933. case SERVREG_SERVICE_STATE_UP:
  1934. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1935. break;
  1936. default:
  1937. break;
  1938. }
  1939. return;
  1940. }
  1941. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1942. {
  1943. struct pdr_handle *handle = NULL;
  1944. struct pdr_service *service = NULL;
  1945. int err = 0;
  1946. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1947. if (IS_ERR_OR_NULL(handle)) {
  1948. err = PTR_ERR(handle);
  1949. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1950. goto out;
  1951. }
  1952. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1953. if (IS_ERR_OR_NULL(service)) {
  1954. err = PTR_ERR(service);
  1955. icnss_pr_err("Failed to add lookup, err %d", err);
  1956. goto out;
  1957. }
  1958. priv->pdr_handle = handle;
  1959. priv->pdr_service = service;
  1960. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1961. icnss_pr_info("PDR registration happened");
  1962. out:
  1963. return err;
  1964. }
  1965. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1966. {
  1967. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1968. return;
  1969. pdr_handle_release(priv->pdr_handle);
  1970. }
  1971. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1972. {
  1973. int ret = 0;
  1974. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1975. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1976. ret = PTR_ERR(priv->icnss_ramdump_class);
  1977. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1978. return ret;
  1979. }
  1980. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1981. ICNSS_RAMDUMP_NAME);
  1982. if (ret < 0) {
  1983. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1984. goto fail_alloc_major;
  1985. }
  1986. return 0;
  1987. fail_alloc_major:
  1988. class_destroy(priv->icnss_ramdump_class);
  1989. return ret;
  1990. }
  1991. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1992. {
  1993. int ret = 0;
  1994. struct icnss_ramdump_info *ramdump_info;
  1995. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1996. if (!ramdump_info)
  1997. return ERR_PTR(-ENOMEM);
  1998. if (!dev_name) {
  1999. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2000. return NULL;
  2001. }
  2002. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2003. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2004. if (ramdump_info->minor < 0) {
  2005. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2006. ramdump_info->minor);
  2007. ret = -ENODEV;
  2008. goto fail_out_of_minors;
  2009. }
  2010. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2011. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2012. ramdump_info->minor),
  2013. ramdump_info, ramdump_info->name);
  2014. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2015. ret = PTR_ERR(ramdump_info->dev);
  2016. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2017. ramdump_info->name, ret);
  2018. goto fail_device_create;
  2019. }
  2020. return (void *)ramdump_info;
  2021. fail_device_create:
  2022. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2023. fail_out_of_minors:
  2024. kfree(ramdump_info);
  2025. return ERR_PTR(ret);
  2026. }
  2027. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2028. {
  2029. int ret = 0;
  2030. if (!priv || !priv->pdev) {
  2031. icnss_pr_err("Platform priv or pdev is NULL\n");
  2032. return -EINVAL;
  2033. }
  2034. ret = icnss_ramdump_devnode_init(priv);
  2035. if (ret)
  2036. return ret;
  2037. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2038. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2039. icnss_pr_err("Failed to create msa0 dump device!");
  2040. return -ENOMEM;
  2041. }
  2042. if (priv->device_id == WCN6750_DEVICE_ID) {
  2043. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2044. ICNSS_M3_SEGMENT(
  2045. ICNSS_M3_SEGMENT_PHYAREG));
  2046. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2047. !priv->m3_dump_phyareg->dev) {
  2048. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2049. return -ENOMEM;
  2050. }
  2051. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2052. ICNSS_M3_SEGMENT(
  2053. ICNSS_M3_SEGMENT_PHYA));
  2054. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2055. !priv->m3_dump_phydbg->dev) {
  2056. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2057. return -ENOMEM;
  2058. }
  2059. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2060. ICNSS_M3_SEGMENT(
  2061. ICNSS_M3_SEGMENT_WMACREG));
  2062. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2063. !priv->m3_dump_wmac0reg->dev) {
  2064. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2065. return -ENOMEM;
  2066. }
  2067. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2068. ICNSS_M3_SEGMENT(
  2069. ICNSS_M3_SEGMENT_WCSSDBG));
  2070. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2071. !priv->m3_dump_wcssdbg->dev) {
  2072. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2073. return -ENOMEM;
  2074. }
  2075. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2076. ICNSS_M3_SEGMENT(
  2077. ICNSS_M3_SEGMENT_PHYAM3));
  2078. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2079. !priv->m3_dump_phyapdmem->dev) {
  2080. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2081. return -ENOMEM;
  2082. }
  2083. }
  2084. return 0;
  2085. }
  2086. static int icnss_enable_recovery(struct icnss_priv *priv)
  2087. {
  2088. int ret;
  2089. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2090. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2091. return 0;
  2092. }
  2093. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2094. icnss_pr_dbg("SSR disabled through module parameter\n");
  2095. goto enable_pdr;
  2096. }
  2097. ret = icnss_register_ramdump_devices(priv);
  2098. if (ret)
  2099. return ret;
  2100. if (priv->wpss_supported) {
  2101. icnss_wpss_early_ssr_register_notifier(priv);
  2102. icnss_wpss_ssr_register_notifier(priv);
  2103. return 0;
  2104. }
  2105. icnss_modem_ssr_register_notifier(priv);
  2106. if (priv->is_slate_rfa)
  2107. icnss_slate_ssr_register_notifier(priv);
  2108. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2109. icnss_pr_dbg("PDR disabled through module parameter\n");
  2110. return 0;
  2111. }
  2112. enable_pdr:
  2113. ret = icnss_pd_restart_enable(priv);
  2114. if (ret)
  2115. return ret;
  2116. return 0;
  2117. }
  2118. static int icnss_dev_id_match(struct icnss_priv *priv,
  2119. struct device_info *dev_info)
  2120. {
  2121. while (dev_info->device_id) {
  2122. if (priv->device_id == dev_info->device_id)
  2123. return 1;
  2124. dev_info++;
  2125. }
  2126. return 0;
  2127. }
  2128. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2129. unsigned long *thermal_state)
  2130. {
  2131. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2132. *thermal_state = icnss_tcdev->max_thermal_state;
  2133. return 0;
  2134. }
  2135. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2136. unsigned long *thermal_state)
  2137. {
  2138. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2139. *thermal_state = icnss_tcdev->curr_thermal_state;
  2140. return 0;
  2141. }
  2142. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2143. unsigned long thermal_state)
  2144. {
  2145. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2146. struct device *dev = &penv->pdev->dev;
  2147. int ret = 0;
  2148. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2149. return 0;
  2150. if (thermal_state > icnss_tcdev->max_thermal_state)
  2151. return -EINVAL;
  2152. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2153. thermal_state, icnss_tcdev->tcdev_id);
  2154. mutex_lock(&penv->tcdev_lock);
  2155. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2156. icnss_tcdev->tcdev_id);
  2157. if (!ret)
  2158. icnss_tcdev->curr_thermal_state = thermal_state;
  2159. mutex_unlock(&penv->tcdev_lock);
  2160. if (ret) {
  2161. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2162. ret, icnss_tcdev->tcdev_id);
  2163. return ret;
  2164. }
  2165. return 0;
  2166. }
  2167. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2168. .get_max_state = icnss_tcdev_get_max_state,
  2169. .get_cur_state = icnss_tcdev_get_cur_state,
  2170. .set_cur_state = icnss_tcdev_set_cur_state,
  2171. };
  2172. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2173. int tcdev_id)
  2174. {
  2175. struct icnss_priv *priv = dev_get_drvdata(dev);
  2176. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2177. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2178. struct device_node *dev_node;
  2179. int ret = 0;
  2180. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2181. if (!icnss_tcdev)
  2182. return -ENOMEM;
  2183. icnss_tcdev->tcdev_id = tcdev_id;
  2184. icnss_tcdev->max_thermal_state = max_state;
  2185. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2186. "qcom,icnss_cdev%d", tcdev_id);
  2187. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2188. if (!dev_node) {
  2189. icnss_pr_err("Failed to get cooling device node\n");
  2190. return -EINVAL;
  2191. }
  2192. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2193. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2194. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2195. dev_node,
  2196. cdev_node_name, icnss_tcdev,
  2197. &icnss_cooling_ops);
  2198. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2199. ret = PTR_ERR(icnss_tcdev->tcdev);
  2200. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2201. ret, icnss_tcdev->tcdev_id);
  2202. } else {
  2203. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2204. icnss_tcdev->tcdev_id);
  2205. list_add(&icnss_tcdev->tcdev_list,
  2206. &priv->icnss_tcdev_list);
  2207. }
  2208. } else {
  2209. icnss_pr_dbg("Cooling device registration not supported");
  2210. ret = -EOPNOTSUPP;
  2211. }
  2212. return ret;
  2213. }
  2214. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2215. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2216. {
  2217. struct icnss_priv *priv = dev_get_drvdata(dev);
  2218. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2219. while (!list_empty(&priv->icnss_tcdev_list)) {
  2220. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2221. struct icnss_thermal_cdev,
  2222. tcdev_list);
  2223. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2224. list_del(&icnss_tcdev->tcdev_list);
  2225. kfree(icnss_tcdev);
  2226. }
  2227. }
  2228. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2229. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2230. unsigned long *thermal_state,
  2231. int tcdev_id)
  2232. {
  2233. struct icnss_priv *priv = dev_get_drvdata(dev);
  2234. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2235. mutex_lock(&priv->tcdev_lock);
  2236. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2237. if (icnss_tcdev->tcdev_id != tcdev_id)
  2238. continue;
  2239. *thermal_state = icnss_tcdev->curr_thermal_state;
  2240. mutex_unlock(&priv->tcdev_lock);
  2241. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2242. icnss_tcdev->curr_thermal_state, tcdev_id);
  2243. return 0;
  2244. }
  2245. mutex_unlock(&priv->tcdev_lock);
  2246. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2247. return -EINVAL;
  2248. }
  2249. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2250. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2251. int cmd_len, void *cb_ctx,
  2252. int (*cb)(void *ctx, void *event, int event_len))
  2253. {
  2254. struct icnss_priv *priv = icnss_get_plat_priv();
  2255. int ret;
  2256. if (!priv)
  2257. return -ENODEV;
  2258. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2259. return -EINVAL;
  2260. priv->get_info_cb = cb;
  2261. priv->get_info_cb_ctx = cb_ctx;
  2262. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2263. if (ret) {
  2264. priv->get_info_cb = NULL;
  2265. priv->get_info_cb_ctx = NULL;
  2266. }
  2267. return ret;
  2268. }
  2269. EXPORT_SYMBOL(icnss_qmi_send);
  2270. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2271. struct module *owner, const char *mod_name)
  2272. {
  2273. int ret = 0;
  2274. struct icnss_priv *priv = icnss_get_plat_priv();
  2275. if (!priv || !priv->pdev) {
  2276. ret = -ENODEV;
  2277. goto out;
  2278. }
  2279. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2280. if (priv->ops) {
  2281. icnss_pr_err("Driver already registered\n");
  2282. ret = -EEXIST;
  2283. goto out;
  2284. }
  2285. if (!ops->dev_info) {
  2286. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2287. return -EINVAL;
  2288. }
  2289. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2290. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2291. ops->dev_info->name);
  2292. return -ENODEV;
  2293. }
  2294. if (!ops->probe || !ops->remove) {
  2295. ret = -EINVAL;
  2296. goto out;
  2297. }
  2298. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2299. 0, ops);
  2300. if (ret == -EINTR)
  2301. ret = 0;
  2302. out:
  2303. return ret;
  2304. }
  2305. EXPORT_SYMBOL(__icnss_register_driver);
  2306. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2307. {
  2308. int ret;
  2309. struct icnss_priv *priv = icnss_get_plat_priv();
  2310. if (!priv || !priv->pdev) {
  2311. ret = -ENODEV;
  2312. goto out;
  2313. }
  2314. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2315. if (!priv->ops) {
  2316. icnss_pr_err("Driver not registered\n");
  2317. ret = -ENOENT;
  2318. goto out;
  2319. }
  2320. ret = icnss_driver_event_post(priv,
  2321. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2322. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2323. out:
  2324. return ret;
  2325. }
  2326. EXPORT_SYMBOL(icnss_unregister_driver);
  2327. static struct icnss_msi_config msi_config = {
  2328. .total_vectors = 28,
  2329. .total_users = 2,
  2330. .users = (struct icnss_msi_user[]) {
  2331. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2332. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2333. },
  2334. };
  2335. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2336. {
  2337. priv->msi_config = &msi_config;
  2338. return 0;
  2339. }
  2340. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2341. int *num_vectors, u32 *user_base_data,
  2342. u32 *base_vector)
  2343. {
  2344. struct icnss_priv *priv = dev_get_drvdata(dev);
  2345. struct icnss_msi_config *msi_config;
  2346. int idx;
  2347. if (!priv)
  2348. return -ENODEV;
  2349. msi_config = priv->msi_config;
  2350. if (!msi_config) {
  2351. icnss_pr_err("MSI is not supported.\n");
  2352. return -EINVAL;
  2353. }
  2354. for (idx = 0; idx < msi_config->total_users; idx++) {
  2355. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2356. *num_vectors = msi_config->users[idx].num_vectors;
  2357. *user_base_data = msi_config->users[idx].base_vector
  2358. + priv->msi_base_data;
  2359. *base_vector = msi_config->users[idx].base_vector;
  2360. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2361. user_name, *num_vectors, *user_base_data,
  2362. *base_vector);
  2363. return 0;
  2364. }
  2365. }
  2366. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2367. return -EINVAL;
  2368. }
  2369. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2370. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2371. {
  2372. struct icnss_priv *priv = dev_get_drvdata(dev);
  2373. int irq_num;
  2374. irq_num = priv->srng_irqs[vector];
  2375. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2376. irq_num, vector);
  2377. return irq_num;
  2378. }
  2379. EXPORT_SYMBOL(icnss_get_msi_irq);
  2380. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2381. u32 *msi_addr_high)
  2382. {
  2383. struct icnss_priv *priv = dev_get_drvdata(dev);
  2384. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2385. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2386. }
  2387. EXPORT_SYMBOL(icnss_get_msi_address);
  2388. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2389. irqreturn_t (*handler)(int, void *),
  2390. unsigned long flags, const char *name, void *ctx)
  2391. {
  2392. int ret = 0;
  2393. unsigned int irq;
  2394. struct ce_irq_list *irq_entry;
  2395. struct icnss_priv *priv = dev_get_drvdata(dev);
  2396. if (!priv || !priv->pdev) {
  2397. ret = -ENODEV;
  2398. goto out;
  2399. }
  2400. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2401. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2402. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2403. ret = -EINVAL;
  2404. goto out;
  2405. }
  2406. irq = priv->ce_irqs[ce_id];
  2407. irq_entry = &priv->ce_irq_list[ce_id];
  2408. if (irq_entry->handler || irq_entry->irq) {
  2409. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2410. irq, ce_id);
  2411. ret = -EEXIST;
  2412. goto out;
  2413. }
  2414. ret = request_irq(irq, handler, flags, name, ctx);
  2415. if (ret) {
  2416. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2417. irq, ce_id, ret);
  2418. goto out;
  2419. }
  2420. irq_entry->irq = irq;
  2421. irq_entry->handler = handler;
  2422. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2423. penv->stats.ce_irqs[ce_id].request++;
  2424. out:
  2425. return ret;
  2426. }
  2427. EXPORT_SYMBOL(icnss_ce_request_irq);
  2428. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2429. {
  2430. int ret = 0;
  2431. unsigned int irq;
  2432. struct ce_irq_list *irq_entry;
  2433. if (!penv || !penv->pdev || !dev) {
  2434. ret = -ENODEV;
  2435. goto out;
  2436. }
  2437. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2438. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2439. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2440. ret = -EINVAL;
  2441. goto out;
  2442. }
  2443. irq = penv->ce_irqs[ce_id];
  2444. irq_entry = &penv->ce_irq_list[ce_id];
  2445. if (!irq_entry->handler || !irq_entry->irq) {
  2446. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2447. ret = -EEXIST;
  2448. goto out;
  2449. }
  2450. free_irq(irq, ctx);
  2451. irq_entry->irq = 0;
  2452. irq_entry->handler = NULL;
  2453. penv->stats.ce_irqs[ce_id].free++;
  2454. out:
  2455. return ret;
  2456. }
  2457. EXPORT_SYMBOL(icnss_ce_free_irq);
  2458. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2459. {
  2460. unsigned int irq;
  2461. if (!penv || !penv->pdev || !dev) {
  2462. icnss_pr_err("Platform driver not initialized\n");
  2463. return;
  2464. }
  2465. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2466. penv->state);
  2467. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2468. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2469. return;
  2470. }
  2471. penv->stats.ce_irqs[ce_id].enable++;
  2472. irq = penv->ce_irqs[ce_id];
  2473. enable_irq(irq);
  2474. }
  2475. EXPORT_SYMBOL(icnss_enable_irq);
  2476. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2477. {
  2478. unsigned int irq;
  2479. if (!penv || !penv->pdev || !dev) {
  2480. icnss_pr_err("Platform driver not initialized\n");
  2481. return;
  2482. }
  2483. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2484. penv->state);
  2485. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2486. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2487. ce_id);
  2488. return;
  2489. }
  2490. irq = penv->ce_irqs[ce_id];
  2491. disable_irq(irq);
  2492. penv->stats.ce_irqs[ce_id].disable++;
  2493. }
  2494. EXPORT_SYMBOL(icnss_disable_irq);
  2495. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2496. {
  2497. char *fw_build_timestamp = NULL;
  2498. struct icnss_priv *priv = dev_get_drvdata(dev);
  2499. if (!priv) {
  2500. icnss_pr_err("Platform driver not initialized\n");
  2501. return -EINVAL;
  2502. }
  2503. info->v_addr = priv->mem_base_va;
  2504. info->p_addr = priv->mem_base_pa;
  2505. info->chip_id = priv->chip_info.chip_id;
  2506. info->chip_family = priv->chip_info.chip_family;
  2507. info->board_id = priv->board_id;
  2508. info->soc_id = priv->soc_id;
  2509. info->fw_version = priv->fw_version_info.fw_version;
  2510. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2511. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2512. strlcpy(info->fw_build_timestamp,
  2513. priv->fw_version_info.fw_build_timestamp,
  2514. WLFW_MAX_TIMESTAMP_LEN + 1);
  2515. strlcpy(info->fw_build_id, priv->fw_build_id,
  2516. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2517. return 0;
  2518. }
  2519. EXPORT_SYMBOL(icnss_get_soc_info);
  2520. int icnss_get_mhi_state(struct device *dev)
  2521. {
  2522. struct icnss_priv *priv = dev_get_drvdata(dev);
  2523. if (!priv) {
  2524. icnss_pr_err("Platform driver not initialized\n");
  2525. return -EINVAL;
  2526. }
  2527. if (!priv->mhi_state_info_va)
  2528. return -ENOMEM;
  2529. return ioread32(priv->mhi_state_info_va);
  2530. }
  2531. EXPORT_SYMBOL(icnss_get_mhi_state);
  2532. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2533. {
  2534. int ret;
  2535. struct icnss_priv *priv;
  2536. if (!dev)
  2537. return -ENODEV;
  2538. priv = dev_get_drvdata(dev);
  2539. if (!priv) {
  2540. icnss_pr_err("Platform driver not initialized\n");
  2541. return -EINVAL;
  2542. }
  2543. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2544. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2545. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2546. priv->state);
  2547. return -EINVAL;
  2548. }
  2549. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2550. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2551. if (ret)
  2552. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2553. ret, fw_log_mode);
  2554. return ret;
  2555. }
  2556. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2557. int icnss_force_wake_request(struct device *dev)
  2558. {
  2559. struct icnss_priv *priv;
  2560. if (!dev)
  2561. return -ENODEV;
  2562. priv = dev_get_drvdata(dev);
  2563. if (!priv) {
  2564. icnss_pr_err("Platform driver not initialized\n");
  2565. return -EINVAL;
  2566. }
  2567. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2568. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2569. atomic_read(&priv->soc_wake_ref_count));
  2570. return 0;
  2571. }
  2572. icnss_pr_soc_wake("Calling SOC Wake request");
  2573. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2574. 0, NULL);
  2575. return 0;
  2576. }
  2577. EXPORT_SYMBOL(icnss_force_wake_request);
  2578. int icnss_force_wake_release(struct device *dev)
  2579. {
  2580. struct icnss_priv *priv;
  2581. if (!dev)
  2582. return -ENODEV;
  2583. priv = dev_get_drvdata(dev);
  2584. if (!priv) {
  2585. icnss_pr_err("Platform driver not initialized\n");
  2586. return -EINVAL;
  2587. }
  2588. icnss_pr_soc_wake("Calling SOC Wake response");
  2589. if (atomic_read(&priv->soc_wake_ref_count) &&
  2590. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2591. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2592. atomic_read(&priv->soc_wake_ref_count));
  2593. return 0;
  2594. }
  2595. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2596. 0, NULL);
  2597. return 0;
  2598. }
  2599. EXPORT_SYMBOL(icnss_force_wake_release);
  2600. int icnss_is_device_awake(struct device *dev)
  2601. {
  2602. struct icnss_priv *priv = dev_get_drvdata(dev);
  2603. if (!priv) {
  2604. icnss_pr_err("Platform driver not initialized\n");
  2605. return -EINVAL;
  2606. }
  2607. return atomic_read(&priv->soc_wake_ref_count);
  2608. }
  2609. EXPORT_SYMBOL(icnss_is_device_awake);
  2610. int icnss_is_pci_ep_awake(struct device *dev)
  2611. {
  2612. struct icnss_priv *priv = dev_get_drvdata(dev);
  2613. if (!priv) {
  2614. icnss_pr_err("Platform driver not initialized\n");
  2615. return -EINVAL;
  2616. }
  2617. if (!priv->mhi_state_info_va)
  2618. return -ENOMEM;
  2619. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2620. }
  2621. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2622. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2623. uint32_t mem_type, uint32_t data_len,
  2624. uint8_t *output)
  2625. {
  2626. int ret = 0;
  2627. struct icnss_priv *priv = dev_get_drvdata(dev);
  2628. if (priv->magic != ICNSS_MAGIC) {
  2629. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2630. dev, priv, priv->magic);
  2631. return -EINVAL;
  2632. }
  2633. if (!output || data_len == 0
  2634. || data_len > WLFW_MAX_DATA_SIZE) {
  2635. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2636. output, data_len);
  2637. ret = -EINVAL;
  2638. goto out;
  2639. }
  2640. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2641. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2642. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2643. priv->state);
  2644. ret = -EINVAL;
  2645. goto out;
  2646. }
  2647. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2648. data_len, output);
  2649. out:
  2650. return ret;
  2651. }
  2652. EXPORT_SYMBOL(icnss_athdiag_read);
  2653. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2654. uint32_t mem_type, uint32_t data_len,
  2655. uint8_t *input)
  2656. {
  2657. int ret = 0;
  2658. struct icnss_priv *priv = dev_get_drvdata(dev);
  2659. if (priv->magic != ICNSS_MAGIC) {
  2660. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2661. dev, priv, priv->magic);
  2662. return -EINVAL;
  2663. }
  2664. if (!input || data_len == 0
  2665. || data_len > WLFW_MAX_DATA_SIZE) {
  2666. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2667. input, data_len);
  2668. ret = -EINVAL;
  2669. goto out;
  2670. }
  2671. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2672. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2673. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2674. priv->state);
  2675. ret = -EINVAL;
  2676. goto out;
  2677. }
  2678. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2679. data_len, input);
  2680. out:
  2681. return ret;
  2682. }
  2683. EXPORT_SYMBOL(icnss_athdiag_write);
  2684. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2685. enum icnss_driver_mode mode,
  2686. const char *host_version)
  2687. {
  2688. struct icnss_priv *priv = dev_get_drvdata(dev);
  2689. int temp = 0;
  2690. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2691. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2692. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2693. priv->state);
  2694. return -EINVAL;
  2695. }
  2696. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2697. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2698. priv->state);
  2699. return -EINVAL;
  2700. }
  2701. if (priv->wpss_supported &&
  2702. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2703. icnss_setup_dms_mac(priv);
  2704. if (priv->device_id == WCN6750_DEVICE_ID) {
  2705. if (!icnss_get_temperature(priv, &temp)) {
  2706. icnss_pr_dbg("Temperature: %d\n", temp);
  2707. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2708. icnss_set_wlan_en_delay(priv);
  2709. }
  2710. }
  2711. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2712. }
  2713. EXPORT_SYMBOL(icnss_wlan_enable);
  2714. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2715. {
  2716. struct icnss_priv *priv = dev_get_drvdata(dev);
  2717. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2718. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2719. priv->state);
  2720. return 0;
  2721. }
  2722. return icnss_send_wlan_disable_to_fw(priv);
  2723. }
  2724. EXPORT_SYMBOL(icnss_wlan_disable);
  2725. bool icnss_is_qmi_disable(struct device *dev)
  2726. {
  2727. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2728. }
  2729. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2730. int icnss_get_ce_id(struct device *dev, int irq)
  2731. {
  2732. int i;
  2733. if (!penv || !penv->pdev || !dev)
  2734. return -ENODEV;
  2735. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2736. if (penv->ce_irqs[i] == irq)
  2737. return i;
  2738. }
  2739. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2740. return -EINVAL;
  2741. }
  2742. EXPORT_SYMBOL(icnss_get_ce_id);
  2743. int icnss_get_irq(struct device *dev, int ce_id)
  2744. {
  2745. int irq;
  2746. if (!penv || !penv->pdev || !dev)
  2747. return -ENODEV;
  2748. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2749. return -EINVAL;
  2750. irq = penv->ce_irqs[ce_id];
  2751. return irq;
  2752. }
  2753. EXPORT_SYMBOL(icnss_get_irq);
  2754. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2755. {
  2756. struct icnss_priv *priv = dev_get_drvdata(dev);
  2757. if (!priv) {
  2758. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2759. return NULL;
  2760. }
  2761. return priv->iommu_domain;
  2762. }
  2763. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2764. int icnss_smmu_map(struct device *dev,
  2765. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2766. {
  2767. struct icnss_priv *priv = dev_get_drvdata(dev);
  2768. int flag = IOMMU_READ | IOMMU_WRITE;
  2769. bool dma_coherent = false;
  2770. unsigned long iova;
  2771. int prop_len = 0;
  2772. size_t len;
  2773. int ret = 0;
  2774. if (!priv) {
  2775. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2776. dev, priv);
  2777. return -EINVAL;
  2778. }
  2779. if (!iova_addr) {
  2780. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2781. &paddr, size);
  2782. return -EINVAL;
  2783. }
  2784. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2785. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2786. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2787. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2788. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2789. iova,
  2790. &priv->smmu_iova_ipa_start,
  2791. priv->smmu_iova_ipa_len);
  2792. return -ENOMEM;
  2793. }
  2794. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2795. icnss_pr_dbg("dma-coherent is %s\n",
  2796. dma_coherent ? "enabled" : "disabled");
  2797. if (dma_coherent)
  2798. flag |= IOMMU_CACHE;
  2799. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2800. ret = iommu_map(priv->iommu_domain, iova,
  2801. rounddown(paddr, PAGE_SIZE), len,
  2802. flag);
  2803. if (ret) {
  2804. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2805. return ret;
  2806. }
  2807. priv->smmu_iova_ipa_current = iova + len;
  2808. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2809. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2810. return 0;
  2811. }
  2812. EXPORT_SYMBOL(icnss_smmu_map);
  2813. int icnss_smmu_unmap(struct device *dev,
  2814. uint32_t iova_addr, size_t size)
  2815. {
  2816. struct icnss_priv *priv = dev_get_drvdata(dev);
  2817. unsigned long iova;
  2818. size_t len, unmapped_len;
  2819. if (!priv) {
  2820. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2821. dev, priv);
  2822. return -EINVAL;
  2823. }
  2824. if (!iova_addr) {
  2825. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2826. size);
  2827. return -EINVAL;
  2828. }
  2829. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2830. PAGE_SIZE);
  2831. iova = rounddown(iova_addr, PAGE_SIZE);
  2832. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2833. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2834. iova,
  2835. &priv->smmu_iova_ipa_start,
  2836. priv->smmu_iova_ipa_len);
  2837. return -ENOMEM;
  2838. }
  2839. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2840. iova, len);
  2841. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2842. if (unmapped_len != len) {
  2843. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2844. return -EINVAL;
  2845. }
  2846. priv->smmu_iova_ipa_current = iova;
  2847. return 0;
  2848. }
  2849. EXPORT_SYMBOL(icnss_smmu_unmap);
  2850. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2851. {
  2852. return socinfo_get_serial_number();
  2853. }
  2854. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2855. int icnss_trigger_recovery(struct device *dev)
  2856. {
  2857. int ret = 0;
  2858. struct icnss_priv *priv = dev_get_drvdata(dev);
  2859. if (priv->magic != ICNSS_MAGIC) {
  2860. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2861. ret = -EINVAL;
  2862. goto out;
  2863. }
  2864. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2865. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2866. priv->state);
  2867. ret = -EPERM;
  2868. goto out;
  2869. }
  2870. if (priv->wpss_supported) {
  2871. icnss_pr_vdbg("Initiate Root PD restart");
  2872. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2873. ICNSS_SMP2P_OUT_POWER_SAVE);
  2874. if (!ret)
  2875. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2876. return ret;
  2877. }
  2878. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2879. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2880. priv->state);
  2881. ret = -EOPNOTSUPP;
  2882. goto out;
  2883. }
  2884. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2885. priv->state);
  2886. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2887. if (!ret)
  2888. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2889. out:
  2890. return ret;
  2891. }
  2892. EXPORT_SYMBOL(icnss_trigger_recovery);
  2893. int icnss_idle_shutdown(struct device *dev)
  2894. {
  2895. struct icnss_priv *priv = dev_get_drvdata(dev);
  2896. if (!priv) {
  2897. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2898. return -EINVAL;
  2899. }
  2900. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2901. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2902. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2903. return -EBUSY;
  2904. }
  2905. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2906. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2907. }
  2908. EXPORT_SYMBOL(icnss_idle_shutdown);
  2909. int icnss_idle_restart(struct device *dev)
  2910. {
  2911. struct icnss_priv *priv = dev_get_drvdata(dev);
  2912. if (!priv) {
  2913. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2914. return -EINVAL;
  2915. }
  2916. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2917. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2918. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2919. return -EBUSY;
  2920. }
  2921. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2922. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2923. }
  2924. EXPORT_SYMBOL(icnss_idle_restart);
  2925. int icnss_exit_power_save(struct device *dev)
  2926. {
  2927. struct icnss_priv *priv = dev_get_drvdata(dev);
  2928. icnss_pr_vdbg("Calling Exit Power Save\n");
  2929. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2930. !test_bit(ICNSS_MODE_ON, &priv->state))
  2931. return 0;
  2932. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2933. ICNSS_SMP2P_OUT_POWER_SAVE);
  2934. }
  2935. EXPORT_SYMBOL(icnss_exit_power_save);
  2936. int icnss_prevent_l1(struct device *dev)
  2937. {
  2938. struct icnss_priv *priv = dev_get_drvdata(dev);
  2939. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2940. !test_bit(ICNSS_MODE_ON, &priv->state))
  2941. return 0;
  2942. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2943. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2944. }
  2945. EXPORT_SYMBOL(icnss_prevent_l1);
  2946. void icnss_allow_l1(struct device *dev)
  2947. {
  2948. struct icnss_priv *priv = dev_get_drvdata(dev);
  2949. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2950. !test_bit(ICNSS_MODE_ON, &priv->state))
  2951. return;
  2952. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2953. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2954. }
  2955. EXPORT_SYMBOL(icnss_allow_l1);
  2956. void icnss_allow_recursive_recovery(struct device *dev)
  2957. {
  2958. struct icnss_priv *priv = dev_get_drvdata(dev);
  2959. priv->allow_recursive_recovery = true;
  2960. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2961. }
  2962. void icnss_disallow_recursive_recovery(struct device *dev)
  2963. {
  2964. struct icnss_priv *priv = dev_get_drvdata(dev);
  2965. priv->allow_recursive_recovery = false;
  2966. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2967. }
  2968. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2969. {
  2970. struct kobject *icnss_kobject;
  2971. int ret = 0;
  2972. atomic_set(&priv->is_shutdown, false);
  2973. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2974. if (!icnss_kobject) {
  2975. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2976. return -EINVAL;
  2977. }
  2978. priv->icnss_kobject = icnss_kobject;
  2979. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2980. if (ret) {
  2981. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2982. return ret;
  2983. }
  2984. return ret;
  2985. }
  2986. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2987. {
  2988. struct kobject *icnss_kobject;
  2989. icnss_kobject = priv->icnss_kobject;
  2990. if (icnss_kobject)
  2991. kobject_put(icnss_kobject);
  2992. }
  2993. static ssize_t qdss_tr_start_store(struct device *dev,
  2994. struct device_attribute *attr,
  2995. const char *buf, size_t count)
  2996. {
  2997. struct icnss_priv *priv = dev_get_drvdata(dev);
  2998. wlfw_qdss_trace_start(priv);
  2999. icnss_pr_dbg("Received QDSS start command\n");
  3000. return count;
  3001. }
  3002. static ssize_t qdss_tr_stop_store(struct device *dev,
  3003. struct device_attribute *attr,
  3004. const char *user_buf, size_t count)
  3005. {
  3006. struct icnss_priv *priv = dev_get_drvdata(dev);
  3007. u32 option = 0;
  3008. if (sscanf(user_buf, "%du", &option) != 1)
  3009. return -EINVAL;
  3010. wlfw_qdss_trace_stop(priv, option);
  3011. icnss_pr_dbg("Received QDSS stop command\n");
  3012. return count;
  3013. }
  3014. static ssize_t qdss_conf_download_store(struct device *dev,
  3015. struct device_attribute *attr,
  3016. const char *buf, size_t count)
  3017. {
  3018. struct icnss_priv *priv = dev_get_drvdata(dev);
  3019. icnss_wlfw_qdss_dnld_send_sync(priv);
  3020. icnss_pr_dbg("Received QDSS download config command\n");
  3021. return count;
  3022. }
  3023. static ssize_t hw_trc_override_store(struct device *dev,
  3024. struct device_attribute *attr,
  3025. const char *buf, size_t count)
  3026. {
  3027. struct icnss_priv *priv = dev_get_drvdata(dev);
  3028. int tmp = 0;
  3029. if (sscanf(buf, "%du", &tmp) != 1)
  3030. return -EINVAL;
  3031. priv->hw_trc_override = tmp;
  3032. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3033. return count;
  3034. }
  3035. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3036. {
  3037. struct icnss_priv *priv = icnss_get_plat_priv();
  3038. phandle rproc_phandle;
  3039. int ret;
  3040. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3041. &rproc_phandle)) {
  3042. icnss_pr_err("error reading rproc phandle\n");
  3043. return;
  3044. }
  3045. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3046. if (IS_ERR_OR_NULL(priv->rproc)) {
  3047. icnss_pr_err("rproc not found");
  3048. return;
  3049. }
  3050. ret = rproc_boot(priv->rproc);
  3051. if (ret) {
  3052. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3053. rproc_put(priv->rproc);
  3054. }
  3055. }
  3056. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  3057. {
  3058. if (priv && priv->rproc) {
  3059. rproc_shutdown(priv->rproc);
  3060. rproc_put(priv->rproc);
  3061. priv->rproc = NULL;
  3062. }
  3063. }
  3064. static ssize_t wpss_boot_store(struct device *dev,
  3065. struct device_attribute *attr,
  3066. const char *buf, size_t count)
  3067. {
  3068. struct icnss_priv *priv = dev_get_drvdata(dev);
  3069. int wpss_rproc = 0;
  3070. if (!priv->wpss_supported)
  3071. return count;
  3072. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3073. icnss_pr_err("Failed to read wpss rproc info");
  3074. return -EINVAL;
  3075. }
  3076. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3077. if (wpss_rproc == 1)
  3078. schedule_work(&wpss_loader);
  3079. else if (wpss_rproc == 0)
  3080. icnss_wpss_unload(priv);
  3081. return count;
  3082. }
  3083. static ssize_t wlan_en_delay_store(struct device *dev,
  3084. struct device_attribute *attr,
  3085. const char *buf, size_t count)
  3086. {
  3087. struct icnss_priv *priv = dev_get_drvdata(dev);
  3088. uint32_t wlan_en_delay = 0;
  3089. if (priv->device_id != WCN6750_DEVICE_ID)
  3090. return count;
  3091. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3092. icnss_pr_err("Failed to read wlan_en_delay");
  3093. return -EINVAL;
  3094. }
  3095. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3096. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3097. return count;
  3098. }
  3099. static DEVICE_ATTR_WO(qdss_tr_start);
  3100. static DEVICE_ATTR_WO(qdss_tr_stop);
  3101. static DEVICE_ATTR_WO(qdss_conf_download);
  3102. static DEVICE_ATTR_WO(hw_trc_override);
  3103. static DEVICE_ATTR_WO(wpss_boot);
  3104. static DEVICE_ATTR_WO(wlan_en_delay);
  3105. static struct attribute *icnss_attrs[] = {
  3106. &dev_attr_qdss_tr_start.attr,
  3107. &dev_attr_qdss_tr_stop.attr,
  3108. &dev_attr_qdss_conf_download.attr,
  3109. &dev_attr_hw_trc_override.attr,
  3110. &dev_attr_wpss_boot.attr,
  3111. &dev_attr_wlan_en_delay.attr,
  3112. NULL,
  3113. };
  3114. static struct attribute_group icnss_attr_group = {
  3115. .attrs = icnss_attrs,
  3116. };
  3117. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3118. {
  3119. struct device *dev = &priv->pdev->dev;
  3120. int ret;
  3121. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3122. if (ret) {
  3123. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3124. ret);
  3125. goto out;
  3126. }
  3127. return 0;
  3128. out:
  3129. return ret;
  3130. }
  3131. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3132. {
  3133. sysfs_remove_link(kernel_kobj, "icnss");
  3134. }
  3135. static int icnss_sysfs_create(struct icnss_priv *priv)
  3136. {
  3137. int ret = 0;
  3138. ret = devm_device_add_group(&priv->pdev->dev,
  3139. &icnss_attr_group);
  3140. if (ret) {
  3141. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3142. ret);
  3143. goto out;
  3144. }
  3145. icnss_create_sysfs_link(priv);
  3146. ret = icnss_create_shutdown_sysfs(priv);
  3147. if (ret)
  3148. goto remove_icnss_group;
  3149. return 0;
  3150. remove_icnss_group:
  3151. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3152. out:
  3153. return ret;
  3154. }
  3155. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3156. {
  3157. icnss_destroy_shutdown_sysfs(priv);
  3158. icnss_remove_sysfs_link(priv);
  3159. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3160. }
  3161. static int icnss_resource_parse(struct icnss_priv *priv)
  3162. {
  3163. int ret = 0, i = 0;
  3164. struct platform_device *pdev = priv->pdev;
  3165. struct device *dev = &pdev->dev;
  3166. struct resource *res;
  3167. u32 int_prop;
  3168. ret = icnss_get_vreg(priv);
  3169. if (ret) {
  3170. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3171. goto out;
  3172. }
  3173. ret = icnss_get_clk(priv);
  3174. if (ret) {
  3175. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3176. goto put_vreg;
  3177. }
  3178. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3179. ret = icnss_get_psf_info(priv);
  3180. if (ret < 0)
  3181. goto out;
  3182. priv->psf_supported = true;
  3183. }
  3184. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3185. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3186. "membase");
  3187. if (!res) {
  3188. icnss_pr_err("Memory base not found in DT\n");
  3189. ret = -EINVAL;
  3190. goto put_clk;
  3191. }
  3192. priv->mem_base_pa = res->start;
  3193. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3194. resource_size(res));
  3195. if (!priv->mem_base_va) {
  3196. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3197. &priv->mem_base_pa);
  3198. ret = -EINVAL;
  3199. goto put_clk;
  3200. }
  3201. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3202. &priv->mem_base_pa,
  3203. priv->mem_base_va);
  3204. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3205. res = platform_get_resource(priv->pdev,
  3206. IORESOURCE_IRQ, i);
  3207. if (!res) {
  3208. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3209. ret = -ENODEV;
  3210. goto put_clk;
  3211. } else {
  3212. priv->ce_irqs[i] = res->start;
  3213. }
  3214. }
  3215. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3216. &priv->rf_subtype) == 0) {
  3217. priv->is_rf_subtype_valid = true;
  3218. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3219. }
  3220. if (of_property_read_bool(pdev->dev.of_node,
  3221. "qcom,is_slate_rfa")) {
  3222. priv->is_slate_rfa = true;
  3223. icnss_pr_err("SLATE rfa is enabled\n");
  3224. }
  3225. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3226. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3227. "msi_addr");
  3228. if (!res) {
  3229. icnss_pr_err("MSI address not found in DT\n");
  3230. ret = -EINVAL;
  3231. goto put_clk;
  3232. }
  3233. priv->msi_addr_pa = res->start;
  3234. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3235. PAGE_SIZE,
  3236. DMA_FROM_DEVICE, 0);
  3237. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3238. icnss_pr_err("MSI: failed to map msi address\n");
  3239. priv->msi_addr_iova = 0;
  3240. ret = -ENOMEM;
  3241. goto put_clk;
  3242. }
  3243. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3244. &priv->msi_addr_pa,
  3245. priv->msi_addr_iova);
  3246. ret = of_property_read_u32_index(dev->of_node,
  3247. "interrupts",
  3248. 1,
  3249. &int_prop);
  3250. if (ret) {
  3251. icnss_pr_dbg("Read interrupt prop failed");
  3252. goto put_clk;
  3253. }
  3254. priv->msi_base_data = int_prop + 32;
  3255. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3256. priv->msi_base_data, int_prop);
  3257. icnss_get_msi_assignment(priv);
  3258. for (i = 0; i < msi_config.total_vectors; i++) {
  3259. res = platform_get_resource(priv->pdev,
  3260. IORESOURCE_IRQ, i);
  3261. if (!res) {
  3262. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3263. ret = -ENODEV;
  3264. goto put_clk;
  3265. } else {
  3266. priv->srng_irqs[i] = res->start;
  3267. }
  3268. }
  3269. }
  3270. return 0;
  3271. put_clk:
  3272. icnss_put_clk(priv);
  3273. put_vreg:
  3274. icnss_put_vreg(priv);
  3275. out:
  3276. return ret;
  3277. }
  3278. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3279. {
  3280. int ret = 0;
  3281. struct platform_device *pdev = priv->pdev;
  3282. struct device *dev = &pdev->dev;
  3283. struct device_node *np = NULL;
  3284. u64 prop_size = 0;
  3285. const __be32 *addrp = NULL;
  3286. np = of_parse_phandle(dev->of_node,
  3287. "qcom,wlan-msa-fixed-region", 0);
  3288. if (np) {
  3289. addrp = of_get_address(np, 0, &prop_size, NULL);
  3290. if (!addrp) {
  3291. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3292. ret = -EINVAL;
  3293. of_node_put(np);
  3294. goto out;
  3295. }
  3296. priv->msa_pa = of_translate_address(np, addrp);
  3297. if (priv->msa_pa == OF_BAD_ADDR) {
  3298. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3299. ret = -EINVAL;
  3300. of_node_put(np);
  3301. goto out;
  3302. }
  3303. of_node_put(np);
  3304. priv->msa_va = memremap(priv->msa_pa,
  3305. (unsigned long)prop_size, MEMREMAP_WT);
  3306. if (!priv->msa_va) {
  3307. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3308. &priv->msa_pa);
  3309. ret = -EINVAL;
  3310. goto out;
  3311. }
  3312. priv->msa_mem_size = prop_size;
  3313. } else {
  3314. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3315. &priv->msa_mem_size);
  3316. if (ret || priv->msa_mem_size == 0) {
  3317. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3318. priv->msa_mem_size, ret);
  3319. goto out;
  3320. }
  3321. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3322. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3323. if (!priv->msa_va) {
  3324. icnss_pr_err("DMA alloc failed for MSA\n");
  3325. ret = -ENOMEM;
  3326. goto out;
  3327. }
  3328. }
  3329. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3330. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3331. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3332. "qcom,fw-prefix");
  3333. return 0;
  3334. out:
  3335. return ret;
  3336. }
  3337. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3338. struct device *dev, unsigned long iova,
  3339. int flags, void *handler_token)
  3340. {
  3341. struct icnss_priv *priv = handler_token;
  3342. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3343. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3344. if (!priv) {
  3345. icnss_pr_err("priv is NULL\n");
  3346. return -ENODEV;
  3347. }
  3348. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3349. fw_down_data.crashed = true;
  3350. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3351. &fw_down_data);
  3352. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3353. &fw_down_data);
  3354. }
  3355. icnss_trigger_recovery(&priv->pdev->dev);
  3356. /* IOMMU driver requires non-zero return value to print debug info. */
  3357. return -EINVAL;
  3358. }
  3359. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3360. {
  3361. int ret = 0;
  3362. struct platform_device *pdev = priv->pdev;
  3363. struct device *dev = &pdev->dev;
  3364. const char *iommu_dma_type;
  3365. struct resource *res;
  3366. u32 addr_win[2];
  3367. ret = of_property_read_u32_array(dev->of_node,
  3368. "qcom,iommu-dma-addr-pool",
  3369. addr_win,
  3370. ARRAY_SIZE(addr_win));
  3371. if (ret) {
  3372. icnss_pr_err("SMMU IOVA base not found\n");
  3373. } else {
  3374. priv->smmu_iova_start = addr_win[0];
  3375. priv->smmu_iova_len = addr_win[1];
  3376. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3377. &priv->smmu_iova_start,
  3378. priv->smmu_iova_len);
  3379. priv->iommu_domain =
  3380. iommu_get_domain_for_dev(&pdev->dev);
  3381. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3382. &iommu_dma_type);
  3383. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3384. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3385. priv->smmu_s1_enable = true;
  3386. if (priv->device_id == WCN6750_DEVICE_ID)
  3387. iommu_set_fault_handler(priv->iommu_domain,
  3388. icnss_smmu_fault_handler,
  3389. priv);
  3390. }
  3391. res = platform_get_resource_byname(pdev,
  3392. IORESOURCE_MEM,
  3393. "smmu_iova_ipa");
  3394. if (!res) {
  3395. icnss_pr_err("SMMU IOVA IPA not found\n");
  3396. } else {
  3397. priv->smmu_iova_ipa_start = res->start;
  3398. priv->smmu_iova_ipa_current = res->start;
  3399. priv->smmu_iova_ipa_len = resource_size(res);
  3400. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3401. &priv->smmu_iova_ipa_start,
  3402. priv->smmu_iova_ipa_len);
  3403. }
  3404. }
  3405. return 0;
  3406. }
  3407. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3408. {
  3409. if (!priv)
  3410. return -ENODEV;
  3411. if (!priv->smmu_iova_len)
  3412. return -EINVAL;
  3413. *addr = priv->smmu_iova_start;
  3414. *size = priv->smmu_iova_len;
  3415. return 0;
  3416. }
  3417. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3418. {
  3419. if (!priv)
  3420. return -ENODEV;
  3421. if (!priv->smmu_iova_ipa_len)
  3422. return -EINVAL;
  3423. *addr = priv->smmu_iova_ipa_start;
  3424. *size = priv->smmu_iova_ipa_len;
  3425. return 0;
  3426. }
  3427. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3428. char *name)
  3429. {
  3430. if (!priv)
  3431. return;
  3432. if (!priv->use_prefix_path) {
  3433. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3434. return;
  3435. }
  3436. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3437. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3438. ADRASTEA_PATH_PREFIX "%s", name);
  3439. else
  3440. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3441. QCA6750_PATH_PREFIX "%s", name);
  3442. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3443. }
  3444. static const struct platform_device_id icnss_platform_id_table[] = {
  3445. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3446. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3447. { },
  3448. };
  3449. static const struct of_device_id icnss_dt_match[] = {
  3450. {
  3451. .compatible = "qcom,wcn6750",
  3452. .data = (void *)&icnss_platform_id_table[0]},
  3453. {
  3454. .compatible = "qcom,icnss",
  3455. .data = (void *)&icnss_platform_id_table[1]},
  3456. { },
  3457. };
  3458. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3459. static void icnss_init_control_params(struct icnss_priv *priv)
  3460. {
  3461. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3462. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3463. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3464. if (priv->device_id == WCN6750_DEVICE_ID ||
  3465. of_property_read_bool(priv->pdev->dev.of_node,
  3466. "wpss-support-enable"))
  3467. priv->wpss_supported = true;
  3468. if (of_property_read_bool(priv->pdev->dev.of_node,
  3469. "bdf-download-support"))
  3470. priv->bdf_download_support = true;
  3471. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3472. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3473. }
  3474. static void icnss_read_device_configs(struct icnss_priv *priv)
  3475. {
  3476. if (of_property_read_bool(priv->pdev->dev.of_node,
  3477. "wlan-ipa-disabled")) {
  3478. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3479. }
  3480. }
  3481. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3482. {
  3483. pm_runtime_get_sync(&priv->pdev->dev);
  3484. pm_runtime_forbid(&priv->pdev->dev);
  3485. pm_runtime_set_active(&priv->pdev->dev);
  3486. pm_runtime_enable(&priv->pdev->dev);
  3487. }
  3488. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3489. {
  3490. pm_runtime_disable(&priv->pdev->dev);
  3491. pm_runtime_allow(&priv->pdev->dev);
  3492. pm_runtime_put_sync(&priv->pdev->dev);
  3493. }
  3494. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3495. {
  3496. return of_property_read_bool(priv->pdev->dev.of_node,
  3497. "use-nv-mac");
  3498. }
  3499. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3500. {
  3501. struct icnss_subsys_restart_level_data *restart_level_data;
  3502. icnss_pr_info("rproc name: %s recovery disable: %d",
  3503. rproc->name, rproc->recovery_disabled);
  3504. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3505. if (!restart_level_data)
  3506. return;
  3507. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3508. if (rproc->recovery_disabled)
  3509. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3510. else
  3511. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3512. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3513. 0, restart_level_data);
  3514. }
  3515. }
  3516. static int icnss_probe(struct platform_device *pdev)
  3517. {
  3518. int ret = 0;
  3519. struct device *dev = &pdev->dev;
  3520. struct icnss_priv *priv;
  3521. const struct of_device_id *of_id;
  3522. const struct platform_device_id *device_id;
  3523. if (dev_get_drvdata(dev)) {
  3524. icnss_pr_err("Driver is already initialized\n");
  3525. return -EEXIST;
  3526. }
  3527. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3528. if (!of_id || !of_id->data) {
  3529. icnss_pr_err("Failed to find of match device!\n");
  3530. ret = -ENODEV;
  3531. goto out_reset_drvdata;
  3532. }
  3533. device_id = of_id->data;
  3534. icnss_pr_dbg("Platform driver probe\n");
  3535. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3536. if (!priv)
  3537. return -ENOMEM;
  3538. priv->magic = ICNSS_MAGIC;
  3539. dev_set_drvdata(dev, priv);
  3540. priv->pdev = pdev;
  3541. priv->device_id = device_id->driver_data;
  3542. priv->is_chain1_supported = true;
  3543. INIT_LIST_HEAD(&priv->vreg_list);
  3544. INIT_LIST_HEAD(&priv->clk_list);
  3545. icnss_allow_recursive_recovery(dev);
  3546. icnss_init_control_params(priv);
  3547. icnss_read_device_configs(priv);
  3548. ret = icnss_resource_parse(priv);
  3549. if (ret)
  3550. goto out_reset_drvdata;
  3551. ret = icnss_msa_dt_parse(priv);
  3552. if (ret)
  3553. goto out_free_resources;
  3554. ret = icnss_smmu_dt_parse(priv);
  3555. if (ret)
  3556. goto out_free_resources;
  3557. spin_lock_init(&priv->event_lock);
  3558. spin_lock_init(&priv->on_off_lock);
  3559. spin_lock_init(&priv->soc_wake_msg_lock);
  3560. mutex_init(&priv->dev_lock);
  3561. mutex_init(&priv->tcdev_lock);
  3562. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3563. if (!priv->event_wq) {
  3564. icnss_pr_err("Workqueue creation failed\n");
  3565. ret = -EFAULT;
  3566. goto smmu_cleanup;
  3567. }
  3568. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3569. INIT_LIST_HEAD(&priv->event_list);
  3570. ret = icnss_register_fw_service(priv);
  3571. if (ret < 0) {
  3572. icnss_pr_err("fw service registration failed: %d\n", ret);
  3573. goto out_destroy_wq;
  3574. }
  3575. icnss_enable_recovery(priv);
  3576. icnss_debugfs_create(priv);
  3577. icnss_sysfs_create(priv);
  3578. ret = device_init_wakeup(&priv->pdev->dev, true);
  3579. if (ret)
  3580. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3581. ret);
  3582. icnss_set_plat_priv(priv);
  3583. init_completion(&priv->unblock_shutdown);
  3584. if (priv->is_slate_rfa)
  3585. init_completion(&priv->slate_boot_complete);
  3586. if (priv->device_id == WCN6750_DEVICE_ID) {
  3587. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3588. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3589. if (!priv->soc_wake_wq) {
  3590. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3591. ret = -EFAULT;
  3592. goto out_unregister_fw_service;
  3593. }
  3594. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3595. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3596. ret = icnss_genl_init();
  3597. if (ret < 0)
  3598. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3599. init_completion(&priv->smp2p_soc_wake_wait);
  3600. icnss_runtime_pm_init(priv);
  3601. icnss_aop_mbox_init(priv);
  3602. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3603. priv->bdf_download_support = true;
  3604. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3605. }
  3606. if (priv->wpss_supported) {
  3607. ret = icnss_dms_init(priv);
  3608. if (ret)
  3609. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3610. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3611. icnss_pr_dbg("NV MAC feature is %s\n",
  3612. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3613. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3614. }
  3615. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3616. icnss_pr_info("Platform driver probed successfully\n");
  3617. return 0;
  3618. out_unregister_fw_service:
  3619. icnss_unregister_fw_service(priv);
  3620. out_destroy_wq:
  3621. destroy_workqueue(priv->event_wq);
  3622. smmu_cleanup:
  3623. priv->iommu_domain = NULL;
  3624. out_free_resources:
  3625. icnss_put_resources(priv);
  3626. out_reset_drvdata:
  3627. dev_set_drvdata(dev, NULL);
  3628. return ret;
  3629. }
  3630. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3631. {
  3632. if (IS_ERR_OR_NULL(ramdump_info))
  3633. return;
  3634. device_unregister(ramdump_info->dev);
  3635. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3636. kfree(ramdump_info);
  3637. }
  3638. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3639. {
  3640. if (priv->batt_psy)
  3641. power_supply_put(penv->batt_psy);
  3642. if (priv->psf_supported) {
  3643. flush_workqueue(priv->soc_update_wq);
  3644. destroy_workqueue(priv->soc_update_wq);
  3645. power_supply_unreg_notifier(&priv->psf_nb);
  3646. }
  3647. }
  3648. static int icnss_remove(struct platform_device *pdev)
  3649. {
  3650. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3651. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3652. device_init_wakeup(&priv->pdev->dev, false);
  3653. icnss_debugfs_destroy(priv);
  3654. icnss_unregister_power_supply_notifier(penv);
  3655. icnss_sysfs_destroy(priv);
  3656. complete_all(&priv->unblock_shutdown);
  3657. if (priv->is_slate_rfa)
  3658. icnss_slate_ssr_unregister_notifier(priv);
  3659. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3660. if (priv->wpss_supported) {
  3661. icnss_dms_deinit(priv);
  3662. icnss_wpss_early_ssr_unregister_notifier(priv);
  3663. icnss_wpss_ssr_unregister_notifier(priv);
  3664. } else {
  3665. icnss_modem_ssr_unregister_notifier(priv);
  3666. icnss_pdr_unregister_notifier(priv);
  3667. }
  3668. if (priv->device_id == WCN6750_DEVICE_ID) {
  3669. icnss_genl_exit();
  3670. icnss_runtime_pm_deinit(priv);
  3671. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3672. mbox_free_channel(priv->mbox_chan);
  3673. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3674. complete_all(&priv->smp2p_soc_wake_wait);
  3675. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3676. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3677. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3678. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3679. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3680. if (priv->soc_wake_wq)
  3681. destroy_workqueue(priv->soc_wake_wq);
  3682. }
  3683. class_destroy(priv->icnss_ramdump_class);
  3684. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3685. icnss_unregister_fw_service(priv);
  3686. if (priv->event_wq)
  3687. destroy_workqueue(priv->event_wq);
  3688. priv->iommu_domain = NULL;
  3689. icnss_hw_power_off(priv);
  3690. icnss_put_resources(priv);
  3691. dev_set_drvdata(&pdev->dev, NULL);
  3692. return 0;
  3693. }
  3694. #ifdef CONFIG_PM_SLEEP
  3695. static int icnss_pm_suspend(struct device *dev)
  3696. {
  3697. struct icnss_priv *priv = dev_get_drvdata(dev);
  3698. int ret = 0;
  3699. if (priv->magic != ICNSS_MAGIC) {
  3700. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3701. dev, priv, priv->magic);
  3702. return -EINVAL;
  3703. }
  3704. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3705. if (!priv->ops || !priv->ops->pm_suspend ||
  3706. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3707. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3708. return 0;
  3709. ret = priv->ops->pm_suspend(dev);
  3710. if (ret == 0) {
  3711. if (priv->device_id == WCN6750_DEVICE_ID) {
  3712. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3713. !test_bit(ICNSS_MODE_ON, &priv->state))
  3714. return 0;
  3715. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3716. ICNSS_SMP2P_OUT_POWER_SAVE);
  3717. }
  3718. priv->stats.pm_suspend++;
  3719. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3720. } else {
  3721. priv->stats.pm_suspend_err++;
  3722. }
  3723. return ret;
  3724. }
  3725. static int icnss_pm_resume(struct device *dev)
  3726. {
  3727. struct icnss_priv *priv = dev_get_drvdata(dev);
  3728. int ret = 0;
  3729. if (priv->magic != ICNSS_MAGIC) {
  3730. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3731. dev, priv, priv->magic);
  3732. return -EINVAL;
  3733. }
  3734. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3735. if (!priv->ops || !priv->ops->pm_resume ||
  3736. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3737. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3738. goto out;
  3739. ret = priv->ops->pm_resume(dev);
  3740. out:
  3741. if (ret == 0) {
  3742. priv->stats.pm_resume++;
  3743. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3744. } else {
  3745. priv->stats.pm_resume_err++;
  3746. }
  3747. return ret;
  3748. }
  3749. static int icnss_pm_suspend_noirq(struct device *dev)
  3750. {
  3751. struct icnss_priv *priv = dev_get_drvdata(dev);
  3752. int ret = 0;
  3753. if (priv->magic != ICNSS_MAGIC) {
  3754. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3755. dev, priv, priv->magic);
  3756. return -EINVAL;
  3757. }
  3758. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3759. if (!priv->ops || !priv->ops->suspend_noirq ||
  3760. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3761. goto out;
  3762. ret = priv->ops->suspend_noirq(dev);
  3763. out:
  3764. if (ret == 0) {
  3765. priv->stats.pm_suspend_noirq++;
  3766. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3767. } else {
  3768. priv->stats.pm_suspend_noirq_err++;
  3769. }
  3770. return ret;
  3771. }
  3772. static int icnss_pm_resume_noirq(struct device *dev)
  3773. {
  3774. struct icnss_priv *priv = dev_get_drvdata(dev);
  3775. int ret = 0;
  3776. if (priv->magic != ICNSS_MAGIC) {
  3777. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3778. dev, priv, priv->magic);
  3779. return -EINVAL;
  3780. }
  3781. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3782. if (!priv->ops || !priv->ops->resume_noirq ||
  3783. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3784. goto out;
  3785. ret = priv->ops->resume_noirq(dev);
  3786. out:
  3787. if (ret == 0) {
  3788. priv->stats.pm_resume_noirq++;
  3789. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3790. } else {
  3791. priv->stats.pm_resume_noirq_err++;
  3792. }
  3793. return ret;
  3794. }
  3795. static int icnss_pm_runtime_suspend(struct device *dev)
  3796. {
  3797. struct icnss_priv *priv = dev_get_drvdata(dev);
  3798. int ret = 0;
  3799. if (priv->device_id != WCN6750_DEVICE_ID) {
  3800. icnss_pr_err("Ignore runtime suspend:\n");
  3801. goto out;
  3802. }
  3803. if (priv->magic != ICNSS_MAGIC) {
  3804. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3805. dev, priv, priv->magic);
  3806. return -EINVAL;
  3807. }
  3808. if (!priv->ops || !priv->ops->runtime_suspend ||
  3809. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3810. goto out;
  3811. icnss_pr_vdbg("Runtime suspend\n");
  3812. ret = priv->ops->runtime_suspend(dev);
  3813. if (!ret) {
  3814. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3815. !test_bit(ICNSS_MODE_ON, &priv->state))
  3816. return 0;
  3817. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3818. ICNSS_SMP2P_OUT_POWER_SAVE);
  3819. }
  3820. out:
  3821. return ret;
  3822. }
  3823. static int icnss_pm_runtime_resume(struct device *dev)
  3824. {
  3825. struct icnss_priv *priv = dev_get_drvdata(dev);
  3826. int ret = 0;
  3827. if (priv->device_id != WCN6750_DEVICE_ID) {
  3828. icnss_pr_err("Ignore runtime resume:\n");
  3829. goto out;
  3830. }
  3831. if (priv->magic != ICNSS_MAGIC) {
  3832. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3833. dev, priv, priv->magic);
  3834. return -EINVAL;
  3835. }
  3836. if (!priv->ops || !priv->ops->runtime_resume ||
  3837. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3838. goto out;
  3839. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3840. ret = priv->ops->runtime_resume(dev);
  3841. out:
  3842. return ret;
  3843. }
  3844. static int icnss_pm_runtime_idle(struct device *dev)
  3845. {
  3846. struct icnss_priv *priv = dev_get_drvdata(dev);
  3847. if (priv->device_id != WCN6750_DEVICE_ID) {
  3848. icnss_pr_err("Ignore runtime idle:\n");
  3849. goto out;
  3850. }
  3851. icnss_pr_vdbg("Runtime idle\n");
  3852. pm_request_autosuspend(dev);
  3853. out:
  3854. return -EBUSY;
  3855. }
  3856. #endif
  3857. static const struct dev_pm_ops icnss_pm_ops = {
  3858. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3859. icnss_pm_resume)
  3860. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3861. icnss_pm_resume_noirq)
  3862. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3863. icnss_pm_runtime_idle)
  3864. };
  3865. static struct platform_driver icnss_driver = {
  3866. .probe = icnss_probe,
  3867. .remove = icnss_remove,
  3868. .driver = {
  3869. .name = "icnss2",
  3870. .pm = &icnss_pm_ops,
  3871. .of_match_table = icnss_dt_match,
  3872. },
  3873. };
  3874. static int __init icnss_initialize(void)
  3875. {
  3876. icnss_debug_init();
  3877. return platform_driver_register(&icnss_driver);
  3878. }
  3879. static void __exit icnss_exit(void)
  3880. {
  3881. platform_driver_unregister(&icnss_driver);
  3882. icnss_debug_deinit();
  3883. }
  3884. module_init(icnss_initialize);
  3885. module_exit(icnss_exit);
  3886. MODULE_LICENSE("GPL v2");
  3887. MODULE_DESCRIPTION("iWCN CORE platform driver");