dp_be_rx.c 39 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_be_rx.h"
  24. #include "dp_peer.h"
  25. #include "hal_rx.h"
  26. #include "hal_be_rx.h"
  27. #include "hal_api.h"
  28. #include "hal_be_api.h"
  29. #include "qdf_nbuf.h"
  30. #ifdef MESH_MODE_SUPPORT
  31. #include "if_meta_hdr.h"
  32. #endif
  33. #include "dp_internal.h"
  34. #include "dp_ipa.h"
  35. #ifdef FEATURE_WDS
  36. #include "dp_txrx_wds.h"
  37. #endif
  38. #include "dp_hist.h"
  39. #include "dp_rx_buffer_pool.h"
  40. #ifndef AST_OFFLOAD_ENABLE
  41. static void
  42. dp_rx_wds_learn(struct dp_soc *soc,
  43. struct dp_vdev *vdev,
  44. uint8_t *rx_tlv_hdr,
  45. struct dp_peer *peer,
  46. qdf_nbuf_t nbuf,
  47. struct hal_rx_msdu_metadata msdu_metadata)
  48. {
  49. /* WDS Source Port Learning */
  50. if (qdf_likely(vdev->wds_enabled))
  51. dp_rx_wds_srcport_learn(soc,
  52. rx_tlv_hdr,
  53. peer,
  54. nbuf,
  55. msdu_metadata);
  56. }
  57. #else
  58. #ifdef QCA_SUPPORT_WDS_EXTENDED
  59. /**
  60. * dp_wds_ext_peer_learn_be() - function to send event to control
  61. * path on receiving 1st 4-address frame from backhaul.
  62. * @soc: DP soc
  63. * @ta_peer: WDS repeater peer
  64. * @rx_tlv_hdr : start address of rx tlvs
  65. *
  66. * Return: void
  67. */
  68. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  69. struct dp_peer *ta_peer,
  70. uint8_t *rx_tlv_hdr)
  71. {
  72. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  73. /* instead of checking addr4 is valid or not in per packet path
  74. * check for init bit, which will be set on reception of
  75. * first addr4 valid packet.
  76. */
  77. if (!ta_peer->vdev->wds_ext_enabled ||
  78. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &ta_peer->wds_ext.init))
  79. return;
  80. if (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc, rx_tlv_hdr)) {
  81. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  82. &ta_peer->wds_ext.init);
  83. qdf_mem_copy(wds_ext_src_mac, &ta_peer->mac_addr.raw[0],
  84. QDF_MAC_ADDR_SIZE);
  85. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  86. soc->ctrl_psoc,
  87. ta_peer->peer_id,
  88. ta_peer->vdev->vdev_id,
  89. wds_ext_src_mac);
  90. }
  91. }
  92. #else
  93. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  94. struct dp_peer *ta_peer,
  95. uint8_t *rx_tlv_hdr)
  96. {
  97. }
  98. #endif
  99. static void
  100. dp_rx_wds_learn(struct dp_soc *soc,
  101. struct dp_vdev *vdev,
  102. uint8_t *rx_tlv_hdr,
  103. struct dp_peer *ta_peer,
  104. qdf_nbuf_t nbuf,
  105. struct hal_rx_msdu_metadata msdu_metadata)
  106. {
  107. dp_wds_ext_peer_learn_be(soc, ta_peer, rx_tlv_hdr);
  108. }
  109. #endif
  110. /**
  111. * dp_rx_process_be() - Brain of the Rx processing functionality
  112. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  113. * @int_ctx: per interrupt context
  114. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  115. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  116. * @quota: No. of units (packets) that can be serviced in one shot.
  117. *
  118. * This function implements the core of Rx functionality. This is
  119. * expected to handle only non-error frames.
  120. *
  121. * Return: uint32_t: No. of elements processed
  122. */
  123. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  124. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  125. uint32_t quota)
  126. {
  127. hal_ring_desc_t ring_desc;
  128. hal_soc_handle_t hal_soc;
  129. struct dp_rx_desc *rx_desc = NULL;
  130. qdf_nbuf_t nbuf, next;
  131. bool near_full;
  132. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  133. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  134. uint32_t num_pending;
  135. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  136. uint16_t msdu_len = 0;
  137. uint16_t peer_id;
  138. uint8_t vdev_id;
  139. struct dp_peer *peer;
  140. struct dp_vdev *vdev;
  141. uint32_t pkt_len = 0;
  142. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  143. struct hal_rx_msdu_desc_info msdu_desc_info;
  144. enum hal_reo_error_status error;
  145. uint32_t peer_mdata;
  146. uint8_t *rx_tlv_hdr;
  147. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  148. uint8_t mac_id = 0;
  149. struct dp_pdev *rx_pdev;
  150. bool enh_flag;
  151. struct dp_srng *dp_rxdma_srng;
  152. struct rx_desc_pool *rx_desc_pool;
  153. struct dp_soc *soc = int_ctx->soc;
  154. uint8_t core_id = 0;
  155. struct cdp_tid_rx_stats *tid_stats;
  156. qdf_nbuf_t nbuf_head;
  157. qdf_nbuf_t nbuf_tail;
  158. qdf_nbuf_t deliver_list_head;
  159. qdf_nbuf_t deliver_list_tail;
  160. uint32_t num_rx_bufs_reaped = 0;
  161. uint32_t intr_id;
  162. struct hif_opaque_softc *scn;
  163. int32_t tid = 0;
  164. bool is_prev_msdu_last = true;
  165. uint32_t num_entries_avail = 0;
  166. uint32_t rx_ol_pkt_cnt = 0;
  167. uint32_t num_entries = 0;
  168. struct hal_rx_msdu_metadata msdu_metadata;
  169. QDF_STATUS status;
  170. qdf_nbuf_t ebuf_head;
  171. qdf_nbuf_t ebuf_tail;
  172. uint8_t pkt_capture_offload = 0;
  173. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  174. int max_reap_limit, ring_near_full;
  175. struct dp_soc *replenish_soc;
  176. DP_HIST_INIT();
  177. qdf_assert_always(soc && hal_ring_hdl);
  178. hal_soc = soc->hal_soc;
  179. qdf_assert_always(hal_soc);
  180. scn = soc->hif_handle;
  181. hif_pm_runtime_mark_dp_rx_busy(scn);
  182. intr_id = int_ctx->dp_intr_id;
  183. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  184. more_data:
  185. /* reset local variables here to be re-used in the function */
  186. nbuf_head = NULL;
  187. nbuf_tail = NULL;
  188. deliver_list_head = NULL;
  189. deliver_list_tail = NULL;
  190. peer = NULL;
  191. vdev = NULL;
  192. num_rx_bufs_reaped = 0;
  193. ebuf_head = NULL;
  194. ebuf_tail = NULL;
  195. ring_near_full = 0;
  196. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  197. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  198. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  199. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  200. qdf_mem_zero(head, sizeof(head));
  201. qdf_mem_zero(tail, sizeof(tail));
  202. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  203. &max_reap_limit);
  204. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  205. /*
  206. * Need API to convert from hal_ring pointer to
  207. * Ring Type / Ring Id combo
  208. */
  209. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  210. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  211. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  212. goto done;
  213. }
  214. /*
  215. * start reaping the buffers from reo ring and queue
  216. * them in per vdev queue.
  217. * Process the received pkts in a different per vdev loop.
  218. */
  219. while (qdf_likely(quota &&
  220. (ring_desc = hal_srng_dst_peek(hal_soc,
  221. hal_ring_hdl)))) {
  222. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  223. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  224. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  225. soc, hal_ring_hdl, error);
  226. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  227. 1);
  228. /* Don't know how to deal with this -- assert */
  229. qdf_assert(0);
  230. }
  231. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  232. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  233. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  234. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  235. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  236. break;
  237. }
  238. rx_desc = (struct dp_rx_desc *)
  239. hal_rx_get_reo_desc_va(ring_desc);
  240. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  241. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  242. ring_desc, rx_desc);
  243. if (QDF_IS_STATUS_ERROR(status)) {
  244. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  245. qdf_assert_always(!rx_desc->unmapped);
  246. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  247. rx_desc->unmapped = 1;
  248. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  249. rx_desc->pool_id);
  250. dp_rx_add_to_free_desc_list(
  251. &head[rx_desc->pool_id],
  252. &tail[rx_desc->pool_id],
  253. rx_desc);
  254. }
  255. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  256. continue;
  257. }
  258. /*
  259. * this is a unlikely scenario where the host is reaping
  260. * a descriptor which it already reaped just a while ago
  261. * but is yet to replenish it back to HW.
  262. * In this case host will dump the last 128 descriptors
  263. * including the software descriptor rx_desc and assert.
  264. */
  265. if (qdf_unlikely(!rx_desc->in_use)) {
  266. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  267. dp_info_rl("Reaping rx_desc not in use!");
  268. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  269. ring_desc, rx_desc);
  270. /* ignore duplicate RX desc and continue to process */
  271. /* Pop out the descriptor */
  272. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  273. continue;
  274. }
  275. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  276. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  277. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  278. dp_info_rl("Nbuf sanity check failure!");
  279. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  280. ring_desc, rx_desc);
  281. rx_desc->in_err_state = 1;
  282. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  283. continue;
  284. }
  285. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  286. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  287. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  288. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  289. ring_desc, rx_desc);
  290. }
  291. /* Get MPDU DESC info */
  292. hal_rx_mpdu_desc_info_get_be(ring_desc, &mpdu_desc_info);
  293. /* Get MSDU DESC info */
  294. hal_rx_msdu_desc_info_get_be(ring_desc, &msdu_desc_info);
  295. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  296. HAL_MSDU_F_MSDU_CONTINUATION)) {
  297. /* previous msdu has end bit set, so current one is
  298. * the new MPDU
  299. */
  300. if (is_prev_msdu_last) {
  301. /* Get number of entries available in HW ring */
  302. num_entries_avail =
  303. hal_srng_dst_num_valid(hal_soc,
  304. hal_ring_hdl, 1);
  305. /* For new MPDU check if we can read complete
  306. * MPDU by comparing the number of buffers
  307. * available and number of buffers needed to
  308. * reap this MPDU
  309. */
  310. if ((msdu_desc_info.msdu_len /
  311. (RX_DATA_BUFFER_SIZE -
  312. soc->rx_pkt_tlv_size) + 1) >
  313. num_entries_avail) {
  314. DP_STATS_INC(soc,
  315. rx.msdu_scatter_wait_break,
  316. 1);
  317. dp_rx_cookie_reset_invalid_bit(
  318. ring_desc);
  319. break;
  320. }
  321. is_prev_msdu_last = false;
  322. }
  323. }
  324. core_id = smp_processor_id();
  325. DP_STATS_INC(soc, rx.ring_packets[core_id][reo_ring_num], 1);
  326. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  327. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  328. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  329. HAL_MPDU_F_RAW_AMPDU))
  330. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  331. if (!is_prev_msdu_last &&
  332. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  333. is_prev_msdu_last = true;
  334. /* Pop out the descriptor*/
  335. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  336. rx_bufs_reaped[rx_desc->pool_id]++;
  337. peer_mdata = mpdu_desc_info.peer_meta_data;
  338. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  339. dp_rx_peer_metadata_peer_id_get_be(soc, peer_mdata);
  340. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  341. dp_rx_peer_metadata_vdev_id_get_be(soc, peer_mdata);
  342. /* to indicate whether this msdu is rx offload */
  343. pkt_capture_offload =
  344. DP_PEER_METADATA_OFFLOAD_GET_BE(peer_mdata);
  345. /*
  346. * save msdu flags first, last and continuation msdu in
  347. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  348. * length to nbuf->cb. This ensures the info required for
  349. * per pkt processing is always in the same cache line.
  350. * This helps in improving throughput for smaller pkt
  351. * sizes.
  352. */
  353. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  354. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  355. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  356. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  357. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  358. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  359. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  360. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  361. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  362. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  363. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  364. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  365. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_INTRA_BSS)
  366. qdf_nbuf_set_intra_bss(rx_desc->nbuf, 1);
  367. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  368. HAL_MPDU_F_QOS_CONTROL_VALID))
  369. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  370. /* set sw exception */
  371. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  372. rx_desc->nbuf,
  373. hal_rx_sw_exception_get_be(ring_desc));
  374. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  375. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  376. /*
  377. * move unmap after scattered msdu waiting break logic
  378. * in case double skb unmap happened.
  379. */
  380. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  381. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  382. rx_desc->unmapped = 1;
  383. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  384. ebuf_tail, rx_desc);
  385. /*
  386. * if continuation bit is set then we have MSDU spread
  387. * across multiple buffers, let us not decrement quota
  388. * till we reap all buffers of that MSDU.
  389. */
  390. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  391. quota -= 1;
  392. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  393. &tail[rx_desc->pool_id], rx_desc);
  394. num_rx_bufs_reaped++;
  395. /*
  396. * only if complete msdu is received for scatter case,
  397. * then allow break.
  398. */
  399. if (is_prev_msdu_last &&
  400. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  401. max_reap_limit))
  402. break;
  403. }
  404. done:
  405. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  406. replenish_soc = dp_rx_replensih_soc_get(soc, reo_ring_num);
  407. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  408. /*
  409. * continue with next mac_id if no pkts were reaped
  410. * from that pool
  411. */
  412. if (!rx_bufs_reaped[mac_id])
  413. continue;
  414. dp_rxdma_srng = &replenish_soc->rx_refill_buf_ring[mac_id];
  415. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  416. dp_rx_buffers_replenish(replenish_soc, mac_id, dp_rxdma_srng,
  417. rx_desc_pool, rx_bufs_reaped[mac_id],
  418. &head[mac_id], &tail[mac_id]);
  419. }
  420. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  421. /* Peer can be NULL is case of LFR */
  422. if (qdf_likely(peer))
  423. vdev = NULL;
  424. /*
  425. * BIG loop where each nbuf is dequeued from global queue,
  426. * processed and queued back on a per vdev basis. These nbufs
  427. * are sent to stack as and when we run out of nbufs
  428. * or a new nbuf dequeued from global queue has a different
  429. * vdev when compared to previous nbuf.
  430. */
  431. nbuf = nbuf_head;
  432. while (nbuf) {
  433. next = nbuf->next;
  434. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  435. nbuf = next;
  436. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  437. continue;
  438. }
  439. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  440. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  441. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  442. if (dp_rx_is_list_ready(deliver_list_head, vdev, peer,
  443. peer_id, vdev_id)) {
  444. dp_rx_deliver_to_stack(soc, vdev, peer,
  445. deliver_list_head,
  446. deliver_list_tail);
  447. deliver_list_head = NULL;
  448. deliver_list_tail = NULL;
  449. }
  450. /* Get TID from struct cb->tid_val, save to tid */
  451. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  452. tid = qdf_nbuf_get_tid_val(nbuf);
  453. if (qdf_unlikely(!peer)) {
  454. peer = dp_peer_get_ref_by_id(soc, peer_id,
  455. DP_MOD_ID_RX);
  456. } else if (peer && peer->peer_id != peer_id) {
  457. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  458. peer = dp_peer_get_ref_by_id(soc, peer_id,
  459. DP_MOD_ID_RX);
  460. }
  461. if (peer) {
  462. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  463. qdf_dp_trace_set_track(nbuf, QDF_RX);
  464. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  465. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  466. QDF_NBUF_RX_PKT_DATA_TRACK;
  467. }
  468. rx_bufs_used++;
  469. if (qdf_likely(peer)) {
  470. vdev = peer->vdev;
  471. } else {
  472. nbuf->next = NULL;
  473. dp_rx_deliver_to_pkt_capture_no_peer(
  474. soc, nbuf, pkt_capture_offload);
  475. if (!pkt_capture_offload)
  476. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  477. nbuf = next;
  478. continue;
  479. }
  480. if (qdf_unlikely(!vdev)) {
  481. dp_rx_nbuf_free(nbuf);
  482. nbuf = next;
  483. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  484. continue;
  485. }
  486. /* when hlos tid override is enabled, save tid in
  487. * skb->priority
  488. */
  489. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  490. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  491. qdf_nbuf_set_priority(nbuf, tid);
  492. rx_pdev = vdev->pdev;
  493. DP_RX_TID_SAVE(nbuf, tid);
  494. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  495. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  496. soc->wlan_cfg_ctx)))
  497. qdf_nbuf_set_timestamp(nbuf);
  498. enh_flag = rx_pdev->enhanced_stats_en;
  499. tid_stats =
  500. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  501. /*
  502. * Check if DMA completed -- msdu_done is the last bit
  503. * to be written
  504. */
  505. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  506. !hal_rx_attn_msdu_done_get(hal_soc,
  507. rx_tlv_hdr))) {
  508. dp_err("MSDU DONE failure");
  509. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  510. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  511. QDF_TRACE_LEVEL_INFO);
  512. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  513. dp_rx_nbuf_free(nbuf);
  514. qdf_assert(0);
  515. nbuf = next;
  516. continue;
  517. }
  518. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  519. /*
  520. * First IF condition:
  521. * 802.11 Fragmented pkts are reinjected to REO
  522. * HW block as SG pkts and for these pkts we only
  523. * need to pull the RX TLVS header length.
  524. * Second IF condition:
  525. * The below condition happens when an MSDU is spread
  526. * across multiple buffers. This can happen in two cases
  527. * 1. The nbuf size is smaller then the received msdu.
  528. * ex: we have set the nbuf size to 2048 during
  529. * nbuf_alloc. but we received an msdu which is
  530. * 2304 bytes in size then this msdu is spread
  531. * across 2 nbufs.
  532. *
  533. * 2. AMSDUs when RAW mode is enabled.
  534. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  535. * across 1st nbuf and 2nd nbuf and last MSDU is
  536. * spread across 2nd nbuf and 3rd nbuf.
  537. *
  538. * for these scenarios let us create a skb frag_list and
  539. * append these buffers till the last MSDU of the AMSDU
  540. * Third condition:
  541. * This is the most likely case, we receive 802.3 pkts
  542. * decapsulated by HW, here we need to set the pkt length.
  543. */
  544. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  545. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  546. bool is_mcbc, is_sa_vld, is_da_vld;
  547. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  548. rx_tlv_hdr);
  549. is_sa_vld =
  550. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  551. rx_tlv_hdr);
  552. is_da_vld =
  553. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  554. rx_tlv_hdr);
  555. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  556. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  557. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  558. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  559. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  560. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  561. nbuf = dp_rx_sg_create(soc, nbuf);
  562. next = nbuf->next;
  563. if (qdf_nbuf_is_raw_frame(nbuf)) {
  564. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  565. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  566. } else {
  567. dp_rx_nbuf_free(nbuf);
  568. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  569. dp_info_rl("scatter msdu len %d, dropped",
  570. msdu_len);
  571. nbuf = next;
  572. continue;
  573. }
  574. } else {
  575. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  576. pkt_len = msdu_len +
  577. msdu_metadata.l3_hdr_pad +
  578. soc->rx_pkt_tlv_size;
  579. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  580. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  581. }
  582. /*
  583. * process frame for mulitpass phrase processing
  584. */
  585. if (qdf_unlikely(vdev->multipass_en)) {
  586. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  587. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  588. dp_rx_nbuf_free(nbuf);
  589. nbuf = next;
  590. continue;
  591. }
  592. }
  593. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  594. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  595. DP_STATS_INC(peer, rx.policy_check_drop, 1);
  596. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  597. /* Drop & free packet */
  598. dp_rx_nbuf_free(nbuf);
  599. /* Statistics */
  600. nbuf = next;
  601. continue;
  602. }
  603. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  604. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  605. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  606. rx_tlv_hdr) ==
  607. false))) {
  608. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  609. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  610. dp_rx_nbuf_free(nbuf);
  611. nbuf = next;
  612. continue;
  613. }
  614. /*
  615. * Drop non-EAPOL frames from unauthorized peer.
  616. */
  617. if (qdf_likely(peer) && qdf_unlikely(!peer->authorize) &&
  618. !qdf_nbuf_is_raw_frame(nbuf)) {
  619. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  620. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  621. if (!is_eapol) {
  622. DP_STATS_INC(peer,
  623. rx.peer_unauth_rx_pkt_drop, 1);
  624. dp_rx_nbuf_free(nbuf);
  625. nbuf = next;
  626. continue;
  627. }
  628. }
  629. if (soc->process_rx_status)
  630. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  631. /* Update the protocol tag in SKB based on CCE metadata */
  632. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  633. reo_ring_num, false, true);
  634. /* Update the flow tag in SKB based on FSE metadata */
  635. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  636. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  637. reo_ring_num, tid_stats);
  638. if (qdf_unlikely(vdev->mesh_vdev)) {
  639. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  640. == QDF_STATUS_SUCCESS) {
  641. dp_rx_info("%pK: mesh pkt filtered", soc);
  642. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  643. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  644. 1);
  645. dp_rx_nbuf_free(nbuf);
  646. nbuf = next;
  647. continue;
  648. }
  649. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  650. }
  651. if (qdf_likely(vdev->rx_decap_type ==
  652. htt_cmn_pkt_type_ethernet) &&
  653. qdf_likely(!vdev->mesh_vdev)) {
  654. dp_rx_wds_learn(soc, vdev,
  655. rx_tlv_hdr,
  656. peer,
  657. nbuf,
  658. msdu_metadata);
  659. /* Intrabss-fwd */
  660. if (dp_rx_check_ap_bridge(vdev))
  661. if (dp_rx_intrabss_fwd_be(soc, peer, rx_tlv_hdr,
  662. nbuf,
  663. msdu_metadata)) {
  664. nbuf = next;
  665. tid_stats->intrabss_cnt++;
  666. continue; /* Get next desc */
  667. }
  668. }
  669. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  670. dp_rx_update_stats(soc, nbuf);
  671. DP_RX_LIST_APPEND(deliver_list_head,
  672. deliver_list_tail,
  673. nbuf);
  674. DP_PEER_TO_STACK_INCC_PKT(peer, 1, QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  675. enh_flag);
  676. if (qdf_unlikely(peer->in_twt))
  677. DP_STATS_INC_PKT(peer, rx.to_stack_twt, 1,
  678. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  679. tid_stats->delivered_to_stack++;
  680. nbuf = next;
  681. }
  682. if (qdf_likely(deliver_list_head)) {
  683. if (qdf_likely(peer)) {
  684. dp_rx_deliver_to_pkt_capture(soc, vdev->pdev, peer_id,
  685. pkt_capture_offload,
  686. deliver_list_head);
  687. if (!pkt_capture_offload)
  688. dp_rx_deliver_to_stack(soc, vdev, peer,
  689. deliver_list_head,
  690. deliver_list_tail);
  691. } else {
  692. nbuf = deliver_list_head;
  693. while (nbuf) {
  694. next = nbuf->next;
  695. nbuf->next = NULL;
  696. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  697. nbuf = next;
  698. }
  699. }
  700. }
  701. if (qdf_likely(peer))
  702. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  703. /*
  704. * If we are processing in near-full condition, there are 3 scenario
  705. * 1) Ring entries has reached critical state
  706. * 2) Ring entries are still near high threshold
  707. * 3) Ring entries are below the safe level
  708. *
  709. * One more loop will move the state to normal processing and yield
  710. */
  711. if (ring_near_full && quota)
  712. goto more_data;
  713. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  714. if (quota) {
  715. num_pending =
  716. dp_rx_srng_get_num_pending(hal_soc,
  717. hal_ring_hdl,
  718. num_entries,
  719. &near_full);
  720. if (num_pending) {
  721. DP_STATS_INC(soc, rx.hp_oos2, 1);
  722. if (!hif_exec_should_yield(scn, intr_id))
  723. goto more_data;
  724. if (qdf_unlikely(near_full)) {
  725. DP_STATS_INC(soc, rx.near_full, 1);
  726. goto more_data;
  727. }
  728. }
  729. }
  730. if (vdev && vdev->osif_fisa_flush)
  731. vdev->osif_fisa_flush(soc, reo_ring_num);
  732. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  733. vdev->osif_gro_flush(vdev->osif_vdev,
  734. reo_ring_num);
  735. }
  736. }
  737. /* Update histogram statistics by looping through pdev's */
  738. DP_RX_HIST_STATS_PER_PDEV();
  739. return rx_bufs_used; /* Assume no scale factor for now */
  740. }
  741. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  742. /**
  743. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  744. * @soc: Handle to DP Soc structure
  745. * @rx_desc_pool: Rx descriptor pool handler
  746. * @pool_id: Rx descriptor pool ID
  747. *
  748. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  749. */
  750. static QDF_STATUS
  751. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  752. struct rx_desc_pool *rx_desc_pool,
  753. uint32_t pool_id)
  754. {
  755. struct dp_hw_cookie_conversion_t *cc_ctx;
  756. struct dp_soc_be *be_soc;
  757. union dp_rx_desc_list_elem_t *rx_desc_elem;
  758. struct dp_spt_page_desc *page_desc;
  759. uint32_t ppt_idx = 0;
  760. uint32_t avail_entry_index = 0;
  761. if (!rx_desc_pool->pool_size) {
  762. dp_err("desc_num 0 !!");
  763. return QDF_STATUS_E_FAILURE;
  764. }
  765. be_soc = dp_get_be_soc_from_dp_soc(soc);
  766. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  767. page_desc = &cc_ctx->page_desc_base[0];
  768. rx_desc_elem = rx_desc_pool->freelist;
  769. while (rx_desc_elem) {
  770. if (avail_entry_index == 0) {
  771. if (ppt_idx >= cc_ctx->total_page_num) {
  772. dp_alert("insufficient secondary page tables");
  773. qdf_assert_always(0);
  774. }
  775. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  776. }
  777. /* put each RX Desc VA to SPT pages and
  778. * get corresponding ID
  779. */
  780. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  781. avail_entry_index,
  782. &rx_desc_elem->rx_desc);
  783. rx_desc_elem->rx_desc.cookie =
  784. dp_cc_desc_id_generate(page_desc->ppt_index,
  785. avail_entry_index);
  786. rx_desc_elem->rx_desc.pool_id = pool_id;
  787. rx_desc_elem->rx_desc.in_use = 0;
  788. rx_desc_elem = rx_desc_elem->next;
  789. avail_entry_index = (avail_entry_index + 1) &
  790. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  791. }
  792. return QDF_STATUS_SUCCESS;
  793. }
  794. #else
  795. static QDF_STATUS
  796. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  797. struct rx_desc_pool *rx_desc_pool,
  798. uint32_t pool_id)
  799. {
  800. struct dp_hw_cookie_conversion_t *cc_ctx;
  801. struct dp_soc_be *be_soc;
  802. struct dp_spt_page_desc *page_desc;
  803. uint32_t ppt_idx = 0;
  804. uint32_t avail_entry_index = 0;
  805. int i = 0;
  806. if (!rx_desc_pool->pool_size) {
  807. dp_err("desc_num 0 !!");
  808. return QDF_STATUS_E_FAILURE;
  809. }
  810. be_soc = dp_get_be_soc_from_dp_soc(soc);
  811. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  812. page_desc = &cc_ctx->page_desc_base[0];
  813. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  814. if (i == rx_desc_pool->pool_size - 1)
  815. rx_desc_pool->array[i].next = NULL;
  816. else
  817. rx_desc_pool->array[i].next =
  818. &rx_desc_pool->array[i + 1];
  819. if (avail_entry_index == 0) {
  820. if (ppt_idx >= cc_ctx->total_page_num) {
  821. dp_alert("insufficient secondary page tables");
  822. qdf_assert_always(0);
  823. }
  824. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  825. }
  826. /* put each RX Desc VA to SPT pages and
  827. * get corresponding ID
  828. */
  829. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  830. avail_entry_index,
  831. &rx_desc_pool->array[i].rx_desc);
  832. rx_desc_pool->array[i].rx_desc.cookie =
  833. dp_cc_desc_id_generate(page_desc->ppt_index,
  834. avail_entry_index);
  835. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  836. rx_desc_pool->array[i].rx_desc.in_use = 0;
  837. avail_entry_index = (avail_entry_index + 1) &
  838. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  839. }
  840. return QDF_STATUS_SUCCESS;
  841. }
  842. #endif
  843. static void
  844. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  845. struct rx_desc_pool *rx_desc_pool,
  846. uint32_t pool_id)
  847. {
  848. struct dp_spt_page_desc *page_desc;
  849. struct dp_soc_be *be_soc;
  850. int i = 0;
  851. struct dp_hw_cookie_conversion_t *cc_ctx;
  852. be_soc = dp_get_be_soc_from_dp_soc(soc);
  853. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  854. for (i = 0; i < cc_ctx->total_page_num; i++) {
  855. page_desc = &cc_ctx->page_desc_base[i];
  856. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  857. }
  858. }
  859. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  860. struct rx_desc_pool *rx_desc_pool,
  861. uint32_t pool_id)
  862. {
  863. QDF_STATUS status = QDF_STATUS_SUCCESS;
  864. /* Only regular RX buffer desc pool use HW cookie conversion */
  865. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  866. dp_info("rx_desc_buf pool init");
  867. status = dp_rx_desc_pool_init_be_cc(soc,
  868. rx_desc_pool,
  869. pool_id);
  870. } else {
  871. dp_info("non_rx_desc_buf_pool init");
  872. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  873. pool_id);
  874. }
  875. return status;
  876. }
  877. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  878. struct rx_desc_pool *rx_desc_pool,
  879. uint32_t pool_id)
  880. {
  881. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  882. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  883. }
  884. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  885. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  886. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  887. void *ring_desc,
  888. struct dp_rx_desc **r_rx_desc)
  889. {
  890. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  891. /* HW cookie conversion done */
  892. *r_rx_desc = (struct dp_rx_desc *)
  893. hal_rx_wbm_get_desc_va(ring_desc);
  894. } else {
  895. /* SW do cookie conversion */
  896. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  897. *r_rx_desc = (struct dp_rx_desc *)
  898. dp_cc_desc_find(soc, cookie);
  899. }
  900. return QDF_STATUS_SUCCESS;
  901. }
  902. #else
  903. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  904. void *ring_desc,
  905. struct dp_rx_desc **r_rx_desc)
  906. {
  907. *r_rx_desc = (struct dp_rx_desc *)
  908. hal_rx_wbm_get_desc_va(ring_desc);
  909. return QDF_STATUS_SUCCESS;
  910. }
  911. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  912. #else
  913. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  914. void *ring_desc,
  915. struct dp_rx_desc **r_rx_desc)
  916. {
  917. /* SW do cookie conversion */
  918. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  919. *r_rx_desc = (struct dp_rx_desc *)
  920. dp_cc_desc_find(soc, cookie);
  921. return QDF_STATUS_SUCCESS;
  922. }
  923. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  924. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  925. uint32_t cookie)
  926. {
  927. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  928. }
  929. #if defined(WLAN_FEATURE_11BE_MLO)
  930. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  931. static inline void dp_rx_dummy_src_mac(qdf_nbuf_t nbuf)
  932. {
  933. qdf_ether_header_t *eh =
  934. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  935. eh->ether_shost[0] = 0x4d; /* M */
  936. eh->ether_shost[1] = 0x4c; /* L */
  937. eh->ether_shost[2] = 0x4d; /* M */
  938. eh->ether_shost[3] = 0x43; /* C */
  939. eh->ether_shost[4] = 0x41; /* A */
  940. eh->ether_shost[5] = 0x53; /* S */
  941. }
  942. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  943. struct dp_vdev *vdev,
  944. struct dp_peer *peer,
  945. qdf_nbuf_t nbuf)
  946. {
  947. struct dp_vdev *mcast_primary_vdev = NULL;
  948. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  949. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  950. if (!(qdf_nbuf_is_ipv4_igmp_pkt(buf) ||
  951. qdf_nbuf_is_ipv6_igmp_pkt(buf)))
  952. return false;
  953. if (vdev->mcast_enhancement_en || be_vdev->mcast_primary)
  954. goto send_pkt;
  955. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc, be_vdev,
  956. DP_MOD_ID_RX);
  957. if (!mcast_primary_vdev) {
  958. dp_rx_debug("Non mlo vdev");
  959. goto send_pkt;
  960. }
  961. dp_rx_dummy_src_mac(nbuf);
  962. dp_rx_deliver_to_stack(mcast_primary_vdev->pdev->soc,
  963. mcast_primary_vdev,
  964. peer,
  965. nbuf,
  966. NULL);
  967. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  968. mcast_primary_vdev,
  969. DP_MOD_ID_RX);
  970. return true;
  971. send_pkt:
  972. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  973. &be_vdev->vdev,
  974. peer,
  975. nbuf,
  976. NULL);
  977. return true;
  978. }
  979. #else
  980. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  981. struct dp_vdev *vdev,
  982. struct dp_peer *peer,
  983. qdf_nbuf_t nbuf)
  984. {
  985. return false;
  986. }
  987. #endif
  988. #endif
  989. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  990. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  991. hal_ring_handle_t hal_ring_hdl,
  992. uint8_t reo_ring_num,
  993. uint32_t quota)
  994. {
  995. struct dp_soc *soc = int_ctx->soc;
  996. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  997. uint32_t work_done = 0;
  998. if (dp_srng_get_near_full_level(soc, rx_ring) <
  999. DP_SRNG_THRESH_NEAR_FULL)
  1000. return 0;
  1001. qdf_atomic_set(&rx_ring->near_full, 1);
  1002. work_done++;
  1003. return work_done;
  1004. }
  1005. #endif
  1006. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1007. #ifdef WLAN_FEATURE_11BE_MLO
  1008. /**
  1009. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1010. * @ta_peer: transmitter peer handle
  1011. * @da_peer: destination peer handle
  1012. *
  1013. * Return: true - MLO forwarding case, false: not
  1014. */
  1015. static inline bool
  1016. dp_rx_intrabss_fwd_mlo_allow(struct dp_peer *ta_peer,
  1017. struct dp_peer *da_peer)
  1018. {
  1019. /* one of TA/DA peer should belong to MLO connection peer,
  1020. * only MLD peer type is as expected
  1021. */
  1022. if (!IS_MLO_DP_MLD_PEER(ta_peer) &&
  1023. !IS_MLO_DP_MLD_PEER(da_peer))
  1024. return false;
  1025. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1026. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1027. &da_peer->vdev->mld_mac_addr))
  1028. return false;
  1029. return true;
  1030. }
  1031. #else
  1032. static inline bool
  1033. dp_rx_intrabss_fwd_mlo_allow(struct dp_peer *ta_peer,
  1034. struct dp_peer *da_peer)
  1035. {
  1036. return false;
  1037. }
  1038. #endif
  1039. #ifdef INTRA_BSS_FWD_OFFLOAD
  1040. /**
  1041. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1042. for unicast frame
  1043. * @soc: SOC hanlde
  1044. * @nbuf: RX packet buffer
  1045. * @ta_peer: transmitter DP peer handle
  1046. * @msdu_metadata: MSDU meta data info
  1047. * @p_tx_vdev_id: get vdev id for Intra-BSS TX
  1048. *
  1049. * Return: true - intrabss allowed
  1050. false - not allow
  1051. */
  1052. static bool
  1053. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1054. struct dp_peer *ta_peer,
  1055. struct hal_rx_msdu_metadata *msdu_metadata,
  1056. struct dp_be_intrabss_params *params)
  1057. {
  1058. uint16_t da_peer_id;
  1059. struct dp_peer *da_peer;
  1060. if (!qdf_nbuf_is_intra_bss(nbuf))
  1061. return false;
  1062. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1063. params->dest_soc,
  1064. msdu_metadata->da_idx);
  1065. da_peer = dp_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1066. DP_MOD_ID_RX);
  1067. if (!da_peer)
  1068. return false;
  1069. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1070. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1071. return true;
  1072. }
  1073. #else
  1074. #ifdef WLAN_MLO_MULTI_CHIP
  1075. static bool
  1076. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1077. struct dp_peer *ta_peer,
  1078. struct hal_rx_msdu_metadata *msdu_metadata,
  1079. struct dp_be_intrabss_params *params)
  1080. {
  1081. uint16_t da_peer_id;
  1082. struct dp_peer *da_peer;
  1083. bool ret = false;
  1084. uint8_t dest_chip_id;
  1085. uint8_t soc_idx;
  1086. struct dp_vdev_be *be_vdev =
  1087. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1088. struct dp_soc_be *be_soc =
  1089. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1090. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1091. return false;
  1092. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1093. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1094. if (be_soc->mlo_enabled) {
  1095. /* validate chip_id, get a ref, and re-assign soc */
  1096. params->dest_soc =
  1097. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1098. dest_chip_id);
  1099. if (!params->dest_soc)
  1100. return false;
  1101. }
  1102. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(params->dest_soc,
  1103. msdu_metadata->da_idx);
  1104. da_peer = dp_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1105. DP_MOD_ID_RX);
  1106. if (!da_peer)
  1107. return false;
  1108. /* soc unref if needed */
  1109. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1110. /* If the source or destination peer in the isolation
  1111. * list then dont forward instead push to bridge stack.
  1112. */
  1113. if (dp_get_peer_isolation(ta_peer) ||
  1114. dp_get_peer_isolation(da_peer))
  1115. goto rel_da_peer;
  1116. if (da_peer->bss_peer || da_peer == ta_peer)
  1117. goto rel_da_peer;
  1118. /* Same vdev, support Inra-BSS */
  1119. if (da_peer->vdev == ta_peer->vdev) {
  1120. ret = true;
  1121. goto rel_da_peer;
  1122. }
  1123. /* MLO specific Intra-BSS check */
  1124. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1125. /* index of soc in the array */
  1126. soc_idx = dest_chip_id << DP_MLO_DEST_CHIP_ID_SHIFT;
  1127. if (!(be_vdev->partner_vdev_list[soc_idx][0] ==
  1128. params->tx_vdev_id) &&
  1129. !(be_vdev->partner_vdev_list[soc_idx][1] ==
  1130. params->tx_vdev_id)) {
  1131. /*dp_soc_unref_delete(soc);*/
  1132. goto rel_da_peer;
  1133. }
  1134. ret = true;
  1135. }
  1136. rel_da_peer:
  1137. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1138. return ret;
  1139. }
  1140. #else
  1141. static bool
  1142. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1143. struct dp_peer *ta_peer,
  1144. struct hal_rx_msdu_metadata *msdu_metadata,
  1145. struct dp_be_intrabss_params *params)
  1146. {
  1147. uint16_t da_peer_id;
  1148. struct dp_peer *da_peer;
  1149. bool ret = false;
  1150. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1151. return false;
  1152. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1153. params->dest_soc,
  1154. msdu_metadata->da_idx);
  1155. da_peer = dp_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1156. DP_MOD_ID_RX);
  1157. if (!da_peer)
  1158. return false;
  1159. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1160. /* If the source or destination peer in the isolation
  1161. * list then dont forward instead push to bridge stack.
  1162. */
  1163. if (dp_get_peer_isolation(ta_peer) ||
  1164. dp_get_peer_isolation(da_peer))
  1165. goto rel_da_peer;
  1166. if (da_peer->bss_peer || da_peer == ta_peer)
  1167. goto rel_da_peer;
  1168. /* Same vdev, support Inra-BSS */
  1169. if (da_peer->vdev == ta_peer->vdev) {
  1170. ret = true;
  1171. goto rel_da_peer;
  1172. }
  1173. /* MLO specific Intra-BSS check */
  1174. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1175. ret = true;
  1176. goto rel_da_peer;
  1177. }
  1178. rel_da_peer:
  1179. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1180. return ret;
  1181. }
  1182. #endif /* WLAN_MLO_MULTI_CHIP */
  1183. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1184. /*
  1185. * dp_rx_intrabss_fwd_be() - API for intrabss fwd. For EAPOL
  1186. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1187. * @soc: core txrx main context
  1188. * @ta_peer: source peer entry
  1189. * @rx_tlv_hdr: start address of rx tlvs
  1190. * @nbuf: nbuf that has to be intrabss forwarded
  1191. * @msdu_metadata: msdu metadata
  1192. *
  1193. * Return: true if it is forwarded else false
  1194. */
  1195. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_peer *ta_peer,
  1196. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1197. struct hal_rx_msdu_metadata msdu_metadata)
  1198. {
  1199. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1200. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1201. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1202. tid_stats.tid_rx_stats[ring_id][tid];
  1203. bool ret = false;
  1204. struct dp_be_intrabss_params params;
  1205. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1206. * source, then clone the pkt and send the cloned pkt for
  1207. * intra BSS forwarding and original pkt up the network stack
  1208. * Note: how do we handle multicast pkts. do we forward
  1209. * all multicast pkts as is or let a higher layer module
  1210. * like igmpsnoop decide whether to forward or not with
  1211. * Mcast enhancement.
  1212. */
  1213. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1214. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1215. nbuf, tid_stats);
  1216. }
  1217. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1218. nbuf))
  1219. return true;
  1220. params.dest_soc = soc;
  1221. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer,
  1222. &msdu_metadata, &params)) {
  1223. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1224. params.tx_vdev_id,
  1225. rx_tlv_hdr, nbuf, tid_stats);
  1226. }
  1227. return ret;
  1228. }
  1229. #endif