dsi_panel.c 105 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. /**
  15. * topology is currently defined by a set of following 3 values:
  16. * 1. num of layer mixers
  17. * 2. num of compression encoders
  18. * 3. num of interfaces
  19. */
  20. #define TOPOLOGY_SET_LEN 3
  21. #define MAX_TOPOLOGY 5
  22. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  23. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  24. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  25. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  26. #define MAX_PANEL_JITTER 10
  27. #define DEFAULT_PANEL_PREFILL_LINES 25
  28. enum dsi_dsc_ratio_type {
  29. DSC_8BPC_8BPP,
  30. DSC_10BPC_8BPP,
  31. DSC_12BPC_8BPP,
  32. DSC_10BPC_10BPP,
  33. DSC_RATIO_TYPE_MAX
  34. };
  35. static u32 dsi_dsc_rc_buf_thresh[] = {0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54,
  36. 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e};
  37. /*
  38. * DSC 1.1
  39. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  40. */
  41. static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
  42. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
  43. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
  44. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
  45. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  46. };
  47. /*
  48. * DSC 1.1 SCR
  49. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  50. */
  51. static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
  52. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
  53. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
  54. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
  55. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  56. };
  57. /*
  58. * DSC 1.1
  59. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  60. */
  61. static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
  62. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
  63. {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
  64. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
  65. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  66. };
  67. /*
  68. * DSC 1.1 SCR
  69. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  70. */
  71. static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
  72. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
  73. {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
  74. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
  75. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  76. };
  77. /*
  78. * DSC 1.1 and DSC 1.1 SCR
  79. * Rate control - bpg offset values
  80. */
  81. static char dsi_dsc_rc_range_bpg_offset[] = {2, 0, 0, -2, -4, -6, -8, -8,
  82. -8, -10, -10, -12, -12, -12, -12};
  83. int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc, char *buf,
  84. int pps_id)
  85. {
  86. char *bp;
  87. char data;
  88. int i, bpp;
  89. char *dbgbp;
  90. dbgbp = buf;
  91. bp = buf;
  92. /* First 7 bytes are cmd header */
  93. *bp++ = 0x0A;
  94. *bp++ = 1;
  95. *bp++ = 0;
  96. *bp++ = 0;
  97. *bp++ = dsc->pps_delay_ms;
  98. *bp++ = 0;
  99. *bp++ = 128;
  100. *bp++ = (dsc->version & 0xff); /* pps0 */
  101. *bp++ = (pps_id & 0xff); /* pps1 */
  102. bp++; /* pps2, reserved */
  103. data = dsc->line_buf_depth & 0x0f;
  104. data |= ((dsc->bpc & 0xf) << 4);
  105. *bp++ = data; /* pps3 */
  106. bpp = dsc->bpp;
  107. bpp <<= 4; /* 4 fraction bits */
  108. data = (bpp >> 8);
  109. data &= 0x03; /* upper two bits */
  110. data |= ((dsc->block_pred_enable & 0x1) << 5);
  111. data |= ((dsc->convert_rgb & 0x1) << 4);
  112. data |= ((dsc->enable_422 & 0x1) << 3);
  113. data |= ((dsc->vbr_enable & 0x1) << 2);
  114. *bp++ = data; /* pps4 */
  115. *bp++ = (bpp & 0xff); /* pps5 */
  116. *bp++ = ((dsc->pic_height >> 8) & 0xff); /* pps6 */
  117. *bp++ = (dsc->pic_height & 0x0ff); /* pps7 */
  118. *bp++ = ((dsc->pic_width >> 8) & 0xff); /* pps8 */
  119. *bp++ = (dsc->pic_width & 0x0ff); /* pps9 */
  120. *bp++ = ((dsc->slice_height >> 8) & 0xff);/* pps10 */
  121. *bp++ = (dsc->slice_height & 0x0ff); /* pps11 */
  122. *bp++ = ((dsc->slice_width >> 8) & 0xff); /* pps12 */
  123. *bp++ = (dsc->slice_width & 0x0ff); /* pps13 */
  124. *bp++ = ((dsc->chunk_size >> 8) & 0xff);/* pps14 */
  125. *bp++ = (dsc->chunk_size & 0x0ff); /* pps15 */
  126. *bp++ = (dsc->initial_xmit_delay >> 8) & 0x3; /* pps16, bit 0, 1 */
  127. *bp++ = (dsc->initial_xmit_delay & 0xff);/* pps17 */
  128. *bp++ = ((dsc->initial_dec_delay >> 8) & 0xff); /* pps18 */
  129. *bp++ = (dsc->initial_dec_delay & 0xff);/* pps19 */
  130. bp++; /* pps20, reserved */
  131. *bp++ = (dsc->initial_scale_value & 0x3f); /* pps21 */
  132. *bp++ = ((dsc->scale_increment_interval >> 8) & 0xff); /* pps22 */
  133. *bp++ = (dsc->scale_increment_interval & 0xff); /* pps23 */
  134. *bp++ = ((dsc->scale_decrement_interval >> 8) & 0xf); /* pps24 */
  135. *bp++ = (dsc->scale_decrement_interval & 0x0ff);/* pps25 */
  136. bp++; /* pps26, reserved */
  137. *bp++ = (dsc->first_line_bpg_offset & 0x1f);/* pps27 */
  138. *bp++ = ((dsc->nfl_bpg_offset >> 8) & 0xff);/* pps28 */
  139. *bp++ = (dsc->nfl_bpg_offset & 0x0ff); /* pps29 */
  140. *bp++ = ((dsc->slice_bpg_offset >> 8) & 0xff);/* pps30 */
  141. *bp++ = (dsc->slice_bpg_offset & 0x0ff);/* pps31 */
  142. *bp++ = ((dsc->initial_offset >> 8) & 0xff);/* pps32 */
  143. *bp++ = (dsc->initial_offset & 0x0ff); /* pps33 */
  144. *bp++ = ((dsc->final_offset >> 8) & 0xff);/* pps34 */
  145. *bp++ = (dsc->final_offset & 0x0ff); /* pps35 */
  146. *bp++ = (dsc->min_qp_flatness & 0x1f); /* pps36 */
  147. *bp++ = (dsc->max_qp_flatness & 0x1f); /* pps37 */
  148. *bp++ = ((dsc->rc_model_size >> 8) & 0xff);/* pps38 */
  149. *bp++ = (dsc->rc_model_size & 0x0ff); /* pps39 */
  150. *bp++ = (dsc->edge_factor & 0x0f); /* pps40 */
  151. *bp++ = (dsc->quant_incr_limit0 & 0x1f); /* pps41 */
  152. *bp++ = (dsc->quant_incr_limit1 & 0x1f); /* pps42 */
  153. data = ((dsc->tgt_offset_hi & 0xf) << 4);
  154. data |= (dsc->tgt_offset_lo & 0x0f);
  155. *bp++ = data; /* pps43 */
  156. for (i = 0; i < 14; i++)
  157. *bp++ = (dsc->buf_thresh[i] & 0xff); /* pps44 - pps57 */
  158. for (i = 0; i < 15; i++) { /* pps58 - pps87 */
  159. data = (dsc->range_min_qp[i] & 0x1f);
  160. data <<= 3;
  161. data |= ((dsc->range_max_qp[i] >> 2) & 0x07);
  162. *bp++ = data;
  163. data = (dsc->range_max_qp[i] & 0x03);
  164. data <<= 6;
  165. data |= (dsc->range_bpg_offset[i] & 0x3f);
  166. *bp++ = data;
  167. }
  168. return 128;
  169. }
  170. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  171. {
  172. int rc = 0;
  173. int i;
  174. struct regulator *vreg = NULL;
  175. for (i = 0; i < panel->power_info.count; i++) {
  176. vreg = devm_regulator_get(panel->parent,
  177. panel->power_info.vregs[i].vreg_name);
  178. rc = PTR_RET(vreg);
  179. if (rc) {
  180. DSI_ERR("failed to get %s regulator\n",
  181. panel->power_info.vregs[i].vreg_name);
  182. goto error_put;
  183. }
  184. panel->power_info.vregs[i].vreg = vreg;
  185. }
  186. return rc;
  187. error_put:
  188. for (i = i - 1; i >= 0; i--) {
  189. devm_regulator_put(panel->power_info.vregs[i].vreg);
  190. panel->power_info.vregs[i].vreg = NULL;
  191. }
  192. return rc;
  193. }
  194. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  195. {
  196. int rc = 0;
  197. int i;
  198. for (i = panel->power_info.count - 1; i >= 0; i--)
  199. devm_regulator_put(panel->power_info.vregs[i].vreg);
  200. return rc;
  201. }
  202. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  203. {
  204. int rc = 0;
  205. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  206. if (gpio_is_valid(r_config->reset_gpio)) {
  207. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  208. if (rc) {
  209. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  210. goto error;
  211. }
  212. }
  213. if (gpio_is_valid(r_config->disp_en_gpio)) {
  214. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  215. if (rc) {
  216. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  217. goto error_release_reset;
  218. }
  219. }
  220. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  221. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  222. if (rc) {
  223. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  224. goto error_release_disp_en;
  225. }
  226. }
  227. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  228. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  229. if (rc) {
  230. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  231. goto error_release_mode_sel;
  232. }
  233. }
  234. if (gpio_is_valid(panel->panel_test_gpio)) {
  235. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  236. if (rc) {
  237. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  238. rc);
  239. panel->panel_test_gpio = -1;
  240. rc = 0;
  241. }
  242. }
  243. goto error;
  244. error_release_mode_sel:
  245. if (gpio_is_valid(panel->bl_config.en_gpio))
  246. gpio_free(panel->bl_config.en_gpio);
  247. error_release_disp_en:
  248. if (gpio_is_valid(r_config->disp_en_gpio))
  249. gpio_free(r_config->disp_en_gpio);
  250. error_release_reset:
  251. if (gpio_is_valid(r_config->reset_gpio))
  252. gpio_free(r_config->reset_gpio);
  253. error:
  254. return rc;
  255. }
  256. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  257. {
  258. int rc = 0;
  259. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  260. if (gpio_is_valid(r_config->reset_gpio))
  261. gpio_free(r_config->reset_gpio);
  262. if (gpio_is_valid(r_config->disp_en_gpio))
  263. gpio_free(r_config->disp_en_gpio);
  264. if (gpio_is_valid(panel->bl_config.en_gpio))
  265. gpio_free(panel->bl_config.en_gpio);
  266. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  267. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  268. if (gpio_is_valid(panel->panel_test_gpio))
  269. gpio_free(panel->panel_test_gpio);
  270. return rc;
  271. }
  272. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  273. {
  274. struct dsi_panel_reset_config *r_config;
  275. if (!panel) {
  276. DSI_ERR("Invalid panel param\n");
  277. return -EINVAL;
  278. }
  279. r_config = &panel->reset_config;
  280. if (!r_config) {
  281. DSI_ERR("Invalid panel reset configuration\n");
  282. return -EINVAL;
  283. }
  284. if (gpio_is_valid(r_config->reset_gpio)) {
  285. gpio_set_value(r_config->reset_gpio, 0);
  286. DSI_INFO("GPIO pulled low to simulate ESD\n");
  287. return 0;
  288. }
  289. DSI_ERR("failed to pull down gpio\n");
  290. return -EINVAL;
  291. }
  292. static int dsi_panel_reset(struct dsi_panel *panel)
  293. {
  294. int rc = 0;
  295. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  296. int i;
  297. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  298. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  299. if (rc) {
  300. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  301. goto exit;
  302. }
  303. }
  304. if (r_config->count) {
  305. rc = gpio_direction_output(r_config->reset_gpio,
  306. r_config->sequence[0].level);
  307. if (rc) {
  308. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  309. goto exit;
  310. }
  311. }
  312. for (i = 0; i < r_config->count; i++) {
  313. gpio_set_value(r_config->reset_gpio,
  314. r_config->sequence[i].level);
  315. if (r_config->sequence[i].sleep_ms)
  316. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  317. (r_config->sequence[i].sleep_ms * 1000) + 100);
  318. }
  319. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  320. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  321. if (rc)
  322. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  323. }
  324. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  325. bool out = true;
  326. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  327. || (panel->reset_config.mode_sel_state
  328. == MODE_GPIO_LOW))
  329. out = false;
  330. else if ((panel->reset_config.mode_sel_state
  331. == MODE_SEL_SINGLE_PORT) ||
  332. (panel->reset_config.mode_sel_state
  333. == MODE_GPIO_HIGH))
  334. out = true;
  335. rc = gpio_direction_output(
  336. panel->reset_config.lcd_mode_sel_gpio, out);
  337. if (rc)
  338. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  339. }
  340. if (gpio_is_valid(panel->panel_test_gpio)) {
  341. rc = gpio_direction_input(panel->panel_test_gpio);
  342. if (rc)
  343. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  344. rc);
  345. }
  346. exit:
  347. return rc;
  348. }
  349. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  350. {
  351. int rc = 0;
  352. struct pinctrl_state *state;
  353. if (panel->host_config.ext_bridge_mode)
  354. return 0;
  355. if (enable)
  356. state = panel->pinctrl.active;
  357. else
  358. state = panel->pinctrl.suspend;
  359. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  360. if (rc)
  361. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  362. panel->name, rc);
  363. return rc;
  364. }
  365. static int dsi_panel_power_on(struct dsi_panel *panel)
  366. {
  367. int rc = 0;
  368. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  369. if (rc) {
  370. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  371. panel->name, rc);
  372. goto exit;
  373. }
  374. rc = dsi_panel_set_pinctrl_state(panel, true);
  375. if (rc) {
  376. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  377. goto error_disable_vregs;
  378. }
  379. rc = dsi_panel_reset(panel);
  380. if (rc) {
  381. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  382. goto error_disable_gpio;
  383. }
  384. goto exit;
  385. error_disable_gpio:
  386. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  387. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  388. if (gpio_is_valid(panel->bl_config.en_gpio))
  389. gpio_set_value(panel->bl_config.en_gpio, 0);
  390. (void)dsi_panel_set_pinctrl_state(panel, false);
  391. error_disable_vregs:
  392. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  393. exit:
  394. return rc;
  395. }
  396. static int dsi_panel_power_off(struct dsi_panel *panel)
  397. {
  398. int rc = 0;
  399. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  400. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  401. if (gpio_is_valid(panel->reset_config.reset_gpio))
  402. gpio_set_value(panel->reset_config.reset_gpio, 0);
  403. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  404. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  405. rc = dsi_panel_set_pinctrl_state(panel, false);
  406. if (rc) {
  407. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  408. rc);
  409. }
  410. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  411. if (rc)
  412. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  413. panel->name, rc);
  414. return rc;
  415. }
  416. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  417. enum dsi_cmd_set_type type)
  418. {
  419. int rc = 0, i = 0;
  420. ssize_t len;
  421. struct dsi_cmd_desc *cmds;
  422. u32 count;
  423. enum dsi_cmd_set_state state;
  424. struct dsi_display_mode *mode;
  425. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  426. if (!panel || !panel->cur_mode)
  427. return -EINVAL;
  428. mode = panel->cur_mode;
  429. cmds = mode->priv_info->cmd_sets[type].cmds;
  430. count = mode->priv_info->cmd_sets[type].count;
  431. state = mode->priv_info->cmd_sets[type].state;
  432. if (count == 0) {
  433. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  434. panel->name, type);
  435. goto error;
  436. }
  437. for (i = 0; i < count; i++) {
  438. if (state == DSI_CMD_SET_STATE_LP)
  439. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  440. if (cmds->last_command)
  441. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  442. len = ops->transfer(panel->host, &cmds->msg);
  443. if (len < 0) {
  444. rc = len;
  445. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  446. goto error;
  447. }
  448. if (cmds->post_wait_ms)
  449. usleep_range(cmds->post_wait_ms*1000,
  450. ((cmds->post_wait_ms*1000)+10));
  451. cmds++;
  452. }
  453. error:
  454. return rc;
  455. }
  456. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  457. {
  458. int rc = 0;
  459. if (panel->host_config.ext_bridge_mode)
  460. return 0;
  461. devm_pinctrl_put(panel->pinctrl.pinctrl);
  462. return rc;
  463. }
  464. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  465. {
  466. int rc = 0;
  467. if (panel->host_config.ext_bridge_mode)
  468. return 0;
  469. /* TODO: pinctrl is defined in dsi dt node */
  470. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  471. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  472. rc = PTR_ERR(panel->pinctrl.pinctrl);
  473. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  474. goto error;
  475. }
  476. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  477. "panel_active");
  478. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  479. rc = PTR_ERR(panel->pinctrl.active);
  480. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  481. goto error;
  482. }
  483. panel->pinctrl.suspend =
  484. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  485. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  486. rc = PTR_ERR(panel->pinctrl.suspend);
  487. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  488. goto error;
  489. }
  490. error:
  491. return rc;
  492. }
  493. static int dsi_panel_wled_register(struct dsi_panel *panel,
  494. struct dsi_backlight_config *bl)
  495. {
  496. struct backlight_device *bd;
  497. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  498. if (!bd) {
  499. DSI_ERR("[%s] fail raw backlight register\n", panel->name);
  500. return -EPROBE_DEFER;
  501. }
  502. bl->raw_bd = bd;
  503. return 0;
  504. }
  505. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  506. u32 bl_lvl)
  507. {
  508. int rc = 0;
  509. struct mipi_dsi_device *dsi;
  510. if (!panel || (bl_lvl > 0xffff)) {
  511. DSI_ERR("invalid params\n");
  512. return -EINVAL;
  513. }
  514. dsi = &panel->mipi_device;
  515. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  516. if (rc < 0)
  517. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  518. return rc;
  519. }
  520. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  521. u32 bl_lvl)
  522. {
  523. int rc = 0;
  524. u32 duty = 0;
  525. u32 period_ns = 0;
  526. struct dsi_backlight_config *bl;
  527. if (!panel) {
  528. DSI_ERR("Invalid Params\n");
  529. return -EINVAL;
  530. }
  531. bl = &panel->bl_config;
  532. if (!bl->pwm_bl) {
  533. DSI_ERR("pwm device not found\n");
  534. return -EINVAL;
  535. }
  536. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  537. duty = bl_lvl * period_ns;
  538. duty /= bl->bl_max_level;
  539. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  540. if (rc) {
  541. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  542. rc);
  543. goto error;
  544. }
  545. if (bl_lvl == 0 && bl->pwm_enabled) {
  546. pwm_disable(bl->pwm_bl);
  547. bl->pwm_enabled = false;
  548. return 0;
  549. }
  550. if (!bl->pwm_enabled) {
  551. rc = pwm_enable(bl->pwm_bl);
  552. if (rc) {
  553. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  554. rc);
  555. goto error;
  556. }
  557. bl->pwm_enabled = true;
  558. }
  559. error:
  560. return rc;
  561. }
  562. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  563. {
  564. int rc = 0;
  565. struct dsi_backlight_config *bl = &panel->bl_config;
  566. if (panel->host_config.ext_bridge_mode)
  567. return 0;
  568. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  569. switch (bl->type) {
  570. case DSI_BACKLIGHT_WLED:
  571. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  572. break;
  573. case DSI_BACKLIGHT_DCS:
  574. rc = dsi_panel_update_backlight(panel, bl_lvl);
  575. break;
  576. case DSI_BACKLIGHT_EXTERNAL:
  577. break;
  578. case DSI_BACKLIGHT_PWM:
  579. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  580. break;
  581. default:
  582. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  583. rc = -ENOTSUPP;
  584. }
  585. return rc;
  586. }
  587. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  588. {
  589. u32 cur_bl_level;
  590. struct backlight_device *bd = bl->raw_bd;
  591. /* default the brightness level to 50% */
  592. cur_bl_level = bl->bl_max_level >> 1;
  593. switch (bl->type) {
  594. case DSI_BACKLIGHT_WLED:
  595. /* Try to query the backlight level from the backlight device */
  596. if (bd->ops && bd->ops->get_brightness)
  597. cur_bl_level = bd->ops->get_brightness(bd);
  598. break;
  599. case DSI_BACKLIGHT_DCS:
  600. case DSI_BACKLIGHT_EXTERNAL:
  601. case DSI_BACKLIGHT_PWM:
  602. default:
  603. /*
  604. * Ideally, we should read the backlight level from the
  605. * panel. For now, just set it default value.
  606. */
  607. break;
  608. }
  609. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  610. return cur_bl_level;
  611. }
  612. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  613. {
  614. struct dsi_backlight_config *bl = &panel->bl_config;
  615. bl->bl_level = dsi_panel_get_brightness(bl);
  616. }
  617. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  618. {
  619. int rc = 0;
  620. struct dsi_backlight_config *bl = &panel->bl_config;
  621. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  622. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  623. rc = PTR_ERR(bl->pwm_bl);
  624. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  625. rc);
  626. return rc;
  627. }
  628. return 0;
  629. }
  630. static int dsi_panel_bl_register(struct dsi_panel *panel)
  631. {
  632. int rc = 0;
  633. struct dsi_backlight_config *bl = &panel->bl_config;
  634. if (panel->host_config.ext_bridge_mode)
  635. return 0;
  636. switch (bl->type) {
  637. case DSI_BACKLIGHT_WLED:
  638. rc = dsi_panel_wled_register(panel, bl);
  639. break;
  640. case DSI_BACKLIGHT_DCS:
  641. break;
  642. case DSI_BACKLIGHT_EXTERNAL:
  643. break;
  644. case DSI_BACKLIGHT_PWM:
  645. rc = dsi_panel_pwm_register(panel);
  646. break;
  647. default:
  648. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  649. rc = -ENOTSUPP;
  650. goto error;
  651. }
  652. error:
  653. return rc;
  654. }
  655. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  656. {
  657. struct dsi_backlight_config *bl = &panel->bl_config;
  658. devm_pwm_put(panel->parent, bl->pwm_bl);
  659. }
  660. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  661. {
  662. int rc = 0;
  663. struct dsi_backlight_config *bl = &panel->bl_config;
  664. if (panel->host_config.ext_bridge_mode)
  665. return 0;
  666. switch (bl->type) {
  667. case DSI_BACKLIGHT_WLED:
  668. break;
  669. case DSI_BACKLIGHT_DCS:
  670. break;
  671. case DSI_BACKLIGHT_EXTERNAL:
  672. break;
  673. case DSI_BACKLIGHT_PWM:
  674. dsi_panel_pwm_unregister(panel);
  675. break;
  676. default:
  677. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  678. rc = -ENOTSUPP;
  679. goto error;
  680. }
  681. error:
  682. return rc;
  683. }
  684. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  685. struct dsi_parser_utils *utils)
  686. {
  687. int rc = 0;
  688. u64 tmp64 = 0;
  689. struct dsi_display_mode *display_mode;
  690. struct dsi_display_mode_priv_info *priv_info;
  691. display_mode = container_of(mode, struct dsi_display_mode, timing);
  692. priv_info = display_mode->priv_info;
  693. rc = utils->read_u64(utils->data,
  694. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  695. if (rc == -EOVERFLOW) {
  696. tmp64 = 0;
  697. rc = utils->read_u32(utils->data,
  698. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  699. }
  700. mode->clk_rate_hz = !rc ? tmp64 : 0;
  701. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  702. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  703. &mode->mdp_transfer_time_us);
  704. if (!rc)
  705. display_mode->priv_info->mdp_transfer_time_us =
  706. mode->mdp_transfer_time_us;
  707. else
  708. display_mode->priv_info->mdp_transfer_time_us = 0;
  709. rc = utils->read_u32(utils->data,
  710. "qcom,mdss-dsi-panel-framerate",
  711. &mode->refresh_rate);
  712. if (rc) {
  713. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  714. rc);
  715. goto error;
  716. }
  717. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  718. &mode->h_active);
  719. if (rc) {
  720. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  721. rc);
  722. goto error;
  723. }
  724. rc = utils->read_u32(utils->data,
  725. "qcom,mdss-dsi-h-front-porch",
  726. &mode->h_front_porch);
  727. if (rc) {
  728. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  729. rc);
  730. goto error;
  731. }
  732. rc = utils->read_u32(utils->data,
  733. "qcom,mdss-dsi-h-back-porch",
  734. &mode->h_back_porch);
  735. if (rc) {
  736. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  737. rc);
  738. goto error;
  739. }
  740. rc = utils->read_u32(utils->data,
  741. "qcom,mdss-dsi-h-pulse-width",
  742. &mode->h_sync_width);
  743. if (rc) {
  744. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  745. rc);
  746. goto error;
  747. }
  748. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  749. &mode->h_skew);
  750. if (rc)
  751. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  752. rc);
  753. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  754. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  755. mode->h_sync_width);
  756. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  757. &mode->v_active);
  758. if (rc) {
  759. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  760. rc);
  761. goto error;
  762. }
  763. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  764. &mode->v_back_porch);
  765. if (rc) {
  766. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  767. rc);
  768. goto error;
  769. }
  770. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  771. &mode->v_front_porch);
  772. if (rc) {
  773. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  774. rc);
  775. goto error;
  776. }
  777. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  778. &mode->v_sync_width);
  779. if (rc) {
  780. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  781. rc);
  782. goto error;
  783. }
  784. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  785. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  786. mode->v_sync_width);
  787. error:
  788. return rc;
  789. }
  790. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  791. struct dsi_parser_utils *utils,
  792. const char *name)
  793. {
  794. int rc = 0;
  795. u32 bpp = 0;
  796. enum dsi_pixel_format fmt;
  797. const char *packing;
  798. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  799. if (rc) {
  800. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  801. name, rc);
  802. return rc;
  803. }
  804. host->bpp = bpp;
  805. switch (bpp) {
  806. case 3:
  807. fmt = DSI_PIXEL_FORMAT_RGB111;
  808. break;
  809. case 8:
  810. fmt = DSI_PIXEL_FORMAT_RGB332;
  811. break;
  812. case 12:
  813. fmt = DSI_PIXEL_FORMAT_RGB444;
  814. break;
  815. case 16:
  816. fmt = DSI_PIXEL_FORMAT_RGB565;
  817. break;
  818. case 18:
  819. fmt = DSI_PIXEL_FORMAT_RGB666;
  820. break;
  821. case 24:
  822. default:
  823. fmt = DSI_PIXEL_FORMAT_RGB888;
  824. break;
  825. }
  826. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  827. packing = utils->get_property(utils->data,
  828. "qcom,mdss-dsi-pixel-packing",
  829. NULL);
  830. if (packing && !strcmp(packing, "loose"))
  831. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  832. }
  833. host->dst_format = fmt;
  834. return rc;
  835. }
  836. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  837. struct dsi_parser_utils *utils,
  838. const char *name)
  839. {
  840. int rc = 0;
  841. bool lane_enabled;
  842. u32 num_of_lanes = 0;
  843. lane_enabled = utils->read_bool(utils->data,
  844. "qcom,mdss-dsi-lane-0-state");
  845. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  846. lane_enabled = utils->read_bool(utils->data,
  847. "qcom,mdss-dsi-lane-1-state");
  848. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  849. lane_enabled = utils->read_bool(utils->data,
  850. "qcom,mdss-dsi-lane-2-state");
  851. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  852. lane_enabled = utils->read_bool(utils->data,
  853. "qcom,mdss-dsi-lane-3-state");
  854. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  855. if (host->data_lanes & DSI_DATA_LANE_0)
  856. num_of_lanes++;
  857. if (host->data_lanes & DSI_DATA_LANE_1)
  858. num_of_lanes++;
  859. if (host->data_lanes & DSI_DATA_LANE_2)
  860. num_of_lanes++;
  861. if (host->data_lanes & DSI_DATA_LANE_3)
  862. num_of_lanes++;
  863. host->num_data_lanes = num_of_lanes;
  864. if (host->data_lanes == 0) {
  865. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  866. rc = -EINVAL;
  867. }
  868. return rc;
  869. }
  870. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  871. struct dsi_parser_utils *utils,
  872. const char *name)
  873. {
  874. int rc = 0;
  875. const char *swap_mode;
  876. swap_mode = utils->get_property(utils->data,
  877. "qcom,mdss-dsi-color-order", NULL);
  878. if (swap_mode) {
  879. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  880. host->swap_mode = DSI_COLOR_SWAP_RGB;
  881. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  882. host->swap_mode = DSI_COLOR_SWAP_RBG;
  883. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  884. host->swap_mode = DSI_COLOR_SWAP_BRG;
  885. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  886. host->swap_mode = DSI_COLOR_SWAP_GRB;
  887. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  888. host->swap_mode = DSI_COLOR_SWAP_GBR;
  889. } else {
  890. DSI_ERR("[%s] Unrecognized color order-%s\n",
  891. name, swap_mode);
  892. rc = -EINVAL;
  893. }
  894. } else {
  895. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  896. host->swap_mode = DSI_COLOR_SWAP_RGB;
  897. }
  898. /* bit swap on color channel is not defined in dt */
  899. host->bit_swap_red = false;
  900. host->bit_swap_green = false;
  901. host->bit_swap_blue = false;
  902. return rc;
  903. }
  904. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  905. struct dsi_parser_utils *utils,
  906. const char *name)
  907. {
  908. const char *trig;
  909. int rc = 0;
  910. trig = utils->get_property(utils->data,
  911. "qcom,mdss-dsi-mdp-trigger", NULL);
  912. if (trig) {
  913. if (!strcmp(trig, "none")) {
  914. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  915. } else if (!strcmp(trig, "trigger_te")) {
  916. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  917. } else if (!strcmp(trig, "trigger_sw")) {
  918. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  919. } else if (!strcmp(trig, "trigger_sw_te")) {
  920. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  921. } else {
  922. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  923. name, trig);
  924. rc = -EINVAL;
  925. }
  926. } else {
  927. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  928. name);
  929. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  930. }
  931. trig = utils->get_property(utils->data,
  932. "qcom,mdss-dsi-dma-trigger", NULL);
  933. if (trig) {
  934. if (!strcmp(trig, "none")) {
  935. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  936. } else if (!strcmp(trig, "trigger_te")) {
  937. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  938. } else if (!strcmp(trig, "trigger_sw")) {
  939. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  940. } else if (!strcmp(trig, "trigger_sw_seof")) {
  941. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  942. } else if (!strcmp(trig, "trigger_sw_te")) {
  943. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  944. } else {
  945. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  946. name, trig);
  947. rc = -EINVAL;
  948. }
  949. } else {
  950. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  951. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  952. }
  953. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  954. &host->te_mode);
  955. if (rc) {
  956. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  957. host->te_mode = 1;
  958. rc = 0;
  959. }
  960. return rc;
  961. }
  962. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  963. struct dsi_parser_utils *utils,
  964. const char *name)
  965. {
  966. u32 val = 0;
  967. int rc = 0;
  968. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  969. if (!rc) {
  970. host->t_clk_post = val;
  971. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  972. }
  973. val = 0;
  974. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  975. if (!rc) {
  976. host->t_clk_pre = val;
  977. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  978. }
  979. host->ignore_rx_eot = utils->read_bool(utils->data,
  980. "qcom,mdss-dsi-rx-eot-ignore");
  981. host->append_tx_eot = utils->read_bool(utils->data,
  982. "qcom,mdss-dsi-tx-eot-append");
  983. host->ext_bridge_mode = utils->read_bool(utils->data,
  984. "qcom,mdss-dsi-ext-bridge-mode");
  985. host->force_hs_clk_lane = utils->read_bool(utils->data,
  986. "qcom,mdss-dsi-force-clock-lane-hs");
  987. return 0;
  988. }
  989. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  990. struct dsi_parser_utils *utils,
  991. const char *name)
  992. {
  993. int rc = 0;
  994. u32 val = 0;
  995. bool supported = false;
  996. struct dsi_split_link_config *split_link = &host->split_link;
  997. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  998. if (!supported) {
  999. DSI_DEBUG("[%s] Split link is not supported\n", name);
  1000. split_link->split_link_enabled = false;
  1001. return;
  1002. }
  1003. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1004. if (rc || val < 1) {
  1005. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  1006. split_link->num_sublinks = 2;
  1007. } else {
  1008. split_link->num_sublinks = val;
  1009. }
  1010. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1011. if (rc || val < 1) {
  1012. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1013. split_link->lanes_per_sublink = 2;
  1014. } else {
  1015. split_link->lanes_per_sublink = val;
  1016. }
  1017. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1018. split_link->num_sublinks, split_link->lanes_per_sublink);
  1019. split_link->split_link_enabled = true;
  1020. }
  1021. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1022. {
  1023. int rc = 0;
  1024. struct dsi_parser_utils *utils = &panel->utils;
  1025. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1026. panel->name);
  1027. if (rc) {
  1028. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1029. panel->name, rc);
  1030. goto error;
  1031. }
  1032. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1033. panel->name);
  1034. if (rc) {
  1035. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1036. panel->name, rc);
  1037. goto error;
  1038. }
  1039. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1040. panel->name);
  1041. if (rc) {
  1042. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1043. panel->name, rc);
  1044. goto error;
  1045. }
  1046. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1047. panel->name);
  1048. if (rc) {
  1049. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1050. panel->name, rc);
  1051. goto error;
  1052. }
  1053. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1054. panel->name);
  1055. if (rc) {
  1056. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1057. panel->name, rc);
  1058. goto error;
  1059. }
  1060. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1061. panel->name);
  1062. error:
  1063. return rc;
  1064. }
  1065. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1066. struct device_node *of_node)
  1067. {
  1068. int rc = 0;
  1069. u32 val = 0;
  1070. rc = of_property_read_u32(of_node,
  1071. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1072. &val);
  1073. if (rc)
  1074. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1075. panel->name, rc);
  1076. panel->qsync_min_fps = val;
  1077. return rc;
  1078. }
  1079. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1080. {
  1081. int rc = 0;
  1082. bool supported = false;
  1083. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1084. struct dsi_parser_utils *utils = &panel->utils;
  1085. const char *name = panel->name;
  1086. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1087. if (!supported) {
  1088. dyn_clk_caps->dyn_clk_support = false;
  1089. return rc;
  1090. }
  1091. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1092. "qcom,dsi-dyn-clk-list");
  1093. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1094. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1095. return -EINVAL;
  1096. }
  1097. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1098. sizeof(u32), GFP_KERNEL);
  1099. if (!dyn_clk_caps->bit_clk_list)
  1100. return -ENOMEM;
  1101. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1102. dyn_clk_caps->bit_clk_list,
  1103. dyn_clk_caps->bit_clk_list_len);
  1104. if (rc) {
  1105. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1106. return -EINVAL;
  1107. }
  1108. dyn_clk_caps->dyn_clk_support = true;
  1109. return 0;
  1110. }
  1111. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1112. {
  1113. int rc = 0;
  1114. bool supported = false;
  1115. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1116. struct dsi_parser_utils *utils = &panel->utils;
  1117. const char *name = panel->name;
  1118. const char *type;
  1119. u32 i;
  1120. supported = utils->read_bool(utils->data,
  1121. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1122. if (!supported) {
  1123. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1124. dfps_caps->dfps_support = false;
  1125. return rc;
  1126. }
  1127. type = utils->get_property(utils->data,
  1128. "qcom,mdss-dsi-pan-fps-update", NULL);
  1129. if (!type) {
  1130. DSI_ERR("[%s] dfps type not defined\n", name);
  1131. rc = -EINVAL;
  1132. goto error;
  1133. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1134. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1135. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1136. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1137. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1138. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1139. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1140. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1141. } else {
  1142. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1143. rc = -EINVAL;
  1144. goto error;
  1145. }
  1146. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1147. "qcom,dsi-supported-dfps-list");
  1148. if (dfps_caps->dfps_list_len < 1) {
  1149. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1150. rc = -EINVAL;
  1151. goto error;
  1152. }
  1153. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1154. GFP_KERNEL);
  1155. if (!dfps_caps->dfps_list) {
  1156. rc = -ENOMEM;
  1157. goto error;
  1158. }
  1159. rc = utils->read_u32_array(utils->data,
  1160. "qcom,dsi-supported-dfps-list",
  1161. dfps_caps->dfps_list,
  1162. dfps_caps->dfps_list_len);
  1163. if (rc) {
  1164. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1165. rc = -EINVAL;
  1166. goto error;
  1167. }
  1168. dfps_caps->dfps_support = true;
  1169. /* calculate max and min fps */
  1170. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1171. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1172. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1173. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1174. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1175. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1176. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1177. }
  1178. error:
  1179. return rc;
  1180. }
  1181. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1182. struct dsi_parser_utils *utils,
  1183. const char *name)
  1184. {
  1185. int rc = 0;
  1186. const char *traffic_mode;
  1187. u32 vc_id = 0;
  1188. u32 val = 0;
  1189. u32 line_no = 0;
  1190. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1191. if (rc) {
  1192. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1193. cfg->pulse_mode_hsa_he = false;
  1194. } else if (val == 1) {
  1195. cfg->pulse_mode_hsa_he = true;
  1196. } else if (val == 0) {
  1197. cfg->pulse_mode_hsa_he = false;
  1198. } else {
  1199. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1200. name);
  1201. rc = -EINVAL;
  1202. goto error;
  1203. }
  1204. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1205. "qcom,mdss-dsi-hfp-power-mode");
  1206. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1207. "qcom,mdss-dsi-hbp-power-mode");
  1208. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1209. "qcom,mdss-dsi-hsa-power-mode");
  1210. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1211. "qcom,mdss-dsi-last-line-interleave");
  1212. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1213. "qcom,mdss-dsi-bllp-eof-power-mode");
  1214. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1215. "qcom,mdss-dsi-bllp-power-mode");
  1216. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1217. "qcom,mdss-dsi-force-clock-lane-hs");
  1218. traffic_mode = utils->get_property(utils->data,
  1219. "qcom,mdss-dsi-traffic-mode",
  1220. NULL);
  1221. if (!traffic_mode) {
  1222. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1223. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1224. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1225. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1226. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1227. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1228. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1229. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1230. } else {
  1231. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1232. traffic_mode);
  1233. rc = -EINVAL;
  1234. goto error;
  1235. }
  1236. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1237. &vc_id);
  1238. if (rc) {
  1239. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1240. cfg->vc_id = 0;
  1241. } else {
  1242. cfg->vc_id = vc_id;
  1243. }
  1244. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1245. &line_no);
  1246. if (rc) {
  1247. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1248. cfg->dma_sched_line = 0x1;
  1249. /* do not fail since we have default value */
  1250. rc = 0;
  1251. } else {
  1252. cfg->dma_sched_line = line_no;
  1253. }
  1254. error:
  1255. return rc;
  1256. }
  1257. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1258. struct dsi_parser_utils *utils,
  1259. const char *name)
  1260. {
  1261. u32 val = 0;
  1262. int rc = 0;
  1263. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1264. if (rc) {
  1265. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1266. cfg->wr_mem_start = 0x2C;
  1267. } else {
  1268. cfg->wr_mem_start = val;
  1269. }
  1270. val = 0;
  1271. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1272. &val);
  1273. if (rc) {
  1274. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1275. cfg->wr_mem_continue = 0x3C;
  1276. } else {
  1277. cfg->wr_mem_continue = val;
  1278. }
  1279. /* TODO: fix following */
  1280. cfg->max_cmd_packets_interleave = 0;
  1281. val = 0;
  1282. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1283. &val);
  1284. if (rc) {
  1285. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1286. cfg->insert_dcs_command = true;
  1287. } else if (val == 1) {
  1288. cfg->insert_dcs_command = true;
  1289. } else if (val == 0) {
  1290. cfg->insert_dcs_command = false;
  1291. } else {
  1292. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1293. name);
  1294. rc = -EINVAL;
  1295. goto error;
  1296. }
  1297. error:
  1298. return rc;
  1299. }
  1300. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1301. {
  1302. int rc = 0;
  1303. struct dsi_parser_utils *utils = &panel->utils;
  1304. bool panel_mode_switch_enabled;
  1305. enum dsi_op_mode panel_mode;
  1306. const char *mode;
  1307. mode = utils->get_property(utils->data,
  1308. "qcom,mdss-dsi-panel-type", NULL);
  1309. if (!mode) {
  1310. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1311. panel_mode = DSI_OP_VIDEO_MODE;
  1312. } else if (!strcmp(mode, "dsi_video_mode")) {
  1313. panel_mode = DSI_OP_VIDEO_MODE;
  1314. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1315. panel_mode = DSI_OP_CMD_MODE;
  1316. } else {
  1317. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1318. rc = -EINVAL;
  1319. goto error;
  1320. }
  1321. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1322. "qcom,mdss-dsi-panel-mode-switch");
  1323. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1324. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1325. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1326. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1327. utils,
  1328. panel->name);
  1329. if (rc) {
  1330. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1331. panel->name, rc);
  1332. goto error;
  1333. }
  1334. }
  1335. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1336. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1337. utils,
  1338. panel->name);
  1339. if (rc) {
  1340. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1341. panel->name, rc);
  1342. goto error;
  1343. }
  1344. }
  1345. panel->panel_mode = panel_mode;
  1346. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1347. error:
  1348. return rc;
  1349. }
  1350. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1351. {
  1352. int rc = 0;
  1353. u32 val = 0;
  1354. const char *str;
  1355. struct dsi_panel_phy_props *props = &panel->phy_props;
  1356. struct dsi_parser_utils *utils = &panel->utils;
  1357. const char *name = panel->name;
  1358. rc = utils->read_u32(utils->data,
  1359. "qcom,mdss-pan-physical-width-dimension", &val);
  1360. if (rc) {
  1361. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1362. props->panel_width_mm = 0;
  1363. rc = 0;
  1364. } else {
  1365. props->panel_width_mm = val;
  1366. }
  1367. rc = utils->read_u32(utils->data,
  1368. "qcom,mdss-pan-physical-height-dimension",
  1369. &val);
  1370. if (rc) {
  1371. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1372. props->panel_height_mm = 0;
  1373. rc = 0;
  1374. } else {
  1375. props->panel_height_mm = val;
  1376. }
  1377. str = utils->get_property(utils->data,
  1378. "qcom,mdss-dsi-panel-orientation", NULL);
  1379. if (!str) {
  1380. props->rotation = DSI_PANEL_ROTATE_NONE;
  1381. } else if (!strcmp(str, "180")) {
  1382. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1383. } else if (!strcmp(str, "hflip")) {
  1384. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1385. } else if (!strcmp(str, "vflip")) {
  1386. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1387. } else {
  1388. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1389. rc = -EINVAL;
  1390. goto error;
  1391. }
  1392. error:
  1393. return rc;
  1394. }
  1395. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1396. "qcom,mdss-dsi-pre-on-command",
  1397. "qcom,mdss-dsi-on-command",
  1398. "qcom,mdss-dsi-post-panel-on-command",
  1399. "qcom,mdss-dsi-pre-off-command",
  1400. "qcom,mdss-dsi-off-command",
  1401. "qcom,mdss-dsi-post-off-command",
  1402. "qcom,mdss-dsi-pre-res-switch",
  1403. "qcom,mdss-dsi-res-switch",
  1404. "qcom,mdss-dsi-post-res-switch",
  1405. "qcom,cmd-to-video-mode-switch-commands",
  1406. "qcom,cmd-to-video-mode-post-switch-commands",
  1407. "qcom,video-to-cmd-mode-switch-commands",
  1408. "qcom,video-to-cmd-mode-post-switch-commands",
  1409. "qcom,mdss-dsi-panel-status-command",
  1410. "qcom,mdss-dsi-lp1-command",
  1411. "qcom,mdss-dsi-lp2-command",
  1412. "qcom,mdss-dsi-nolp-command",
  1413. "PPS not parsed from DTSI, generated dynamically",
  1414. "ROI not parsed from DTSI, generated dynamically",
  1415. "qcom,mdss-dsi-timing-switch-command",
  1416. "qcom,mdss-dsi-post-mode-switch-on-command",
  1417. "qcom,mdss-dsi-qsync-on-commands",
  1418. "qcom,mdss-dsi-qsync-off-commands",
  1419. };
  1420. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1421. "qcom,mdss-dsi-pre-on-command-state",
  1422. "qcom,mdss-dsi-on-command-state",
  1423. "qcom,mdss-dsi-post-on-command-state",
  1424. "qcom,mdss-dsi-pre-off-command-state",
  1425. "qcom,mdss-dsi-off-command-state",
  1426. "qcom,mdss-dsi-post-off-command-state",
  1427. "qcom,mdss-dsi-pre-res-switch-state",
  1428. "qcom,mdss-dsi-res-switch-state",
  1429. "qcom,mdss-dsi-post-res-switch-state",
  1430. "qcom,cmd-to-video-mode-switch-commands-state",
  1431. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1432. "qcom,video-to-cmd-mode-switch-commands-state",
  1433. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1434. "qcom,mdss-dsi-panel-status-command-state",
  1435. "qcom,mdss-dsi-lp1-command-state",
  1436. "qcom,mdss-dsi-lp2-command-state",
  1437. "qcom,mdss-dsi-nolp-command-state",
  1438. "PPS not parsed from DTSI, generated dynamically",
  1439. "ROI not parsed from DTSI, generated dynamically",
  1440. "qcom,mdss-dsi-timing-switch-command-state",
  1441. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1442. "qcom,mdss-dsi-qsync-on-commands-state",
  1443. "qcom,mdss-dsi-qsync-off-commands-state",
  1444. };
  1445. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1446. {
  1447. const u32 cmd_set_min_size = 7;
  1448. u32 count = 0;
  1449. u32 packet_length;
  1450. u32 tmp;
  1451. while (length >= cmd_set_min_size) {
  1452. packet_length = cmd_set_min_size;
  1453. tmp = ((data[5] << 8) | (data[6]));
  1454. packet_length += tmp;
  1455. if (packet_length > length) {
  1456. DSI_ERR("format error\n");
  1457. return -EINVAL;
  1458. }
  1459. length -= packet_length;
  1460. data += packet_length;
  1461. count++;
  1462. }
  1463. *cnt = count;
  1464. return 0;
  1465. }
  1466. static int dsi_panel_create_cmd_packets(const char *data,
  1467. u32 length,
  1468. u32 count,
  1469. struct dsi_cmd_desc *cmd)
  1470. {
  1471. int rc = 0;
  1472. int i, j;
  1473. u8 *payload;
  1474. for (i = 0; i < count; i++) {
  1475. u32 size;
  1476. cmd[i].msg.type = data[0];
  1477. cmd[i].last_command = (data[1] == 1);
  1478. cmd[i].msg.channel = data[2];
  1479. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1480. cmd[i].msg.ctrl = 0;
  1481. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1482. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1483. size = cmd[i].msg.tx_len * sizeof(u8);
  1484. payload = kzalloc(size, GFP_KERNEL);
  1485. if (!payload) {
  1486. rc = -ENOMEM;
  1487. goto error_free_payloads;
  1488. }
  1489. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1490. payload[j] = data[7 + j];
  1491. cmd[i].msg.tx_buf = payload;
  1492. data += (7 + cmd[i].msg.tx_len);
  1493. }
  1494. return rc;
  1495. error_free_payloads:
  1496. for (i = i - 1; i >= 0; i--) {
  1497. cmd--;
  1498. kfree(cmd->msg.tx_buf);
  1499. }
  1500. return rc;
  1501. }
  1502. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1503. {
  1504. u32 i = 0;
  1505. struct dsi_cmd_desc *cmd;
  1506. for (i = 0; i < set->count; i++) {
  1507. cmd = &set->cmds[i];
  1508. kfree(cmd->msg.tx_buf);
  1509. }
  1510. }
  1511. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1512. {
  1513. kfree(set->cmds);
  1514. }
  1515. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1516. u32 packet_count)
  1517. {
  1518. u32 size;
  1519. size = packet_count * sizeof(*cmd->cmds);
  1520. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1521. if (!cmd->cmds)
  1522. return -ENOMEM;
  1523. cmd->count = packet_count;
  1524. return 0;
  1525. }
  1526. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1527. enum dsi_cmd_set_type type,
  1528. struct dsi_parser_utils *utils)
  1529. {
  1530. int rc = 0;
  1531. u32 length = 0;
  1532. const char *data;
  1533. const char *state;
  1534. u32 packet_count = 0;
  1535. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1536. &length);
  1537. if (!data) {
  1538. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1539. rc = -ENOTSUPP;
  1540. goto error;
  1541. }
  1542. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1543. cmd_set_prop_map[type], length);
  1544. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1545. 8, 1, data, length, false);
  1546. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1547. if (rc) {
  1548. DSI_ERR("commands failed, rc=%d\n", rc);
  1549. goto error;
  1550. }
  1551. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1552. packet_count, length);
  1553. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1554. if (rc) {
  1555. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1556. goto error;
  1557. }
  1558. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1559. cmd->cmds);
  1560. if (rc) {
  1561. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1562. goto error_free_mem;
  1563. }
  1564. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1565. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1566. cmd->state = DSI_CMD_SET_STATE_LP;
  1567. } else if (!strcmp(state, "dsi_hs_mode")) {
  1568. cmd->state = DSI_CMD_SET_STATE_HS;
  1569. } else {
  1570. DSI_ERR("[%s] command state unrecognized-%s\n",
  1571. cmd_set_state_map[type], state);
  1572. goto error_free_mem;
  1573. }
  1574. return rc;
  1575. error_free_mem:
  1576. kfree(cmd->cmds);
  1577. cmd->cmds = NULL;
  1578. error:
  1579. return rc;
  1580. }
  1581. static int dsi_panel_parse_cmd_sets(
  1582. struct dsi_display_mode_priv_info *priv_info,
  1583. struct dsi_parser_utils *utils)
  1584. {
  1585. int rc = 0;
  1586. struct dsi_panel_cmd_set *set;
  1587. u32 i;
  1588. if (!priv_info) {
  1589. DSI_ERR("invalid mode priv info\n");
  1590. return -EINVAL;
  1591. }
  1592. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1593. set = &priv_info->cmd_sets[i];
  1594. set->type = i;
  1595. set->count = 0;
  1596. if (i == DSI_CMD_SET_PPS) {
  1597. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1598. if (rc)
  1599. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1600. i, rc);
  1601. set->state = DSI_CMD_SET_STATE_LP;
  1602. } else {
  1603. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1604. if (rc)
  1605. DSI_DEBUG("failed to parse set %d\n", i);
  1606. }
  1607. }
  1608. rc = 0;
  1609. return rc;
  1610. }
  1611. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1612. {
  1613. int rc = 0;
  1614. int i;
  1615. u32 length = 0;
  1616. u32 count = 0;
  1617. u32 size = 0;
  1618. u32 *arr_32 = NULL;
  1619. const u32 *arr;
  1620. struct dsi_parser_utils *utils = &panel->utils;
  1621. struct dsi_reset_seq *seq;
  1622. if (panel->host_config.ext_bridge_mode)
  1623. return 0;
  1624. arr = utils->get_property(utils->data,
  1625. "qcom,mdss-dsi-reset-sequence", &length);
  1626. if (!arr) {
  1627. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1628. rc = -EINVAL;
  1629. goto error;
  1630. }
  1631. if (length & 0x1) {
  1632. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1633. panel->name);
  1634. rc = -EINVAL;
  1635. goto error;
  1636. }
  1637. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1638. length = length / sizeof(u32);
  1639. size = length * sizeof(u32);
  1640. arr_32 = kzalloc(size, GFP_KERNEL);
  1641. if (!arr_32) {
  1642. rc = -ENOMEM;
  1643. goto error;
  1644. }
  1645. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1646. arr_32, length);
  1647. if (rc) {
  1648. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1649. goto error_free_arr_32;
  1650. }
  1651. count = length / 2;
  1652. size = count * sizeof(*seq);
  1653. seq = kzalloc(size, GFP_KERNEL);
  1654. if (!seq) {
  1655. rc = -ENOMEM;
  1656. goto error_free_arr_32;
  1657. }
  1658. panel->reset_config.sequence = seq;
  1659. panel->reset_config.count = count;
  1660. for (i = 0; i < length; i += 2) {
  1661. seq->level = arr_32[i];
  1662. seq->sleep_ms = arr_32[i + 1];
  1663. seq++;
  1664. }
  1665. error_free_arr_32:
  1666. kfree(arr_32);
  1667. error:
  1668. return rc;
  1669. }
  1670. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1671. {
  1672. struct dsi_parser_utils *utils = &panel->utils;
  1673. panel->ulps_feature_enabled =
  1674. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1675. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1676. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1677. panel->ulps_suspend_enabled =
  1678. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1679. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1680. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1681. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1682. "qcom,mdss-dsi-te-using-wd");
  1683. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1684. "qcom,cmd-sync-wait-broadcast");
  1685. panel->lp11_init = utils->read_bool(utils->data,
  1686. "qcom,mdss-dsi-lp11-init");
  1687. return 0;
  1688. }
  1689. static int dsi_panel_parse_jitter_config(
  1690. struct dsi_display_mode *mode,
  1691. struct dsi_parser_utils *utils)
  1692. {
  1693. int rc;
  1694. struct dsi_display_mode_priv_info *priv_info;
  1695. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1696. u64 jitter_val = 0;
  1697. priv_info = mode->priv_info;
  1698. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1699. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1700. if (rc) {
  1701. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1702. } else {
  1703. jitter_val = jitter[0];
  1704. jitter_val = div_u64(jitter_val, jitter[1]);
  1705. }
  1706. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1707. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1708. priv_info->panel_jitter_denom =
  1709. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1710. } else {
  1711. priv_info->panel_jitter_numer = jitter[0];
  1712. priv_info->panel_jitter_denom = jitter[1];
  1713. }
  1714. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1715. &priv_info->panel_prefill_lines);
  1716. if (rc) {
  1717. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1718. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1719. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1720. } else if (priv_info->panel_prefill_lines >=
  1721. DSI_V_TOTAL(&mode->timing)) {
  1722. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1723. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1724. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1725. }
  1726. return 0;
  1727. }
  1728. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1729. {
  1730. int rc = 0;
  1731. char *supply_name;
  1732. if (panel->host_config.ext_bridge_mode)
  1733. return 0;
  1734. if (!strcmp(panel->type, "primary"))
  1735. supply_name = "qcom,panel-supply-entries";
  1736. else
  1737. supply_name = "qcom,panel-sec-supply-entries";
  1738. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1739. &panel->power_info, supply_name);
  1740. if (rc) {
  1741. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1742. goto error;
  1743. }
  1744. error:
  1745. return rc;
  1746. }
  1747. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1748. {
  1749. int rc = 0;
  1750. const char *data;
  1751. struct dsi_parser_utils *utils = &panel->utils;
  1752. char *reset_gpio_name, *mode_set_gpio_name;
  1753. if (!strcmp(panel->type, "primary")) {
  1754. reset_gpio_name = "qcom,platform-reset-gpio";
  1755. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1756. } else {
  1757. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1758. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1759. }
  1760. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1761. reset_gpio_name, 0);
  1762. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1763. !panel->host_config.ext_bridge_mode) {
  1764. rc = panel->reset_config.reset_gpio;
  1765. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1766. goto error;
  1767. }
  1768. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1769. "qcom,5v-boost-gpio",
  1770. 0);
  1771. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1772. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1773. panel->name, rc);
  1774. panel->reset_config.disp_en_gpio =
  1775. utils->get_named_gpio(utils->data,
  1776. "qcom,platform-en-gpio", 0);
  1777. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1778. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1779. panel->name, rc);
  1780. }
  1781. }
  1782. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1783. utils->data, mode_set_gpio_name, 0);
  1784. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1785. DSI_DEBUG("mode gpio not specified\n");
  1786. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1787. data = utils->get_property(utils->data,
  1788. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1789. if (data) {
  1790. if (!strcmp(data, "single_port"))
  1791. panel->reset_config.mode_sel_state =
  1792. MODE_SEL_SINGLE_PORT;
  1793. else if (!strcmp(data, "dual_port"))
  1794. panel->reset_config.mode_sel_state =
  1795. MODE_SEL_DUAL_PORT;
  1796. else if (!strcmp(data, "high"))
  1797. panel->reset_config.mode_sel_state =
  1798. MODE_GPIO_HIGH;
  1799. else if (!strcmp(data, "low"))
  1800. panel->reset_config.mode_sel_state =
  1801. MODE_GPIO_LOW;
  1802. } else {
  1803. /* Set default mode as SPLIT mode */
  1804. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1805. }
  1806. /* TODO: release memory */
  1807. rc = dsi_panel_parse_reset_sequence(panel);
  1808. if (rc) {
  1809. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1810. panel->name, rc);
  1811. goto error;
  1812. }
  1813. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1814. "qcom,mdss-dsi-panel-test-pin",
  1815. 0);
  1816. if (!gpio_is_valid(panel->panel_test_gpio))
  1817. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1818. __LINE__);
  1819. error:
  1820. return rc;
  1821. }
  1822. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1823. {
  1824. int rc = 0;
  1825. u32 val;
  1826. struct dsi_backlight_config *config = &panel->bl_config;
  1827. struct dsi_parser_utils *utils = &panel->utils;
  1828. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1829. &val);
  1830. if (rc) {
  1831. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1832. goto error;
  1833. }
  1834. config->pwm_period_usecs = val;
  1835. error:
  1836. return rc;
  1837. }
  1838. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1839. {
  1840. int rc = 0;
  1841. u32 val = 0;
  1842. const char *bl_type;
  1843. const char *data;
  1844. struct dsi_parser_utils *utils = &panel->utils;
  1845. char *bl_name;
  1846. if (!strcmp(panel->type, "primary"))
  1847. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1848. else
  1849. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1850. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1851. if (!bl_type) {
  1852. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1853. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1854. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1855. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1856. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1857. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1858. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1859. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1860. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1861. } else {
  1862. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1863. panel->name, bl_type);
  1864. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1865. }
  1866. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1867. if (!data) {
  1868. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1869. } else if (!strcmp(data, "delay_until_first_frame")) {
  1870. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1871. } else {
  1872. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1873. panel->name, data);
  1874. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1875. }
  1876. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1877. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1878. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1879. if (rc) {
  1880. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1881. panel->name);
  1882. panel->bl_config.bl_min_level = 0;
  1883. } else {
  1884. panel->bl_config.bl_min_level = val;
  1885. }
  1886. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1887. if (rc) {
  1888. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1889. panel->name);
  1890. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1891. } else {
  1892. panel->bl_config.bl_max_level = val;
  1893. }
  1894. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1895. &val);
  1896. if (rc) {
  1897. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1898. panel->name);
  1899. panel->bl_config.brightness_max_level = 255;
  1900. } else {
  1901. panel->bl_config.brightness_max_level = val;
  1902. }
  1903. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1904. rc = dsi_panel_parse_bl_pwm_config(panel);
  1905. if (rc) {
  1906. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1907. panel->name, rc);
  1908. goto error;
  1909. }
  1910. }
  1911. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1912. "qcom,platform-bklight-en-gpio",
  1913. 0);
  1914. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1915. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1916. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1917. panel->name, rc);
  1918. rc = -EPROBE_DEFER;
  1919. goto error;
  1920. } else {
  1921. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1922. panel->name, rc);
  1923. rc = 0;
  1924. goto error;
  1925. }
  1926. }
  1927. error:
  1928. return rc;
  1929. }
  1930. void dsi_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, int intf_width)
  1931. {
  1932. int slice_per_pkt, slice_per_intf;
  1933. int bytes_in_slice, total_bytes_per_intf;
  1934. if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt ||
  1935. (intf_width < dsc->slice_width)) {
  1936. DSI_ERR("invalid input, intf_width=%d slice_width=%d\n",
  1937. intf_width, dsc ? dsc->slice_width : -1);
  1938. return;
  1939. }
  1940. slice_per_pkt = dsc->slice_per_pkt;
  1941. slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width);
  1942. /*
  1943. * If slice_per_pkt is greater than slice_per_intf then default to 1.
  1944. * This can happen during partial update.
  1945. */
  1946. if (slice_per_pkt > slice_per_intf)
  1947. slice_per_pkt = 1;
  1948. bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8);
  1949. total_bytes_per_intf = bytes_in_slice * slice_per_intf;
  1950. dsc->eol_byte_num = total_bytes_per_intf % 3;
  1951. dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
  1952. dsc->bytes_in_slice = bytes_in_slice;
  1953. dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
  1954. dsc->pkt_per_line = slice_per_intf / slice_per_pkt;
  1955. }
  1956. int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
  1957. {
  1958. int bpp, bpc;
  1959. int mux_words_size;
  1960. int groups_per_line, groups_total;
  1961. int min_rate_buffer_size;
  1962. int hrd_delay;
  1963. int pre_num_extra_mux_bits, num_extra_mux_bits;
  1964. int slice_bits;
  1965. int data;
  1966. int final_value, final_scale;
  1967. int ratio_index, mod_offset;
  1968. dsc->rc_model_size = 8192;
  1969. if (dsc->version == 0x11 && dsc->scr_rev == 0x1)
  1970. dsc->first_line_bpg_offset = 15;
  1971. else
  1972. dsc->first_line_bpg_offset = 12;
  1973. dsc->edge_factor = 6;
  1974. dsc->tgt_offset_hi = 3;
  1975. dsc->tgt_offset_lo = 3;
  1976. dsc->enable_422 = 0;
  1977. dsc->convert_rgb = 1;
  1978. dsc->vbr_enable = 0;
  1979. dsc->buf_thresh = dsi_dsc_rc_buf_thresh;
  1980. bpp = dsc->bpp;
  1981. bpc = dsc->bpc;
  1982. if ((bpc == 12) && (bpp == 8))
  1983. ratio_index = DSC_12BPC_8BPP;
  1984. else if ((bpc == 10) && (bpp == 8))
  1985. ratio_index = DSC_10BPC_8BPP;
  1986. else if ((bpc == 10) && (bpp == 10))
  1987. ratio_index = DSC_10BPC_10BPP;
  1988. else
  1989. ratio_index = DSC_8BPC_8BPP;
  1990. if (dsc->version == 0x11 && dsc->scr_rev == 0x1) {
  1991. dsc->range_min_qp =
  1992. dsi_dsc_rc_range_min_qp_1_1_scr1[ratio_index];
  1993. dsc->range_max_qp =
  1994. dsi_dsc_rc_range_max_qp_1_1_scr1[ratio_index];
  1995. } else {
  1996. dsc->range_min_qp = dsi_dsc_rc_range_min_qp_1_1[ratio_index];
  1997. dsc->range_max_qp = dsi_dsc_rc_range_max_qp_1_1[ratio_index];
  1998. }
  1999. dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
  2000. if (bpp == 8) {
  2001. dsc->initial_offset = 6144;
  2002. dsc->initial_xmit_delay = 512;
  2003. } else if (bpp == 10) {
  2004. dsc->initial_offset = 5632;
  2005. dsc->initial_xmit_delay = 410;
  2006. } else {
  2007. dsc->initial_offset = 2048;
  2008. dsc->initial_xmit_delay = 341;
  2009. }
  2010. dsc->line_buf_depth = bpc + 1;
  2011. if (bpc == 8) {
  2012. dsc->input_10_bits = 0;
  2013. dsc->min_qp_flatness = 3;
  2014. dsc->max_qp_flatness = 12;
  2015. dsc->quant_incr_limit0 = 11;
  2016. dsc->quant_incr_limit1 = 11;
  2017. mux_words_size = 48;
  2018. } else if (bpc == 10) { /* 10bpc */
  2019. dsc->input_10_bits = 1;
  2020. dsc->min_qp_flatness = 7;
  2021. dsc->max_qp_flatness = 16;
  2022. dsc->quant_incr_limit0 = 15;
  2023. dsc->quant_incr_limit1 = 15;
  2024. mux_words_size = 48;
  2025. } else { /* 12 bpc */
  2026. dsc->input_10_bits = 0;
  2027. dsc->min_qp_flatness = 11;
  2028. dsc->max_qp_flatness = 20;
  2029. dsc->quant_incr_limit0 = 19;
  2030. dsc->quant_incr_limit1 = 19;
  2031. mux_words_size = 64;
  2032. }
  2033. mod_offset = dsc->slice_width % 3;
  2034. switch (mod_offset) {
  2035. case 0:
  2036. dsc->slice_last_group_size = 2;
  2037. break;
  2038. case 1:
  2039. dsc->slice_last_group_size = 0;
  2040. break;
  2041. case 2:
  2042. dsc->slice_last_group_size = 1;
  2043. break;
  2044. default:
  2045. break;
  2046. }
  2047. dsc->det_thresh_flatness = 2 << (bpc - 8);
  2048. groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
  2049. dsc->chunk_size = dsc->slice_width * bpp / 8;
  2050. if ((dsc->slice_width * bpp) % 8)
  2051. dsc->chunk_size++;
  2052. /* rbs-min */
  2053. min_rate_buffer_size = dsc->rc_model_size - dsc->initial_offset +
  2054. dsc->initial_xmit_delay * bpp +
  2055. groups_per_line * dsc->first_line_bpg_offset;
  2056. hrd_delay = DIV_ROUND_UP(min_rate_buffer_size, bpp);
  2057. dsc->initial_dec_delay = hrd_delay - dsc->initial_xmit_delay;
  2058. dsc->initial_scale_value = 8 * dsc->rc_model_size /
  2059. (dsc->rc_model_size - dsc->initial_offset);
  2060. slice_bits = 8 * dsc->chunk_size * dsc->slice_height;
  2061. groups_total = groups_per_line * dsc->slice_height;
  2062. data = dsc->first_line_bpg_offset * 2048;
  2063. dsc->nfl_bpg_offset = DIV_ROUND_UP(data, (dsc->slice_height - 1));
  2064. pre_num_extra_mux_bits = 3 * (mux_words_size + (4 * bpc + 4) - 2);
  2065. num_extra_mux_bits = pre_num_extra_mux_bits - (mux_words_size -
  2066. ((slice_bits - pre_num_extra_mux_bits) % mux_words_size));
  2067. data = 2048 * (dsc->rc_model_size - dsc->initial_offset
  2068. + num_extra_mux_bits);
  2069. dsc->slice_bpg_offset = DIV_ROUND_UP(data, groups_total);
  2070. data = dsc->initial_xmit_delay * bpp;
  2071. final_value = dsc->rc_model_size - data + num_extra_mux_bits;
  2072. final_scale = 8 * dsc->rc_model_size /
  2073. (dsc->rc_model_size - final_value);
  2074. dsc->final_offset = final_value;
  2075. data = (final_scale - 9) * (dsc->nfl_bpg_offset +
  2076. dsc->slice_bpg_offset);
  2077. dsc->scale_increment_interval = (2048 * dsc->final_offset) / data;
  2078. dsc->scale_decrement_interval = groups_per_line /
  2079. (dsc->initial_scale_value - 8);
  2080. return 0;
  2081. }
  2082. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2083. struct dsi_parser_utils *utils)
  2084. {
  2085. const char *data;
  2086. u32 len, i;
  2087. int rc = 0;
  2088. struct dsi_display_mode_priv_info *priv_info;
  2089. if (!mode || !mode->priv_info)
  2090. return -EINVAL;
  2091. priv_info = mode->priv_info;
  2092. data = utils->get_property(utils->data,
  2093. "qcom,mdss-dsi-panel-phy-timings", &len);
  2094. if (!data) {
  2095. DSI_DEBUG("Unable to read Phy timing settings\n");
  2096. } else {
  2097. priv_info->phy_timing_val =
  2098. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2099. if (!priv_info->phy_timing_val)
  2100. return -EINVAL;
  2101. for (i = 0; i < len; i++)
  2102. priv_info->phy_timing_val[i] = data[i];
  2103. priv_info->phy_timing_len = len;
  2104. }
  2105. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  2106. /*
  2107. * For command mode we update the pclk as part of
  2108. * function dsi_panel_calc_dsi_transfer_time( )
  2109. * as we set it based on dsi clock or mdp transfer time.
  2110. */
  2111. mode->pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *
  2112. DSI_V_TOTAL(&mode->timing) *
  2113. mode->timing.refresh_rate) / 1000;
  2114. }
  2115. return rc;
  2116. }
  2117. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2118. struct dsi_parser_utils *utils)
  2119. {
  2120. u32 data;
  2121. int rc = -EINVAL;
  2122. int intf_width;
  2123. const char *compression;
  2124. struct dsi_display_mode_priv_info *priv_info;
  2125. if (!mode || !mode->priv_info)
  2126. return -EINVAL;
  2127. priv_info = mode->priv_info;
  2128. priv_info->dsc_enabled = false;
  2129. compression = utils->get_property(utils->data,
  2130. "qcom,compression-mode", NULL);
  2131. if (compression && !strcmp(compression, "dsc"))
  2132. priv_info->dsc_enabled = true;
  2133. if (!priv_info->dsc_enabled) {
  2134. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2135. return 0;
  2136. }
  2137. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2138. if (rc) {
  2139. priv_info->dsc.version = 0x11;
  2140. rc = 0;
  2141. } else {
  2142. priv_info->dsc.version = data & 0xff;
  2143. /* only support DSC 1.1 rev */
  2144. if (priv_info->dsc.version != 0x11) {
  2145. DSI_ERR("%s: DSC version:%d not supported\n", __func__,
  2146. priv_info->dsc.version);
  2147. rc = -EINVAL;
  2148. goto error;
  2149. }
  2150. }
  2151. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2152. if (rc) {
  2153. priv_info->dsc.scr_rev = 0x0;
  2154. rc = 0;
  2155. } else {
  2156. priv_info->dsc.scr_rev = data & 0xff;
  2157. /* only one scr rev supported */
  2158. if (priv_info->dsc.scr_rev > 0x1) {
  2159. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2160. __func__, priv_info->dsc.scr_rev);
  2161. rc = -EINVAL;
  2162. goto error;
  2163. }
  2164. }
  2165. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2166. if (rc) {
  2167. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2168. goto error;
  2169. }
  2170. priv_info->dsc.slice_height = data;
  2171. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2172. if (rc) {
  2173. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2174. goto error;
  2175. }
  2176. priv_info->dsc.slice_width = data;
  2177. intf_width = mode->timing.h_active;
  2178. if (intf_width % priv_info->dsc.slice_width) {
  2179. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2180. intf_width, priv_info->dsc.slice_width);
  2181. rc = -EINVAL;
  2182. goto error;
  2183. }
  2184. priv_info->dsc.pic_width = mode->timing.h_active;
  2185. priv_info->dsc.pic_height = mode->timing.v_active;
  2186. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2187. if (rc) {
  2188. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2189. goto error;
  2190. } else if (!data || (data > 2)) {
  2191. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2192. goto error;
  2193. }
  2194. priv_info->dsc.slice_per_pkt = data;
  2195. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2196. &data);
  2197. if (rc) {
  2198. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2199. goto error;
  2200. }
  2201. priv_info->dsc.bpc = data;
  2202. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2203. if (rc) {
  2204. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2205. priv_info->dsc.pps_delay_ms = 0;
  2206. }
  2207. priv_info->dsc.pps_delay_ms = data;
  2208. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2209. &data);
  2210. if (rc) {
  2211. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2212. goto error;
  2213. }
  2214. priv_info->dsc.bpp = data;
  2215. priv_info->dsc.block_pred_enable = utils->read_bool(utils->data,
  2216. "qcom,mdss-dsc-block-prediction-enable");
  2217. priv_info->dsc.full_frame_slices = DIV_ROUND_UP(intf_width,
  2218. priv_info->dsc.slice_width);
  2219. dsi_dsc_populate_static_param(&priv_info->dsc);
  2220. dsi_dsc_pclk_param_calc(&priv_info->dsc, intf_width);
  2221. mode->timing.dsc_enabled = true;
  2222. mode->timing.dsc = &priv_info->dsc;
  2223. error:
  2224. return rc;
  2225. }
  2226. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2227. {
  2228. int rc = 0;
  2229. struct drm_panel_hdr_properties *hdr_prop;
  2230. struct dsi_parser_utils *utils = &panel->utils;
  2231. hdr_prop = &panel->hdr_props;
  2232. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2233. "qcom,mdss-dsi-panel-hdr-enabled");
  2234. if (hdr_prop->hdr_enabled) {
  2235. rc = utils->read_u32_array(utils->data,
  2236. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2237. hdr_prop->display_primaries,
  2238. DISPLAY_PRIMARIES_MAX);
  2239. if (rc) {
  2240. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2241. __func__, __LINE__, rc);
  2242. hdr_prop->hdr_enabled = false;
  2243. return rc;
  2244. }
  2245. rc = utils->read_u32(utils->data,
  2246. "qcom,mdss-dsi-panel-peak-brightness",
  2247. &(hdr_prop->peak_brightness));
  2248. if (rc) {
  2249. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2250. __func__, __LINE__, rc);
  2251. hdr_prop->hdr_enabled = false;
  2252. return rc;
  2253. }
  2254. rc = utils->read_u32(utils->data,
  2255. "qcom,mdss-dsi-panel-blackness-level",
  2256. &(hdr_prop->blackness_level));
  2257. if (rc) {
  2258. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2259. __func__, __LINE__, rc);
  2260. hdr_prop->hdr_enabled = false;
  2261. return rc;
  2262. }
  2263. }
  2264. return 0;
  2265. }
  2266. static int dsi_panel_parse_topology(
  2267. struct dsi_display_mode_priv_info *priv_info,
  2268. struct dsi_parser_utils *utils,
  2269. int topology_override)
  2270. {
  2271. struct msm_display_topology *topology;
  2272. u32 top_count, top_sel, *array = NULL;
  2273. int i, len = 0;
  2274. int rc = -EINVAL;
  2275. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2276. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2277. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2278. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2279. return rc;
  2280. }
  2281. top_count = len / TOPOLOGY_SET_LEN;
  2282. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2283. if (!array)
  2284. return -ENOMEM;
  2285. rc = utils->read_u32_array(utils->data,
  2286. "qcom,display-topology", array, len);
  2287. if (rc) {
  2288. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2289. goto read_fail;
  2290. }
  2291. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2292. if (!topology) {
  2293. rc = -ENOMEM;
  2294. goto read_fail;
  2295. }
  2296. for (i = 0; i < top_count; i++) {
  2297. struct msm_display_topology *top = &topology[i];
  2298. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2299. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2300. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2301. }
  2302. if (topology_override >= 0 && topology_override < top_count) {
  2303. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2304. topology_override,
  2305. topology[topology_override].num_lm,
  2306. topology[topology_override].num_enc,
  2307. topology[topology_override].num_intf);
  2308. top_sel = topology_override;
  2309. goto parse_done;
  2310. }
  2311. rc = utils->read_u32(utils->data,
  2312. "qcom,default-topology-index", &top_sel);
  2313. if (rc) {
  2314. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2315. goto parse_fail;
  2316. }
  2317. if (top_sel >= top_count) {
  2318. rc = -EINVAL;
  2319. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2320. rc);
  2321. goto parse_fail;
  2322. }
  2323. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2324. topology[top_sel].num_lm,
  2325. topology[top_sel].num_enc,
  2326. topology[top_sel].num_intf);
  2327. parse_done:
  2328. memcpy(&priv_info->topology, &topology[top_sel],
  2329. sizeof(struct msm_display_topology));
  2330. parse_fail:
  2331. kfree(topology);
  2332. read_fail:
  2333. kfree(array);
  2334. return rc;
  2335. }
  2336. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2337. struct msm_roi_alignment *align)
  2338. {
  2339. int len = 0, rc = 0;
  2340. u32 value[6];
  2341. struct property *data;
  2342. if (!align)
  2343. return -EINVAL;
  2344. memset(align, 0, sizeof(*align));
  2345. data = utils->find_property(utils->data,
  2346. "qcom,panel-roi-alignment", &len);
  2347. len /= sizeof(u32);
  2348. if (!data) {
  2349. DSI_ERR("panel roi alignment not found\n");
  2350. rc = -EINVAL;
  2351. } else if (len != 6) {
  2352. DSI_ERR("incorrect roi alignment len %d\n", len);
  2353. rc = -EINVAL;
  2354. } else {
  2355. rc = utils->read_u32_array(utils->data,
  2356. "qcom,panel-roi-alignment", value, len);
  2357. if (rc)
  2358. DSI_DEBUG("error reading panel roi alignment values\n");
  2359. else {
  2360. align->xstart_pix_align = value[0];
  2361. align->ystart_pix_align = value[1];
  2362. align->width_pix_align = value[2];
  2363. align->height_pix_align = value[3];
  2364. align->min_width = value[4];
  2365. align->min_height = value[5];
  2366. }
  2367. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2368. align->xstart_pix_align,
  2369. align->width_pix_align,
  2370. align->ystart_pix_align,
  2371. align->height_pix_align,
  2372. align->min_width,
  2373. align->min_height);
  2374. }
  2375. return rc;
  2376. }
  2377. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2378. struct dsi_parser_utils *utils)
  2379. {
  2380. struct msm_roi_caps *roi_caps = NULL;
  2381. const char *data;
  2382. int rc = 0;
  2383. if (!mode || !mode->priv_info) {
  2384. DSI_ERR("invalid arguments\n");
  2385. return -EINVAL;
  2386. }
  2387. roi_caps = &mode->priv_info->roi_caps;
  2388. memset(roi_caps, 0, sizeof(*roi_caps));
  2389. data = utils->get_property(utils->data,
  2390. "qcom,partial-update-enabled", NULL);
  2391. if (data) {
  2392. if (!strcmp(data, "dual_roi"))
  2393. roi_caps->num_roi = 2;
  2394. else if (!strcmp(data, "single_roi"))
  2395. roi_caps->num_roi = 1;
  2396. else {
  2397. DSI_INFO(
  2398. "invalid value for qcom,partial-update-enabled: %s\n",
  2399. data);
  2400. return 0;
  2401. }
  2402. } else {
  2403. DSI_DEBUG("partial update disabled as the property is not set\n");
  2404. return 0;
  2405. }
  2406. roi_caps->merge_rois = utils->read_bool(utils->data,
  2407. "qcom,partial-update-roi-merge");
  2408. roi_caps->enabled = roi_caps->num_roi > 0;
  2409. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2410. roi_caps->enabled);
  2411. if (roi_caps->enabled)
  2412. rc = dsi_panel_parse_roi_alignment(utils,
  2413. &roi_caps->align);
  2414. if (rc)
  2415. memset(roi_caps, 0, sizeof(*roi_caps));
  2416. return rc;
  2417. }
  2418. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2419. struct dsi_parser_utils *utils)
  2420. {
  2421. bool vid_mode_support, cmd_mode_support;
  2422. if (!mode || !mode->priv_info) {
  2423. DSI_ERR("invalid arguments\n");
  2424. return -EINVAL;
  2425. }
  2426. vid_mode_support = utils->read_bool(utils->data,
  2427. "qcom,mdss-dsi-video-mode");
  2428. cmd_mode_support = utils->read_bool(utils->data,
  2429. "qcom,mdss-dsi-cmd-mode");
  2430. if (cmd_mode_support)
  2431. mode->panel_mode = DSI_OP_CMD_MODE;
  2432. else if (vid_mode_support)
  2433. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2434. else
  2435. return -EINVAL;
  2436. return 0;
  2437. };
  2438. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2439. {
  2440. int dms_enabled;
  2441. const char *data;
  2442. struct dsi_parser_utils *utils = &panel->utils;
  2443. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2444. dms_enabled = utils->read_bool(utils->data,
  2445. "qcom,dynamic-mode-switch-enabled");
  2446. if (!dms_enabled)
  2447. return 0;
  2448. data = utils->get_property(utils->data,
  2449. "qcom,dynamic-mode-switch-type", NULL);
  2450. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2451. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2452. } else {
  2453. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2454. panel->name, data);
  2455. return -EINVAL;
  2456. }
  2457. return 0;
  2458. };
  2459. /*
  2460. * The length of all the valid values to be checked should not be greater
  2461. * than the length of returned data from read command.
  2462. */
  2463. static bool
  2464. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2465. {
  2466. int i;
  2467. struct drm_panel_esd_config *config = &panel->esd_config;
  2468. for (i = 0; i < count; ++i) {
  2469. if (config->status_valid_params[i] >
  2470. config->status_cmds_rlen[i]) {
  2471. DSI_DEBUG("ignore valid params\n");
  2472. return false;
  2473. }
  2474. }
  2475. return true;
  2476. }
  2477. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2478. char *prop_key, u32 **target, u32 cmd_cnt)
  2479. {
  2480. int tmp;
  2481. if (!utils->find_property(utils->data, prop_key, &tmp))
  2482. return false;
  2483. tmp /= sizeof(u32);
  2484. if (tmp != cmd_cnt) {
  2485. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2486. tmp, cmd_cnt);
  2487. return false;
  2488. }
  2489. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2490. if (IS_ERR_OR_NULL(*target)) {
  2491. DSI_ERR("Error allocating memory for property\n");
  2492. return false;
  2493. }
  2494. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2495. DSI_ERR("cannot get values from dts\n");
  2496. kfree(*target);
  2497. *target = NULL;
  2498. return false;
  2499. }
  2500. return true;
  2501. }
  2502. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2503. {
  2504. kfree(esd_config->status_buf);
  2505. kfree(esd_config->return_buf);
  2506. kfree(esd_config->status_value);
  2507. kfree(esd_config->status_valid_params);
  2508. kfree(esd_config->status_cmds_rlen);
  2509. kfree(esd_config->status_cmd.cmds);
  2510. }
  2511. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2512. {
  2513. struct drm_panel_esd_config *esd_config;
  2514. int rc = 0;
  2515. u32 tmp;
  2516. u32 i, status_len, *lenp;
  2517. struct property *data;
  2518. struct dsi_parser_utils *utils = &panel->utils;
  2519. if (!panel) {
  2520. DSI_ERR("Invalid Params\n");
  2521. return -EINVAL;
  2522. }
  2523. esd_config = &panel->esd_config;
  2524. if (!esd_config)
  2525. return -EINVAL;
  2526. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2527. DSI_CMD_SET_PANEL_STATUS, utils);
  2528. if (!esd_config->status_cmd.count) {
  2529. DSI_ERR("panel status command parsing failed\n");
  2530. rc = -EINVAL;
  2531. goto error;
  2532. }
  2533. if (!dsi_panel_parse_esd_status_len(utils,
  2534. "qcom,mdss-dsi-panel-status-read-length",
  2535. &panel->esd_config.status_cmds_rlen,
  2536. esd_config->status_cmd.count)) {
  2537. DSI_ERR("Invalid status read length\n");
  2538. rc = -EINVAL;
  2539. goto error1;
  2540. }
  2541. if (dsi_panel_parse_esd_status_len(utils,
  2542. "qcom,mdss-dsi-panel-status-valid-params",
  2543. &panel->esd_config.status_valid_params,
  2544. esd_config->status_cmd.count)) {
  2545. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2546. esd_config->status_cmd.count)) {
  2547. rc = -EINVAL;
  2548. goto error2;
  2549. }
  2550. }
  2551. status_len = 0;
  2552. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2553. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2554. status_len += lenp[i];
  2555. if (!status_len) {
  2556. rc = -EINVAL;
  2557. goto error2;
  2558. }
  2559. /*
  2560. * Some panel may need multiple read commands to properly
  2561. * check panel status. Do a sanity check for proper status
  2562. * value which will be compared with the value read by dsi
  2563. * controller during ESD check. Also check if multiple read
  2564. * commands are there then, there should be corresponding
  2565. * status check values for each read command.
  2566. */
  2567. data = utils->find_property(utils->data,
  2568. "qcom,mdss-dsi-panel-status-value", &tmp);
  2569. tmp /= sizeof(u32);
  2570. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2571. esd_config->groups = tmp / status_len;
  2572. } else {
  2573. DSI_ERR("error parse panel-status-value\n");
  2574. rc = -EINVAL;
  2575. goto error2;
  2576. }
  2577. esd_config->status_value =
  2578. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2579. GFP_KERNEL);
  2580. if (!esd_config->status_value) {
  2581. rc = -ENOMEM;
  2582. goto error2;
  2583. }
  2584. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2585. sizeof(unsigned char), GFP_KERNEL);
  2586. if (!esd_config->return_buf) {
  2587. rc = -ENOMEM;
  2588. goto error3;
  2589. }
  2590. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2591. if (!esd_config->status_buf) {
  2592. rc = -ENOMEM;
  2593. goto error4;
  2594. }
  2595. rc = utils->read_u32_array(utils->data,
  2596. "qcom,mdss-dsi-panel-status-value",
  2597. esd_config->status_value, esd_config->groups * status_len);
  2598. if (rc) {
  2599. DSI_DEBUG("error reading panel status values\n");
  2600. memset(esd_config->status_value, 0,
  2601. esd_config->groups * status_len);
  2602. }
  2603. return 0;
  2604. error4:
  2605. kfree(esd_config->return_buf);
  2606. error3:
  2607. kfree(esd_config->status_value);
  2608. error2:
  2609. kfree(esd_config->status_valid_params);
  2610. kfree(esd_config->status_cmds_rlen);
  2611. error1:
  2612. kfree(esd_config->status_cmd.cmds);
  2613. error:
  2614. return rc;
  2615. }
  2616. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2617. {
  2618. int rc = 0;
  2619. const char *string;
  2620. struct drm_panel_esd_config *esd_config;
  2621. struct dsi_parser_utils *utils = &panel->utils;
  2622. u8 *esd_mode = NULL;
  2623. esd_config = &panel->esd_config;
  2624. esd_config->status_mode = ESD_MODE_MAX;
  2625. esd_config->esd_enabled = utils->read_bool(utils->data,
  2626. "qcom,esd-check-enabled");
  2627. if (!esd_config->esd_enabled)
  2628. return 0;
  2629. rc = utils->read_string(utils->data,
  2630. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2631. if (!rc) {
  2632. if (!strcmp(string, "bta_check")) {
  2633. esd_config->status_mode = ESD_MODE_SW_BTA;
  2634. } else if (!strcmp(string, "reg_read")) {
  2635. esd_config->status_mode = ESD_MODE_REG_READ;
  2636. } else if (!strcmp(string, "te_signal_check")) {
  2637. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2638. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2639. } else {
  2640. DSI_ERR("TE-ESD not valid for video mode\n");
  2641. rc = -EINVAL;
  2642. goto error;
  2643. }
  2644. } else {
  2645. DSI_ERR("No valid panel-status-check-mode string\n");
  2646. rc = -EINVAL;
  2647. goto error;
  2648. }
  2649. } else {
  2650. DSI_DEBUG("status check method not defined!\n");
  2651. rc = -EINVAL;
  2652. goto error;
  2653. }
  2654. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2655. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2656. if (rc) {
  2657. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2658. rc);
  2659. goto error;
  2660. }
  2661. esd_mode = "register_read";
  2662. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2663. esd_mode = "bta_trigger";
  2664. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2665. esd_mode = "te_check";
  2666. }
  2667. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2668. return 0;
  2669. error:
  2670. panel->esd_config.esd_enabled = false;
  2671. return rc;
  2672. }
  2673. static void dsi_panel_update_util(struct dsi_panel *panel,
  2674. struct device_node *parser_node)
  2675. {
  2676. struct dsi_parser_utils *utils = &panel->utils;
  2677. if (parser_node) {
  2678. *utils = *dsi_parser_get_parser_utils();
  2679. utils->data = parser_node;
  2680. DSI_DEBUG("switching to parser APIs\n");
  2681. goto end;
  2682. }
  2683. *utils = *dsi_parser_get_of_utils();
  2684. utils->data = panel->panel_of_node;
  2685. end:
  2686. utils->node = panel->panel_of_node;
  2687. }
  2688. struct dsi_panel *dsi_panel_get(struct device *parent,
  2689. struct device_node *of_node,
  2690. struct device_node *parser_node,
  2691. const char *type,
  2692. int topology_override)
  2693. {
  2694. struct dsi_panel *panel;
  2695. struct dsi_parser_utils *utils;
  2696. int rc = 0;
  2697. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2698. if (!panel)
  2699. return ERR_PTR(-ENOMEM);
  2700. panel->panel_of_node = of_node;
  2701. panel->parent = parent;
  2702. panel->type = type;
  2703. dsi_panel_update_util(panel, parser_node);
  2704. utils = &panel->utils;
  2705. panel->name = utils->get_property(utils->data,
  2706. "qcom,mdss-dsi-panel-name", NULL);
  2707. if (!panel->name)
  2708. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2709. rc = dsi_panel_parse_host_config(panel);
  2710. if (rc) {
  2711. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2712. rc);
  2713. goto error;
  2714. }
  2715. rc = dsi_panel_parse_panel_mode(panel);
  2716. if (rc) {
  2717. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2718. rc);
  2719. goto error;
  2720. }
  2721. rc = dsi_panel_parse_dfps_caps(panel);
  2722. if (rc)
  2723. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2724. if (!(panel->dfps_caps.dfps_support)) {
  2725. /* qsync and dfps are mutually exclusive features */
  2726. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2727. if (rc)
  2728. DSI_DEBUG("failed to parse qsync features, rc=%d\n",
  2729. rc);
  2730. }
  2731. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2732. if (rc)
  2733. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2734. rc = dsi_panel_parse_phy_props(panel);
  2735. if (rc) {
  2736. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2737. rc);
  2738. goto error;
  2739. }
  2740. rc = dsi_panel_parse_gpios(panel);
  2741. if (rc) {
  2742. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2743. goto error;
  2744. }
  2745. rc = dsi_panel_parse_power_cfg(panel);
  2746. if (rc)
  2747. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2748. rc = dsi_panel_parse_bl_config(panel);
  2749. if (rc) {
  2750. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2751. if (rc == -EPROBE_DEFER)
  2752. goto error;
  2753. }
  2754. rc = dsi_panel_parse_misc_features(panel);
  2755. if (rc)
  2756. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2757. rc = dsi_panel_parse_hdr_config(panel);
  2758. if (rc)
  2759. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2760. rc = dsi_panel_get_mode_count(panel);
  2761. if (rc) {
  2762. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2763. goto error;
  2764. }
  2765. rc = dsi_panel_parse_dms_info(panel);
  2766. if (rc)
  2767. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2768. rc = dsi_panel_parse_esd_config(panel);
  2769. if (rc)
  2770. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2771. drm_panel_init(&panel->drm_panel);
  2772. panel->drm_panel.dev = &panel->mipi_device.dev;
  2773. panel->mipi_device.dev.of_node = of_node;
  2774. rc = drm_panel_add(&panel->drm_panel);
  2775. if (rc)
  2776. goto error;
  2777. mutex_init(&panel->panel_lock);
  2778. return panel;
  2779. error:
  2780. kfree(panel);
  2781. return ERR_PTR(rc);
  2782. }
  2783. void dsi_panel_put(struct dsi_panel *panel)
  2784. {
  2785. drm_panel_remove(&panel->drm_panel);
  2786. /* free resources allocated for ESD check */
  2787. dsi_panel_esd_config_deinit(&panel->esd_config);
  2788. kfree(panel);
  2789. }
  2790. int dsi_panel_drv_init(struct dsi_panel *panel,
  2791. struct mipi_dsi_host *host)
  2792. {
  2793. int rc = 0;
  2794. struct mipi_dsi_device *dev;
  2795. if (!panel || !host) {
  2796. DSI_ERR("invalid params\n");
  2797. return -EINVAL;
  2798. }
  2799. mutex_lock(&panel->panel_lock);
  2800. dev = &panel->mipi_device;
  2801. dev->host = host;
  2802. /*
  2803. * We dont have device structure since panel is not a device node.
  2804. * When using drm panel framework, the device is probed when the host is
  2805. * create.
  2806. */
  2807. dev->channel = 0;
  2808. dev->lanes = 4;
  2809. panel->host = host;
  2810. rc = dsi_panel_vreg_get(panel);
  2811. if (rc) {
  2812. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2813. panel->name, rc);
  2814. goto exit;
  2815. }
  2816. rc = dsi_panel_pinctrl_init(panel);
  2817. if (rc) {
  2818. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2819. panel->name, rc);
  2820. goto error_vreg_put;
  2821. }
  2822. rc = dsi_panel_gpio_request(panel);
  2823. if (rc) {
  2824. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2825. rc);
  2826. goto error_pinctrl_deinit;
  2827. }
  2828. rc = dsi_panel_bl_register(panel);
  2829. if (rc) {
  2830. if (rc != -EPROBE_DEFER)
  2831. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2832. panel->name, rc);
  2833. goto error_gpio_release;
  2834. }
  2835. goto exit;
  2836. error_gpio_release:
  2837. (void)dsi_panel_gpio_release(panel);
  2838. error_pinctrl_deinit:
  2839. (void)dsi_panel_pinctrl_deinit(panel);
  2840. error_vreg_put:
  2841. (void)dsi_panel_vreg_put(panel);
  2842. exit:
  2843. mutex_unlock(&panel->panel_lock);
  2844. return rc;
  2845. }
  2846. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2847. {
  2848. int rc = 0;
  2849. if (!panel) {
  2850. DSI_ERR("invalid params\n");
  2851. return -EINVAL;
  2852. }
  2853. mutex_lock(&panel->panel_lock);
  2854. rc = dsi_panel_bl_unregister(panel);
  2855. if (rc)
  2856. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2857. panel->name, rc);
  2858. rc = dsi_panel_gpio_release(panel);
  2859. if (rc)
  2860. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2861. rc);
  2862. rc = dsi_panel_pinctrl_deinit(panel);
  2863. if (rc)
  2864. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2865. rc);
  2866. rc = dsi_panel_vreg_put(panel);
  2867. if (rc)
  2868. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2869. panel->host = NULL;
  2870. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2871. mutex_unlock(&panel->panel_lock);
  2872. return rc;
  2873. }
  2874. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2875. struct dsi_display_mode *mode)
  2876. {
  2877. return 0;
  2878. }
  2879. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2880. {
  2881. const u32 SINGLE_MODE_SUPPORT = 1;
  2882. struct dsi_parser_utils *utils;
  2883. struct device_node *timings_np, *child_np;
  2884. int num_dfps_rates, num_bit_clks;
  2885. int num_video_modes = 0, num_cmd_modes = 0;
  2886. int count, rc = 0;
  2887. void *utils_data = NULL;
  2888. if (!panel) {
  2889. DSI_ERR("invalid params\n");
  2890. return -EINVAL;
  2891. }
  2892. utils = &panel->utils;
  2893. panel->num_timing_nodes = 0;
  2894. timings_np = utils->get_child_by_name(utils->data,
  2895. "qcom,mdss-dsi-display-timings");
  2896. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2897. DSI_ERR("no display timing nodes defined\n");
  2898. rc = -EINVAL;
  2899. goto error;
  2900. }
  2901. count = utils->get_child_count(timings_np);
  2902. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2903. count > DSI_MODE_MAX) {
  2904. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2905. rc = -EINVAL;
  2906. goto error;
  2907. }
  2908. /* No multiresolution support is available for video mode panels */
  2909. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2910. !panel->host_config.ext_bridge_mode)
  2911. count = SINGLE_MODE_SUPPORT;
  2912. panel->num_timing_nodes = count;
  2913. dsi_for_each_child_node(timings_np, child_np) {
  2914. utils_data = child_np;
  2915. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2916. num_video_modes++;
  2917. else if (utils->read_bool(utils->data,
  2918. "qcom,mdss-dsi-cmd-mode"))
  2919. num_cmd_modes++;
  2920. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2921. num_video_modes++;
  2922. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2923. num_cmd_modes++;
  2924. }
  2925. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2926. panel->dfps_caps.dfps_list_len;
  2927. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2928. panel->dyn_clk_caps.bit_clk_list_len;
  2929. /* Inflate num_of_modes by fps and bit clks in dfps */
  2930. panel->num_display_modes = (num_cmd_modes * num_bit_clks) +
  2931. (num_video_modes * num_bit_clks * num_dfps_rates);
  2932. error:
  2933. return rc;
  2934. }
  2935. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2936. struct dsi_panel_phy_props *phy_props)
  2937. {
  2938. int rc = 0;
  2939. if (!panel || !phy_props) {
  2940. DSI_ERR("invalid params\n");
  2941. return -EINVAL;
  2942. }
  2943. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2944. return rc;
  2945. }
  2946. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2947. struct dsi_dfps_capabilities *dfps_caps)
  2948. {
  2949. int rc = 0;
  2950. if (!panel || !dfps_caps) {
  2951. DSI_ERR("invalid params\n");
  2952. return -EINVAL;
  2953. }
  2954. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2955. return rc;
  2956. }
  2957. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2958. {
  2959. int i;
  2960. if (!mode->priv_info)
  2961. return;
  2962. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2963. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2964. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2965. }
  2966. kfree(mode->priv_info);
  2967. }
  2968. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2969. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2970. {
  2971. u32 frame_time_us,nslices;
  2972. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz;
  2973. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2974. struct dsi_mode_info *timing = &mode->timing;
  2975. struct dsi_display_mode *display_mode;
  2976. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2977. * + 1 byte dcs data command.
  2978. */
  2979. const u32 packet_overhead = 56;
  2980. display_mode = container_of(timing, struct dsi_display_mode, timing);
  2981. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  2982. if (timing->dsc_enabled) {
  2983. nslices = (timing->h_active)/(dsc->slice_width);
  2984. /* (slice width x bit-per-pixel + packet overhead) x
  2985. * number of slices x height x fps / lane
  2986. */
  2987. bits_per_line = ((dsc->slice_width * dsc->bpp) +
  2988. packet_overhead) * nslices;
  2989. bits_per_line = bits_per_line / (config->num_data_lanes);
  2990. min_bitclk_hz = (bits_per_line * timing->v_active *
  2991. timing->refresh_rate);
  2992. } else {
  2993. total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)
  2994. * timing->v_active));
  2995. /* calculate the actual bitclk needed to transfer the frame */
  2996. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  2997. (config->bpp)) / (config->num_data_lanes);
  2998. }
  2999. timing->min_dsi_clk_hz = min_bitclk_hz;
  3000. if (timing->clk_rate_hz) {
  3001. /* adjust the transfer time proportionately for bit clk*/
  3002. timing->dsi_transfer_time_us = mult_frac(frame_time_us,
  3003. min_bitclk_hz, timing->clk_rate_hz);
  3004. } else if (mode->priv_info->mdp_transfer_time_us) {
  3005. timing->dsi_transfer_time_us =
  3006. mode->priv_info->mdp_transfer_time_us;
  3007. } else {
  3008. timing->dsi_transfer_time_us = frame_time_us -
  3009. frame_threshold_us;
  3010. }
  3011. /* Calculate pclk_khz to update modeinfo */
  3012. pclk_rate_hz = mult_frac(min_bitclk_hz, frame_time_us,
  3013. timing->dsi_transfer_time_us);
  3014. display_mode->pixel_clk_khz = mult_frac(pclk_rate_hz,
  3015. config->num_data_lanes, config->bpp);
  3016. do_div(display_mode->pixel_clk_khz, 1000);
  3017. }
  3018. int dsi_panel_get_mode(struct dsi_panel *panel,
  3019. u32 index, struct dsi_display_mode *mode,
  3020. int topology_override)
  3021. {
  3022. struct device_node *timings_np, *child_np;
  3023. struct dsi_parser_utils *utils;
  3024. struct dsi_display_mode_priv_info *prv_info;
  3025. u32 child_idx = 0;
  3026. int rc = 0, num_timings;
  3027. void *utils_data = NULL;
  3028. if (!panel || !mode) {
  3029. DSI_ERR("invalid params\n");
  3030. return -EINVAL;
  3031. }
  3032. mutex_lock(&panel->panel_lock);
  3033. utils = &panel->utils;
  3034. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3035. if (!mode->priv_info) {
  3036. rc = -ENOMEM;
  3037. goto done;
  3038. }
  3039. prv_info = mode->priv_info;
  3040. timings_np = utils->get_child_by_name(utils->data,
  3041. "qcom,mdss-dsi-display-timings");
  3042. if (!timings_np) {
  3043. DSI_ERR("no display timing nodes defined\n");
  3044. rc = -EINVAL;
  3045. goto parse_fail;
  3046. }
  3047. num_timings = utils->get_child_count(timings_np);
  3048. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3049. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3050. rc = -EINVAL;
  3051. goto parse_fail;
  3052. }
  3053. utils_data = utils->data;
  3054. dsi_for_each_child_node(timings_np, child_np) {
  3055. if (index != child_idx++)
  3056. continue;
  3057. utils->data = child_np;
  3058. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3059. if (rc) {
  3060. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3061. goto parse_fail;
  3062. }
  3063. rc = dsi_panel_parse_dsc_params(mode, utils);
  3064. if (rc) {
  3065. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3066. goto parse_fail;
  3067. }
  3068. rc = dsi_panel_parse_topology(prv_info, utils,
  3069. topology_override);
  3070. if (rc) {
  3071. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3072. goto parse_fail;
  3073. }
  3074. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3075. if (rc) {
  3076. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3077. goto parse_fail;
  3078. }
  3079. rc = dsi_panel_parse_jitter_config(mode, utils);
  3080. if (rc)
  3081. DSI_ERR(
  3082. "failed to parse panel jitter config, rc=%d\n", rc);
  3083. rc = dsi_panel_parse_phy_timing(mode, utils);
  3084. if (rc) {
  3085. DSI_ERR(
  3086. "failed to parse panel phy timings, rc=%d\n", rc);
  3087. goto parse_fail;
  3088. }
  3089. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3090. if (rc)
  3091. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3092. if (panel->panel_mode_switch_enabled) {
  3093. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3094. if (rc) {
  3095. DSI_ERR("PMS: failed to parse panel mode\n");
  3096. rc = 0;
  3097. mode->panel_mode = panel->panel_mode;
  3098. }
  3099. } else {
  3100. mode->panel_mode = panel->panel_mode;
  3101. }
  3102. }
  3103. goto done;
  3104. parse_fail:
  3105. kfree(mode->priv_info);
  3106. mode->priv_info = NULL;
  3107. done:
  3108. utils->data = utils_data;
  3109. mutex_unlock(&panel->panel_lock);
  3110. return rc;
  3111. }
  3112. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3113. struct dsi_display_mode *mode,
  3114. struct dsi_host_config *config)
  3115. {
  3116. int rc = 0;
  3117. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3118. if (!panel || !mode || !config) {
  3119. DSI_ERR("invalid params\n");
  3120. return -EINVAL;
  3121. }
  3122. mutex_lock(&panel->panel_lock);
  3123. config->panel_mode = panel->panel_mode;
  3124. memcpy(&config->common_config, &panel->host_config,
  3125. sizeof(config->common_config));
  3126. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3127. memcpy(&config->u.video_engine, &panel->video_config,
  3128. sizeof(config->u.video_engine));
  3129. } else {
  3130. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3131. sizeof(config->u.cmd_engine));
  3132. }
  3133. memcpy(&config->video_timing, &mode->timing,
  3134. sizeof(config->video_timing));
  3135. config->video_timing.mdp_transfer_time_us =
  3136. mode->priv_info->mdp_transfer_time_us;
  3137. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3138. config->video_timing.dsc = &mode->priv_info->dsc;
  3139. if (dyn_clk_caps->dyn_clk_support)
  3140. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3141. else
  3142. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3143. config->esc_clk_rate_hz = 19200000;
  3144. mutex_unlock(&panel->panel_lock);
  3145. return rc;
  3146. }
  3147. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3148. {
  3149. int rc = 0;
  3150. if (!panel) {
  3151. DSI_ERR("invalid params\n");
  3152. return -EINVAL;
  3153. }
  3154. mutex_lock(&panel->panel_lock);
  3155. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3156. if (panel->lp11_init)
  3157. goto error;
  3158. rc = dsi_panel_power_on(panel);
  3159. if (rc) {
  3160. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3161. goto error;
  3162. }
  3163. error:
  3164. mutex_unlock(&panel->panel_lock);
  3165. return rc;
  3166. }
  3167. int dsi_panel_update_pps(struct dsi_panel *panel)
  3168. {
  3169. int rc = 0;
  3170. struct dsi_panel_cmd_set *set = NULL;
  3171. struct dsi_display_mode_priv_info *priv_info = NULL;
  3172. if (!panel || !panel->cur_mode) {
  3173. DSI_ERR("invalid params\n");
  3174. return -EINVAL;
  3175. }
  3176. mutex_lock(&panel->panel_lock);
  3177. priv_info = panel->cur_mode->priv_info;
  3178. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3179. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc, panel->dsc_pps_cmd, 0);
  3180. rc = dsi_panel_create_cmd_packets(panel->dsc_pps_cmd,
  3181. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3182. if (rc) {
  3183. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3184. goto error;
  3185. }
  3186. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3187. if (rc) {
  3188. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3189. panel->name, rc);
  3190. }
  3191. dsi_panel_destroy_cmd_packets(set);
  3192. error:
  3193. mutex_unlock(&panel->panel_lock);
  3194. return rc;
  3195. }
  3196. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3197. {
  3198. int rc = 0;
  3199. if (!panel) {
  3200. DSI_ERR("invalid params\n");
  3201. return -EINVAL;
  3202. }
  3203. mutex_lock(&panel->panel_lock);
  3204. if (!panel->panel_initialized)
  3205. goto exit;
  3206. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3207. if (rc)
  3208. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3209. panel->name, rc);
  3210. exit:
  3211. mutex_unlock(&panel->panel_lock);
  3212. return rc;
  3213. }
  3214. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3215. {
  3216. int rc = 0;
  3217. if (!panel) {
  3218. DSI_ERR("invalid params\n");
  3219. return -EINVAL;
  3220. }
  3221. mutex_lock(&panel->panel_lock);
  3222. if (!panel->panel_initialized)
  3223. goto exit;
  3224. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3225. if (rc)
  3226. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3227. panel->name, rc);
  3228. exit:
  3229. mutex_unlock(&panel->panel_lock);
  3230. return rc;
  3231. }
  3232. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3233. {
  3234. int rc = 0;
  3235. if (!panel) {
  3236. DSI_ERR("invalid params\n");
  3237. return -EINVAL;
  3238. }
  3239. mutex_lock(&panel->panel_lock);
  3240. if (!panel->panel_initialized)
  3241. goto exit;
  3242. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3243. if (rc)
  3244. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3245. panel->name, rc);
  3246. exit:
  3247. mutex_unlock(&panel->panel_lock);
  3248. return rc;
  3249. }
  3250. int dsi_panel_prepare(struct dsi_panel *panel)
  3251. {
  3252. int rc = 0;
  3253. if (!panel) {
  3254. DSI_ERR("invalid params\n");
  3255. return -EINVAL;
  3256. }
  3257. mutex_lock(&panel->panel_lock);
  3258. if (panel->lp11_init) {
  3259. rc = dsi_panel_power_on(panel);
  3260. if (rc) {
  3261. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3262. panel->name, rc);
  3263. goto error;
  3264. }
  3265. }
  3266. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3267. if (rc) {
  3268. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3269. panel->name, rc);
  3270. goto error;
  3271. }
  3272. error:
  3273. mutex_unlock(&panel->panel_lock);
  3274. return rc;
  3275. }
  3276. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3277. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3278. {
  3279. static const int ROI_CMD_LEN = 5;
  3280. int rc = 0;
  3281. /* DTYPE_DCS_LWRITE */
  3282. char *caset, *paset;
  3283. set->cmds = NULL;
  3284. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3285. if (!caset) {
  3286. rc = -ENOMEM;
  3287. goto exit;
  3288. }
  3289. caset[0] = 0x2a;
  3290. caset[1] = (roi->x & 0xFF00) >> 8;
  3291. caset[2] = roi->x & 0xFF;
  3292. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3293. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3294. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3295. if (!paset) {
  3296. rc = -ENOMEM;
  3297. goto error_free_mem;
  3298. }
  3299. paset[0] = 0x2b;
  3300. paset[1] = (roi->y & 0xFF00) >> 8;
  3301. paset[2] = roi->y & 0xFF;
  3302. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3303. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3304. set->type = DSI_CMD_SET_ROI;
  3305. set->state = DSI_CMD_SET_STATE_LP;
  3306. set->count = 2; /* send caset + paset together */
  3307. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3308. if (!set->cmds) {
  3309. rc = -ENOMEM;
  3310. goto error_free_mem;
  3311. }
  3312. set->cmds[0].msg.channel = 0;
  3313. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3314. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3315. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3316. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3317. set->cmds[0].msg.tx_buf = caset;
  3318. set->cmds[0].msg.rx_len = 0;
  3319. set->cmds[0].msg.rx_buf = 0;
  3320. set->cmds[0].msg.wait_ms = 0;
  3321. set->cmds[0].last_command = 0;
  3322. set->cmds[0].post_wait_ms = 0;
  3323. set->cmds[1].msg.channel = 0;
  3324. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3325. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3326. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3327. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3328. set->cmds[1].msg.tx_buf = paset;
  3329. set->cmds[1].msg.rx_len = 0;
  3330. set->cmds[1].msg.rx_buf = 0;
  3331. set->cmds[1].msg.wait_ms = 0;
  3332. set->cmds[1].last_command = 1;
  3333. set->cmds[1].post_wait_ms = 0;
  3334. goto exit;
  3335. error_free_mem:
  3336. kfree(caset);
  3337. kfree(paset);
  3338. kfree(set->cmds);
  3339. exit:
  3340. return rc;
  3341. }
  3342. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3343. int ctrl_idx)
  3344. {
  3345. int rc = 0;
  3346. if (!panel) {
  3347. DSI_ERR("invalid params\n");
  3348. return -EINVAL;
  3349. }
  3350. mutex_lock(&panel->panel_lock);
  3351. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3352. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3353. if (rc)
  3354. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3355. panel->name, rc);
  3356. mutex_unlock(&panel->panel_lock);
  3357. return rc;
  3358. }
  3359. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3360. int ctrl_idx)
  3361. {
  3362. int rc = 0;
  3363. if (!panel) {
  3364. DSI_ERR("invalid params\n");
  3365. return -EINVAL;
  3366. }
  3367. mutex_lock(&panel->panel_lock);
  3368. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3369. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3370. if (rc)
  3371. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3372. panel->name, rc);
  3373. mutex_unlock(&panel->panel_lock);
  3374. return rc;
  3375. }
  3376. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3377. struct dsi_rect *roi)
  3378. {
  3379. int rc = 0;
  3380. struct dsi_panel_cmd_set *set;
  3381. struct dsi_display_mode_priv_info *priv_info;
  3382. if (!panel || !panel->cur_mode) {
  3383. DSI_ERR("Invalid params\n");
  3384. return -EINVAL;
  3385. }
  3386. priv_info = panel->cur_mode->priv_info;
  3387. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3388. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3389. if (rc) {
  3390. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3391. panel->name, rc);
  3392. return rc;
  3393. }
  3394. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3395. roi->x, roi->y, roi->w, roi->h);
  3396. mutex_lock(&panel->panel_lock);
  3397. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3398. if (rc)
  3399. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3400. panel->name, rc);
  3401. mutex_unlock(&panel->panel_lock);
  3402. dsi_panel_destroy_cmd_packets(set);
  3403. dsi_panel_dealloc_cmd_packets(set);
  3404. return rc;
  3405. }
  3406. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3407. {
  3408. int rc = 0;
  3409. if (!panel) {
  3410. DSI_ERR("Invalid params\n");
  3411. return -EINVAL;
  3412. }
  3413. mutex_lock(&panel->panel_lock);
  3414. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3415. if (rc)
  3416. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3417. panel->name, rc);
  3418. mutex_unlock(&panel->panel_lock);
  3419. return rc;
  3420. }
  3421. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3422. {
  3423. int rc = 0;
  3424. if (!panel) {
  3425. DSI_ERR("Invalid params\n");
  3426. return -EINVAL;
  3427. }
  3428. mutex_lock(&panel->panel_lock);
  3429. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3430. if (rc)
  3431. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3432. panel->name, rc);
  3433. mutex_unlock(&panel->panel_lock);
  3434. return rc;
  3435. }
  3436. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3437. {
  3438. int rc = 0;
  3439. if (!panel) {
  3440. DSI_ERR("Invalid params\n");
  3441. return -EINVAL;
  3442. }
  3443. mutex_lock(&panel->panel_lock);
  3444. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3445. if (rc)
  3446. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3447. panel->name, rc);
  3448. mutex_unlock(&panel->panel_lock);
  3449. return rc;
  3450. }
  3451. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3452. {
  3453. int rc = 0;
  3454. if (!panel) {
  3455. DSI_ERR("Invalid params\n");
  3456. return -EINVAL;
  3457. }
  3458. mutex_lock(&panel->panel_lock);
  3459. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3460. if (rc)
  3461. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3462. panel->name, rc);
  3463. mutex_unlock(&panel->panel_lock);
  3464. return rc;
  3465. }
  3466. int dsi_panel_switch(struct dsi_panel *panel)
  3467. {
  3468. int rc = 0;
  3469. if (!panel) {
  3470. DSI_ERR("Invalid params\n");
  3471. return -EINVAL;
  3472. }
  3473. mutex_lock(&panel->panel_lock);
  3474. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3475. if (rc)
  3476. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3477. panel->name, rc);
  3478. mutex_unlock(&panel->panel_lock);
  3479. return rc;
  3480. }
  3481. int dsi_panel_post_switch(struct dsi_panel *panel)
  3482. {
  3483. int rc = 0;
  3484. if (!panel) {
  3485. DSI_ERR("Invalid params\n");
  3486. return -EINVAL;
  3487. }
  3488. mutex_lock(&panel->panel_lock);
  3489. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3490. if (rc)
  3491. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3492. panel->name, rc);
  3493. mutex_unlock(&panel->panel_lock);
  3494. return rc;
  3495. }
  3496. int dsi_panel_enable(struct dsi_panel *panel)
  3497. {
  3498. int rc = 0;
  3499. if (!panel) {
  3500. DSI_ERR("Invalid params\n");
  3501. return -EINVAL;
  3502. }
  3503. mutex_lock(&panel->panel_lock);
  3504. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3505. if (rc)
  3506. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3507. panel->name, rc);
  3508. else
  3509. panel->panel_initialized = true;
  3510. mutex_unlock(&panel->panel_lock);
  3511. return rc;
  3512. }
  3513. int dsi_panel_post_enable(struct dsi_panel *panel)
  3514. {
  3515. int rc = 0;
  3516. if (!panel) {
  3517. DSI_ERR("invalid params\n");
  3518. return -EINVAL;
  3519. }
  3520. mutex_lock(&panel->panel_lock);
  3521. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3522. if (rc) {
  3523. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3524. panel->name, rc);
  3525. goto error;
  3526. }
  3527. error:
  3528. mutex_unlock(&panel->panel_lock);
  3529. return rc;
  3530. }
  3531. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3532. {
  3533. int rc = 0;
  3534. if (!panel) {
  3535. DSI_ERR("invalid params\n");
  3536. return -EINVAL;
  3537. }
  3538. mutex_lock(&panel->panel_lock);
  3539. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3540. if (rc) {
  3541. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3542. panel->name, rc);
  3543. goto error;
  3544. }
  3545. error:
  3546. mutex_unlock(&panel->panel_lock);
  3547. return rc;
  3548. }
  3549. int dsi_panel_disable(struct dsi_panel *panel)
  3550. {
  3551. int rc = 0;
  3552. if (!panel) {
  3553. DSI_ERR("invalid params\n");
  3554. return -EINVAL;
  3555. }
  3556. mutex_lock(&panel->panel_lock);
  3557. /* Avoid sending panel off commands when ESD recovery is underway */
  3558. if (!atomic_read(&panel->esd_recovery_pending)) {
  3559. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3560. if (rc) {
  3561. /*
  3562. * Sending panel off commands may fail when DSI
  3563. * controller is in a bad state. These failures can be
  3564. * ignored since controller will go for full reset on
  3565. * subsequent display enable anyway.
  3566. */
  3567. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3568. panel->name, rc);
  3569. rc = 0;
  3570. }
  3571. }
  3572. panel->panel_initialized = false;
  3573. mutex_unlock(&panel->panel_lock);
  3574. return rc;
  3575. }
  3576. int dsi_panel_unprepare(struct dsi_panel *panel)
  3577. {
  3578. int rc = 0;
  3579. if (!panel) {
  3580. DSI_ERR("invalid params\n");
  3581. return -EINVAL;
  3582. }
  3583. mutex_lock(&panel->panel_lock);
  3584. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3585. if (rc) {
  3586. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3587. panel->name, rc);
  3588. goto error;
  3589. }
  3590. error:
  3591. mutex_unlock(&panel->panel_lock);
  3592. return rc;
  3593. }
  3594. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3595. {
  3596. int rc = 0;
  3597. if (!panel) {
  3598. DSI_ERR("invalid params\n");
  3599. return -EINVAL;
  3600. }
  3601. mutex_lock(&panel->panel_lock);
  3602. rc = dsi_panel_power_off(panel);
  3603. if (rc) {
  3604. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3605. panel->name, rc);
  3606. goto error;
  3607. }
  3608. error:
  3609. mutex_unlock(&panel->panel_lock);
  3610. return rc;
  3611. }