dp_tx.c 101 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "htt.h"
  19. #include "hal_hw_headers.h"
  20. #include "dp_tx.h"
  21. #include "dp_tx_desc.h"
  22. #include "dp_peer.h"
  23. #include "dp_types.h"
  24. #include "hal_tx.h"
  25. #include "qdf_mem.h"
  26. #include "qdf_nbuf.h"
  27. #include "qdf_net_types.h"
  28. #include <wlan_cfg.h>
  29. #ifdef MESH_MODE_SUPPORT
  30. #include "if_meta_hdr.h"
  31. #endif
  32. #define DP_TX_QUEUE_MASK 0x3
  33. /* TODO Add support in TSO */
  34. #define DP_DESC_NUM_FRAG(x) 0
  35. /* disable TQM_BYPASS */
  36. #define TQM_BYPASS_WAR 0
  37. /* invalid peer id for reinject*/
  38. #define DP_INVALID_PEER 0XFFFE
  39. /*mapping between hal encrypt type and cdp_sec_type*/
  40. #define MAX_CDP_SEC_TYPE 12
  41. static const uint8_t sec_type_map[MAX_CDP_SEC_TYPE] = {
  42. HAL_TX_ENCRYPT_TYPE_NO_CIPHER,
  43. HAL_TX_ENCRYPT_TYPE_WEP_128,
  44. HAL_TX_ENCRYPT_TYPE_WEP_104,
  45. HAL_TX_ENCRYPT_TYPE_WEP_40,
  46. HAL_TX_ENCRYPT_TYPE_TKIP_WITH_MIC,
  47. HAL_TX_ENCRYPT_TYPE_TKIP_NO_MIC,
  48. HAL_TX_ENCRYPT_TYPE_AES_CCMP_128,
  49. HAL_TX_ENCRYPT_TYPE_WAPI,
  50. HAL_TX_ENCRYPT_TYPE_AES_CCMP_256,
  51. HAL_TX_ENCRYPT_TYPE_AES_GCMP_128,
  52. HAL_TX_ENCRYPT_TYPE_AES_GCMP_256,
  53. HAL_TX_ENCRYPT_TYPE_WAPI_GCM_SM4};
  54. /**
  55. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  56. * @vdev: DP Virtual device handle
  57. * @nbuf: Buffer pointer
  58. * @queue: queue ids container for nbuf
  59. *
  60. * TX packet queue has 2 instances, software descriptors id and dma ring id
  61. * Based on tx feature and hardware configuration queue id combination could be
  62. * different.
  63. * For example -
  64. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  65. * With no XPS,lock based resource protection, Descriptor pool ids are different
  66. * for each vdev, dma ring id will be same as single pdev id
  67. *
  68. * Return: None
  69. */
  70. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  71. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  72. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  73. {
  74. uint16_t queue_offset = qdf_nbuf_get_queue_mapping(nbuf) & DP_TX_QUEUE_MASK;
  75. queue->desc_pool_id = queue_offset;
  76. queue->ring_id = vdev->pdev->soc->tx_ring_map[queue_offset];
  77. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  78. "%s, pool_id:%d ring_id: %d",
  79. __func__, queue->desc_pool_id, queue->ring_id);
  80. return;
  81. }
  82. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  83. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  84. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  85. {
  86. /* get flow id */
  87. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  88. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  89. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  90. "%s, pool_id:%d ring_id: %d",
  91. __func__, queue->desc_pool_id, queue->ring_id);
  92. return;
  93. }
  94. #endif
  95. #if defined(FEATURE_TSO)
  96. /**
  97. * dp_tx_tso_unmap_segment() - Unmap TSO segment
  98. *
  99. * @soc - core txrx main context
  100. * @tx_desc - Tx software descriptor
  101. */
  102. static void dp_tx_tso_unmap_segment(struct dp_soc *soc,
  103. struct dp_tx_desc_s *tx_desc)
  104. {
  105. TSO_DEBUG("%s: Unmap the tso segment", __func__);
  106. if (qdf_unlikely(!tx_desc->tso_desc)) {
  107. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  108. "%s %d TSO desc is NULL!",
  109. __func__, __LINE__);
  110. qdf_assert(0);
  111. } else if (qdf_unlikely(!tx_desc->tso_num_desc)) {
  112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  113. "%s %d TSO num desc is NULL!",
  114. __func__, __LINE__);
  115. qdf_assert(0);
  116. } else {
  117. bool is_last_seg;
  118. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  119. (struct qdf_tso_num_seg_elem_t *)tx_desc->tso_num_desc;
  120. if (tso_num_desc->num_seg.tso_cmn_num_seg > 1)
  121. is_last_seg = false;
  122. else
  123. is_last_seg = true;
  124. tso_num_desc->num_seg.tso_cmn_num_seg--;
  125. qdf_nbuf_unmap_tso_segment(soc->osdev,
  126. tx_desc->tso_desc, is_last_seg);
  127. }
  128. }
  129. /**
  130. * dp_tx_tso_desc_release() - Release the tso segment and tso_cmn_num_seg
  131. * back to the freelist
  132. *
  133. * @soc - soc device handle
  134. * @tx_desc - Tx software descriptor
  135. */
  136. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  137. struct dp_tx_desc_s *tx_desc)
  138. {
  139. TSO_DEBUG("%s: Free the tso descriptor", __func__);
  140. if (qdf_unlikely(!tx_desc->tso_desc)) {
  141. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  142. "%s %d TSO desc is NULL!",
  143. __func__, __LINE__);
  144. qdf_assert(0);
  145. } else if (qdf_unlikely(!tx_desc->tso_num_desc)) {
  146. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  147. "%s %d TSO num desc is NULL!",
  148. __func__, __LINE__);
  149. qdf_assert(0);
  150. } else {
  151. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  152. (struct qdf_tso_num_seg_elem_t *)tx_desc->tso_num_desc;
  153. /* Add the tso num segment into the free list */
  154. if (tso_num_desc->num_seg.tso_cmn_num_seg == 0) {
  155. dp_tso_num_seg_free(soc, tx_desc->pool_id,
  156. tx_desc->tso_num_desc);
  157. tx_desc->tso_num_desc = NULL;
  158. }
  159. /* Add the tso segment into the free list*/
  160. dp_tx_tso_desc_free(soc,
  161. tx_desc->pool_id, tx_desc->tso_desc);
  162. tx_desc->tso_desc = NULL;
  163. }
  164. }
  165. #else
  166. static void dp_tx_tso_unmap_segment(struct dp_soc *soc,
  167. struct dp_tx_desc_s *tx_desc)
  168. {
  169. }
  170. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  171. struct dp_tx_desc_s *tx_desc)
  172. {
  173. }
  174. #endif
  175. /**
  176. * dp_tx_desc_release() - Release Tx Descriptor
  177. * @tx_desc : Tx Descriptor
  178. * @desc_pool_id: Descriptor Pool ID
  179. *
  180. * Deallocate all resources attached to Tx descriptor and free the Tx
  181. * descriptor.
  182. *
  183. * Return:
  184. */
  185. static void
  186. dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id)
  187. {
  188. struct dp_pdev *pdev = tx_desc->pdev;
  189. struct dp_soc *soc;
  190. uint8_t comp_status = 0;
  191. qdf_assert(pdev);
  192. soc = pdev->soc;
  193. if (tx_desc->frm_type == dp_tx_frm_tso)
  194. dp_tx_tso_desc_release(soc, tx_desc);
  195. if (tx_desc->flags & DP_TX_DESC_FLAG_FRAG)
  196. dp_tx_ext_desc_free(soc, tx_desc->msdu_ext_desc, desc_pool_id);
  197. if (tx_desc->flags & DP_TX_DESC_FLAG_ME)
  198. dp_tx_me_free_buf(tx_desc->pdev, tx_desc->me_buffer);
  199. qdf_atomic_dec(&pdev->num_tx_outstanding);
  200. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  201. qdf_atomic_dec(&pdev->num_tx_exception);
  202. if (HAL_TX_COMP_RELEASE_SOURCE_TQM ==
  203. hal_tx_comp_get_buffer_source(&tx_desc->comp))
  204. comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp);
  205. else
  206. comp_status = HAL_TX_COMP_RELEASE_REASON_FW;
  207. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  208. "Tx Completion Release desc %d status %d outstanding %d",
  209. tx_desc->id, comp_status,
  210. qdf_atomic_read(&pdev->num_tx_outstanding));
  211. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  212. return;
  213. }
  214. /**
  215. * dp_tx_htt_metadata_prepare() - Prepare HTT metadata for special frames
  216. * @vdev: DP vdev Handle
  217. * @nbuf: skb
  218. *
  219. * Prepares and fills HTT metadata in the frame pre-header for special frames
  220. * that should be transmitted using varying transmit parameters.
  221. * There are 2 VDEV modes that currently needs this special metadata -
  222. * 1) Mesh Mode
  223. * 2) DSRC Mode
  224. *
  225. * Return: HTT metadata size
  226. *
  227. */
  228. static uint8_t dp_tx_prepare_htt_metadata(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  229. uint32_t *meta_data)
  230. {
  231. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  232. (struct htt_tx_msdu_desc_ext2_t *) meta_data;
  233. uint8_t htt_desc_size;
  234. /* Size rounded of multiple of 8 bytes */
  235. uint8_t htt_desc_size_aligned;
  236. uint8_t *hdr = NULL;
  237. /*
  238. * Metadata - HTT MSDU Extension header
  239. */
  240. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  241. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  242. if (vdev->mesh_vdev) {
  243. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) <
  244. htt_desc_size_aligned)) {
  245. DP_STATS_INC(vdev,
  246. tx_i.dropped.headroom_insufficient, 1);
  247. return 0;
  248. }
  249. /* Fill and add HTT metaheader */
  250. hdr = qdf_nbuf_push_head(nbuf, htt_desc_size_aligned);
  251. if (hdr == NULL) {
  252. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  253. "Error in filling HTT metadata");
  254. return 0;
  255. }
  256. qdf_mem_copy(hdr, desc_ext, htt_desc_size);
  257. } else if (vdev->opmode == wlan_op_mode_ocb) {
  258. /* Todo - Add support for DSRC */
  259. }
  260. return htt_desc_size_aligned;
  261. }
  262. /**
  263. * dp_tx_prepare_tso_ext_desc() - Prepare MSDU extension descriptor for TSO
  264. * @tso_seg: TSO segment to process
  265. * @ext_desc: Pointer to MSDU extension descriptor
  266. *
  267. * Return: void
  268. */
  269. #if defined(FEATURE_TSO)
  270. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  271. void *ext_desc)
  272. {
  273. uint8_t num_frag;
  274. uint32_t tso_flags;
  275. /*
  276. * Set tso_en, tcp_flags(NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN),
  277. * tcp_flag_mask
  278. *
  279. * Checksum enable flags are set in TCL descriptor and not in Extension
  280. * Descriptor (H/W ignores checksum_en flags in MSDU ext descriptor)
  281. */
  282. tso_flags = *(uint32_t *) &tso_seg->tso_flags;
  283. hal_tx_ext_desc_set_tso_flags(ext_desc, tso_flags);
  284. hal_tx_ext_desc_set_msdu_length(ext_desc, tso_seg->tso_flags.l2_len,
  285. tso_seg->tso_flags.ip_len);
  286. hal_tx_ext_desc_set_tcp_seq(ext_desc, tso_seg->tso_flags.tcp_seq_num);
  287. hal_tx_ext_desc_set_ip_id(ext_desc, tso_seg->tso_flags.ip_id);
  288. for (num_frag = 0; num_frag < tso_seg->num_frags; num_frag++) {
  289. uint32_t lo = 0;
  290. uint32_t hi = 0;
  291. qdf_dmaaddr_to_32s(
  292. tso_seg->tso_frags[num_frag].paddr, &lo, &hi);
  293. hal_tx_ext_desc_set_buffer(ext_desc, num_frag, lo, hi,
  294. tso_seg->tso_frags[num_frag].length);
  295. }
  296. return;
  297. }
  298. #else
  299. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  300. void *ext_desc)
  301. {
  302. return;
  303. }
  304. #endif
  305. #if defined(FEATURE_TSO)
  306. /**
  307. * dp_tx_free_tso_seg() - Loop through the tso segments
  308. * allocated and free them
  309. *
  310. * @soc: soc handle
  311. * @free_seg: list of tso segments
  312. * @msdu_info: msdu descriptor
  313. *
  314. * Return - void
  315. */
  316. static void dp_tx_free_tso_seg(struct dp_soc *soc,
  317. struct qdf_tso_seg_elem_t *free_seg,
  318. struct dp_tx_msdu_info_s *msdu_info)
  319. {
  320. struct qdf_tso_seg_elem_t *next_seg;
  321. while (free_seg) {
  322. next_seg = free_seg->next;
  323. dp_tx_tso_desc_free(soc,
  324. msdu_info->tx_queue.desc_pool_id,
  325. free_seg);
  326. free_seg = next_seg;
  327. }
  328. }
  329. /**
  330. * dp_tx_free_tso_num_seg() - Loop through the tso num segments
  331. * allocated and free them
  332. *
  333. * @soc: soc handle
  334. * @free_seg: list of tso segments
  335. * @msdu_info: msdu descriptor
  336. * Return - void
  337. */
  338. static void dp_tx_free_tso_num_seg(struct dp_soc *soc,
  339. struct qdf_tso_num_seg_elem_t *free_seg,
  340. struct dp_tx_msdu_info_s *msdu_info)
  341. {
  342. struct qdf_tso_num_seg_elem_t *next_seg;
  343. while (free_seg) {
  344. next_seg = free_seg->next;
  345. dp_tso_num_seg_free(soc,
  346. msdu_info->tx_queue.desc_pool_id,
  347. free_seg);
  348. free_seg = next_seg;
  349. }
  350. }
  351. /**
  352. * dp_tx_prepare_tso() - Given a jumbo msdu, prepare the TSO info
  353. * @vdev: virtual device handle
  354. * @msdu: network buffer
  355. * @msdu_info: meta data associated with the msdu
  356. *
  357. * Return: QDF_STATUS_SUCCESS success
  358. */
  359. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  360. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  361. {
  362. struct qdf_tso_seg_elem_t *tso_seg;
  363. int num_seg = qdf_nbuf_get_tso_num_seg(msdu);
  364. struct dp_soc *soc = vdev->pdev->soc;
  365. struct qdf_tso_info_t *tso_info;
  366. struct qdf_tso_num_seg_elem_t *tso_num_seg;
  367. tso_info = &msdu_info->u.tso_info;
  368. tso_info->curr_seg = NULL;
  369. tso_info->tso_seg_list = NULL;
  370. tso_info->num_segs = num_seg;
  371. msdu_info->frm_type = dp_tx_frm_tso;
  372. tso_info->tso_num_seg_list = NULL;
  373. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  374. while (num_seg) {
  375. tso_seg = dp_tx_tso_desc_alloc(
  376. soc, msdu_info->tx_queue.desc_pool_id);
  377. if (tso_seg) {
  378. tso_seg->next = tso_info->tso_seg_list;
  379. tso_info->tso_seg_list = tso_seg;
  380. num_seg--;
  381. } else {
  382. struct qdf_tso_seg_elem_t *free_seg =
  383. tso_info->tso_seg_list;
  384. dp_tx_free_tso_seg(soc, free_seg, msdu_info);
  385. return QDF_STATUS_E_NOMEM;
  386. }
  387. }
  388. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  389. tso_num_seg = dp_tso_num_seg_alloc(soc,
  390. msdu_info->tx_queue.desc_pool_id);
  391. if (tso_num_seg) {
  392. tso_num_seg->next = tso_info->tso_num_seg_list;
  393. tso_info->tso_num_seg_list = tso_num_seg;
  394. } else {
  395. /* Bug: free tso_num_seg and tso_seg */
  396. /* Free the already allocated num of segments */
  397. struct qdf_tso_seg_elem_t *free_seg =
  398. tso_info->tso_seg_list;
  399. TSO_DEBUG(" %s: Failed alloc - Number of segs for a TSO packet",
  400. __func__);
  401. dp_tx_free_tso_seg(soc, free_seg, msdu_info);
  402. return QDF_STATUS_E_NOMEM;
  403. }
  404. msdu_info->num_seg =
  405. qdf_nbuf_get_tso_info(soc->osdev, msdu, tso_info);
  406. TSO_DEBUG(" %s: msdu_info->num_seg: %d", __func__,
  407. msdu_info->num_seg);
  408. if (!(msdu_info->num_seg)) {
  409. dp_tx_free_tso_seg(soc, tso_info->tso_seg_list, msdu_info);
  410. dp_tx_free_tso_num_seg(soc, tso_info->tso_num_seg_list,
  411. msdu_info);
  412. return QDF_STATUS_E_INVAL;
  413. }
  414. tso_info->curr_seg = tso_info->tso_seg_list;
  415. return QDF_STATUS_SUCCESS;
  416. }
  417. #else
  418. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  419. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  420. {
  421. return QDF_STATUS_E_NOMEM;
  422. }
  423. #endif
  424. /**
  425. * dp_tx_prepare_ext_desc() - Allocate and prepare MSDU extension descriptor
  426. * @vdev: DP Vdev handle
  427. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  428. * @desc_pool_id: Descriptor Pool ID
  429. *
  430. * Return:
  431. */
  432. static
  433. struct dp_tx_ext_desc_elem_s *dp_tx_prepare_ext_desc(struct dp_vdev *vdev,
  434. struct dp_tx_msdu_info_s *msdu_info, uint8_t desc_pool_id)
  435. {
  436. uint8_t i;
  437. uint8_t cached_ext_desc[HAL_TX_EXT_DESC_WITH_META_DATA];
  438. struct dp_tx_seg_info_s *seg_info;
  439. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  440. struct dp_soc *soc = vdev->pdev->soc;
  441. /* Allocate an extension descriptor */
  442. msdu_ext_desc = dp_tx_ext_desc_alloc(soc, desc_pool_id);
  443. qdf_mem_zero(&cached_ext_desc[0], HAL_TX_EXT_DESC_WITH_META_DATA);
  444. if (!msdu_ext_desc) {
  445. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  446. return NULL;
  447. }
  448. if (msdu_info->exception_fw &&
  449. qdf_unlikely(vdev->mesh_vdev)) {
  450. qdf_mem_copy(&cached_ext_desc[HAL_TX_EXTENSION_DESC_LEN_BYTES],
  451. &msdu_info->meta_data[0],
  452. sizeof(struct htt_tx_msdu_desc_ext2_t));
  453. qdf_atomic_inc(&vdev->pdev->num_tx_exception);
  454. }
  455. switch (msdu_info->frm_type) {
  456. case dp_tx_frm_sg:
  457. case dp_tx_frm_me:
  458. case dp_tx_frm_raw:
  459. seg_info = msdu_info->u.sg_info.curr_seg;
  460. /* Update the buffer pointers in MSDU Extension Descriptor */
  461. for (i = 0; i < seg_info->frag_cnt; i++) {
  462. hal_tx_ext_desc_set_buffer(&cached_ext_desc[0], i,
  463. seg_info->frags[i].paddr_lo,
  464. seg_info->frags[i].paddr_hi,
  465. seg_info->frags[i].len);
  466. }
  467. break;
  468. case dp_tx_frm_tso:
  469. dp_tx_prepare_tso_ext_desc(&msdu_info->u.tso_info.curr_seg->seg,
  470. &cached_ext_desc[0]);
  471. break;
  472. default:
  473. break;
  474. }
  475. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  476. cached_ext_desc, HAL_TX_EXT_DESC_WITH_META_DATA);
  477. hal_tx_ext_desc_sync(&cached_ext_desc[0],
  478. msdu_ext_desc->vaddr);
  479. return msdu_ext_desc;
  480. }
  481. /**
  482. * dp_tx_trace_pkt() - Trace TX packet at DP layer
  483. *
  484. * @skb: skb to be traced
  485. * @msdu_id: msdu_id of the packet
  486. * @vdev_id: vdev_id of the packet
  487. *
  488. * Return: None
  489. */
  490. static void dp_tx_trace_pkt(qdf_nbuf_t skb, uint16_t msdu_id,
  491. uint8_t vdev_id)
  492. {
  493. QDF_NBUF_CB_TX_PACKET_TRACK(skb) = QDF_NBUF_TX_PKT_DATA_TRACK;
  494. QDF_NBUF_CB_TX_DP_TRACE(skb) = 1;
  495. DPTRACE(qdf_dp_trace_ptr(skb,
  496. QDF_DP_TRACE_LI_DP_TX_PACKET_PTR_RECORD,
  497. QDF_TRACE_DEFAULT_PDEV_ID,
  498. qdf_nbuf_data_addr(skb),
  499. sizeof(qdf_nbuf_data(skb)),
  500. msdu_id, vdev_id));
  501. qdf_dp_trace_log_pkt(vdev_id, skb, QDF_TX, QDF_TRACE_DEFAULT_PDEV_ID);
  502. DPTRACE(qdf_dp_trace_data_pkt(skb, QDF_TRACE_DEFAULT_PDEV_ID,
  503. QDF_DP_TRACE_LI_DP_TX_PACKET_RECORD,
  504. msdu_id, QDF_TX));
  505. }
  506. /**
  507. * dp_tx_desc_prepare_single - Allocate and prepare Tx descriptor
  508. * @vdev: DP vdev handle
  509. * @nbuf: skb
  510. * @desc_pool_id: Descriptor pool ID
  511. * @meta_data: Metadata to the fw
  512. * @tx_exc_metadata: Handle that holds exception path metadata
  513. * Allocate and prepare Tx descriptor with msdu information.
  514. *
  515. * Return: Pointer to Tx Descriptor on success,
  516. * NULL on failure
  517. */
  518. static
  519. struct dp_tx_desc_s *dp_tx_prepare_desc_single(struct dp_vdev *vdev,
  520. qdf_nbuf_t nbuf, uint8_t desc_pool_id,
  521. struct dp_tx_msdu_info_s *msdu_info,
  522. struct cdp_tx_exception_metadata *tx_exc_metadata)
  523. {
  524. uint8_t align_pad;
  525. uint8_t is_exception = 0;
  526. uint8_t htt_hdr_size;
  527. struct ether_header *eh;
  528. struct dp_tx_desc_s *tx_desc;
  529. struct dp_pdev *pdev = vdev->pdev;
  530. struct dp_soc *soc = pdev->soc;
  531. /* Allocate software Tx descriptor */
  532. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  533. if (qdf_unlikely(!tx_desc)) {
  534. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  535. return NULL;
  536. }
  537. /* Flow control/Congestion Control counters */
  538. qdf_atomic_inc(&pdev->num_tx_outstanding);
  539. /* Initialize the SW tx descriptor */
  540. tx_desc->nbuf = nbuf;
  541. tx_desc->frm_type = dp_tx_frm_std;
  542. tx_desc->tx_encap_type = (tx_exc_metadata ?
  543. tx_exc_metadata->tx_encap_type : vdev->tx_encap_type);
  544. tx_desc->vdev = vdev;
  545. tx_desc->pdev = pdev;
  546. tx_desc->msdu_ext_desc = NULL;
  547. tx_desc->pkt_offset = 0;
  548. dp_tx_trace_pkt(nbuf, tx_desc->id, vdev->vdev_id);
  549. /* Reset the control block */
  550. qdf_nbuf_reset_ctxt(nbuf);
  551. /*
  552. * For special modes (vdev_type == ocb or mesh), data frames should be
  553. * transmitted using varying transmit parameters (tx spec) which include
  554. * transmit rate, power, priority, channel, channel bandwidth , nss etc.
  555. * These are filled in HTT MSDU descriptor and sent in frame pre-header.
  556. * These frames are sent as exception packets to firmware.
  557. *
  558. * HW requirement is that metadata should always point to a
  559. * 8-byte aligned address. So we add alignment pad to start of buffer.
  560. * HTT Metadata should be ensured to be multiple of 8-bytes,
  561. * to get 8-byte aligned start address along with align_pad added
  562. *
  563. * |-----------------------------|
  564. * | |
  565. * |-----------------------------| <-----Buffer Pointer Address given
  566. * | | ^ in HW descriptor (aligned)
  567. * | HTT Metadata | |
  568. * | | |
  569. * | | | Packet Offset given in descriptor
  570. * | | |
  571. * |-----------------------------| |
  572. * | Alignment Pad | v
  573. * |-----------------------------| <----- Actual buffer start address
  574. * | SKB Data | (Unaligned)
  575. * | |
  576. * | |
  577. * | |
  578. * | |
  579. * | |
  580. * |-----------------------------|
  581. */
  582. if (qdf_unlikely((msdu_info->exception_fw)) ||
  583. (vdev->opmode == wlan_op_mode_ocb)) {
  584. align_pad = ((unsigned long) qdf_nbuf_data(nbuf)) & 0x7;
  585. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) < align_pad)) {
  586. DP_STATS_INC(vdev,
  587. tx_i.dropped.headroom_insufficient, 1);
  588. goto failure;
  589. }
  590. if (qdf_nbuf_push_head(nbuf, align_pad) == NULL) {
  591. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  592. "qdf_nbuf_push_head failed");
  593. goto failure;
  594. }
  595. htt_hdr_size = dp_tx_prepare_htt_metadata(vdev, nbuf,
  596. msdu_info->meta_data);
  597. if (htt_hdr_size == 0)
  598. goto failure;
  599. tx_desc->pkt_offset = align_pad + htt_hdr_size;
  600. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  601. is_exception = 1;
  602. }
  603. if (qdf_unlikely(QDF_STATUS_SUCCESS !=
  604. qdf_nbuf_map(soc->osdev, nbuf,
  605. QDF_DMA_TO_DEVICE))) {
  606. /* Handle failure */
  607. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  608. "qdf_nbuf_map failed");
  609. DP_STATS_INC(vdev, tx_i.dropped.dma_error, 1);
  610. goto failure;
  611. }
  612. if (qdf_unlikely(vdev->nawds_enabled)) {
  613. eh = (struct ether_header *) qdf_nbuf_data(nbuf);
  614. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  615. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  616. is_exception = 1;
  617. }
  618. }
  619. #if !TQM_BYPASS_WAR
  620. if (is_exception || tx_exc_metadata)
  621. #endif
  622. {
  623. /* Temporary WAR due to TQM VP issues */
  624. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  625. qdf_atomic_inc(&pdev->num_tx_exception);
  626. }
  627. return tx_desc;
  628. failure:
  629. dp_tx_desc_release(tx_desc, desc_pool_id);
  630. return NULL;
  631. }
  632. /**
  633. * dp_tx_prepare_desc() - Allocate and prepare Tx descriptor for multisegment frame
  634. * @vdev: DP vdev handle
  635. * @nbuf: skb
  636. * @msdu_info: Info to be setup in MSDU descriptor and MSDU extension descriptor
  637. * @desc_pool_id : Descriptor Pool ID
  638. *
  639. * Allocate and prepare Tx descriptor with msdu and fragment descritor
  640. * information. For frames wth fragments, allocate and prepare
  641. * an MSDU extension descriptor
  642. *
  643. * Return: Pointer to Tx Descriptor on success,
  644. * NULL on failure
  645. */
  646. static struct dp_tx_desc_s *dp_tx_prepare_desc(struct dp_vdev *vdev,
  647. qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info,
  648. uint8_t desc_pool_id)
  649. {
  650. struct dp_tx_desc_s *tx_desc;
  651. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  652. struct dp_pdev *pdev = vdev->pdev;
  653. struct dp_soc *soc = pdev->soc;
  654. /* Allocate software Tx descriptor */
  655. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  656. if (!tx_desc) {
  657. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  658. return NULL;
  659. }
  660. /* Flow control/Congestion Control counters */
  661. qdf_atomic_inc(&pdev->num_tx_outstanding);
  662. /* Initialize the SW tx descriptor */
  663. tx_desc->nbuf = nbuf;
  664. tx_desc->frm_type = msdu_info->frm_type;
  665. tx_desc->tx_encap_type = vdev->tx_encap_type;
  666. tx_desc->vdev = vdev;
  667. tx_desc->pdev = pdev;
  668. tx_desc->pkt_offset = 0;
  669. tx_desc->tso_desc = msdu_info->u.tso_info.curr_seg;
  670. tx_desc->tso_num_desc = msdu_info->u.tso_info.tso_num_seg_list;
  671. dp_tx_trace_pkt(nbuf, tx_desc->id, vdev->vdev_id);
  672. /* Reset the control block */
  673. qdf_nbuf_reset_ctxt(nbuf);
  674. /* Handle scattered frames - TSO/SG/ME */
  675. /* Allocate and prepare an extension descriptor for scattered frames */
  676. msdu_ext_desc = dp_tx_prepare_ext_desc(vdev, msdu_info, desc_pool_id);
  677. if (!msdu_ext_desc) {
  678. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  679. "%s Tx Extension Descriptor Alloc Fail",
  680. __func__);
  681. goto failure;
  682. }
  683. #if TQM_BYPASS_WAR
  684. /* Temporary WAR due to TQM VP issues */
  685. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  686. qdf_atomic_inc(&pdev->num_tx_exception);
  687. #endif
  688. if (qdf_unlikely(msdu_info->exception_fw))
  689. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  690. tx_desc->msdu_ext_desc = msdu_ext_desc;
  691. tx_desc->flags |= DP_TX_DESC_FLAG_FRAG;
  692. return tx_desc;
  693. failure:
  694. dp_tx_desc_release(tx_desc, desc_pool_id);
  695. return NULL;
  696. }
  697. /**
  698. * dp_tx_prepare_raw() - Prepare RAW packet TX
  699. * @vdev: DP vdev handle
  700. * @nbuf: buffer pointer
  701. * @seg_info: Pointer to Segment info Descriptor to be prepared
  702. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension
  703. * descriptor
  704. *
  705. * Return:
  706. */
  707. static qdf_nbuf_t dp_tx_prepare_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  708. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  709. {
  710. qdf_nbuf_t curr_nbuf = NULL;
  711. uint16_t total_len = 0;
  712. qdf_dma_addr_t paddr;
  713. int32_t i;
  714. int32_t mapped_buf_num = 0;
  715. struct dp_tx_sg_info_s *sg_info = &msdu_info->u.sg_info;
  716. qdf_dot3_qosframe_t *qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  717. DP_STATS_INC_PKT(vdev, tx_i.raw.raw_pkt, 1, qdf_nbuf_len(nbuf));
  718. /* SWAR for HW: Enable WEP bit in the AMSDU frames for RAW mode */
  719. if (vdev->raw_mode_war &&
  720. (qos_wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS))
  721. qos_wh->i_fc[1] |= IEEE80211_FC1_WEP;
  722. for (curr_nbuf = nbuf, i = 0; curr_nbuf;
  723. curr_nbuf = qdf_nbuf_next(curr_nbuf), i++) {
  724. if (QDF_STATUS_SUCCESS != qdf_nbuf_map(vdev->osdev, curr_nbuf,
  725. QDF_DMA_TO_DEVICE)) {
  726. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  727. "%s dma map error ", __func__);
  728. DP_STATS_INC(vdev, tx_i.raw.dma_map_error, 1);
  729. mapped_buf_num = i;
  730. goto error;
  731. }
  732. paddr = qdf_nbuf_get_frag_paddr(curr_nbuf, 0);
  733. seg_info->frags[i].paddr_lo = paddr;
  734. seg_info->frags[i].paddr_hi = ((uint64_t)paddr >> 32);
  735. seg_info->frags[i].len = qdf_nbuf_len(curr_nbuf);
  736. seg_info->frags[i].vaddr = (void *) curr_nbuf;
  737. total_len += qdf_nbuf_len(curr_nbuf);
  738. }
  739. seg_info->frag_cnt = i;
  740. seg_info->total_len = total_len;
  741. seg_info->next = NULL;
  742. sg_info->curr_seg = seg_info;
  743. msdu_info->frm_type = dp_tx_frm_raw;
  744. msdu_info->num_seg = 1;
  745. return nbuf;
  746. error:
  747. i = 0;
  748. while (nbuf) {
  749. curr_nbuf = nbuf;
  750. if (i < mapped_buf_num) {
  751. qdf_nbuf_unmap(vdev->osdev, curr_nbuf, QDF_DMA_TO_DEVICE);
  752. i++;
  753. }
  754. nbuf = qdf_nbuf_next(nbuf);
  755. qdf_nbuf_free(curr_nbuf);
  756. }
  757. return NULL;
  758. }
  759. /**
  760. * dp_tx_hw_enqueue() - Enqueue to TCL HW for transmit
  761. * @soc: DP Soc Handle
  762. * @vdev: DP vdev handle
  763. * @tx_desc: Tx Descriptor Handle
  764. * @tid: TID from HLOS for overriding default DSCP-TID mapping
  765. * @fw_metadata: Metadata to send to Target Firmware along with frame
  766. * @ring_id: Ring ID of H/W ring to which we enqueue the packet
  767. * @tx_exc_metadata: Handle that holds exception path meta data
  768. *
  769. * Gets the next free TCL HW DMA descriptor and sets up required parameters
  770. * from software Tx descriptor
  771. *
  772. * Return:
  773. */
  774. static QDF_STATUS dp_tx_hw_enqueue(struct dp_soc *soc, struct dp_vdev *vdev,
  775. struct dp_tx_desc_s *tx_desc, uint8_t tid,
  776. uint16_t fw_metadata, uint8_t ring_id,
  777. struct cdp_tx_exception_metadata
  778. *tx_exc_metadata)
  779. {
  780. uint8_t type;
  781. uint16_t length;
  782. void *hal_tx_desc, *hal_tx_desc_cached;
  783. qdf_dma_addr_t dma_addr;
  784. uint8_t cached_desc[HAL_TX_DESC_LEN_BYTES];
  785. enum cdp_sec_type sec_type = (tx_exc_metadata ?
  786. tx_exc_metadata->sec_type : vdev->sec_type);
  787. /* Return Buffer Manager ID */
  788. uint8_t bm_id = ring_id;
  789. void *hal_srng = soc->tcl_data_ring[ring_id].hal_srng;
  790. hal_tx_desc_cached = (void *) cached_desc;
  791. qdf_mem_zero_outline(hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  792. if (tx_desc->flags & DP_TX_DESC_FLAG_FRAG) {
  793. length = HAL_TX_EXT_DESC_WITH_META_DATA;
  794. type = HAL_TX_BUF_TYPE_EXT_DESC;
  795. dma_addr = tx_desc->msdu_ext_desc->paddr;
  796. } else {
  797. length = qdf_nbuf_len(tx_desc->nbuf) - tx_desc->pkt_offset;
  798. type = HAL_TX_BUF_TYPE_BUFFER;
  799. dma_addr = qdf_nbuf_mapped_paddr_get(tx_desc->nbuf);
  800. }
  801. hal_tx_desc_set_fw_metadata(hal_tx_desc_cached, fw_metadata);
  802. hal_tx_desc_set_buf_addr(hal_tx_desc_cached,
  803. dma_addr, bm_id, tx_desc->id,
  804. type, soc->hal_soc);
  805. if (!dp_tx_is_desc_id_valid(soc, tx_desc->id))
  806. return QDF_STATUS_E_RESOURCES;
  807. hal_tx_desc_set_buf_length(hal_tx_desc_cached, length);
  808. hal_tx_desc_set_buf_offset(hal_tx_desc_cached, tx_desc->pkt_offset);
  809. hal_tx_desc_set_encap_type(hal_tx_desc_cached, tx_desc->tx_encap_type);
  810. hal_tx_desc_set_lmac_id(soc->hal_soc, hal_tx_desc_cached,
  811. vdev->pdev->lmac_id);
  812. hal_tx_desc_set_search_type(soc->hal_soc, hal_tx_desc_cached,
  813. vdev->search_type);
  814. hal_tx_desc_set_search_index(soc->hal_soc, hal_tx_desc_cached,
  815. vdev->bss_ast_hash);
  816. hal_tx_desc_set_dscp_tid_table_id(soc->hal_soc, hal_tx_desc_cached,
  817. vdev->dscp_tid_map_id);
  818. hal_tx_desc_set_encrypt_type(hal_tx_desc_cached,
  819. sec_type_map[sec_type]);
  820. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  821. "%s length:%d , type = %d, dma_addr %llx, offset %d desc id %u",
  822. __func__, length, type, (uint64_t)dma_addr,
  823. tx_desc->pkt_offset, tx_desc->id);
  824. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  825. hal_tx_desc_set_to_fw(hal_tx_desc_cached, 1);
  826. hal_tx_desc_set_addr_search_flags(hal_tx_desc_cached,
  827. vdev->hal_desc_addr_search_flags);
  828. /* verify checksum offload configuration*/
  829. if ((wlan_cfg_get_checksum_offload(soc->wlan_cfg_ctx)) &&
  830. ((qdf_nbuf_get_tx_cksum(tx_desc->nbuf) == QDF_NBUF_TX_CKSUM_TCP_UDP)
  831. || qdf_nbuf_is_tso(tx_desc->nbuf))) {
  832. hal_tx_desc_set_l3_checksum_en(hal_tx_desc_cached, 1);
  833. hal_tx_desc_set_l4_checksum_en(hal_tx_desc_cached, 1);
  834. }
  835. if (tid != HTT_TX_EXT_TID_INVALID)
  836. hal_tx_desc_set_hlos_tid(hal_tx_desc_cached, tid);
  837. if (tx_desc->flags & DP_TX_DESC_FLAG_MESH)
  838. hal_tx_desc_set_mesh_en(hal_tx_desc_cached, 1);
  839. /* Sync cached descriptor with HW */
  840. hal_tx_desc = hal_srng_src_get_next(soc->hal_soc, hal_srng);
  841. if (!hal_tx_desc) {
  842. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  843. "%s TCL ring full ring_id:%d", __func__, ring_id);
  844. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  845. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  846. return QDF_STATUS_E_RESOURCES;
  847. }
  848. tx_desc->flags |= DP_TX_DESC_FLAG_QUEUED_TX;
  849. hal_tx_desc_sync(hal_tx_desc_cached, hal_tx_desc);
  850. DP_STATS_INC_PKT(vdev, tx_i.processed, 1, length);
  851. return QDF_STATUS_SUCCESS;
  852. }
  853. /**
  854. * dp_cce_classify() - Classify the frame based on CCE rules
  855. * @vdev: DP vdev handle
  856. * @nbuf: skb
  857. *
  858. * Classify frames based on CCE rules
  859. * Return: bool( true if classified,
  860. * else false)
  861. */
  862. static bool dp_cce_classify(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  863. {
  864. struct ether_header *eh = NULL;
  865. uint16_t ether_type;
  866. qdf_llc_t *llcHdr;
  867. qdf_nbuf_t nbuf_clone = NULL;
  868. qdf_dot3_qosframe_t *qos_wh = NULL;
  869. /* for mesh packets don't do any classification */
  870. if (qdf_unlikely(vdev->mesh_vdev))
  871. return false;
  872. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  873. eh = (struct ether_header *) qdf_nbuf_data(nbuf);
  874. ether_type = eh->ether_type;
  875. llcHdr = (qdf_llc_t *)(nbuf->data +
  876. sizeof(struct ether_header));
  877. } else {
  878. qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  879. /* For encrypted packets don't do any classification */
  880. if (qdf_unlikely(qos_wh->i_fc[1] & IEEE80211_FC1_WEP))
  881. return false;
  882. if (qdf_unlikely(qos_wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS)) {
  883. if (qdf_unlikely(
  884. qos_wh->i_fc[1] & QDF_IEEE80211_FC1_TODS &&
  885. qos_wh->i_fc[1] & QDF_IEEE80211_FC1_FROMDS)) {
  886. ether_type = *(uint16_t *)(nbuf->data
  887. + QDF_IEEE80211_4ADDR_HDR_LEN
  888. + sizeof(qdf_llc_t)
  889. - sizeof(ether_type));
  890. llcHdr = (qdf_llc_t *)(nbuf->data +
  891. QDF_IEEE80211_4ADDR_HDR_LEN);
  892. } else {
  893. ether_type = *(uint16_t *)(nbuf->data
  894. + QDF_IEEE80211_3ADDR_HDR_LEN
  895. + sizeof(qdf_llc_t)
  896. - sizeof(ether_type));
  897. llcHdr = (qdf_llc_t *)(nbuf->data +
  898. QDF_IEEE80211_3ADDR_HDR_LEN);
  899. }
  900. if (qdf_unlikely(DP_FRAME_IS_SNAP(llcHdr)
  901. && (ether_type ==
  902. qdf_htons(QDF_NBUF_TRAC_EAPOL_ETH_TYPE)))) {
  903. DP_STATS_INC(vdev, tx_i.cce_classified_raw, 1);
  904. return true;
  905. }
  906. }
  907. return false;
  908. }
  909. if (qdf_unlikely(DP_FRAME_IS_SNAP(llcHdr))) {
  910. ether_type = *(uint16_t *)(nbuf->data + 2*ETHER_ADDR_LEN +
  911. sizeof(*llcHdr));
  912. nbuf_clone = qdf_nbuf_clone(nbuf);
  913. if (qdf_unlikely(nbuf_clone)) {
  914. qdf_nbuf_pull_head(nbuf_clone, sizeof(*llcHdr));
  915. if (ether_type == htons(ETHERTYPE_8021Q)) {
  916. qdf_nbuf_pull_head(nbuf_clone,
  917. sizeof(qdf_net_vlanhdr_t));
  918. }
  919. }
  920. } else {
  921. if (ether_type == htons(ETHERTYPE_8021Q)) {
  922. nbuf_clone = qdf_nbuf_clone(nbuf);
  923. if (qdf_unlikely(nbuf_clone)) {
  924. qdf_nbuf_pull_head(nbuf_clone,
  925. sizeof(qdf_net_vlanhdr_t));
  926. }
  927. }
  928. }
  929. if (qdf_unlikely(nbuf_clone))
  930. nbuf = nbuf_clone;
  931. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf)
  932. || qdf_nbuf_is_ipv4_arp_pkt(nbuf)
  933. || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)
  934. || qdf_nbuf_is_ipv4_tdls_pkt(nbuf)
  935. || (qdf_nbuf_is_ipv4_pkt(nbuf)
  936. && qdf_nbuf_is_ipv4_dhcp_pkt(nbuf))
  937. || (qdf_nbuf_is_ipv6_pkt(nbuf) &&
  938. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))) {
  939. if (qdf_unlikely(nbuf_clone != NULL))
  940. qdf_nbuf_free(nbuf_clone);
  941. return true;
  942. }
  943. if (qdf_unlikely(nbuf_clone != NULL))
  944. qdf_nbuf_free(nbuf_clone);
  945. return false;
  946. }
  947. /**
  948. * dp_tx_classify_tid() - Obtain TID to be used for this frame
  949. * @vdev: DP vdev handle
  950. * @nbuf: skb
  951. *
  952. * Extract the DSCP or PCP information from frame and map into TID value.
  953. * Software based TID classification is required when more than 2 DSCP-TID
  954. * mapping tables are needed.
  955. * Hardware supports 2 DSCP-TID mapping tables
  956. *
  957. * Return: void
  958. */
  959. static void dp_tx_classify_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  960. struct dp_tx_msdu_info_s *msdu_info)
  961. {
  962. uint8_t tos = 0, dscp_tid_override = 0;
  963. uint8_t *hdr_ptr, *L3datap;
  964. uint8_t is_mcast = 0;
  965. struct ether_header *eh = NULL;
  966. qdf_ethervlan_header_t *evh = NULL;
  967. uint16_t ether_type;
  968. qdf_llc_t *llcHdr;
  969. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  970. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  971. if (pdev->soc && vdev->dscp_tid_map_id < pdev->soc->num_hw_dscp_tid_map)
  972. return;
  973. /* for mesh packets don't do any classification */
  974. if (qdf_unlikely(vdev->mesh_vdev))
  975. return;
  976. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  977. eh = (struct ether_header *) nbuf->data;
  978. hdr_ptr = eh->ether_dhost;
  979. L3datap = hdr_ptr + sizeof(struct ether_header);
  980. } else {
  981. qdf_dot3_qosframe_t *qos_wh =
  982. (qdf_dot3_qosframe_t *) nbuf->data;
  983. msdu_info->tid = qos_wh->i_fc[0] & DP_FC0_SUBTYPE_QOS ?
  984. qos_wh->i_qos[0] & DP_QOS_TID : 0;
  985. return;
  986. }
  987. is_mcast = DP_FRAME_IS_MULTICAST(hdr_ptr);
  988. ether_type = eh->ether_type;
  989. llcHdr = (qdf_llc_t *)(nbuf->data + sizeof(struct ether_header));
  990. /*
  991. * Check if packet is dot3 or eth2 type.
  992. */
  993. if (DP_FRAME_IS_LLC(ether_type) && DP_FRAME_IS_SNAP(llcHdr)) {
  994. ether_type = (uint16_t)*(nbuf->data + 2*ETHER_ADDR_LEN +
  995. sizeof(*llcHdr));
  996. if (ether_type == htons(ETHERTYPE_8021Q)) {
  997. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t) +
  998. sizeof(*llcHdr);
  999. ether_type = (uint16_t)*(nbuf->data + 2*ETHER_ADDR_LEN
  1000. + sizeof(*llcHdr) +
  1001. sizeof(qdf_net_vlanhdr_t));
  1002. } else {
  1003. L3datap = hdr_ptr + sizeof(struct ether_header) +
  1004. sizeof(*llcHdr);
  1005. }
  1006. } else {
  1007. if (ether_type == htons(ETHERTYPE_8021Q)) {
  1008. evh = (qdf_ethervlan_header_t *) eh;
  1009. ether_type = evh->ether_type;
  1010. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t);
  1011. }
  1012. }
  1013. /*
  1014. * Find priority from IP TOS DSCP field
  1015. */
  1016. if (qdf_nbuf_is_ipv4_pkt(nbuf)) {
  1017. qdf_net_iphdr_t *ip = (qdf_net_iphdr_t *) L3datap;
  1018. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) {
  1019. /* Only for unicast frames */
  1020. if (!is_mcast) {
  1021. /* send it on VO queue */
  1022. msdu_info->tid = DP_VO_TID;
  1023. }
  1024. } else {
  1025. /*
  1026. * IP frame: exclude ECN bits 0-1 and map DSCP bits 2-7
  1027. * from TOS byte.
  1028. */
  1029. tos = ip->ip_tos;
  1030. dscp_tid_override = 1;
  1031. }
  1032. } else if (qdf_nbuf_is_ipv6_pkt(nbuf)) {
  1033. /* TODO
  1034. * use flowlabel
  1035. *igmpmld cases to be handled in phase 2
  1036. */
  1037. unsigned long ver_pri_flowlabel;
  1038. unsigned long pri;
  1039. ver_pri_flowlabel = *(unsigned long *) L3datap;
  1040. pri = (ntohl(ver_pri_flowlabel) & IPV6_FLOWINFO_PRIORITY) >>
  1041. DP_IPV6_PRIORITY_SHIFT;
  1042. tos = pri;
  1043. dscp_tid_override = 1;
  1044. } else if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1045. msdu_info->tid = DP_VO_TID;
  1046. else if (qdf_nbuf_is_ipv4_arp_pkt(nbuf)) {
  1047. /* Only for unicast frames */
  1048. if (!is_mcast) {
  1049. /* send ucast arp on VO queue */
  1050. msdu_info->tid = DP_VO_TID;
  1051. }
  1052. }
  1053. /*
  1054. * Assign all MCAST packets to BE
  1055. */
  1056. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1057. if (is_mcast) {
  1058. tos = 0;
  1059. dscp_tid_override = 1;
  1060. }
  1061. }
  1062. if (dscp_tid_override == 1) {
  1063. tos = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  1064. msdu_info->tid = pdev->dscp_tid_map[vdev->dscp_tid_map_id][tos];
  1065. }
  1066. return;
  1067. }
  1068. #ifdef CONVERGED_TDLS_ENABLE
  1069. /**
  1070. * dp_tx_update_tdls_flags() - Update descriptor flags for TDLS frame
  1071. * @tx_desc: TX descriptor
  1072. *
  1073. * Return: None
  1074. */
  1075. static void dp_tx_update_tdls_flags(struct dp_tx_desc_s *tx_desc)
  1076. {
  1077. if (tx_desc->vdev) {
  1078. if (tx_desc->vdev->is_tdls_frame)
  1079. tx_desc->flags |= DP_TX_DESC_FLAG_TDLS_FRAME;
  1080. tx_desc->vdev->is_tdls_frame = false;
  1081. }
  1082. }
  1083. /**
  1084. * dp_non_std_tx_comp_free_buff() - Free the non std tx packet buffer
  1085. * @tx_desc: TX descriptor
  1086. * @vdev: datapath vdev handle
  1087. *
  1088. * Return: None
  1089. */
  1090. static void dp_non_std_tx_comp_free_buff(struct dp_tx_desc_s *tx_desc,
  1091. struct dp_vdev *vdev)
  1092. {
  1093. struct hal_tx_completion_status ts = {0};
  1094. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1095. hal_tx_comp_get_status(&tx_desc->comp, &ts, vdev->pdev->soc->hal_soc);
  1096. if (vdev->tx_non_std_data_callback.func) {
  1097. qdf_nbuf_set_next(tx_desc->nbuf, NULL);
  1098. vdev->tx_non_std_data_callback.func(
  1099. vdev->tx_non_std_data_callback.ctxt,
  1100. nbuf, ts.status);
  1101. return;
  1102. }
  1103. }
  1104. #endif
  1105. /**
  1106. * dp_tx_send_msdu_single() - Setup descriptor and enqueue single MSDU to TCL
  1107. * @vdev: DP vdev handle
  1108. * @nbuf: skb
  1109. * @tid: TID from HLOS for overriding default DSCP-TID mapping
  1110. * @meta_data: Metadata to the fw
  1111. * @tx_q: Tx queue to be used for this Tx frame
  1112. * @peer_id: peer_id of the peer in case of NAWDS frames
  1113. * @tx_exc_metadata: Handle that holds exception path metadata
  1114. *
  1115. * Return: NULL on success,
  1116. * nbuf when it fails to send
  1117. */
  1118. static qdf_nbuf_t dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1119. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  1120. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1121. {
  1122. struct dp_pdev *pdev = vdev->pdev;
  1123. struct dp_soc *soc = pdev->soc;
  1124. struct dp_tx_desc_s *tx_desc;
  1125. QDF_STATUS status;
  1126. struct dp_tx_queue *tx_q = &(msdu_info->tx_queue);
  1127. void *hal_srng = soc->tcl_data_ring[tx_q->ring_id].hal_srng;
  1128. uint16_t htt_tcl_metadata = 0;
  1129. uint8_t tid = msdu_info->tid;
  1130. /* Setup Tx descriptor for an MSDU, and MSDU extension descriptor */
  1131. tx_desc = dp_tx_prepare_desc_single(vdev, nbuf, tx_q->desc_pool_id,
  1132. msdu_info, tx_exc_metadata);
  1133. if (!tx_desc) {
  1134. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1135. "%s Tx_desc prepare Fail vdev %pK queue %d",
  1136. __func__, vdev, tx_q->desc_pool_id);
  1137. return nbuf;
  1138. }
  1139. if (qdf_unlikely(soc->cce_disable)) {
  1140. if (dp_cce_classify(vdev, nbuf) == true) {
  1141. DP_STATS_INC(vdev, tx_i.cce_classified, 1);
  1142. tid = DP_VO_TID;
  1143. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1144. }
  1145. }
  1146. dp_tx_update_tdls_flags(tx_desc);
  1147. if (qdf_unlikely(hal_srng_access_start(soc->hal_soc, hal_srng))) {
  1148. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1149. "%s %d : HAL RING Access Failed -- %pK",
  1150. __func__, __LINE__, hal_srng);
  1151. DP_STATS_INC(vdev, tx_i.dropped.ring_full, 1);
  1152. dp_tx_desc_release(tx_desc, tx_q->desc_pool_id);
  1153. goto fail_return;
  1154. }
  1155. if (qdf_unlikely(peer_id == DP_INVALID_PEER)) {
  1156. htt_tcl_metadata = vdev->htt_tcl_metadata;
  1157. HTT_TX_TCL_METADATA_HOST_INSPECTED_SET(htt_tcl_metadata, 1);
  1158. } else if (qdf_unlikely(peer_id != HTT_INVALID_PEER)) {
  1159. HTT_TX_TCL_METADATA_TYPE_SET(htt_tcl_metadata,
  1160. HTT_TCL_METADATA_TYPE_PEER_BASED);
  1161. HTT_TX_TCL_METADATA_PEER_ID_SET(htt_tcl_metadata,
  1162. peer_id);
  1163. } else
  1164. htt_tcl_metadata = vdev->htt_tcl_metadata;
  1165. if (msdu_info->exception_fw) {
  1166. HTT_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  1167. }
  1168. /* Enqueue the Tx MSDU descriptor to HW for transmit */
  1169. status = dp_tx_hw_enqueue(soc, vdev, tx_desc, tid,
  1170. htt_tcl_metadata, tx_q->ring_id, tx_exc_metadata);
  1171. if (status != QDF_STATUS_SUCCESS) {
  1172. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1173. "%s Tx_hw_enqueue Fail tx_desc %pK queue %d",
  1174. __func__, tx_desc, tx_q->ring_id);
  1175. dp_tx_desc_release(tx_desc, tx_q->desc_pool_id);
  1176. goto fail_return;
  1177. }
  1178. nbuf = NULL;
  1179. fail_return:
  1180. if (hif_pm_runtime_get(soc->hif_handle) == 0) {
  1181. hal_srng_access_end(soc->hal_soc, hal_srng);
  1182. hif_pm_runtime_put(soc->hif_handle);
  1183. } else {
  1184. hal_srng_access_end_reap(soc->hal_soc, hal_srng);
  1185. }
  1186. return nbuf;
  1187. }
  1188. /**
  1189. * dp_tx_send_msdu_multiple() - Enqueue multiple MSDUs
  1190. * @vdev: DP vdev handle
  1191. * @nbuf: skb
  1192. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  1193. *
  1194. * Prepare descriptors for multiple MSDUs (TSO segments) and enqueue to TCL
  1195. *
  1196. * Return: NULL on success,
  1197. * nbuf when it fails to send
  1198. */
  1199. #if QDF_LOCK_STATS
  1200. static noinline
  1201. #else
  1202. static
  1203. #endif
  1204. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1205. struct dp_tx_msdu_info_s *msdu_info)
  1206. {
  1207. uint8_t i;
  1208. struct dp_pdev *pdev = vdev->pdev;
  1209. struct dp_soc *soc = pdev->soc;
  1210. struct dp_tx_desc_s *tx_desc;
  1211. bool is_cce_classified = false;
  1212. QDF_STATUS status;
  1213. uint16_t htt_tcl_metadata = 0;
  1214. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  1215. void *hal_srng = soc->tcl_data_ring[tx_q->ring_id].hal_srng;
  1216. if (qdf_unlikely(hal_srng_access_start(soc->hal_soc, hal_srng))) {
  1217. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1218. "%s %d : HAL RING Access Failed -- %pK",
  1219. __func__, __LINE__, hal_srng);
  1220. DP_STATS_INC(vdev, tx_i.dropped.ring_full, 1);
  1221. return nbuf;
  1222. }
  1223. if (qdf_unlikely(soc->cce_disable)) {
  1224. is_cce_classified = dp_cce_classify(vdev, nbuf);
  1225. if (is_cce_classified) {
  1226. DP_STATS_INC(vdev, tx_i.cce_classified, 1);
  1227. msdu_info->tid = DP_VO_TID;
  1228. }
  1229. }
  1230. if (msdu_info->frm_type == dp_tx_frm_me)
  1231. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  1232. i = 0;
  1233. /* Print statement to track i and num_seg */
  1234. /*
  1235. * For each segment (maps to 1 MSDU) , prepare software and hardware
  1236. * descriptors using information in msdu_info
  1237. */
  1238. while (i < msdu_info->num_seg) {
  1239. /*
  1240. * Setup Tx descriptor for an MSDU, and MSDU extension
  1241. * descriptor
  1242. */
  1243. tx_desc = dp_tx_prepare_desc(vdev, nbuf, msdu_info,
  1244. tx_q->desc_pool_id);
  1245. if (!tx_desc) {
  1246. if (msdu_info->frm_type == dp_tx_frm_me) {
  1247. dp_tx_me_free_buf(pdev,
  1248. (void *)(msdu_info->u.sg_info
  1249. .curr_seg->frags[0].vaddr));
  1250. }
  1251. goto done;
  1252. }
  1253. if (msdu_info->frm_type == dp_tx_frm_me) {
  1254. tx_desc->me_buffer =
  1255. msdu_info->u.sg_info.curr_seg->frags[0].vaddr;
  1256. tx_desc->flags |= DP_TX_DESC_FLAG_ME;
  1257. }
  1258. if (is_cce_classified)
  1259. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1260. htt_tcl_metadata = vdev->htt_tcl_metadata;
  1261. if (msdu_info->exception_fw) {
  1262. HTT_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  1263. }
  1264. /*
  1265. * Enqueue the Tx MSDU descriptor to HW for transmit
  1266. */
  1267. status = dp_tx_hw_enqueue(soc, vdev, tx_desc, msdu_info->tid,
  1268. htt_tcl_metadata, tx_q->ring_id, NULL);
  1269. if (status != QDF_STATUS_SUCCESS) {
  1270. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1271. "%s Tx_hw_enqueue Fail tx_desc %pK queue %d",
  1272. __func__, tx_desc, tx_q->ring_id);
  1273. if (tx_desc->flags & DP_TX_DESC_FLAG_ME)
  1274. dp_tx_me_free_buf(pdev, tx_desc->me_buffer);
  1275. dp_tx_desc_release(tx_desc, tx_q->desc_pool_id);
  1276. goto done;
  1277. }
  1278. /*
  1279. * TODO
  1280. * if tso_info structure can be modified to have curr_seg
  1281. * as first element, following 2 blocks of code (for TSO and SG)
  1282. * can be combined into 1
  1283. */
  1284. /*
  1285. * For frames with multiple segments (TSO, ME), jump to next
  1286. * segment.
  1287. */
  1288. if (msdu_info->frm_type == dp_tx_frm_tso) {
  1289. if (msdu_info->u.tso_info.curr_seg->next) {
  1290. msdu_info->u.tso_info.curr_seg =
  1291. msdu_info->u.tso_info.curr_seg->next;
  1292. /*
  1293. * If this is a jumbo nbuf, then increment the number of
  1294. * nbuf users for each additional segment of the msdu.
  1295. * This will ensure that the skb is freed only after
  1296. * receiving tx completion for all segments of an nbuf
  1297. */
  1298. qdf_nbuf_inc_users(nbuf);
  1299. /* Check with MCL if this is needed */
  1300. /* nbuf = msdu_info->u.tso_info.curr_seg->nbuf; */
  1301. }
  1302. }
  1303. /*
  1304. * For Multicast-Unicast converted packets,
  1305. * each converted frame (for a client) is represented as
  1306. * 1 segment
  1307. */
  1308. if ((msdu_info->frm_type == dp_tx_frm_sg) ||
  1309. (msdu_info->frm_type == dp_tx_frm_me)) {
  1310. if (msdu_info->u.sg_info.curr_seg->next) {
  1311. msdu_info->u.sg_info.curr_seg =
  1312. msdu_info->u.sg_info.curr_seg->next;
  1313. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  1314. }
  1315. }
  1316. i++;
  1317. }
  1318. nbuf = NULL;
  1319. done:
  1320. if (hif_pm_runtime_get(soc->hif_handle) == 0) {
  1321. hal_srng_access_end(soc->hal_soc, hal_srng);
  1322. hif_pm_runtime_put(soc->hif_handle);
  1323. } else {
  1324. hal_srng_access_end_reap(soc->hal_soc, hal_srng);
  1325. }
  1326. return nbuf;
  1327. }
  1328. /**
  1329. * dp_tx_prepare_sg()- Extract SG info from NBUF and prepare msdu_info
  1330. * for SG frames
  1331. * @vdev: DP vdev handle
  1332. * @nbuf: skb
  1333. * @seg_info: Pointer to Segment info Descriptor to be prepared
  1334. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  1335. *
  1336. * Return: NULL on success,
  1337. * nbuf when it fails to send
  1338. */
  1339. static qdf_nbuf_t dp_tx_prepare_sg(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1340. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  1341. {
  1342. uint32_t cur_frag, nr_frags;
  1343. qdf_dma_addr_t paddr;
  1344. struct dp_tx_sg_info_s *sg_info;
  1345. sg_info = &msdu_info->u.sg_info;
  1346. nr_frags = qdf_nbuf_get_nr_frags(nbuf);
  1347. if (QDF_STATUS_SUCCESS != qdf_nbuf_map(vdev->osdev, nbuf,
  1348. QDF_DMA_TO_DEVICE)) {
  1349. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1350. "dma map error");
  1351. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  1352. qdf_nbuf_free(nbuf);
  1353. return NULL;
  1354. }
  1355. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  1356. seg_info->frags[0].paddr_lo = paddr;
  1357. seg_info->frags[0].paddr_hi = ((uint64_t) paddr) >> 32;
  1358. seg_info->frags[0].len = qdf_nbuf_headlen(nbuf);
  1359. seg_info->frags[0].vaddr = (void *) nbuf;
  1360. for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
  1361. if (QDF_STATUS_E_FAILURE == qdf_nbuf_frag_map(vdev->osdev,
  1362. nbuf, 0, QDF_DMA_TO_DEVICE, cur_frag)) {
  1363. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1364. "frag dma map error");
  1365. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  1366. qdf_nbuf_free(nbuf);
  1367. return NULL;
  1368. }
  1369. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  1370. seg_info->frags[cur_frag + 1].paddr_lo = paddr;
  1371. seg_info->frags[cur_frag + 1].paddr_hi =
  1372. ((uint64_t) paddr) >> 32;
  1373. seg_info->frags[cur_frag + 1].len =
  1374. qdf_nbuf_get_frag_size(nbuf, cur_frag);
  1375. }
  1376. seg_info->frag_cnt = (cur_frag + 1);
  1377. seg_info->total_len = qdf_nbuf_len(nbuf);
  1378. seg_info->next = NULL;
  1379. sg_info->curr_seg = seg_info;
  1380. msdu_info->frm_type = dp_tx_frm_sg;
  1381. msdu_info->num_seg = 1;
  1382. return nbuf;
  1383. }
  1384. #ifdef MESH_MODE_SUPPORT
  1385. /**
  1386. * dp_tx_extract_mesh_meta_data()- Extract mesh meta hdr info from nbuf
  1387. and prepare msdu_info for mesh frames.
  1388. * @vdev: DP vdev handle
  1389. * @nbuf: skb
  1390. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  1391. *
  1392. * Return: NULL on failure,
  1393. * nbuf when extracted successfully
  1394. */
  1395. static
  1396. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1397. struct dp_tx_msdu_info_s *msdu_info)
  1398. {
  1399. struct meta_hdr_s *mhdr;
  1400. struct htt_tx_msdu_desc_ext2_t *meta_data =
  1401. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  1402. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  1403. if (CB_FTYPE_MESH_TX_INFO != qdf_nbuf_get_tx_ftype(nbuf)) {
  1404. msdu_info->exception_fw = 0;
  1405. goto remove_meta_hdr;
  1406. }
  1407. msdu_info->exception_fw = 1;
  1408. qdf_mem_set(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t), 0);
  1409. meta_data->host_tx_desc_pool = 1;
  1410. meta_data->update_peer_cache = 1;
  1411. meta_data->learning_frame = 1;
  1412. if (!(mhdr->flags & METAHDR_FLAG_AUTO_RATE)) {
  1413. meta_data->power = mhdr->power;
  1414. meta_data->mcs_mask = 1 << mhdr->rate_info[0].mcs;
  1415. meta_data->nss_mask = 1 << mhdr->rate_info[0].nss;
  1416. meta_data->pream_type = mhdr->rate_info[0].preamble_type;
  1417. meta_data->retry_limit = mhdr->rate_info[0].max_tries;
  1418. meta_data->dyn_bw = 1;
  1419. meta_data->valid_pwr = 1;
  1420. meta_data->valid_mcs_mask = 1;
  1421. meta_data->valid_nss_mask = 1;
  1422. meta_data->valid_preamble_type = 1;
  1423. meta_data->valid_retries = 1;
  1424. meta_data->valid_bw_info = 1;
  1425. }
  1426. if (mhdr->flags & METAHDR_FLAG_NOENCRYPT) {
  1427. meta_data->encrypt_type = 0;
  1428. meta_data->valid_encrypt_type = 1;
  1429. meta_data->learning_frame = 0;
  1430. }
  1431. meta_data->valid_key_flags = 1;
  1432. meta_data->key_flags = (mhdr->keyix & 0x3);
  1433. remove_meta_hdr:
  1434. if (qdf_nbuf_pull_head(nbuf, sizeof(struct meta_hdr_s)) == NULL) {
  1435. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1436. "qdf_nbuf_pull_head failed");
  1437. qdf_nbuf_free(nbuf);
  1438. return NULL;
  1439. }
  1440. if (mhdr->flags & METAHDR_FLAG_NOQOS)
  1441. msdu_info->tid = HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST;
  1442. else
  1443. msdu_info->tid = qdf_nbuf_get_priority(nbuf);
  1444. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1445. "%s , Meta hdr %0x %0x %0x %0x %0x %0x"
  1446. " tid %d to_fw %d",
  1447. __func__, msdu_info->meta_data[0],
  1448. msdu_info->meta_data[1],
  1449. msdu_info->meta_data[2],
  1450. msdu_info->meta_data[3],
  1451. msdu_info->meta_data[4],
  1452. msdu_info->meta_data[5],
  1453. msdu_info->tid, msdu_info->exception_fw);
  1454. return nbuf;
  1455. }
  1456. #else
  1457. static
  1458. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1459. struct dp_tx_msdu_info_s *msdu_info)
  1460. {
  1461. return nbuf;
  1462. }
  1463. #endif
  1464. #ifdef DP_FEATURE_NAWDS_TX
  1465. /**
  1466. * dp_tx_prepare_nawds(): Tramit NAWDS frames
  1467. * @vdev: dp_vdev handle
  1468. * @nbuf: skb
  1469. * @tid: TID from HLOS for overriding default DSCP-TID mapping
  1470. * @tx_q: Tx queue to be used for this Tx frame
  1471. * @meta_data: Meta date for mesh
  1472. * @peer_id: peer_id of the peer in case of NAWDS frames
  1473. *
  1474. * return: NULL on success nbuf on failure
  1475. */
  1476. static qdf_nbuf_t dp_tx_prepare_nawds(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1477. struct dp_tx_msdu_info_s *msdu_info)
  1478. {
  1479. struct dp_peer *peer = NULL;
  1480. struct dp_soc *soc = vdev->pdev->soc;
  1481. struct dp_ast_entry *ast_entry = NULL;
  1482. struct ether_header *eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  1483. uint16_t peer_id = HTT_INVALID_PEER;
  1484. struct dp_peer *sa_peer = NULL;
  1485. qdf_nbuf_t nbuf_copy;
  1486. qdf_spin_lock_bh(&(soc->ast_lock));
  1487. ast_entry = dp_peer_ast_hash_find(soc, (uint8_t *)(eh->ether_shost));
  1488. if (ast_entry)
  1489. sa_peer = ast_entry->peer;
  1490. qdf_spin_unlock_bh(&(soc->ast_lock));
  1491. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1492. if ((peer->peer_ids[0] != HTT_INVALID_PEER) &&
  1493. (peer->nawds_enabled)) {
  1494. if (sa_peer == peer) {
  1495. QDF_TRACE(QDF_MODULE_ID_DP,
  1496. QDF_TRACE_LEVEL_DEBUG,
  1497. " %s: broadcast multicast packet",
  1498. __func__);
  1499. DP_STATS_INC(peer, tx.nawds_mcast_drop, 1);
  1500. continue;
  1501. }
  1502. nbuf_copy = qdf_nbuf_copy(nbuf);
  1503. if (!nbuf_copy) {
  1504. QDF_TRACE(QDF_MODULE_ID_DP,
  1505. QDF_TRACE_LEVEL_ERROR,
  1506. "nbuf copy failed");
  1507. }
  1508. peer_id = peer->peer_ids[0];
  1509. nbuf_copy = dp_tx_send_msdu_single(vdev, nbuf_copy,
  1510. msdu_info, peer_id, NULL);
  1511. if (nbuf_copy != NULL) {
  1512. qdf_nbuf_free(nbuf_copy);
  1513. continue;
  1514. }
  1515. DP_STATS_INC_PKT(peer, tx.nawds_mcast,
  1516. 1, qdf_nbuf_len(nbuf));
  1517. }
  1518. }
  1519. if (peer_id == HTT_INVALID_PEER)
  1520. return nbuf;
  1521. return NULL;
  1522. }
  1523. #endif
  1524. /**
  1525. * dp_check_exc_metadata() - Checks if parameters are valid
  1526. * @tx_exc - holds all exception path parameters
  1527. *
  1528. * Returns true when all the parameters are valid else false
  1529. *
  1530. */
  1531. static bool dp_check_exc_metadata(struct cdp_tx_exception_metadata *tx_exc)
  1532. {
  1533. if ((tx_exc->tid > DP_MAX_TIDS && tx_exc->tid != HTT_INVALID_TID) ||
  1534. tx_exc->tx_encap_type > htt_cmn_pkt_num_types ||
  1535. tx_exc->sec_type > cdp_num_sec_types) {
  1536. return false;
  1537. }
  1538. return true;
  1539. }
  1540. /**
  1541. * dp_tx_send_exception() - Transmit a frame on a given VAP in exception path
  1542. * @vap_dev: DP vdev handle
  1543. * @nbuf: skb
  1544. * @tx_exc_metadata: Handle that holds exception path meta data
  1545. *
  1546. * Entry point for Core Tx layer (DP_TX) invoked from
  1547. * hard_start_xmit in OSIF/HDD to transmit frames through fw
  1548. *
  1549. * Return: NULL on success,
  1550. * nbuf when it fails to send
  1551. */
  1552. qdf_nbuf_t dp_tx_send_exception(void *vap_dev, qdf_nbuf_t nbuf,
  1553. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1554. {
  1555. struct ether_header *eh = NULL;
  1556. struct dp_vdev *vdev = (struct dp_vdev *) vap_dev;
  1557. struct dp_tx_msdu_info_s msdu_info;
  1558. qdf_mem_set(&msdu_info, sizeof(msdu_info), 0x0);
  1559. msdu_info.tid = tx_exc_metadata->tid;
  1560. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  1561. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1562. "%s , skb %pM",
  1563. __func__, nbuf->data);
  1564. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  1565. if (qdf_unlikely(!dp_check_exc_metadata(tx_exc_metadata))) {
  1566. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1567. "Invalid parameters in exception path");
  1568. goto fail;
  1569. }
  1570. /* Basic sanity checks for unsupported packets */
  1571. /* MESH mode */
  1572. if (qdf_unlikely(vdev->mesh_vdev)) {
  1573. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1574. "Mesh mode is not supported in exception path");
  1575. goto fail;
  1576. }
  1577. /* TSO or SG */
  1578. if (qdf_unlikely(qdf_nbuf_is_tso(nbuf)) ||
  1579. qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  1580. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1581. "TSO and SG are not supported in exception path");
  1582. goto fail;
  1583. }
  1584. /* RAW */
  1585. if (qdf_unlikely(tx_exc_metadata->tx_encap_type == htt_cmn_pkt_type_raw)) {
  1586. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1587. "Raw frame is not supported in exception path");
  1588. goto fail;
  1589. }
  1590. /* Mcast enhancement*/
  1591. if (qdf_unlikely(vdev->mcast_enhancement_en > 0)) {
  1592. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  1593. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1594. "Ignoring mcast_enhancement_en which is set and sending the mcast packet to the FW");
  1595. }
  1596. }
  1597. /*
  1598. * Get HW Queue to use for this frame.
  1599. * TCL supports upto 4 DMA rings, out of which 3 rings are
  1600. * dedicated for data and 1 for command.
  1601. * "queue_id" maps to one hardware ring.
  1602. * With each ring, we also associate a unique Tx descriptor pool
  1603. * to minimize lock contention for these resources.
  1604. */
  1605. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  1606. /* Single linear frame */
  1607. /*
  1608. * If nbuf is a simple linear frame, use send_single function to
  1609. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  1610. * SRNG. There is no need to setup a MSDU extension descriptor.
  1611. */
  1612. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  1613. tx_exc_metadata->peer_id, tx_exc_metadata);
  1614. return nbuf;
  1615. fail:
  1616. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1617. "pkt send failed");
  1618. return nbuf;
  1619. }
  1620. /**
  1621. * dp_tx_send_mesh() - Transmit mesh frame on a given VAP
  1622. * @vap_dev: DP vdev handle
  1623. * @nbuf: skb
  1624. *
  1625. * Entry point for Core Tx layer (DP_TX) invoked from
  1626. * hard_start_xmit in OSIF/HDD
  1627. *
  1628. * Return: NULL on success,
  1629. * nbuf when it fails to send
  1630. */
  1631. #ifdef MESH_MODE_SUPPORT
  1632. qdf_nbuf_t dp_tx_send_mesh(void *vap_dev, qdf_nbuf_t nbuf)
  1633. {
  1634. struct meta_hdr_s *mhdr;
  1635. qdf_nbuf_t nbuf_mesh = NULL;
  1636. qdf_nbuf_t nbuf_clone = NULL;
  1637. struct dp_vdev *vdev = (struct dp_vdev *) vap_dev;
  1638. uint8_t no_enc_frame = 0;
  1639. nbuf_mesh = qdf_nbuf_unshare(nbuf);
  1640. if (nbuf_mesh == NULL) {
  1641. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1642. "qdf_nbuf_unshare failed");
  1643. return nbuf;
  1644. }
  1645. nbuf = nbuf_mesh;
  1646. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  1647. if ((vdev->sec_type != cdp_sec_type_none) &&
  1648. (mhdr->flags & METAHDR_FLAG_NOENCRYPT))
  1649. no_enc_frame = 1;
  1650. if ((mhdr->flags & METAHDR_FLAG_INFO_UPDATED) &&
  1651. !no_enc_frame) {
  1652. nbuf_clone = qdf_nbuf_clone(nbuf);
  1653. if (nbuf_clone == NULL) {
  1654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1655. "qdf_nbuf_clone failed");
  1656. return nbuf;
  1657. }
  1658. qdf_nbuf_set_tx_ftype(nbuf_clone, CB_FTYPE_MESH_TX_INFO);
  1659. }
  1660. if (nbuf_clone) {
  1661. if (!dp_tx_send(vap_dev, nbuf_clone)) {
  1662. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  1663. } else {
  1664. qdf_nbuf_free(nbuf_clone);
  1665. }
  1666. }
  1667. if (no_enc_frame)
  1668. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_MESH_TX_INFO);
  1669. else
  1670. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_INVALID);
  1671. nbuf = dp_tx_send(vap_dev, nbuf);
  1672. if ((nbuf == NULL) && no_enc_frame) {
  1673. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  1674. }
  1675. return nbuf;
  1676. }
  1677. #else
  1678. qdf_nbuf_t dp_tx_send_mesh(void *vap_dev, qdf_nbuf_t nbuf)
  1679. {
  1680. return dp_tx_send(vap_dev, nbuf);
  1681. }
  1682. #endif
  1683. /**
  1684. * dp_tx_send() - Transmit a frame on a given VAP
  1685. * @vap_dev: DP vdev handle
  1686. * @nbuf: skb
  1687. *
  1688. * Entry point for Core Tx layer (DP_TX) invoked from
  1689. * hard_start_xmit in OSIF/HDD or from dp_rx_process for intravap forwarding
  1690. * cases
  1691. *
  1692. * Return: NULL on success,
  1693. * nbuf when it fails to send
  1694. */
  1695. qdf_nbuf_t dp_tx_send(void *vap_dev, qdf_nbuf_t nbuf)
  1696. {
  1697. struct ether_header *eh = NULL;
  1698. struct dp_tx_msdu_info_s msdu_info;
  1699. struct dp_tx_seg_info_s seg_info;
  1700. struct dp_vdev *vdev = (struct dp_vdev *) vap_dev;
  1701. uint16_t peer_id = HTT_INVALID_PEER;
  1702. qdf_nbuf_t nbuf_mesh = NULL;
  1703. qdf_mem_set(&msdu_info, sizeof(msdu_info), 0x0);
  1704. qdf_mem_set(&seg_info, sizeof(seg_info), 0x0);
  1705. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  1706. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1707. "%s , skb %pM",
  1708. __func__, nbuf->data);
  1709. /*
  1710. * Set Default Host TID value to invalid TID
  1711. * (TID override disabled)
  1712. */
  1713. msdu_info.tid = HTT_TX_EXT_TID_INVALID;
  1714. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  1715. if (qdf_unlikely(vdev->mesh_vdev)) {
  1716. nbuf_mesh = dp_tx_extract_mesh_meta_data(vdev, nbuf,
  1717. &msdu_info);
  1718. if (nbuf_mesh == NULL) {
  1719. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1720. "Extracting mesh metadata failed");
  1721. return nbuf;
  1722. }
  1723. nbuf = nbuf_mesh;
  1724. }
  1725. /*
  1726. * Get HW Queue to use for this frame.
  1727. * TCL supports upto 4 DMA rings, out of which 3 rings are
  1728. * dedicated for data and 1 for command.
  1729. * "queue_id" maps to one hardware ring.
  1730. * With each ring, we also associate a unique Tx descriptor pool
  1731. * to minimize lock contention for these resources.
  1732. */
  1733. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  1734. /*
  1735. * TCL H/W supports 2 DSCP-TID mapping tables.
  1736. * Table 1 - Default DSCP-TID mapping table
  1737. * Table 2 - 1 DSCP-TID override table
  1738. *
  1739. * If we need a different DSCP-TID mapping for this vap,
  1740. * call tid_classify to extract DSCP/ToS from frame and
  1741. * map to a TID and store in msdu_info. This is later used
  1742. * to fill in TCL Input descriptor (per-packet TID override).
  1743. */
  1744. dp_tx_classify_tid(vdev, nbuf, &msdu_info);
  1745. /*
  1746. * Classify the frame and call corresponding
  1747. * "prepare" function which extracts the segment (TSO)
  1748. * and fragmentation information (for TSO , SG, ME, or Raw)
  1749. * into MSDU_INFO structure which is later used to fill
  1750. * SW and HW descriptors.
  1751. */
  1752. if (qdf_nbuf_is_tso(nbuf)) {
  1753. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1754. "%s TSO frame %pK", __func__, vdev);
  1755. DP_STATS_INC_PKT(vdev, tx_i.tso.tso_pkt, 1,
  1756. qdf_nbuf_len(nbuf));
  1757. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  1758. DP_STATS_INC_PKT(vdev, tx_i.tso.dropped_host, 1,
  1759. qdf_nbuf_len(nbuf));
  1760. return nbuf;
  1761. }
  1762. goto send_multiple;
  1763. }
  1764. /* SG */
  1765. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  1766. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info, &msdu_info);
  1767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1768. "%s non-TSO SG frame %pK", __func__, vdev);
  1769. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  1770. qdf_nbuf_len(nbuf));
  1771. goto send_multiple;
  1772. }
  1773. #ifdef ATH_SUPPORT_IQUE
  1774. /* Mcast to Ucast Conversion*/
  1775. if (qdf_unlikely(vdev->mcast_enhancement_en > 0)) {
  1776. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  1777. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  1778. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1779. "%s Mcast frm for ME %pK", __func__, vdev);
  1780. DP_STATS_INC_PKT(vdev,
  1781. tx_i.mcast_en.mcast_pkt, 1,
  1782. qdf_nbuf_len(nbuf));
  1783. if (dp_tx_prepare_send_me(vdev, nbuf) ==
  1784. QDF_STATUS_SUCCESS) {
  1785. return NULL;
  1786. }
  1787. }
  1788. }
  1789. #endif
  1790. /* RAW */
  1791. if (qdf_unlikely(vdev->tx_encap_type == htt_cmn_pkt_type_raw)) {
  1792. nbuf = dp_tx_prepare_raw(vdev, nbuf, &seg_info, &msdu_info);
  1793. if (nbuf == NULL)
  1794. return NULL;
  1795. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1796. "%s Raw frame %pK", __func__, vdev);
  1797. goto send_multiple;
  1798. }
  1799. /* Single linear frame */
  1800. /*
  1801. * If nbuf is a simple linear frame, use send_single function to
  1802. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  1803. * SRNG. There is no need to setup a MSDU extension descriptor.
  1804. */
  1805. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info, peer_id, NULL);
  1806. return nbuf;
  1807. send_multiple:
  1808. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  1809. return nbuf;
  1810. }
  1811. /**
  1812. * dp_tx_reinject_handler() - Tx Reinject Handler
  1813. * @tx_desc: software descriptor head pointer
  1814. * @status : Tx completion status from HTT descriptor
  1815. *
  1816. * This function reinjects frames back to Target.
  1817. * Todo - Host queue needs to be added
  1818. *
  1819. * Return: none
  1820. */
  1821. static
  1822. void dp_tx_reinject_handler(struct dp_tx_desc_s *tx_desc, uint8_t *status)
  1823. {
  1824. struct dp_vdev *vdev;
  1825. struct dp_peer *peer = NULL;
  1826. uint32_t peer_id = HTT_INVALID_PEER;
  1827. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1828. qdf_nbuf_t nbuf_copy = NULL;
  1829. struct dp_tx_msdu_info_s msdu_info;
  1830. struct dp_peer *sa_peer = NULL;
  1831. struct dp_ast_entry *ast_entry = NULL;
  1832. struct dp_soc *soc = NULL;
  1833. struct ether_header *eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  1834. #ifdef WDS_VENDOR_EXTENSION
  1835. int is_mcast = 0, is_ucast = 0;
  1836. int num_peers_3addr = 0;
  1837. struct ether_header *eth_hdr = (struct ether_header *)(qdf_nbuf_data(nbuf));
  1838. struct ieee80211_frame_addr4 *wh = (struct ieee80211_frame_addr4 *)(qdf_nbuf_data(nbuf));
  1839. #endif
  1840. vdev = tx_desc->vdev;
  1841. soc = vdev->pdev->soc;
  1842. qdf_assert(vdev);
  1843. qdf_mem_set(&msdu_info, sizeof(msdu_info), 0x0);
  1844. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  1845. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1846. "%s Tx reinject path", __func__);
  1847. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  1848. qdf_nbuf_len(tx_desc->nbuf));
  1849. qdf_spin_lock_bh(&(soc->ast_lock));
  1850. ast_entry = dp_peer_ast_hash_find(soc, (uint8_t *)(eh->ether_shost));
  1851. if (ast_entry)
  1852. sa_peer = ast_entry->peer;
  1853. qdf_spin_unlock_bh(&(soc->ast_lock));
  1854. #ifdef WDS_VENDOR_EXTENSION
  1855. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1856. is_mcast = (IS_MULTICAST(wh->i_addr1)) ? 1 : 0;
  1857. } else {
  1858. is_mcast = (IS_MULTICAST(eth_hdr->ether_dhost)) ? 1 : 0;
  1859. }
  1860. is_ucast = !is_mcast;
  1861. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1862. if (peer->bss_peer)
  1863. continue;
  1864. /* Detect wds peers that use 3-addr framing for mcast.
  1865. * if there are any, the bss_peer is used to send the
  1866. * the mcast frame using 3-addr format. all wds enabled
  1867. * peers that use 4-addr framing for mcast frames will
  1868. * be duplicated and sent as 4-addr frames below.
  1869. */
  1870. if (!peer->wds_enabled || !peer->wds_ecm.wds_tx_mcast_4addr) {
  1871. num_peers_3addr = 1;
  1872. break;
  1873. }
  1874. }
  1875. #endif
  1876. if (qdf_unlikely(vdev->mesh_vdev)) {
  1877. DP_TX_FREE_SINGLE_BUF(vdev->pdev->soc, tx_desc->nbuf);
  1878. } else {
  1879. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1880. if ((peer->peer_ids[0] != HTT_INVALID_PEER) &&
  1881. #ifdef WDS_VENDOR_EXTENSION
  1882. /*
  1883. * . if 3-addr STA, then send on BSS Peer
  1884. * . if Peer WDS enabled and accept 4-addr mcast,
  1885. * send mcast on that peer only
  1886. * . if Peer WDS enabled and accept 4-addr ucast,
  1887. * send ucast on that peer only
  1888. */
  1889. ((peer->bss_peer && num_peers_3addr && is_mcast) ||
  1890. (peer->wds_enabled &&
  1891. ((is_mcast && peer->wds_ecm.wds_tx_mcast_4addr) ||
  1892. (is_ucast && peer->wds_ecm.wds_tx_ucast_4addr))))) {
  1893. #else
  1894. ((peer->bss_peer &&
  1895. !(vdev->osif_proxy_arp(vdev->osif_vdev, nbuf))) ||
  1896. peer->nawds_enabled)) {
  1897. #endif
  1898. peer_id = DP_INVALID_PEER;
  1899. if (peer->nawds_enabled) {
  1900. peer_id = peer->peer_ids[0];
  1901. if (sa_peer == peer) {
  1902. QDF_TRACE(
  1903. QDF_MODULE_ID_DP,
  1904. QDF_TRACE_LEVEL_DEBUG,
  1905. " %s: multicast packet",
  1906. __func__);
  1907. DP_STATS_INC(peer,
  1908. tx.nawds_mcast_drop, 1);
  1909. continue;
  1910. }
  1911. }
  1912. nbuf_copy = qdf_nbuf_copy(nbuf);
  1913. if (!nbuf_copy) {
  1914. QDF_TRACE(QDF_MODULE_ID_DP,
  1915. QDF_TRACE_LEVEL_DEBUG,
  1916. FL("nbuf copy failed"));
  1917. break;
  1918. }
  1919. nbuf_copy = dp_tx_send_msdu_single(vdev,
  1920. nbuf_copy,
  1921. &msdu_info,
  1922. peer_id,
  1923. NULL);
  1924. if (nbuf_copy) {
  1925. QDF_TRACE(QDF_MODULE_ID_DP,
  1926. QDF_TRACE_LEVEL_DEBUG,
  1927. FL("pkt send failed"));
  1928. qdf_nbuf_free(nbuf_copy);
  1929. } else {
  1930. if (peer_id != DP_INVALID_PEER)
  1931. DP_STATS_INC_PKT(peer,
  1932. tx.nawds_mcast,
  1933. 1, qdf_nbuf_len(nbuf));
  1934. }
  1935. }
  1936. }
  1937. }
  1938. if (vdev->nawds_enabled) {
  1939. peer_id = DP_INVALID_PEER;
  1940. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  1941. 1, qdf_nbuf_len(nbuf));
  1942. nbuf = dp_tx_send_msdu_single(vdev,
  1943. nbuf,
  1944. &msdu_info,
  1945. peer_id, NULL);
  1946. if (nbuf) {
  1947. QDF_TRACE(QDF_MODULE_ID_DP,
  1948. QDF_TRACE_LEVEL_DEBUG,
  1949. FL("pkt send failed"));
  1950. qdf_nbuf_free(nbuf);
  1951. }
  1952. } else
  1953. qdf_nbuf_free(nbuf);
  1954. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  1955. }
  1956. /**
  1957. * dp_tx_inspect_handler() - Tx Inspect Handler
  1958. * @tx_desc: software descriptor head pointer
  1959. * @status : Tx completion status from HTT descriptor
  1960. *
  1961. * Handles Tx frames sent back to Host for inspection
  1962. * (ProxyARP)
  1963. *
  1964. * Return: none
  1965. */
  1966. static void dp_tx_inspect_handler(struct dp_tx_desc_s *tx_desc, uint8_t *status)
  1967. {
  1968. struct dp_soc *soc;
  1969. struct dp_pdev *pdev = tx_desc->pdev;
  1970. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1971. "%s Tx inspect path",
  1972. __func__);
  1973. qdf_assert(pdev);
  1974. soc = pdev->soc;
  1975. DP_STATS_INC_PKT(tx_desc->vdev, tx_i.inspect_pkts, 1,
  1976. qdf_nbuf_len(tx_desc->nbuf));
  1977. DP_TX_FREE_SINGLE_BUF(soc, tx_desc->nbuf);
  1978. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  1979. }
  1980. #ifdef FEATURE_PERPKT_INFO
  1981. /**
  1982. * dp_get_completion_indication_for_stack() - send completion to stack
  1983. * @soc : dp_soc handle
  1984. * @pdev: dp_pdev handle
  1985. * @peer_id: peer_id of the peer for which completion came
  1986. * @ppdu_id: ppdu_id
  1987. * @first_msdu: first msdu
  1988. * @last_msdu: last msdu
  1989. * @netbuf: Buffer pointer for free
  1990. *
  1991. * This function is used for indication whether buffer needs to be
  1992. * send to stack for free or not
  1993. */
  1994. QDF_STATUS
  1995. dp_get_completion_indication_for_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  1996. uint16_t peer_id, uint32_t ppdu_id, uint8_t first_msdu,
  1997. uint8_t last_msdu, qdf_nbuf_t netbuf)
  1998. {
  1999. struct tx_capture_hdr *ppdu_hdr;
  2000. struct dp_peer *peer = NULL;
  2001. struct ether_header *eh;
  2002. if (qdf_unlikely(!pdev->tx_sniffer_enable && !pdev->mcopy_mode))
  2003. return QDF_STATUS_E_NOSUPPORT;
  2004. peer = (peer_id == HTT_INVALID_PEER) ? NULL :
  2005. dp_peer_find_by_id(soc, peer_id);
  2006. if (!peer) {
  2007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2008. FL("Peer Invalid"));
  2009. return QDF_STATUS_E_INVAL;
  2010. }
  2011. if (pdev->mcopy_mode) {
  2012. if ((pdev->m_copy_id.tx_ppdu_id == ppdu_id) &&
  2013. (pdev->m_copy_id.tx_peer_id == peer_id)) {
  2014. return QDF_STATUS_E_INVAL;
  2015. }
  2016. pdev->m_copy_id.tx_ppdu_id = ppdu_id;
  2017. pdev->m_copy_id.tx_peer_id = peer_id;
  2018. }
  2019. eh = (struct ether_header *)qdf_nbuf_data(netbuf);
  2020. if (!qdf_nbuf_push_head(netbuf, sizeof(struct tx_capture_hdr))) {
  2021. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2022. FL("No headroom"));
  2023. return QDF_STATUS_E_NOMEM;
  2024. }
  2025. ppdu_hdr = (struct tx_capture_hdr *)qdf_nbuf_data(netbuf);
  2026. qdf_mem_copy(ppdu_hdr->ta, peer->vdev->mac_addr.raw,
  2027. IEEE80211_ADDR_LEN);
  2028. if (peer->bss_peer) {
  2029. qdf_mem_copy(ppdu_hdr->ra, eh->ether_dhost, IEEE80211_ADDR_LEN);
  2030. } else {
  2031. qdf_mem_copy(ppdu_hdr->ra, peer->mac_addr.raw,
  2032. IEEE80211_ADDR_LEN);
  2033. }
  2034. ppdu_hdr->ppdu_id = ppdu_id;
  2035. ppdu_hdr->peer_id = peer_id;
  2036. ppdu_hdr->first_msdu = first_msdu;
  2037. ppdu_hdr->last_msdu = last_msdu;
  2038. return QDF_STATUS_SUCCESS;
  2039. }
  2040. /**
  2041. * dp_send_completion_to_stack() - send completion to stack
  2042. * @soc : dp_soc handle
  2043. * @pdev: dp_pdev handle
  2044. * @peer_id: peer_id of the peer for which completion came
  2045. * @ppdu_id: ppdu_id
  2046. * @netbuf: Buffer pointer for free
  2047. *
  2048. * This function is used to send completion to stack
  2049. * to free buffer
  2050. */
  2051. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  2052. uint16_t peer_id, uint32_t ppdu_id,
  2053. qdf_nbuf_t netbuf)
  2054. {
  2055. dp_wdi_event_handler(WDI_EVENT_TX_DATA, soc,
  2056. netbuf, peer_id,
  2057. WDI_NO_VAL, pdev->pdev_id);
  2058. }
  2059. #else
  2060. static QDF_STATUS
  2061. dp_get_completion_indication_for_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  2062. uint16_t peer_id, uint32_t ppdu_id, uint8_t first_msdu,
  2063. uint8_t last_msdu, qdf_nbuf_t netbuf)
  2064. {
  2065. return QDF_STATUS_E_NOSUPPORT;
  2066. }
  2067. static void
  2068. dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  2069. uint16_t peer_id, uint32_t ppdu_id, qdf_nbuf_t netbuf)
  2070. {
  2071. }
  2072. #endif
  2073. /**
  2074. * dp_tx_comp_free_buf() - Free nbuf associated with the Tx Descriptor
  2075. * @soc: Soc handle
  2076. * @desc: software Tx descriptor to be processed
  2077. *
  2078. * Return: none
  2079. */
  2080. static inline void dp_tx_comp_free_buf(struct dp_soc *soc,
  2081. struct dp_tx_desc_s *desc)
  2082. {
  2083. struct dp_vdev *vdev = desc->vdev;
  2084. qdf_nbuf_t nbuf = desc->nbuf;
  2085. /* If it is TDLS mgmt, don't unmap or free the frame */
  2086. if (desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME)
  2087. return dp_non_std_tx_comp_free_buff(desc, vdev);
  2088. /* 0 : MSDU buffer, 1 : MLE */
  2089. if (desc->msdu_ext_desc) {
  2090. /* TSO free */
  2091. if (hal_tx_ext_desc_get_tso_enable(
  2092. desc->msdu_ext_desc->vaddr)) {
  2093. /* unmap eash TSO seg before free the nbuf */
  2094. dp_tx_tso_unmap_segment(soc, desc);
  2095. qdf_nbuf_free(nbuf);
  2096. return;
  2097. }
  2098. }
  2099. qdf_nbuf_unmap(soc->osdev, nbuf, QDF_DMA_TO_DEVICE);
  2100. if (qdf_likely(!vdev->mesh_vdev))
  2101. qdf_nbuf_free(nbuf);
  2102. else {
  2103. if (desc->flags & DP_TX_DESC_FLAG_TO_FW) {
  2104. qdf_nbuf_free(nbuf);
  2105. DP_STATS_INC(vdev, tx_i.mesh.completion_fw, 1);
  2106. } else
  2107. vdev->osif_tx_free_ext((nbuf));
  2108. }
  2109. }
  2110. /**
  2111. * dp_tx_mec_handler() - Tx MEC Notify Handler
  2112. * @vdev: pointer to dp dev handler
  2113. * @status : Tx completion status from HTT descriptor
  2114. *
  2115. * Handles MEC notify event sent from fw to Host
  2116. *
  2117. * Return: none
  2118. */
  2119. #ifdef FEATURE_WDS
  2120. void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  2121. {
  2122. struct dp_soc *soc;
  2123. uint32_t flags = IEEE80211_NODE_F_WDS_HM;
  2124. struct dp_peer *peer;
  2125. uint8_t mac_addr[DP_MAC_ADDR_LEN], i;
  2126. if (!vdev->wds_enabled)
  2127. return;
  2128. /* MEC required only in STA mode */
  2129. if (vdev->opmode != wlan_op_mode_sta)
  2130. return;
  2131. soc = vdev->pdev->soc;
  2132. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2133. peer = TAILQ_FIRST(&vdev->peer_list);
  2134. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2135. if (!peer) {
  2136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2137. FL("peer is NULL"));
  2138. return;
  2139. }
  2140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2141. "%s Tx MEC Handler",
  2142. __func__);
  2143. for (i = 0; i < DP_MAC_ADDR_LEN; i++)
  2144. mac_addr[(DP_MAC_ADDR_LEN - 1) - i] =
  2145. status[(DP_MAC_ADDR_LEN - 2) + i];
  2146. if (qdf_mem_cmp(mac_addr, vdev->mac_addr.raw, DP_MAC_ADDR_LEN))
  2147. dp_peer_add_ast(soc,
  2148. peer,
  2149. mac_addr,
  2150. CDP_TXRX_AST_TYPE_MEC,
  2151. flags);
  2152. }
  2153. #endif
  2154. /**
  2155. * dp_tx_process_htt_completion() - Tx HTT Completion Indication Handler
  2156. * @tx_desc: software descriptor head pointer
  2157. * @status : Tx completion status from HTT descriptor
  2158. *
  2159. * This function will process HTT Tx indication messages from Target
  2160. *
  2161. * Return: none
  2162. */
  2163. static
  2164. void dp_tx_process_htt_completion(struct dp_tx_desc_s *tx_desc, uint8_t *status)
  2165. {
  2166. uint8_t tx_status;
  2167. struct dp_pdev *pdev;
  2168. struct dp_vdev *vdev;
  2169. struct dp_soc *soc;
  2170. uint32_t *htt_status_word = (uint32_t *) status;
  2171. qdf_assert(tx_desc->pdev);
  2172. pdev = tx_desc->pdev;
  2173. vdev = tx_desc->vdev;
  2174. soc = pdev->soc;
  2175. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_status_word[0]);
  2176. switch (tx_status) {
  2177. case HTT_TX_FW2WBM_TX_STATUS_OK:
  2178. case HTT_TX_FW2WBM_TX_STATUS_DROP:
  2179. case HTT_TX_FW2WBM_TX_STATUS_TTL:
  2180. {
  2181. dp_tx_comp_free_buf(soc, tx_desc);
  2182. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  2183. break;
  2184. }
  2185. case HTT_TX_FW2WBM_TX_STATUS_REINJECT:
  2186. {
  2187. dp_tx_reinject_handler(tx_desc, status);
  2188. break;
  2189. }
  2190. case HTT_TX_FW2WBM_TX_STATUS_INSPECT:
  2191. {
  2192. dp_tx_inspect_handler(tx_desc, status);
  2193. break;
  2194. }
  2195. case HTT_TX_FW2WBM_TX_STATUS_MEC_NOTIFY:
  2196. {
  2197. dp_tx_mec_handler(vdev, status);
  2198. break;
  2199. }
  2200. default:
  2201. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2202. "%s Invalid HTT tx_status %d",
  2203. __func__, tx_status);
  2204. break;
  2205. }
  2206. }
  2207. #ifdef MESH_MODE_SUPPORT
  2208. /**
  2209. * dp_tx_comp_fill_tx_completion_stats() - Fill per packet Tx completion stats
  2210. * in mesh meta header
  2211. * @tx_desc: software descriptor head pointer
  2212. * @ts: pointer to tx completion stats
  2213. * Return: none
  2214. */
  2215. static
  2216. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  2217. struct hal_tx_completion_status *ts)
  2218. {
  2219. struct meta_hdr_s *mhdr;
  2220. qdf_nbuf_t netbuf = tx_desc->nbuf;
  2221. if (!tx_desc->msdu_ext_desc) {
  2222. if (qdf_nbuf_pull_head(netbuf, tx_desc->pkt_offset) == NULL) {
  2223. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2224. "netbuf %pK offset %d",
  2225. netbuf, tx_desc->pkt_offset);
  2226. return;
  2227. }
  2228. }
  2229. if (qdf_nbuf_push_head(netbuf, sizeof(struct meta_hdr_s)) == NULL) {
  2230. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2231. "netbuf %pK offset %d", netbuf,
  2232. sizeof(struct meta_hdr_s));
  2233. return;
  2234. }
  2235. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(netbuf);
  2236. mhdr->rssi = ts->ack_frame_rssi;
  2237. mhdr->channel = tx_desc->pdev->operating_channel;
  2238. }
  2239. #else
  2240. static
  2241. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  2242. struct hal_tx_completion_status *ts)
  2243. {
  2244. }
  2245. #endif
  2246. /**
  2247. * dp_tx_update_peer_stats() - Update peer stats from Tx completion indications
  2248. * @peer: Handle to DP peer
  2249. * @ts: pointer to HAL Tx completion stats
  2250. * @length: MSDU length
  2251. *
  2252. * Return: None
  2253. */
  2254. static void dp_tx_update_peer_stats(struct dp_peer *peer,
  2255. struct hal_tx_completion_status *ts, uint32_t length)
  2256. {
  2257. struct dp_pdev *pdev = peer->vdev->pdev;
  2258. struct dp_soc *soc = pdev->soc;
  2259. uint8_t mcs, pkt_type;
  2260. mcs = ts->mcs;
  2261. pkt_type = ts->pkt_type;
  2262. if (!ts->release_src == HAL_TX_COMP_RELEASE_SOURCE_TQM)
  2263. return;
  2264. if (peer->bss_peer) {
  2265. DP_STATS_INC_PKT(peer, tx.mcast, 1, length);
  2266. } else {
  2267. DP_STATS_INC_PKT(peer, tx.ucast, 1, length);
  2268. }
  2269. DP_STATS_INC_PKT(peer, tx.comp_pkt, 1, length);
  2270. DP_STATS_INCC_PKT(peer, tx.tx_success, 1, length,
  2271. (ts->status == HAL_TX_TQM_RR_FRAME_ACKED));
  2272. DP_STATS_INCC(peer, tx.dropped.age_out, 1,
  2273. (ts->status == HAL_TX_TQM_RR_REM_CMD_AGED));
  2274. DP_STATS_INCC(peer, tx.dropped.fw_rem, 1,
  2275. (ts->status == HAL_TX_TQM_RR_REM_CMD_REM));
  2276. DP_STATS_INCC(peer, tx.dropped.fw_rem_notx, 1,
  2277. (ts->status == HAL_TX_TQM_RR_REM_CMD_NOTX));
  2278. DP_STATS_INCC(peer, tx.dropped.fw_rem_tx, 1,
  2279. (ts->status == HAL_TX_TQM_RR_REM_CMD_TX));
  2280. DP_STATS_INCC(peer, tx.dropped.fw_reason1, 1,
  2281. (ts->status == HAL_TX_TQM_RR_FW_REASON1));
  2282. DP_STATS_INCC(peer, tx.dropped.fw_reason2, 1,
  2283. (ts->status == HAL_TX_TQM_RR_FW_REASON2));
  2284. DP_STATS_INCC(peer, tx.dropped.fw_reason3, 1,
  2285. (ts->status == HAL_TX_TQM_RR_FW_REASON3));
  2286. if (!ts->status == HAL_TX_TQM_RR_FRAME_ACKED)
  2287. return;
  2288. DP_STATS_INCC(peer, tx.ofdma, 1, ts->ofdma);
  2289. DP_STATS_INCC(peer, tx.amsdu_cnt, 1, ts->msdu_part_of_amsdu);
  2290. DP_STATS_INCC(peer, tx.non_amsdu_cnt, 1, !ts->msdu_part_of_amsdu);
  2291. if (!(soc->process_tx_status))
  2292. return;
  2293. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2294. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  2295. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2296. ((mcs < (MAX_MCS_11A)) && (pkt_type == DOT11_A)));
  2297. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2298. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  2299. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2300. ((mcs < MAX_MCS_11B) && (pkt_type == DOT11_B)));
  2301. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2302. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  2303. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2304. ((mcs < MAX_MCS_11A) && (pkt_type == DOT11_N)));
  2305. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2306. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  2307. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2308. ((mcs < MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  2309. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2310. ((mcs >= (MAX_MCS - 1)) && (pkt_type == DOT11_AX)));
  2311. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2312. ((mcs < (MAX_MCS - 1)) && (pkt_type == DOT11_AX)));
  2313. DP_STATS_INC(peer, tx.sgi_count[ts->sgi], 1);
  2314. DP_STATS_INC(peer, tx.bw[ts->bw], 1);
  2315. DP_STATS_UPD(peer, tx.last_ack_rssi, ts->ack_frame_rssi);
  2316. DP_STATS_INC(peer, tx.wme_ac_type[TID_TO_WME_AC(ts->tid)], 1);
  2317. DP_STATS_INCC(peer, tx.stbc, 1, ts->stbc);
  2318. DP_STATS_INCC(peer, tx.ldpc, 1, ts->ldpc);
  2319. DP_STATS_INCC(peer, tx.retries, 1, ts->transmit_cnt > 1);
  2320. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  2321. soc->cdp_soc.ol_ops->update_dp_stats(pdev->ctrl_pdev,
  2322. &peer->stats, ts->peer_id,
  2323. UPDATE_PEER_STATS);
  2324. }
  2325. }
  2326. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  2327. /**
  2328. * dp_tx_flow_pool_lock() - take flow pool lock
  2329. * @soc: core txrx main context
  2330. * @tx_desc: tx desc
  2331. *
  2332. * Return: None
  2333. */
  2334. static inline
  2335. void dp_tx_flow_pool_lock(struct dp_soc *soc,
  2336. struct dp_tx_desc_s *tx_desc)
  2337. {
  2338. struct dp_tx_desc_pool_s *pool;
  2339. uint8_t desc_pool_id;
  2340. desc_pool_id = tx_desc->pool_id;
  2341. pool = &soc->tx_desc[desc_pool_id];
  2342. qdf_spin_lock_bh(&pool->flow_pool_lock);
  2343. }
  2344. /**
  2345. * dp_tx_flow_pool_unlock() - release flow pool lock
  2346. * @soc: core txrx main context
  2347. * @tx_desc: tx desc
  2348. *
  2349. * Return: None
  2350. */
  2351. static inline
  2352. void dp_tx_flow_pool_unlock(struct dp_soc *soc,
  2353. struct dp_tx_desc_s *tx_desc)
  2354. {
  2355. struct dp_tx_desc_pool_s *pool;
  2356. uint8_t desc_pool_id;
  2357. desc_pool_id = tx_desc->pool_id;
  2358. pool = &soc->tx_desc[desc_pool_id];
  2359. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  2360. }
  2361. #else
  2362. static inline
  2363. void dp_tx_flow_pool_lock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  2364. {
  2365. }
  2366. static inline
  2367. void dp_tx_flow_pool_unlock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  2368. {
  2369. }
  2370. #endif
  2371. /**
  2372. * dp_tx_notify_completion() - Notify tx completion for this desc
  2373. * @soc: core txrx main context
  2374. * @tx_desc: tx desc
  2375. * @netbuf: buffer
  2376. *
  2377. * Return: none
  2378. */
  2379. static inline void dp_tx_notify_completion(struct dp_soc *soc,
  2380. struct dp_tx_desc_s *tx_desc,
  2381. qdf_nbuf_t netbuf)
  2382. {
  2383. void *osif_dev;
  2384. ol_txrx_completion_fp tx_compl_cbk = NULL;
  2385. qdf_assert(tx_desc);
  2386. dp_tx_flow_pool_lock(soc, tx_desc);
  2387. if (!tx_desc->vdev ||
  2388. !tx_desc->vdev->osif_vdev) {
  2389. dp_tx_flow_pool_unlock(soc, tx_desc);
  2390. return;
  2391. }
  2392. osif_dev = tx_desc->vdev->osif_vdev;
  2393. tx_compl_cbk = tx_desc->vdev->tx_comp;
  2394. dp_tx_flow_pool_unlock(soc, tx_desc);
  2395. if (tx_compl_cbk)
  2396. tx_compl_cbk(netbuf, osif_dev);
  2397. }
  2398. /** dp_tx_sojourn_stats_process() - Collect sojourn stats
  2399. * @pdev: pdev handle
  2400. * @tid: tid value
  2401. * @txdesc_ts: timestamp from txdesc
  2402. * @ppdu_id: ppdu id
  2403. *
  2404. * Return: none
  2405. */
  2406. #ifdef FEATURE_PERPKT_INFO
  2407. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  2408. uint8_t tid,
  2409. uint64_t txdesc_ts,
  2410. uint32_t ppdu_id)
  2411. {
  2412. uint64_t delta_ms;
  2413. struct cdp_tx_sojourn_stats *sojourn_stats;
  2414. if (pdev->enhanced_stats_en == 0)
  2415. return;
  2416. if (pdev->sojourn_stats.ppdu_seq_id == 0)
  2417. pdev->sojourn_stats.ppdu_seq_id = ppdu_id;
  2418. if (ppdu_id != pdev->sojourn_stats.ppdu_seq_id) {
  2419. if (!pdev->sojourn_buf)
  2420. return;
  2421. sojourn_stats = (struct cdp_tx_sojourn_stats *)
  2422. qdf_nbuf_data(pdev->sojourn_buf);
  2423. qdf_mem_copy(sojourn_stats, &pdev->sojourn_stats,
  2424. sizeof(struct cdp_tx_sojourn_stats));
  2425. qdf_mem_zero(&pdev->sojourn_stats,
  2426. sizeof(struct cdp_tx_sojourn_stats));
  2427. dp_wdi_event_handler(WDI_EVENT_TX_SOJOURN_STAT, pdev->soc,
  2428. pdev->sojourn_buf, HTT_INVALID_PEER,
  2429. WDI_NO_VAL, pdev->pdev_id);
  2430. pdev->sojourn_stats.ppdu_seq_id = ppdu_id;
  2431. }
  2432. if (tid == HTT_INVALID_TID)
  2433. return;
  2434. delta_ms = qdf_ktime_to_ms(qdf_ktime_get()) -
  2435. txdesc_ts;
  2436. qdf_ewma_tx_lag_add(&pdev->sojourn_stats.avg_sojourn_msdu[tid],
  2437. delta_ms);
  2438. pdev->sojourn_stats.sum_sojourn_msdu[tid] += delta_ms;
  2439. pdev->sojourn_stats.num_msdus[tid]++;
  2440. }
  2441. #else
  2442. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  2443. uint8_t tid,
  2444. uint64_t txdesc_ts,
  2445. uint32_t ppdu_id)
  2446. {
  2447. }
  2448. #endif
  2449. /**
  2450. * dp_tx_comp_process_tx_status() - Parse and Dump Tx completion status info
  2451. * @tx_desc: software descriptor head pointer
  2452. * @length: packet length
  2453. *
  2454. * Return: none
  2455. */
  2456. static inline void dp_tx_comp_process_tx_status(struct dp_tx_desc_s *tx_desc,
  2457. uint32_t length)
  2458. {
  2459. struct hal_tx_completion_status ts = {0};
  2460. struct dp_soc *soc = NULL;
  2461. struct dp_vdev *vdev = tx_desc->vdev;
  2462. struct dp_peer *peer = NULL;
  2463. struct ether_header *eh =
  2464. (struct ether_header *)qdf_nbuf_data(tx_desc->nbuf);
  2465. if (!vdev) {
  2466. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2467. "invalid vdev");
  2468. goto out;
  2469. }
  2470. hal_tx_comp_get_status(&tx_desc->comp, &ts, vdev->pdev->soc->hal_soc);
  2471. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2472. "-------------------- \n"
  2473. "Tx Completion Stats: \n"
  2474. "-------------------- \n"
  2475. "ack_frame_rssi = %d \n"
  2476. "first_msdu = %d \n"
  2477. "last_msdu = %d \n"
  2478. "msdu_part_of_amsdu = %d \n"
  2479. "rate_stats valid = %d \n"
  2480. "bw = %d \n"
  2481. "pkt_type = %d \n"
  2482. "stbc = %d \n"
  2483. "ldpc = %d \n"
  2484. "sgi = %d \n"
  2485. "mcs = %d \n"
  2486. "ofdma = %d \n"
  2487. "tones_in_ru = %d \n"
  2488. "tsf = %d \n"
  2489. "ppdu_id = %d \n"
  2490. "transmit_cnt = %d \n"
  2491. "tid = %d \n"
  2492. "peer_id = %d ",
  2493. ts.ack_frame_rssi, ts.first_msdu, ts.last_msdu,
  2494. ts.msdu_part_of_amsdu, ts.valid, ts.bw,
  2495. ts.pkt_type, ts.stbc, ts.ldpc, ts.sgi,
  2496. ts.mcs, ts.ofdma, ts.tones_in_ru, ts.tsf,
  2497. ts.ppdu_id, ts.transmit_cnt, ts.tid,
  2498. ts.peer_id);
  2499. soc = vdev->pdev->soc;
  2500. /* Update SoC level stats */
  2501. DP_STATS_INCC(soc, tx.dropped_fw_removed, 1,
  2502. (ts.status == HAL_TX_TQM_RR_REM_CMD_REM));
  2503. /* Update per-packet stats */
  2504. if (qdf_unlikely(vdev->mesh_vdev) &&
  2505. !(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW))
  2506. dp_tx_comp_fill_tx_completion_stats(tx_desc, &ts);
  2507. /* Update peer level stats */
  2508. peer = dp_peer_find_by_id(soc, ts.peer_id);
  2509. if (!peer) {
  2510. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2511. "invalid peer");
  2512. DP_STATS_INC_PKT(soc, tx.tx_invalid_peer, 1, length);
  2513. goto out;
  2514. }
  2515. if (qdf_likely(peer->vdev->tx_encap_type ==
  2516. htt_cmn_pkt_type_ethernet)) {
  2517. if (peer->bss_peer && IEEE80211_IS_BROADCAST(eh->ether_dhost))
  2518. DP_STATS_INC_PKT(peer, tx.bcast, 1, length);
  2519. }
  2520. dp_tx_sojourn_stats_process(vdev->pdev, ts.tid,
  2521. tx_desc->timestamp,
  2522. ts.ppdu_id);
  2523. dp_tx_update_peer_stats(peer, &ts, length);
  2524. out:
  2525. return;
  2526. }
  2527. /**
  2528. * dp_tx_comp_process_desc() - Tx complete software descriptor handler
  2529. * @soc: core txrx main context
  2530. * @comp_head: software descriptor head pointer
  2531. *
  2532. * This function will process batch of descriptors reaped by dp_tx_comp_handler
  2533. * and release the software descriptors after processing is complete
  2534. *
  2535. * Return: none
  2536. */
  2537. static void dp_tx_comp_process_desc(struct dp_soc *soc,
  2538. struct dp_tx_desc_s *comp_head)
  2539. {
  2540. struct dp_tx_desc_s *desc;
  2541. struct dp_tx_desc_s *next;
  2542. struct hal_tx_completion_status ts = {0};
  2543. uint32_t length;
  2544. struct dp_peer *peer;
  2545. DP_HIST_INIT();
  2546. desc = comp_head;
  2547. while (desc) {
  2548. hal_tx_comp_get_status(&desc->comp, &ts, soc->hal_soc);
  2549. peer = dp_peer_find_by_id(soc, ts.peer_id);
  2550. length = qdf_nbuf_len(desc->nbuf);
  2551. /* check tx completion notification */
  2552. if (QDF_NBUF_CB_TX_EXTRA_FRAG_FLAGS_NOTIFY_COMP(desc->nbuf))
  2553. dp_tx_notify_completion(soc, desc, desc->nbuf);
  2554. dp_tx_comp_process_tx_status(desc, length);
  2555. DPTRACE(qdf_dp_trace_ptr
  2556. (desc->nbuf,
  2557. QDF_DP_TRACE_LI_DP_FREE_PACKET_PTR_RECORD,
  2558. QDF_TRACE_DEFAULT_PDEV_ID,
  2559. qdf_nbuf_data_addr(desc->nbuf),
  2560. sizeof(qdf_nbuf_data(desc->nbuf)),
  2561. desc->id, ts.status)
  2562. );
  2563. /*currently m_copy/tx_capture is not supported for scatter gather packets*/
  2564. if (!(desc->msdu_ext_desc) && (dp_get_completion_indication_for_stack(soc,
  2565. desc->pdev, ts.peer_id, ts.ppdu_id,
  2566. ts.first_msdu, ts.last_msdu,
  2567. desc->nbuf) == QDF_STATUS_SUCCESS)) {
  2568. qdf_nbuf_unmap(soc->osdev, desc->nbuf,
  2569. QDF_DMA_TO_DEVICE);
  2570. dp_send_completion_to_stack(soc, desc->pdev, ts.peer_id,
  2571. ts.ppdu_id, desc->nbuf);
  2572. } else {
  2573. dp_tx_comp_free_buf(soc, desc);
  2574. }
  2575. DP_HIST_PACKET_COUNT_INC(desc->pdev->pdev_id);
  2576. next = desc->next;
  2577. dp_tx_desc_release(desc, desc->pool_id);
  2578. desc = next;
  2579. }
  2580. DP_TX_HIST_STATS_PER_PDEV();
  2581. }
  2582. /**
  2583. * dp_tx_comp_handler() - Tx completion handler
  2584. * @soc: core txrx main context
  2585. * @ring_id: completion ring id
  2586. * @quota: No. of packets/descriptors that can be serviced in one loop
  2587. *
  2588. * This function will collect hardware release ring element contents and
  2589. * handle descriptor contents. Based on contents, free packet or handle error
  2590. * conditions
  2591. *
  2592. * Return: none
  2593. */
  2594. uint32_t dp_tx_comp_handler(struct dp_soc *soc, void *hal_srng, uint32_t quota)
  2595. {
  2596. void *tx_comp_hal_desc;
  2597. uint8_t buffer_src;
  2598. uint8_t pool_id;
  2599. uint32_t tx_desc_id;
  2600. struct dp_tx_desc_s *tx_desc = NULL;
  2601. struct dp_tx_desc_s *head_desc = NULL;
  2602. struct dp_tx_desc_s *tail_desc = NULL;
  2603. uint32_t num_processed;
  2604. uint32_t count;
  2605. if (qdf_unlikely(hal_srng_access_start(soc->hal_soc, hal_srng))) {
  2606. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2607. "%s %d : HAL RING Access Failed -- %pK",
  2608. __func__, __LINE__, hal_srng);
  2609. return 0;
  2610. }
  2611. num_processed = 0;
  2612. count = 0;
  2613. /* Find head descriptor from completion ring */
  2614. while (qdf_likely(tx_comp_hal_desc =
  2615. hal_srng_dst_get_next(soc->hal_soc, hal_srng))) {
  2616. buffer_src = hal_tx_comp_get_buffer_source(tx_comp_hal_desc);
  2617. /* If this buffer was not released by TQM or FW, then it is not
  2618. * Tx completion indication, assert */
  2619. if ((buffer_src != HAL_TX_COMP_RELEASE_SOURCE_TQM) &&
  2620. (buffer_src != HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  2621. QDF_TRACE(QDF_MODULE_ID_DP,
  2622. QDF_TRACE_LEVEL_FATAL,
  2623. "Tx comp release_src != TQM | FW");
  2624. qdf_assert_always(0);
  2625. }
  2626. /* Get descriptor id */
  2627. tx_desc_id = hal_tx_comp_get_desc_id(tx_comp_hal_desc);
  2628. pool_id = (tx_desc_id & DP_TX_DESC_ID_POOL_MASK) >>
  2629. DP_TX_DESC_ID_POOL_OS;
  2630. if (!dp_tx_is_desc_id_valid(soc, tx_desc_id))
  2631. continue;
  2632. /* Find Tx descriptor */
  2633. tx_desc = dp_tx_desc_find(soc, pool_id,
  2634. (tx_desc_id & DP_TX_DESC_ID_PAGE_MASK) >>
  2635. DP_TX_DESC_ID_PAGE_OS,
  2636. (tx_desc_id & DP_TX_DESC_ID_OFFSET_MASK) >>
  2637. DP_TX_DESC_ID_OFFSET_OS);
  2638. /*
  2639. * If the release source is FW, process the HTT status
  2640. */
  2641. if (qdf_unlikely(buffer_src ==
  2642. HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  2643. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  2644. hal_tx_comp_get_htt_desc(tx_comp_hal_desc,
  2645. htt_tx_status);
  2646. dp_tx_process_htt_completion(tx_desc,
  2647. htt_tx_status);
  2648. } else {
  2649. /* Pool id is not matching. Error */
  2650. if (tx_desc->pool_id != pool_id) {
  2651. QDF_TRACE(QDF_MODULE_ID_DP,
  2652. QDF_TRACE_LEVEL_FATAL,
  2653. "Tx Comp pool id %d not matched %d",
  2654. pool_id, tx_desc->pool_id);
  2655. qdf_assert_always(0);
  2656. }
  2657. if (!(tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED) ||
  2658. !(tx_desc->flags & DP_TX_DESC_FLAG_QUEUED_TX)) {
  2659. QDF_TRACE(QDF_MODULE_ID_DP,
  2660. QDF_TRACE_LEVEL_FATAL,
  2661. "Txdesc invalid, flgs = %x,id = %d",
  2662. tx_desc->flags, tx_desc_id);
  2663. qdf_assert_always(0);
  2664. }
  2665. /* First ring descriptor on the cycle */
  2666. if (!head_desc) {
  2667. head_desc = tx_desc;
  2668. tail_desc = tx_desc;
  2669. }
  2670. tail_desc->next = tx_desc;
  2671. tx_desc->next = NULL;
  2672. tail_desc = tx_desc;
  2673. /* Collect hw completion contents */
  2674. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  2675. &tx_desc->comp, 1);
  2676. }
  2677. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  2678. /*
  2679. * Processed packet count is more than given quota
  2680. * stop to processing
  2681. */
  2682. if ((num_processed >= quota))
  2683. break;
  2684. count++;
  2685. }
  2686. hal_srng_access_end(soc->hal_soc, hal_srng);
  2687. /* Process the reaped descriptors */
  2688. if (head_desc)
  2689. dp_tx_comp_process_desc(soc, head_desc);
  2690. return num_processed;
  2691. }
  2692. #ifdef CONVERGED_TDLS_ENABLE
  2693. /**
  2694. * dp_tx_non_std() - Allow the control-path SW to send data frames
  2695. *
  2696. * @data_vdev - which vdev should transmit the tx data frames
  2697. * @tx_spec - what non-standard handling to apply to the tx data frames
  2698. * @msdu_list - NULL-terminated list of tx MSDUs
  2699. *
  2700. * Return: NULL on success,
  2701. * nbuf when it fails to send
  2702. */
  2703. qdf_nbuf_t dp_tx_non_std(struct cdp_vdev *vdev_handle,
  2704. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list)
  2705. {
  2706. struct dp_vdev *vdev = (struct dp_vdev *) vdev_handle;
  2707. if (tx_spec & OL_TX_SPEC_NO_FREE)
  2708. vdev->is_tdls_frame = true;
  2709. return dp_tx_send(vdev_handle, msdu_list);
  2710. }
  2711. #endif
  2712. /**
  2713. * dp_tx_vdev_attach() - attach vdev to dp tx
  2714. * @vdev: virtual device instance
  2715. *
  2716. * Return: QDF_STATUS_SUCCESS: success
  2717. * QDF_STATUS_E_RESOURCES: Error return
  2718. */
  2719. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  2720. {
  2721. /*
  2722. * Fill HTT TCL Metadata with Vdev ID and MAC ID
  2723. */
  2724. HTT_TX_TCL_METADATA_TYPE_SET(vdev->htt_tcl_metadata,
  2725. HTT_TCL_METADATA_TYPE_VDEV_BASED);
  2726. HTT_TX_TCL_METADATA_VDEV_ID_SET(vdev->htt_tcl_metadata,
  2727. vdev->vdev_id);
  2728. HTT_TX_TCL_METADATA_PDEV_ID_SET(vdev->htt_tcl_metadata,
  2729. DP_SW2HW_MACID(vdev->pdev->pdev_id));
  2730. /*
  2731. * Set HTT Extension Valid bit to 0 by default
  2732. */
  2733. HTT_TX_TCL_METADATA_VALID_HTT_SET(vdev->htt_tcl_metadata, 0);
  2734. dp_tx_vdev_update_search_flags(vdev);
  2735. return QDF_STATUS_SUCCESS;
  2736. }
  2737. /**
  2738. * dp_tx_vdev_update_search_flags() - Update vdev flags as per opmode
  2739. * @vdev: virtual device instance
  2740. *
  2741. * Return: void
  2742. *
  2743. */
  2744. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  2745. {
  2746. struct dp_soc *soc = vdev->pdev->soc;
  2747. /*
  2748. * Enable both AddrY (SA based search) and AddrX (Da based search)
  2749. * for TDLS link
  2750. *
  2751. * Enable AddrY (SA based search) only for non-WDS STA and
  2752. * ProxySTA VAP modes.
  2753. *
  2754. * In all other VAP modes, only DA based search should be
  2755. * enabled
  2756. */
  2757. if (vdev->opmode == wlan_op_mode_sta &&
  2758. vdev->tdls_link_connected)
  2759. vdev->hal_desc_addr_search_flags =
  2760. (HAL_TX_DESC_ADDRX_EN | HAL_TX_DESC_ADDRY_EN);
  2761. else if ((vdev->opmode == wlan_op_mode_sta &&
  2762. (!vdev->wds_enabled || vdev->proxysta_vdev)))
  2763. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRY_EN;
  2764. else
  2765. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRX_EN;
  2766. /* Set search type only when peer map v2 messaging is enabled
  2767. * as we will have the search index (AST hash) only when v2 is
  2768. * enabled
  2769. */
  2770. if (soc->is_peer_map_unmap_v2 && vdev->opmode == wlan_op_mode_sta)
  2771. vdev->search_type = HAL_TX_ADDR_INDEX_SEARCH;
  2772. else
  2773. vdev->search_type = HAL_TX_ADDR_SEARCH_DEFAULT;
  2774. }
  2775. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  2776. static void dp_tx_desc_flush(struct dp_vdev *vdev)
  2777. {
  2778. }
  2779. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  2780. /* dp_tx_desc_flush() - release resources associated
  2781. * to tx_desc
  2782. * @vdev: virtual device instance
  2783. *
  2784. * This function will free all outstanding Tx buffers,
  2785. * including ME buffer for which either free during
  2786. * completion didn't happened or completion is not
  2787. * received.
  2788. */
  2789. static void dp_tx_desc_flush(struct dp_vdev *vdev)
  2790. {
  2791. uint8_t i, num_pool;
  2792. uint32_t j;
  2793. uint32_t num_desc;
  2794. struct dp_soc *soc = vdev->pdev->soc;
  2795. struct dp_tx_desc_s *tx_desc = NULL;
  2796. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  2797. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  2798. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  2799. for (i = 0; i < num_pool; i++) {
  2800. for (j = 0; j < num_desc; j++) {
  2801. tx_desc_pool = &((soc)->tx_desc[(i)]);
  2802. if (tx_desc_pool &&
  2803. tx_desc_pool->desc_pages.cacheable_pages) {
  2804. tx_desc = dp_tx_desc_find(soc, i,
  2805. (j & DP_TX_DESC_ID_PAGE_MASK) >>
  2806. DP_TX_DESC_ID_PAGE_OS,
  2807. (j & DP_TX_DESC_ID_OFFSET_MASK) >>
  2808. DP_TX_DESC_ID_OFFSET_OS);
  2809. if (tx_desc && (tx_desc->vdev == vdev) &&
  2810. (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)) {
  2811. dp_tx_comp_free_buf(soc, tx_desc);
  2812. dp_tx_desc_release(tx_desc, i);
  2813. }
  2814. }
  2815. }
  2816. }
  2817. }
  2818. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  2819. /**
  2820. * dp_tx_vdev_detach() - detach vdev from dp tx
  2821. * @vdev: virtual device instance
  2822. *
  2823. * Return: QDF_STATUS_SUCCESS: success
  2824. * QDF_STATUS_E_RESOURCES: Error return
  2825. */
  2826. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  2827. {
  2828. dp_tx_desc_flush(vdev);
  2829. return QDF_STATUS_SUCCESS;
  2830. }
  2831. /**
  2832. * dp_tx_pdev_attach() - attach pdev to dp tx
  2833. * @pdev: physical device instance
  2834. *
  2835. * Return: QDF_STATUS_SUCCESS: success
  2836. * QDF_STATUS_E_RESOURCES: Error return
  2837. */
  2838. QDF_STATUS dp_tx_pdev_attach(struct dp_pdev *pdev)
  2839. {
  2840. struct dp_soc *soc = pdev->soc;
  2841. /* Initialize Flow control counters */
  2842. qdf_atomic_init(&pdev->num_tx_exception);
  2843. qdf_atomic_init(&pdev->num_tx_outstanding);
  2844. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2845. /* Initialize descriptors in TCL Ring */
  2846. hal_tx_init_data_ring(soc->hal_soc,
  2847. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  2848. }
  2849. return QDF_STATUS_SUCCESS;
  2850. }
  2851. /**
  2852. * dp_tx_pdev_detach() - detach pdev from dp tx
  2853. * @pdev: physical device instance
  2854. *
  2855. * Return: QDF_STATUS_SUCCESS: success
  2856. * QDF_STATUS_E_RESOURCES: Error return
  2857. */
  2858. QDF_STATUS dp_tx_pdev_detach(struct dp_pdev *pdev)
  2859. {
  2860. dp_tx_me_exit(pdev);
  2861. return QDF_STATUS_SUCCESS;
  2862. }
  2863. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  2864. /* Pools will be allocated dynamically */
  2865. static int dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  2866. int num_desc)
  2867. {
  2868. uint8_t i;
  2869. for (i = 0; i < num_pool; i++) {
  2870. qdf_spinlock_create(&soc->tx_desc[i].flow_pool_lock);
  2871. soc->tx_desc[i].status = FLOW_POOL_INACTIVE;
  2872. }
  2873. return 0;
  2874. }
  2875. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  2876. {
  2877. uint8_t i;
  2878. for (i = 0; i < num_pool; i++)
  2879. qdf_spinlock_destroy(&soc->tx_desc[i].flow_pool_lock);
  2880. }
  2881. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  2882. static int dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  2883. int num_desc)
  2884. {
  2885. uint8_t i;
  2886. /* Allocate software Tx descriptor pools */
  2887. for (i = 0; i < num_pool; i++) {
  2888. if (dp_tx_desc_pool_alloc(soc, i, num_desc)) {
  2889. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2890. "%s Tx Desc Pool alloc %d failed %pK",
  2891. __func__, i, soc);
  2892. return ENOMEM;
  2893. }
  2894. }
  2895. return 0;
  2896. }
  2897. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  2898. {
  2899. uint8_t i;
  2900. for (i = 0; i < num_pool; i++) {
  2901. qdf_assert_always(!soc->tx_desc[i].num_allocated);
  2902. if (dp_tx_desc_pool_free(soc, i)) {
  2903. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2904. "%s Tx Desc Pool Free failed", __func__);
  2905. }
  2906. }
  2907. }
  2908. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  2909. /**
  2910. * dp_tx_soc_detach() - detach soc from dp tx
  2911. * @soc: core txrx main context
  2912. *
  2913. * This function will detach dp tx into main device context
  2914. * will free dp tx resource and initialize resources
  2915. *
  2916. * Return: QDF_STATUS_SUCCESS: success
  2917. * QDF_STATUS_E_RESOURCES: Error return
  2918. */
  2919. QDF_STATUS dp_tx_soc_detach(struct dp_soc *soc)
  2920. {
  2921. uint8_t num_pool;
  2922. uint16_t num_desc;
  2923. uint16_t num_ext_desc;
  2924. uint8_t i;
  2925. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  2926. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  2927. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  2928. dp_tx_flow_control_deinit(soc);
  2929. dp_tx_delete_static_pools(soc, num_pool);
  2930. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2931. "%s Tx Desc Pool Free num_pool = %d, descs = %d",
  2932. __func__, num_pool, num_desc);
  2933. for (i = 0; i < num_pool; i++) {
  2934. if (dp_tx_ext_desc_pool_free(soc, i)) {
  2935. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2936. "%s Tx Ext Desc Pool Free failed",
  2937. __func__);
  2938. return QDF_STATUS_E_RESOURCES;
  2939. }
  2940. }
  2941. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2942. "%s MSDU Ext Desc Pool %d Free descs = %d",
  2943. __func__, num_pool, num_ext_desc);
  2944. for (i = 0; i < num_pool; i++) {
  2945. dp_tx_tso_desc_pool_free(soc, i);
  2946. }
  2947. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2948. "%s TSO Desc Pool %d Free descs = %d",
  2949. __func__, num_pool, num_desc);
  2950. for (i = 0; i < num_pool; i++)
  2951. dp_tx_tso_num_seg_pool_free(soc, i);
  2952. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2953. "%s TSO Num of seg Desc Pool %d Free descs = %d",
  2954. __func__, num_pool, num_desc);
  2955. return QDF_STATUS_SUCCESS;
  2956. }
  2957. /**
  2958. * dp_tx_soc_attach() - attach soc to dp tx
  2959. * @soc: core txrx main context
  2960. *
  2961. * This function will attach dp tx into main device context
  2962. * will allocate dp tx resource and initialize resources
  2963. *
  2964. * Return: QDF_STATUS_SUCCESS: success
  2965. * QDF_STATUS_E_RESOURCES: Error return
  2966. */
  2967. QDF_STATUS dp_tx_soc_attach(struct dp_soc *soc)
  2968. {
  2969. uint8_t i;
  2970. uint8_t num_pool;
  2971. uint32_t num_desc;
  2972. uint32_t num_ext_desc;
  2973. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  2974. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  2975. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  2976. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  2977. goto fail;
  2978. dp_tx_flow_control_init(soc);
  2979. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2980. "%s Tx Desc Alloc num_pool = %d, descs = %d",
  2981. __func__, num_pool, num_desc);
  2982. /* Allocate extension tx descriptor pools */
  2983. for (i = 0; i < num_pool; i++) {
  2984. if (dp_tx_ext_desc_pool_alloc(soc, i, num_ext_desc)) {
  2985. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2986. "MSDU Ext Desc Pool alloc %d failed %pK",
  2987. i, soc);
  2988. goto fail;
  2989. }
  2990. }
  2991. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2992. "%s MSDU Ext Desc Alloc %d, descs = %d",
  2993. __func__, num_pool, num_ext_desc);
  2994. for (i = 0; i < num_pool; i++) {
  2995. if (dp_tx_tso_desc_pool_alloc(soc, i, num_desc)) {
  2996. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2997. "TSO Desc Pool alloc %d failed %pK",
  2998. i, soc);
  2999. goto fail;
  3000. }
  3001. }
  3002. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3003. "%s TSO Desc Alloc %d, descs = %d",
  3004. __func__, num_pool, num_desc);
  3005. for (i = 0; i < num_pool; i++) {
  3006. if (dp_tx_tso_num_seg_pool_alloc(soc, i, num_desc)) {
  3007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3008. "TSO Num of seg Pool alloc %d failed %pK",
  3009. i, soc);
  3010. goto fail;
  3011. }
  3012. }
  3013. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3014. "%s TSO Num of seg pool Alloc %d, descs = %d",
  3015. __func__, num_pool, num_desc);
  3016. /* Initialize descriptors in TCL Rings */
  3017. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3018. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3019. hal_tx_init_data_ring(soc->hal_soc,
  3020. soc->tcl_data_ring[i].hal_srng);
  3021. }
  3022. }
  3023. /*
  3024. * todo - Add a runtime config option to enable this.
  3025. */
  3026. /*
  3027. * Due to multiple issues on NPR EMU, enable it selectively
  3028. * only for NPR EMU, should be removed, once NPR platforms
  3029. * are stable.
  3030. */
  3031. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  3032. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3033. "%s HAL Tx init Success", __func__);
  3034. return QDF_STATUS_SUCCESS;
  3035. fail:
  3036. /* Detach will take care of freeing only allocated resources */
  3037. dp_tx_soc_detach(soc);
  3038. return QDF_STATUS_E_RESOURCES;
  3039. }
  3040. /*
  3041. * dp_tx_me_mem_free(): Function to free allocated memory in mcast enahncement
  3042. * pdev: pointer to DP PDEV structure
  3043. * seg_info_head: Pointer to the head of list
  3044. *
  3045. * return: void
  3046. */
  3047. static void dp_tx_me_mem_free(struct dp_pdev *pdev,
  3048. struct dp_tx_seg_info_s *seg_info_head)
  3049. {
  3050. struct dp_tx_me_buf_t *mc_uc_buf;
  3051. struct dp_tx_seg_info_s *seg_info_new = NULL;
  3052. qdf_nbuf_t nbuf = NULL;
  3053. uint64_t phy_addr;
  3054. while (seg_info_head) {
  3055. nbuf = seg_info_head->nbuf;
  3056. mc_uc_buf = (struct dp_tx_me_buf_t *)
  3057. seg_info_head->frags[0].vaddr;
  3058. phy_addr = seg_info_head->frags[0].paddr_hi;
  3059. phy_addr = (phy_addr << 32) | seg_info_head->frags[0].paddr_lo;
  3060. qdf_mem_unmap_nbytes_single(pdev->soc->osdev,
  3061. phy_addr,
  3062. QDF_DMA_TO_DEVICE , DP_MAC_ADDR_LEN);
  3063. dp_tx_me_free_buf(pdev, mc_uc_buf);
  3064. qdf_nbuf_free(nbuf);
  3065. seg_info_new = seg_info_head;
  3066. seg_info_head = seg_info_head->next;
  3067. qdf_mem_free(seg_info_new);
  3068. }
  3069. }
  3070. /**
  3071. * dp_tx_me_send_convert_ucast(): function to convert multicast to unicast
  3072. * @vdev: DP VDEV handle
  3073. * @nbuf: Multicast nbuf
  3074. * @newmac: Table of the clients to which packets have to be sent
  3075. * @new_mac_cnt: No of clients
  3076. *
  3077. * return: no of converted packets
  3078. */
  3079. uint16_t
  3080. dp_tx_me_send_convert_ucast(struct cdp_vdev *vdev_handle, qdf_nbuf_t nbuf,
  3081. uint8_t newmac[][DP_MAC_ADDR_LEN], uint8_t new_mac_cnt)
  3082. {
  3083. struct dp_vdev *vdev = (struct dp_vdev *) vdev_handle;
  3084. struct dp_pdev *pdev = vdev->pdev;
  3085. struct ether_header *eh;
  3086. uint8_t *data;
  3087. uint16_t len;
  3088. /* reference to frame dst addr */
  3089. uint8_t *dstmac;
  3090. /* copy of original frame src addr */
  3091. uint8_t srcmac[DP_MAC_ADDR_LEN];
  3092. /* local index into newmac */
  3093. uint8_t new_mac_idx = 0;
  3094. struct dp_tx_me_buf_t *mc_uc_buf;
  3095. qdf_nbuf_t nbuf_clone;
  3096. struct dp_tx_msdu_info_s msdu_info;
  3097. struct dp_tx_seg_info_s *seg_info_head = NULL;
  3098. struct dp_tx_seg_info_s *seg_info_tail = NULL;
  3099. struct dp_tx_seg_info_s *seg_info_new;
  3100. struct dp_tx_frag_info_s data_frag;
  3101. qdf_dma_addr_t paddr_data;
  3102. qdf_dma_addr_t paddr_mcbuf = 0;
  3103. uint8_t empty_entry_mac[DP_MAC_ADDR_LEN] = {0};
  3104. QDF_STATUS status;
  3105. qdf_mem_set(&msdu_info, sizeof(msdu_info), 0x0);
  3106. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  3107. eh = (struct ether_header *) nbuf;
  3108. qdf_mem_copy(srcmac, eh->ether_shost, DP_MAC_ADDR_LEN);
  3109. len = qdf_nbuf_len(nbuf);
  3110. data = qdf_nbuf_data(nbuf);
  3111. status = qdf_nbuf_map(vdev->osdev, nbuf,
  3112. QDF_DMA_TO_DEVICE);
  3113. if (status) {
  3114. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3115. "Mapping failure Error:%d", status);
  3116. DP_STATS_INC(vdev, tx_i.mcast_en.dropped_map_error, 1);
  3117. qdf_nbuf_free(nbuf);
  3118. return 1;
  3119. }
  3120. paddr_data = qdf_nbuf_get_frag_paddr(nbuf, 0) + IEEE80211_ADDR_LEN;
  3121. /*preparing data fragment*/
  3122. data_frag.vaddr = qdf_nbuf_data(nbuf) + IEEE80211_ADDR_LEN;
  3123. data_frag.paddr_lo = (uint32_t)paddr_data;
  3124. data_frag.paddr_hi = (((uint64_t) paddr_data) >> 32);
  3125. data_frag.len = len - DP_MAC_ADDR_LEN;
  3126. for (new_mac_idx = 0; new_mac_idx < new_mac_cnt; new_mac_idx++) {
  3127. dstmac = newmac[new_mac_idx];
  3128. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3129. "added mac addr (%pM)", dstmac);
  3130. /* Check for NULL Mac Address */
  3131. if (!qdf_mem_cmp(dstmac, empty_entry_mac, DP_MAC_ADDR_LEN))
  3132. continue;
  3133. /* frame to self mac. skip */
  3134. if (!qdf_mem_cmp(dstmac, srcmac, DP_MAC_ADDR_LEN))
  3135. continue;
  3136. /*
  3137. * TODO: optimize to avoid malloc in per-packet path
  3138. * For eg. seg_pool can be made part of vdev structure
  3139. */
  3140. seg_info_new = qdf_mem_malloc(sizeof(*seg_info_new));
  3141. if (!seg_info_new) {
  3142. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3143. "alloc failed");
  3144. DP_STATS_INC(vdev, tx_i.mcast_en.fail_seg_alloc, 1);
  3145. goto fail_seg_alloc;
  3146. }
  3147. mc_uc_buf = dp_tx_me_alloc_buf(pdev);
  3148. if (mc_uc_buf == NULL)
  3149. goto fail_buf_alloc;
  3150. /*
  3151. * TODO: Check if we need to clone the nbuf
  3152. * Or can we just use the reference for all cases
  3153. */
  3154. if (new_mac_idx < (new_mac_cnt - 1)) {
  3155. nbuf_clone = qdf_nbuf_clone((qdf_nbuf_t)nbuf);
  3156. if (nbuf_clone == NULL) {
  3157. DP_STATS_INC(vdev, tx_i.mcast_en.clone_fail, 1);
  3158. goto fail_clone;
  3159. }
  3160. } else {
  3161. /*
  3162. * Update the ref
  3163. * to account for frame sent without cloning
  3164. */
  3165. qdf_nbuf_ref(nbuf);
  3166. nbuf_clone = nbuf;
  3167. }
  3168. qdf_mem_copy(mc_uc_buf->data, dstmac, DP_MAC_ADDR_LEN);
  3169. status = qdf_mem_map_nbytes_single(vdev->osdev, mc_uc_buf->data,
  3170. QDF_DMA_TO_DEVICE, DP_MAC_ADDR_LEN,
  3171. &paddr_mcbuf);
  3172. if (status) {
  3173. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3174. "Mapping failure Error:%d", status);
  3175. DP_STATS_INC(vdev, tx_i.mcast_en.dropped_map_error, 1);
  3176. goto fail_map;
  3177. }
  3178. seg_info_new->frags[0].vaddr = (uint8_t *)mc_uc_buf;
  3179. seg_info_new->frags[0].paddr_lo = (uint32_t) paddr_mcbuf;
  3180. seg_info_new->frags[0].paddr_hi =
  3181. ((uint64_t) paddr_mcbuf >> 32);
  3182. seg_info_new->frags[0].len = DP_MAC_ADDR_LEN;
  3183. seg_info_new->frags[1] = data_frag;
  3184. seg_info_new->nbuf = nbuf_clone;
  3185. seg_info_new->frag_cnt = 2;
  3186. seg_info_new->total_len = len;
  3187. seg_info_new->next = NULL;
  3188. if (seg_info_head == NULL)
  3189. seg_info_head = seg_info_new;
  3190. else
  3191. seg_info_tail->next = seg_info_new;
  3192. seg_info_tail = seg_info_new;
  3193. }
  3194. if (!seg_info_head) {
  3195. goto free_return;
  3196. }
  3197. msdu_info.u.sg_info.curr_seg = seg_info_head;
  3198. msdu_info.num_seg = new_mac_cnt;
  3199. msdu_info.frm_type = dp_tx_frm_me;
  3200. DP_STATS_INC(vdev, tx_i.mcast_en.ucast, new_mac_cnt);
  3201. dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3202. while (seg_info_head->next) {
  3203. seg_info_new = seg_info_head;
  3204. seg_info_head = seg_info_head->next;
  3205. qdf_mem_free(seg_info_new);
  3206. }
  3207. qdf_mem_free(seg_info_head);
  3208. qdf_nbuf_unmap(pdev->soc->osdev, nbuf, QDF_DMA_TO_DEVICE);
  3209. qdf_nbuf_free(nbuf);
  3210. return new_mac_cnt;
  3211. fail_map:
  3212. qdf_nbuf_free(nbuf_clone);
  3213. fail_clone:
  3214. dp_tx_me_free_buf(pdev, mc_uc_buf);
  3215. fail_buf_alloc:
  3216. qdf_mem_free(seg_info_new);
  3217. fail_seg_alloc:
  3218. dp_tx_me_mem_free(pdev, seg_info_head);
  3219. free_return:
  3220. qdf_nbuf_unmap(pdev->soc->osdev, nbuf, QDF_DMA_TO_DEVICE);
  3221. qdf_nbuf_free(nbuf);
  3222. return 1;
  3223. }