dp_be_rx.c 62 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_be_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_be_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_be_api.h"
  30. #include "qdf_nbuf.h"
  31. #ifdef MESH_MODE_SUPPORT
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "dp_internal.h"
  35. #include "dp_ipa.h"
  36. #ifdef FEATURE_WDS
  37. #include "dp_txrx_wds.h"
  38. #endif
  39. #include "dp_hist.h"
  40. #include "dp_rx_buffer_pool.h"
  41. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  42. static inline void
  43. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  44. {
  45. /* Set the flow idx valid flag only when there is no timeout */
  46. if (hal_rx_msdu_flow_idx_timeout_be(rx_tlv_hdr))
  47. return;
  48. qdf_nbuf_set_rx_flow_idx_valid(nbuf,
  49. !hal_rx_msdu_flow_idx_invalid_be(rx_tlv_hdr));
  50. }
  51. #else
  52. static inline void
  53. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  54. {
  55. }
  56. #endif
  57. #ifndef AST_OFFLOAD_ENABLE
  58. static void
  59. dp_rx_wds_learn(struct dp_soc *soc,
  60. struct dp_vdev *vdev,
  61. uint8_t *rx_tlv_hdr,
  62. struct dp_txrx_peer *txrx_peer,
  63. qdf_nbuf_t nbuf)
  64. {
  65. struct hal_rx_msdu_metadata msdu_metadata;
  66. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  67. /* WDS Source Port Learning */
  68. if (qdf_likely(vdev->wds_enabled))
  69. dp_rx_wds_srcport_learn(soc,
  70. rx_tlv_hdr,
  71. txrx_peer,
  72. nbuf,
  73. msdu_metadata);
  74. }
  75. #else
  76. #ifdef QCA_SUPPORT_WDS_EXTENDED
  77. /**
  78. * dp_wds_ext_peer_learn_be() - function to send event to control
  79. * path on receiving 1st 4-address frame from backhaul.
  80. * @soc: DP soc
  81. * @ta_txrx_peer: WDS repeater txrx peer
  82. * @rx_tlv_hdr: start address of rx tlvs
  83. * @nbuf: RX packet buffer
  84. *
  85. * Return: void
  86. */
  87. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  88. struct dp_txrx_peer *ta_txrx_peer,
  89. uint8_t *rx_tlv_hdr,
  90. qdf_nbuf_t nbuf)
  91. {
  92. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  93. struct dp_peer *ta_base_peer;
  94. /* instead of checking addr4 is valid or not in per packet path
  95. * check for init bit, which will be set on reception of
  96. * first addr4 valid packet.
  97. */
  98. if (!ta_txrx_peer->vdev->wds_ext_enabled ||
  99. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT,
  100. &ta_txrx_peer->wds_ext.init))
  101. return;
  102. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  103. (qdf_nbuf_is_fr_ds_set(nbuf) && qdf_nbuf_is_to_ds_set(nbuf))) {
  104. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  105. &ta_txrx_peer->wds_ext.init);
  106. if (qdf_unlikely(ta_txrx_peer->nawds_enabled &&
  107. ta_txrx_peer->is_mld_peer)) {
  108. ta_base_peer = dp_get_primary_link_peer_by_id(
  109. soc,
  110. ta_txrx_peer->peer_id,
  111. DP_MOD_ID_RX);
  112. } else {
  113. ta_base_peer = dp_peer_get_ref_by_id(
  114. soc,
  115. ta_txrx_peer->peer_id,
  116. DP_MOD_ID_RX);
  117. }
  118. if (!ta_base_peer)
  119. return;
  120. qdf_mem_copy(wds_ext_src_mac, &ta_base_peer->mac_addr.raw[0],
  121. QDF_MAC_ADDR_SIZE);
  122. dp_peer_unref_delete(ta_base_peer, DP_MOD_ID_RX);
  123. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  124. soc->ctrl_psoc,
  125. ta_txrx_peer->peer_id,
  126. ta_txrx_peer->vdev->vdev_id,
  127. wds_ext_src_mac);
  128. }
  129. }
  130. #else
  131. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  132. struct dp_txrx_peer *ta_txrx_peer,
  133. uint8_t *rx_tlv_hdr,
  134. qdf_nbuf_t nbuf)
  135. {
  136. }
  137. #endif
  138. static void
  139. dp_rx_wds_learn(struct dp_soc *soc,
  140. struct dp_vdev *vdev,
  141. uint8_t *rx_tlv_hdr,
  142. struct dp_txrx_peer *ta_txrx_peer,
  143. qdf_nbuf_t nbuf)
  144. {
  145. dp_wds_ext_peer_learn_be(soc, ta_txrx_peer, rx_tlv_hdr, nbuf);
  146. }
  147. #endif
  148. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  149. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  150. uint32_t quota)
  151. {
  152. hal_ring_desc_t ring_desc;
  153. hal_ring_desc_t last_prefetched_hw_desc;
  154. hal_soc_handle_t hal_soc;
  155. struct dp_rx_desc *rx_desc = NULL;
  156. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  157. qdf_nbuf_t nbuf, next;
  158. bool near_full;
  159. union dp_rx_desc_list_elem_t *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  160. union dp_rx_desc_list_elem_t *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  161. uint32_t num_pending = 0;
  162. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  163. uint16_t msdu_len = 0;
  164. uint16_t peer_id;
  165. uint8_t vdev_id;
  166. struct dp_txrx_peer *txrx_peer;
  167. dp_txrx_ref_handle txrx_ref_handle = NULL;
  168. struct dp_vdev *vdev;
  169. uint32_t pkt_len = 0;
  170. enum hal_reo_error_status error;
  171. uint8_t *rx_tlv_hdr;
  172. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  173. uint8_t mac_id = 0;
  174. struct dp_pdev *rx_pdev;
  175. uint8_t enh_flag;
  176. struct dp_srng *dp_rxdma_srng;
  177. struct rx_desc_pool *rx_desc_pool;
  178. struct dp_soc *soc = int_ctx->soc;
  179. struct cdp_tid_rx_stats *tid_stats;
  180. qdf_nbuf_t nbuf_head;
  181. qdf_nbuf_t nbuf_tail;
  182. qdf_nbuf_t deliver_list_head;
  183. qdf_nbuf_t deliver_list_tail;
  184. uint32_t num_rx_bufs_reaped = 0;
  185. uint32_t intr_id;
  186. struct hif_opaque_softc *scn;
  187. int32_t tid = 0;
  188. bool is_prev_msdu_last = true;
  189. uint32_t num_entries_avail = 0;
  190. uint32_t rx_ol_pkt_cnt = 0;
  191. uint32_t num_entries = 0;
  192. QDF_STATUS status;
  193. qdf_nbuf_t ebuf_head;
  194. qdf_nbuf_t ebuf_tail;
  195. uint8_t pkt_capture_offload = 0;
  196. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  197. int max_reap_limit, ring_near_full;
  198. struct dp_soc *replenish_soc;
  199. uint8_t chip_id;
  200. uint64_t current_time = 0;
  201. uint32_t old_tid;
  202. uint32_t peer_ext_stats;
  203. uint32_t dsf;
  204. uint32_t l3_pad;
  205. uint8_t link_id = 0;
  206. DP_HIST_INIT();
  207. qdf_assert_always(soc && hal_ring_hdl);
  208. hal_soc = soc->hal_soc;
  209. qdf_assert_always(hal_soc);
  210. scn = soc->hif_handle;
  211. intr_id = int_ctx->dp_intr_id;
  212. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  213. dp_runtime_pm_mark_last_busy(soc);
  214. more_data:
  215. /* reset local variables here to be re-used in the function */
  216. nbuf_head = NULL;
  217. nbuf_tail = NULL;
  218. deliver_list_head = NULL;
  219. deliver_list_tail = NULL;
  220. txrx_peer = NULL;
  221. vdev = NULL;
  222. num_rx_bufs_reaped = 0;
  223. ebuf_head = NULL;
  224. ebuf_tail = NULL;
  225. ring_near_full = 0;
  226. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  227. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  228. qdf_mem_zero(head, sizeof(head));
  229. qdf_mem_zero(tail, sizeof(tail));
  230. old_tid = 0xff;
  231. dsf = 0;
  232. peer_ext_stats = 0;
  233. rx_pdev = NULL;
  234. tid_stats = NULL;
  235. dp_pkt_get_timestamp(&current_time);
  236. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  237. &max_reap_limit);
  238. peer_ext_stats = wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx);
  239. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  240. /*
  241. * Need API to convert from hal_ring pointer to
  242. * Ring Type / Ring Id combo
  243. */
  244. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  245. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  246. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  247. goto done;
  248. }
  249. hal_srng_update_ring_usage_wm_no_lock(soc->hal_soc, hal_ring_hdl);
  250. if (!num_pending)
  251. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  252. if (num_pending > quota)
  253. num_pending = quota;
  254. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  255. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  256. hal_ring_hdl,
  257. num_pending);
  258. /*
  259. * start reaping the buffers from reo ring and queue
  260. * them in per vdev queue.
  261. * Process the received pkts in a different per vdev loop.
  262. */
  263. while (qdf_likely(num_pending)) {
  264. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  265. if (qdf_unlikely(!ring_desc))
  266. break;
  267. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  268. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  269. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  270. soc, hal_ring_hdl, error);
  271. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  272. 1);
  273. /* Don't know how to deal with this -- assert */
  274. qdf_assert(0);
  275. }
  276. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  277. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  278. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  279. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  280. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  281. break;
  282. }
  283. rx_desc = (struct dp_rx_desc *)
  284. hal_rx_get_reo_desc_va(ring_desc);
  285. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  286. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  287. ring_desc, rx_desc);
  288. if (QDF_IS_STATUS_ERROR(status)) {
  289. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  290. qdf_assert_always(!rx_desc->unmapped);
  291. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  292. rx_desc->unmapped = 1;
  293. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  294. rx_desc->pool_id);
  295. dp_rx_add_to_free_desc_list(
  296. &head[rx_desc->chip_id][rx_desc->pool_id],
  297. &tail[rx_desc->chip_id][rx_desc->pool_id],
  298. rx_desc);
  299. }
  300. continue;
  301. }
  302. /*
  303. * this is a unlikely scenario where the host is reaping
  304. * a descriptor which it already reaped just a while ago
  305. * but is yet to replenish it back to HW.
  306. * In this case host will dump the last 128 descriptors
  307. * including the software descriptor rx_desc and assert.
  308. */
  309. if (qdf_unlikely(!rx_desc->in_use)) {
  310. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  311. dp_info_rl("Reaping rx_desc not in use!");
  312. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  313. ring_desc, rx_desc);
  314. continue;
  315. }
  316. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  317. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  318. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  319. dp_info_rl("Nbuf sanity check failure!");
  320. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  321. ring_desc, rx_desc);
  322. rx_desc->in_err_state = 1;
  323. continue;
  324. }
  325. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  326. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  327. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  328. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  329. ring_desc, rx_desc);
  330. }
  331. pkt_capture_offload =
  332. dp_rx_copy_desc_info_in_nbuf_cb(soc, ring_desc,
  333. rx_desc->nbuf,
  334. reo_ring_num);
  335. if (qdf_unlikely(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf))) {
  336. /* In dp_rx_sg_create() until the last buffer,
  337. * end bit should not be set. As continuation bit set,
  338. * this is not a last buffer.
  339. */
  340. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 0);
  341. /* previous msdu has end bit set, so current one is
  342. * the new MPDU
  343. */
  344. if (is_prev_msdu_last) {
  345. /* Get number of entries available in HW ring */
  346. num_entries_avail =
  347. hal_srng_dst_num_valid(hal_soc,
  348. hal_ring_hdl, 1);
  349. /* For new MPDU check if we can read complete
  350. * MPDU by comparing the number of buffers
  351. * available and number of buffers needed to
  352. * reap this MPDU
  353. */
  354. if ((QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) /
  355. (RX_DATA_BUFFER_SIZE -
  356. soc->rx_pkt_tlv_size) + 1) >
  357. num_pending) {
  358. DP_STATS_INC(soc,
  359. rx.msdu_scatter_wait_break,
  360. 1);
  361. dp_rx_cookie_reset_invalid_bit(
  362. ring_desc);
  363. /* As we are going to break out of the
  364. * loop because of unavailability of
  365. * descs to form complete SG, we need to
  366. * reset the TP in the REO destination
  367. * ring.
  368. */
  369. hal_srng_dst_dec_tp(hal_soc,
  370. hal_ring_hdl);
  371. break;
  372. }
  373. is_prev_msdu_last = false;
  374. }
  375. }
  376. if (!is_prev_msdu_last &&
  377. !(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  378. is_prev_msdu_last = true;
  379. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  380. /*
  381. * move unmap after scattered msdu waiting break logic
  382. * in case double skb unmap happened.
  383. */
  384. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  385. rx_desc->unmapped = 1;
  386. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  387. ebuf_tail, rx_desc);
  388. quota -= 1;
  389. num_pending -= 1;
  390. dp_rx_add_to_free_desc_list
  391. (&head[rx_desc->chip_id][rx_desc->pool_id],
  392. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  393. num_rx_bufs_reaped++;
  394. dp_rx_prefetch_hw_sw_nbuf_32_byte_desc(soc, hal_soc,
  395. num_pending,
  396. hal_ring_hdl,
  397. &last_prefetched_hw_desc,
  398. &last_prefetched_sw_desc);
  399. /*
  400. * only if complete msdu is received for scatter case,
  401. * then allow break.
  402. */
  403. if (is_prev_msdu_last &&
  404. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  405. max_reap_limit))
  406. break;
  407. }
  408. done:
  409. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  410. qdf_dsb();
  411. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  412. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  413. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  414. /*
  415. * continue with next mac_id if no pkts were reaped
  416. * from that pool
  417. */
  418. if (!rx_bufs_reaped[chip_id][mac_id])
  419. continue;
  420. replenish_soc = dp_rx_replensih_soc_get(soc, chip_id);
  421. dp_rxdma_srng =
  422. &replenish_soc->rx_refill_buf_ring[mac_id];
  423. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  424. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  425. dp_rxdma_srng,
  426. rx_desc_pool,
  427. rx_bufs_reaped[chip_id][mac_id],
  428. &head[chip_id][mac_id],
  429. &tail[chip_id][mac_id]);
  430. }
  431. }
  432. /* Peer can be NULL is case of LFR */
  433. if (qdf_likely(txrx_peer))
  434. vdev = NULL;
  435. /*
  436. * BIG loop where each nbuf is dequeued from global queue,
  437. * processed and queued back on a per vdev basis. These nbufs
  438. * are sent to stack as and when we run out of nbufs
  439. * or a new nbuf dequeued from global queue has a different
  440. * vdev when compared to previous nbuf.
  441. */
  442. nbuf = nbuf_head;
  443. while (nbuf) {
  444. next = nbuf->next;
  445. dp_rx_prefetch_nbuf_data_be(nbuf, next);
  446. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  447. nbuf = next;
  448. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  449. continue;
  450. }
  451. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  452. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  453. peer_id = dp_rx_get_peer_id_be(nbuf);
  454. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  455. peer_id, vdev_id)) {
  456. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  457. deliver_list_head,
  458. deliver_list_tail);
  459. deliver_list_head = NULL;
  460. deliver_list_tail = NULL;
  461. }
  462. /* Get TID from struct cb->tid_val, save to tid */
  463. tid = qdf_nbuf_get_tid_val(nbuf);
  464. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS)) {
  465. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  466. dp_rx_nbuf_free(nbuf);
  467. nbuf = next;
  468. continue;
  469. }
  470. if (qdf_unlikely(!txrx_peer)) {
  471. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  472. peer_id,
  473. &txrx_ref_handle,
  474. pkt_capture_offload,
  475. &vdev,
  476. &rx_pdev, &dsf,
  477. &old_tid);
  478. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  479. nbuf = next;
  480. continue;
  481. }
  482. enh_flag = rx_pdev->enhanced_stats_en;
  483. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  484. dp_txrx_peer_unref_delete(txrx_ref_handle,
  485. DP_MOD_ID_RX);
  486. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  487. peer_id,
  488. &txrx_ref_handle,
  489. pkt_capture_offload,
  490. &vdev,
  491. &rx_pdev, &dsf,
  492. &old_tid);
  493. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  494. nbuf = next;
  495. continue;
  496. }
  497. enh_flag = rx_pdev->enhanced_stats_en;
  498. }
  499. if (txrx_peer) {
  500. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  501. qdf_dp_trace_set_track(nbuf, QDF_RX);
  502. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  503. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  504. QDF_NBUF_RX_PKT_DATA_TRACK;
  505. }
  506. rx_bufs_used++;
  507. /* MLD Link Peer Statistics support */
  508. if (txrx_peer->is_mld_peer && rx_pdev->link_peer_stats) {
  509. link_id = dp_rx_get_stats_arr_idx_from_link_id(
  510. nbuf,
  511. txrx_peer);
  512. } else {
  513. link_id = 0;
  514. }
  515. /* when hlos tid override is enabled, save tid in
  516. * skb->priority
  517. */
  518. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  519. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  520. qdf_nbuf_set_priority(nbuf, tid);
  521. DP_RX_TID_SAVE(nbuf, tid);
  522. if (qdf_unlikely(dsf) || qdf_unlikely(peer_ext_stats) ||
  523. dp_rx_pkt_tracepoints_enabled())
  524. qdf_nbuf_set_timestamp(nbuf);
  525. if (qdf_likely(old_tid != tid)) {
  526. tid_stats =
  527. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  528. old_tid = tid;
  529. }
  530. /*
  531. * Check if DMA completed -- msdu_done is the last bit
  532. * to be written
  533. */
  534. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  535. !hal_rx_tlv_msdu_done_get_be(rx_tlv_hdr))) {
  536. dp_err("MSDU DONE failure");
  537. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  538. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  539. QDF_TRACE_LEVEL_INFO);
  540. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  541. dp_rx_nbuf_free(nbuf);
  542. qdf_assert(0);
  543. nbuf = next;
  544. continue;
  545. }
  546. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  547. /*
  548. * First IF condition:
  549. * 802.11 Fragmented pkts are reinjected to REO
  550. * HW block as SG pkts and for these pkts we only
  551. * need to pull the RX TLVS header length.
  552. * Second IF condition:
  553. * The below condition happens when an MSDU is spread
  554. * across multiple buffers. This can happen in two cases
  555. * 1. The nbuf size is smaller then the received msdu.
  556. * ex: we have set the nbuf size to 2048 during
  557. * nbuf_alloc. but we received an msdu which is
  558. * 2304 bytes in size then this msdu is spread
  559. * across 2 nbufs.
  560. *
  561. * 2. AMSDUs when RAW mode is enabled.
  562. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  563. * across 1st nbuf and 2nd nbuf and last MSDU is
  564. * spread across 2nd nbuf and 3rd nbuf.
  565. *
  566. * for these scenarios let us create a skb frag_list and
  567. * append these buffers till the last MSDU of the AMSDU
  568. * Third condition:
  569. * This is the most likely case, we receive 802.3 pkts
  570. * decapsulated by HW, here we need to set the pkt length.
  571. */
  572. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  573. bool is_mcbc, is_sa_vld, is_da_vld;
  574. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  575. rx_tlv_hdr);
  576. is_sa_vld =
  577. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  578. rx_tlv_hdr);
  579. is_da_vld =
  580. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  581. rx_tlv_hdr);
  582. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  583. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  584. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  585. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  586. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  587. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  588. nbuf = dp_rx_sg_create(soc, nbuf);
  589. next = nbuf->next;
  590. if (qdf_nbuf_is_raw_frame(nbuf)) {
  591. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  592. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  593. rx.raw, 1,
  594. msdu_len,
  595. link_id);
  596. } else {
  597. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  598. if (!dp_rx_is_sg_supported()) {
  599. dp_rx_nbuf_free(nbuf);
  600. dp_info_rl("sg msdu len %d, dropped",
  601. msdu_len);
  602. nbuf = next;
  603. continue;
  604. }
  605. }
  606. } else {
  607. l3_pad = hal_rx_get_l3_pad_bytes_be(nbuf, rx_tlv_hdr);
  608. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  609. pkt_len = msdu_len + l3_pad + soc->rx_pkt_tlv_size;
  610. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  611. dp_rx_skip_tlvs(soc, nbuf, l3_pad);
  612. }
  613. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  614. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  615. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  616. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  617. rx.policy_check_drop,
  618. 1, link_id);
  619. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  620. /* Drop & free packet */
  621. dp_rx_nbuf_free(nbuf);
  622. /* Statistics */
  623. nbuf = next;
  624. continue;
  625. }
  626. /*
  627. * Drop non-EAPOL frames from unauthorized peer.
  628. */
  629. if (qdf_likely(txrx_peer) &&
  630. qdf_unlikely(!txrx_peer->authorize) &&
  631. !qdf_nbuf_is_raw_frame(nbuf)) {
  632. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  633. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  634. if (!is_eapol) {
  635. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  636. rx.peer_unauth_rx_pkt_drop,
  637. 1, link_id);
  638. dp_rx_nbuf_free(nbuf);
  639. nbuf = next;
  640. continue;
  641. }
  642. }
  643. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  644. dp_rx_update_flow_info(nbuf, rx_tlv_hdr);
  645. if (qdf_unlikely(!rx_pdev->rx_fast_flag)) {
  646. /*
  647. * process frame for mulitpass phrase processing
  648. */
  649. if (qdf_unlikely(vdev->multipass_en)) {
  650. if (dp_rx_multipass_process(txrx_peer, nbuf,
  651. tid) == false) {
  652. DP_PEER_PER_PKT_STATS_INC
  653. (txrx_peer,
  654. rx.multipass_rx_pkt_drop,
  655. 1, link_id);
  656. dp_rx_nbuf_free(nbuf);
  657. nbuf = next;
  658. continue;
  659. }
  660. }
  661. if (qdf_unlikely(txrx_peer &&
  662. (txrx_peer->nawds_enabled) &&
  663. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  664. (hal_rx_get_mpdu_mac_ad4_valid_be
  665. (rx_tlv_hdr) == false))) {
  666. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  667. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  668. rx.nawds_mcast_drop,
  669. 1, link_id);
  670. dp_rx_nbuf_free(nbuf);
  671. nbuf = next;
  672. continue;
  673. }
  674. /* Update the protocol tag in SKB based on CCE metadata
  675. */
  676. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  677. reo_ring_num, false, true);
  678. /* Update the flow tag in SKB based on FSE metadata */
  679. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  680. true);
  681. if (qdf_unlikely(vdev->mesh_vdev)) {
  682. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  683. rx_tlv_hdr)
  684. == QDF_STATUS_SUCCESS) {
  685. dp_rx_info("%pK: mesh pkt filtered",
  686. soc);
  687. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  688. DP_STATS_INC(vdev->pdev,
  689. dropped.mesh_filter, 1);
  690. dp_rx_nbuf_free(nbuf);
  691. nbuf = next;
  692. continue;
  693. }
  694. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  695. txrx_peer);
  696. }
  697. }
  698. if (qdf_likely(vdev->rx_decap_type ==
  699. htt_cmn_pkt_type_ethernet) &&
  700. qdf_likely(!vdev->mesh_vdev)) {
  701. dp_rx_wds_learn(soc, vdev,
  702. rx_tlv_hdr,
  703. txrx_peer,
  704. nbuf);
  705. }
  706. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  707. reo_ring_num, tid_stats, link_id);
  708. if (qdf_likely(vdev->rx_decap_type ==
  709. htt_cmn_pkt_type_ethernet) &&
  710. qdf_likely(!vdev->mesh_vdev)) {
  711. /* Intrabss-fwd */
  712. if (dp_rx_check_ap_bridge(vdev))
  713. if (dp_rx_intrabss_fwd_be(soc, txrx_peer,
  714. rx_tlv_hdr,
  715. nbuf,
  716. link_id)) {
  717. nbuf = next;
  718. tid_stats->intrabss_cnt++;
  719. continue; /* Get next desc */
  720. }
  721. }
  722. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  723. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  724. nbuf);
  725. dp_rx_update_stats(soc, nbuf);
  726. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  727. current_time, nbuf);
  728. DP_RX_LIST_APPEND(deliver_list_head,
  729. deliver_list_tail,
  730. nbuf);
  731. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  732. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  733. enh_flag);
  734. if (qdf_unlikely(txrx_peer->in_twt))
  735. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  736. rx.to_stack_twt, 1,
  737. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  738. link_id);
  739. tid_stats->delivered_to_stack++;
  740. nbuf = next;
  741. }
  742. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  743. pkt_capture_offload,
  744. deliver_list_head,
  745. deliver_list_tail);
  746. if (qdf_likely(txrx_peer))
  747. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  748. /*
  749. * If we are processing in near-full condition, there are 3 scenario
  750. * 1) Ring entries has reached critical state
  751. * 2) Ring entries are still near high threshold
  752. * 3) Ring entries are below the safe level
  753. *
  754. * One more loop will move the state to normal processing and yield
  755. */
  756. if (ring_near_full && quota)
  757. goto more_data;
  758. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  759. if (quota) {
  760. num_pending =
  761. dp_rx_srng_get_num_pending(hal_soc,
  762. hal_ring_hdl,
  763. num_entries,
  764. &near_full);
  765. if (num_pending) {
  766. DP_STATS_INC(soc, rx.hp_oos2, 1);
  767. if (!hif_exec_should_yield(scn, intr_id))
  768. goto more_data;
  769. if (qdf_unlikely(near_full)) {
  770. DP_STATS_INC(soc, rx.near_full, 1);
  771. goto more_data;
  772. }
  773. }
  774. }
  775. if (vdev && vdev->osif_fisa_flush)
  776. vdev->osif_fisa_flush(soc, reo_ring_num);
  777. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  778. vdev->osif_gro_flush(vdev->osif_vdev,
  779. reo_ring_num);
  780. }
  781. }
  782. /* Update histogram statistics by looping through pdev's */
  783. DP_RX_HIST_STATS_PER_PDEV();
  784. return rx_bufs_used; /* Assume no scale factor for now */
  785. }
  786. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  787. /**
  788. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  789. * @soc: Handle to DP Soc structure
  790. * @rx_desc_pool: Rx descriptor pool handler
  791. * @pool_id: Rx descriptor pool ID
  792. *
  793. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  794. */
  795. static QDF_STATUS
  796. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  797. struct rx_desc_pool *rx_desc_pool,
  798. uint32_t pool_id)
  799. {
  800. struct dp_hw_cookie_conversion_t *cc_ctx;
  801. struct dp_soc_be *be_soc;
  802. union dp_rx_desc_list_elem_t *rx_desc_elem;
  803. struct dp_spt_page_desc *page_desc;
  804. uint32_t ppt_idx = 0;
  805. uint32_t avail_entry_index = 0;
  806. if (!rx_desc_pool->pool_size) {
  807. dp_err("desc_num 0 !!");
  808. return QDF_STATUS_E_FAILURE;
  809. }
  810. be_soc = dp_get_be_soc_from_dp_soc(soc);
  811. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  812. page_desc = &cc_ctx->page_desc_base[0];
  813. rx_desc_elem = rx_desc_pool->freelist;
  814. while (rx_desc_elem) {
  815. if (avail_entry_index == 0) {
  816. if (ppt_idx >= cc_ctx->total_page_num) {
  817. dp_alert("insufficient secondary page tables");
  818. qdf_assert_always(0);
  819. }
  820. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  821. }
  822. /* put each RX Desc VA to SPT pages and
  823. * get corresponding ID
  824. */
  825. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  826. avail_entry_index,
  827. &rx_desc_elem->rx_desc);
  828. rx_desc_elem->rx_desc.cookie =
  829. dp_cc_desc_id_generate(page_desc->ppt_index,
  830. avail_entry_index);
  831. rx_desc_elem->rx_desc.chip_id = dp_mlo_get_chip_id(soc);
  832. rx_desc_elem->rx_desc.pool_id = pool_id;
  833. rx_desc_elem->rx_desc.in_use = 0;
  834. rx_desc_elem = rx_desc_elem->next;
  835. avail_entry_index = (avail_entry_index + 1) &
  836. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  837. }
  838. return QDF_STATUS_SUCCESS;
  839. }
  840. #else
  841. static QDF_STATUS
  842. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  843. struct rx_desc_pool *rx_desc_pool,
  844. uint32_t pool_id)
  845. {
  846. struct dp_hw_cookie_conversion_t *cc_ctx;
  847. struct dp_soc_be *be_soc;
  848. struct dp_spt_page_desc *page_desc;
  849. uint32_t ppt_idx = 0;
  850. uint32_t avail_entry_index = 0;
  851. int i = 0;
  852. if (!rx_desc_pool->pool_size) {
  853. dp_err("desc_num 0 !!");
  854. return QDF_STATUS_E_FAILURE;
  855. }
  856. be_soc = dp_get_be_soc_from_dp_soc(soc);
  857. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  858. page_desc = &cc_ctx->page_desc_base[0];
  859. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  860. if (i == rx_desc_pool->pool_size - 1)
  861. rx_desc_pool->array[i].next = NULL;
  862. else
  863. rx_desc_pool->array[i].next =
  864. &rx_desc_pool->array[i + 1];
  865. if (avail_entry_index == 0) {
  866. if (ppt_idx >= cc_ctx->total_page_num) {
  867. dp_alert("insufficient secondary page tables");
  868. qdf_assert_always(0);
  869. }
  870. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  871. }
  872. /* put each RX Desc VA to SPT pages and
  873. * get corresponding ID
  874. */
  875. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  876. avail_entry_index,
  877. &rx_desc_pool->array[i].rx_desc);
  878. rx_desc_pool->array[i].rx_desc.cookie =
  879. dp_cc_desc_id_generate(page_desc->ppt_index,
  880. avail_entry_index);
  881. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  882. rx_desc_pool->array[i].rx_desc.in_use = 0;
  883. rx_desc_pool->array[i].rx_desc.chip_id =
  884. dp_mlo_get_chip_id(soc);
  885. avail_entry_index = (avail_entry_index + 1) &
  886. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  887. }
  888. return QDF_STATUS_SUCCESS;
  889. }
  890. #endif
  891. static void
  892. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  893. struct rx_desc_pool *rx_desc_pool,
  894. uint32_t pool_id)
  895. {
  896. struct dp_spt_page_desc *page_desc;
  897. struct dp_soc_be *be_soc;
  898. int i = 0;
  899. struct dp_hw_cookie_conversion_t *cc_ctx;
  900. be_soc = dp_get_be_soc_from_dp_soc(soc);
  901. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  902. for (i = 0; i < cc_ctx->total_page_num; i++) {
  903. page_desc = &cc_ctx->page_desc_base[i];
  904. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  905. }
  906. }
  907. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  908. struct rx_desc_pool *rx_desc_pool,
  909. uint32_t pool_id)
  910. {
  911. QDF_STATUS status = QDF_STATUS_SUCCESS;
  912. /* Only regular RX buffer desc pool use HW cookie conversion */
  913. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  914. dp_info("rx_desc_buf pool init");
  915. status = dp_rx_desc_pool_init_be_cc(soc,
  916. rx_desc_pool,
  917. pool_id);
  918. } else {
  919. dp_info("non_rx_desc_buf_pool init");
  920. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  921. pool_id);
  922. }
  923. return status;
  924. }
  925. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  926. struct rx_desc_pool *rx_desc_pool,
  927. uint32_t pool_id)
  928. {
  929. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  930. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  931. }
  932. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  933. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  934. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  935. void *ring_desc,
  936. struct dp_rx_desc **r_rx_desc)
  937. {
  938. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  939. /* HW cookie conversion done */
  940. *r_rx_desc = (struct dp_rx_desc *)
  941. hal_rx_wbm_get_desc_va(ring_desc);
  942. } else {
  943. /* SW do cookie conversion */
  944. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  945. *r_rx_desc = (struct dp_rx_desc *)
  946. dp_cc_desc_find(soc, cookie);
  947. }
  948. return QDF_STATUS_SUCCESS;
  949. }
  950. #else
  951. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  952. void *ring_desc,
  953. struct dp_rx_desc **r_rx_desc)
  954. {
  955. *r_rx_desc = (struct dp_rx_desc *)
  956. hal_rx_wbm_get_desc_va(ring_desc);
  957. return QDF_STATUS_SUCCESS;
  958. }
  959. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  960. #else
  961. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  962. void *ring_desc,
  963. struct dp_rx_desc **r_rx_desc)
  964. {
  965. /* SW do cookie conversion */
  966. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  967. *r_rx_desc = (struct dp_rx_desc *)
  968. dp_cc_desc_find(soc, cookie);
  969. return QDF_STATUS_SUCCESS;
  970. }
  971. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  972. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  973. uint32_t cookie)
  974. {
  975. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  976. }
  977. #if defined(WLAN_FEATURE_11BE_MLO)
  978. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  979. #define DP_RANDOM_MAC_ID_BIT_MASK 0xC0
  980. #define DP_RANDOM_MAC_OFFSET 1
  981. #define DP_MAC_LOCAL_ADMBIT_MASK 0x2
  982. #define DP_MAC_LOCAL_ADMBIT_OFFSET 0
  983. static inline void dp_rx_dummy_src_mac(struct dp_vdev *vdev,
  984. qdf_nbuf_t nbuf)
  985. {
  986. qdf_ether_header_t *eh =
  987. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  988. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] =
  989. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] |
  990. DP_MAC_LOCAL_ADMBIT_MASK;
  991. }
  992. #ifdef QCA_SUPPORT_WDS_EXTENDED
  993. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  994. {
  995. return qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &peer->wds_ext.init);
  996. }
  997. #else
  998. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  999. {
  1000. return false;
  1001. }
  1002. #endif
  1003. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1004. struct dp_vdev *vdev,
  1005. struct dp_txrx_peer *peer,
  1006. qdf_nbuf_t nbuf,
  1007. uint8_t link_id)
  1008. {
  1009. struct dp_vdev *mcast_primary_vdev = NULL;
  1010. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1011. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1012. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1013. struct cdp_tid_rx_stats *tid_stats = &peer->vdev->pdev->stats.
  1014. tid_stats.tid_rx_wbm_stats[0][tid];
  1015. if (!(qdf_nbuf_is_ipv4_igmp_pkt(nbuf) ||
  1016. qdf_nbuf_is_ipv6_igmp_pkt(nbuf)))
  1017. return false;
  1018. if (qdf_unlikely(vdev->multipass_en)) {
  1019. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  1020. DP_PEER_PER_PKT_STATS_INC(peer,
  1021. rx.multipass_rx_pkt_drop,
  1022. 1, link_id);
  1023. return false;
  1024. }
  1025. }
  1026. if (!peer->bss_peer) {
  1027. if (dp_rx_intrabss_mcbc_fwd(soc, peer, NULL, nbuf,
  1028. tid_stats, link_id))
  1029. dp_rx_err("forwarding failed");
  1030. }
  1031. /*
  1032. * In the case of ME6, Backhaul WDS, NAWDS
  1033. * send the igmp pkt on the same link where it received,
  1034. * as these features will use peer based tcl metadata
  1035. */
  1036. qdf_nbuf_set_next(nbuf, NULL);
  1037. if (vdev->mcast_enhancement_en || be_vdev->mcast_primary ||
  1038. peer->nawds_enabled)
  1039. goto send_pkt;
  1040. if (qdf_unlikely(dp_rx_mlo_igmp_wds_ext_handler(peer)))
  1041. goto send_pkt;
  1042. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc, be_vdev,
  1043. DP_MOD_ID_RX);
  1044. if (!mcast_primary_vdev) {
  1045. dp_rx_debug("Non mlo vdev");
  1046. goto send_pkt;
  1047. }
  1048. if (qdf_unlikely(vdev->wrap_vdev)) {
  1049. /* In the case of qwrap repeater send the original
  1050. * packet on the interface where it received,
  1051. * packet with dummy src on the mcast primary interface.
  1052. */
  1053. qdf_nbuf_t nbuf_copy;
  1054. nbuf_copy = qdf_nbuf_copy(nbuf);
  1055. if (qdf_likely(nbuf_copy))
  1056. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf_copy,
  1057. NULL);
  1058. }
  1059. dp_rx_dummy_src_mac(vdev, nbuf);
  1060. dp_rx_deliver_to_stack(mcast_primary_vdev->pdev->soc,
  1061. mcast_primary_vdev,
  1062. peer,
  1063. nbuf,
  1064. NULL);
  1065. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1066. mcast_primary_vdev,
  1067. DP_MOD_ID_RX);
  1068. return true;
  1069. send_pkt:
  1070. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  1071. &be_vdev->vdev,
  1072. peer,
  1073. nbuf,
  1074. NULL);
  1075. return true;
  1076. }
  1077. #else
  1078. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1079. struct dp_vdev *vdev,
  1080. struct dp_txrx_peer *peer,
  1081. qdf_nbuf_t nbuf,
  1082. uint8_t link_id)
  1083. {
  1084. return false;
  1085. }
  1086. #endif
  1087. #endif
  1088. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1089. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  1090. hal_ring_handle_t hal_ring_hdl,
  1091. uint8_t reo_ring_num,
  1092. uint32_t quota)
  1093. {
  1094. struct dp_soc *soc = int_ctx->soc;
  1095. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  1096. uint32_t work_done = 0;
  1097. if (dp_srng_get_near_full_level(soc, rx_ring) <
  1098. DP_SRNG_THRESH_NEAR_FULL)
  1099. return 0;
  1100. qdf_atomic_set(&rx_ring->near_full, 1);
  1101. work_done++;
  1102. return work_done;
  1103. }
  1104. #endif
  1105. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1106. #ifdef WLAN_FEATURE_11BE_MLO
  1107. /**
  1108. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1109. * @ta_peer: transmitter peer handle
  1110. * @da_peer: destination peer handle
  1111. *
  1112. * Return: true - MLO forwarding case, false: not
  1113. */
  1114. static inline bool
  1115. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1116. struct dp_txrx_peer *da_peer)
  1117. {
  1118. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1119. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1120. &da_peer->vdev->mld_mac_addr))
  1121. return false;
  1122. return true;
  1123. }
  1124. #else
  1125. static inline bool
  1126. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1127. struct dp_txrx_peer *da_peer)
  1128. {
  1129. return false;
  1130. }
  1131. #endif
  1132. #ifdef INTRA_BSS_FWD_OFFLOAD
  1133. /**
  1134. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1135. * for unicast frame
  1136. * @nbuf: RX packet buffer
  1137. * @ta_peer: transmitter DP peer handle
  1138. * @rx_tlv_hdr: Rx TLV header
  1139. * @msdu_metadata: MSDU meta data info
  1140. * @params: params to be filled in
  1141. *
  1142. * Return: true - intrabss allowed
  1143. * false - not allow
  1144. */
  1145. static bool
  1146. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1147. struct dp_txrx_peer *ta_peer,
  1148. uint8_t *rx_tlv_hdr,
  1149. struct hal_rx_msdu_metadata *msdu_metadata,
  1150. struct dp_be_intrabss_params *params)
  1151. {
  1152. uint8_t dest_chip_id, dest_chip_pmac_id;
  1153. struct dp_vdev_be *be_vdev =
  1154. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1155. struct dp_soc_be *be_soc =
  1156. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1157. uint16_t da_peer_id;
  1158. struct dp_peer *da_peer = NULL;
  1159. if (!qdf_nbuf_is_intra_bss(nbuf))
  1160. return false;
  1161. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1162. da_peer = dp_peer_get_tgt_peer_by_id(&be_soc->soc, da_peer_id,
  1163. DP_MOD_ID_RX);
  1164. if (da_peer) {
  1165. if (da_peer->bss_peer || (da_peer->txrx_peer == ta_peer)) {
  1166. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1167. return false;
  1168. }
  1169. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1170. }
  1171. hal_rx_tlv_get_dest_chip_pmac_id(rx_tlv_hdr,
  1172. &dest_chip_id,
  1173. &dest_chip_pmac_id);
  1174. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1175. if (dest_chip_id == be_soc->mlo_chip_id) {
  1176. if (dest_chip_pmac_id == ta_peer->vdev->pdev->pdev_id)
  1177. params->tx_vdev_id = ta_peer->vdev->vdev_id;
  1178. else
  1179. params->tx_vdev_id =
  1180. be_vdev->partner_vdev_list[dest_chip_id]
  1181. [dest_chip_pmac_id];
  1182. return true;
  1183. }
  1184. params->tx_vdev_id =
  1185. be_vdev->partner_vdev_list[dest_chip_id][dest_chip_pmac_id];
  1186. params->dest_soc =
  1187. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1188. dest_chip_id);
  1189. if (!params->dest_soc)
  1190. return false;
  1191. return true;
  1192. }
  1193. #else
  1194. #ifdef WLAN_MLO_MULTI_CHIP
  1195. static bool
  1196. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1197. struct dp_txrx_peer *ta_peer,
  1198. uint8_t *rx_tlv_hdr,
  1199. struct hal_rx_msdu_metadata *msdu_metadata,
  1200. struct dp_be_intrabss_params *params)
  1201. {
  1202. uint16_t da_peer_id;
  1203. struct dp_txrx_peer *da_peer;
  1204. bool ret = false;
  1205. uint8_t dest_chip_id;
  1206. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1207. struct dp_vdev_be *be_vdev =
  1208. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1209. struct dp_soc_be *be_soc =
  1210. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1211. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1212. return false;
  1213. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1214. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1215. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1216. /* use dest chip id when TA is MLD peer and DA is legacy */
  1217. if (be_soc->mlo_enabled &&
  1218. ta_peer->mld_peer &&
  1219. !(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1220. /* validate chip_id, get a ref, and re-assign soc */
  1221. params->dest_soc =
  1222. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1223. dest_chip_id);
  1224. if (!params->dest_soc)
  1225. return false;
  1226. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1227. da_peer_id,
  1228. &txrx_ref_handle,
  1229. DP_MOD_ID_RX);
  1230. if (!da_peer)
  1231. return false;
  1232. } else {
  1233. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1234. da_peer_id,
  1235. &txrx_ref_handle,
  1236. DP_MOD_ID_RX);
  1237. if (!da_peer)
  1238. return false;
  1239. params->dest_soc = da_peer->vdev->pdev->soc;
  1240. if (!params->dest_soc)
  1241. goto rel_da_peer;
  1242. }
  1243. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1244. /* If the source or destination peer in the isolation
  1245. * list then dont forward instead push to bridge stack.
  1246. */
  1247. if (dp_get_peer_isolation(ta_peer) ||
  1248. dp_get_peer_isolation(da_peer)) {
  1249. ret = false;
  1250. goto rel_da_peer;
  1251. }
  1252. if (da_peer->bss_peer || (da_peer == ta_peer)) {
  1253. ret = false;
  1254. goto rel_da_peer;
  1255. }
  1256. /* Same vdev, support Inra-BSS */
  1257. if (da_peer->vdev == ta_peer->vdev) {
  1258. ret = true;
  1259. goto rel_da_peer;
  1260. }
  1261. /* MLO specific Intra-BSS check */
  1262. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1263. /* use dest chip id for legacy dest peer */
  1264. if (!(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1265. if (!(be_vdev->partner_vdev_list[dest_chip_id][0] ==
  1266. params->tx_vdev_id) &&
  1267. !(be_vdev->partner_vdev_list[dest_chip_id][1] ==
  1268. params->tx_vdev_id)) {
  1269. /*dp_soc_unref_delete(soc);*/
  1270. goto rel_da_peer;
  1271. }
  1272. }
  1273. ret = true;
  1274. }
  1275. rel_da_peer:
  1276. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1277. return ret;
  1278. }
  1279. #else
  1280. static bool
  1281. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1282. struct dp_txrx_peer *ta_peer,
  1283. uint8_t *rx_tlv_hdr,
  1284. struct hal_rx_msdu_metadata *msdu_metadata,
  1285. struct dp_be_intrabss_params *params)
  1286. {
  1287. uint16_t da_peer_id;
  1288. struct dp_txrx_peer *da_peer;
  1289. bool ret = false;
  1290. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1291. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1292. return false;
  1293. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1294. params->dest_soc,
  1295. msdu_metadata->da_idx);
  1296. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1297. &txrx_ref_handle, DP_MOD_ID_RX);
  1298. if (!da_peer)
  1299. return false;
  1300. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1301. /* If the source or destination peer in the isolation
  1302. * list then dont forward instead push to bridge stack.
  1303. */
  1304. if (dp_get_peer_isolation(ta_peer) ||
  1305. dp_get_peer_isolation(da_peer))
  1306. goto rel_da_peer;
  1307. if (da_peer->bss_peer || da_peer == ta_peer)
  1308. goto rel_da_peer;
  1309. /* Same vdev, support Inra-BSS */
  1310. if (da_peer->vdev == ta_peer->vdev) {
  1311. ret = true;
  1312. goto rel_da_peer;
  1313. }
  1314. /* MLO specific Intra-BSS check */
  1315. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1316. ret = true;
  1317. goto rel_da_peer;
  1318. }
  1319. rel_da_peer:
  1320. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1321. return ret;
  1322. }
  1323. #endif /* WLAN_MLO_MULTI_CHIP */
  1324. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1325. #if defined(QCA_MONITOR_2_0_SUPPORT) || defined(CONFIG_WORD_BASED_TLV)
  1326. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1327. uint32_t *msg_word,
  1328. void *rx_filter)
  1329. {
  1330. struct htt_rx_ring_tlv_filter *tlv_filter =
  1331. (struct htt_rx_ring_tlv_filter *)rx_filter;
  1332. if (!msg_word || !tlv_filter)
  1333. return;
  1334. /* tlv_filter->enable is set to 1 for monitor rings */
  1335. if (tlv_filter->enable)
  1336. return;
  1337. /* if word mask is zero, FW will set the default values */
  1338. if (!(tlv_filter->rx_mpdu_start_wmask > 0 &&
  1339. tlv_filter->rx_msdu_end_wmask > 0)) {
  1340. return;
  1341. }
  1342. HTT_RX_RING_SELECTION_CFG_WORD_MASK_COMPACTION_ENABLE_SET(*msg_word, 1);
  1343. /* word 14 */
  1344. msg_word += 3;
  1345. *msg_word = 0;
  1346. HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_WORD_MASK_SET(
  1347. *msg_word,
  1348. tlv_filter->rx_mpdu_start_wmask);
  1349. /* word 15 */
  1350. msg_word++;
  1351. *msg_word = 0;
  1352. HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_WORD_MASK_SET(
  1353. *msg_word,
  1354. tlv_filter->rx_msdu_end_wmask);
  1355. }
  1356. #else
  1357. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1358. uint32_t *msg_word,
  1359. void *rx_filter)
  1360. {
  1361. }
  1362. #endif
  1363. #if defined(WLAN_MCAST_MLO) && defined(CONFIG_MLO_SINGLE_DEV)
  1364. static inline
  1365. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1366. qdf_nbuf_t nbuf_copy)
  1367. {
  1368. struct dp_vdev *mcast_primary_vdev = NULL;
  1369. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1370. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1371. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1372. if (!vdev->mlo_vdev)
  1373. return false;
  1374. tx_exc_metadata.is_mlo_mcast = 1;
  1375. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc,
  1376. be_vdev,
  1377. DP_MOD_ID_RX);
  1378. if (!mcast_primary_vdev)
  1379. return false;
  1380. nbuf_copy = dp_tx_send_exception((struct cdp_soc_t *)
  1381. mcast_primary_vdev->pdev->soc,
  1382. mcast_primary_vdev->vdev_id,
  1383. nbuf_copy, &tx_exc_metadata);
  1384. if (nbuf_copy)
  1385. qdf_nbuf_free(nbuf_copy);
  1386. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1387. mcast_primary_vdev, DP_MOD_ID_RX);
  1388. return true;
  1389. }
  1390. #else
  1391. static inline
  1392. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1393. qdf_nbuf_t nbuf_copy)
  1394. {
  1395. return false;
  1396. }
  1397. #endif
  1398. bool
  1399. dp_rx_intrabss_mcast_handler_be(struct dp_soc *soc,
  1400. struct dp_txrx_peer *ta_txrx_peer,
  1401. qdf_nbuf_t nbuf_copy,
  1402. struct cdp_tid_rx_stats *tid_stats,
  1403. uint8_t link_id)
  1404. {
  1405. if (qdf_unlikely(ta_txrx_peer->vdev->nawds_enabled)) {
  1406. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1407. uint16_t len = QDF_NBUF_CB_RX_PKT_LEN(nbuf_copy);
  1408. tx_exc_metadata.peer_id = ta_txrx_peer->peer_id;
  1409. tx_exc_metadata.is_intrabss_fwd = 1;
  1410. tx_exc_metadata.tid = HTT_TX_EXT_TID_INVALID;
  1411. if (dp_tx_send_exception((struct cdp_soc_t *)soc,
  1412. ta_txrx_peer->vdev->vdev_id,
  1413. nbuf_copy,
  1414. &tx_exc_metadata)) {
  1415. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1416. rx.intra_bss.fail, 1,
  1417. len, link_id);
  1418. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1419. qdf_nbuf_free(nbuf_copy);
  1420. } else {
  1421. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1422. rx.intra_bss.pkts, 1,
  1423. len, link_id);
  1424. tid_stats->intrabss_cnt++;
  1425. }
  1426. return true;
  1427. }
  1428. if (dp_rx_intrabss_mlo_mcbc_fwd(soc, ta_txrx_peer->vdev,
  1429. nbuf_copy))
  1430. return true;
  1431. return false;
  1432. }
  1433. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1434. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1435. uint8_t link_id)
  1436. {
  1437. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1438. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1439. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1440. tid_stats.tid_rx_stats[ring_id][tid];
  1441. bool ret = false;
  1442. struct dp_be_intrabss_params params;
  1443. struct hal_rx_msdu_metadata msdu_metadata;
  1444. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1445. * source, then clone the pkt and send the cloned pkt for
  1446. * intra BSS forwarding and original pkt up the network stack
  1447. * Note: how do we handle multicast pkts. do we forward
  1448. * all multicast pkts as is or let a higher layer module
  1449. * like igmpsnoop decide whether to forward or not with
  1450. * Mcast enhancement.
  1451. */
  1452. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1453. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1454. nbuf, tid_stats, link_id);
  1455. }
  1456. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1457. nbuf))
  1458. return true;
  1459. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  1460. params.dest_soc = soc;
  1461. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer, rx_tlv_hdr,
  1462. &msdu_metadata, &params)) {
  1463. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1464. params.tx_vdev_id,
  1465. rx_tlv_hdr, nbuf, tid_stats,
  1466. link_id);
  1467. }
  1468. return ret;
  1469. }
  1470. #endif
  1471. bool dp_rx_chain_msdus_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1472. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  1473. {
  1474. bool mpdu_done = false;
  1475. qdf_nbuf_t curr_nbuf = NULL;
  1476. qdf_nbuf_t tmp_nbuf = NULL;
  1477. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1478. if (!dp_pdev) {
  1479. dp_rx_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  1480. return mpdu_done;
  1481. }
  1482. /* if invalid peer SG list has max values free the buffers in list
  1483. * and treat current buffer as start of list
  1484. *
  1485. * current logic to detect the last buffer from attn_tlv is not reliable
  1486. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  1487. * up
  1488. */
  1489. if (!dp_pdev->first_nbuf ||
  1490. (dp_pdev->invalid_peer_head_msdu &&
  1491. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  1492. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  1493. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1494. dp_pdev->first_nbuf = true;
  1495. /* If the new nbuf received is the first msdu of the
  1496. * amsdu and there are msdus in the invalid peer msdu
  1497. * list, then let us free all the msdus of the invalid
  1498. * peer msdu list.
  1499. * This scenario can happen when we start receiving
  1500. * new a-msdu even before the previous a-msdu is completely
  1501. * received.
  1502. */
  1503. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  1504. while (curr_nbuf) {
  1505. tmp_nbuf = curr_nbuf->next;
  1506. dp_rx_nbuf_free(curr_nbuf);
  1507. curr_nbuf = tmp_nbuf;
  1508. }
  1509. dp_pdev->invalid_peer_head_msdu = NULL;
  1510. dp_pdev->invalid_peer_tail_msdu = NULL;
  1511. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  1512. }
  1513. if (qdf_nbuf_is_rx_chfrag_end(nbuf) &&
  1514. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1515. qdf_assert_always(dp_pdev->first_nbuf);
  1516. dp_pdev->first_nbuf = false;
  1517. mpdu_done = true;
  1518. }
  1519. /*
  1520. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  1521. * should be NULL here, add the checking for debugging purpose
  1522. * in case some corner case.
  1523. */
  1524. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  1525. dp_pdev->invalid_peer_tail_msdu);
  1526. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  1527. dp_pdev->invalid_peer_tail_msdu,
  1528. nbuf);
  1529. return mpdu_done;
  1530. }
  1531. qdf_nbuf_t
  1532. dp_rx_wbm_err_reap_desc_be(struct dp_intr *int_ctx, struct dp_soc *soc,
  1533. hal_ring_handle_t hal_ring_hdl, uint32_t quota,
  1534. uint32_t *rx_bufs_used)
  1535. {
  1536. hal_ring_desc_t ring_desc;
  1537. hal_soc_handle_t hal_soc;
  1538. struct dp_rx_desc *rx_desc;
  1539. union dp_rx_desc_list_elem_t
  1540. *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1541. union dp_rx_desc_list_elem_t
  1542. *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1543. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { 0 } };
  1544. uint8_t buf_type;
  1545. uint8_t mac_id;
  1546. struct dp_srng *dp_rxdma_srng;
  1547. struct rx_desc_pool *rx_desc_pool;
  1548. qdf_nbuf_t nbuf_head = NULL;
  1549. qdf_nbuf_t nbuf_tail = NULL;
  1550. qdf_nbuf_t nbuf;
  1551. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  1552. uint8_t msdu_continuation = 0;
  1553. bool process_sg_buf = false;
  1554. uint32_t wbm_err_src;
  1555. QDF_STATUS status;
  1556. struct dp_soc *replenish_soc;
  1557. uint8_t chip_id;
  1558. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  1559. qdf_assert(soc && hal_ring_hdl);
  1560. hal_soc = soc->hal_soc;
  1561. qdf_assert(hal_soc);
  1562. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1563. /* TODO */
  1564. /*
  1565. * Need API to convert from hal_ring pointer to
  1566. * Ring Type / Ring Id combo
  1567. */
  1568. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  1569. soc, hal_ring_hdl);
  1570. goto done;
  1571. }
  1572. while (qdf_likely(quota)) {
  1573. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1574. if (qdf_unlikely(!ring_desc))
  1575. break;
  1576. /* XXX */
  1577. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1578. /*
  1579. * For WBM ring, expect only MSDU buffers
  1580. */
  1581. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  1582. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  1583. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1584. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  1585. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  1586. ring_desc,
  1587. &rx_desc)) {
  1588. dp_rx_err_err("get rx desc from hal_desc failed");
  1589. continue;
  1590. }
  1591. qdf_assert_always(rx_desc);
  1592. if (!dp_rx_desc_check_magic(rx_desc)) {
  1593. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  1594. soc, rx_desc);
  1595. continue;
  1596. }
  1597. /*
  1598. * this is a unlikely scenario where the host is reaping
  1599. * a descriptor which it already reaped just a while ago
  1600. * but is yet to replenish it back to HW.
  1601. * In this case host will dump the last 128 descriptors
  1602. * including the software descriptor rx_desc and assert.
  1603. */
  1604. if (qdf_unlikely(!rx_desc->in_use)) {
  1605. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1606. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1607. ring_desc, rx_desc);
  1608. continue;
  1609. }
  1610. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  1611. nbuf = rx_desc->nbuf;
  1612. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  1613. ring_desc, rx_desc);
  1614. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1615. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1616. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  1617. nbuf);
  1618. rx_desc->in_err_state = 1;
  1619. rx_desc->unmapped = 1;
  1620. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1621. dp_rx_add_to_free_desc_list(
  1622. &head[rx_desc->chip_id][rx_desc->pool_id],
  1623. &tail[rx_desc->chip_id][rx_desc->pool_id],
  1624. rx_desc);
  1625. continue;
  1626. }
  1627. /* Get MPDU DESC info */
  1628. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  1629. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  1630. HAL_MPDU_F_QOS_CONTROL_VALID))
  1631. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  1632. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1633. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1634. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1635. rx_desc->unmapped = 1;
  1636. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1637. if (qdf_unlikely(
  1638. soc->wbm_release_desc_rx_sg_support &&
  1639. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  1640. /* SG is detected from continuation bit */
  1641. msdu_continuation =
  1642. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1643. ring_desc);
  1644. if (msdu_continuation &&
  1645. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1646. /* Update length from first buffer in SG */
  1647. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1648. hal_rx_msdu_start_msdu_len_get(
  1649. soc->hal_soc,
  1650. qdf_nbuf_data(nbuf));
  1651. soc->wbm_sg_param.wbm_is_first_msdu_in_sg =
  1652. true;
  1653. }
  1654. if (msdu_continuation) {
  1655. /* MSDU continued packets */
  1656. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1657. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1658. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1659. } else {
  1660. /* This is the terminal packet in SG */
  1661. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1662. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1663. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1664. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1665. process_sg_buf = true;
  1666. }
  1667. }
  1668. /*
  1669. * save the wbm desc info in nbuf TLV. We will need this
  1670. * info when we do the actual nbuf processing
  1671. */
  1672. wbm_err_info.pool_id = rx_desc->pool_id;
  1673. dp_rx_set_err_info(soc, nbuf, wbm_err_info);
  1674. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1675. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1676. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1677. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1678. nbuf);
  1679. if (process_sg_buf) {
  1680. if (!dp_rx_buffer_pool_refill(
  1681. soc,
  1682. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1683. rx_desc->pool_id))
  1684. DP_RX_MERGE_TWO_LIST(
  1685. nbuf_head, nbuf_tail,
  1686. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1687. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1688. dp_rx_wbm_sg_list_last_msdu_war(soc);
  1689. dp_rx_wbm_sg_list_reset(soc);
  1690. process_sg_buf = false;
  1691. }
  1692. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1693. rx_desc->pool_id)) {
  1694. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1695. }
  1696. dp_rx_add_to_free_desc_list
  1697. (&head[rx_desc->chip_id][rx_desc->pool_id],
  1698. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  1699. /*
  1700. * if continuation bit is set then we have MSDU spread
  1701. * across multiple buffers, let us not decrement quota
  1702. * till we reap all buffers of that MSDU.
  1703. */
  1704. if (qdf_likely(!msdu_continuation))
  1705. quota -= 1;
  1706. }
  1707. done:
  1708. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1709. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  1710. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1711. /*
  1712. * continue with next mac_id if no pkts were reaped
  1713. * from that pool
  1714. */
  1715. if (!rx_bufs_reaped[chip_id][mac_id])
  1716. continue;
  1717. replenish_soc =
  1718. soc->arch_ops.dp_rx_replenish_soc_get(soc, chip_id);
  1719. dp_rxdma_srng =
  1720. &replenish_soc->rx_refill_buf_ring[mac_id];
  1721. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  1722. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  1723. dp_rxdma_srng,
  1724. rx_desc_pool,
  1725. rx_bufs_reaped[chip_id][mac_id],
  1726. &head[chip_id][mac_id],
  1727. &tail[chip_id][mac_id]);
  1728. *rx_bufs_used += rx_bufs_reaped[chip_id][mac_id];
  1729. }
  1730. }
  1731. return nbuf_head;
  1732. }
  1733. QDF_STATUS
  1734. dp_rx_null_q_desc_handle_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1735. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1736. struct dp_txrx_peer *txrx_peer,
  1737. bool is_reo_exception,
  1738. uint8_t link_id)
  1739. {
  1740. uint32_t pkt_len;
  1741. uint16_t msdu_len;
  1742. struct dp_vdev *vdev;
  1743. uint8_t tid;
  1744. qdf_ether_header_t *eh;
  1745. struct hal_rx_msdu_metadata msdu_metadata;
  1746. uint16_t sa_idx = 0;
  1747. bool is_eapol = 0;
  1748. bool enh_flag;
  1749. qdf_nbuf_set_rx_chfrag_start(
  1750. nbuf,
  1751. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1752. rx_tlv_hdr));
  1753. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1754. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1755. rx_tlv_hdr));
  1756. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1757. rx_tlv_hdr));
  1758. qdf_nbuf_set_da_valid(nbuf,
  1759. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1760. rx_tlv_hdr));
  1761. qdf_nbuf_set_sa_valid(nbuf,
  1762. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1763. rx_tlv_hdr));
  1764. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1765. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1766. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1767. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1768. if (dp_rx_check_pkt_len(soc, pkt_len))
  1769. goto drop_nbuf;
  1770. /* Set length in nbuf */
  1771. qdf_nbuf_set_pktlen(
  1772. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1773. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1774. }
  1775. /*
  1776. * Check if DMA completed -- msdu_done is the last bit
  1777. * to be written
  1778. */
  1779. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1780. dp_err_rl("MSDU DONE failure");
  1781. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1782. QDF_TRACE_LEVEL_INFO);
  1783. qdf_assert(0);
  1784. }
  1785. if (!txrx_peer &&
  1786. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1787. rx_tlv_hdr, nbuf))
  1788. return QDF_STATUS_E_FAILURE;
  1789. if (!txrx_peer) {
  1790. bool mpdu_done = false;
  1791. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1792. if (!pdev) {
  1793. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1794. return QDF_STATUS_E_FAILURE;
  1795. }
  1796. dp_err_rl("txrx_peer is NULL");
  1797. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1798. qdf_nbuf_len(nbuf));
  1799. /* QCN9000 has the support enabled */
  1800. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1801. mpdu_done = true;
  1802. nbuf->next = NULL;
  1803. /* Trigger invalid peer handler wrapper */
  1804. dp_rx_process_invalid_peer_wrapper(soc,
  1805. nbuf,
  1806. mpdu_done,
  1807. pool_id);
  1808. } else {
  1809. mpdu_done = soc->arch_ops.dp_rx_chain_msdus(soc, nbuf,
  1810. rx_tlv_hdr,
  1811. pool_id);
  1812. /* Trigger invalid peer handler wrapper */
  1813. dp_rx_process_invalid_peer_wrapper(
  1814. soc,
  1815. pdev->invalid_peer_head_msdu,
  1816. mpdu_done, pool_id);
  1817. }
  1818. if (mpdu_done) {
  1819. pdev->invalid_peer_head_msdu = NULL;
  1820. pdev->invalid_peer_tail_msdu = NULL;
  1821. }
  1822. return QDF_STATUS_E_FAILURE;
  1823. }
  1824. vdev = txrx_peer->vdev;
  1825. if (!vdev) {
  1826. dp_err_rl("Null vdev!");
  1827. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1828. goto drop_nbuf;
  1829. }
  1830. /*
  1831. * Advance the packet start pointer by total size of
  1832. * pre-header TLV's
  1833. */
  1834. if (qdf_nbuf_is_frag(nbuf))
  1835. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1836. else
  1837. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1838. soc->rx_pkt_tlv_size));
  1839. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1840. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1841. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1842. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1,
  1843. link_id);
  1844. goto drop_nbuf;
  1845. }
  1846. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1847. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1848. if ((sa_idx < 0) ||
  1849. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1850. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1851. goto drop_nbuf;
  1852. }
  1853. }
  1854. if ((!soc->mec_fw_offload) &&
  1855. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1856. /* this is a looped back MCBC pkt, drop it */
  1857. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1858. qdf_nbuf_len(nbuf), link_id);
  1859. goto drop_nbuf;
  1860. }
  1861. /*
  1862. * In qwrap mode if the received packet matches with any of the vdev
  1863. * mac addresses, drop it. Donot receive multicast packets originated
  1864. * from any proxysta.
  1865. */
  1866. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1867. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1868. qdf_nbuf_len(nbuf), link_id);
  1869. goto drop_nbuf;
  1870. }
  1871. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1872. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1873. rx_tlv_hdr))) {
  1874. dp_err_rl("free buffer for multicast packet");
  1875. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1,
  1876. link_id);
  1877. goto drop_nbuf;
  1878. }
  1879. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1880. dp_err_rl("mcast Policy Check Drop pkt");
  1881. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1,
  1882. link_id);
  1883. goto drop_nbuf;
  1884. }
  1885. /* WDS Source Port Learning */
  1886. if (!soc->ast_offload_support &&
  1887. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1888. vdev->wds_enabled))
  1889. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1890. msdu_metadata);
  1891. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1892. struct dp_peer *peer;
  1893. struct dp_rx_tid *rx_tid;
  1894. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1895. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1896. DP_MOD_ID_RX_ERR);
  1897. if (peer) {
  1898. rx_tid = &peer->rx_tid[tid];
  1899. qdf_spin_lock_bh(&rx_tid->tid_lock);
  1900. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  1901. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1902. IEEE80211_SEQ_MAX);
  1903. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  1904. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1905. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1906. }
  1907. }
  1908. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1909. if (!txrx_peer->authorize) {
  1910. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1911. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1912. if (!dp_rx_err_match_dhost(eh, vdev))
  1913. goto drop_nbuf;
  1914. } else {
  1915. goto drop_nbuf;
  1916. }
  1917. }
  1918. /*
  1919. * Drop packets in this path if cce_match is found. Packets will come
  1920. * in following path depending on whether tidQ is setup.
  1921. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1922. * cce_match = 1
  1923. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1924. * dropped.
  1925. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1926. * cce_match = 1
  1927. * These packets need to be dropped and should not get delivered
  1928. * to stack.
  1929. */
  1930. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr)))
  1931. goto drop_nbuf;
  1932. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1933. qdf_nbuf_set_next(nbuf, NULL);
  1934. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, link_id);
  1935. } else {
  1936. enh_flag = vdev->pdev->enhanced_stats_en;
  1937. qdf_nbuf_set_next(nbuf, NULL);
  1938. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1939. enh_flag);
  1940. /*
  1941. * Update the protocol tag in SKB based on
  1942. * CCE metadata
  1943. */
  1944. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1945. EXCEPTION_DEST_RING_ID,
  1946. true, true);
  1947. /* Update the flow tag in SKB based on FSE metadata */
  1948. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1949. rx_tlv_hdr, true);
  1950. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1951. soc->hal_soc, rx_tlv_hdr) &&
  1952. (vdev->rx_decap_type ==
  1953. htt_cmn_pkt_type_ethernet))) {
  1954. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1955. enh_flag, link_id);
  1956. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1957. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1958. qdf_nbuf_len(nbuf),
  1959. enh_flag,
  1960. link_id);
  1961. } else {
  1962. DP_PEER_UC_INCC_PKT(txrx_peer, 1,
  1963. qdf_nbuf_len(nbuf),
  1964. enh_flag,
  1965. link_id);
  1966. }
  1967. qdf_nbuf_set_exc_frame(nbuf, 1);
  1968. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1969. is_eapol);
  1970. }
  1971. return QDF_STATUS_SUCCESS;
  1972. drop_nbuf:
  1973. dp_rx_nbuf_free(nbuf);
  1974. return QDF_STATUS_E_FAILURE;
  1975. }