wcd937x.c 68 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/delay.h>
  18. #include <linux/kernel.h>
  19. #include <linux/component.h>
  20. #include <sound/soc.h>
  21. #include <sound/tlv.h>
  22. #include <soc/soundwire.h>
  23. #include <linux/regmap.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "internal.h"
  27. #include "../wcdcal-hwdep.h"
  28. #include "wcd937x-registers.h"
  29. #include "../msm-cdc-pinctrl.h"
  30. #include <dt-bindings/sound/audio-codec-port-types.h>
  31. #include "../msm-cdc-supply.h"
  32. #define WCD9370_VARIANT 0
  33. #define WCD9375_VARIANT 5
  34. #define NUM_SWRS_DT_PARAMS 5
  35. #define WCD937X_VERSION_1_0 1
  36. #define WCD937X_VERSION_ENTRY_SIZE 32
  37. enum {
  38. CODEC_TX = 0,
  39. CODEC_RX,
  40. };
  41. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  42. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  43. static int wcd937x_handle_post_irq(void *data);
  44. static int wcd937x_reset(struct device *dev);
  45. static int wcd937x_reset_low(struct device *dev);
  46. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  64. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  65. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  66. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  67. };
  68. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  69. .name = "wcd937x",
  70. .irqs = wcd937x_irqs,
  71. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  72. .num_regs = 3,
  73. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  74. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  75. .ack_base = WCD937X_DIGITAL_INTR_CLEAR_0,
  76. .use_ack = 1,
  77. .clear_ack = 1,
  78. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  79. .runtime_pm = false,
  80. .handle_post_irq = wcd937x_handle_post_irq,
  81. .irq_drv_data = NULL,
  82. };
  83. static int wcd937x_handle_post_irq(void *data)
  84. {
  85. struct wcd937x_priv *wcd937x = data;
  86. u32 status1 = 0, status2 = 0, status3 = 0;
  87. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &status1);
  88. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &status2);
  89. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &status3);
  90. wcd937x->tx_swr_dev->slave_irq_pending =
  91. ((status1 || status2 || status3) ? true : false);
  92. return IRQ_HANDLED;
  93. }
  94. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  95. {
  96. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  97. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  98. usleep_range(1000, 1010);
  99. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  100. usleep_range(1000, 1010);
  101. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  102. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  103. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  104. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  105. usleep_range(10000, 10010);
  106. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  107. return 0;
  108. }
  109. static int wcd937x_set_port_params(struct snd_soc_codec *codec, u8 slv_prt_type,
  110. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  111. u8 *port_type, u8 path)
  112. {
  113. int i, j;
  114. u8 num_ports = 0;
  115. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  116. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  117. switch (path) {
  118. case CODEC_RX:
  119. map = &wcd937x->rx_port_mapping;
  120. num_ports = wcd937x->num_rx_ports;
  121. break;
  122. case CODEC_TX:
  123. map = &wcd937x->tx_port_mapping;
  124. num_ports = wcd937x->num_tx_ports;
  125. break;
  126. }
  127. for (i = 0; i <= num_ports; i++) {
  128. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  129. if ((*map)[i][j].slave_port_type == slv_prt_type)
  130. goto found;
  131. }
  132. }
  133. found:
  134. if (i > num_ports || j == MAX_CH_PER_PORT) {
  135. dev_err(codec->dev, "%s Failed to find slave port for type %u\n",
  136. __func__, slv_prt_type);
  137. return -EINVAL;
  138. }
  139. *port_id = i;
  140. *num_ch = (*map)[i][j].num_ch;
  141. *ch_mask = (*map)[i][j].ch_mask;
  142. *ch_rate = (*map)[i][j].ch_rate;
  143. *port_type = (*map)[i][j].master_port_type;
  144. return 0;
  145. }
  146. static int wcd937x_parse_port_mapping(struct device *dev,
  147. char *prop, u8 path)
  148. {
  149. u32 *dt_array, map_size, map_length;
  150. u32 port_num, ch_mask, ch_rate, old_port_num = 0;
  151. u32 slave_port_type, master_port_type;
  152. u32 i, ch_iter = 0;
  153. int ret = 0;
  154. u8 *num_ports = NULL;
  155. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  156. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  157. switch (path) {
  158. case CODEC_RX:
  159. map = &wcd937x->rx_port_mapping;
  160. num_ports = &wcd937x->num_rx_ports;
  161. break;
  162. case CODEC_TX:
  163. map = &wcd937x->tx_port_mapping;
  164. num_ports = &wcd937x->num_tx_ports;
  165. break;
  166. }
  167. if (!of_find_property(dev->of_node, prop,
  168. &map_size)) {
  169. dev_err(dev, "missing port mapping prop %s\n", prop);
  170. goto err_pdata_fail;
  171. }
  172. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  173. dt_array = kzalloc(map_size, GFP_KERNEL);
  174. if (!dt_array) {
  175. ret = -ENOMEM;
  176. goto err_pdata_fail;
  177. }
  178. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  179. NUM_SWRS_DT_PARAMS * map_length);
  180. if (ret) {
  181. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  182. __func__, prop);
  183. goto err_pdata_fail;
  184. }
  185. for (i = 0; i < map_length; i++) {
  186. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  187. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  188. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  189. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  190. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  191. if (port_num != old_port_num)
  192. ch_iter = 0;
  193. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  194. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  195. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  196. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  197. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  198. old_port_num = port_num;
  199. }
  200. *num_ports = port_num;
  201. kfree(dt_array);
  202. return 0;
  203. err_pdata_fail:
  204. kfree(dt_array);
  205. return -EINVAL;
  206. }
  207. static int wcd937x_tx_connect_port(struct snd_soc_codec *codec,
  208. u8 slv_port_type, u8 enable)
  209. {
  210. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  211. u8 port_id;
  212. u8 num_ch;
  213. u8 ch_mask;
  214. u32 ch_rate;
  215. u8 port_type;
  216. u8 num_port = 1;
  217. int ret = 0;
  218. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  219. &num_ch, &ch_mask, &ch_rate,
  220. &port_type, CODEC_TX);
  221. if (ret)
  222. return ret;
  223. if (enable)
  224. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  225. num_port, &ch_mask, &ch_rate,
  226. &num_ch, &port_type);
  227. else
  228. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  229. num_port, &ch_mask, &port_type);
  230. return ret;
  231. }
  232. static int wcd937x_rx_connect_port(struct snd_soc_codec *codec,
  233. u8 slv_port_type, u8 enable)
  234. {
  235. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  236. u8 port_id;
  237. u8 num_ch;
  238. u8 ch_mask;
  239. u32 ch_rate;
  240. u8 port_type;
  241. u8 num_port = 1;
  242. int ret = 0;
  243. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  244. &num_ch, &ch_mask, &ch_rate,
  245. &port_type, CODEC_RX);
  246. if (ret)
  247. return ret;
  248. if (enable)
  249. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  250. num_port, &ch_mask, &ch_rate,
  251. &num_ch, &port_type);
  252. else
  253. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  254. num_port, &ch_mask, &port_type);
  255. return ret;
  256. }
  257. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  258. {
  259. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  260. if (wcd937x->rx_clk_cnt == 0) {
  261. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  262. 0x08, 0x08);
  263. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  264. 0x01, 0x01);
  265. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  266. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  267. 0x40, 0x00);
  268. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX1_CTL,
  269. 0x40, 0x00);
  270. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX2_CTL,
  271. 0x40, 0x00);
  272. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  273. 0x02, 0x02);
  274. }
  275. wcd937x->rx_clk_cnt++;
  276. return 0;
  277. }
  278. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  279. {
  280. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  281. wcd937x->rx_clk_cnt--;
  282. if (wcd937x->rx_clk_cnt == 0) {
  283. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x40, 0x00);
  284. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x80, 0x00);
  285. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  286. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  287. 0x02, 0x00);
  288. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  289. 0x01, 0x00);
  290. }
  291. return 0;
  292. }
  293. /*
  294. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  295. * @codec: handle to snd_soc_codec *
  296. *
  297. * return wcd937x_mbhc handle or error code in case of failure
  298. */
  299. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  300. {
  301. struct wcd937x_priv *wcd937x;
  302. if (!codec) {
  303. pr_err("%s: Invalid params, NULL codec\n", __func__);
  304. return NULL;
  305. }
  306. wcd937x = snd_soc_codec_get_drvdata(codec);
  307. if (!wcd937x) {
  308. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  309. return NULL;
  310. }
  311. return wcd937x->mbhc;
  312. }
  313. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  314. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  315. struct snd_kcontrol *kcontrol,
  316. int event)
  317. {
  318. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  319. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  320. int ret = 0;
  321. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  322. w->name, event);
  323. switch (event) {
  324. case SND_SOC_DAPM_PRE_PMU:
  325. wcd937x_rx_clk_enable(codec);
  326. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  327. 0x01, 0x01);
  328. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  329. 0x04, 0x04);
  330. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  331. 0x80, 0x00);
  332. break;
  333. case SND_SOC_DAPM_POST_PMU:
  334. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  335. 0x0F, 0x02);
  336. if (wcd937x->comp1_enable) {
  337. snd_soc_update_bits(codec,
  338. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  339. 0x02, 0x02);
  340. snd_soc_update_bits(codec,
  341. WCD937X_HPH_L_EN, 0x20, 0x00);
  342. } else {
  343. snd_soc_update_bits(codec,
  344. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  345. 0x02, 0x00);
  346. snd_soc_update_bits(codec,
  347. WCD937X_HPH_L_EN, 0x20, 0x20);
  348. }
  349. usleep_range(5000, 5010);
  350. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  351. 0x02, 0x00);
  352. break;
  353. case SND_SOC_DAPM_POST_PMD:
  354. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  355. wcd937x->rx_swr_dev->dev_num,
  356. false);
  357. break;
  358. }
  359. return ret;
  360. }
  361. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  362. struct snd_kcontrol *kcontrol,
  363. int event)
  364. {
  365. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  366. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  367. int ret = 0;
  368. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  369. w->name, event);
  370. switch (event) {
  371. case SND_SOC_DAPM_PRE_PMU:
  372. wcd937x_rx_clk_enable(codec);
  373. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  374. 0x02, 0x02);
  375. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  376. 0x08, 0x08);
  377. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  378. 0x80, 0x00);
  379. break;
  380. case SND_SOC_DAPM_POST_PMU:
  381. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  382. 0x0F, 0x02);
  383. if (wcd937x->comp2_enable) {
  384. snd_soc_update_bits(codec,
  385. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  386. 0x01, 0x01);
  387. snd_soc_update_bits(codec,
  388. WCD937X_HPH_R_EN, 0x20, 0x00);
  389. } else {
  390. snd_soc_update_bits(codec,
  391. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  392. 0x01, 0x00);
  393. snd_soc_update_bits(codec,
  394. WCD937X_HPH_R_EN, 0x20, 0x20);
  395. }
  396. usleep_range(5000, 5010);
  397. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  398. 0x02, 0x00);
  399. break;
  400. case SND_SOC_DAPM_POST_PMD:
  401. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  402. wcd937x->rx_swr_dev->dev_num,
  403. false);
  404. break;
  405. }
  406. return ret;
  407. }
  408. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  409. struct snd_kcontrol *kcontrol,
  410. int event)
  411. {
  412. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  413. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  414. int ret = 0;
  415. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  416. w->name, event);
  417. switch (event) {
  418. case SND_SOC_DAPM_PRE_PMU:
  419. wcd937x_rx_clk_enable(codec);
  420. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  421. 0x04, 0x04);
  422. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  423. 0x01, 0x01);
  424. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  425. 0x02, 0x02);
  426. usleep_range(5000, 5010);
  427. break;
  428. case SND_SOC_DAPM_POST_PMD:
  429. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  430. wcd937x->rx_swr_dev->dev_num,
  431. false);
  432. break;
  433. };
  434. return ret;
  435. }
  436. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  437. struct snd_kcontrol *kcontrol,
  438. int event)
  439. {
  440. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  441. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  442. int ret = 0;
  443. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  444. w->name, event);
  445. switch (event) {
  446. case SND_SOC_DAPM_PRE_PMU:
  447. wcd937x_rx_clk_enable(codec);
  448. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  449. 0x04, 0x04);
  450. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  451. 0x04, 0x04);
  452. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  453. 0x01, 0x01);
  454. break;
  455. case SND_SOC_DAPM_POST_PMD:
  456. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  457. wcd937x->rx_swr_dev->dev_num,
  458. false);
  459. wcd937x_rx_clk_disable(codec);
  460. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  461. 0x04, 0x00);
  462. break;
  463. };
  464. return ret;
  465. }
  466. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  467. struct snd_kcontrol *kcontrol,
  468. int event)
  469. {
  470. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  471. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  472. int ret = 0;
  473. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  474. w->name, event);
  475. switch (event) {
  476. case SND_SOC_DAPM_PRE_PMU:
  477. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  478. usleep_range(100, 110);
  479. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  480. wcd937x->rx_swr_dev->dev_num,
  481. true);
  482. break;
  483. case SND_SOC_DAPM_POST_PMU:
  484. usleep_range(7000, 7010);
  485. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  486. 0x02, 0x02);
  487. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  488. 0x02, 0x02);
  489. if (wcd937x->update_wcd_event)
  490. wcd937x->update_wcd_event(wcd937x->handle,
  491. WCD_BOLERO_EVT_RX_MUTE,
  492. (WCD_RX2 << 0x10));
  493. break;
  494. case SND_SOC_DAPM_PRE_PMD:
  495. if (wcd937x->update_wcd_event)
  496. wcd937x->update_wcd_event(wcd937x->handle,
  497. WCD_BOLERO_EVT_RX_MUTE,
  498. (WCD_RX2 << 0x10 | 0x1));
  499. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  500. WCD_EVENT_PRE_HPHR_PA_OFF,
  501. &wcd937x->mbhc->wcd_mbhc);
  502. break;
  503. case SND_SOC_DAPM_POST_PMD:
  504. usleep_range(7000, 7010);
  505. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  506. WCD_EVENT_POST_HPHR_PA_OFF,
  507. &wcd937x->mbhc->wcd_mbhc);
  508. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  509. break;
  510. };
  511. return ret;
  512. }
  513. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  514. struct snd_kcontrol *kcontrol,
  515. int event)
  516. {
  517. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  518. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  519. int ret = 0;
  520. switch (event) {
  521. case SND_SOC_DAPM_PRE_PMU:
  522. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  523. usleep_range(100, 110);
  524. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  525. wcd937x->rx_swr_dev->dev_num,
  526. true);
  527. break;
  528. case SND_SOC_DAPM_POST_PMU:
  529. usleep_range(7000, 7010);
  530. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  531. 0x02, 0x02);
  532. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  533. 0x02, 0x02);
  534. if (wcd937x->update_wcd_event)
  535. wcd937x->update_wcd_event(wcd937x->handle,
  536. WCD_BOLERO_EVT_RX_MUTE,
  537. (WCD_RX1 << 0x10));
  538. break;
  539. case SND_SOC_DAPM_PRE_PMD:
  540. if (wcd937x->update_wcd_event)
  541. wcd937x->update_wcd_event(wcd937x->handle,
  542. WCD_BOLERO_EVT_RX_MUTE,
  543. (WCD_RX1 << 0x10 | 0x1));
  544. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  545. WCD_EVENT_PRE_HPHL_PA_OFF,
  546. &wcd937x->mbhc->wcd_mbhc);
  547. break;
  548. case SND_SOC_DAPM_POST_PMD:
  549. usleep_range(7000, 7010);
  550. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  551. WCD_EVENT_POST_HPHL_PA_OFF,
  552. &wcd937x->mbhc->wcd_mbhc);
  553. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  554. break;
  555. };
  556. return ret;
  557. }
  558. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  559. struct snd_kcontrol *kcontrol,
  560. int event)
  561. {
  562. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  563. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  564. int ret = 0;
  565. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  566. w->name, event);
  567. switch (event) {
  568. case SND_SOC_DAPM_PRE_PMU:
  569. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  570. 0x80, 0x80);
  571. usleep_range(500, 510);
  572. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  573. usleep_range(500, 510);
  574. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  575. wcd937x->rx_swr_dev->dev_num,
  576. true);
  577. break;
  578. case SND_SOC_DAPM_POST_PMU:
  579. usleep_range(1000, 1010);
  580. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  581. 0x20, 0x20);
  582. if (wcd937x->update_wcd_event)
  583. wcd937x->update_wcd_event(wcd937x->handle,
  584. WCD_BOLERO_EVT_RX_MUTE,
  585. (WCD_RX3 << 0x10));
  586. break;
  587. case SND_SOC_DAPM_PRE_PMD:
  588. if (wcd937x->update_wcd_event)
  589. wcd937x->update_wcd_event(wcd937x->handle,
  590. WCD_BOLERO_EVT_RX_MUTE,
  591. (WCD_RX3 << 0x10 | 0x1));
  592. break;
  593. case SND_SOC_DAPM_POST_PMD:
  594. usleep_range(1000, 1010);
  595. usleep_range(1000, 1010);
  596. break;
  597. };
  598. return ret;
  599. }
  600. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  601. struct snd_kcontrol *kcontrol,
  602. int event)
  603. {
  604. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  605. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  606. int ret = 0;
  607. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  608. w->name, event);
  609. switch (event) {
  610. case SND_SOC_DAPM_PRE_PMU:
  611. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  612. 0x08, 0x08);
  613. usleep_range(500, 510);
  614. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  615. usleep_range(500, 510);
  616. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  617. wcd937x->rx_swr_dev->dev_num,
  618. true);
  619. break;
  620. case SND_SOC_DAPM_POST_PMU:
  621. usleep_range(6000, 6010);
  622. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  623. 0x02, 0x02);
  624. if (wcd937x->update_wcd_event)
  625. wcd937x->update_wcd_event(wcd937x->handle,
  626. WCD_BOLERO_EVT_RX_MUTE,
  627. (WCD_RX1 << 0x10));
  628. break;
  629. case SND_SOC_DAPM_PRE_PMD:
  630. if (wcd937x->update_wcd_event)
  631. wcd937x->update_wcd_event(wcd937x->handle,
  632. WCD_BOLERO_EVT_RX_MUTE,
  633. (WCD_RX1 << 0x10 | 0x1));
  634. break;
  635. case SND_SOC_DAPM_POST_PMD:
  636. usleep_range(7000, 7010);
  637. break;
  638. };
  639. return ret;
  640. }
  641. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  642. struct snd_kcontrol *kcontrol,
  643. int event)
  644. {
  645. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  646. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  647. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  648. w->name, event);
  649. switch (event) {
  650. case SND_SOC_DAPM_PRE_PMU:
  651. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  652. 0xF0, 0x80);
  653. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  654. 0xE0, 0xA0);
  655. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3,
  656. 0x02, 0x02);
  657. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2,
  658. 0xFF, 0x1C);
  659. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  660. 0x40, 0x40);
  661. usleep_range(100, 110);
  662. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  663. 0xE0, 0xE0);
  664. usleep_range(100, 110);
  665. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  666. 0x80, 0x80);
  667. usleep_range(500, 510);
  668. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  669. usleep_range(500, 510);
  670. wcd937x_rx_connect_port(codec, HPH_L, true);
  671. if (wcd937x->comp1_enable)
  672. wcd937x_rx_connect_port(codec, COMP_L, true);
  673. break;
  674. case SND_SOC_DAPM_POST_PMD:
  675. wcd937x_rx_connect_port(codec, HPH_L, false);
  676. if (wcd937x->comp1_enable)
  677. wcd937x_rx_connect_port(codec, COMP_L, false);
  678. wcd937x_rx_clk_disable(codec);
  679. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  680. 0x01, 0x00);
  681. break;
  682. };
  683. return 0;
  684. }
  685. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  686. struct snd_kcontrol *kcontrol, int event)
  687. {
  688. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  689. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  690. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  691. w->name, event);
  692. switch (event) {
  693. case SND_SOC_DAPM_PRE_PMU:
  694. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  695. 0xF0, 0x80);
  696. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  697. 0xE0, 0xA0);
  698. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  699. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  700. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  701. 0x40, 0x40);
  702. usleep_range(100, 110);
  703. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  704. 0xE0, 0xE0);
  705. usleep_range(100, 110);
  706. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  707. 0x80, 0x80);
  708. usleep_range(500, 510);
  709. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  710. usleep_range(500, 510);
  711. wcd937x_rx_connect_port(codec, HPH_R, true);
  712. if (wcd937x->comp2_enable)
  713. wcd937x_rx_connect_port(codec, COMP_R, true);
  714. break;
  715. case SND_SOC_DAPM_POST_PMD:
  716. wcd937x_rx_connect_port(codec, HPH_R, false);
  717. if (wcd937x->comp2_enable)
  718. wcd937x_rx_connect_port(codec, COMP_R, false);
  719. wcd937x_rx_clk_disable(codec);
  720. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  721. 0x02, 0x00);
  722. break;
  723. };
  724. return 0;
  725. }
  726. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  727. struct snd_kcontrol *kcontrol,
  728. int event)
  729. {
  730. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  731. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  732. w->name, event);
  733. switch (event) {
  734. case SND_SOC_DAPM_PRE_PMU:
  735. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  736. 0xE0, 0xA0);
  737. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  738. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  739. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  740. 0x40, 0x40);
  741. usleep_range(100, 110);
  742. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  743. 0xE0, 0xE0);
  744. usleep_range(100, 110);
  745. wcd937x_rx_connect_port(codec, LO, true);
  746. break;
  747. case SND_SOC_DAPM_POST_PMD:
  748. wcd937x_rx_connect_port(codec, LO, false);
  749. usleep_range(6000, 6010);
  750. wcd937x_rx_clk_disable(codec);
  751. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  752. 0x04, 0x00);
  753. break;
  754. }
  755. return 0;
  756. }
  757. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  758. struct snd_kcontrol *kcontrol,
  759. int event)
  760. {
  761. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  762. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  763. u16 dmic_clk_reg;
  764. s32 *dmic_clk_cnt;
  765. unsigned int dmic;
  766. char *wname;
  767. int ret = 0;
  768. wname = strpbrk(w->name, "012345");
  769. if (!wname) {
  770. dev_err(codec->dev, "%s: widget not found\n", __func__);
  771. return -EINVAL;
  772. }
  773. ret = kstrtouint(wname, 10, &dmic);
  774. if (ret < 0) {
  775. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  776. __func__);
  777. return -EINVAL;
  778. }
  779. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  780. w->name, event);
  781. switch (dmic) {
  782. case 0:
  783. case 1:
  784. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  785. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  786. break;
  787. case 2:
  788. case 3:
  789. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  790. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  791. break;
  792. case 4:
  793. case 5:
  794. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  795. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  796. break;
  797. default:
  798. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  799. __func__);
  800. return -EINVAL;
  801. };
  802. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  803. __func__, event, dmic, *dmic_clk_cnt);
  804. switch (event) {
  805. case SND_SOC_DAPM_PRE_PMU:
  806. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  807. 0x80, 0x80);
  808. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  809. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  810. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  811. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), true);
  812. break;
  813. case SND_SOC_DAPM_POST_PMD:
  814. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), false);
  815. break;
  816. };
  817. return 0;
  818. }
  819. /*
  820. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  821. * @micb_mv: micbias in mv
  822. *
  823. * return register value converted
  824. */
  825. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  826. {
  827. /* min micbias voltage is 1V and maximum is 2.85V */
  828. if (micb_mv < 1000 || micb_mv > 2850) {
  829. pr_err("%s: unsupported micbias voltage\n", __func__);
  830. return -EINVAL;
  831. }
  832. return (micb_mv - 1000) / 50;
  833. }
  834. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  835. /*
  836. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  837. * @codec: handle to snd_soc_codec *
  838. * @req_volt: micbias voltage to be set
  839. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  840. *
  841. * return 0 if adjustment is success or error code in case of failure
  842. */
  843. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  844. int req_volt, int micb_num)
  845. {
  846. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  847. int cur_vout_ctl, req_vout_ctl;
  848. int micb_reg, micb_val, micb_en;
  849. int ret = 0;
  850. switch (micb_num) {
  851. case MIC_BIAS_1:
  852. micb_reg = WCD937X_ANA_MICB1;
  853. break;
  854. case MIC_BIAS_2:
  855. micb_reg = WCD937X_ANA_MICB2;
  856. break;
  857. case MIC_BIAS_3:
  858. micb_reg = WCD937X_ANA_MICB3;
  859. break;
  860. default:
  861. return -EINVAL;
  862. }
  863. mutex_lock(&wcd937x->micb_lock);
  864. /*
  865. * If requested micbias voltage is same as current micbias
  866. * voltage, then just return. Otherwise, adjust voltage as
  867. * per requested value. If micbias is already enabled, then
  868. * to avoid slow micbias ramp-up or down enable pull-up
  869. * momentarily, change the micbias value and then re-enable
  870. * micbias.
  871. */
  872. micb_val = snd_soc_read(codec, micb_reg);
  873. micb_en = (micb_val & 0xC0) >> 6;
  874. cur_vout_ctl = micb_val & 0x3F;
  875. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  876. if (req_vout_ctl < 0) {
  877. ret = -EINVAL;
  878. goto exit;
  879. }
  880. if (cur_vout_ctl == req_vout_ctl) {
  881. ret = 0;
  882. goto exit;
  883. }
  884. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  885. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  886. req_volt, micb_en);
  887. if (micb_en == 0x1)
  888. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  889. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  890. if (micb_en == 0x1) {
  891. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  892. /*
  893. * Add 2ms delay as per HW requirement after enabling
  894. * micbias
  895. */
  896. usleep_range(2000, 2100);
  897. }
  898. exit:
  899. mutex_unlock(&wcd937x->micb_lock);
  900. return ret;
  901. }
  902. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  903. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  904. struct snd_kcontrol *kcontrol,
  905. int event)
  906. {
  907. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  908. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  909. int ret = 0;
  910. switch (event) {
  911. case SND_SOC_DAPM_PRE_PMU:
  912. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  913. wcd937x->tx_swr_dev->dev_num,
  914. true);
  915. break;
  916. case SND_SOC_DAPM_POST_PMD:
  917. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  918. wcd937x->tx_swr_dev->dev_num,
  919. false);
  920. break;
  921. };
  922. return ret;
  923. }
  924. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  925. struct snd_kcontrol *kcontrol,
  926. int event){
  927. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  928. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  929. w->name, event);
  930. switch (event) {
  931. case SND_SOC_DAPM_PRE_PMU:
  932. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  933. 0x80, 0x80);
  934. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  935. 0x08, 0x08);
  936. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  937. 0x10, 0x10);
  938. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), true);
  939. break;
  940. case SND_SOC_DAPM_POST_PMD:
  941. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), false);
  942. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  943. 0x08, 0x00);
  944. break;
  945. };
  946. return 0;
  947. }
  948. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  949. struct snd_kcontrol *kcontrol, int event)
  950. {
  951. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  952. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  953. w->name, event);
  954. switch (event) {
  955. case SND_SOC_DAPM_PRE_PMU:
  956. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  957. 0x02, 0x02);
  958. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  959. 0x00);
  960. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  961. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  962. 0x30, 0x30);
  963. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  964. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  965. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x80, 0x80);
  966. break;
  967. case SND_SOC_DAPM_POST_PMD:
  968. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  969. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  970. 0x10, 0x00);
  971. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  972. 0x10, 0x00);
  973. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  974. 0x80, 0x00);
  975. break;
  976. };
  977. return 0;
  978. }
  979. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  980. int micb_num, int req, bool is_dapm)
  981. {
  982. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  983. int micb_index = micb_num - 1;
  984. u16 micb_reg;
  985. int pre_off_event = 0, post_off_event = 0;
  986. int post_on_event = 0, post_dapm_off = 0;
  987. int post_dapm_on = 0;
  988. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  989. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  990. __func__, micb_index);
  991. return -EINVAL;
  992. }
  993. switch (micb_num) {
  994. case MIC_BIAS_1:
  995. micb_reg = WCD937X_ANA_MICB1;
  996. break;
  997. case MIC_BIAS_2:
  998. micb_reg = WCD937X_ANA_MICB2;
  999. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1000. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1001. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1002. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1003. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1004. break;
  1005. case MIC_BIAS_3:
  1006. micb_reg = WCD937X_ANA_MICB3;
  1007. break;
  1008. default:
  1009. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  1010. __func__, micb_num);
  1011. return -EINVAL;
  1012. };
  1013. mutex_lock(&wcd937x->micb_lock);
  1014. switch (req) {
  1015. case MICB_PULLUP_ENABLE:
  1016. wcd937x->pullup_ref[micb_index]++;
  1017. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  1018. (wcd937x->micb_ref[micb_index] == 0))
  1019. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1020. break;
  1021. case MICB_PULLUP_DISABLE:
  1022. if (wcd937x->pullup_ref[micb_index] > 0)
  1023. wcd937x->pullup_ref[micb_index]--;
  1024. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  1025. (wcd937x->micb_ref[micb_index] == 0))
  1026. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1027. break;
  1028. case MICB_ENABLE:
  1029. wcd937x->micb_ref[micb_index]++;
  1030. if (wcd937x->micb_ref[micb_index] == 1) {
  1031. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  1032. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1033. snd_soc_update_bits(codec, WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  1034. snd_soc_update_bits(codec, WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  1035. snd_soc_update_bits(codec, WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  1036. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  1037. if (post_on_event && wcd937x->mbhc)
  1038. blocking_notifier_call_chain(
  1039. &wcd937x->mbhc->notifier, post_on_event,
  1040. &wcd937x->mbhc->wcd_mbhc);
  1041. }
  1042. if (is_dapm && post_dapm_on && wcd937x->mbhc)
  1043. blocking_notifier_call_chain(
  1044. &wcd937x->mbhc->notifier, post_dapm_on,
  1045. &wcd937x->mbhc->wcd_mbhc);
  1046. break;
  1047. case MICB_DISABLE:
  1048. if (wcd937x->micb_ref[micb_index] > 0)
  1049. wcd937x->micb_ref[micb_index]--;
  1050. if ((wcd937x->micb_ref[micb_index] == 0) &&
  1051. (wcd937x->pullup_ref[micb_index] > 0))
  1052. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1053. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  1054. (wcd937x->pullup_ref[micb_index] == 0)) {
  1055. if (pre_off_event && wcd937x->mbhc)
  1056. blocking_notifier_call_chain(
  1057. &wcd937x->mbhc->notifier, pre_off_event,
  1058. &wcd937x->mbhc->wcd_mbhc);
  1059. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1060. if (post_off_event && wcd937x->mbhc)
  1061. blocking_notifier_call_chain(
  1062. &wcd937x->mbhc->notifier,
  1063. post_off_event,
  1064. &wcd937x->mbhc->wcd_mbhc);
  1065. }
  1066. if (is_dapm && post_dapm_off && wcd937x->mbhc)
  1067. blocking_notifier_call_chain(
  1068. &wcd937x->mbhc->notifier, post_dapm_off,
  1069. &wcd937x->mbhc->wcd_mbhc);
  1070. break;
  1071. };
  1072. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1073. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1074. wcd937x->pullup_ref[micb_index]);
  1075. mutex_unlock(&wcd937x->micb_lock);
  1076. return 0;
  1077. }
  1078. EXPORT_SYMBOL(wcd937x_micbias_control);
  1079. static int wcd937x_get_logical_addr(struct swr_device *swr_dev)
  1080. {
  1081. int ret = 0;
  1082. uint8_t devnum = 0;
  1083. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1084. if (ret) {
  1085. dev_err(&swr_dev->dev,
  1086. "%s get devnum %d for dev addr %lx failed\n",
  1087. __func__, devnum, swr_dev->addr);
  1088. swr_remove_device(swr_dev);
  1089. return ret;
  1090. }
  1091. swr_dev->dev_num = devnum;
  1092. return 0;
  1093. }
  1094. static int wcd937x_event_notify(struct notifier_block *block,
  1095. unsigned long val,
  1096. void *data)
  1097. {
  1098. u16 event = (val & 0xffff);
  1099. u16 amic = (val >> 0x10);
  1100. u16 mask = 0x40, reg = 0x0;
  1101. int ret = 0;
  1102. struct wcd937x_priv *wcd937x = dev_get_drvdata((struct device *)data);
  1103. struct snd_soc_codec *codec = wcd937x->codec;
  1104. struct wcd_mbhc *mbhc;
  1105. switch (event) {
  1106. case BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR:
  1107. if (amic == 0x1 || amic == 0x2)
  1108. reg = WCD937X_ANA_TX_CH2;
  1109. else if (amic == 0x3)
  1110. reg = WCD937X_ANA_TX_CH3_HPF;
  1111. else
  1112. return 0;
  1113. if (amic == 0x2)
  1114. mask = 0x20;
  1115. snd_soc_update_bits(codec, reg, mask, 0x00);
  1116. break;
  1117. case BOLERO_WCD_EVT_SSR_DOWN:
  1118. wcd937x_reset_low(wcd937x->dev);
  1119. break;
  1120. case BOLERO_WCD_EVT_SSR_UP:
  1121. wcd937x_reset(wcd937x->dev);
  1122. wcd937x_get_logical_addr(wcd937x->tx_swr_dev);
  1123. wcd937x_get_logical_addr(wcd937x->rx_swr_dev);
  1124. regcache_mark_dirty(wcd937x->regmap);
  1125. regcache_sync(wcd937x->regmap);
  1126. /* Initialize MBHC module */
  1127. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1128. ret = wcd937x_mbhc_post_ssr_init(wcd937x->mbhc, codec);
  1129. if (ret) {
  1130. dev_err(codec->dev, "%s: mbhc initialization failed\n",
  1131. __func__);
  1132. } else {
  1133. wcd937x_mbhc_hs_detect(codec, mbhc->mbhc_cfg);
  1134. }
  1135. break;
  1136. default:
  1137. dev_err(codec->dev, "%s: invalid event %d\n", __func__, event);
  1138. break;
  1139. }
  1140. return 0;
  1141. }
  1142. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1143. int event)
  1144. {
  1145. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1146. int micb_num;
  1147. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  1148. __func__, w->name, event);
  1149. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1150. micb_num = MIC_BIAS_1;
  1151. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1152. micb_num = MIC_BIAS_2;
  1153. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1154. micb_num = MIC_BIAS_3;
  1155. else
  1156. return -EINVAL;
  1157. switch (event) {
  1158. case SND_SOC_DAPM_PRE_PMU:
  1159. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  1160. break;
  1161. case SND_SOC_DAPM_POST_PMU:
  1162. usleep_range(1000, 1100);
  1163. break;
  1164. case SND_SOC_DAPM_POST_PMD:
  1165. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  1166. break;
  1167. };
  1168. return 0;
  1169. }
  1170. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1171. struct snd_kcontrol *kcontrol,
  1172. int event)
  1173. {
  1174. return __wcd937x_codec_enable_micbias(w, event);
  1175. }
  1176. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1177. struct snd_ctl_elem_value *ucontrol)
  1178. {
  1179. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1180. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1181. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1182. return 0;
  1183. }
  1184. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1185. struct snd_ctl_elem_value *ucontrol)
  1186. {
  1187. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1188. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1189. u32 mode_val;
  1190. mode_val = ucontrol->value.enumerated.item[0];
  1191. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  1192. if (mode_val == 0) {
  1193. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1194. __func__);
  1195. mode_val = 3; /* enum will be updated later */
  1196. }
  1197. wcd937x->hph_mode = mode_val;
  1198. return 0;
  1199. }
  1200. static int wcd937x_get_compander(struct snd_kcontrol *kcontrol,
  1201. struct snd_ctl_elem_value *ucontrol)
  1202. {
  1203. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1204. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1205. bool hphr;
  1206. struct soc_multi_mixer_control *mc;
  1207. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1208. hphr = mc->shift;
  1209. ucontrol->value.integer.value[0] = hphr ? wcd937x->comp2_enable :
  1210. wcd937x->comp1_enable;
  1211. return 0;
  1212. }
  1213. static int wcd937x_set_compander(struct snd_kcontrol *kcontrol,
  1214. struct snd_ctl_elem_value *ucontrol)
  1215. {
  1216. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1217. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1218. int value = ucontrol->value.integer.value[0];
  1219. bool hphr;
  1220. struct soc_multi_mixer_control *mc;
  1221. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1222. hphr = mc->shift;
  1223. if (hphr)
  1224. wcd937x->comp2_enable = value;
  1225. else
  1226. wcd937x->comp1_enable = value;
  1227. return 0;
  1228. }
  1229. static int wcd937x_codec_enable_vdd_buck(struct snd_soc_dapm_widget *w,
  1230. struct snd_kcontrol *kcontrol,
  1231. int event)
  1232. {
  1233. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1234. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1235. struct wcd937x_pdata *pdata = NULL;
  1236. int ret = 0;
  1237. pdata = dev_get_platdata(wcd937x->dev);
  1238. if (!pdata) {
  1239. dev_err(codec->dev, "%s: pdata is NULL\n", __func__);
  1240. return -EINVAL;
  1241. }
  1242. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  1243. w->name, event);
  1244. switch (event) {
  1245. case SND_SOC_DAPM_PRE_PMU:
  1246. ret = msm_cdc_enable_ondemand_supply(wcd937x->dev,
  1247. wcd937x->supplies,
  1248. pdata->regulator,
  1249. pdata->num_supplies,
  1250. "cdc-vdd-buck");
  1251. if (ret == -EINVAL) {
  1252. dev_err(codec->dev, "%s: vdd buck is not enabled\n",
  1253. __func__);
  1254. return ret;
  1255. }
  1256. /*
  1257. * 200us sleep is required after LDO15 is enabled as per
  1258. * HW requirement
  1259. */
  1260. usleep_range(200, 250);
  1261. break;
  1262. case SND_SOC_DAPM_POST_PMD:
  1263. ret = msm_cdc_disable_ondemand_supply(wcd937x->dev,
  1264. wcd937x->supplies,
  1265. pdata->regulator,
  1266. pdata->num_supplies,
  1267. "cdc-vdd-buck");
  1268. if (ret == -EINVAL) {
  1269. dev_err(codec->dev, "%s: vdd buck is not enabled\n",
  1270. __func__);
  1271. return ret;
  1272. }
  1273. break;
  1274. }
  1275. return 0;
  1276. }
  1277. static const char * const rx_hph_mode_mux_text[] = {
  1278. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1279. "CLS_H_ULP", "CLS_AB_HIFI",
  1280. };
  1281. static const struct soc_enum rx_hph_mode_mux_enum =
  1282. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1283. rx_hph_mode_mux_text);
  1284. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1285. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1286. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1287. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1288. wcd937x_get_compander, wcd937x_set_compander),
  1289. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1290. wcd937x_get_compander, wcd937x_set_compander),
  1291. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1292. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1293. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  1294. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  1295. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  1296. };
  1297. static const struct snd_kcontrol_new adc1_switch[] = {
  1298. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1299. };
  1300. static const struct snd_kcontrol_new adc2_switch[] = {
  1301. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1302. };
  1303. static const struct snd_kcontrol_new adc3_switch[] = {
  1304. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1305. };
  1306. static const struct snd_kcontrol_new dmic1_switch[] = {
  1307. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1308. };
  1309. static const struct snd_kcontrol_new dmic2_switch[] = {
  1310. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1311. };
  1312. static const struct snd_kcontrol_new dmic3_switch[] = {
  1313. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1314. };
  1315. static const struct snd_kcontrol_new dmic4_switch[] = {
  1316. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1317. };
  1318. static const struct snd_kcontrol_new dmic5_switch[] = {
  1319. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1320. };
  1321. static const struct snd_kcontrol_new dmic6_switch[] = {
  1322. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1323. };
  1324. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1325. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1326. };
  1327. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1328. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1329. };
  1330. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1331. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1332. };
  1333. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1334. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1335. };
  1336. static const char * const adc2_mux_text[] = {
  1337. "INP2", "INP3"
  1338. };
  1339. static const char * const rdac3_mux_text[] = {
  1340. "RX1", "RX3"
  1341. };
  1342. static const struct soc_enum adc2_enum =
  1343. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1344. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1345. static const struct soc_enum rdac3_enum =
  1346. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1347. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1348. static const struct snd_kcontrol_new tx_adc2_mux =
  1349. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1350. static const struct snd_kcontrol_new rx_rdac3_mux =
  1351. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1352. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1353. /*input widgets*/
  1354. SND_SOC_DAPM_INPUT("AMIC1"),
  1355. SND_SOC_DAPM_INPUT("AMIC2"),
  1356. SND_SOC_DAPM_INPUT("AMIC3"),
  1357. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1358. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1359. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1360. /*tx widgets*/
  1361. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1362. wcd937x_codec_enable_adc,
  1363. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1364. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1365. wcd937x_codec_enable_adc,
  1366. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1367. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1368. NULL, 0, wcd937x_enable_req,
  1369. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1370. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1371. NULL, 0, wcd937x_enable_req,
  1372. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1373. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1374. &tx_adc2_mux),
  1375. /*tx mixers*/
  1376. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1377. adc1_switch, ARRAY_SIZE(adc1_switch),
  1378. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1379. SND_SOC_DAPM_POST_PMD),
  1380. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1381. adc2_switch, ARRAY_SIZE(adc2_switch),
  1382. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1383. SND_SOC_DAPM_POST_PMD),
  1384. /* micbias widgets*/
  1385. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1386. wcd937x_codec_enable_micbias,
  1387. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1388. SND_SOC_DAPM_POST_PMD),
  1389. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1390. wcd937x_codec_enable_micbias,
  1391. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1392. SND_SOC_DAPM_POST_PMD),
  1393. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1394. wcd937x_codec_enable_micbias,
  1395. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1396. SND_SOC_DAPM_POST_PMD),
  1397. SND_SOC_DAPM_SUPPLY("VDD_BUCK", SND_SOC_NOPM, 0, 0,
  1398. wcd937x_codec_enable_vdd_buck,
  1399. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1400. /*rx widgets*/
  1401. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1402. wcd937x_codec_enable_ear_pa,
  1403. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1404. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1405. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1406. wcd937x_codec_enable_aux_pa,
  1407. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1408. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1409. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1410. wcd937x_codec_enable_hphl_pa,
  1411. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1412. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1413. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1414. wcd937x_codec_enable_hphr_pa,
  1415. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1416. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1417. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1418. wcd937x_codec_hphl_dac_event,
  1419. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1420. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1421. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1422. wcd937x_codec_hphr_dac_event,
  1423. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1424. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1425. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1426. wcd937x_codec_ear_dac_event,
  1427. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1428. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1429. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1430. wcd937x_codec_aux_dac_event,
  1431. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1432. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1433. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1434. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1435. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1436. SND_SOC_DAPM_POST_PMD),
  1437. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1438. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1439. SND_SOC_DAPM_POST_PMD),
  1440. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1441. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1442. SND_SOC_DAPM_POST_PMD),
  1443. /* rx mixer widgets*/
  1444. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1445. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1446. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1447. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1448. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1449. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1450. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1451. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1452. /*output widgets tx*/
  1453. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1454. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1455. /*output widgets rx*/
  1456. SND_SOC_DAPM_OUTPUT("EAR"),
  1457. SND_SOC_DAPM_OUTPUT("AUX"),
  1458. SND_SOC_DAPM_OUTPUT("HPHL"),
  1459. SND_SOC_DAPM_OUTPUT("HPHR"),
  1460. };
  1461. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1462. /*input widgets*/
  1463. SND_SOC_DAPM_INPUT("AMIC4"),
  1464. /*tx widgets*/
  1465. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1466. wcd937x_codec_enable_adc,
  1467. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1468. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1469. NULL, 0, wcd937x_enable_req,
  1470. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1471. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1472. wcd937x_codec_enable_dmic,
  1473. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1474. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1475. wcd937x_codec_enable_dmic,
  1476. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1477. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1478. wcd937x_codec_enable_dmic,
  1479. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1480. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1481. wcd937x_codec_enable_dmic,
  1482. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1483. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1484. wcd937x_codec_enable_dmic,
  1485. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1486. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1487. wcd937x_codec_enable_dmic,
  1488. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1489. /*tx mixer widgets*/
  1490. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1491. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1492. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1493. SND_SOC_DAPM_POST_PMD),
  1494. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1495. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1496. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1497. SND_SOC_DAPM_POST_PMD),
  1498. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1499. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1500. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1501. SND_SOC_DAPM_POST_PMD),
  1502. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1503. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1504. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1505. SND_SOC_DAPM_POST_PMD),
  1506. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1507. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1508. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1509. SND_SOC_DAPM_POST_PMD),
  1510. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1511. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1512. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1513. SND_SOC_DAPM_POST_PMD),
  1514. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1515. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1516. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1517. /*output widgets*/
  1518. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1519. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1520. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1521. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1522. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1523. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1524. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1525. };
  1526. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1527. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1528. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1529. {"ADC1 REQ", NULL, "ADC1"},
  1530. {"ADC1", NULL, "AMIC1"},
  1531. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1532. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1533. {"ADC2 REQ", NULL, "ADC2"},
  1534. {"ADC2", NULL, "ADC2 MUX"},
  1535. {"ADC2 MUX", "INP3", "AMIC3"},
  1536. {"ADC2 MUX", "INP2", "AMIC2"},
  1537. {"RX1", NULL, "IN1_HPHL"},
  1538. {"RDAC1", NULL, "RX1"},
  1539. {"HPHL_RDAC", "Switch", "RDAC1"},
  1540. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1541. {"HPHL", NULL, "HPHL PGA"},
  1542. {"RX2", NULL, "IN2_HPHR"},
  1543. {"RDAC2", NULL, "RX2"},
  1544. {"HPHR_RDAC", "Switch", "RDAC2"},
  1545. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1546. {"HPHR", NULL, "HPHR PGA"},
  1547. {"RX3", NULL, "IN3_AUX"},
  1548. {"RDAC4", NULL, "RX3"},
  1549. {"AUX_RDAC", "Switch", "RDAC4"},
  1550. {"AUX PGA", NULL, "AUX_RDAC"},
  1551. {"AUX", NULL, "AUX PGA"},
  1552. {"RDAC3_MUX", "RX3", "RX3"},
  1553. {"RDAC3_MUX", "RX1", "RX1"},
  1554. {"RDAC3", NULL, "RDAC3_MUX"},
  1555. {"EAR_RDAC", "Switch", "RDAC3"},
  1556. {"EAR PGA", NULL, "EAR_RDAC"},
  1557. {"EAR", NULL, "EAR PGA"},
  1558. {"EAR", NULL, "VDD_BUCK"},
  1559. {"HPHR", NULL, "VDD_BUCK"},
  1560. {"HPHL", NULL, "VDD_BUCK"},
  1561. {"AUX", NULL, "VDD_BUCK"},
  1562. };
  1563. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1564. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1565. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1566. {"ADC3 REQ", NULL, "ADC3"},
  1567. {"ADC3", NULL, "AMIC4"},
  1568. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1569. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1570. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1571. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1572. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1573. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1574. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1575. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1576. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1577. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1578. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1579. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1580. };
  1581. static ssize_t wcd937x_version_read(struct snd_info_entry *entry,
  1582. void *file_private_data,
  1583. struct file *file,
  1584. char __user *buf, size_t count,
  1585. loff_t pos)
  1586. {
  1587. struct wcd937x_priv *priv;
  1588. char buffer[WCD937X_VERSION_ENTRY_SIZE];
  1589. int len = 0;
  1590. priv = (struct wcd937x_priv *) entry->private_data;
  1591. if (!priv) {
  1592. pr_err("%s: wcd937x priv is null\n", __func__);
  1593. return -EINVAL;
  1594. }
  1595. switch (priv->version) {
  1596. case WCD937X_VERSION_1_0:
  1597. len = snprintf(buffer, sizeof(buffer), "WCD937X_1_0\n");
  1598. break;
  1599. default:
  1600. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1601. }
  1602. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1603. }
  1604. static struct snd_info_entry_ops wcd937x_info_ops = {
  1605. .read = wcd937x_version_read,
  1606. };
  1607. /*
  1608. * wcd937x_info_create_codec_entry - creates wcd937x module
  1609. * @codec_root: The parent directory
  1610. * @codec: Codec instance
  1611. *
  1612. * Creates wcd937x module and version entry under the given
  1613. * parent directory.
  1614. *
  1615. * Return: 0 on success or negative error code on failure.
  1616. */
  1617. int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  1618. struct snd_soc_codec *codec)
  1619. {
  1620. struct snd_info_entry *version_entry;
  1621. struct wcd937x_priv *priv;
  1622. struct snd_soc_card *card;
  1623. if (!codec_root || !codec)
  1624. return -EINVAL;
  1625. priv = snd_soc_codec_get_drvdata(codec);
  1626. if (priv->entry) {
  1627. dev_dbg(priv->dev,
  1628. "%s:wcd937x module already created\n", __func__);
  1629. return 0;
  1630. }
  1631. card = codec->component.card;
  1632. priv->entry = snd_info_create_subdir(codec_root->module,
  1633. "wcd937x", codec_root);
  1634. if (!priv->entry) {
  1635. dev_dbg(codec->dev, "%s: failed to create wcd937x entry\n",
  1636. __func__);
  1637. return -ENOMEM;
  1638. }
  1639. version_entry = snd_info_create_card_entry(card->snd_card,
  1640. "version",
  1641. priv->entry);
  1642. if (!version_entry) {
  1643. dev_dbg(codec->dev, "%s: failed to create wcd937x version entry\n",
  1644. __func__);
  1645. return -ENOMEM;
  1646. }
  1647. version_entry->private_data = priv;
  1648. version_entry->size = WCD937X_VERSION_ENTRY_SIZE;
  1649. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1650. version_entry->c.ops = &wcd937x_info_ops;
  1651. if (snd_info_register(version_entry) < 0) {
  1652. snd_info_free_entry(version_entry);
  1653. return -ENOMEM;
  1654. }
  1655. priv->version_entry = version_entry;
  1656. return 0;
  1657. }
  1658. EXPORT_SYMBOL(wcd937x_info_create_codec_entry);
  1659. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1660. {
  1661. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1662. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1663. int variant;
  1664. int ret = -EINVAL;
  1665. dev_info(codec->dev, "%s()\n", __func__);
  1666. wcd937x = snd_soc_codec_get_drvdata(codec);
  1667. if (!wcd937x)
  1668. return -EINVAL;
  1669. wcd937x->codec = codec;
  1670. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1671. wcd937x->variant = variant;
  1672. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1673. sizeof(*(wcd937x->fw_data)),
  1674. GFP_KERNEL);
  1675. if (!wcd937x->fw_data) {
  1676. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1677. ret = -ENOMEM;
  1678. goto err;
  1679. }
  1680. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1681. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1682. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1683. if (ret < 0) {
  1684. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1685. goto err_hwdep;
  1686. }
  1687. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1688. if (ret) {
  1689. pr_err("%s: mbhc initialization failed\n", __func__);
  1690. goto err_hwdep;
  1691. }
  1692. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1693. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1694. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1695. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1696. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1697. snd_soc_dapm_ignore_suspend(dapm, "IN3_AUX");
  1698. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1699. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1700. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1701. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  1702. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1703. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1704. snd_soc_dapm_sync(dapm);
  1705. wcd937x_init_reg(codec);
  1706. if (wcd937x->variant == WCD9375_VARIANT) {
  1707. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1708. ARRAY_SIZE(wcd9375_dapm_widgets));
  1709. if (ret < 0) {
  1710. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1711. __func__);
  1712. goto err_hwdep;
  1713. }
  1714. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1715. ARRAY_SIZE(wcd9375_audio_map));
  1716. if (ret < 0) {
  1717. dev_err(codec->dev, "%s: Failed to add routes\n",
  1718. __func__);
  1719. goto err_hwdep;
  1720. }
  1721. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  1722. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1723. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1724. snd_soc_dapm_ignore_suspend(dapm, "DMIC3_OUTPUT");
  1725. snd_soc_dapm_ignore_suspend(dapm, "DMIC4_OUTPUT");
  1726. snd_soc_dapm_ignore_suspend(dapm, "DMIC5_OUTPUT");
  1727. snd_soc_dapm_ignore_suspend(dapm, "DMIC6_OUTPUT");
  1728. snd_soc_dapm_ignore_suspend(dapm, "ADC3_OUTPUT");
  1729. snd_soc_dapm_sync(dapm);
  1730. }
  1731. wcd937x->version = WCD937X_VERSION_1_0;
  1732. /* Register event notifier */
  1733. wcd937x->nblock.notifier_call = wcd937x_event_notify;
  1734. if (wcd937x->register_notifier) {
  1735. ret = wcd937x->register_notifier(wcd937x->handle,
  1736. &wcd937x->nblock,
  1737. true);
  1738. if (ret) {
  1739. dev_err(codec->dev,
  1740. "%s: Failed to register notifier %d\n",
  1741. __func__, ret);
  1742. return ret;
  1743. }
  1744. }
  1745. return ret;
  1746. err_hwdep:
  1747. wcd937x->fw_data = NULL;
  1748. err:
  1749. return ret;
  1750. }
  1751. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1752. {
  1753. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1754. if (!wcd937x)
  1755. return -EINVAL;
  1756. if (wcd937x->register_notifier)
  1757. return wcd937x->register_notifier(wcd937x->handle,
  1758. &wcd937x->nblock,
  1759. false);
  1760. return 0;
  1761. }
  1762. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1763. {
  1764. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1765. return wcd937x->regmap;
  1766. }
  1767. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1768. .probe = wcd937x_soc_codec_probe,
  1769. .remove = wcd937x_soc_codec_remove,
  1770. .get_regmap = wcd937x_get_regmap,
  1771. .component_driver = {
  1772. .controls = wcd937x_snd_controls,
  1773. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1774. .dapm_widgets = wcd937x_dapm_widgets,
  1775. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1776. .dapm_routes = wcd937x_audio_map,
  1777. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1778. },
  1779. };
  1780. static int wcd937x_reset(struct device *dev)
  1781. {
  1782. struct wcd937x_priv *wcd937x = NULL;
  1783. int rc = 0;
  1784. int value = 0;
  1785. if (!dev)
  1786. return -ENODEV;
  1787. wcd937x = dev_get_drvdata(dev);
  1788. if (!wcd937x)
  1789. return -EINVAL;
  1790. if (!wcd937x->rst_np) {
  1791. dev_err(dev, "%s: reset gpio device node not specified\n",
  1792. __func__);
  1793. return -EINVAL;
  1794. }
  1795. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1796. if (value > 0)
  1797. return 0;
  1798. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1799. if (rc) {
  1800. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1801. __func__);
  1802. return rc;
  1803. }
  1804. /* 20ms sleep required after pulling the reset gpio to LOW */
  1805. usleep_range(20, 30);
  1806. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1807. if (rc) {
  1808. dev_err(dev, "%s: wcd active state request fail!\n",
  1809. __func__);
  1810. return rc;
  1811. }
  1812. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1813. usleep_range(20, 30);
  1814. return rc;
  1815. }
  1816. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  1817. u32 *val)
  1818. {
  1819. int rc = 0;
  1820. rc = of_property_read_u32(dev->of_node, name, val);
  1821. if (rc)
  1822. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1823. __func__, name, dev->of_node->full_name);
  1824. return rc;
  1825. }
  1826. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  1827. struct wcd937x_micbias_setting *mb)
  1828. {
  1829. u32 prop_val = 0;
  1830. int rc = 0;
  1831. /* MB1 */
  1832. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1833. NULL)) {
  1834. rc = wcd937x_read_of_property_u32(dev,
  1835. "qcom,cdc-micbias1-mv",
  1836. &prop_val);
  1837. if (!rc)
  1838. mb->micb1_mv = prop_val;
  1839. } else {
  1840. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1841. __func__);
  1842. }
  1843. /* MB2 */
  1844. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1845. NULL)) {
  1846. rc = wcd937x_read_of_property_u32(dev,
  1847. "qcom,cdc-micbias2-mv",
  1848. &prop_val);
  1849. if (!rc)
  1850. mb->micb2_mv = prop_val;
  1851. } else {
  1852. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1853. __func__);
  1854. }
  1855. /* MB3 */
  1856. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1857. NULL)) {
  1858. rc = wcd937x_read_of_property_u32(dev,
  1859. "qcom,cdc-micbias3-mv",
  1860. &prop_val);
  1861. if (!rc)
  1862. mb->micb3_mv = prop_val;
  1863. } else {
  1864. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1865. __func__);
  1866. }
  1867. }
  1868. static int wcd937x_reset_low(struct device *dev)
  1869. {
  1870. struct wcd937x_priv *wcd937x = NULL;
  1871. int rc = 0;
  1872. if (!dev)
  1873. return -ENODEV;
  1874. wcd937x = dev_get_drvdata(dev);
  1875. if (!wcd937x)
  1876. return -EINVAL;
  1877. if (!wcd937x->rst_np) {
  1878. dev_err(dev, "%s: reset gpio device node not specified\n",
  1879. __func__);
  1880. return -EINVAL;
  1881. }
  1882. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1883. if (rc) {
  1884. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1885. __func__);
  1886. return rc;
  1887. }
  1888. /* 20ms sleep required after pulling the reset gpio to LOW */
  1889. usleep_range(20, 30);
  1890. return rc;
  1891. }
  1892. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  1893. {
  1894. struct wcd937x_pdata *pdata = NULL;
  1895. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  1896. GFP_KERNEL);
  1897. if (!pdata)
  1898. return NULL;
  1899. pdata->rst_np = of_parse_phandle(dev->of_node,
  1900. "qcom,wcd-rst-gpio-node", 0);
  1901. if (!pdata->rst_np) {
  1902. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1903. __func__, "qcom,wcd-rst-gpio-node",
  1904. dev->of_node->full_name);
  1905. return NULL;
  1906. }
  1907. /* Parse power supplies */
  1908. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1909. &pdata->num_supplies);
  1910. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1911. dev_err(dev, "%s: no power supplies defined for codec\n",
  1912. __func__);
  1913. return NULL;
  1914. }
  1915. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1916. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1917. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  1918. return pdata;
  1919. }
  1920. static int wcd937x_bind(struct device *dev)
  1921. {
  1922. int ret = 0, i = 0;
  1923. struct wcd937x_priv *wcd937x = NULL;
  1924. struct wcd937x_pdata *pdata = NULL;
  1925. struct wcd_ctrl_platform_data *plat_data = NULL;
  1926. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  1927. if (!wcd937x)
  1928. return -ENOMEM;
  1929. dev_set_drvdata(dev, wcd937x);
  1930. pdata = wcd937x_populate_dt_data(dev);
  1931. if (!pdata) {
  1932. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1933. return -EINVAL;
  1934. }
  1935. wcd937x->dev = dev;
  1936. wcd937x->dev->platform_data = pdata;
  1937. wcd937x->rst_np = pdata->rst_np;
  1938. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  1939. pdata->regulator, pdata->num_supplies);
  1940. if (!wcd937x->supplies) {
  1941. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1942. __func__);
  1943. return ret;
  1944. }
  1945. plat_data = dev_get_platdata(dev->parent);
  1946. if (!plat_data) {
  1947. dev_err(dev, "%s: platform data from parent is NULL\n",
  1948. __func__);
  1949. return -EINVAL;
  1950. }
  1951. wcd937x->handle = (void *)plat_data->handle;
  1952. if (!wcd937x->handle) {
  1953. dev_err(dev, "%s: handle is NULL\n", __func__);
  1954. return -EINVAL;
  1955. }
  1956. wcd937x->update_wcd_event = plat_data->update_wcd_event;
  1957. if (!wcd937x->update_wcd_event) {
  1958. dev_err(dev, "%s: update_wcd_event api is null!\n",
  1959. __func__);
  1960. return -EINVAL;
  1961. }
  1962. wcd937x->register_notifier = plat_data->register_notifier;
  1963. if (!wcd937x->register_notifier) {
  1964. dev_err(dev, "%s: register_notifier api is null!\n",
  1965. __func__);
  1966. return -EINVAL;
  1967. }
  1968. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  1969. pdata->regulator,
  1970. pdata->num_supplies);
  1971. if (ret) {
  1972. dev_err(dev, "%s: wcd static supply enable failed!\n",
  1973. __func__);
  1974. return ret;
  1975. }
  1976. wcd937x_reset(dev);
  1977. /*
  1978. * Add 5msec delay to provide sufficient time for
  1979. * soundwire auto enumeration of slave devices as
  1980. * as per HW requirement.
  1981. */
  1982. usleep_range(5000, 5010);
  1983. ret = component_bind_all(dev, wcd937x);
  1984. if (ret) {
  1985. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  1986. __func__, ret);
  1987. return ret;
  1988. }
  1989. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  1990. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  1991. if (ret) {
  1992. dev_err(dev, "Failed to read port mapping\n");
  1993. goto err;
  1994. }
  1995. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  1996. if (!wcd937x->rx_swr_dev) {
  1997. dev_err(dev, "%s: Could not find RX swr slave device\n",
  1998. __func__);
  1999. ret = -ENODEV;
  2000. goto err;
  2001. }
  2002. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2003. if (!wcd937x->tx_swr_dev) {
  2004. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2005. __func__);
  2006. ret = -ENODEV;
  2007. goto err;
  2008. }
  2009. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  2010. &wcd937x_regmap_config);
  2011. if (!wcd937x->regmap) {
  2012. dev_err(dev, "%s: Regmap init failed\n",
  2013. __func__);
  2014. goto err;
  2015. }
  2016. /* Set all interupts as edge triggered */
  2017. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  2018. regmap_write(wcd937x->regmap,
  2019. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  2020. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  2021. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  2022. wcd937x->irq_info.codec_name = "WCD937X";
  2023. wcd937x->irq_info.regmap = wcd937x->regmap;
  2024. wcd937x->irq_info.dev = dev;
  2025. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  2026. if (ret) {
  2027. dev_err(dev, "%s: IRQ init failed: %d\n",
  2028. __func__, ret);
  2029. goto err;
  2030. }
  2031. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  2032. mutex_init(&wcd937x->micb_lock);
  2033. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  2034. NULL, 0);
  2035. if (ret) {
  2036. dev_err(dev, "%s: Codec registration failed\n",
  2037. __func__);
  2038. goto err_irq;
  2039. }
  2040. return ret;
  2041. err_irq:
  2042. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2043. err:
  2044. component_unbind_all(dev, wcd937x);
  2045. return ret;
  2046. }
  2047. static void wcd937x_unbind(struct device *dev)
  2048. {
  2049. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  2050. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2051. snd_soc_unregister_codec(dev);
  2052. component_unbind_all(dev, wcd937x);
  2053. mutex_destroy(&wcd937x->micb_lock);
  2054. }
  2055. static const struct of_device_id wcd937x_dt_match[] = {
  2056. { .compatible = "qcom,wcd937x-codec" },
  2057. {}
  2058. };
  2059. static const struct component_master_ops wcd937x_comp_ops = {
  2060. .bind = wcd937x_bind,
  2061. .unbind = wcd937x_unbind,
  2062. };
  2063. static int wcd937x_compare_of(struct device *dev, void *data)
  2064. {
  2065. return dev->of_node == data;
  2066. }
  2067. static void wcd937x_release_of(struct device *dev, void *data)
  2068. {
  2069. of_node_put(data);
  2070. }
  2071. static int wcd937x_add_slave_components(struct device *dev,
  2072. struct component_match **matchptr)
  2073. {
  2074. struct device_node *np, *rx_node, *tx_node;
  2075. np = dev->of_node;
  2076. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2077. if (!rx_node) {
  2078. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2079. return -ENODEV;
  2080. }
  2081. of_node_get(rx_node);
  2082. component_match_add_release(dev, matchptr,
  2083. wcd937x_release_of,
  2084. wcd937x_compare_of,
  2085. rx_node);
  2086. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2087. if (!tx_node) {
  2088. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2089. return -ENODEV;
  2090. }
  2091. of_node_get(tx_node);
  2092. component_match_add_release(dev, matchptr,
  2093. wcd937x_release_of,
  2094. wcd937x_compare_of,
  2095. tx_node);
  2096. return 0;
  2097. }
  2098. static int wcd937x_probe(struct platform_device *pdev)
  2099. {
  2100. struct component_match *match = NULL;
  2101. int ret;
  2102. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  2103. if (ret)
  2104. return ret;
  2105. return component_master_add_with_match(&pdev->dev,
  2106. &wcd937x_comp_ops, match);
  2107. }
  2108. static int wcd937x_remove(struct platform_device *pdev)
  2109. {
  2110. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  2111. return 0;
  2112. }
  2113. static struct platform_driver wcd937x_codec_driver = {
  2114. .probe = wcd937x_probe,
  2115. .remove = wcd937x_remove,
  2116. .driver = {
  2117. .name = "wcd937x_codec",
  2118. .owner = THIS_MODULE,
  2119. .of_match_table = of_match_ptr(wcd937x_dt_match),
  2120. },
  2121. };
  2122. module_platform_driver(wcd937x_codec_driver);
  2123. MODULE_DESCRIPTION("WCD937X Codec driver");
  2124. MODULE_LICENSE("GPL v2");