cfg_dp.h 50 KB

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  1. /*
  2. * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. /**
  20. * DOC: This file contains definitions of Data Path configuration.
  21. */
  22. #ifndef _CFG_DP_H_
  23. #define _CFG_DP_H_
  24. #include "cfg_define.h"
  25. #include "wlan_init_cfg.h"
  26. #define WLAN_CFG_MAX_CLIENTS 64
  27. #define WLAN_CFG_MAX_CLIENTS_MIN 8
  28. #define WLAN_CFG_MAX_CLIENTS_MAX 64
  29. /* Change this to a lower value to enforce scattered idle list mode */
  30. #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000
  31. #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000
  32. #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000
  33. #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \
  34. defined(QCA_LL_PDEV_TX_FLOW_CONTROL)
  35. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10
  36. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15
  37. #else
  38. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
  39. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
  40. #endif
  41. #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
  42. #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1
  43. #ifdef IPA_OFFLOAD
  44. /* Size of TCL TX Ring */
  45. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  46. #define WLAN_CFG_TX_RING_SIZE 2048
  47. #else
  48. #define WLAN_CFG_TX_RING_SIZE 1024
  49. #endif
  50. #define WLAN_CFG_IPA_TX_RING_SIZE_MIN 1024
  51. #define WLAN_CFG_IPA_TX_RING_SIZE 1024
  52. #define WLAN_CFG_IPA_TX_RING_SIZE_MAX 8096
  53. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN 1024
  54. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE 1024
  55. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX 8096
  56. #ifdef IPA_WDI3_TX_TWO_PIPES
  57. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN 1024
  58. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE 1024
  59. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX 8096
  60. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN 1024
  61. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE 1024
  62. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX 8096
  63. #endif
  64. #define WLAN_CFG_PER_PDEV_TX_RING 0
  65. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048
  66. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000
  67. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024
  68. #else
  69. #define WLAN_CFG_TX_RING_SIZE 512
  70. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  71. #define WLAN_CFG_PER_PDEV_TX_RING 1
  72. #else
  73. #define WLAN_CFG_PER_PDEV_TX_RING 0
  74. #endif
  75. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0
  76. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0
  77. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0
  78. #endif /* IPA_OFFLOAD */
  79. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  80. #define WLAN_CFG_PER_PDEV_RX_RING 0
  81. #define WLAN_CFG_PER_PDEV_LMAC_RING 0
  82. #define WLAN_LRO_ENABLE 0
  83. #ifdef QCA_WIFI_QCA6750
  84. #define WLAN_CFG_MAC_PER_TARGET 1
  85. #else
  86. #define WLAN_CFG_MAC_PER_TARGET 2
  87. #endif
  88. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  89. #define WLAN_CFG_TX_COMP_RING_SIZE 4096
  90. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  91. #define WLAN_CFG_NUM_TX_DESC 4096
  92. #define WLAN_CFG_NUM_TX_EXT_DESC 4096
  93. #else
  94. #define WLAN_CFG_TX_COMP_RING_SIZE 1024
  95. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  96. #define WLAN_CFG_NUM_TX_DESC 1024
  97. #define WLAN_CFG_NUM_TX_EXT_DESC 1024
  98. #endif
  99. /* Interrupt Mitigation - Batch threshold in terms of number of frames */
  100. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
  101. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
  102. /* Interrupt Mitigation - Timer threshold in us */
  103. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
  104. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
  105. #ifdef WLAN_DP_PER_RING_TYPE_CONFIG
  106. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX \
  107. WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING
  108. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX \
  109. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING
  110. #else
  111. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
  112. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
  113. #endif
  114. #endif /* WLAN_MAX_PDEVS */
  115. #ifdef NBUF_MEMORY_DEBUG
  116. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0xFFFF
  117. #else
  118. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0x1FFFF
  119. #endif
  120. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD \
  121. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  122. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN 0
  123. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX 0x200000
  124. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD \
  125. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  126. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN 100
  127. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX 0x200000
  128. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256
  129. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 512
  130. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 0
  131. #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
  132. #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0
  133. #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0
  134. #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1
  135. #define WLAN_CFG_TX_RING_SIZE_MIN 512
  136. #define WLAN_CFG_TX_RING_SIZE_MAX 0x80000
  137. #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512
  138. #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000
  139. #define WLAN_CFG_NUM_TX_DESC_MIN 16
  140. #define WLAN_CFG_NUM_TX_DESC_MAX 0x10000
  141. #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 16
  142. #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000
  143. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
  144. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
  145. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 0
  146. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
  147. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1
  148. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128
  149. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1
  150. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128
  151. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1
  152. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1
  153. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
  154. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 1000
  155. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
  156. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
  157. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8
  158. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000
  159. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8
  160. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 512
  161. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8
  162. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500
  163. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000
  164. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000
  165. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000
  166. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  167. /* Per vdev pools */
  168. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  169. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  170. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  171. #ifdef TX_PER_PDEV_DESC_POOL
  172. #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT
  173. #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT
  174. #else /* TX_PER_PDEV_DESC_POOL */
  175. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  176. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  177. #endif /* TX_PER_PDEV_DESC_POOL */
  178. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  179. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1
  180. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4
  181. #define WLAN_CFG_HTT_PKT_TYPE 2
  182. #define WLAN_CFG_HTT_PKT_TYPE_MIN 2
  183. #define WLAN_CFG_HTT_PKT_TYPE_MAX 2
  184. #define WLAN_CFG_MAX_PEER_ID 64
  185. #define WLAN_CFG_MAX_PEER_ID_MIN 64
  186. #define WLAN_CFG_MAX_PEER_ID_MAX 64
  187. #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
  188. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100
  189. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100
  190. #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
  191. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 1
  192. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX MAX_TCL_DATA_RINGS
  193. #define WLAN_CFG_NUM_TX_COMP_RINGS WLAN_CFG_NUM_TCL_DATA_RINGS
  194. #define WLAN_CFG_NUM_TX_COMP_RINGS_MIN WLAN_CFG_NUM_TCL_DATA_RINGS_MIN
  195. #define WLAN_CFG_NUM_TX_COMP_RINGS_MAX WLAN_CFG_NUM_TCL_DATA_RINGS_MAX
  196. #if defined(CONFIG_BERYLLIUM)
  197. #define WLAN_CFG_NUM_REO_DEST_RING 8
  198. #else
  199. #define WLAN_CFG_NUM_REO_DEST_RING 4
  200. #endif
  201. #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
  202. #define WLAN_CFG_NUM_REO_DEST_RING_MAX MAX_REO_DEST_RINGS
  203. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS 2
  204. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN 1
  205. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX 3
  206. #define WLAN_CFG_NSS_NUM_REO_DEST_RING 2
  207. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN 1
  208. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX 3
  209. #define WLAN_CFG_WBM_RELEASE_RING_SIZE 1024
  210. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64
  211. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 1024
  212. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE 512
  213. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN 32
  214. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX 512
  215. #define WLAN_CFG_TCL_STATUS_RING_SIZE 32
  216. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32
  217. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32
  218. #if defined(QCA_WIFI_QCA6290)
  219. #define WLAN_CFG_REO_DST_RING_SIZE 1024
  220. #else
  221. #define WLAN_CFG_REO_DST_RING_SIZE 2048
  222. #endif
  223. #define WLAN_CFG_REO_DST_RING_SIZE_MIN 8
  224. #define WLAN_CFG_REO_DST_RING_SIZE_MAX 8192
  225. #define WLAN_CFG_REO_REINJECT_RING_SIZE 128
  226. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32
  227. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 128
  228. #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024
  229. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8
  230. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  231. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI)
  232. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024
  233. #else
  234. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 8192
  235. #endif
  236. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 256
  237. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128
  238. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 512
  239. #define WLAN_CFG_REO_CMD_RING_SIZE 128
  240. #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64
  241. #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128
  242. #define WLAN_CFG_REO_STATUS_RING_SIZE 256
  243. #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128
  244. #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048
  245. #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024
  246. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024
  247. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  248. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024
  249. #else
  250. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 4096
  251. #endif
  252. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096
  253. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16
  254. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096
  255. #define WLAN_CFG_TX_DESC_LIMIT_0 0
  256. #define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096
  257. #define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768
  258. #define WLAN_CFG_TX_DESC_LIMIT_1 0
  259. #define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096
  260. #define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768
  261. #define WLAN_CFG_TX_DESC_LIMIT_2 0
  262. #define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096
  263. #define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768
  264. #define WLAN_CFG_TX_DEVICE_LIMIT 65536
  265. #define WLAN_CFG_TX_DEVICE_LIMIT_MIN 16384
  266. #define WLAN_CFG_TX_DEVICE_LIMIT_MAX 65536
  267. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE 1024
  268. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN 128
  269. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX 1024
  270. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
  271. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16
  272. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192
  273. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE 8192
  274. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN 16
  275. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX 8192
  276. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048
  277. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48
  278. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192
  279. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE 2048
  280. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN 48
  281. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX 4096
  282. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
  283. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16
  284. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192
  285. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096
  286. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096
  287. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384
  288. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024
  289. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
  290. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
  291. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE 32
  292. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN 0
  293. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX 256
  294. /**
  295. * Allocate as many RX descriptors as buffers in the SW2RXDMA
  296. * ring. This value may need to be tuned later.
  297. */
  298. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  299. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  300. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  301. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1
  302. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  303. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  304. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 4096
  305. /**
  306. * For low memory AP cases using 1 will reduce the rx descriptors memory req
  307. */
  308. #elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG)
  309. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  310. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  311. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  312. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  313. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  314. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 12288
  315. /**
  316. * AP use cases need to allocate more RX Descriptors than the number of
  317. * entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
  318. * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
  319. * multiplication factor of 3, to allocate three times as many RX descriptors
  320. * as RX buffers.
  321. */
  322. #else
  323. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3
  324. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  325. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  326. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 12288
  327. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 4096
  328. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 12288
  329. #endif
  330. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE 16384
  331. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN 1
  332. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX 16384
  333. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT 128
  334. #define WLAN_CFG_PKTLOG_BUFFER_SIZE 10
  335. #define WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE 1
  336. #define WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE 10
  337. #ifdef IPA_OFFLOAD
  338. #define WLAN_CFG_NUM_REO_RINGS_MAP 0x7
  339. #else
  340. #define WLAN_CFG_NUM_REO_RINGS_MAP 0xF
  341. #endif
  342. #define WLAN_CFG_NUM_REO_RINGS_MAP_MIN 0x1
  343. #if defined(CONFIG_BERYLLIUM)
  344. #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xFF
  345. #else
  346. #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xF
  347. #endif
  348. #define WLAN_CFG_RADIO_0_DEFAULT_REO 0x1
  349. #define WLAN_CFG_RADIO_1_DEFAULT_REO 0x2
  350. #define WLAN_CFG_RADIO_2_DEFAULT_REO 0x3
  351. #define WLAN_CFG_RADIO_DEFAULT_REO_MIN 0x1
  352. #define WLAN_CFG_RADIO_DEFAULT_REO_MAX 0x4
  353. #define WLAN_CFG_REO2PPE_RING_SIZE 1024
  354. #define WLAN_CFG_REO2PPE_RING_SIZE_MIN 64
  355. #define WLAN_CFG_REO2PPE_RING_SIZE_MAX 1024
  356. #define WLAN_CFG_PPE2TCL_RING_SIZE 1024
  357. #define WLAN_CFG_PPE2TCL_RING_SIZE_MIN 64
  358. #define WLAN_CFG_PPE2TCL_RING_SIZE_MAX 1024
  359. #define WLAN_CFG_PPE_RELEASE_RING_SIZE 1024
  360. #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN 64
  361. #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX 1024
  362. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  363. #define WLAN_CFG_MLO_RX_RING_MAP 0xF
  364. #define WLAN_CFG_MLO_RX_RING_MAP_MIN 0x0
  365. #define WLAN_CFG_MLO_RX_RING_MAP_MAX 0xFF
  366. #endif
  367. #define WLAN_CFG_TX_CAPT_MAX_MEM_MIN 0
  368. #define WLAN_CFG_TX_CAPT_MAX_MEM_MAX 512
  369. #define WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT 0
  370. /*
  371. * <ini>
  372. * "dp_tx_capt_max_mem_mb"- maximum memory used by Tx capture
  373. * @Min: 0
  374. * @Max: 512 MB
  375. * @Default: 0 (disabled)
  376. *
  377. * This ini entry is used to set a max limit beyond which frames
  378. * are dropped by Tx capture. User needs to set a non-zero value
  379. * to enable it.
  380. *
  381. * Usage: External
  382. *
  383. * </ini>
  384. */
  385. #define CFG_DP_TX_CAPT_MAX_MEM_MB \
  386. CFG_INI_UINT("dp_tx_capt_max_mem_mb", \
  387. WLAN_CFG_TX_CAPT_MAX_MEM_MIN, \
  388. WLAN_CFG_TX_CAPT_MAX_MEM_MAX, \
  389. WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT, \
  390. CFG_VALUE_OR_DEFAULT, "Max Memory (in MB) used by Tx Capture")
  391. /* DP INI Declarations */
  392. #define CFG_DP_HTT_PACKET_TYPE \
  393. CFG_INI_UINT("dp_htt_packet_type", \
  394. WLAN_CFG_HTT_PKT_TYPE_MIN, \
  395. WLAN_CFG_HTT_PKT_TYPE_MAX, \
  396. WLAN_CFG_HTT_PKT_TYPE, \
  397. CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
  398. #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
  399. CFG_INI_UINT("dp_int_batch_threshold_other", \
  400. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
  401. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
  402. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
  403. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other")
  404. #define CFG_DP_INT_BATCH_THRESHOLD_RX \
  405. CFG_INI_UINT("dp_int_batch_threshold_rx", \
  406. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \
  407. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \
  408. WLAN_CFG_INT_BATCH_THRESHOLD_RX, \
  409. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx")
  410. #define CFG_DP_INT_BATCH_THRESHOLD_TX \
  411. CFG_INI_UINT("dp_int_batch_threshold_tx", \
  412. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \
  413. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \
  414. WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
  415. CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
  416. #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
  417. CFG_INI_UINT("dp_int_timer_threshold_other", \
  418. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
  419. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
  420. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
  421. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
  422. #define CFG_DP_INT_TIMER_THRESHOLD_RX \
  423. CFG_INI_UINT("dp_int_timer_threshold_rx", \
  424. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \
  425. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \
  426. WLAN_CFG_INT_TIMER_THRESHOLD_RX, \
  427. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
  428. #define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \
  429. CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \
  430. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \
  431. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \
  432. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \
  433. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring")
  434. #define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \
  435. CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \
  436. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \
  437. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \
  438. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \
  439. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring")
  440. #define CFG_DP_INT_TIMER_THRESHOLD_TX \
  441. CFG_INI_UINT("dp_int_timer_threshold_tx", \
  442. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \
  443. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \
  444. WLAN_CFG_INT_TIMER_THRESHOLD_TX, \
  445. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
  446. #define CFG_DP_MAX_ALLOC_SIZE \
  447. CFG_INI_UINT("dp_max_alloc_size", \
  448. WLAN_CFG_MAX_ALLOC_SIZE_MIN, \
  449. WLAN_CFG_MAX_ALLOC_SIZE_MAX, \
  450. WLAN_CFG_MAX_ALLOC_SIZE, \
  451. CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
  452. #define CFG_DP_MAX_CLIENTS \
  453. CFG_INI_UINT("dp_max_clients", \
  454. WLAN_CFG_MAX_CLIENTS_MIN, \
  455. WLAN_CFG_MAX_CLIENTS_MAX, \
  456. WLAN_CFG_MAX_CLIENTS, \
  457. CFG_VALUE_OR_DEFAULT, "DP Max Clients")
  458. #define CFG_DP_MAX_PEER_ID \
  459. CFG_INI_UINT("dp_max_peer_id", \
  460. WLAN_CFG_MAX_PEER_ID_MIN, \
  461. WLAN_CFG_MAX_PEER_ID_MAX, \
  462. WLAN_CFG_MAX_PEER_ID, \
  463. CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
  464. #define CFG_DP_REO_DEST_RINGS \
  465. CFG_INI_UINT("dp_reo_dest_rings", \
  466. WLAN_CFG_NUM_REO_DEST_RING_MIN, \
  467. WLAN_CFG_NUM_REO_DEST_RING_MAX, \
  468. WLAN_CFG_NUM_REO_DEST_RING, \
  469. CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
  470. #define CFG_DP_TX_COMP_RINGS \
  471. CFG_INI_UINT("dp_tx_comp_rings", \
  472. WLAN_CFG_NUM_TX_COMP_RINGS_MIN, \
  473. WLAN_CFG_NUM_TX_COMP_RINGS_MAX, \
  474. WLAN_CFG_NUM_TX_COMP_RINGS, \
  475. CFG_VALUE_OR_DEFAULT, "DP Tx Comp Rings")
  476. #define CFG_DP_TCL_DATA_RINGS \
  477. CFG_INI_UINT("dp_tcl_data_rings", \
  478. WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \
  479. WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \
  480. WLAN_CFG_NUM_TCL_DATA_RINGS, \
  481. CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
  482. #define CFG_DP_NSS_REO_DEST_RINGS \
  483. CFG_INI_UINT("dp_nss_reo_dest_rings", \
  484. WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN, \
  485. WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX, \
  486. WLAN_CFG_NSS_NUM_REO_DEST_RING, \
  487. CFG_VALUE_OR_DEFAULT, "DP NSS REO Destination Rings")
  488. #define CFG_DP_NSS_TCL_DATA_RINGS \
  489. CFG_INI_UINT("dp_nss_tcl_data_rings", \
  490. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN, \
  491. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX, \
  492. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS, \
  493. CFG_VALUE_OR_DEFAULT, "DP NSS TCL Data Rings")
  494. #define CFG_DP_TX_DESC \
  495. CFG_INI_UINT("dp_tx_desc", \
  496. WLAN_CFG_NUM_TX_DESC_MIN, \
  497. WLAN_CFG_NUM_TX_DESC_MAX, \
  498. WLAN_CFG_NUM_TX_DESC, \
  499. CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
  500. #define CFG_DP_TX_EXT_DESC \
  501. CFG_INI_UINT("dp_tx_ext_desc", \
  502. WLAN_CFG_NUM_TX_EXT_DESC_MIN, \
  503. WLAN_CFG_NUM_TX_EXT_DESC_MAX, \
  504. WLAN_CFG_NUM_TX_EXT_DESC, \
  505. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
  506. #define CFG_DP_TX_EXT_DESC_POOLS \
  507. CFG_INI_UINT("dp_tx_ext_desc_pool", \
  508. WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \
  509. WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \
  510. WLAN_CFG_NUM_TXEXT_DESC_POOL, \
  511. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
  512. #define CFG_DP_PDEV_RX_RING \
  513. CFG_INI_UINT("dp_pdev_rx_ring", \
  514. WLAN_CFG_PER_PDEV_RX_RING_MIN, \
  515. WLAN_CFG_PER_PDEV_RX_RING_MAX, \
  516. WLAN_CFG_PER_PDEV_RX_RING, \
  517. CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
  518. #define CFG_DP_PDEV_TX_RING \
  519. CFG_INI_UINT("dp_pdev_tx_ring", \
  520. WLAN_CFG_PER_PDEV_TX_RING_MIN, \
  521. WLAN_CFG_PER_PDEV_TX_RING_MAX, \
  522. WLAN_CFG_PER_PDEV_TX_RING, \
  523. CFG_VALUE_OR_DEFAULT, \
  524. "DP PDEV Tx Ring")
  525. #define CFG_DP_RX_DEFRAG_TIMEOUT \
  526. CFG_INI_UINT("dp_rx_defrag_timeout", \
  527. WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \
  528. WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \
  529. WLAN_CFG_RX_DEFRAG_TIMEOUT, \
  530. CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
  531. #define CFG_DP_TX_COMPL_RING_SIZE \
  532. CFG_INI_UINT("dp_tx_compl_ring_size", \
  533. WLAN_CFG_TX_COMP_RING_SIZE_MIN, \
  534. WLAN_CFG_TX_COMP_RING_SIZE_MAX, \
  535. WLAN_CFG_TX_COMP_RING_SIZE, \
  536. CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
  537. #define CFG_DP_TX_RING_SIZE \
  538. CFG_INI_UINT("dp_tx_ring_size", \
  539. WLAN_CFG_TX_RING_SIZE_MIN,\
  540. WLAN_CFG_TX_RING_SIZE_MAX,\
  541. WLAN_CFG_TX_RING_SIZE,\
  542. CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
  543. #define CFG_DP_NSS_COMP_RING_SIZE \
  544. CFG_INI_UINT("dp_nss_comp_ring_size", \
  545. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \
  546. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \
  547. WLAN_CFG_NSS_TX_COMP_RING_SIZE, \
  548. CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
  549. #define CFG_DP_PDEV_LMAC_RING \
  550. CFG_INI_UINT("dp_pdev_lmac_ring", \
  551. WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \
  552. WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \
  553. WLAN_CFG_PER_PDEV_LMAC_RING, \
  554. CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
  555. /*
  556. * <ini>
  557. * dp_rx_pending_hl_threshold - High threshold of frame number to start
  558. * frame dropping scheme
  559. * @Min: 0
  560. * @Max: 524288
  561. * @Default: 393216
  562. *
  563. * This ini entry is used to set a high limit threshold to start frame
  564. * dropping scheme
  565. *
  566. * Usage: External
  567. *
  568. * </ini>
  569. */
  570. #define CFG_DP_RX_PENDING_HL_THRESHOLD \
  571. CFG_INI_UINT("dp_rx_pending_hl_threshold", \
  572. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN, \
  573. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX, \
  574. WLAN_CFG_RX_PENDING_HL_THRESHOLD, \
  575. CFG_VALUE_OR_DEFAULT, "DP rx pending hl threshold")
  576. /*
  577. * <ini>
  578. * dp_rx_pending_lo_threshold - Low threshold of frame number to stop
  579. * frame dropping scheme
  580. * @Min: 100
  581. * @Max: 524288
  582. * @Default: 393216
  583. *
  584. * This ini entry is used to set a low limit threshold to stop frame
  585. * dropping scheme
  586. *
  587. * Usage: External
  588. *
  589. * </ini>
  590. */
  591. #define CFG_DP_RX_PENDING_LO_THRESHOLD \
  592. CFG_INI_UINT("dp_rx_pending_lo_threshold", \
  593. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN, \
  594. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX, \
  595. WLAN_CFG_RX_PENDING_LO_THRESHOLD, \
  596. CFG_VALUE_OR_DEFAULT, "DP rx pending lo threshold")
  597. #define CFG_DP_BASE_HW_MAC_ID \
  598. CFG_INI_UINT("dp_base_hw_macid", \
  599. 0, 1, 1, \
  600. CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
  601. #define CFG_DP_RX_HASH \
  602. CFG_INI_BOOL("dp_rx_hash", true, \
  603. "DP Rx Hash")
  604. #define CFG_DP_TSO \
  605. CFG_INI_BOOL("TSOEnable", false, \
  606. "DP TSO Enabled")
  607. #define CFG_DP_LRO \
  608. CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \
  609. "DP LRO Enable")
  610. #ifdef WLAN_USE_CONFIG_PARAMS
  611. /*
  612. * <ini>
  613. * dp_tx_desc_use_512p - Use 512M tx descriptor size
  614. * @Min: 0
  615. * @Max: 1
  616. * @Default: 0
  617. *
  618. * This ini entry is used as flag to use 512M tx descriptor size or not
  619. *
  620. * Usage: Internal
  621. *
  622. * </ini>
  623. */
  624. #define CFG_DP_TX_DESC_512P \
  625. CFG_INI_BOOL("dp_tx_desc_use_512p", false, \
  626. "DP TX DESC PINE SPECIFIC")
  627. /*
  628. * <ini>
  629. * dp_nss_3radio_ring - Use 3 Radio NSS comp ring size
  630. * @Min: 0
  631. * @Max: 1
  632. * @Default: 0
  633. *
  634. * This ini entry is used as flag to use 3 Radio NSS com ring size or not
  635. *
  636. * Usage: Internal
  637. *
  638. * </ini>
  639. */
  640. #define CFG_DP_NSS_3RADIO_RING \
  641. CFG_INI_BOOL("dp_nss_3radio_ring", false, \
  642. "DP NSS 3 RADIO RING SIZE")
  643. /*
  644. * <ini>
  645. * dp_mon_ring_per_512M - Update monitor status ring as 512M profile
  646. * @Min: 0
  647. * @Max: 1
  648. * @Default: 0
  649. *
  650. * This ini entry is used as flag to update monitor status ring as 512M profile
  651. *
  652. * Usage: Internal
  653. *
  654. * </ini>
  655. */
  656. #define CFG_DP_MON_STATUS_512M \
  657. CFG_INI_BOOL("dp_mon_ring_per_512M", false, \
  658. "DP MON STATUS RING SIZE PER 512M PROFILE")
  659. /*
  660. * <ini>
  661. * dp_mon_2chain_ring - Reduce monitor rings size as for 2 Chains case
  662. * @Min: 0
  663. * @Max: 1
  664. * @Default: 0
  665. *
  666. * This ini entry is used as flag to reduce monitor rings size as those used
  667. * in case of 2 Tx/RxChains
  668. *
  669. * Usage: Internal
  670. *
  671. * </ini>
  672. */
  673. #define CFG_DP_MON_2CHAIN_RING \
  674. CFG_INI_BOOL("dp_mon_2chain_ring", false, \
  675. "DP MON UPDATE RINGS FOR 2CHAIN")
  676. /*
  677. * <ini>
  678. * dp_mon_4chain_ring - Update monitor rings size for 4 Chains case
  679. * @Min: 0
  680. * @Max: 1
  681. * @Default: 0
  682. *
  683. * This ini entry is used as flag to reduce monitor rings size as those used
  684. * in case of 4 Tx/RxChains
  685. *
  686. * Usage: Internal
  687. *
  688. * </ini>
  689. */
  690. #define CFG_DP_MON_4CHAIN_RING \
  691. CFG_INI_BOOL("dp_mon_4chain_ring", false, \
  692. "DP MON UPDATE RINGS FOR 4CHAIN")
  693. /*
  694. * <ini>
  695. * dp_4radip_rdp_reo - Update RDP REO map based on 4 radio config
  696. * @Min: 0
  697. * @Max: 1
  698. * @Default: 0
  699. *
  700. * This ini entry is used as flag to update RDP reo map based on 4 Radio config
  701. *
  702. * Usage: Internal
  703. *
  704. * </ini>
  705. */
  706. #define CFG_DP_4RADIO_RDP_REO \
  707. CFG_INI_BOOL("dp_nss_4radio_rdp_reo", \
  708. false, "Update REO destination mapping for 4radio")
  709. #define CFG_DP_INI_SECTION_PARAMS \
  710. CFG(CFG_DP_NSS_3RADIO_RING) \
  711. CFG(CFG_DP_TX_DESC_512P) \
  712. CFG(CFG_DP_MON_STATUS_512M) \
  713. CFG(CFG_DP_MON_2CHAIN_RING) \
  714. CFG(CFG_DP_MON_4CHAIN_RING) \
  715. CFG(CFG_DP_4RADIO_RDP_REO)
  716. #else
  717. #define CFG_DP_INI_SECTION_PARAMS
  718. #endif
  719. /*
  720. * <ini>
  721. * CFG_DP_SG - Enable the SG feature standalonely
  722. * @Min: 0
  723. * @Max: 1
  724. * @Default: 1
  725. *
  726. * This ini entry is used to enable/disable SG feature standalonely.
  727. * Also does Rome support SG on TX, lithium does not.
  728. * For example the lithium does not support SG on UDP frames.
  729. * Which is able to handle SG only for TSO frames(in case TSO is enabled).
  730. *
  731. * Usage: External
  732. *
  733. * </ini>
  734. */
  735. #define CFG_DP_SG \
  736. CFG_INI_BOOL("dp_sg_support", false, \
  737. "DP SG Enable")
  738. #define WLAN_CFG_GRO_ENABLE_MIN 0
  739. #define WLAN_CFG_GRO_ENABLE_MAX 3
  740. #define WLAN_CFG_GRO_ENABLE_DEFAULT 0
  741. #define DP_GRO_ENABLE_BIT_SET BIT(0)
  742. #define DP_FORCE_USE_GRO_BIT_SET BIT(1)
  743. /*
  744. * <ini>
  745. * CFG_DP_GRO - Enable the GRO feature standalonely
  746. * @Min: 0
  747. * @Max: 3
  748. * @Default: 0
  749. *
  750. * This ini entry is used to enable/disable GRO feature standalonely.
  751. * Value 0: Disable GRO feature
  752. * Value 1: Enable Dynamic GRO feature, TC rule can control GRO
  753. * behavior of STA mode
  754. * Value 3: Enable GRO feature forcibly
  755. *
  756. * Usage: External
  757. *
  758. * </ini>
  759. */
  760. #define CFG_DP_GRO \
  761. CFG_INI_UINT("GROEnable", \
  762. WLAN_CFG_GRO_ENABLE_MIN, \
  763. WLAN_CFG_GRO_ENABLE_MAX, \
  764. WLAN_CFG_GRO_ENABLE_DEFAULT, \
  765. CFG_VALUE_OR_DEFAULT, "DP GRO Enable")
  766. #define CFG_DP_OL_TX_CSUM \
  767. CFG_INI_BOOL("dp_offload_tx_csum_support", false, \
  768. "DP tx csum Enable")
  769. #define CFG_DP_OL_RX_CSUM \
  770. CFG_INI_BOOL("dp_offload_rx_csum_support", false, \
  771. "DP rx csum Enable")
  772. #define CFG_DP_RAWMODE \
  773. CFG_INI_BOOL("dp_rawmode_support", false, \
  774. "DP rawmode Enable")
  775. #define CFG_DP_PEER_FLOW_CTRL \
  776. CFG_INI_BOOL("dp_peer_flow_control_support", false, \
  777. "DP peer flow ctrl Enable")
  778. #define CFG_DP_NAPI \
  779. CFG_INI_BOOL("dp_napi_enabled", PLATFORM_VALUE(true, false), \
  780. "DP Napi Enabled")
  781. /*
  782. * <ini>
  783. * gEnableP2pIpTcpUdpChecksumOffload - Enable checksum offload for P2P mode
  784. * @Min: 0
  785. * @Max: 1
  786. * @Default: 1
  787. *
  788. * This ini entry is used to enable/disable TX checksum(UDP/TCP) for P2P modes.
  789. * This includes P2P device mode, P2P client mode and P2P GO mode.
  790. * The feature is enabled by default. To disable TX checksum for P2P, add the
  791. * following entry in ini file:
  792. * gEnableP2pIpTcpUdpChecksumOffload=0
  793. *
  794. * Usage: External
  795. *
  796. * </ini>
  797. */
  798. #define CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD \
  799. CFG_INI_BOOL("gEnableP2pIpTcpUdpChecksumOffload", true, \
  800. "DP TCP UDP Checksum Offload for P2P mode (device/cli/go)")
  801. /*
  802. * <ini>
  803. * gEnableNanIpTcpUdpChecksumOffload - Enable checksum offload for NAN mode
  804. * @Min: 0
  805. * @Max: 1
  806. * @Default: 1
  807. *
  808. * Usage: External
  809. *
  810. * </ini>
  811. */
  812. #define CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD \
  813. CFG_INI_BOOL("gEnableNanIpTcpUdpChecksumOffload", true, \
  814. "DP TCP UDP Checksum Offload for NAN mode")
  815. /*
  816. * <ini>
  817. * gEnableIpTcpUdpChecksumOffload - Enable checksum offload
  818. * @Min: 0
  819. * @Max: 1
  820. * @Default: 1
  821. *
  822. * Usage: External
  823. *
  824. * </ini>
  825. */
  826. #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \
  827. CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \
  828. "DP TCP UDP Checksum Offload")
  829. #define CFG_DP_DEFRAG_TIMEOUT_CHECK \
  830. CFG_INI_BOOL("dp_defrag_timeout_check", true, \
  831. "DP Defrag Timeout Check")
  832. #define CFG_DP_WBM_RELEASE_RING \
  833. CFG_INI_UINT("dp_wbm_release_ring", \
  834. WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \
  835. WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \
  836. WLAN_CFG_WBM_RELEASE_RING_SIZE, \
  837. CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
  838. #define CFG_DP_TCL_CMD_CREDIT_RING \
  839. CFG_INI_UINT("dp_tcl_cmd_credit_ring", \
  840. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN, \
  841. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX, \
  842. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE, \
  843. CFG_VALUE_OR_DEFAULT, "DP TCL Cmd_Credit ring")
  844. #define CFG_DP_TCL_STATUS_RING \
  845. CFG_INI_UINT("dp_tcl_status_ring",\
  846. WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \
  847. WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \
  848. WLAN_CFG_TCL_STATUS_RING_SIZE, \
  849. CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
  850. #define CFG_DP_REO_REINJECT_RING \
  851. CFG_INI_UINT("dp_reo_reinject_ring", \
  852. WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \
  853. WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \
  854. WLAN_CFG_REO_REINJECT_RING_SIZE, \
  855. CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
  856. #define CFG_DP_RX_RELEASE_RING \
  857. CFG_INI_UINT("dp_rx_release_ring", \
  858. WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \
  859. WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \
  860. WLAN_CFG_RX_RELEASE_RING_SIZE, \
  861. CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
  862. #define CFG_DP_RX_DESTINATION_RING \
  863. CFG_INI_UINT("dp_reo_dst_ring", \
  864. WLAN_CFG_REO_DST_RING_SIZE_MIN, \
  865. WLAN_CFG_REO_DST_RING_SIZE_MAX, \
  866. WLAN_CFG_REO_DST_RING_SIZE, \
  867. CFG_VALUE_OR_DEFAULT, "DP REO destination ring")
  868. #define CFG_DP_REO_EXCEPTION_RING \
  869. CFG_INI_UINT("dp_reo_exception_ring", \
  870. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \
  871. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \
  872. WLAN_CFG_REO_EXCEPTION_RING_SIZE, \
  873. CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
  874. #define CFG_DP_REO_CMD_RING \
  875. CFG_INI_UINT("dp_reo_cmd_ring", \
  876. WLAN_CFG_REO_CMD_RING_SIZE_MIN, \
  877. WLAN_CFG_REO_CMD_RING_SIZE_MAX, \
  878. WLAN_CFG_REO_CMD_RING_SIZE, \
  879. CFG_VALUE_OR_DEFAULT, "DP REO command ring")
  880. #define CFG_DP_REO_STATUS_RING \
  881. CFG_INI_UINT("dp_reo_status_ring", \
  882. WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \
  883. WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \
  884. WLAN_CFG_REO_STATUS_RING_SIZE, \
  885. CFG_VALUE_OR_DEFAULT, "DP REO status ring")
  886. #define CFG_DP_RXDMA_BUF_RING \
  887. CFG_INI_UINT("dp_rxdma_buf_ring", \
  888. WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \
  889. WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \
  890. WLAN_CFG_RXDMA_BUF_RING_SIZE, \
  891. CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
  892. #define CFG_DP_RXDMA_REFILL_RING \
  893. CFG_INI_UINT("dp_rxdma_refill_ring", \
  894. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \
  895. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \
  896. WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
  897. CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
  898. #define CFG_DP_TX_DESC_LIMIT_0 \
  899. CFG_INI_UINT("dp_tx_desc_limit_0", \
  900. WLAN_CFG_TX_DESC_LIMIT_0_MIN, \
  901. WLAN_CFG_TX_DESC_LIMIT_0_MAX, \
  902. WLAN_CFG_TX_DESC_LIMIT_0, \
  903. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0")
  904. #define CFG_DP_TX_DESC_LIMIT_1 \
  905. CFG_INI_UINT("dp_tx_desc_limit_1", \
  906. WLAN_CFG_TX_DESC_LIMIT_1_MIN, \
  907. WLAN_CFG_TX_DESC_LIMIT_1_MAX, \
  908. WLAN_CFG_TX_DESC_LIMIT_1, \
  909. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1")
  910. #define CFG_DP_TX_DESC_LIMIT_2 \
  911. CFG_INI_UINT("dp_tx_desc_limit_2", \
  912. WLAN_CFG_TX_DESC_LIMIT_2_MIN, \
  913. WLAN_CFG_TX_DESC_LIMIT_2_MAX, \
  914. WLAN_CFG_TX_DESC_LIMIT_2, \
  915. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2")
  916. #define CFG_DP_TX_DEVICE_LIMIT \
  917. CFG_INI_UINT("dp_tx_device_limit", \
  918. WLAN_CFG_TX_DEVICE_LIMIT_MIN, \
  919. WLAN_CFG_TX_DEVICE_LIMIT_MAX, \
  920. WLAN_CFG_TX_DEVICE_LIMIT, \
  921. CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit")
  922. #define CFG_DP_TX_SW_INTERNODE_QUEUE \
  923. CFG_INI_UINT("dp_tx_sw_internode_queue", \
  924. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN, \
  925. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX, \
  926. WLAN_CFG_TX_SW_INTERNODE_QUEUE, \
  927. CFG_VALUE_OR_DEFAULT, "DP TX SW internode queue")
  928. #define CFG_DP_RXDMA_MONITOR_BUF_RING \
  929. CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
  930. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
  931. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \
  932. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \
  933. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
  934. #define CFG_DP_TX_MONITOR_BUF_RING \
  935. CFG_INI_UINT("dp_tx_monitor_buf_ring", \
  936. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN, \
  937. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX, \
  938. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE, \
  939. CFG_VALUE_OR_DEFAULT, "DP TX monitor buffer ring")
  940. #define CFG_DP_RXDMA_MONITOR_DST_RING \
  941. CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \
  942. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \
  943. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \
  944. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \
  945. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  946. #define CFG_DP_TX_MONITOR_DST_RING \
  947. CFG_INI_UINT("dp_tx_monitor_dst_ring", \
  948. WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN, \
  949. WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX, \
  950. WLAN_CFG_TX_MONITOR_DST_RING_SIZE, \
  951. CFG_VALUE_OR_DEFAULT, "DP TX monitor destination ring")
  952. #define CFG_DP_RXDMA_MONITOR_STATUS_RING \
  953. CFG_INI_UINT("dp_rxdma_monitor_status_ring", \
  954. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \
  955. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \
  956. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \
  957. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
  958. #define CFG_DP_RXDMA_MONITOR_DESC_RING \
  959. CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \
  960. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \
  961. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \
  962. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \
  963. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  964. #define CFG_DP_RXDMA_ERR_DST_RING \
  965. CFG_INI_UINT("dp_rxdma_err_dst_ring", \
  966. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \
  967. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \
  968. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \
  969. CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
  970. #define CFG_DP_PER_PKT_LOGGING \
  971. CFG_INI_UINT("enable_verbose_debug", \
  972. 0, 0xffff, 0, \
  973. CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging")
  974. #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \
  975. CFG_INI_UINT("TxFlowStartQueueOffset", \
  976. 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \
  977. CFG_VALUE_OR_DEFAULT, "Start queue offset")
  978. #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \
  979. CFG_INI_UINT("TxFlowStopQueueThreshold", \
  980. 0, 50, 15, \
  981. CFG_VALUE_OR_DEFAULT, "Stop queue Threshold")
  982. #define CFG_DP_IPA_UC_TX_BUF_SIZE \
  983. CFG_INI_UINT("IpaUcTxBufSize", \
  984. 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \
  985. CFG_VALUE_OR_DEFAULT, "IPA tx buffer size")
  986. #define CFG_DP_IPA_UC_TX_PARTITION_BASE \
  987. CFG_INI_UINT("IpaUcTxPartitionBase", \
  988. 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \
  989. CFG_VALUE_OR_DEFAULT, "IPA tx partition base")
  990. #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \
  991. CFG_INI_UINT("IpaUcRxIndRingCount", \
  992. 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \
  993. CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count")
  994. #define CFG_DP_AP_STA_SECURITY_SEPERATION \
  995. CFG_INI_BOOL("gDisableIntraBssFwd", \
  996. false, "Disable intrs BSS Rx packets")
  997. #define CFG_DP_ENABLE_DATA_STALL_DETECTION \
  998. CFG_INI_UINT("gEnableDataStallDetection", \
  999. 0, 0xFFFFFFFF, 0x1, \
  1000. CFG_VALUE_OR_DEFAULT, "Enable/Disable Data stall detection")
  1001. #define CFG_DP_RX_SW_DESC_WEIGHT \
  1002. CFG_INI_UINT("dp_rx_sw_desc_weight", \
  1003. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \
  1004. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \
  1005. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \
  1006. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight")
  1007. #define CFG_DP_RX_SW_DESC_NUM \
  1008. CFG_INI_UINT("dp_rx_sw_desc_num", \
  1009. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN, \
  1010. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX, \
  1011. WLAN_CFG_RX_SW_DESC_NUM_SIZE, \
  1012. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC num")
  1013. #define CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE \
  1014. CFG_INI_UINT("dp_rx_flow_search_table_size", \
  1015. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN, \
  1016. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX, \
  1017. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT, \
  1018. CFG_VALUE_OR_DEFAULT, \
  1019. "DP Rx Flow Search Table Size in number of entries")
  1020. #define CFG_DP_RX_FLOW_TAG_ENABLE \
  1021. CFG_INI_BOOL("dp_rx_flow_tag_enable", false, \
  1022. "Enable/Disable DP Rx Flow Tag")
  1023. #define CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV \
  1024. CFG_INI_BOOL("dp_rx_per_pdev_flow_search", false, \
  1025. "DP Rx Flow Search Table Is Per PDev")
  1026. #define CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE \
  1027. CFG_INI_BOOL("dp_rx_monitor_protocol_flow_tag_enable", true, \
  1028. "Enable/Disable Rx Protocol & Flow tags in Monitor mode")
  1029. #define CFG_DP_TX_PER_PKT_VDEV_ID_CHECK \
  1030. CFG_INI_BOOL("dp_tx_allow_per_pkt_vdev_id_check", false, \
  1031. "Enable/Disable tx Per Pkt vdev id check")
  1032. /*
  1033. * <ini>
  1034. * dp_rx_fisa_enable - Control Rx datapath FISA
  1035. * @Min: 0
  1036. * @Max: 1
  1037. * @Default: 1
  1038. *
  1039. * This ini is used to enable DP Rx FISA feature
  1040. *
  1041. * Related: dp_rx_flow_search_table_size
  1042. *
  1043. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  1044. *
  1045. * Usage: Internal
  1046. *
  1047. * </ini>
  1048. */
  1049. #define CFG_DP_RX_FISA_ENABLE \
  1050. CFG_INI_BOOL("dp_rx_fisa_enable", true, \
  1051. "Enable/Disable DP Rx FISA")
  1052. #define CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD \
  1053. CFG_INI_UINT("mon_drop_thresh", \
  1054. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN, \
  1055. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX, \
  1056. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE, \
  1057. CFG_VALUE_OR_DEFAULT, "RXDMA monitor rx drop theshold")
  1058. #define CFG_DP_PKTLOG_BUFFER_SIZE \
  1059. CFG_INI_UINT("PktlogBufSize", \
  1060. WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE, \
  1061. WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE, \
  1062. WLAN_CFG_PKTLOG_BUFFER_SIZE, \
  1063. CFG_VALUE_OR_DEFAULT, "Packet Log buffer size")
  1064. #define CFG_DP_FULL_MON_MODE \
  1065. CFG_INI_BOOL("full_mon_mode", \
  1066. false, "Full Monitor mode support")
  1067. #define CFG_DP_REO_RINGS_MAP \
  1068. CFG_INI_UINT("dp_reo_rings_map", \
  1069. WLAN_CFG_NUM_REO_RINGS_MAP_MIN, \
  1070. WLAN_CFG_NUM_REO_RINGS_MAP_MAX, \
  1071. WLAN_CFG_NUM_REO_RINGS_MAP, \
  1072. CFG_VALUE_OR_DEFAULT, "REO Destination Rings Mapping")
  1073. #define CFG_DP_RX_RADIO_0_DEFAULT_REO \
  1074. CFG_INI_UINT("dp_rx_radio0_default_reo", \
  1075. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1076. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1077. WLAN_CFG_RADIO_0_DEFAULT_REO, \
  1078. CFG_VALUE_OR_DEFAULT, "Radio0 to REO destination default mapping")
  1079. #define CFG_DP_RX_RADIO_1_DEFAULT_REO \
  1080. CFG_INI_UINT("dp_rx_radio1_default_reo", \
  1081. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1082. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1083. WLAN_CFG_RADIO_1_DEFAULT_REO, \
  1084. CFG_VALUE_OR_DEFAULT, "Radio1 to REO destination default mapping")
  1085. #define CFG_DP_RX_RADIO_2_DEFAULT_REO \
  1086. CFG_INI_UINT("dp_rx_radio2_default_reo", \
  1087. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1088. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1089. WLAN_CFG_RADIO_2_DEFAULT_REO, \
  1090. CFG_VALUE_OR_DEFAULT, "Radio2 to REO destination default mapping")
  1091. #define CFG_DP_PEER_EXT_STATS \
  1092. CFG_INI_BOOL("peer_ext_stats", \
  1093. false, "Peer extended stats")
  1094. /*
  1095. * <ini>
  1096. * legacy_mode_csum_disable - Disable csum offload for legacy 802.11abg modes
  1097. * @Min: 0
  1098. * @Max: 1
  1099. * @Default: Default value indicating if checksum should be disabled for
  1100. * legacy WLAN modes
  1101. *
  1102. * This ini is used to disable HW checksum offload capability for legacy
  1103. * connections
  1104. *
  1105. * Related: gEnableIpTcpUdpChecksumOffload should be enabled
  1106. *
  1107. * Usage: Internal
  1108. *
  1109. * </ini>
  1110. */
  1111. #ifndef DP_LEGACY_MODE_CSM_DEFAULT_DISABLE
  1112. #define DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1
  1113. #endif
  1114. #define CFG_DP_LEGACY_MODE_CSUM_DISABLE \
  1115. CFG_INI_BOOL("legacy_mode_csum_disable", \
  1116. DP_LEGACY_MODE_CSM_DEFAULT_DISABLE, \
  1117. "Enable/Disable legacy mode checksum")
  1118. #define CFG_DP_RX_BUFF_POOL_ENABLE \
  1119. CFG_INI_BOOL("dp_rx_buff_prealloc_pool", false, \
  1120. "Enable/Disable DP RX emergency buffer pool support")
  1121. #define CFG_DP_RX_REFILL_BUFF_POOL_ENABLE \
  1122. CFG_INI_BOOL("dp_rx_refill_buff_pool", false, \
  1123. "Enable/Disable DP RX refill buffer pool support")
  1124. #define CFG_DP_POLL_MODE_ENABLE \
  1125. CFG_INI_BOOL("dp_poll_mode_enable", false, \
  1126. "Enable/Disable Polling mode for data path")
  1127. #define CFG_DP_RX_FST_IN_CMEM \
  1128. CFG_INI_BOOL("dp_rx_fst_in_cmem", false, \
  1129. "Enable/Disable flow search table in CMEM")
  1130. /*
  1131. * <ini>
  1132. * gEnableSWLM - Control DP Software latency manager
  1133. * @Min: 0
  1134. * @Max: 1
  1135. * @Default: 0
  1136. *
  1137. * This ini is used to enable DP Software latency Manager
  1138. *
  1139. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  1140. *
  1141. * Usage: Internal
  1142. *
  1143. * </ini>
  1144. */
  1145. #define CFG_DP_SWLM_ENABLE \
  1146. CFG_INI_BOOL("gEnableSWLM", false, \
  1147. "Enable/Disable DP SWLM")
  1148. /*
  1149. * <ini>
  1150. * wow_check_rx_pending_enable - control to check RX frames pending in Wow
  1151. * @Min: 0
  1152. * @Max: 1
  1153. * @Default: 0
  1154. *
  1155. * This ini is used to control DP Software to perform RX pending check
  1156. * before entering WoW mode
  1157. *
  1158. * Usage: Internal
  1159. *
  1160. * </ini>
  1161. */
  1162. #define CFG_DP_WOW_CHECK_RX_PENDING \
  1163. CFG_INI_BOOL("wow_check_rx_pending_enable", \
  1164. false, \
  1165. "enable rx frame pending check in WoW mode")
  1166. #define CFG_DP_DELAY_MON_REPLENISH \
  1167. CFG_INI_BOOL("delay_mon_replenish", \
  1168. true, "Delay Monitor Replenish")
  1169. #ifdef QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT
  1170. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN 500
  1171. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX 2000
  1172. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER 500
  1173. #define CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG \
  1174. CFG_INI_BOOL("vdev_stats_hw_offload_config", \
  1175. false, "Offload vdev stats to HW")
  1176. #define CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER \
  1177. CFG_INI_UINT("vdev_stats_hw_offload_timer", \
  1178. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN, \
  1179. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX, \
  1180. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER, \
  1181. CFG_VALUE_OR_DEFAULT, \
  1182. "vdev stats hw offload timer duration")
  1183. #define CFG_DP_VDEV_STATS_HW_OFFLOAD \
  1184. CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG) \
  1185. CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER)
  1186. #else
  1187. #define CFG_DP_VDEV_STATS_HW_OFFLOAD
  1188. #endif
  1189. /*
  1190. * <ini>
  1191. * ghw_cc_enable - enable HW cookie conversion by register
  1192. * @Min: 0
  1193. * @Max: 1
  1194. * @Default: 1
  1195. *
  1196. * This ini is used to control HW based 20 bits cookie to 64 bits
  1197. * Desc virtual address conversion
  1198. *
  1199. * Usage: Internal
  1200. *
  1201. * </ini>
  1202. */
  1203. #define CFG_DP_HW_CC_ENABLE \
  1204. CFG_INI_BOOL("ghw_cc_enable", \
  1205. true, "Enable/Disable HW cookie conversion")
  1206. #ifdef IPA_OFFLOAD
  1207. /*
  1208. * <ini>
  1209. * dp_ipa_tx_ring_size - Set tcl ring size for IPA
  1210. * @Min: 1024
  1211. * @Max: 8096
  1212. * @Default: 1024
  1213. *
  1214. * This ini sets the tcl ring size for IPA
  1215. *
  1216. * Related: N/A
  1217. *
  1218. * Supported Feature: IPA
  1219. *
  1220. * Usage: Internal
  1221. *
  1222. * </ini>
  1223. */
  1224. #define CFG_DP_IPA_TX_RING_SIZE \
  1225. CFG_INI_UINT("dp_ipa_tx_ring_size", \
  1226. WLAN_CFG_IPA_TX_RING_SIZE_MIN, \
  1227. WLAN_CFG_IPA_TX_RING_SIZE_MAX, \
  1228. WLAN_CFG_IPA_TX_RING_SIZE, \
  1229. CFG_VALUE_OR_DEFAULT, "IPA TCL ring size")
  1230. /*
  1231. * <ini>
  1232. * dp_ipa_tx_comp_ring_size - Set tx comp ring size for IPA
  1233. * @Min: 1024
  1234. * @Max: 8096
  1235. * @Default: 1024
  1236. *
  1237. * This ini sets the tx comp ring size for IPA
  1238. *
  1239. * Related: N/A
  1240. *
  1241. * Supported Feature: IPA
  1242. *
  1243. * Usage: Internal
  1244. *
  1245. * </ini>
  1246. */
  1247. #define CFG_DP_IPA_TX_COMP_RING_SIZE \
  1248. CFG_INI_UINT("dp_ipa_tx_comp_ring_size", \
  1249. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN, \
  1250. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX, \
  1251. WLAN_CFG_IPA_TX_COMP_RING_SIZE, \
  1252. CFG_VALUE_OR_DEFAULT, "IPA tx comp ring size")
  1253. #ifdef IPA_WDI3_TX_TWO_PIPES
  1254. /*
  1255. * <ini>
  1256. * dp_ipa_tx_alt_ring_size - Set alt tcl ring size for IPA
  1257. * @Min: 1024
  1258. * @Max: 8096
  1259. * @Default: 1024
  1260. *
  1261. * This ini sets the alt tcl ring size for IPA
  1262. *
  1263. * Related: N/A
  1264. *
  1265. * Supported Feature: IPA
  1266. *
  1267. * Usage: Internal
  1268. *
  1269. * </ini>
  1270. */
  1271. #define CFG_DP_IPA_TX_ALT_RING_SIZE \
  1272. CFG_INI_UINT("dp_ipa_tx_alt_ring_size", \
  1273. WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN, \
  1274. WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX, \
  1275. WLAN_CFG_IPA_TX_ALT_RING_SIZE, \
  1276. CFG_VALUE_OR_DEFAULT, \
  1277. "DP IPA TX Alternative Ring Size")
  1278. /*
  1279. * <ini>
  1280. * dp_ipa_tx_alt_comp_ring_size - Set tx alt comp ring size for IPA
  1281. * @Min: 1024
  1282. * @Max: 8096
  1283. * @Default: 1024
  1284. *
  1285. * This ini sets the tx alt comp ring size for IPA
  1286. *
  1287. * Related: N/A
  1288. *
  1289. * Supported Feature: IPA
  1290. *
  1291. * Usage: Internal
  1292. *
  1293. * </ini>
  1294. */
  1295. #define CFG_DP_IPA_TX_ALT_COMP_RING_SIZE \
  1296. CFG_INI_UINT("dp_ipa_tx_alt_comp_ring_size", \
  1297. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN, \
  1298. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX, \
  1299. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE, \
  1300. CFG_VALUE_OR_DEFAULT, \
  1301. "DP IPA TX Alternative Completion Ring Size")
  1302. #define CFG_DP_IPA_TX_ALT_RING_CFG \
  1303. CFG(CFG_DP_IPA_TX_ALT_RING_SIZE) \
  1304. CFG(CFG_DP_IPA_TX_ALT_COMP_RING_SIZE)
  1305. #else
  1306. #define CFG_DP_IPA_TX_ALT_RING_CFG
  1307. #endif
  1308. #define CFG_DP_IPA_TX_RING_CFG \
  1309. CFG(CFG_DP_IPA_TX_RING_SIZE) \
  1310. CFG(CFG_DP_IPA_TX_COMP_RING_SIZE)
  1311. #else
  1312. #define CFG_DP_IPA_TX_RING_CFG
  1313. #define CFG_DP_IPA_TX_ALT_RING_CFG
  1314. #endif
  1315. #ifdef WLAN_SUPPORT_PPEDS
  1316. #define CFG_DP_PPE_ENABLE \
  1317. CFG_INI_BOOL("ppe_enable", false, \
  1318. "DP ppe enable flag")
  1319. #define CFG_DP_REO2PPE_RING \
  1320. CFG_INI_UINT("dp_reo2ppe_ring", \
  1321. WLAN_CFG_REO2PPE_RING_SIZE_MIN, \
  1322. WLAN_CFG_REO2PPE_RING_SIZE_MAX, \
  1323. WLAN_CFG_REO2PPE_RING_SIZE, \
  1324. CFG_VALUE_OR_DEFAULT, "DP REO2PPE ring")
  1325. #define CFG_DP_PPE2TCL_RING \
  1326. CFG_INI_UINT("dp_ppe2tcl_ring", \
  1327. WLAN_CFG_PPE2TCL_RING_SIZE_MIN, \
  1328. WLAN_CFG_PPE2TCL_RING_SIZE_MAX, \
  1329. WLAN_CFG_PPE2TCL_RING_SIZE, \
  1330. CFG_VALUE_OR_DEFAULT, "DP PPE2TCL rings")
  1331. #define CFG_DP_PPE_RELEASE_RING \
  1332. CFG_INI_UINT("dp_ppe_release_ring", \
  1333. WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN, \
  1334. WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX, \
  1335. WLAN_CFG_PPE_RELEASE_RING_SIZE, \
  1336. CFG_VALUE_OR_DEFAULT, "DP PPE Release Ring")
  1337. #define CFG_DP_PPE_CONFIG \
  1338. CFG(CFG_DP_PPE_ENABLE) \
  1339. CFG(CFG_DP_REO2PPE_RING) \
  1340. CFG(CFG_DP_PPE2TCL_RING) \
  1341. CFG(CFG_DP_PPE_RELEASE_RING)
  1342. #else
  1343. #define CFG_DP_PPE_CONFIG
  1344. #endif
  1345. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  1346. /*
  1347. * <ini>
  1348. * dp_chip0_rx_ring_map - Set Rx ring map for CHIP 0
  1349. * @Min: 0x0
  1350. * @Max: 0xFF
  1351. * @Default: 0xF
  1352. *
  1353. * This ini sets Rx ring map for CHIP 0
  1354. *
  1355. * Usage: Internal
  1356. *
  1357. * </ini>
  1358. */
  1359. #define CFG_DP_MLO_CHIP0_RX_RING_MAP \
  1360. CFG_INI_UINT("dp_chip0_rx_ring_map", \
  1361. WLAN_CFG_MLO_RX_RING_MAP_MIN, \
  1362. WLAN_CFG_MLO_RX_RING_MAP_MAX, \
  1363. WLAN_CFG_MLO_RX_RING_MAP, \
  1364. CFG_VALUE_OR_DEFAULT, "DP Rx ring map chip0")
  1365. /*
  1366. * <ini>
  1367. * dp_chip1_rx_ring_map - Set Rx ring map for CHIP 1
  1368. * @Min: 0x0
  1369. * @Max: 0xFF
  1370. * @Default: 0xF
  1371. *
  1372. * This ini sets Rx ring map for CHIP 1
  1373. *
  1374. * Usage: Internal
  1375. *
  1376. * </ini>
  1377. */
  1378. #define CFG_DP_MLO_CHIP1_RX_RING_MAP \
  1379. CFG_INI_UINT("dp_chip1_rx_ring_map", \
  1380. WLAN_CFG_MLO_RX_RING_MAP_MIN, \
  1381. WLAN_CFG_MLO_RX_RING_MAP_MAX, \
  1382. WLAN_CFG_MLO_RX_RING_MAP, \
  1383. CFG_VALUE_OR_DEFAULT, "DP Rx ring map chip1")
  1384. /*
  1385. * <ini>
  1386. * dp_chip2_rx_ring_map - Set Rx ring map for CHIP 2
  1387. * @Min: 0x0
  1388. * @Max: 0xFF
  1389. * @Default: 0xF
  1390. *
  1391. * This ini sets Rx ring map for CHIP 2
  1392. *
  1393. * Usage: Internal
  1394. *
  1395. * </ini>
  1396. */
  1397. #define CFG_DP_MLO_CHIP2_RX_RING_MAP \
  1398. CFG_INI_UINT("dp_chip2_rx_ring_map", \
  1399. WLAN_CFG_MLO_RX_RING_MAP_MIN, \
  1400. WLAN_CFG_MLO_RX_RING_MAP_MAX, \
  1401. WLAN_CFG_MLO_RX_RING_MAP, \
  1402. CFG_VALUE_OR_DEFAULT, "DP Rx ring map chip2")
  1403. #define CFG_DP_MLO_CONFIG \
  1404. CFG(CFG_DP_MLO_CHIP0_RX_RING_MAP) \
  1405. CFG(CFG_DP_MLO_CHIP1_RX_RING_MAP) \
  1406. CFG(CFG_DP_MLO_CHIP2_RX_RING_MAP)
  1407. #else
  1408. #define CFG_DP_MLO_CONFIG
  1409. #endif
  1410. #define CFG_DP \
  1411. CFG(CFG_DP_HTT_PACKET_TYPE) \
  1412. CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
  1413. CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
  1414. CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
  1415. CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
  1416. CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
  1417. CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \
  1418. CFG(CFG_DP_MAX_ALLOC_SIZE) \
  1419. CFG(CFG_DP_MAX_CLIENTS) \
  1420. CFG(CFG_DP_MAX_PEER_ID) \
  1421. CFG(CFG_DP_REO_DEST_RINGS) \
  1422. CFG(CFG_DP_TX_COMP_RINGS) \
  1423. CFG(CFG_DP_TCL_DATA_RINGS) \
  1424. CFG(CFG_DP_NSS_REO_DEST_RINGS) \
  1425. CFG(CFG_DP_NSS_TCL_DATA_RINGS) \
  1426. CFG(CFG_DP_TX_DESC) \
  1427. CFG(CFG_DP_TX_EXT_DESC) \
  1428. CFG(CFG_DP_TX_EXT_DESC_POOLS) \
  1429. CFG(CFG_DP_PDEV_RX_RING) \
  1430. CFG(CFG_DP_PDEV_TX_RING) \
  1431. CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \
  1432. CFG(CFG_DP_TX_COMPL_RING_SIZE) \
  1433. CFG(CFG_DP_TX_RING_SIZE) \
  1434. CFG(CFG_DP_NSS_COMP_RING_SIZE) \
  1435. CFG(CFG_DP_PDEV_LMAC_RING) \
  1436. CFG(CFG_DP_BASE_HW_MAC_ID) \
  1437. CFG(CFG_DP_RX_HASH) \
  1438. CFG(CFG_DP_TSO) \
  1439. CFG(CFG_DP_LRO) \
  1440. CFG(CFG_DP_SG) \
  1441. CFG(CFG_DP_GRO) \
  1442. CFG(CFG_DP_OL_TX_CSUM) \
  1443. CFG(CFG_DP_OL_RX_CSUM) \
  1444. CFG(CFG_DP_RAWMODE) \
  1445. CFG(CFG_DP_PEER_FLOW_CTRL) \
  1446. CFG(CFG_DP_NAPI) \
  1447. CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \
  1448. CFG(CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD) \
  1449. CFG(CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD) \
  1450. CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \
  1451. CFG(CFG_DP_WBM_RELEASE_RING) \
  1452. CFG(CFG_DP_TCL_CMD_CREDIT_RING) \
  1453. CFG(CFG_DP_TCL_STATUS_RING) \
  1454. CFG(CFG_DP_REO_REINJECT_RING) \
  1455. CFG(CFG_DP_RX_RELEASE_RING) \
  1456. CFG(CFG_DP_REO_EXCEPTION_RING) \
  1457. CFG(CFG_DP_RX_DESTINATION_RING) \
  1458. CFG(CFG_DP_REO_CMD_RING) \
  1459. CFG(CFG_DP_REO_STATUS_RING) \
  1460. CFG(CFG_DP_RXDMA_BUF_RING) \
  1461. CFG(CFG_DP_RXDMA_REFILL_RING) \
  1462. CFG(CFG_DP_TX_DESC_LIMIT_0) \
  1463. CFG(CFG_DP_TX_DESC_LIMIT_1) \
  1464. CFG(CFG_DP_TX_DESC_LIMIT_2) \
  1465. CFG(CFG_DP_TX_DEVICE_LIMIT) \
  1466. CFG(CFG_DP_TX_SW_INTERNODE_QUEUE) \
  1467. CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
  1468. CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
  1469. CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \
  1470. CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \
  1471. CFG(CFG_DP_RXDMA_ERR_DST_RING) \
  1472. CFG(CFG_DP_PER_PKT_LOGGING) \
  1473. CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \
  1474. CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \
  1475. CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \
  1476. CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \
  1477. CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
  1478. CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
  1479. CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \
  1480. CFG(CFG_DP_RX_SW_DESC_WEIGHT) \
  1481. CFG(CFG_DP_RX_SW_DESC_NUM) \
  1482. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE) \
  1483. CFG(CFG_DP_RX_FLOW_TAG_ENABLE) \
  1484. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV) \
  1485. CFG(CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE) \
  1486. CFG(CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD) \
  1487. CFG(CFG_DP_PKTLOG_BUFFER_SIZE) \
  1488. CFG(CFG_DP_RX_FISA_ENABLE) \
  1489. CFG(CFG_DP_FULL_MON_MODE) \
  1490. CFG(CFG_DP_REO_RINGS_MAP) \
  1491. CFG(CFG_DP_PEER_EXT_STATS) \
  1492. CFG(CFG_DP_RX_BUFF_POOL_ENABLE) \
  1493. CFG(CFG_DP_RX_REFILL_BUFF_POOL_ENABLE) \
  1494. CFG(CFG_DP_RX_PENDING_HL_THRESHOLD) \
  1495. CFG(CFG_DP_RX_PENDING_LO_THRESHOLD) \
  1496. CFG(CFG_DP_LEGACY_MODE_CSUM_DISABLE) \
  1497. CFG(CFG_DP_POLL_MODE_ENABLE) \
  1498. CFG(CFG_DP_SWLM_ENABLE) \
  1499. CFG(CFG_DP_TX_PER_PKT_VDEV_ID_CHECK) \
  1500. CFG(CFG_DP_RX_FST_IN_CMEM) \
  1501. CFG(CFG_DP_RX_RADIO_0_DEFAULT_REO) \
  1502. CFG(CFG_DP_RX_RADIO_1_DEFAULT_REO) \
  1503. CFG(CFG_DP_RX_RADIO_2_DEFAULT_REO) \
  1504. CFG(CFG_DP_WOW_CHECK_RX_PENDING) \
  1505. CFG(CFG_DP_HW_CC_ENABLE) \
  1506. CFG(CFG_DP_DELAY_MON_REPLENISH) \
  1507. CFG(CFG_DP_TX_MONITOR_BUF_RING) \
  1508. CFG(CFG_DP_TX_MONITOR_DST_RING) \
  1509. CFG_DP_IPA_TX_RING_CFG \
  1510. CFG_DP_PPE_CONFIG \
  1511. CFG_DP_IPA_TX_ALT_RING_CFG \
  1512. CFG_DP_MLO_CONFIG \
  1513. CFG_DP_INI_SECTION_PARAMS \
  1514. CFG_DP_VDEV_STATS_HW_OFFLOAD \
  1515. CFG(CFG_DP_TX_CAPT_MAX_MEM_MB)
  1516. #endif /* _CFG_DP_H_ */