hal_be_rx_tlv.h 52 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_BE_RX_TLV_H_
  20. #define _HAL_BE_RX_TLV_H_
  21. #include "hal_api_mon.h"
  22. /*
  23. * Structures & Macros to obtain fields from the TLV's in the Rx packet
  24. * pre-header.
  25. */
  26. #define HAL_RX_BE_PKT_HDR_TLV_LEN 112
  27. #ifndef CONFIG_WORD_BASED_TLV
  28. typedef struct rx_mpdu_start hal_rx_mpdu_start_t;
  29. typedef struct rx_msdu_end hal_rx_msdu_end_t;
  30. #endif
  31. #define RX_BE_PADDING0_BYTES 8
  32. /*
  33. * Each RX descriptor TLV is preceded by 1 QWORD "tag"
  34. */
  35. struct rx_pkt_hdr_tlv {
  36. uint64_t tag; /* 8 B */
  37. uint64_t phy_ppdu_id; /* 8 B */
  38. char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */
  39. };
  40. #ifndef CONFIG_NO_TLV_TAGS
  41. struct rx_mpdu_start_tlv {
  42. uint64_t tag; /* 8 B */
  43. hal_rx_mpdu_start_t rx_mpdu_start;
  44. };
  45. struct rx_msdu_end_tlv {
  46. uint64_t tag; /* 8 B */
  47. hal_rx_msdu_end_t rx_msdu_end;
  48. };
  49. struct rx_pkt_tlvs {
  50. struct rx_msdu_end_tlv msdu_end_tlv; /* 120 bytes */
  51. uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */
  52. struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */
  53. #ifndef NO_RX_PKT_HDR_TLV
  54. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  55. #endif
  56. };
  57. #else
  58. struct rx_mpdu_start_tlv {
  59. hal_rx_mpdu_start_t rx_mpdu_start;
  60. };
  61. struct rx_msdu_end_tlv {
  62. hal_rx_msdu_end_t rx_msdu_end;
  63. };
  64. struct rx_pkt_tlvs {
  65. struct rx_msdu_end_tlv msdu_end_tlv; /* 128 bytes */
  66. struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */
  67. uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */
  68. #ifndef NO_RX_PKT_HDR_TLV
  69. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  70. #endif
  71. };
  72. #endif
  73. #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs)
  74. #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV
  75. #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field)
  76. #ifndef CONFIG_WORD_BASED_TLV
  77. #define HAL_RX_MSDU_END(_rx_pkt_tlv) \
  78. (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end)
  79. #define HAL_RX_MPDU_START(_rx_pkt_tlv) \
  80. (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \
  81. rx_mpdu_start.rx_mpdu_info_details)
  82. #else /* CONFIG_WORD_BASED_TLV */
  83. #define HAL_RX_MSDU_END(_rx_pkt_tlv) \
  84. (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end)
  85. #define HAL_RX_MPDU_START(_rx_pkt_tlv) \
  86. (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \
  87. rx_mpdu_start)
  88. #endif /* CONFIG_WORD_BASED_TLV */
  89. #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv) \
  90. HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_done
  91. #define HAL_RX_TLV_DECAP_FORMAT_GET(_rx_pkt_tlv) \
  92. HAL_RX_MSDU_END(_rx_pkt_tlv).decap_format
  93. #ifdef RECEIVE_OFFLOAD
  94. #define HAL_RX_TLV_GET_TCP_PURE_ACK(_rx_pkt_tlv) \
  95. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_only_ack
  96. #define HAL_RX_TLV_GET_TCP_PROTO(_rx_pkt_tlv) \
  97. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_proto
  98. #define HAL_RX_TLV_GET_UDP_PROTO(_rx_pkt_tlv) \
  99. HAL_RX_MSDU_END(_rx_pkt_tlv).udp_proto
  100. #define HAL_RX_TLV_GET_IPV6(_rx_pkt_tlv) \
  101. HAL_RX_MSDU_END(_rx_pkt_tlv).ipv6_proto
  102. #define HAL_RX_TLV_GET_IP_OFFSET(_rx_pkt_tlv) \
  103. HAL_RX_MSDU_END(_rx_pkt_tlv).l3_offset
  104. #define HAL_RX_TLV_GET_TCP_OFFSET(_rx_pkt_tlv) \
  105. HAL_RX_MSDU_END(_rx_pkt_tlv).l4_offset
  106. #endif /* RECEIVE_OFFLOAD */
  107. #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(_rx_pkt_tlv) \
  108. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz
  109. #define HAL_RX_TLV_MSDU_LEN_GET(_rx_pkt_tlv) \
  110. HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_length
  111. #define HAL_RX_TLV_CCE_MATCH_GET(_rx_pkt_tlv) \
  112. HAL_RX_MSDU_END(_rx_pkt_tlv).cce_match
  113. #define HAL_RX_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \
  114. HAL_RX_MSDU_END(_rx_pkt_tlv).phy_ppdu_id
  115. #define HAL_RX_TLV_BW_GET(_rx_pkt_tlv) \
  116. HAL_RX_MSDU_END(_rx_pkt_tlv).receive_bandwidth
  117. #define HAL_RX_TLV_FLOWID_TOEPLITZ_GET(_rx_pkt_tlv) \
  118. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz
  119. #define HAL_RX_TLV_SGI_GET(_rx_pkt_tlv) \
  120. HAL_RX_MSDU_END(_rx_pkt_tlv).sgi
  121. #define HAL_RX_TLV_RATE_MCS_GET(_rx_pkt_tlv) \
  122. HAL_RX_MSDU_END(_rx_pkt_tlv).rate_mcs
  123. #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \
  124. HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code
  125. #define HAL_RX_TLV_RSSI_GET(_rx_pkt_tlv) \
  126. HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi
  127. #define HAL_RX_TLV_FREQ_GET(_rx_pkt_tlv) \
  128. HAL_RX_MSDU_END(_rx_pkt_tlv).sw_phy_meta_data
  129. #define HAL_RX_TLV_PKT_TYPE_GET(_rx_pkt_tlv) \
  130. HAL_RX_MSDU_END(_rx_pkt_tlv).pkt_type
  131. #define HAL_RX_TLV_DECRYPT_ERR_GET(_rx_pkt_tlv) \
  132. HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_err
  133. #define HAL_RX_TLV_MIC_ERR_GET(_rx_pkt_tlv) \
  134. HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err
  135. #define HAL_RX_TLV_MIMO_SS_BITMAP(_rx_pkt_tlv)\
  136. HAL_RX_MSDU_END(_rx_pkt_tlv).mimo_ss_bitmap
  137. #define HAL_RX_TLV_ANT_SIGNAL_DB_GET(_rx_pkt_tlv) \
  138. HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi
  139. #define HAL_RX_TLV_STBC_GET(_rx_pkt_tlv) \
  140. HAL_RX_MSDU_END(_rx_pkt_tlv).stbc
  141. #define HAL_RX_TLV_RECEPTION_TYPE_GET(_rx_pkt_tlv) \
  142. HAL_RX_MSDU_END(_rx_pkt_tlv).reception_type
  143. #define HAL_RX_TLV_IP_CSUM_FAIL_GET(_rx_pkt_tlv) \
  144. HAL_RX_MSDU_END(_rx_pkt_tlv).ip_chksum_fail
  145. #define HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(_rx_pkt_tlv) \
  146. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum_fail
  147. #define HAL_RX_TLV_MPDU_LEN_ERR_GET(_rx_pkt_tlv) \
  148. HAL_RX_MSDU_END(_rx_pkt_tlv).mpdu_length_err
  149. #define HAL_RX_TLV_MPDU_FCS_ERR_GET(_rx_pkt_tlv) \
  150. HAL_RX_MSDU_END(_rx_pkt_tlv).fcs_err
  151. #define HAL_RX_TLV_IS_MCAST_GET(_rx_pkt_tlv) \
  152. HAL_RX_MSDU_END(_rx_pkt_tlv).mcast_bcast
  153. #ifndef CONFIG_WORD_BASED_TLV
  154. #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \
  155. HAL_RX_MPDU_START(_rx_pkt_tlv).first_mpdu
  156. #else
  157. #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \
  158. HAL_RX_MSDU_END(_rx_pkt_tlv).first_mpdu
  159. #endif
  160. #ifdef RECEIVE_OFFLOAD
  161. /**
  162. * LRO information needed from the TLVs
  163. */
  164. #define HAL_RX_TLV_GET_LRO_ELIGIBLE(_rx_pkt_tlv) \
  165. HAL_RX_MSDU_END(_rx_pkt_tlv).lro_eligible
  166. #define HAL_RX_TLV_GET_TCP_ACK(_rx_pkt_tlv) \
  167. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_ack_number
  168. #define HAL_RX_TLV_GET_TCP_SEQ(_rx_pkt_tlv) \
  169. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_seq_number
  170. #define HAL_RX_TLV_GET_TCP_WIN(_rx_pkt_tlv) \
  171. HAL_RX_MSDU_END(_rx_pkt_tlv).window_size
  172. #endif
  173. #define HAL_RX_GET_FILTER_CATEGORY(_rx_pkt_tlv) \
  174. HAL_RX_MPDU_START(_rx_pkt_tlv).rxpcu_mpdu_filter_in_category
  175. #define HAL_RX_GET_PPDU_ID(_rx_pkt_tlv) \
  176. HAL_RX_MPDU_START(_rx_pkt_tlv).phy_ppdu_id
  177. #define HAL_RX_TLV_PEER_META_DATA_GET(_rx_pkt_tlv) \
  178. HAL_RX_MPDU_START(_rx_pkt_tlv).peer_meta_data
  179. #define HAL_RX_TLV_AMPDU_FLAG_GET(_rx_pkt_tlv) \
  180. HAL_RX_MPDU_START(_rx_pkt_tlv).ampdu_flag
  181. #define HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(_rx_pkt_tlv) \
  182. HAL_RX_MPDU_START(_rx_pkt_tlv).sw_frame_group_id
  183. #define HAL_RX_TLV_KEYID_OCTET_GET(_rx_pkt_tlv) \
  184. HAL_RX_MSDU_END(_rx_pkt_tlv).key_id_octet
  185. #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(_rx_pkt_tlv) \
  186. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_number
  187. #define HAL_RX_TLV_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \
  188. HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id
  189. #define HAL_RX_TLV_L3_HEADER_PADDING_GET(_rx_pkt_tlv) \
  190. HAL_RX_MSDU_END(_rx_pkt_tlv).l3_header_padding
  191. #define HAL_RX_TLV_SA_IDX_GET(_rx_pkt_tlv) \
  192. HAL_RX_MSDU_END(_rx_pkt_tlv).sa_idx
  193. #define HAL_RX_TLV_DA_IDX_GET(_rx_pkt_tlv) \
  194. HAL_RX_MSDU_END(_rx_pkt_tlv).da_idx_or_sw_peer_id
  195. #define HAL_RX_TLV_FIRST_MSDU_GET(_rx_pkt_tlv) \
  196. HAL_RX_MSDU_END(_rx_pkt_tlv).first_msdu
  197. #define HAL_RX_TLV_LAST_MSDU_GET(_rx_pkt_tlv) \
  198. HAL_RX_MSDU_END(_rx_pkt_tlv).last_msdu
  199. /*
  200. * Get tid from RX_MPDU_START
  201. */
  202. #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \
  203. HAL_RX_MPDU_START(_rx_pkt_tlv).tid
  204. #define HAL_RX_TLV_DA_IS_MCBC_GET(_rx_pkt_tlv) \
  205. HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_mcbc
  206. #define HAL_RX_TLV_SA_IS_VALID_GET(_rx_pkt_tlv) \
  207. HAL_RX_MSDU_END(_rx_pkt_tlv).sa_is_valid
  208. #define HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(_rx_pkt_tlv) \
  209. HAL_RX_MPDU_START(_rx_pkt_tlv).frame_encryption_info_valid
  210. #define HAL_RX_TLV_MPDU_PN_31_0_GET(_rx_pkt_tlv) \
  211. HAL_RX_MPDU_START(_rx_pkt_tlv).pn_31_0
  212. #define HAL_RX_TLV_MPDU_PN_63_32_GET(_rx_pkt_tlv) \
  213. HAL_RX_MPDU_START(_rx_pkt_tlv).pn_63_32
  214. #define HAL_RX_TLV_MPDU_PN_95_64_GET(_rx_pkt_tlv) \
  215. HAL_RX_MPDU_START(_rx_pkt_tlv).pn_95_64
  216. #define HAL_RX_TLV_MPDU_PN_127_96_GET(_rx_pkt_tlv) \
  217. HAL_RX_MPDU_START(_rx_pkt_tlv).pn_127_96
  218. #define HAL_RX_TLV_DA_IS_VALID_GET(_rx_pkt_tlv) \
  219. HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_valid
  220. #define HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_pkt_tlv) \
  221. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_valid
  222. #define HAL_RX_TLV_SW_PEER_ID_GET(_rx_pkt_tlv) \
  223. HAL_RX_MPDU_START(_rx_pkt_tlv).sw_peer_id
  224. #define HAL_RX_TLV_MPDU_GET_TODS(_rx_pkt_tlv) \
  225. HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds
  226. #define HAL_RX_TLV_MPDU_GET_FROMDS(_rx_pkt_tlv) \
  227. HAL_RX_MPDU_START(_rx_pkt_tlv).fr_ds
  228. #define HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(_rx_pkt_tlv) \
  229. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid
  230. #define HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_pkt_tlv) \
  231. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_valid
  232. #define HAL_RX_TLV_MPDU_AD1_31_0_GET(_rx_pkt_tlv) \
  233. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_31_0
  234. #define HAL_RX_TLV_MPDU_AD1_47_32_GET(_rx_pkt_tlv) \
  235. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_47_32
  236. #define HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_pkt_tlv) \
  237. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_valid
  238. #define HAL_RX_TLV_MPDU_AD2_15_0_GET(_rx_pkt_tlv) \
  239. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_15_0
  240. #define HAL_RX_TLV_MPDU_AD2_47_16_GET(_rx_pkt_tlv) \
  241. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_47_16
  242. #define HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_pkt_tlv) \
  243. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_valid
  244. #define HAL_RX_TLV_MPDU_AD3_31_0_GET(_rx_pkt_tlv) \
  245. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_31_0
  246. #define HAL_RX_TLV_MPDU_AD3_47_32_GET(_rx_pkt_tlv) \
  247. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_47_32
  248. #define HAL_RX_TLV_MPDU_AD4_31_0_GET(_rx_pkt_tlv) \
  249. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_31_0
  250. #define HAL_RX_TLV_MPDU_AD4_47_32_GET(_rx_pkt_tlv) \
  251. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_47_32
  252. #define HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_pkt_tlv) \
  253. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_control_valid
  254. #define HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \
  255. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid
  256. #define HAL_RX_TLV_GET_FC_VALID(_rx_pkt_tlv) \
  257. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid
  258. #define HAL_RX_TLV_GET_TO_DS_FLAG(_rx_pkt_tlv) \
  259. HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds
  260. #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_pkt_tlv) \
  261. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_field
  262. #define HAL_RX_TLV_FLOW_IDX_GET(_rx_pkt_tlv) \
  263. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx
  264. #define HAL_RX_TLV_REO_DEST_IND_GET(_rx_pkt_tlv) \
  265. HAL_RX_MSDU_END(_rx_pkt_tlv).reo_destination_indication
  266. #define HAL_RX_TLV_FLOW_IDX_INVALID_GET(_rx_pkt_tlv) \
  267. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_invalid
  268. #define HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(_rx_pkt_tlv) \
  269. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_timeout
  270. #define HAL_RX_TLV_FSE_METADATA_GET(_rx_pkt_tlv) \
  271. HAL_RX_MSDU_END(_rx_pkt_tlv).fse_metadata
  272. #define HAL_RX_TLV_CCE_METADATA_GET(_rx_pkt_tlv) \
  273. HAL_RX_MSDU_END(_rx_pkt_tlv).cce_metadata
  274. #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \
  275. HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code
  276. #define HAL_RX_TLV_GET_TCP_CHKSUM(_rx_pkt_tlv) \
  277. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum
  278. #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(_rx_pkt_tlv) \
  279. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_aggregation_continuation
  280. #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(_rx_pkt_tlv) \
  281. HAL_RX_MSDU_END(_rx_pkt_tlv).aggregation_count
  282. #define HAL_RX_TLV_GET_FISA_TIMEOUT(_rx_pkt_tlv) \
  283. HAL_RX_MSDU_END(_rx_pkt_tlv).fisa_timeout
  284. #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(_rx_pkt_tlv) \
  285. HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_l4_checksum
  286. #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(_rx_pkt_tlv) \
  287. HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_ip_length
  288. #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \
  289. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid
  290. #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \
  291. HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id
  292. #define HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(_rx_pkt_tlv) \
  293. HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_31_0
  294. #define HAL_RX_REO_QUEUE_DESC_ADDR_39_32_GET(_rx_pkt_tlv) \
  295. HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_39_32
  296. /* used by monitor mode for parsing from full TLV */
  297. #define HAL_RX_MON_GET_FC_VALID(_rx_mpdu_start) \
  298. HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MPDU_FRAME_CONTROL_VALID)
  299. #define HAL_RX_MON_GET_TO_DS_FLAG(_rx_mpdu_start) \
  300. HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, TO_DS)
  301. #define HAL_RX_MON_GET_MAC_ADDR2_VALID(_rx_mpdu_start) \
  302. HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MAC_ADDR_AD2_VALID)
  303. static inline
  304. uint32_t hal_rx_tlv_decap_format_get_be(void *hw_desc_addr)
  305. {
  306. struct rx_pkt_tlvs *rx_pkt_tlvs =
  307. (struct rx_pkt_tlvs *)hw_desc_addr;
  308. return HAL_RX_TLV_DECAP_FORMAT_GET(rx_pkt_tlvs);
  309. }
  310. static inline uint32_t hal_rx_tlv_msdu_done_get_be(uint8_t *buf)
  311. {
  312. return HAL_RX_TLV_MSDU_DONE_GET(buf);
  313. }
  314. /*
  315. * hal_rx_attn_first_mpdu_get(): get fist_mpdu bit from rx attention
  316. * @buf: pointer to rx_pkt_tlvs
  317. *
  318. * return: uint32_t(first_msdu)
  319. */
  320. static inline uint32_t hal_rx_tlv_first_mpdu_get_be(uint8_t *buf)
  321. {
  322. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  323. return HAL_RX_TLV_FIRST_MPDU_GET(rx_pkt_tlvs);
  324. }
  325. /*
  326. * hal_rx_msdu_cce_match_get(): get CCE match bit
  327. * from rx attention
  328. * @buf: pointer to rx_pkt_tlvs
  329. * Return: CCE match value
  330. */
  331. static inline bool hal_rx_msdu_cce_match_get_be(uint8_t *buf)
  332. {
  333. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  334. return HAL_RX_TLV_CCE_MATCH_GET(rx_pkt_tlvs);
  335. }
  336. /*
  337. * hal_rx_attn_phy_ppdu_id_get(): get phy_ppdu_id value
  338. * from rx attention
  339. * @buf: pointer to rx_pkt_tlvs
  340. *
  341. * Return: phy_ppdu_id
  342. */
  343. static inline uint16_t hal_rx_attn_phy_ppdu_id_get_be(uint8_t *buf)
  344. {
  345. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  346. uint16_t phy_ppdu_id;
  347. phy_ppdu_id = HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
  348. return phy_ppdu_id;
  349. }
  350. /*
  351. * hal_rx_tlv_phy_ppdu_id_get(): get phy_ppdu_id value
  352. * from rx attention
  353. * @buf: pointer to rx_pkt_tlvs
  354. *
  355. * Return: phy_ppdu_id
  356. */
  357. static inline uint16_t hal_rx_tlv_phy_ppdu_id_get_be(uint8_t *buf)
  358. {
  359. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  360. return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
  361. }
  362. /*
  363. * hal_rx_mpdu_peer_meta_data_set: set peer meta data in RX mpdu start tlv
  364. *
  365. * @buf: rx_tlv_hdr of the received packet
  366. * @peer_mdata: peer meta data to be set.
  367. * Return: void
  368. */
  369. static inline void
  370. hal_rx_mpdu_peer_meta_data_set_be(uint8_t *buf, uint32_t peer_mdata)
  371. {
  372. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  373. HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs) = peer_mdata;
  374. }
  375. /*
  376. * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START
  377. */
  378. static inline uint32_t hal_rx_mpdu_peer_meta_data_get_be(uint8_t *buf)
  379. {
  380. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  381. return HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs);
  382. }
  383. /**
  384. * hal_rx_mpdu_info_ampdu_flag_get_be(): get ampdu flag bit
  385. * from rx mpdu info
  386. * @buf: pointer to rx_pkt_tlvs
  387. *
  388. * Return: ampdu flag
  389. */
  390. static inline bool hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t *buf)
  391. {
  392. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  393. return !!HAL_RX_TLV_AMPDU_FLAG_GET(rx_pkt_tlvs);
  394. }
  395. /**
  396. * hal_rx_tlv_msdu_len_get(): API to get the MSDU length
  397. * from rx_msdu_start TLV
  398. *
  399. * @ buf: pointer to the start of RX PKT TLV headers
  400. * Return: msdu length
  401. */
  402. static inline uint32_t hal_rx_tlv_msdu_len_get_be(uint8_t *buf)
  403. {
  404. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  405. return HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs);
  406. }
  407. /**
  408. * hal_rx_tlv_msdu_len_set(): API to set the MSDU length
  409. * from rx_msdu_start TLV
  410. *
  411. * @buf: pointer to the start of RX PKT TLV headers
  412. * @len: msdu length
  413. *
  414. * Return: none
  415. */
  416. static inline void hal_rx_tlv_msdu_len_set_be(uint8_t *buf, uint32_t len)
  417. {
  418. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  419. HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs) = len;
  420. }
  421. /*
  422. * hal_rx_tlv_bw_get(): API to get the Bandwidth
  423. * Interval from rx_msdu_start
  424. *
  425. * @buf: pointer to the start of RX PKT TLV header
  426. * Return: uint32_t(bw)
  427. */
  428. static inline uint32_t hal_rx_tlv_bw_get_be(uint8_t *buf)
  429. {
  430. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  431. return HAL_RX_TLV_BW_GET(rx_pkt_tlvs);
  432. }
  433. /**
  434. * hal_rx_tlv_toeplitz_get: API to get the toeplitz hash
  435. * from rx_msdu_start TLV
  436. *
  437. * @ buf: pointer to the start of RX PKT TLV headers
  438. * Return: toeplitz hash
  439. */
  440. static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf)
  441. {
  442. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  443. return HAL_RX_TLV_FLOWID_TOEPLITZ_GET(rx_pkt_tlvs);
  444. }
  445. /**
  446. * hal_rx_tlv_msdu_sgi_get(): API to get the Short Gaurd
  447. * Interval from rx_msdu_start TLV
  448. *
  449. * @buf: pointer to the start of RX PKT TLV headers
  450. * Return: uint32_t(sgi)
  451. */
  452. static inline uint32_t hal_rx_tlv_sgi_get_be(uint8_t *buf)
  453. {
  454. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  455. return HAL_RX_TLV_SGI_GET(rx_pkt_tlvs);
  456. }
  457. /**
  458. * hal_rx_tlv_msdu_rate_mcs_get(): API to get the MCS rate
  459. * from rx_msdu_start TLV
  460. *
  461. * @buf: pointer to the start of RX PKT TLV headers
  462. * Return: uint32_t(rate_mcs)
  463. */
  464. static inline uint32_t hal_rx_tlv_rate_mcs_get_be(uint8_t *buf)
  465. {
  466. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  467. uint32_t rate_mcs;
  468. rate_mcs = HAL_RX_TLV_RATE_MCS_GET(rx_pkt_tlvs);
  469. return rate_mcs;
  470. }
  471. /*
  472. * Get key index from RX_MSDU_END
  473. */
  474. /*
  475. * hal_rx_msdu_get_keyid(): API to get the key id if the decrypted packet
  476. * from rx_msdu_end
  477. *
  478. * @buf: pointer to the start of RX PKT TLV header
  479. * Return: uint32_t(key id)
  480. */
  481. static inline uint8_t hal_rx_msdu_get_keyid_be(uint8_t *buf)
  482. {
  483. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  484. uint32_t keyid_octet;
  485. keyid_octet = HAL_RX_TLV_KEYID_OCTET_GET(rx_pkt_tlvs);
  486. return keyid_octet & 0x3;
  487. }
  488. /*
  489. * hal_rx_tlv_get_rssi(): API to get the rssi of received pkt
  490. * from rx_msdu_start
  491. *
  492. * @buf: pointer to the start of RX PKT TLV header
  493. * Return: uint32_t(rssi)
  494. */
  495. static inline uint32_t hal_rx_tlv_get_rssi_be(uint8_t *buf)
  496. {
  497. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  498. uint32_t rssi;
  499. rssi = HAL_RX_TLV_RSSI_GET(rx_pkt_tlvs);
  500. return rssi;
  501. }
  502. /*
  503. * hal_rx_tlv_get_freq(): API to get the frequency of operating channel
  504. * from rx_msdu_start
  505. *
  506. * @buf: pointer to the start of RX PKT TLV header
  507. * Return: uint32_t(frequency)
  508. */
  509. static inline uint32_t hal_rx_tlv_get_freq_be(uint8_t *buf)
  510. {
  511. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  512. uint32_t freq;
  513. freq = HAL_RX_TLV_FREQ_GET(rx_pkt_tlvs);
  514. return freq;
  515. }
  516. /*
  517. * hal_rx_tlv_get_pkt_type(): API to get the pkt type
  518. * from rx_msdu_start
  519. *
  520. * @buf: pointer to the start of RX PKT TLV header
  521. * Return: uint32_t(pkt type)
  522. */
  523. static inline uint32_t hal_rx_tlv_get_pkt_type_be(uint8_t *buf)
  524. {
  525. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  526. uint32_t pkt_type;
  527. pkt_type = HAL_RX_TLV_PKT_TYPE_GET(rx_pkt_tlvs);
  528. return pkt_type;
  529. }
  530. /*******************************************************************************
  531. * RX ERROR APIS
  532. ******************************************************************************/
  533. /**
  534. * hal_rx_tlv_decrypt_err_get(): API to get the Decrypt ERR
  535. * from rx_mpdu_end TLV
  536. *
  537. * @buf: pointer to the start of RX PKT TLV headers
  538. * Return: uint32_t(decrypt_err)
  539. */
  540. static inline uint32_t hal_rx_tlv_decrypt_err_get_be(uint8_t *buf)
  541. {
  542. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  543. uint32_t decrypt_err;
  544. decrypt_err = HAL_RX_TLV_DECRYPT_ERR_GET(rx_pkt_tlvs);
  545. return decrypt_err;
  546. }
  547. /**
  548. * hal_rx_tlv_mic_err_get(): API to get the MIC ERR
  549. * from rx_tlv TLV
  550. *
  551. * @buf: pointer to the start of RX PKT TLV headers
  552. * Return: uint32_t(mic_err)
  553. */
  554. static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf)
  555. {
  556. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  557. uint32_t mic_err;
  558. mic_err = HAL_RX_TLV_MIC_ERR_GET(rx_pkt_tlvs);
  559. return mic_err;
  560. }
  561. /**
  562. * hal_get_reo_ent_desc_qdesc_addr_be(): API to get qdesc address of reo
  563. * entrance ring desc
  564. *
  565. * @desc: reo entrance ring descriptor
  566. * Return: qdesc adrress
  567. */
  568. static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc)
  569. {
  570. return desc + REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;
  571. }
  572. /**
  573. * hal_rx_get_qdesc_addr_be(): API to get qdesc address of reo
  574. * entrance ring desc
  575. *
  576. * @dst_ring_desc: reo dest ring descriptor (used for Lithium DP)
  577. * @buf: pointer to the start of RX PKT TLV headers
  578. * Return: qdesc adrress in reo destination ring buffer
  579. */
  580. static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc,
  581. uint8_t *buf)
  582. {
  583. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  584. return (uint64_t)HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(rx_pkt_tlvs);
  585. }
  586. /**
  587. * hal_set_reo_ent_desc_reo_dest_ind_be(): API to set reo destination
  588. * indication of reo entrance ring desc
  589. *
  590. * @desc: reo ent ring descriptor
  591. * @dst_ind: reo destination indication value
  592. * Return: None
  593. */
  594. static inline void
  595. hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t *desc, uint32_t dst_ind)
  596. {
  597. HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING,
  598. REO_DESTINATION_INDICATION, dst_ind);
  599. }
  600. /**
  601. * hal_rx_mpdu_sequence_number_get() - Get mpdu sequence number
  602. * @buf: pointer to packet buffer
  603. *
  604. * Return: mpdu sequence
  605. */
  606. static inline int hal_rx_mpdu_sequence_number_get_be(uint8_t *buf)
  607. {
  608. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  609. return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs);
  610. }
  611. /**
  612. * hal_rx_msdu_packet_metadata_get(): API to get the
  613. * msdu information from rx_msdu_end TLV
  614. *
  615. * @ buf: pointer to the start of RX PKT TLV headers
  616. * @ hal_rx_msdu_metadata: pointer to the msdu info structure
  617. */
  618. static inline void
  619. hal_rx_msdu_packet_metadata_get_generic_be(uint8_t *buf,
  620. void *pkt_msdu_metadata)
  621. {
  622. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  623. struct hal_rx_msdu_metadata *msdu_metadata =
  624. (struct hal_rx_msdu_metadata *)pkt_msdu_metadata;
  625. msdu_metadata->l3_hdr_pad =
  626. HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs);
  627. msdu_metadata->sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs);
  628. msdu_metadata->da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs);
  629. msdu_metadata->sa_sw_peer_id =
  630. HAL_RX_TLV_SA_SW_PEER_ID_GET(rx_pkt_tlvs);
  631. }
  632. /*
  633. * hal_rx_msdu_start_nss_get_kiwi(): API to get the NSS
  634. * Interval from rx_msdu_start
  635. *
  636. * @buf: pointer to the start of RX PKT TLV header
  637. * Return: uint32_t(nss)
  638. */
  639. static inline uint32_t hal_rx_tlv_nss_get_be(uint8_t *buf)
  640. {
  641. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  642. uint8_t mimo_ss_bitmap;
  643. mimo_ss_bitmap = HAL_RX_TLV_MIMO_SS_BITMAP(rx_pkt_tlvs);
  644. return qdf_get_hweight8(mimo_ss_bitmap);
  645. }
  646. #ifdef GET_MSDU_AGGREGATION
  647. #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\
  648. {\
  649. bool first_msdu, last_msdu; \
  650. first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_desc);\
  651. last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_desc);\
  652. if (first_msdu && last_msdu)\
  653. rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\
  654. else\
  655. rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \
  656. } \
  657. #define HAL_RX_SET_MSDU_AGGREGATION((rs_mpdu), (rs_ppdu))\
  658. {\
  659. if (rs_mpdu->rs_flags & IEEE80211_AMSDU_FLAG)\
  660. rs_ppdu->rs_flags |= IEEE80211_AMSDU_FLAG;\
  661. } \
  662. #else
  663. #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)
  664. #define HAL_RX_SET_MSDU_AGGREGATION(rs_mpdu, rs_ppdu)
  665. #endif
  666. /**
  667. * hal_rx_mon_hw_desc_get_mpdu_status_be(): Retrieve MPDU status
  668. *
  669. * @ hw_desc_addr: Start address of Rx HW TLVs
  670. * @ rs: Status for monitor mode
  671. *
  672. * Return: void
  673. */
  674. static inline void
  675. hal_rx_mon_hw_desc_get_mpdu_status_be(void *hw_desc_addr,
  676. struct mon_rx_status *rs)
  677. {
  678. uint32_t reg_value;
  679. struct rx_pkt_tlvs *rx_desc =
  680. (struct rx_pkt_tlvs *)hw_desc_addr;
  681. const uint32_t sgi_hw_to_cdp[] = {
  682. CDP_SGI_0_8_US,
  683. CDP_SGI_0_4_US,
  684. CDP_SGI_1_6_US,
  685. CDP_SGI_3_2_US,
  686. };
  687. HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs);
  688. rs->ant_signal_db = HAL_RX_TLV_ANT_SIGNAL_DB_GET(rx_desc);
  689. rs->is_stbc = HAL_RX_TLV_STBC_GET(rx_desc);
  690. reg_value = HAL_RX_TLV_SGI_GET(rx_desc);
  691. rs->sgi = sgi_hw_to_cdp[reg_value];
  692. reg_value = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_desc);
  693. rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0;
  694. /* TODO: rs->beamformed should be set for SU beamforming also */
  695. }
  696. static inline uint32_t hal_rx_tlv_tid_get_be(uint8_t *buf)
  697. {
  698. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  699. uint32_t tid;
  700. tid = HAL_RX_TLV_TID_GET(rx_pkt_tlvs);
  701. return tid;
  702. }
  703. /*
  704. * hal_rx_tlv_reception_type_get(): API to get the reception type
  705. * Interval from rx_msdu_start
  706. *
  707. * @buf: pointer to the start of RX PKT TLV header
  708. * Return: uint32_t(reception_type)
  709. */
  710. static inline
  711. uint32_t hal_rx_tlv_reception_type_get_be(uint8_t *buf)
  712. {
  713. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  714. uint32_t reception_type;
  715. reception_type = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_pkt_tlvs);
  716. return reception_type;
  717. }
  718. /**
  719. * hal_rx_msdu_end_da_idx_get_be: API to get da_idx
  720. * from rx_msdu_end TLV
  721. *
  722. * @ buf: pointer to the start of RX PKT TLV headers
  723. * Return: da index
  724. */
  725. static inline uint16_t hal_rx_msdu_end_da_idx_get_be(uint8_t *buf)
  726. {
  727. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  728. uint16_t da_idx;
  729. da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs);
  730. return da_idx;
  731. }
  732. /**
  733. * hal_rx_get_rx_fragment_number_be(): Function to retrieve rx fragment number
  734. *
  735. * @nbuf: Network buffer
  736. * Returns: rx fragment number
  737. */
  738. static inline
  739. uint8_t hal_rx_get_rx_fragment_number_be(uint8_t *buf)
  740. {
  741. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  742. /* Return first 4 bits as fragment number */
  743. return (HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs) &
  744. DOT11_SEQ_FRAG_MASK);
  745. }
  746. /**
  747. * hal_rx_msdu_end_da_is_mcbc_get_be(): API to check if pkt is MCBC
  748. * from rx_msdu_end TLV
  749. *
  750. * @ buf: pointer to the start of RX PKT TLV headers
  751. * Return: da_is_mcbc
  752. */
  753. static inline uint8_t
  754. hal_rx_tlv_da_is_mcbc_get_be(uint8_t *buf)
  755. {
  756. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  757. return HAL_RX_TLV_DA_IS_MCBC_GET(rx_pkt_tlvs);
  758. }
  759. /**
  760. * hal_rx_tlvd_sa_is_valid_get_be(): API to get the sa_is_valid bit from
  761. * rx_msdu_end TLV
  762. *
  763. * @ buf: pointer to the start of RX PKT TLV headers
  764. * Return: sa_is_valid bit
  765. */
  766. static inline uint8_t
  767. hal_rx_tlv_sa_is_valid_get_be(uint8_t *buf)
  768. {
  769. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  770. uint8_t sa_is_valid;
  771. sa_is_valid = HAL_RX_TLV_SA_IS_VALID_GET(rx_pkt_tlvs);
  772. return sa_is_valid;
  773. }
  774. /**
  775. * hal_rx_tlv_sa_idx_get_be(): API to get the sa_idx from rx_msdu_end TLV
  776. *
  777. * @ buf: pointer to the start of RX PKT TLV headers
  778. * Return: sa_idx (SA AST index)
  779. */
  780. static inline
  781. uint16_t hal_rx_tlv_sa_idx_get_be(uint8_t *buf)
  782. {
  783. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  784. uint16_t sa_idx;
  785. sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs);
  786. return sa_idx;
  787. }
  788. /**
  789. * hal_rx_desc_is_first_msdu_be() - Check if first msdu
  790. *
  791. * @hal_soc_hdl: hal_soc handle
  792. * @hw_desc_addr: hardware descriptor address
  793. *
  794. * Return: 0 - success/ non-zero failure
  795. */
  796. static inline uint32_t hal_rx_desc_is_first_msdu_be(void *hw_desc_addr)
  797. {
  798. struct rx_pkt_tlvs *rx_pkt_tlvs =
  799. (struct rx_pkt_tlvs *)hw_desc_addr;
  800. return HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs);
  801. }
  802. /**
  803. * hal_rx_tlv_l3_hdr_padding_get_be(): API to get the l3_header padding
  804. * from rx_msdu_end TLV
  805. *
  806. * @ buf: pointer to the start of RX PKT TLV headers
  807. * Return: number of l3 header padding bytes
  808. */
  809. static inline uint32_t hal_rx_tlv_l3_hdr_padding_get_be(uint8_t *buf)
  810. {
  811. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  812. uint32_t l3_header_padding;
  813. l3_header_padding = HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs);
  814. return l3_header_padding;
  815. }
  816. /*
  817. * @ hal_rx_encryption_info_valid_be: Returns encryption type.
  818. *
  819. * @ buf: rx_tlv_hdr of the received packet
  820. * @ Return: encryption type
  821. */
  822. static inline uint32_t hal_rx_encryption_info_valid_be(uint8_t *buf)
  823. {
  824. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  825. uint32_t encryption_info =
  826. HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(rx_pkt_tlvs);
  827. return encryption_info;
  828. }
  829. /*
  830. * @ hal_rx_print_pn_be: Prints the PN of rx packet.
  831. *
  832. * @ buf: rx_tlv_hdr of the received packet
  833. * @ Return: void
  834. */
  835. static inline void hal_rx_print_pn_be(uint8_t *buf)
  836. {
  837. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  838. uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs);
  839. uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs);
  840. uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs);
  841. uint32_t pn_127_96 = HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs);
  842. hal_debug("PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x ",
  843. pn_127_96, pn_95_64, pn_63_32, pn_31_0);
  844. }
  845. static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num)
  846. {
  847. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  848. pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs);
  849. pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs) << 32);
  850. pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs);
  851. pn_num[1] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs) << 32);
  852. }
  853. /**
  854. * hal_rx_tlv_first_msdu_get_be: API to get first msdu status
  855. * from rx_msdu_end TLV
  856. *
  857. * @ buf: pointer to the start of RX PKT TLV headers
  858. * Return: first_msdu
  859. */
  860. static inline uint8_t hal_rx_tlv_first_msdu_get_be(uint8_t *buf)
  861. {
  862. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  863. uint8_t first_msdu;
  864. first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs);
  865. return first_msdu;
  866. }
  867. /**
  868. * hal_rx_tlv_da_is_valid_get_be: API to check if da is valid
  869. * from rx_msdu_end TLV
  870. *
  871. * @ buf: pointer to the start of RX PKT TLV headers
  872. * Return: da_is_valid
  873. */
  874. static inline uint8_t hal_rx_tlv_da_is_valid_get_be(uint8_t *buf)
  875. {
  876. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  877. uint8_t da_is_valid;
  878. da_is_valid = HAL_RX_TLV_DA_IS_VALID_GET(rx_pkt_tlvs);
  879. return da_is_valid;
  880. }
  881. /**
  882. * hal_rx_tlv_last_msdu_get_be: API to get last msdu status
  883. * from rx_msdu_end TLV
  884. *
  885. * @ buf: pointer to the start of RX PKT TLV headers
  886. * Return: last_msdu
  887. */
  888. static inline uint8_t hal_rx_tlv_last_msdu_get_be(uint8_t *buf)
  889. {
  890. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  891. uint8_t last_msdu;
  892. last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_pkt_tlvs);
  893. return last_msdu;
  894. }
  895. /*
  896. * hal_rx_get_mpdu_mac_ad4_valid_be(): Retrieves if mpdu 4th addr is valid
  897. *
  898. * @nbuf: Network buffer
  899. * Returns: value of mpdu 4th address valid field
  900. */
  901. static inline bool hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t *buf)
  902. {
  903. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  904. bool ad4_valid = 0;
  905. ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs);
  906. return ad4_valid;
  907. }
  908. /**
  909. * hal_rx_mpdu_start_sw_peer_id_get_be: Retrieve sw peer_id
  910. * @buf: network buffer
  911. *
  912. * Return: sw peer_id
  913. */
  914. static inline uint32_t hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t *buf)
  915. {
  916. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  917. return HAL_RX_TLV_SW_PEER_ID_GET(rx_pkt_tlvs);
  918. }
  919. /**
  920. * hal_rx_mpdu_get_to_ds_be(): API to get the tods info
  921. * from rx_mpdu_start
  922. *
  923. * @buf: pointer to the start of RX PKT TLV header
  924. * Return: uint32_t(to_ds)
  925. */
  926. static inline uint32_t hal_rx_mpdu_get_to_ds_be(uint8_t *buf)
  927. {
  928. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  929. return HAL_RX_TLV_MPDU_GET_TODS(rx_pkt_tlvs);
  930. }
  931. /*
  932. * hal_rx_mpdu_get_fr_ds_be(): API to get the from ds info
  933. * from rx_mpdu_start
  934. *
  935. * @buf: pointer to the start of RX PKT TLV header
  936. * Return: uint32_t(fr_ds)
  937. */
  938. static inline uint32_t hal_rx_mpdu_get_fr_ds_be(uint8_t *buf)
  939. {
  940. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  941. return HAL_RX_TLV_MPDU_GET_FROMDS(rx_pkt_tlvs);
  942. }
  943. /*
  944. * hal_rx_get_mpdu_frame_control_valid_be(): Retrieves mpdu
  945. * frame control valid
  946. *
  947. * @nbuf: Network buffer
  948. * Returns: value of frame control valid field
  949. */
  950. static inline uint8_t hal_rx_get_mpdu_frame_control_valid_be(uint8_t *buf)
  951. {
  952. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  953. return HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(rx_pkt_tlvs);
  954. }
  955. /*
  956. * hal_rx_mpdu_get_addr1_be(): API to check get address1 of the mpdu
  957. *
  958. * @buf: pointer to the start of RX PKT TLV headera
  959. * @mac_addr: pointer to mac address
  960. * Return: success/failure
  961. */
  962. static inline QDF_STATUS hal_rx_mpdu_get_addr1_be(uint8_t *buf,
  963. uint8_t *mac_addr)
  964. {
  965. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  966. struct __attribute__((__packed__)) hal_addr1 {
  967. uint32_t ad1_31_0;
  968. uint16_t ad1_47_32;
  969. };
  970. struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
  971. uint32_t mac_addr_ad1_valid;
  972. mac_addr_ad1_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(rx_pkt_tlvs);
  973. if (mac_addr_ad1_valid) {
  974. addr->ad1_31_0 = HAL_RX_TLV_MPDU_AD1_31_0_GET(rx_pkt_tlvs);
  975. addr->ad1_47_32 = HAL_RX_TLV_MPDU_AD1_47_32_GET(rx_pkt_tlvs);
  976. return QDF_STATUS_SUCCESS;
  977. }
  978. return QDF_STATUS_E_FAILURE;
  979. }
  980. /*
  981. * hal_rx_mpdu_get_addr2_be(): API to check get address2 of the mpdu
  982. * in the packet
  983. *
  984. * @buf: pointer to the start of RX PKT TLV header
  985. * @mac_addr: pointer to mac address
  986. * Return: success/failure
  987. */
  988. static inline QDF_STATUS hal_rx_mpdu_get_addr2_be(uint8_t *buf,
  989. uint8_t *mac_addr)
  990. {
  991. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  992. struct __attribute__((__packed__)) hal_addr2 {
  993. uint16_t ad2_15_0;
  994. uint32_t ad2_47_16;
  995. };
  996. struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr;
  997. uint32_t mac_addr_ad2_valid;
  998. mac_addr_ad2_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs);
  999. if (mac_addr_ad2_valid) {
  1000. addr->ad2_15_0 = HAL_RX_TLV_MPDU_AD2_15_0_GET(rx_pkt_tlvs);
  1001. addr->ad2_47_16 = HAL_RX_TLV_MPDU_AD2_47_16_GET(rx_pkt_tlvs);
  1002. return QDF_STATUS_SUCCESS;
  1003. }
  1004. return QDF_STATUS_E_FAILURE;
  1005. }
  1006. /*
  1007. * hal_rx_mpdu_get_addr3_be(): API to get address3 of the mpdu
  1008. * in the packet
  1009. *
  1010. * @buf: pointer to the start of RX PKT TLV header
  1011. * @mac_addr: pointer to mac address
  1012. * Return: success/failure
  1013. */
  1014. static inline QDF_STATUS hal_rx_mpdu_get_addr3_be(uint8_t *buf,
  1015. uint8_t *mac_addr)
  1016. {
  1017. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1018. struct __attribute__((__packed__)) hal_addr3 {
  1019. uint32_t ad3_31_0;
  1020. uint16_t ad3_47_32;
  1021. };
  1022. struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr;
  1023. uint32_t mac_addr_ad3_valid;
  1024. mac_addr_ad3_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(rx_pkt_tlvs);
  1025. if (mac_addr_ad3_valid) {
  1026. addr->ad3_31_0 = HAL_RX_TLV_MPDU_AD3_31_0_GET(rx_pkt_tlvs);
  1027. addr->ad3_47_32 = HAL_RX_TLV_MPDU_AD3_47_32_GET(rx_pkt_tlvs);
  1028. return QDF_STATUS_SUCCESS;
  1029. }
  1030. return QDF_STATUS_E_FAILURE;
  1031. }
  1032. /*
  1033. * hal_rx_mpdu_get_addr4_be(): API to get address4 of the mpdu
  1034. * in the packet
  1035. *
  1036. * @buf: pointer to the start of RX PKT TLV header
  1037. * @mac_addr: pointer to mac address
  1038. * Return: success/failure
  1039. */
  1040. static inline QDF_STATUS hal_rx_mpdu_get_addr4_be(uint8_t *buf,
  1041. uint8_t *mac_addr)
  1042. {
  1043. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1044. struct __attribute__((__packed__)) hal_addr4 {
  1045. uint32_t ad4_31_0;
  1046. uint16_t ad4_47_32;
  1047. };
  1048. struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr;
  1049. uint32_t mac_addr_ad4_valid;
  1050. mac_addr_ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs);
  1051. if (mac_addr_ad4_valid) {
  1052. addr->ad4_31_0 = HAL_RX_TLV_MPDU_AD4_31_0_GET(rx_pkt_tlvs);
  1053. addr->ad4_47_32 = HAL_RX_TLV_MPDU_AD4_47_32_GET(rx_pkt_tlvs);
  1054. return QDF_STATUS_SUCCESS;
  1055. }
  1056. return QDF_STATUS_E_FAILURE;
  1057. }
  1058. /*
  1059. * hal_rx_get_mpdu_sequence_control_valid_be(): Get mpdu
  1060. * sequence control valid
  1061. *
  1062. * @nbuf: Network buffer
  1063. * Returns: value of sequence control valid field
  1064. */
  1065. static inline uint8_t hal_rx_get_mpdu_sequence_control_valid_be(uint8_t *buf)
  1066. {
  1067. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1068. return HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_pkt_tlvs);
  1069. }
  1070. /**
  1071. * hal_rx_tid_get_be: get tid based on qos control valid.
  1072. * @hal_soc_hdl: hal_soc handle
  1073. * @ buf: pointer to rx pkt TLV.
  1074. *
  1075. * Return: tid
  1076. */
  1077. static inline uint32_t hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl,
  1078. uint8_t *buf)
  1079. {
  1080. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1081. uint8_t qos_control_valid =
  1082. HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(rx_pkt_tlvs);
  1083. if (qos_control_valid)
  1084. return hal_rx_tlv_tid_get_be(buf);
  1085. return HAL_RX_NON_QOS_TID;
  1086. }
  1087. static inline
  1088. uint8_t hal_rx_get_fc_valid_be(uint8_t *buf)
  1089. {
  1090. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1091. return HAL_RX_TLV_GET_FC_VALID(rx_pkt_tlvs);
  1092. }
  1093. static inline uint8_t hal_rx_get_to_ds_flag_be(uint8_t *buf)
  1094. {
  1095. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1096. return HAL_RX_TLV_GET_TO_DS_FLAG(rx_pkt_tlvs);
  1097. }
  1098. static inline uint8_t hal_rx_get_mac_addr2_valid_be(uint8_t *buf)
  1099. {
  1100. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1101. return HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs);
  1102. }
  1103. /**
  1104. * hal_rx_is_unicast_be: check packet is unicast frame or not.
  1105. *
  1106. * @ buf: pointer to rx pkt TLV.
  1107. * Return: true on unicast.
  1108. */
  1109. static inline bool hal_rx_is_unicast_be(uint8_t *buf)
  1110. {
  1111. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1112. uint32_t grp_id;
  1113. grp_id = HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(rx_pkt_tlvs);
  1114. return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
  1115. }
  1116. static inline uint8_t hal_rx_get_filter_category_be(uint8_t *buf)
  1117. {
  1118. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1119. return HAL_RX_GET_FILTER_CATEGORY(rx_pkt_tlvs);
  1120. }
  1121. /**
  1122. * hal_rx_hw_desc_get_ppduid_get_be(): retrieve ppdu id
  1123. * @rx_tlv_hdr: start address of rx_pkt_tlvs
  1124. * @rxdma_dst_ring_desc: Rx HW descriptor
  1125. *
  1126. * Return: ppdu id
  1127. */
  1128. static inline uint32_t
  1129. hal_rx_hw_desc_get_ppduid_get_be(void *rx_tlv_hdr, void *rxdma_dst_ring_desc)
  1130. {
  1131. struct rx_pkt_tlvs *rx_pkt_tlvs =
  1132. (struct rx_pkt_tlvs *)rx_tlv_hdr;
  1133. return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
  1134. }
  1135. static inline uint32_t
  1136. hal_rx_get_ppdu_id_be(uint8_t *buf)
  1137. {
  1138. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1139. return HAL_RX_GET_PPDU_ID(rx_pkt_tlvs);
  1140. }
  1141. /**
  1142. * hal_rx_msdu_flow_idx_get_be: API to get flow index
  1143. * from rx_msdu_end TLV
  1144. * @buf: pointer to the start of RX PKT TLV headers
  1145. *
  1146. * Return: flow index value from MSDU END TLV
  1147. */
  1148. static inline uint32_t hal_rx_msdu_flow_idx_get_be(uint8_t *buf)
  1149. {
  1150. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1151. return HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs);
  1152. }
  1153. /**
  1154. * hal_rx_msdu_get_reo_destination_indication_be: API to get
  1155. * reo_destination_indication from rx_msdu_end TLV
  1156. * @buf: pointer to the start of RX PKT TLV headers
  1157. * @reo_destination_indication: pointer to return value of
  1158. * reo_destination_indication
  1159. *
  1160. * Return: none
  1161. */
  1162. static inline void
  1163. hal_rx_msdu_get_reo_destination_indication_be(uint8_t *buf,
  1164. uint32_t *reo_destination_indication)
  1165. {
  1166. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1167. *reo_destination_indication = HAL_RX_TLV_REO_DEST_IND_GET(pkt_tlvs);
  1168. }
  1169. /**
  1170. * hal_rx_msdu_flow_idx_invalid_be: API to get flow index invalid
  1171. * from rx_msdu_end TLV
  1172. * @buf: pointer to the start of RX PKT TLV headers
  1173. *
  1174. * Return: flow index invalid value from MSDU END TLV
  1175. */
  1176. static inline bool hal_rx_msdu_flow_idx_invalid_be(uint8_t *buf)
  1177. {
  1178. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1179. return HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs);
  1180. }
  1181. /**
  1182. * hal_rx_msdu_flow_idx_timeout_be: API to get flow index timeout
  1183. * from rx_msdu_end TLV
  1184. * @buf: pointer to the start of RX PKT TLV headers
  1185. *
  1186. * Return: flow index timeout value from MSDU END TLV
  1187. */
  1188. static inline bool hal_rx_msdu_flow_idx_timeout_be(uint8_t *buf)
  1189. {
  1190. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1191. return HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs);
  1192. }
  1193. /**
  1194. * hal_rx_msdu_fse_metadata_get_be: API to get FSE metadata
  1195. * from rx_msdu_end TLV
  1196. * @buf: pointer to the start of RX PKT TLV headers
  1197. *
  1198. * Return: fse metadata value from MSDU END TLV
  1199. */
  1200. static inline uint32_t hal_rx_msdu_fse_metadata_get_be(uint8_t *buf)
  1201. {
  1202. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1203. return HAL_RX_TLV_FSE_METADATA_GET(pkt_tlvs);
  1204. }
  1205. /**
  1206. * hal_rx_msdu_cce_metadata_get_be: API to get CCE metadata
  1207. * from rx_msdu_end TLV
  1208. * @buf: pointer to the start of RX PKT TLV headers
  1209. *
  1210. * Return: cce_metadata
  1211. */
  1212. static inline uint16_t
  1213. hal_rx_msdu_cce_metadata_get_be(uint8_t *buf)
  1214. {
  1215. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1216. return HAL_RX_TLV_CCE_METADATA_GET(pkt_tlvs);
  1217. }
  1218. /**
  1219. * hal_rx_msdu_get_flow_params_be: API to get flow index, flow index invalid
  1220. * and flow index timeout from rx_msdu_end TLV
  1221. * @buf: pointer to the start of RX PKT TLV headers
  1222. * @flow_invalid: pointer to return value of flow_idx_valid
  1223. * @flow_timeout: pointer to return value of flow_idx_timeout
  1224. * @flow_index: pointer to return value of flow_idx
  1225. *
  1226. * Return: none
  1227. */
  1228. static inline void
  1229. hal_rx_msdu_get_flow_params_be(uint8_t *buf,
  1230. bool *flow_invalid,
  1231. bool *flow_timeout,
  1232. uint32_t *flow_index)
  1233. {
  1234. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1235. *flow_invalid = HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs);
  1236. *flow_timeout = HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs);
  1237. *flow_index = HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs);
  1238. }
  1239. /**
  1240. * hal_rx_tlv_get_tcp_chksum_be() - API to get tcp checksum
  1241. * @buf: rx_tlv_hdr
  1242. *
  1243. * Return: tcp checksum
  1244. */
  1245. static inline uint16_t
  1246. hal_rx_tlv_get_tcp_chksum_be(uint8_t *buf)
  1247. {
  1248. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1249. return HAL_RX_TLV_GET_TCP_CHKSUM(rx_pkt_tlvs);
  1250. }
  1251. /**
  1252. * hal_rx_get_rx_sequence_be(): Function to retrieve rx sequence number
  1253. *
  1254. * @nbuf: Network buffer
  1255. * Returns: rx sequence number
  1256. */
  1257. static inline
  1258. uint16_t hal_rx_get_rx_sequence_be(uint8_t *buf)
  1259. {
  1260. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1261. return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs);
  1262. }
  1263. #ifdef RECEIVE_OFFLOAD
  1264. #ifdef QCA_WIFI_KIWI_V2
  1265. static inline
  1266. uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf)
  1267. {
  1268. /*
  1269. * cumulative l4 checksum is not supported in V2 and
  1270. * cumulative_l4_checksum field is not present
  1271. */
  1272. return 0;
  1273. }
  1274. #else
  1275. /**
  1276. * hal_rx_get_fisa_cumulative_l4_checksum_be() - Retrieve cumulative
  1277. * checksum
  1278. * @buf: buffer pointer
  1279. *
  1280. * Return: cumulative checksum
  1281. */
  1282. static inline
  1283. uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf)
  1284. {
  1285. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1286. return HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(rx_pkt_tlvs);
  1287. }
  1288. #endif
  1289. /**
  1290. * hal_rx_get_fisa_cumulative_ip_length_be() - Retrieve cumulative
  1291. * ip length
  1292. * @buf: buffer pointer
  1293. *
  1294. * Return: cumulative length
  1295. */
  1296. static inline
  1297. uint16_t hal_rx_get_fisa_cumulative_ip_length_be(uint8_t *buf)
  1298. {
  1299. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1300. return HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(rx_pkt_tlvs);
  1301. }
  1302. /**
  1303. * hal_rx_get_udp_proto_be() - Retrieve udp proto value
  1304. * @buf: buffer
  1305. *
  1306. * Return: udp proto bit
  1307. */
  1308. static inline
  1309. bool hal_rx_get_udp_proto_be(uint8_t *buf)
  1310. {
  1311. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1312. return HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs);
  1313. }
  1314. #endif
  1315. /**
  1316. * hal_rx_get_flow_agg_continuation_be() - retrieve flow agg
  1317. * continuation
  1318. * @buf: buffer
  1319. *
  1320. * Return: flow agg
  1321. */
  1322. static inline
  1323. bool hal_rx_get_flow_agg_continuation_be(uint8_t *buf)
  1324. {
  1325. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1326. return HAL_RX_TLV_GET_FLOW_AGGR_CONT(rx_pkt_tlvs);
  1327. }
  1328. /**
  1329. * hal_rx_get_flow_agg_count_be()- Retrieve flow agg count
  1330. * @buf: buffer
  1331. *
  1332. * Return: flow agg count
  1333. */
  1334. static inline
  1335. uint8_t hal_rx_get_flow_agg_count_be(uint8_t *buf)
  1336. {
  1337. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1338. return HAL_RX_TLV_GET_FLOW_AGGR_COUNT(rx_pkt_tlvs);
  1339. }
  1340. /**
  1341. * hal_rx_get_fisa_timeout_be() - Retrieve fisa timeout
  1342. * @buf: buffer
  1343. *
  1344. * Return: fisa timeout
  1345. */
  1346. static inline
  1347. bool hal_rx_get_fisa_timeout_be(uint8_t *buf)
  1348. {
  1349. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1350. return HAL_RX_TLV_GET_FISA_TIMEOUT(rx_pkt_tlvs);
  1351. }
  1352. /**
  1353. * hal_rx_mpdu_start_tlv_tag_valid_be () - API to check if RX_MPDU_START
  1354. * tlv tag is valid
  1355. *
  1356. *@rx_tlv_hdr: start address of rx_pkt_tlvs
  1357. *
  1358. * Return: true if RX_MPDU_START is valied, else false.
  1359. */
  1360. static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr)
  1361. {
  1362. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)rx_tlv_hdr;
  1363. uint32_t tlv_tag;
  1364. tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv);
  1365. return tlv_tag == WIFIRX_MPDU_START_E ? true : false;
  1366. }
  1367. /**
  1368. * hal_rx_msdu_end_offset_get_generic(): API to get the
  1369. * msdu_end structure offset rx_pkt_tlv structure
  1370. *
  1371. * NOTE: API returns offset of msdu_end TLV from structure
  1372. * rx_pkt_tlvs
  1373. */
  1374. static inline uint32_t hal_rx_msdu_end_offset_get_generic(void)
  1375. {
  1376. return RX_PKT_TLV_OFFSET(msdu_end_tlv);
  1377. }
  1378. /**
  1379. * hal_rx_mpdu_start_offset_get_generic(): API to get the
  1380. * mpdu_start structure offset rx_pkt_tlv structure
  1381. *
  1382. * NOTE: API returns offset of attn TLV from structure
  1383. * rx_pkt_tlvs
  1384. */
  1385. static inline uint32_t hal_rx_mpdu_start_offset_get_generic(void)
  1386. {
  1387. return RX_PKT_TLV_OFFSET(mpdu_start_tlv);
  1388. }
  1389. #ifndef NO_RX_PKT_HDR_TLV
  1390. static inline uint32_t hal_rx_pkt_tlv_offset_get_generic(void)
  1391. {
  1392. return RX_PKT_TLV_OFFSET(pkt_hdr_tlv);
  1393. }
  1394. #endif
  1395. #ifdef RECEIVE_OFFLOAD
  1396. static inline int
  1397. hal_rx_tlv_get_offload_info_be(uint8_t *rx_tlv,
  1398. struct hal_offload_info *offload_info)
  1399. {
  1400. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)rx_tlv;
  1401. offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_pkt_tlvs);
  1402. offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_pkt_tlvs);
  1403. offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs);
  1404. offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs);
  1405. if (offload_info->tcp_proto) {
  1406. offload_info->tcp_pure_ack =
  1407. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_pkt_tlvs);
  1408. offload_info->tcp_offset =
  1409. HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs);
  1410. offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_pkt_tlvs);
  1411. offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_pkt_tlvs);
  1412. offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_pkt_tlvs);
  1413. }
  1414. return 0;
  1415. }
  1416. static inline int hal_rx_get_proto_params_be(uint8_t *buf, void *proto_params)
  1417. {
  1418. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1419. struct hal_proto_params *param =
  1420. (struct hal_proto_params *)proto_params;
  1421. param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs);
  1422. param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs);
  1423. param->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs);
  1424. return 0;
  1425. }
  1426. static inline int hal_rx_get_l3_l4_offsets_be(uint8_t *buf,
  1427. uint32_t *l3_hdr_offset,
  1428. uint32_t *l4_hdr_offset)
  1429. {
  1430. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1431. *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs);
  1432. *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs);
  1433. return 0;
  1434. }
  1435. #endif
  1436. /**
  1437. * hal_rx_msdu_start_msdu_len_get(): API to get the MSDU length
  1438. * from rx_msdu_start TLV
  1439. *
  1440. * @ buf: pointer to the start of RX PKT TLV headers
  1441. * Return: msdu length
  1442. */
  1443. static inline uint32_t hal_rx_msdu_start_msdu_len_get_be(uint8_t *buf)
  1444. {
  1445. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1446. uint32_t msdu_len;
  1447. msdu_len = HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs);
  1448. return msdu_len;
  1449. }
  1450. /**
  1451. * hal_rx_get_frame_ctrl_field(): Function to retrieve frame control field
  1452. *
  1453. * @nbuf: Network buffer
  1454. * Returns: rx more fragment bit
  1455. *
  1456. */
  1457. static inline uint16_t hal_rx_get_frame_ctrl_field_be(uint8_t *buf)
  1458. {
  1459. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1460. uint16_t frame_ctrl = 0;
  1461. frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_pkt_tlvs);
  1462. return frame_ctrl;
  1463. }
  1464. /*
  1465. * hal_rx_tlv_get_is_decrypted_be(): API to get the decrypt status of the
  1466. * packet from msdu_end
  1467. *
  1468. * @buf: pointer to the start of RX PKT TLV header
  1469. * Return: uint32_t(decryt status)
  1470. */
  1471. static inline uint32_t hal_rx_tlv_get_is_decrypted_be(uint8_t *buf)
  1472. {
  1473. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1474. uint32_t is_decrypt = 0;
  1475. uint32_t decrypt_status;
  1476. decrypt_status = HAL_RX_TLV_DECRYPT_STATUS_GET(rx_pkt_tlvs);
  1477. if (!decrypt_status)
  1478. is_decrypt = 1;
  1479. return is_decrypt;
  1480. }
  1481. //TODO - Currently going with NO-PKT-HDR, need to add pkt hdr tlv and check
  1482. static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf)
  1483. {
  1484. return buf + RX_PKT_TLVS_LEN;
  1485. }
  1486. /**
  1487. * hal_rx_priv_info_set_in_tlv_be(): Save the private info to
  1488. * the reserved bytes of rx_tlv_hdr
  1489. * @buf: start of rx_tlv_hdr
  1490. * @priv_data: hal_wbm_err_desc_info structure
  1491. * @len: length of the private data
  1492. * Return: void
  1493. */
  1494. static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf,
  1495. uint8_t *priv_data,
  1496. uint32_t len)
  1497. {
  1498. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1499. uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
  1500. RX_BE_PADDING0_BYTES : len;
  1501. qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len);
  1502. }
  1503. /**
  1504. * hal_rx_priv_info_get_from_tlv_be(): retrieve the private data from
  1505. * the reserved bytes of rx_tlv_hdr.
  1506. * @buf: start of rx_tlv_hdr
  1507. * @priv_data: Handle to get the private data, output parameter.
  1508. * @len: length of the private data
  1509. * Return: void
  1510. */
  1511. static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf,
  1512. uint8_t *priv_data,
  1513. uint32_t len)
  1514. {
  1515. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1516. uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
  1517. RX_BE_PADDING0_BYTES : len;
  1518. qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len);
  1519. }
  1520. /**
  1521. * hal_rx_tlv_csum_err_get_be() - Get IP and tcp-udp checksum fail flag
  1522. * @rx_tlv_hdr: start address of rx_tlv_hdr
  1523. * @ip_csum_err: buffer to return ip_csum_fail flag
  1524. * @tcp_udp_csum_fail: placeholder to return tcp-udp checksum fail flag
  1525. *
  1526. * Return: None
  1527. */
  1528. static inline void
  1529. hal_rx_tlv_csum_err_get_be(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err,
  1530. uint32_t *tcp_udp_csum_err)
  1531. {
  1532. struct rx_pkt_tlvs *rx_pkt_tlvs =
  1533. (struct rx_pkt_tlvs *)rx_tlv_hdr;
  1534. *ip_csum_err = HAL_RX_TLV_IP_CSUM_FAIL_GET(rx_pkt_tlvs);
  1535. *tcp_udp_csum_err = HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(rx_pkt_tlvs);
  1536. }
  1537. static inline
  1538. uint32_t hal_rx_tlv_mpdu_len_err_get_be(void *hw_desc_addr)
  1539. {
  1540. struct rx_pkt_tlvs *rx_pkt_tlvs =
  1541. (struct rx_pkt_tlvs *)hw_desc_addr;
  1542. return HAL_RX_TLV_MPDU_LEN_ERR_GET(rx_pkt_tlvs);
  1543. }
  1544. static inline
  1545. uint32_t hal_rx_tlv_mpdu_fcs_err_get_be(void *hw_desc_addr)
  1546. {
  1547. struct rx_pkt_tlvs *rx_pkt_tlvs =
  1548. (struct rx_pkt_tlvs *)hw_desc_addr;
  1549. return HAL_RX_TLV_MPDU_FCS_ERR_GET(rx_pkt_tlvs);
  1550. }
  1551. /**
  1552. * hal_rx_get_rx_more_frag_bit(): Function to retrieve more fragment bit
  1553. *
  1554. * @nbuf: Network buffer
  1555. * Returns: rx more fragment bit
  1556. */
  1557. static inline
  1558. uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf)
  1559. {
  1560. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1561. uint16_t frame_ctrl = 0;
  1562. frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(pkt_tlvs) >>
  1563. DOT11_FC1_MORE_FRAG_OFFSET;
  1564. /* more fragment bit if at offset bit 4 */
  1565. return frame_ctrl;
  1566. }
  1567. /*
  1568. * hal_rx_msdu_is_wlan_mcast_generic_be(): Check if the buffer is for multicast
  1569. * address
  1570. * @nbuf: Network buffer
  1571. *
  1572. * Returns: flag to indicate whether the nbuf has MC/BC address
  1573. */
  1574. static inline uint32_t hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf)
  1575. {
  1576. uint8_t *buf = qdf_nbuf_data(nbuf);
  1577. return HAL_RX_TLV_IS_MCAST_GET(buf);;
  1578. }
  1579. /**
  1580. * hal_rx_msdu_start_msdu_len_set_be(): API to set the MSDU length
  1581. * from rx_msdu_start TLV
  1582. *
  1583. * @buf: pointer to the start of RX PKT TLV headers
  1584. * @len: msdu length
  1585. *
  1586. * Return: none
  1587. */
  1588. static inline void
  1589. hal_rx_msdu_start_msdu_len_set_be(uint8_t *buf, uint32_t len)
  1590. {
  1591. HAL_RX_TLV_MSDU_LEN_GET(buf) = len;
  1592. }
  1593. /**
  1594. * hal_rx_mpdu_start_mpdu_qos_control_valid_get_be():
  1595. * Retrieve qos control valid bit from the tlv.
  1596. * @buf: pointer to rx pkt TLV.
  1597. *
  1598. * Return: qos control value.
  1599. */
  1600. static inline uint32_t
  1601. hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t *buf)
  1602. {
  1603. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1604. return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(pkt_tlvs);
  1605. }
  1606. /**
  1607. * hal_rx_msdu_end_sa_sw_peer_id_get_be(): API to get the
  1608. * sa_sw_peer_id from rx_msdu_end TLV
  1609. * @buf: pointer to the start of RX PKT TLV headers
  1610. *
  1611. * Return: sa_sw_peer_id index
  1612. */
  1613. static inline uint32_t
  1614. hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf)
  1615. {
  1616. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1617. hal_rx_msdu_end_t *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
  1618. return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
  1619. }
  1620. #endif /* _HAL_BE_RX_TLV_H_ */