qcedev.c 73 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QTI CE device driver.
  4. *
  5. * Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
  6. */
  7. #include <linux/mman.h>
  8. #include <linux/module.h>
  9. #include <linux/device.h>
  10. #include <linux/types.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/kernel.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/init.h>
  18. #include <linux/module.h>
  19. #include <linux/fs.h>
  20. #include <linux/uaccess.h>
  21. #include <linux/debugfs.h>
  22. #include <linux/scatterlist.h>
  23. #include <linux/crypto.h>
  24. #include "linux/qcom_crypto_device.h"
  25. #include "linux/qcedev.h"
  26. #include <linux/interconnect.h>
  27. #include <linux/delay.h>
  28. #include <crypto/hash.h>
  29. #include "qcedevi.h"
  30. #include "qce.h"
  31. #include "qcedev_smmu.h"
  32. #include "compat_qcedev.h"
  33. #include <linux/compat.h>
  34. #define CACHE_LINE_SIZE 64
  35. #define CE_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
  36. #define MAX_CEHW_REQ_TRANSFER_SIZE (128*32*1024)
  37. /*
  38. * Max wait time once a crypto request is done.
  39. * Assuming 5ms per crypto operation, this is calculated for
  40. * the scenario of having 3 offload reqs + 1 tz req + buffer.
  41. */
  42. #define MAX_CRYPTO_WAIT_TIME 25
  43. #define MAX_REQUEST_TIME 5000
  44. enum qcedev_req_status {
  45. QCEDEV_REQ_CURRENT = 0,
  46. QCEDEV_REQ_WAITING = 1,
  47. QCEDEV_REQ_SUBMITTED = 2,
  48. QCEDEV_REQ_DONE = 3,
  49. };
  50. static uint8_t _std_init_vector_sha1_uint8[] = {
  51. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  52. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  53. 0xC3, 0xD2, 0xE1, 0xF0
  54. };
  55. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  56. static uint8_t _std_init_vector_sha256_uint8[] = {
  57. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  58. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  59. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  60. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  61. };
  62. #define QCEDEV_CTX_KEY_MASK 0x000000ff
  63. #define QCEDEV_CTX_USE_HW_KEY 0x00000001
  64. #define QCEDEV_CTX_USE_PIPE_KEY 0x00000002
  65. static DEFINE_MUTEX(send_cmd_lock);
  66. static DEFINE_MUTEX(qcedev_sent_bw_req);
  67. static DEFINE_MUTEX(hash_access_lock);
  68. static dev_t qcedev_device_no;
  69. static struct class *driver_class;
  70. static struct device *class_dev;
  71. static const struct of_device_id qcedev_match[] = {
  72. { .compatible = "qcom,qcedev"},
  73. { .compatible = "qcom,qcedev,context-bank"},
  74. {}
  75. };
  76. MODULE_DEVICE_TABLE(of, qcedev_match);
  77. static int qcedev_control_clocks(struct qcedev_control *podev, bool enable)
  78. {
  79. unsigned int control_flag;
  80. int ret = 0;
  81. if (podev->ce_support.req_bw_before_clk) {
  82. if (enable)
  83. control_flag = QCE_BW_REQUEST_FIRST;
  84. else
  85. control_flag = QCE_CLK_DISABLE_FIRST;
  86. } else {
  87. if (enable)
  88. control_flag = QCE_CLK_ENABLE_FIRST;
  89. else
  90. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  91. }
  92. switch (control_flag) {
  93. case QCE_CLK_ENABLE_FIRST:
  94. ret = qce_enable_clk(podev->qce);
  95. if (ret) {
  96. pr_err("%s Unable enable clk\n", __func__);
  97. return ret;
  98. }
  99. ret = icc_set_bw(podev->icc_path,
  100. podev->icc_avg_bw, podev->icc_peak_bw);
  101. if (ret) {
  102. pr_err("%s Unable to set high bw\n", __func__);
  103. ret = qce_disable_clk(podev->qce);
  104. if (ret)
  105. pr_err("%s Unable disable clk\n", __func__);
  106. return ret;
  107. }
  108. break;
  109. case QCE_BW_REQUEST_FIRST:
  110. ret = icc_set_bw(podev->icc_path,
  111. podev->icc_avg_bw, podev->icc_peak_bw);
  112. if (ret) {
  113. pr_err("%s Unable to set high bw\n", __func__);
  114. return ret;
  115. }
  116. ret = qce_enable_clk(podev->qce);
  117. if (ret) {
  118. pr_err("%s Unable enable clk\n", __func__);
  119. ret = icc_set_bw(podev->icc_path, 0, 0);
  120. if (ret)
  121. pr_err("%s Unable to set low bw\n", __func__);
  122. return ret;
  123. }
  124. break;
  125. case QCE_CLK_DISABLE_FIRST:
  126. ret = qce_disable_clk(podev->qce);
  127. if (ret) {
  128. pr_err("%s Unable to disable clk\n", __func__);
  129. return ret;
  130. }
  131. ret = icc_set_bw(podev->icc_path, 0, 0);
  132. if (ret) {
  133. pr_err("%s Unable to set low bw\n", __func__);
  134. ret = qce_enable_clk(podev->qce);
  135. if (ret)
  136. pr_err("%s Unable enable clk\n", __func__);
  137. return ret;
  138. }
  139. break;
  140. case QCE_BW_REQUEST_RESET_FIRST:
  141. ret = icc_set_bw(podev->icc_path, 0, 0);
  142. if (ret) {
  143. pr_err("%s Unable to set low bw\n", __func__);
  144. return ret;
  145. }
  146. ret = qce_disable_clk(podev->qce);
  147. if (ret) {
  148. pr_err("%s Unable to disable clk\n", __func__);
  149. ret = icc_set_bw(podev->icc_path,
  150. podev->icc_avg_bw, podev->icc_peak_bw);
  151. if (ret)
  152. pr_err("%s Unable to set high bw\n", __func__);
  153. return ret;
  154. }
  155. break;
  156. default:
  157. return -ENOENT;
  158. }
  159. return 0;
  160. }
  161. static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
  162. bool high_bw_req)
  163. {
  164. int ret = 0;
  165. if(podev == NULL) return;
  166. mutex_lock(&qcedev_sent_bw_req);
  167. if (high_bw_req) {
  168. if (podev->high_bw_req_count == 0) {
  169. ret = qcedev_control_clocks(podev, true);
  170. if (ret)
  171. goto exit_unlock_mutex;
  172. ret = qce_set_irqs(podev->qce, true);
  173. if (ret) {
  174. pr_err("%s: could not enable bam irqs, ret = %d",
  175. __func__, ret);
  176. qcedev_control_clocks(podev, false);
  177. goto exit_unlock_mutex;
  178. }
  179. }
  180. podev->high_bw_req_count++;
  181. } else {
  182. if (podev->high_bw_req_count == 1) {
  183. ret = qce_set_irqs(podev->qce, false);
  184. if (ret) {
  185. pr_err("%s: could not disable bam irqs, ret = %d",
  186. __func__, ret);
  187. goto exit_unlock_mutex;
  188. }
  189. ret = qcedev_control_clocks(podev, false);
  190. if (ret)
  191. goto exit_unlock_mutex;
  192. }
  193. podev->high_bw_req_count--;
  194. }
  195. exit_unlock_mutex:
  196. mutex_unlock(&qcedev_sent_bw_req);
  197. }
  198. #define QCEDEV_MAGIC 0x56434544 /* "qced" */
  199. static int qcedev_open(struct inode *inode, struct file *file);
  200. static int qcedev_release(struct inode *inode, struct file *file);
  201. static int start_cipher_req(struct qcedev_control *podev,
  202. int *current_req_info);
  203. static int start_offload_cipher_req(struct qcedev_control *podev,
  204. int *current_req_info);
  205. static int start_sha_req(struct qcedev_control *podev,
  206. int *current_req_info);
  207. static const struct file_operations qcedev_fops = {
  208. .owner = THIS_MODULE,
  209. .unlocked_ioctl = qcedev_ioctl,
  210. #ifdef CONFIG_COMPAT
  211. .compat_ioctl = compat_qcedev_ioctl,
  212. #endif
  213. .open = qcedev_open,
  214. .release = qcedev_release,
  215. };
  216. static struct qcedev_control qce_dev[] = {
  217. {
  218. .magic = QCEDEV_MAGIC,
  219. },
  220. };
  221. #define MAX_QCE_DEVICE ARRAY_SIZE(qce_dev)
  222. #define DEBUG_MAX_FNAME 16
  223. #define DEBUG_MAX_RW_BUF 1024
  224. struct qcedev_stat {
  225. u32 qcedev_dec_success;
  226. u32 qcedev_dec_fail;
  227. u32 qcedev_enc_success;
  228. u32 qcedev_enc_fail;
  229. u32 qcedev_sha_success;
  230. u32 qcedev_sha_fail;
  231. };
  232. static struct qcedev_stat _qcedev_stat;
  233. static struct dentry *_debug_dent;
  234. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  235. static int _debug_qcedev;
  236. static struct qcedev_control *qcedev_minor_to_control(unsigned int n)
  237. {
  238. int i;
  239. for (i = 0; i < MAX_QCE_DEVICE; i++) {
  240. if (qce_dev[i].minor == n)
  241. return &qce_dev[n];
  242. }
  243. return NULL;
  244. }
  245. static int qcedev_open(struct inode *inode, struct file *file)
  246. {
  247. struct qcedev_handle *handle;
  248. struct qcedev_control *podev;
  249. podev = qcedev_minor_to_control(MINOR(inode->i_rdev));
  250. if (podev == NULL) {
  251. pr_err("%s: no such device %d\n", __func__,
  252. MINOR(inode->i_rdev));
  253. return -ENOENT;
  254. }
  255. handle = kzalloc(sizeof(struct qcedev_handle), GFP_KERNEL);
  256. if (handle == NULL)
  257. return -ENOMEM;
  258. handle->cntl = podev;
  259. file->private_data = handle;
  260. qcedev_ce_high_bw_req(podev, true);
  261. mutex_init(&handle->registeredbufs.lock);
  262. INIT_LIST_HEAD(&handle->registeredbufs.list);
  263. return 0;
  264. }
  265. static int qcedev_release(struct inode *inode, struct file *file)
  266. {
  267. struct qcedev_control *podev;
  268. struct qcedev_handle *handle;
  269. handle = file->private_data;
  270. podev = handle->cntl;
  271. if (podev != NULL && podev->magic != QCEDEV_MAGIC) {
  272. pr_err("%s: invalid handle %pK\n",
  273. __func__, podev);
  274. }
  275. if (podev)
  276. qcedev_ce_high_bw_req(podev, false);
  277. if (qcedev_unmap_all_buffers(handle))
  278. pr_err("%s: failed to unmap all ion buffers\n", __func__);
  279. kfree_sensitive(handle);
  280. file->private_data = NULL;
  281. return 0;
  282. }
  283. static void req_done(unsigned long data)
  284. {
  285. struct qcedev_control *podev = (struct qcedev_control *)data;
  286. struct qcedev_async_req *areq;
  287. unsigned long flags = 0;
  288. struct qcedev_async_req *new_req = NULL;
  289. spin_lock_irqsave(&podev->lock, flags);
  290. areq = podev->active_command;
  291. podev->active_command = NULL;
  292. if (areq) {
  293. if (!areq->timed_out)
  294. complete(&areq->complete);
  295. areq->state = QCEDEV_REQ_DONE;
  296. }
  297. /* Look through queued requests and wake up the corresponding thread */
  298. if (!list_empty(&podev->ready_commands)) {
  299. new_req = container_of(podev->ready_commands.next,
  300. struct qcedev_async_req, list);
  301. list_del(&new_req->list);
  302. new_req->state = QCEDEV_REQ_CURRENT;
  303. wake_up_interruptible(&new_req->wait_q);
  304. }
  305. spin_unlock_irqrestore(&podev->lock, flags);
  306. }
  307. void qcedev_sha_req_cb(void *cookie, unsigned char *digest,
  308. unsigned char *authdata, int ret)
  309. {
  310. struct qcedev_sha_req *areq;
  311. struct qcedev_control *pdev;
  312. struct qcedev_handle *handle;
  313. uint32_t *auth32 = (uint32_t *)authdata;
  314. areq = (struct qcedev_sha_req *) cookie;
  315. if (!areq || !areq->cookie)
  316. return;
  317. handle = (struct qcedev_handle *) areq->cookie;
  318. pdev = handle->cntl;
  319. if (!pdev)
  320. return;
  321. if (digest)
  322. memcpy(&handle->sha_ctxt.digest[0], digest, 32);
  323. if (authdata) {
  324. handle->sha_ctxt.auth_data[0] = auth32[0];
  325. handle->sha_ctxt.auth_data[1] = auth32[1];
  326. }
  327. tasklet_schedule(&pdev->done_tasklet);
  328. };
  329. void qcedev_cipher_req_cb(void *cookie, unsigned char *icv,
  330. unsigned char *iv, int ret)
  331. {
  332. struct qcedev_cipher_req *areq;
  333. struct qcedev_handle *handle;
  334. struct qcedev_control *podev;
  335. struct qcedev_async_req *qcedev_areq;
  336. areq = (struct qcedev_cipher_req *) cookie;
  337. if (!areq || !areq->cookie)
  338. return;
  339. handle = (struct qcedev_handle *) areq->cookie;
  340. podev = handle->cntl;
  341. if (!podev)
  342. return;
  343. qcedev_areq = podev->active_command;
  344. if (iv)
  345. memcpy(&qcedev_areq->cipher_op_req.iv[0], iv,
  346. qcedev_areq->cipher_op_req.ivlen);
  347. tasklet_schedule(&podev->done_tasklet);
  348. };
  349. static int start_cipher_req(struct qcedev_control *podev,
  350. int *current_req_info)
  351. {
  352. struct qcedev_async_req *qcedev_areq;
  353. struct qce_req creq;
  354. int ret = 0;
  355. memset(&creq, 0, sizeof(creq));
  356. /* start the command on the podev->active_command */
  357. qcedev_areq = podev->active_command;
  358. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  359. if (qcedev_areq->cipher_op_req.use_pmem == QCEDEV_USE_PMEM) {
  360. pr_err("%s: Use of PMEM is not supported\n", __func__);
  361. goto unsupported;
  362. }
  363. creq.pmem = NULL;
  364. switch (qcedev_areq->cipher_op_req.alg) {
  365. case QCEDEV_ALG_DES:
  366. creq.alg = CIPHER_ALG_DES;
  367. break;
  368. case QCEDEV_ALG_3DES:
  369. creq.alg = CIPHER_ALG_3DES;
  370. break;
  371. case QCEDEV_ALG_AES:
  372. creq.alg = CIPHER_ALG_AES;
  373. break;
  374. default:
  375. return -EINVAL;
  376. }
  377. switch (qcedev_areq->cipher_op_req.mode) {
  378. case QCEDEV_AES_MODE_CBC:
  379. case QCEDEV_DES_MODE_CBC:
  380. creq.mode = QCE_MODE_CBC;
  381. break;
  382. case QCEDEV_AES_MODE_ECB:
  383. case QCEDEV_DES_MODE_ECB:
  384. creq.mode = QCE_MODE_ECB;
  385. break;
  386. case QCEDEV_AES_MODE_CTR:
  387. creq.mode = QCE_MODE_CTR;
  388. break;
  389. case QCEDEV_AES_MODE_XTS:
  390. creq.mode = QCE_MODE_XTS;
  391. break;
  392. default:
  393. return -EINVAL;
  394. }
  395. if ((creq.alg == CIPHER_ALG_AES) &&
  396. (creq.mode == QCE_MODE_CTR)) {
  397. creq.dir = QCE_ENCRYPT;
  398. } else {
  399. if (qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC)
  400. creq.dir = QCE_ENCRYPT;
  401. else
  402. creq.dir = QCE_DECRYPT;
  403. }
  404. creq.iv = &qcedev_areq->cipher_op_req.iv[0];
  405. creq.ivsize = qcedev_areq->cipher_op_req.ivlen;
  406. creq.iv_ctr_size = 0;
  407. creq.enckey = &qcedev_areq->cipher_op_req.enckey[0];
  408. creq.encklen = qcedev_areq->cipher_op_req.encklen;
  409. creq.cryptlen = qcedev_areq->cipher_op_req.data_len;
  410. if (qcedev_areq->cipher_op_req.encklen == 0) {
  411. if ((qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC_NO_KEY)
  412. || (qcedev_areq->cipher_op_req.op ==
  413. QCEDEV_OPER_DEC_NO_KEY))
  414. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  415. else {
  416. int i;
  417. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  418. if (qcedev_areq->cipher_op_req.enckey[i] != 0)
  419. break;
  420. }
  421. if ((podev->platform_support.hw_key_support == 1) &&
  422. (i == QCEDEV_MAX_KEY_SIZE))
  423. creq.op = QCE_REQ_ABLK_CIPHER;
  424. else {
  425. ret = -EINVAL;
  426. goto unsupported;
  427. }
  428. }
  429. } else {
  430. creq.op = QCE_REQ_ABLK_CIPHER;
  431. }
  432. creq.qce_cb = qcedev_cipher_req_cb;
  433. creq.areq = (void *)&qcedev_areq->cipher_req;
  434. creq.flags = 0;
  435. creq.offload_op = QCE_OFFLOAD_NONE;
  436. ret = qce_ablk_cipher_req(podev->qce, &creq);
  437. *current_req_info = creq.current_req_info;
  438. unsupported:
  439. qcedev_areq->err = ret ? -ENXIO : 0;
  440. return ret;
  441. };
  442. void qcedev_offload_cipher_req_cb(void *cookie, unsigned char *icv,
  443. unsigned char *iv, int ret)
  444. {
  445. struct qcedev_cipher_req *areq;
  446. struct qcedev_handle *handle;
  447. struct qcedev_control *podev;
  448. struct qcedev_async_req *qcedev_areq;
  449. areq = (struct qcedev_cipher_req *) cookie;
  450. if (!areq || !areq->cookie)
  451. return;
  452. handle = (struct qcedev_handle *) areq->cookie;
  453. podev = handle->cntl;
  454. if (!podev)
  455. return;
  456. qcedev_areq = podev->active_command;
  457. if (iv)
  458. memcpy(&qcedev_areq->offload_cipher_op_req.iv[0], iv,
  459. qcedev_areq->offload_cipher_op_req.ivlen);
  460. tasklet_schedule(&podev->done_tasklet);
  461. }
  462. static int start_offload_cipher_req(struct qcedev_control *podev,
  463. int *current_req_info)
  464. {
  465. struct qcedev_async_req *qcedev_areq;
  466. struct qce_req creq;
  467. u8 patt_sz = 0, proc_data_sz = 0;
  468. int ret = 0;
  469. memset(&creq, 0, sizeof(creq));
  470. /* Start the command on the podev->active_command */
  471. qcedev_areq = podev->active_command;
  472. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  473. switch (qcedev_areq->offload_cipher_op_req.alg) {
  474. case QCEDEV_ALG_AES:
  475. creq.alg = CIPHER_ALG_AES;
  476. break;
  477. default:
  478. return -EINVAL;
  479. }
  480. switch (qcedev_areq->offload_cipher_op_req.mode) {
  481. case QCEDEV_AES_MODE_CBC:
  482. creq.mode = QCE_MODE_CBC;
  483. break;
  484. case QCEDEV_AES_MODE_CTR:
  485. creq.mode = QCE_MODE_CTR;
  486. break;
  487. default:
  488. return -EINVAL;
  489. }
  490. if (qcedev_areq->offload_cipher_op_req.is_copy_op) {
  491. creq.dir = QCE_ENCRYPT;
  492. } else {
  493. switch(qcedev_areq->offload_cipher_op_req.op) {
  494. case QCEDEV_OFFLOAD_HLOS_HLOS:
  495. case QCEDEV_OFFLOAD_HLOS_CPB:
  496. creq.dir = QCE_DECRYPT;
  497. break;
  498. case QCEDEV_OFFLOAD_CPB_HLOS:
  499. creq.dir = QCE_ENCRYPT;
  500. break;
  501. default:
  502. return -EINVAL;
  503. }
  504. }
  505. creq.iv = &qcedev_areq->offload_cipher_op_req.iv[0];
  506. creq.ivsize = qcedev_areq->offload_cipher_op_req.ivlen;
  507. creq.iv_ctr_size = qcedev_areq->offload_cipher_op_req.iv_ctr_size;
  508. creq.encklen = qcedev_areq->offload_cipher_op_req.encklen;
  509. /* OFFLOAD use cases use PIPE keys so no need to set keys */
  510. creq.flags = QCEDEV_CTX_USE_PIPE_KEY;
  511. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  512. creq.offload_op = (int)qcedev_areq->offload_cipher_op_req.op;
  513. if (qcedev_areq->offload_cipher_op_req.is_copy_op)
  514. creq.is_copy_op = true;
  515. creq.cryptlen = qcedev_areq->offload_cipher_op_req.data_len;
  516. creq.qce_cb = qcedev_offload_cipher_req_cb;
  517. creq.areq = (void *)&qcedev_areq->cipher_req;
  518. patt_sz = qcedev_areq->offload_cipher_op_req.pattern_info.patt_sz;
  519. proc_data_sz =
  520. qcedev_areq->offload_cipher_op_req.pattern_info.proc_data_sz;
  521. creq.is_pattern_valid =
  522. qcedev_areq->offload_cipher_op_req.is_pattern_valid;
  523. if (creq.is_pattern_valid) {
  524. creq.pattern_info = 0x1;
  525. if (patt_sz)
  526. creq.pattern_info |= (patt_sz - 1) << 4;
  527. if (proc_data_sz)
  528. creq.pattern_info |= (proc_data_sz - 1) << 8;
  529. creq.pattern_info |=
  530. qcedev_areq->offload_cipher_op_req.pattern_info.patt_offset << 12;
  531. }
  532. creq.block_offset = qcedev_areq->offload_cipher_op_req.block_offset;
  533. ret = qce_ablk_cipher_req(podev->qce, &creq);
  534. *current_req_info = creq.current_req_info;
  535. qcedev_areq->err = ret ? -ENXIO : 0;
  536. return ret;
  537. }
  538. static int start_sha_req(struct qcedev_control *podev,
  539. int *current_req_info)
  540. {
  541. struct qcedev_async_req *qcedev_areq;
  542. struct qce_sha_req sreq;
  543. int ret = 0;
  544. struct qcedev_handle *handle;
  545. /* start the command on the podev->active_command */
  546. qcedev_areq = podev->active_command;
  547. handle = qcedev_areq->handle;
  548. switch (qcedev_areq->sha_op_req.alg) {
  549. case QCEDEV_ALG_SHA1:
  550. sreq.alg = QCE_HASH_SHA1;
  551. break;
  552. case QCEDEV_ALG_SHA256:
  553. sreq.alg = QCE_HASH_SHA256;
  554. break;
  555. case QCEDEV_ALG_SHA1_HMAC:
  556. if (podev->ce_support.sha_hmac) {
  557. sreq.alg = QCE_HASH_SHA1_HMAC;
  558. sreq.authkey = &handle->sha_ctxt.authkey[0];
  559. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  560. } else {
  561. sreq.alg = QCE_HASH_SHA1;
  562. sreq.authkey = NULL;
  563. }
  564. break;
  565. case QCEDEV_ALG_SHA256_HMAC:
  566. if (podev->ce_support.sha_hmac) {
  567. sreq.alg = QCE_HASH_SHA256_HMAC;
  568. sreq.authkey = &handle->sha_ctxt.authkey[0];
  569. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  570. } else {
  571. sreq.alg = QCE_HASH_SHA256;
  572. sreq.authkey = NULL;
  573. }
  574. break;
  575. case QCEDEV_ALG_AES_CMAC:
  576. sreq.alg = QCE_HASH_AES_CMAC;
  577. sreq.authkey = &handle->sha_ctxt.authkey[0];
  578. sreq.authklen = qcedev_areq->sha_op_req.authklen;
  579. break;
  580. default:
  581. pr_err("Algorithm %d not supported, exiting\n",
  582. qcedev_areq->sha_op_req.alg);
  583. return -EINVAL;
  584. }
  585. qcedev_areq->sha_req.cookie = handle;
  586. sreq.qce_cb = qcedev_sha_req_cb;
  587. if (qcedev_areq->sha_op_req.alg != QCEDEV_ALG_AES_CMAC) {
  588. sreq.auth_data[0] = handle->sha_ctxt.auth_data[0];
  589. sreq.auth_data[1] = handle->sha_ctxt.auth_data[1];
  590. sreq.auth_data[2] = handle->sha_ctxt.auth_data[2];
  591. sreq.auth_data[3] = handle->sha_ctxt.auth_data[3];
  592. sreq.digest = &handle->sha_ctxt.digest[0];
  593. sreq.first_blk = handle->sha_ctxt.first_blk;
  594. sreq.last_blk = handle->sha_ctxt.last_blk;
  595. }
  596. sreq.size = qcedev_areq->sha_req.sreq.nbytes;
  597. sreq.src = qcedev_areq->sha_req.sreq.src;
  598. sreq.areq = (void *)&qcedev_areq->sha_req;
  599. sreq.flags = 0;
  600. ret = qce_process_sha_req(podev->qce, &sreq);
  601. *current_req_info = sreq.current_req_info;
  602. qcedev_areq->err = ret ? -ENXIO : 0;
  603. return ret;
  604. };
  605. static void qcedev_check_crypto_status(
  606. struct qcedev_async_req *qcedev_areq, void *handle)
  607. {
  608. struct qce_error error = {0};
  609. qcedev_areq->offload_cipher_op_req.err = QCEDEV_OFFLOAD_NO_ERROR;
  610. qce_get_crypto_status(handle, &error);
  611. if (error.timer_error) {
  612. qcedev_areq->offload_cipher_op_req.err =
  613. QCEDEV_OFFLOAD_KEY_TIMER_EXPIRED_ERROR;
  614. } else if (error.key_paused) {
  615. qcedev_areq->offload_cipher_op_req.err =
  616. QCEDEV_OFFLOAD_KEY_PAUSE_ERROR;
  617. } else if (error.generic_error) {
  618. qcedev_areq->offload_cipher_op_req.err =
  619. QCEDEV_OFFLOAD_GENERIC_ERROR;
  620. }
  621. return;
  622. }
  623. #define MAX_RETRIES 333
  624. static int submit_req(struct qcedev_async_req *qcedev_areq,
  625. struct qcedev_handle *handle)
  626. {
  627. struct qcedev_control *podev;
  628. unsigned long flags = 0;
  629. int ret = 0;
  630. struct qcedev_stat *pstat;
  631. int current_req_info = 0;
  632. int wait = MAX_CRYPTO_WAIT_TIME;
  633. struct qcedev_async_req *new_req = NULL;
  634. int retries = 0;
  635. int req_wait = MAX_REQUEST_TIME;
  636. qcedev_areq->err = 0;
  637. podev = handle->cntl;
  638. init_waitqueue_head(&qcedev_areq->wait_q);
  639. spin_lock_irqsave(&podev->lock, flags);
  640. /*
  641. * Service only one crypto request at a time.
  642. * Any other new requests are queued in ready_commands and woken up
  643. * only when the active command has finished successfully or when the
  644. * request times out or when the command failed when setting up.
  645. */
  646. do {
  647. if (podev->active_command == NULL) {
  648. podev->active_command = qcedev_areq;
  649. qcedev_areq->state = QCEDEV_REQ_SUBMITTED;
  650. switch (qcedev_areq->op_type) {
  651. case QCEDEV_CRYPTO_OPER_CIPHER:
  652. ret = start_cipher_req(podev,
  653. &current_req_info);
  654. break;
  655. case QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER:
  656. ret = start_offload_cipher_req(podev,
  657. &current_req_info);
  658. break;
  659. default:
  660. ret = start_sha_req(podev,
  661. &current_req_info);
  662. break;
  663. }
  664. } else {
  665. list_add_tail(&qcedev_areq->list,
  666. &podev->ready_commands);
  667. qcedev_areq->state = QCEDEV_REQ_WAITING;
  668. req_wait = wait_event_interruptible_lock_irq_timeout(
  669. qcedev_areq->wait_q,
  670. (qcedev_areq->state == QCEDEV_REQ_CURRENT),
  671. podev->lock,
  672. msecs_to_jiffies(MAX_REQUEST_TIME));
  673. if ((req_wait == 0) || (req_wait == -ERESTARTSYS)) {
  674. pr_err("%s: request timed out, req_wait = %d\n",
  675. __func__, req_wait);
  676. list_del(&qcedev_areq->list);
  677. podev->active_command = NULL;
  678. spin_unlock_irqrestore(&podev->lock, flags);
  679. return qcedev_areq->err;
  680. }
  681. }
  682. } while (qcedev_areq->state != QCEDEV_REQ_SUBMITTED);
  683. if (ret != 0) {
  684. podev->active_command = NULL;
  685. /*
  686. * Look through queued requests and wake up the corresponding
  687. * thread.
  688. */
  689. if (!list_empty(&podev->ready_commands)) {
  690. new_req = container_of(podev->ready_commands.next,
  691. struct qcedev_async_req, list);
  692. list_del(&new_req->list);
  693. new_req->state = QCEDEV_REQ_CURRENT;
  694. wake_up_interruptible(&new_req->wait_q);
  695. }
  696. }
  697. spin_unlock_irqrestore(&podev->lock, flags);
  698. qcedev_areq->timed_out = false;
  699. if (ret == 0)
  700. wait = wait_for_completion_timeout(&qcedev_areq->complete,
  701. msecs_to_jiffies(MAX_CRYPTO_WAIT_TIME));
  702. if (!wait) {
  703. /*
  704. * This means wait timed out, and the callback routine was not
  705. * exercised. The callback sequence does some housekeeping which
  706. * would be missed here, hence having a call to qce here to do
  707. * that.
  708. */
  709. pr_err("%s: wait timed out, req info = %d\n", __func__,
  710. current_req_info);
  711. qcedev_check_crypto_status(qcedev_areq, podev->qce);
  712. if (qcedev_areq->offload_cipher_op_req.err ==
  713. QCEDEV_OFFLOAD_NO_ERROR) {
  714. pr_err("%s: no error, wait for request to be done", __func__);
  715. while (qcedev_areq->state != QCEDEV_REQ_DONE &&
  716. retries < MAX_RETRIES) {
  717. usleep_range(3000, 5000);
  718. retries++;
  719. pr_err("%s: waiting for req state to be done, retries = %d",
  720. __func__, retries);
  721. }
  722. return 0;
  723. }
  724. spin_lock_irqsave(&podev->lock, flags);
  725. qcedev_areq->timed_out = true;
  726. ret = qce_manage_timeout(podev->qce, current_req_info);
  727. if (ret)
  728. pr_err("%s: error during manage timeout", __func__);
  729. spin_unlock_irqrestore(&podev->lock, flags);
  730. req_done((unsigned long) podev);
  731. if (qcedev_areq->offload_cipher_op_req.err !=
  732. QCEDEV_OFFLOAD_NO_ERROR)
  733. return 0;
  734. }
  735. if (ret)
  736. qcedev_areq->err = -EIO;
  737. pstat = &_qcedev_stat;
  738. if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER) {
  739. switch (qcedev_areq->cipher_op_req.op) {
  740. case QCEDEV_OPER_DEC:
  741. if (qcedev_areq->err)
  742. pstat->qcedev_dec_fail++;
  743. else
  744. pstat->qcedev_dec_success++;
  745. break;
  746. case QCEDEV_OPER_ENC:
  747. if (qcedev_areq->err)
  748. pstat->qcedev_enc_fail++;
  749. else
  750. pstat->qcedev_enc_success++;
  751. break;
  752. default:
  753. break;
  754. }
  755. } else if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER) {
  756. //Do nothing
  757. } else {
  758. if (qcedev_areq->err)
  759. pstat->qcedev_sha_fail++;
  760. else
  761. pstat->qcedev_sha_success++;
  762. }
  763. return qcedev_areq->err;
  764. }
  765. static int qcedev_sha_init(struct qcedev_async_req *areq,
  766. struct qcedev_handle *handle)
  767. {
  768. struct qcedev_sha_ctxt *sha_ctxt = &handle->sha_ctxt;
  769. memset(sha_ctxt, 0, sizeof(struct qcedev_sha_ctxt));
  770. sha_ctxt->first_blk = 1;
  771. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  772. (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)) {
  773. memcpy(&sha_ctxt->digest[0],
  774. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  775. sha_ctxt->diglen = SHA1_DIGEST_SIZE;
  776. } else {
  777. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA256) ||
  778. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)) {
  779. memcpy(&sha_ctxt->digest[0],
  780. &_std_init_vector_sha256_uint8[0],
  781. SHA256_DIGEST_SIZE);
  782. sha_ctxt->diglen = SHA256_DIGEST_SIZE;
  783. }
  784. }
  785. sha_ctxt->init_done = true;
  786. return 0;
  787. }
  788. static int qcedev_sha_update_max_xfer(struct qcedev_async_req *qcedev_areq,
  789. struct qcedev_handle *handle,
  790. struct scatterlist *sg_src)
  791. {
  792. int err = 0;
  793. int i = 0;
  794. uint32_t total;
  795. uint8_t *user_src = NULL;
  796. uint8_t *k_src = NULL;
  797. uint8_t *k_buf_src = NULL;
  798. uint32_t buf_size = 0;
  799. uint8_t *k_align_src = NULL;
  800. uint32_t sha_pad_len = 0;
  801. uint32_t trailing_buf_len = 0;
  802. uint32_t t_buf = handle->sha_ctxt.trailing_buf_len;
  803. uint32_t sha_block_size;
  804. total = qcedev_areq->sha_op_req.data_len + t_buf;
  805. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1)
  806. sha_block_size = SHA1_BLOCK_SIZE;
  807. else
  808. sha_block_size = SHA256_BLOCK_SIZE;
  809. if (total <= sha_block_size) {
  810. uint32_t len = qcedev_areq->sha_op_req.data_len;
  811. i = 0;
  812. k_src = &handle->sha_ctxt.trailing_buf[t_buf];
  813. /* Copy data from user src(s) */
  814. while (len > 0) {
  815. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  816. if (user_src && copy_from_user(k_src,
  817. (void __user *)user_src,
  818. qcedev_areq->sha_op_req.data[i].len))
  819. return -EFAULT;
  820. len -= qcedev_areq->sha_op_req.data[i].len;
  821. k_src += qcedev_areq->sha_op_req.data[i].len;
  822. i++;
  823. }
  824. handle->sha_ctxt.trailing_buf_len = total;
  825. return 0;
  826. }
  827. buf_size = total + CACHE_LINE_SIZE * 2;
  828. k_buf_src = kmalloc(buf_size, GFP_KERNEL);
  829. if (k_buf_src == NULL)
  830. return -ENOMEM;
  831. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  832. CACHE_LINE_SIZE);
  833. k_src = k_align_src;
  834. /* check for trailing buffer from previous updates and append it */
  835. if (t_buf > 0) {
  836. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  837. t_buf);
  838. k_src += t_buf;
  839. }
  840. /* Copy data from user src(s) */
  841. user_src = qcedev_areq->sha_op_req.data[0].vaddr;
  842. if (user_src && copy_from_user(k_src,
  843. (void __user *)user_src,
  844. qcedev_areq->sha_op_req.data[0].len)) {
  845. memset(k_buf_src, 0, buf_size);
  846. kfree(k_buf_src);
  847. return -EFAULT;
  848. }
  849. k_src += qcedev_areq->sha_op_req.data[0].len;
  850. for (i = 1; i < qcedev_areq->sha_op_req.entries; i++) {
  851. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  852. if (user_src && copy_from_user(k_src,
  853. (void __user *)user_src,
  854. qcedev_areq->sha_op_req.data[i].len)) {
  855. memset(k_buf_src, 0, buf_size);
  856. kfree(k_buf_src);
  857. return -EFAULT;
  858. }
  859. k_src += qcedev_areq->sha_op_req.data[i].len;
  860. }
  861. /* get new trailing buffer */
  862. sha_pad_len = ALIGN(total, CE_SHA_BLOCK_SIZE) - total;
  863. trailing_buf_len = CE_SHA_BLOCK_SIZE - sha_pad_len;
  864. qcedev_areq->sha_req.sreq.src = sg_src;
  865. sg_init_one(qcedev_areq->sha_req.sreq.src, k_align_src,
  866. total-trailing_buf_len);
  867. qcedev_areq->sha_req.sreq.nbytes = total - trailing_buf_len;
  868. /* update sha_ctxt trailing buf content to new trailing buf */
  869. if (trailing_buf_len > 0) {
  870. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  871. memcpy(&handle->sha_ctxt.trailing_buf[0],
  872. (k_src - trailing_buf_len),
  873. trailing_buf_len);
  874. }
  875. handle->sha_ctxt.trailing_buf_len = trailing_buf_len;
  876. err = submit_req(qcedev_areq, handle);
  877. handle->sha_ctxt.last_blk = 0;
  878. handle->sha_ctxt.first_blk = 0;
  879. memset(k_buf_src, 0, buf_size);
  880. kfree(k_buf_src);
  881. return err;
  882. }
  883. static int qcedev_sha_update(struct qcedev_async_req *qcedev_areq,
  884. struct qcedev_handle *handle,
  885. struct scatterlist *sg_src)
  886. {
  887. int err = 0;
  888. int i = 0;
  889. int j = 0;
  890. int k = 0;
  891. int num_entries = 0;
  892. uint32_t total = 0;
  893. if (!handle->sha_ctxt.init_done) {
  894. pr_err("%s Init was not called\n", __func__);
  895. return -EINVAL;
  896. }
  897. if (qcedev_areq->sha_op_req.data_len > QCE_MAX_OPER_DATA) {
  898. struct qcedev_sha_op_req *saved_req;
  899. struct qcedev_sha_op_req req;
  900. struct qcedev_sha_op_req *sreq = &qcedev_areq->sha_op_req;
  901. uint32_t req_size = 0;
  902. req_size = sizeof(struct qcedev_sha_op_req);
  903. /* save the original req structure */
  904. saved_req =
  905. kmalloc(req_size, GFP_KERNEL);
  906. if (saved_req == NULL) {
  907. pr_err("%s:Can't Allocate mem:saved_req 0x%lx\n",
  908. __func__, (uintptr_t)saved_req);
  909. return -ENOMEM;
  910. }
  911. memcpy(&req, sreq, sizeof(*sreq));
  912. memcpy(saved_req, sreq, sizeof(*sreq));
  913. i = 0;
  914. /* Address 32 KB at a time */
  915. while ((i < req.entries) && (err == 0)) {
  916. if (sreq->data[i].len > QCE_MAX_OPER_DATA) {
  917. sreq->data[0].len = QCE_MAX_OPER_DATA;
  918. if (i > 0) {
  919. sreq->data[0].vaddr =
  920. sreq->data[i].vaddr;
  921. }
  922. sreq->data_len = QCE_MAX_OPER_DATA;
  923. sreq->entries = 1;
  924. err = qcedev_sha_update_max_xfer(qcedev_areq,
  925. handle, sg_src);
  926. sreq->data[i].len = req.data[i].len -
  927. QCE_MAX_OPER_DATA;
  928. sreq->data[i].vaddr = req.data[i].vaddr +
  929. QCE_MAX_OPER_DATA;
  930. req.data[i].vaddr = sreq->data[i].vaddr;
  931. req.data[i].len = sreq->data[i].len;
  932. } else {
  933. total = 0;
  934. for (j = i; j < req.entries; j++) {
  935. num_entries++;
  936. if ((total + sreq->data[j].len) >=
  937. QCE_MAX_OPER_DATA) {
  938. sreq->data[j].len =
  939. (QCE_MAX_OPER_DATA - total);
  940. total = QCE_MAX_OPER_DATA;
  941. break;
  942. }
  943. total += sreq->data[j].len;
  944. }
  945. sreq->data_len = total;
  946. if (i > 0)
  947. for (k = 0; k < num_entries; k++) {
  948. sreq->data[k].len =
  949. sreq->data[i+k].len;
  950. sreq->data[k].vaddr =
  951. sreq->data[i+k].vaddr;
  952. }
  953. sreq->entries = num_entries;
  954. i = j;
  955. err = qcedev_sha_update_max_xfer(qcedev_areq,
  956. handle, sg_src);
  957. num_entries = 0;
  958. sreq->data[i].vaddr = req.data[i].vaddr +
  959. sreq->data[i].len;
  960. sreq->data[i].len = req.data[i].len -
  961. sreq->data[i].len;
  962. req.data[i].vaddr = sreq->data[i].vaddr;
  963. req.data[i].len = sreq->data[i].len;
  964. if (sreq->data[i].len == 0)
  965. i++;
  966. }
  967. } /* end of while ((i < req.entries) && (err == 0)) */
  968. /* Restore the original req structure */
  969. for (i = 0; i < saved_req->entries; i++) {
  970. sreq->data[i].len = saved_req->data[i].len;
  971. sreq->data[i].vaddr = saved_req->data[i].vaddr;
  972. }
  973. sreq->entries = saved_req->entries;
  974. sreq->data_len = saved_req->data_len;
  975. memset(saved_req, 0, req_size);
  976. kfree(saved_req);
  977. } else
  978. err = qcedev_sha_update_max_xfer(qcedev_areq, handle, sg_src);
  979. return err;
  980. }
  981. static int qcedev_sha_final(struct qcedev_async_req *qcedev_areq,
  982. struct qcedev_handle *handle)
  983. {
  984. int err = 0;
  985. struct scatterlist sg_src;
  986. uint32_t total;
  987. uint8_t *k_buf_src = NULL;
  988. uint32_t buf_size = 0;
  989. uint8_t *k_align_src = NULL;
  990. if (!handle->sha_ctxt.init_done) {
  991. pr_err("%s Init was not called\n", __func__);
  992. return -EINVAL;
  993. }
  994. handle->sha_ctxt.last_blk = 1;
  995. total = handle->sha_ctxt.trailing_buf_len;
  996. buf_size = total + CACHE_LINE_SIZE * 2;
  997. k_buf_src = kmalloc(buf_size, GFP_KERNEL);
  998. if (k_buf_src == NULL)
  999. return -ENOMEM;
  1000. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  1001. CACHE_LINE_SIZE);
  1002. memcpy(k_align_src, &handle->sha_ctxt.trailing_buf[0], total);
  1003. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  1004. sg_init_one(qcedev_areq->sha_req.sreq.src, k_align_src, total);
  1005. qcedev_areq->sha_req.sreq.nbytes = total;
  1006. err = submit_req(qcedev_areq, handle);
  1007. handle->sha_ctxt.first_blk = 0;
  1008. handle->sha_ctxt.last_blk = 0;
  1009. handle->sha_ctxt.auth_data[0] = 0;
  1010. handle->sha_ctxt.auth_data[1] = 0;
  1011. handle->sha_ctxt.trailing_buf_len = 0;
  1012. handle->sha_ctxt.init_done = false;
  1013. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  1014. memset(k_buf_src, 0, buf_size);
  1015. kfree(k_buf_src);
  1016. qcedev_areq->sha_req.sreq.src = NULL;
  1017. return err;
  1018. }
  1019. static int qcedev_hash_cmac(struct qcedev_async_req *qcedev_areq,
  1020. struct qcedev_handle *handle,
  1021. struct scatterlist *sg_src)
  1022. {
  1023. int err = 0;
  1024. int i = 0;
  1025. uint32_t total;
  1026. uint8_t *user_src = NULL;
  1027. uint8_t *k_src = NULL;
  1028. uint8_t *k_buf_src = NULL;
  1029. uint32_t buf_size = 0;
  1030. total = qcedev_areq->sha_op_req.data_len;
  1031. if ((qcedev_areq->sha_op_req.authklen != QCEDEV_AES_KEY_128) &&
  1032. (qcedev_areq->sha_op_req.authklen != QCEDEV_AES_KEY_256)) {
  1033. pr_err("%s: unsupported key length\n", __func__);
  1034. return -EINVAL;
  1035. }
  1036. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  1037. (void __user *)qcedev_areq->sha_op_req.authkey,
  1038. qcedev_areq->sha_op_req.authklen))
  1039. return -EFAULT;
  1040. if (total > U32_MAX - CACHE_LINE_SIZE * 2)
  1041. return -EINVAL;
  1042. buf_size = total + CACHE_LINE_SIZE * 2;
  1043. k_buf_src = kmalloc(buf_size, GFP_KERNEL);
  1044. if (k_buf_src == NULL)
  1045. return -ENOMEM;
  1046. k_src = k_buf_src;
  1047. /* Copy data from user src(s) */
  1048. user_src = qcedev_areq->sha_op_req.data[0].vaddr;
  1049. for (i = 0; i < qcedev_areq->sha_op_req.entries; i++) {
  1050. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  1051. if (user_src && copy_from_user(k_src, (void __user *)user_src,
  1052. qcedev_areq->sha_op_req.data[i].len)) {
  1053. memset(k_buf_src, 0, buf_size);
  1054. kfree(k_buf_src);
  1055. return -EFAULT;
  1056. }
  1057. k_src += qcedev_areq->sha_op_req.data[i].len;
  1058. }
  1059. qcedev_areq->sha_req.sreq.src = sg_src;
  1060. sg_init_one(qcedev_areq->sha_req.sreq.src, k_buf_src, total);
  1061. qcedev_areq->sha_req.sreq.nbytes = total;
  1062. handle->sha_ctxt.diglen = qcedev_areq->sha_op_req.diglen;
  1063. err = submit_req(qcedev_areq, handle);
  1064. memset(k_buf_src, 0, buf_size);
  1065. kfree(k_buf_src);
  1066. return err;
  1067. }
  1068. static int qcedev_set_hmac_auth_key(struct qcedev_async_req *areq,
  1069. struct qcedev_handle *handle,
  1070. struct scatterlist *sg_src)
  1071. {
  1072. int err = 0;
  1073. if (areq->sha_op_req.authklen <= QCEDEV_MAX_KEY_SIZE) {
  1074. qcedev_sha_init(areq, handle);
  1075. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  1076. (void __user *)areq->sha_op_req.authkey,
  1077. areq->sha_op_req.authklen))
  1078. return -EFAULT;
  1079. } else {
  1080. struct qcedev_async_req authkey_areq;
  1081. uint8_t authkey[QCEDEV_MAX_SHA_BLOCK_SIZE];
  1082. init_completion(&authkey_areq.complete);
  1083. authkey_areq.sha_op_req.entries = 1;
  1084. authkey_areq.sha_op_req.data[0].vaddr =
  1085. areq->sha_op_req.authkey;
  1086. authkey_areq.sha_op_req.data[0].len = areq->sha_op_req.authklen;
  1087. authkey_areq.sha_op_req.data_len = areq->sha_op_req.authklen;
  1088. authkey_areq.sha_op_req.diglen = 0;
  1089. authkey_areq.handle = handle;
  1090. memset(&authkey_areq.sha_op_req.digest[0], 0,
  1091. QCEDEV_MAX_SHA_DIGEST);
  1092. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  1093. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA1;
  1094. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)
  1095. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA256;
  1096. authkey_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  1097. qcedev_sha_init(&authkey_areq, handle);
  1098. err = qcedev_sha_update(&authkey_areq, handle, sg_src);
  1099. if (!err)
  1100. err = qcedev_sha_final(&authkey_areq, handle);
  1101. else
  1102. return err;
  1103. memcpy(&authkey[0], &handle->sha_ctxt.digest[0],
  1104. handle->sha_ctxt.diglen);
  1105. qcedev_sha_init(areq, handle);
  1106. memcpy(&handle->sha_ctxt.authkey[0], &authkey[0],
  1107. handle->sha_ctxt.diglen);
  1108. }
  1109. return err;
  1110. }
  1111. static int qcedev_hmac_get_ohash(struct qcedev_async_req *qcedev_areq,
  1112. struct qcedev_handle *handle)
  1113. {
  1114. int err = 0;
  1115. struct scatterlist sg_src;
  1116. uint8_t *k_src = NULL;
  1117. uint32_t sha_block_size = 0;
  1118. uint32_t sha_digest_size = 0;
  1119. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  1120. sha_digest_size = SHA1_DIGEST_SIZE;
  1121. sha_block_size = SHA1_BLOCK_SIZE;
  1122. } else {
  1123. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  1124. sha_digest_size = SHA256_DIGEST_SIZE;
  1125. sha_block_size = SHA256_BLOCK_SIZE;
  1126. }
  1127. }
  1128. k_src = kmalloc(sha_block_size, GFP_KERNEL);
  1129. if (k_src == NULL)
  1130. return -ENOMEM;
  1131. /* check for trailing buffer from previous updates and append it */
  1132. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  1133. handle->sha_ctxt.trailing_buf_len);
  1134. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  1135. sg_init_one(qcedev_areq->sha_req.sreq.src, k_src, sha_block_size);
  1136. qcedev_areq->sha_req.sreq.nbytes = sha_block_size;
  1137. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  1138. memcpy(&handle->sha_ctxt.trailing_buf[0], &handle->sha_ctxt.digest[0],
  1139. sha_digest_size);
  1140. handle->sha_ctxt.trailing_buf_len = sha_digest_size;
  1141. handle->sha_ctxt.first_blk = 1;
  1142. handle->sha_ctxt.last_blk = 0;
  1143. handle->sha_ctxt.auth_data[0] = 0;
  1144. handle->sha_ctxt.auth_data[1] = 0;
  1145. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  1146. memcpy(&handle->sha_ctxt.digest[0],
  1147. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  1148. handle->sha_ctxt.diglen = SHA1_DIGEST_SIZE;
  1149. }
  1150. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  1151. memcpy(&handle->sha_ctxt.digest[0],
  1152. &_std_init_vector_sha256_uint8[0], SHA256_DIGEST_SIZE);
  1153. handle->sha_ctxt.diglen = SHA256_DIGEST_SIZE;
  1154. }
  1155. err = submit_req(qcedev_areq, handle);
  1156. handle->sha_ctxt.last_blk = 0;
  1157. handle->sha_ctxt.first_blk = 0;
  1158. memset(k_src, 0, sha_block_size);
  1159. kfree(k_src);
  1160. qcedev_areq->sha_req.sreq.src = NULL;
  1161. return err;
  1162. }
  1163. static int qcedev_hmac_update_iokey(struct qcedev_async_req *areq,
  1164. struct qcedev_handle *handle, bool ikey)
  1165. {
  1166. int i;
  1167. uint32_t constant;
  1168. uint32_t sha_block_size;
  1169. if (ikey)
  1170. constant = 0x36;
  1171. else
  1172. constant = 0x5c;
  1173. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  1174. sha_block_size = SHA1_BLOCK_SIZE;
  1175. else
  1176. sha_block_size = SHA256_BLOCK_SIZE;
  1177. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  1178. for (i = 0; i < sha_block_size; i++)
  1179. handle->sha_ctxt.trailing_buf[i] =
  1180. (handle->sha_ctxt.authkey[i] ^ constant);
  1181. handle->sha_ctxt.trailing_buf_len = sha_block_size;
  1182. return 0;
  1183. }
  1184. static int qcedev_hmac_init(struct qcedev_async_req *areq,
  1185. struct qcedev_handle *handle,
  1186. struct scatterlist *sg_src)
  1187. {
  1188. int err;
  1189. struct qcedev_control *podev = handle->cntl;
  1190. err = qcedev_set_hmac_auth_key(areq, handle, sg_src);
  1191. if (err)
  1192. return err;
  1193. if (!podev->ce_support.sha_hmac)
  1194. qcedev_hmac_update_iokey(areq, handle, true);
  1195. return 0;
  1196. }
  1197. static int qcedev_hmac_final(struct qcedev_async_req *areq,
  1198. struct qcedev_handle *handle)
  1199. {
  1200. int err;
  1201. struct qcedev_control *podev = handle->cntl;
  1202. err = qcedev_sha_final(areq, handle);
  1203. if (podev->ce_support.sha_hmac)
  1204. return err;
  1205. qcedev_hmac_update_iokey(areq, handle, false);
  1206. err = qcedev_hmac_get_ohash(areq, handle);
  1207. if (err)
  1208. return err;
  1209. err = qcedev_sha_final(areq, handle);
  1210. return err;
  1211. }
  1212. static int qcedev_hash_init(struct qcedev_async_req *areq,
  1213. struct qcedev_handle *handle,
  1214. struct scatterlist *sg_src)
  1215. {
  1216. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  1217. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  1218. return qcedev_sha_init(areq, handle);
  1219. else
  1220. return qcedev_hmac_init(areq, handle, sg_src);
  1221. }
  1222. static int qcedev_hash_update(struct qcedev_async_req *qcedev_areq,
  1223. struct qcedev_handle *handle,
  1224. struct scatterlist *sg_src)
  1225. {
  1226. return qcedev_sha_update(qcedev_areq, handle, sg_src);
  1227. }
  1228. static int qcedev_hash_final(struct qcedev_async_req *areq,
  1229. struct qcedev_handle *handle)
  1230. {
  1231. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  1232. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  1233. return qcedev_sha_final(areq, handle);
  1234. else
  1235. return qcedev_hmac_final(areq, handle);
  1236. }
  1237. static int qcedev_vbuf_ablk_cipher_max_xfer(struct qcedev_async_req *areq,
  1238. int *di, struct qcedev_handle *handle,
  1239. uint8_t *k_align_src)
  1240. {
  1241. int err = 0;
  1242. int i = 0;
  1243. int dst_i = *di;
  1244. struct scatterlist sg_src;
  1245. uint32_t byteoffset = 0;
  1246. uint8_t *user_src = NULL;
  1247. uint8_t *k_align_dst = k_align_src;
  1248. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1249. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1250. byteoffset = areq->cipher_op_req.byteoffset;
  1251. user_src = areq->cipher_op_req.vbuf.src[0].vaddr;
  1252. if (user_src && copy_from_user((k_align_src + byteoffset),
  1253. (void __user *)user_src,
  1254. areq->cipher_op_req.vbuf.src[0].len))
  1255. return -EFAULT;
  1256. k_align_src += byteoffset + areq->cipher_op_req.vbuf.src[0].len;
  1257. for (i = 1; i < areq->cipher_op_req.entries; i++) {
  1258. user_src = areq->cipher_op_req.vbuf.src[i].vaddr;
  1259. if (user_src && copy_from_user(k_align_src,
  1260. (void __user *)user_src,
  1261. areq->cipher_op_req.vbuf.src[i].len)) {
  1262. return -EFAULT;
  1263. }
  1264. k_align_src += areq->cipher_op_req.vbuf.src[i].len;
  1265. }
  1266. /* restore src beginning */
  1267. k_align_src = k_align_dst;
  1268. areq->cipher_op_req.data_len += byteoffset;
  1269. areq->cipher_req.creq.src = (struct scatterlist *) &sg_src;
  1270. areq->cipher_req.creq.dst = (struct scatterlist *) &sg_src;
  1271. /* In place encryption/decryption */
  1272. sg_init_one(areq->cipher_req.creq.src,
  1273. k_align_dst,
  1274. areq->cipher_op_req.data_len);
  1275. areq->cipher_req.creq.cryptlen = areq->cipher_op_req.data_len;
  1276. areq->cipher_req.creq.iv = areq->cipher_op_req.iv;
  1277. areq->cipher_op_req.entries = 1;
  1278. err = submit_req(areq, handle);
  1279. /* copy data to destination buffer*/
  1280. creq->data_len -= byteoffset;
  1281. while (creq->data_len > 0) {
  1282. if (creq->vbuf.dst[dst_i].len <= creq->data_len) {
  1283. if (err == 0 && copy_to_user(
  1284. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1285. (k_align_dst + byteoffset),
  1286. creq->vbuf.dst[dst_i].len)) {
  1287. err = -EFAULT;
  1288. goto exit;
  1289. }
  1290. k_align_dst += creq->vbuf.dst[dst_i].len;
  1291. creq->data_len -= creq->vbuf.dst[dst_i].len;
  1292. dst_i++;
  1293. } else {
  1294. if (err == 0 && copy_to_user(
  1295. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1296. (k_align_dst + byteoffset),
  1297. creq->data_len)) {
  1298. err = -EFAULT;
  1299. goto exit;
  1300. }
  1301. k_align_dst += creq->data_len;
  1302. creq->vbuf.dst[dst_i].len -= creq->data_len;
  1303. creq->vbuf.dst[dst_i].vaddr += creq->data_len;
  1304. creq->data_len = 0;
  1305. }
  1306. }
  1307. *di = dst_i;
  1308. exit:
  1309. areq->cipher_req.creq.src = NULL;
  1310. areq->cipher_req.creq.dst = NULL;
  1311. return err;
  1312. };
  1313. static int qcedev_vbuf_ablk_cipher(struct qcedev_async_req *areq,
  1314. struct qcedev_handle *handle)
  1315. {
  1316. int err = 0;
  1317. int di = 0;
  1318. int i = 0;
  1319. int j = 0;
  1320. int k = 0;
  1321. uint32_t byteoffset = 0;
  1322. int num_entries = 0;
  1323. uint32_t total = 0;
  1324. uint32_t len;
  1325. uint8_t *k_buf_src = NULL;
  1326. uint32_t buf_size = 0;
  1327. uint8_t *k_align_src = NULL;
  1328. uint32_t max_data_xfer;
  1329. struct qcedev_cipher_op_req *saved_req;
  1330. uint32_t req_size = 0;
  1331. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1332. total = 0;
  1333. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1334. byteoffset = areq->cipher_op_req.byteoffset;
  1335. buf_size = QCE_MAX_OPER_DATA + CACHE_LINE_SIZE * 2;
  1336. k_buf_src = kmalloc(buf_size, GFP_KERNEL);
  1337. if (k_buf_src == NULL)
  1338. return -ENOMEM;
  1339. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  1340. CACHE_LINE_SIZE);
  1341. max_data_xfer = QCE_MAX_OPER_DATA - byteoffset;
  1342. req_size = sizeof(struct qcedev_cipher_op_req);
  1343. saved_req = kmemdup(creq, req_size, GFP_KERNEL);
  1344. if (saved_req == NULL) {
  1345. memset(k_buf_src, 0, buf_size);
  1346. kfree(k_buf_src);
  1347. return -ENOMEM;
  1348. }
  1349. if (areq->cipher_op_req.data_len > max_data_xfer) {
  1350. struct qcedev_cipher_op_req req;
  1351. /* save the original req structure */
  1352. memcpy(&req, creq, sizeof(struct qcedev_cipher_op_req));
  1353. i = 0;
  1354. /* Address 32 KB at a time */
  1355. while ((i < req.entries) && (err == 0)) {
  1356. if (creq->vbuf.src[i].len > max_data_xfer) {
  1357. creq->vbuf.src[0].len = max_data_xfer;
  1358. if (i > 0) {
  1359. creq->vbuf.src[0].vaddr =
  1360. creq->vbuf.src[i].vaddr;
  1361. }
  1362. creq->data_len = max_data_xfer;
  1363. creq->entries = 1;
  1364. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1365. &di, handle, k_align_src);
  1366. if (err < 0) {
  1367. memset(saved_req, 0, req_size);
  1368. memset(k_buf_src, 0, buf_size);
  1369. kfree(k_buf_src);
  1370. kfree(saved_req);
  1371. return err;
  1372. }
  1373. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1374. max_data_xfer;
  1375. creq->vbuf.src[i].vaddr =
  1376. req.vbuf.src[i].vaddr +
  1377. max_data_xfer;
  1378. req.vbuf.src[i].vaddr =
  1379. creq->vbuf.src[i].vaddr;
  1380. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1381. } else {
  1382. total = areq->cipher_op_req.byteoffset;
  1383. for (j = i; j < req.entries; j++) {
  1384. num_entries++;
  1385. if ((total + creq->vbuf.src[j].len)
  1386. >= max_data_xfer) {
  1387. creq->vbuf.src[j].len =
  1388. max_data_xfer - total;
  1389. total = max_data_xfer;
  1390. break;
  1391. }
  1392. total += creq->vbuf.src[j].len;
  1393. }
  1394. creq->data_len = total;
  1395. if (i > 0)
  1396. for (k = 0; k < num_entries; k++) {
  1397. creq->vbuf.src[k].len =
  1398. creq->vbuf.src[i+k].len;
  1399. creq->vbuf.src[k].vaddr =
  1400. creq->vbuf.src[i+k].vaddr;
  1401. }
  1402. creq->entries = num_entries;
  1403. i = j;
  1404. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1405. &di, handle, k_align_src);
  1406. if (err < 0) {
  1407. memset(saved_req, 0, req_size);
  1408. memset(k_buf_src, 0, buf_size);
  1409. kfree(k_buf_src);
  1410. kfree(saved_req);
  1411. return err;
  1412. }
  1413. num_entries = 0;
  1414. areq->cipher_op_req.byteoffset = 0;
  1415. creq->vbuf.src[i].vaddr = req.vbuf.src[i].vaddr
  1416. + creq->vbuf.src[i].len;
  1417. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1418. creq->vbuf.src[i].len;
  1419. req.vbuf.src[i].vaddr =
  1420. creq->vbuf.src[i].vaddr;
  1421. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1422. if (creq->vbuf.src[i].len == 0)
  1423. i++;
  1424. }
  1425. areq->cipher_op_req.byteoffset = 0;
  1426. max_data_xfer = QCE_MAX_OPER_DATA;
  1427. byteoffset = 0;
  1428. } /* end of while ((i < req.entries) && (err == 0)) */
  1429. } else
  1430. err = qcedev_vbuf_ablk_cipher_max_xfer(areq, &di, handle,
  1431. k_align_src);
  1432. /* Restore the original req structure */
  1433. for (i = 0; i < saved_req->entries; i++) {
  1434. creq->vbuf.src[i].len = saved_req->vbuf.src[i].len;
  1435. creq->vbuf.src[i].vaddr = saved_req->vbuf.src[i].vaddr;
  1436. }
  1437. for (len = 0, i = 0; len < saved_req->data_len; i++) {
  1438. creq->vbuf.dst[i].len = saved_req->vbuf.dst[i].len;
  1439. creq->vbuf.dst[i].vaddr = saved_req->vbuf.dst[i].vaddr;
  1440. len += saved_req->vbuf.dst[i].len;
  1441. }
  1442. creq->entries = saved_req->entries;
  1443. creq->data_len = saved_req->data_len;
  1444. creq->byteoffset = saved_req->byteoffset;
  1445. memset(saved_req, 0, req_size);
  1446. memset(k_buf_src, 0, buf_size);
  1447. kfree(saved_req);
  1448. kfree(k_buf_src);
  1449. return err;
  1450. }
  1451. static int qcedev_smmu_ablk_offload_cipher(struct qcedev_async_req *areq,
  1452. struct qcedev_handle *handle)
  1453. {
  1454. int i = 0;
  1455. int err = 0;
  1456. size_t byteoffset = 0;
  1457. size_t transfer_data_len = 0;
  1458. size_t pending_data_len = 0;
  1459. size_t max_data_xfer = MAX_CEHW_REQ_TRANSFER_SIZE - byteoffset;
  1460. uint8_t *user_src = NULL;
  1461. uint8_t *user_dst = NULL;
  1462. struct scatterlist sg_src;
  1463. struct scatterlist sg_dst;
  1464. if (areq->offload_cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1465. byteoffset = areq->offload_cipher_op_req.byteoffset;
  1466. /*
  1467. * areq has two components:
  1468. * a) Request that comes from userspace i.e. offload_cipher_op_req
  1469. * b) Request that QCE understands - skcipher i.e. cipher_req.creq
  1470. * skcipher has sglist pointers src and dest that would carry
  1471. * data to/from CE.
  1472. */
  1473. areq->cipher_req.creq.src = &sg_src;
  1474. areq->cipher_req.creq.dst = &sg_dst;
  1475. sg_init_table(&sg_src, 1);
  1476. sg_init_table(&sg_dst, 1);
  1477. for (i = 0; i < areq->offload_cipher_op_req.entries; i++) {
  1478. transfer_data_len = 0;
  1479. pending_data_len = areq->offload_cipher_op_req.vbuf.src[i].len;
  1480. user_src = areq->offload_cipher_op_req.vbuf.src[i].vaddr;
  1481. user_src += byteoffset;
  1482. user_dst = areq->offload_cipher_op_req.vbuf.dst[i].vaddr;
  1483. user_dst += byteoffset;
  1484. areq->cipher_req.creq.iv = areq->offload_cipher_op_req.iv;
  1485. while (pending_data_len) {
  1486. transfer_data_len = min(max_data_xfer,
  1487. pending_data_len);
  1488. sg_src.dma_address = (dma_addr_t)user_src;
  1489. sg_dst.dma_address = (dma_addr_t)user_dst;
  1490. areq->cipher_req.creq.cryptlen = transfer_data_len;
  1491. sg_src.length = transfer_data_len;
  1492. sg_dst.length = transfer_data_len;
  1493. err = submit_req(areq, handle);
  1494. if (err) {
  1495. pr_err("%s: Error processing req, err = %d\n",
  1496. __func__, err);
  1497. goto exit;
  1498. }
  1499. /* update data len to be processed */
  1500. pending_data_len -= transfer_data_len;
  1501. user_src += transfer_data_len;
  1502. user_dst += transfer_data_len;
  1503. }
  1504. }
  1505. exit:
  1506. areq->cipher_req.creq.src = NULL;
  1507. areq->cipher_req.creq.dst = NULL;
  1508. return err;
  1509. }
  1510. static int qcedev_check_cipher_key(struct qcedev_cipher_op_req *req,
  1511. struct qcedev_control *podev)
  1512. {
  1513. /* if intending to use HW key make sure key fields are set
  1514. * correctly and HW key is indeed supported in target
  1515. */
  1516. if (req->encklen == 0) {
  1517. int i;
  1518. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  1519. if (req->enckey[i]) {
  1520. pr_err("%s: Invalid key: non-zero key input\n",
  1521. __func__);
  1522. goto error;
  1523. }
  1524. }
  1525. if ((req->op != QCEDEV_OPER_ENC_NO_KEY) &&
  1526. (req->op != QCEDEV_OPER_DEC_NO_KEY))
  1527. if (!podev->platform_support.hw_key_support) {
  1528. pr_err("%s: Invalid op %d\n", __func__,
  1529. (uint32_t)req->op);
  1530. goto error;
  1531. }
  1532. } else {
  1533. if (req->encklen == QCEDEV_AES_KEY_192) {
  1534. if (!podev->ce_support.aes_key_192) {
  1535. pr_err("%s: AES-192 not supported\n", __func__);
  1536. goto error;
  1537. }
  1538. } else {
  1539. /* if not using HW key make sure key
  1540. * length is valid
  1541. */
  1542. if (req->mode == QCEDEV_AES_MODE_XTS) {
  1543. if ((req->encklen != QCEDEV_AES_KEY_128*2) &&
  1544. (req->encklen != QCEDEV_AES_KEY_256*2)) {
  1545. pr_err("%s: unsupported key size: %d\n",
  1546. __func__, req->encklen);
  1547. goto error;
  1548. }
  1549. } else {
  1550. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1551. (req->encklen != QCEDEV_AES_KEY_256)) {
  1552. pr_err("%s: unsupported key size %d\n",
  1553. __func__, req->encklen);
  1554. goto error;
  1555. }
  1556. }
  1557. }
  1558. }
  1559. return 0;
  1560. error:
  1561. return -EINVAL;
  1562. }
  1563. static int qcedev_check_cipher_params(struct qcedev_cipher_op_req *req,
  1564. struct qcedev_control *podev)
  1565. {
  1566. uint32_t total = 0;
  1567. uint32_t i;
  1568. if (req->use_pmem) {
  1569. pr_err("%s: Use of PMEM is not supported\n", __func__);
  1570. goto error;
  1571. }
  1572. if ((req->entries == 0) || (req->data_len == 0) ||
  1573. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1574. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1575. goto error;
  1576. }
  1577. if ((req->alg >= QCEDEV_ALG_LAST) ||
  1578. (req->mode >= QCEDEV_AES_DES_MODE_LAST)) {
  1579. pr_err("%s: Invalid algorithm %d\n", __func__,
  1580. (uint32_t)req->alg);
  1581. goto error;
  1582. }
  1583. if ((req->mode == QCEDEV_AES_MODE_XTS) &&
  1584. (!podev->ce_support.aes_xts)) {
  1585. pr_err("%s: XTS algorithm is not supported\n", __func__);
  1586. goto error;
  1587. }
  1588. if (req->alg == QCEDEV_ALG_AES) {
  1589. if (qcedev_check_cipher_key(req, podev))
  1590. goto error;
  1591. }
  1592. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1593. if (req->byteoffset) {
  1594. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1595. pr_err("%s: Operation on byte offset not supported\n",
  1596. __func__);
  1597. goto error;
  1598. }
  1599. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1600. pr_err("%s: Invalid byte offset\n", __func__);
  1601. goto error;
  1602. }
  1603. total = req->byteoffset;
  1604. for (i = 0; i < req->entries; i++) {
  1605. if (total > U32_MAX - req->vbuf.src[i].len) {
  1606. pr_err("%s:Integer overflow on total src len\n",
  1607. __func__);
  1608. goto error;
  1609. }
  1610. total += req->vbuf.src[i].len;
  1611. }
  1612. }
  1613. if (req->data_len < req->byteoffset) {
  1614. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1615. __func__, req->data_len, req->byteoffset);
  1616. goto error;
  1617. }
  1618. /* Ensure IV size */
  1619. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1620. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1621. goto error;
  1622. }
  1623. /* Ensure Key size */
  1624. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1625. pr_err("%s: Klen is not correct: %u\n", __func__, req->encklen);
  1626. goto error;
  1627. }
  1628. /* Ensure zer ivlen for ECB mode */
  1629. if (req->ivlen > 0) {
  1630. if ((req->mode == QCEDEV_AES_MODE_ECB) ||
  1631. (req->mode == QCEDEV_DES_MODE_ECB)) {
  1632. pr_err("%s: Expecting a zero length IV\n", __func__);
  1633. goto error;
  1634. }
  1635. } else {
  1636. if ((req->mode != QCEDEV_AES_MODE_ECB) &&
  1637. (req->mode != QCEDEV_DES_MODE_ECB)) {
  1638. pr_err("%s: Expecting a non-zero ength IV\n", __func__);
  1639. goto error;
  1640. }
  1641. }
  1642. /* Check for sum of all dst length is equal to data_len */
  1643. for (i = 0, total = 0; i < req->entries; i++) {
  1644. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1645. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1646. __func__, i, req->vbuf.dst[i].len);
  1647. goto error;
  1648. }
  1649. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1650. pr_err("%s: Integer overflow on total req dst vbuf length\n",
  1651. __func__);
  1652. goto error;
  1653. }
  1654. total += req->vbuf.dst[i].len;
  1655. }
  1656. if (total != req->data_len) {
  1657. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1658. __func__, i, total, req->data_len);
  1659. goto error;
  1660. }
  1661. /* Check for sum of all src length is equal to data_len */
  1662. for (i = 0, total = 0; i < req->entries; i++) {
  1663. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1664. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1665. __func__, i, req->vbuf.src[i].len);
  1666. goto error;
  1667. }
  1668. if (req->vbuf.src[i].len > U32_MAX - total) {
  1669. pr_err("%s: Integer overflow on total req src vbuf length\n",
  1670. __func__);
  1671. goto error;
  1672. }
  1673. total += req->vbuf.src[i].len;
  1674. }
  1675. if (total != req->data_len) {
  1676. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1677. __func__, total, req->data_len);
  1678. goto error;
  1679. }
  1680. return 0;
  1681. error:
  1682. return -EINVAL;
  1683. }
  1684. static int qcedev_check_sha_params(struct qcedev_sha_op_req *req,
  1685. struct qcedev_control *podev)
  1686. {
  1687. uint32_t total = 0;
  1688. uint32_t i;
  1689. if ((req->alg == QCEDEV_ALG_AES_CMAC) &&
  1690. (!podev->ce_support.cmac)) {
  1691. pr_err("%s: CMAC not supported\n", __func__);
  1692. goto sha_error;
  1693. }
  1694. if ((!req->entries) || (req->entries > QCEDEV_MAX_BUFFERS)) {
  1695. pr_err("%s: Invalid num entries (%d)\n",
  1696. __func__, req->entries);
  1697. goto sha_error;
  1698. }
  1699. if (req->alg >= QCEDEV_ALG_SHA_ALG_LAST) {
  1700. pr_err("%s: Invalid algorithm (%d)\n", __func__, req->alg);
  1701. goto sha_error;
  1702. }
  1703. if ((req->alg == QCEDEV_ALG_SHA1_HMAC) ||
  1704. (req->alg == QCEDEV_ALG_SHA256_HMAC)) {
  1705. if (req->authkey == NULL) {
  1706. pr_err("%s: Invalid authkey pointer\n", __func__);
  1707. goto sha_error;
  1708. }
  1709. if (req->authklen <= 0) {
  1710. pr_err("%s: Invalid authkey length (%d)\n",
  1711. __func__, req->authklen);
  1712. goto sha_error;
  1713. }
  1714. }
  1715. if (req->alg == QCEDEV_ALG_AES_CMAC) {
  1716. if ((req->authklen != QCEDEV_AES_KEY_128) &&
  1717. (req->authklen != QCEDEV_AES_KEY_256)) {
  1718. pr_err("%s: unsupported key length\n", __func__);
  1719. goto sha_error;
  1720. }
  1721. }
  1722. /* Check for sum of all src length is equal to data_len */
  1723. for (i = 0, total = 0; i < req->entries; i++) {
  1724. if (req->data[i].len > U32_MAX - total) {
  1725. pr_err("%s: Integer overflow on total req buf length\n",
  1726. __func__);
  1727. goto sha_error;
  1728. }
  1729. total += req->data[i].len;
  1730. }
  1731. if (total != req->data_len) {
  1732. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1733. __func__, total, req->data_len);
  1734. goto sha_error;
  1735. }
  1736. return 0;
  1737. sha_error:
  1738. return -EINVAL;
  1739. }
  1740. static int qcedev_check_offload_cipher_key(struct qcedev_offload_cipher_op_req *req,
  1741. struct qcedev_control *podev)
  1742. {
  1743. if (req->encklen == 0)
  1744. return -EINVAL;
  1745. /* AES-192 is not a valid option for OFFLOAD use case */
  1746. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1747. (req->encklen != QCEDEV_AES_KEY_256)) {
  1748. pr_err("%s: unsupported key size %d\n",
  1749. __func__, req->encklen);
  1750. goto error;
  1751. }
  1752. return 0;
  1753. error:
  1754. return -EINVAL;
  1755. }
  1756. static int qcedev_check_offload_cipher_params(struct qcedev_offload_cipher_op_req *req,
  1757. struct qcedev_control *podev)
  1758. {
  1759. uint32_t total = 0;
  1760. int i = 0;
  1761. if ((req->entries == 0) || (req->data_len == 0) ||
  1762. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1763. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1764. goto error;
  1765. }
  1766. if ((req->alg != QCEDEV_ALG_AES) ||
  1767. (req->mode > QCEDEV_AES_MODE_CTR)) {
  1768. pr_err("%s: Invalid algorithm %d\n", __func__,
  1769. (uint32_t)req->alg);
  1770. goto error;
  1771. }
  1772. if (qcedev_check_offload_cipher_key(req, podev))
  1773. goto error;
  1774. if (req->block_offset >= AES_CE_BLOCK_SIZE)
  1775. goto error;
  1776. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1777. if (req->byteoffset) {
  1778. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1779. pr_err("%s: Operation on byte offset not supported\n",
  1780. __func__);
  1781. goto error;
  1782. }
  1783. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1784. pr_err("%s: Invalid byte offset\n", __func__);
  1785. goto error;
  1786. }
  1787. total = req->byteoffset;
  1788. for (i = 0; i < req->entries; i++) {
  1789. if (total > U32_MAX - req->vbuf.src[i].len) {
  1790. pr_err("%s:Int overflow on total src len\n",
  1791. __func__);
  1792. goto error;
  1793. }
  1794. total += req->vbuf.src[i].len;
  1795. }
  1796. }
  1797. if (req->data_len < req->byteoffset) {
  1798. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1799. __func__, req->data_len, req->byteoffset);
  1800. goto error;
  1801. }
  1802. /* Ensure IV size */
  1803. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1804. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1805. goto error;
  1806. }
  1807. /* Ensure Key size */
  1808. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1809. pr_err("%s: Klen is not correct: %u\n", __func__,
  1810. req->encklen);
  1811. goto error;
  1812. }
  1813. /* Check for sum of all dst length is equal to data_len */
  1814. for (i = 0, total = 0; i < req->entries; i++) {
  1815. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1816. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1817. __func__, i, req->vbuf.dst[i].len);
  1818. goto error;
  1819. }
  1820. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1821. pr_err("%s: Int overflow on total req dst vbuf len\n",
  1822. __func__);
  1823. goto error;
  1824. }
  1825. total += req->vbuf.dst[i].len;
  1826. }
  1827. if (total != req->data_len) {
  1828. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1829. __func__, i, total, req->data_len);
  1830. goto error;
  1831. }
  1832. /* Check for sum of all src length is equal to data_len */
  1833. for (i = 0, total = 0; i < req->entries; i++) {
  1834. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1835. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1836. __func__, i, req->vbuf.src[i].len);
  1837. goto error;
  1838. }
  1839. if (req->vbuf.src[i].len > U32_MAX - total) {
  1840. pr_err("%s: Int overflow on total req src vbuf len\n",
  1841. __func__);
  1842. goto error;
  1843. }
  1844. total += req->vbuf.src[i].len;
  1845. }
  1846. if (total != req->data_len) {
  1847. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1848. __func__, total, req->data_len);
  1849. goto error;
  1850. }
  1851. return 0;
  1852. error:
  1853. return -EINVAL;
  1854. }
  1855. long qcedev_ioctl(struct file *file,
  1856. unsigned int cmd, unsigned long arg)
  1857. {
  1858. int err = 0;
  1859. struct qcedev_handle *handle;
  1860. struct qcedev_control *podev;
  1861. struct qcedev_async_req *qcedev_areq;
  1862. struct qcedev_stat *pstat;
  1863. qcedev_areq = kzalloc(sizeof(struct qcedev_async_req), GFP_KERNEL);
  1864. if (!qcedev_areq)
  1865. return -ENOMEM;
  1866. handle = file->private_data;
  1867. podev = handle->cntl;
  1868. qcedev_areq->handle = handle;
  1869. if (podev == NULL || podev->magic != QCEDEV_MAGIC) {
  1870. pr_err("%s: invalid handle %pK\n",
  1871. __func__, podev);
  1872. err = -ENOENT;
  1873. goto exit_free_qcedev_areq;
  1874. }
  1875. /* Verify user arguments. */
  1876. if (_IOC_TYPE(cmd) != QCEDEV_IOC_MAGIC) {
  1877. err = -ENOTTY;
  1878. goto exit_free_qcedev_areq;
  1879. }
  1880. init_completion(&qcedev_areq->complete);
  1881. pstat = &_qcedev_stat;
  1882. switch (cmd) {
  1883. case QCEDEV_IOCTL_ENC_REQ:
  1884. case QCEDEV_IOCTL_DEC_REQ:
  1885. if (copy_from_user(&qcedev_areq->cipher_op_req,
  1886. (void __user *)arg,
  1887. sizeof(struct qcedev_cipher_op_req))) {
  1888. err = -EFAULT;
  1889. goto exit_free_qcedev_areq;
  1890. }
  1891. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_CIPHER;
  1892. if (qcedev_check_cipher_params(&qcedev_areq->cipher_op_req,
  1893. podev)) {
  1894. err = -EINVAL;
  1895. goto exit_free_qcedev_areq;
  1896. }
  1897. err = qcedev_vbuf_ablk_cipher(qcedev_areq, handle);
  1898. if (err)
  1899. goto exit_free_qcedev_areq;
  1900. if (copy_to_user((void __user *)arg,
  1901. &qcedev_areq->cipher_op_req,
  1902. sizeof(struct qcedev_cipher_op_req))) {
  1903. err = -EFAULT;
  1904. goto exit_free_qcedev_areq;
  1905. }
  1906. break;
  1907. case QCEDEV_IOCTL_OFFLOAD_OP_REQ:
  1908. if (copy_from_user(&qcedev_areq->offload_cipher_op_req,
  1909. (void __user *)arg,
  1910. sizeof(struct qcedev_offload_cipher_op_req))) {
  1911. err = -EFAULT;
  1912. goto exit_free_qcedev_areq;
  1913. }
  1914. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER;
  1915. if (qcedev_check_offload_cipher_params(
  1916. &qcedev_areq->offload_cipher_op_req, podev)) {
  1917. err = -EINVAL;
  1918. goto exit_free_qcedev_areq;
  1919. }
  1920. qcedev_areq->offload_cipher_op_req.err = QCEDEV_OFFLOAD_NO_ERROR;
  1921. err = qcedev_smmu_ablk_offload_cipher(qcedev_areq, handle);
  1922. if (err)
  1923. goto exit_free_qcedev_areq;
  1924. if (copy_to_user((void __user *)arg,
  1925. &qcedev_areq->offload_cipher_op_req,
  1926. sizeof(struct qcedev_offload_cipher_op_req))) {
  1927. err = -EFAULT;
  1928. goto exit_free_qcedev_areq;
  1929. }
  1930. break;
  1931. case QCEDEV_IOCTL_SHA_INIT_REQ:
  1932. {
  1933. struct scatterlist sg_src;
  1934. if (copy_from_user(&qcedev_areq->sha_op_req,
  1935. (void __user *)arg,
  1936. sizeof(struct qcedev_sha_op_req))) {
  1937. err = -EFAULT;
  1938. goto exit_free_qcedev_areq;
  1939. }
  1940. mutex_lock(&hash_access_lock);
  1941. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1942. mutex_unlock(&hash_access_lock);
  1943. err = -EINVAL;
  1944. goto exit_free_qcedev_areq;
  1945. }
  1946. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1947. err = qcedev_hash_init(qcedev_areq, handle, &sg_src);
  1948. if (err) {
  1949. mutex_unlock(&hash_access_lock);
  1950. goto exit_free_qcedev_areq;
  1951. }
  1952. mutex_unlock(&hash_access_lock);
  1953. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  1954. sizeof(struct qcedev_sha_op_req))) {
  1955. err = -EFAULT;
  1956. goto exit_free_qcedev_areq;
  1957. }
  1958. handle->sha_ctxt.init_done = true;
  1959. }
  1960. break;
  1961. case QCEDEV_IOCTL_GET_CMAC_REQ:
  1962. if (!podev->ce_support.cmac) {
  1963. err = -ENOTTY;
  1964. goto exit_free_qcedev_areq;
  1965. }
  1966. fallthrough;
  1967. case QCEDEV_IOCTL_SHA_UPDATE_REQ:
  1968. {
  1969. struct scatterlist sg_src;
  1970. if (copy_from_user(&qcedev_areq->sha_op_req,
  1971. (void __user *)arg,
  1972. sizeof(struct qcedev_sha_op_req))) {
  1973. err = -EFAULT;
  1974. goto exit_free_qcedev_areq;
  1975. }
  1976. mutex_lock(&hash_access_lock);
  1977. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1978. mutex_unlock(&hash_access_lock);
  1979. err = -EINVAL;
  1980. goto exit_free_qcedev_areq;
  1981. }
  1982. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1983. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_AES_CMAC) {
  1984. err = qcedev_hash_cmac(qcedev_areq, handle, &sg_src);
  1985. if (err) {
  1986. mutex_unlock(&hash_access_lock);
  1987. goto exit_free_qcedev_areq;
  1988. }
  1989. } else {
  1990. if (!handle->sha_ctxt.init_done) {
  1991. pr_err("%s Init was not called\n", __func__);
  1992. mutex_unlock(&hash_access_lock);
  1993. err = -EINVAL;
  1994. goto exit_free_qcedev_areq;
  1995. }
  1996. err = qcedev_hash_update(qcedev_areq, handle, &sg_src);
  1997. if (err) {
  1998. mutex_unlock(&hash_access_lock);
  1999. goto exit_free_qcedev_areq;
  2000. }
  2001. }
  2002. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  2003. pr_err("Invalid sha_ctxt.diglen %d\n",
  2004. handle->sha_ctxt.diglen);
  2005. mutex_unlock(&hash_access_lock);
  2006. err = -EINVAL;
  2007. goto exit_free_qcedev_areq;
  2008. }
  2009. memcpy(&qcedev_areq->sha_op_req.digest[0],
  2010. &handle->sha_ctxt.digest[0],
  2011. handle->sha_ctxt.diglen);
  2012. mutex_unlock(&hash_access_lock);
  2013. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  2014. sizeof(struct qcedev_sha_op_req))) {
  2015. err = -EFAULT;
  2016. goto exit_free_qcedev_areq;
  2017. }
  2018. }
  2019. break;
  2020. case QCEDEV_IOCTL_SHA_FINAL_REQ:
  2021. if (!handle->sha_ctxt.init_done) {
  2022. pr_err("%s Init was not called\n", __func__);
  2023. err = -EINVAL;
  2024. goto exit_free_qcedev_areq;
  2025. }
  2026. if (copy_from_user(&qcedev_areq->sha_op_req,
  2027. (void __user *)arg,
  2028. sizeof(struct qcedev_sha_op_req))) {
  2029. err = -EFAULT;
  2030. goto exit_free_qcedev_areq;
  2031. }
  2032. mutex_lock(&hash_access_lock);
  2033. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  2034. mutex_unlock(&hash_access_lock);
  2035. err = -EINVAL;
  2036. goto exit_free_qcedev_areq;
  2037. }
  2038. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  2039. err = qcedev_hash_final(qcedev_areq, handle);
  2040. if (err) {
  2041. mutex_unlock(&hash_access_lock);
  2042. goto exit_free_qcedev_areq;
  2043. }
  2044. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  2045. pr_err("Invalid sha_ctxt.diglen %d\n",
  2046. handle->sha_ctxt.diglen);
  2047. mutex_unlock(&hash_access_lock);
  2048. err = -EINVAL;
  2049. goto exit_free_qcedev_areq;
  2050. }
  2051. qcedev_areq->sha_op_req.diglen = handle->sha_ctxt.diglen;
  2052. memcpy(&qcedev_areq->sha_op_req.digest[0],
  2053. &handle->sha_ctxt.digest[0],
  2054. handle->sha_ctxt.diglen);
  2055. mutex_unlock(&hash_access_lock);
  2056. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  2057. sizeof(struct qcedev_sha_op_req))) {
  2058. err = -EFAULT;
  2059. goto exit_free_qcedev_areq;
  2060. }
  2061. handle->sha_ctxt.init_done = false;
  2062. break;
  2063. case QCEDEV_IOCTL_GET_SHA_REQ:
  2064. {
  2065. struct scatterlist sg_src;
  2066. if (copy_from_user(&qcedev_areq->sha_op_req,
  2067. (void __user *)arg,
  2068. sizeof(struct qcedev_sha_op_req))) {
  2069. err = -EFAULT;
  2070. goto exit_free_qcedev_areq;
  2071. }
  2072. mutex_lock(&hash_access_lock);
  2073. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  2074. mutex_unlock(&hash_access_lock);
  2075. err = -EINVAL;
  2076. goto exit_free_qcedev_areq;
  2077. }
  2078. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  2079. qcedev_hash_init(qcedev_areq, handle, &sg_src);
  2080. err = qcedev_hash_update(qcedev_areq, handle, &sg_src);
  2081. if (err) {
  2082. mutex_unlock(&hash_access_lock);
  2083. goto exit_free_qcedev_areq;
  2084. }
  2085. err = qcedev_hash_final(qcedev_areq, handle);
  2086. if (err) {
  2087. mutex_unlock(&hash_access_lock);
  2088. goto exit_free_qcedev_areq;
  2089. }
  2090. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  2091. pr_err("Invalid sha_ctxt.diglen %d\n",
  2092. handle->sha_ctxt.diglen);
  2093. mutex_unlock(&hash_access_lock);
  2094. err = -EINVAL;
  2095. goto exit_free_qcedev_areq;
  2096. }
  2097. qcedev_areq->sha_op_req.diglen = handle->sha_ctxt.diglen;
  2098. memcpy(&qcedev_areq->sha_op_req.digest[0],
  2099. &handle->sha_ctxt.digest[0],
  2100. handle->sha_ctxt.diglen);
  2101. mutex_unlock(&hash_access_lock);
  2102. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  2103. sizeof(struct qcedev_sha_op_req))) {
  2104. err = -EFAULT;
  2105. goto exit_free_qcedev_areq;
  2106. }
  2107. }
  2108. break;
  2109. case QCEDEV_IOCTL_MAP_BUF_REQ:
  2110. {
  2111. unsigned long long vaddr = 0;
  2112. struct qcedev_map_buf_req map_buf = { {0} };
  2113. int i = 0;
  2114. if (copy_from_user(&map_buf,
  2115. (void __user *)arg, sizeof(map_buf))) {
  2116. err = -EFAULT;
  2117. goto exit_free_qcedev_areq;
  2118. }
  2119. if (map_buf.num_fds > ARRAY_SIZE(map_buf.fd)) {
  2120. pr_err("%s: err: num_fds = %d exceeds max value\n",
  2121. __func__, map_buf.num_fds);
  2122. err = -EINVAL;
  2123. goto exit_free_qcedev_areq;
  2124. }
  2125. for (i = 0; i < map_buf.num_fds; i++) {
  2126. err = qcedev_check_and_map_buffer(handle,
  2127. map_buf.fd[i],
  2128. map_buf.fd_offset[i],
  2129. map_buf.fd_size[i],
  2130. &vaddr);
  2131. if (err) {
  2132. pr_err(
  2133. "%s: err: failed to map fd(%d) - %d\n",
  2134. __func__, map_buf.fd[i], err);
  2135. goto exit_free_qcedev_areq;
  2136. }
  2137. map_buf.buf_vaddr[i] = vaddr;
  2138. pr_info("%s: info: vaddr = %llx\n, fd = %d",
  2139. __func__, vaddr, map_buf.fd[i]);
  2140. }
  2141. if (copy_to_user((void __user *)arg, &map_buf,
  2142. sizeof(map_buf))) {
  2143. err = -EFAULT;
  2144. goto exit_free_qcedev_areq;
  2145. }
  2146. break;
  2147. }
  2148. case QCEDEV_IOCTL_UNMAP_BUF_REQ:
  2149. {
  2150. struct qcedev_unmap_buf_req unmap_buf = { { 0 } };
  2151. int i = 0;
  2152. if (copy_from_user(&unmap_buf,
  2153. (void __user *)arg, sizeof(unmap_buf))) {
  2154. err = -EFAULT;
  2155. goto exit_free_qcedev_areq;
  2156. }
  2157. if (unmap_buf.num_fds > ARRAY_SIZE(unmap_buf.fd)) {
  2158. pr_err("%s: err: num_fds = %d exceeds max value\n",
  2159. __func__, unmap_buf.num_fds);
  2160. err = -EINVAL;
  2161. goto exit_free_qcedev_areq;
  2162. }
  2163. for (i = 0; i < unmap_buf.num_fds; i++) {
  2164. err = qcedev_check_and_unmap_buffer(handle,
  2165. unmap_buf.fd[i]);
  2166. if (err) {
  2167. pr_err(
  2168. "%s: err: failed to unmap fd(%d) - %d\n",
  2169. __func__,
  2170. unmap_buf.fd[i], err);
  2171. goto exit_free_qcedev_areq;
  2172. }
  2173. }
  2174. break;
  2175. }
  2176. default:
  2177. err = -ENOTTY;
  2178. goto exit_free_qcedev_areq;
  2179. }
  2180. exit_free_qcedev_areq:
  2181. kfree(qcedev_areq);
  2182. return err;
  2183. }
  2184. static int qcedev_probe_device(struct platform_device *pdev)
  2185. {
  2186. void *handle = NULL;
  2187. int rc = 0;
  2188. struct qcedev_control *podev;
  2189. struct msm_ce_hw_support *platform_support;
  2190. podev = &qce_dev[0];
  2191. rc = alloc_chrdev_region(&qcedev_device_no, 0, 1, QCEDEV_DEV);
  2192. if (rc < 0) {
  2193. pr_err("alloc_chrdev_region failed %d\n", rc);
  2194. return rc;
  2195. }
  2196. driver_class = class_create(THIS_MODULE, QCEDEV_DEV);
  2197. if (IS_ERR(driver_class)) {
  2198. rc = -ENOMEM;
  2199. pr_err("class_create failed %d\n", rc);
  2200. goto exit_unreg_chrdev_region;
  2201. }
  2202. class_dev = device_create(driver_class, NULL, qcedev_device_no, NULL,
  2203. QCEDEV_DEV);
  2204. if (IS_ERR(class_dev)) {
  2205. pr_err("class_device_create failed %d\n", rc);
  2206. rc = -ENOMEM;
  2207. goto exit_destroy_class;
  2208. }
  2209. cdev_init(&podev->cdev, &qcedev_fops);
  2210. podev->cdev.owner = THIS_MODULE;
  2211. rc = cdev_add(&podev->cdev, MKDEV(MAJOR(qcedev_device_no), 0), 1);
  2212. if (rc < 0) {
  2213. pr_err("cdev_add failed %d\n", rc);
  2214. goto exit_destroy_device;
  2215. }
  2216. podev->minor = 0;
  2217. podev->high_bw_req_count = 0;
  2218. INIT_LIST_HEAD(&podev->ready_commands);
  2219. podev->active_command = NULL;
  2220. INIT_LIST_HEAD(&podev->context_banks);
  2221. spin_lock_init(&podev->lock);
  2222. tasklet_init(&podev->done_tasklet, req_done, (unsigned long)podev);
  2223. podev->icc_path = of_icc_get(&pdev->dev, "data_path");
  2224. if (IS_ERR(podev->icc_path)) {
  2225. rc = PTR_ERR(podev->icc_path);
  2226. pr_err("%s Failed to get icc path with error %d\n",
  2227. __func__, rc);
  2228. goto exit_del_cdev;
  2229. }
  2230. /*
  2231. * HLOS crypto vote values from DTSI. If no values specified, use
  2232. * nominal values.
  2233. */
  2234. if (of_property_read_u32((&pdev->dev)->of_node,
  2235. "qcom,icc_avg_bw",
  2236. &podev->icc_avg_bw)) {
  2237. pr_warn("%s: No icc avg BW set, using default\n", __func__);
  2238. podev->icc_avg_bw = CRYPTO_AVG_BW;
  2239. }
  2240. if (of_property_read_u32((&pdev->dev)->of_node,
  2241. "qcom,icc_peak_bw",
  2242. &podev->icc_peak_bw)) {
  2243. pr_warn("%s: No icc peak BW set, using default\n", __func__);
  2244. podev->icc_peak_bw = CRYPTO_PEAK_BW;
  2245. }
  2246. rc = icc_set_bw(podev->icc_path, podev->icc_avg_bw,
  2247. podev->icc_peak_bw);
  2248. if (rc) {
  2249. pr_err("%s Unable to set high bandwidth\n", __func__);
  2250. goto exit_unregister_bus_scale;
  2251. }
  2252. handle = qce_open(pdev, &rc);
  2253. if (handle == NULL) {
  2254. rc = -ENODEV;
  2255. goto exit_scale_busbandwidth;
  2256. }
  2257. podev->qce = handle;
  2258. rc = qce_set_irqs(podev->qce, false);
  2259. if (rc) {
  2260. pr_err("%s: could not disable bam irqs, ret = %d",
  2261. __func__, rc);
  2262. goto exit_scale_busbandwidth;
  2263. }
  2264. rc = icc_set_bw(podev->icc_path, 0, 0);
  2265. if (rc) {
  2266. pr_err("%s Unable to set to low bandwidth\n", __func__);
  2267. goto exit_qce_close;
  2268. }
  2269. podev->pdev = pdev;
  2270. platform_set_drvdata(pdev, podev);
  2271. qce_hw_support(podev->qce, &podev->ce_support);
  2272. if (podev->ce_support.bam) {
  2273. podev->platform_support.ce_shared = 0;
  2274. podev->platform_support.shared_ce_resource = 0;
  2275. podev->platform_support.hw_key_support =
  2276. podev->ce_support.hw_key;
  2277. podev->platform_support.sha_hmac = 1;
  2278. } else {
  2279. platform_support =
  2280. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  2281. podev->platform_support.ce_shared = platform_support->ce_shared;
  2282. podev->platform_support.shared_ce_resource =
  2283. platform_support->shared_ce_resource;
  2284. podev->platform_support.hw_key_support =
  2285. platform_support->hw_key_support;
  2286. podev->platform_support.sha_hmac = platform_support->sha_hmac;
  2287. }
  2288. podev->mem_client = qcedev_mem_new_client(MEM_ION);
  2289. if (!podev->mem_client) {
  2290. pr_err("%s: err: qcedev_mem_new_client failed\n", __func__);
  2291. goto exit_qce_close;
  2292. }
  2293. rc = of_platform_populate(pdev->dev.of_node, qcedev_match,
  2294. NULL, &pdev->dev);
  2295. if (rc) {
  2296. pr_err("%s: err: of_platform_populate failed: %d\n",
  2297. __func__, rc);
  2298. goto exit_mem_new_client;
  2299. }
  2300. return 0;
  2301. exit_mem_new_client:
  2302. if (podev->mem_client)
  2303. qcedev_mem_delete_client(podev->mem_client);
  2304. podev->mem_client = NULL;
  2305. exit_qce_close:
  2306. if (handle)
  2307. qce_close(handle);
  2308. exit_scale_busbandwidth:
  2309. icc_set_bw(podev->icc_path, 0, 0);
  2310. exit_unregister_bus_scale:
  2311. if (podev->icc_path)
  2312. icc_put(podev->icc_path);
  2313. exit_del_cdev:
  2314. cdev_del(&podev->cdev);
  2315. exit_destroy_device:
  2316. device_destroy(driver_class, qcedev_device_no);
  2317. exit_destroy_class:
  2318. class_destroy(driver_class);
  2319. exit_unreg_chrdev_region:
  2320. unregister_chrdev_region(qcedev_device_no, 1);
  2321. podev->icc_path = NULL;
  2322. platform_set_drvdata(pdev, NULL);
  2323. podev->pdev = NULL;
  2324. podev->qce = NULL;
  2325. return rc;
  2326. }
  2327. static int qcedev_probe(struct platform_device *pdev)
  2328. {
  2329. if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcedev"))
  2330. return qcedev_probe_device(pdev);
  2331. else if (of_device_is_compatible(pdev->dev.of_node,
  2332. "qcom,qcedev,context-bank"))
  2333. return qcedev_parse_context_bank(pdev);
  2334. return -EINVAL;
  2335. };
  2336. static int qcedev_remove(struct platform_device *pdev)
  2337. {
  2338. struct qcedev_control *podev;
  2339. podev = platform_get_drvdata(pdev);
  2340. if (!podev)
  2341. return 0;
  2342. qcedev_ce_high_bw_req(podev, true);
  2343. if (podev->qce)
  2344. qce_close(podev->qce);
  2345. qcedev_ce_high_bw_req(podev, false);
  2346. if (podev->icc_path)
  2347. icc_put(podev->icc_path);
  2348. tasklet_kill(&podev->done_tasklet);
  2349. cdev_del(&podev->cdev);
  2350. device_destroy(driver_class, qcedev_device_no);
  2351. class_destroy(driver_class);
  2352. unregister_chrdev_region(qcedev_device_no, 1);
  2353. return 0;
  2354. };
  2355. static int qcedev_suspend(struct platform_device *pdev, pm_message_t state)
  2356. {
  2357. struct qcedev_control *podev;
  2358. int ret;
  2359. podev = platform_get_drvdata(pdev);
  2360. if (!podev)
  2361. return 0;
  2362. mutex_lock(&qcedev_sent_bw_req);
  2363. if (podev->high_bw_req_count) {
  2364. ret = qce_set_irqs(podev->qce, false);
  2365. if (ret) {
  2366. pr_err("%s: could not disable bam irqs, ret = %d",
  2367. __func__, ret);
  2368. goto suspend_exit;
  2369. }
  2370. ret = qcedev_control_clocks(podev, false);
  2371. if (ret)
  2372. goto suspend_exit;
  2373. }
  2374. suspend_exit:
  2375. mutex_unlock(&qcedev_sent_bw_req);
  2376. return 0;
  2377. }
  2378. static int qcedev_resume(struct platform_device *pdev)
  2379. {
  2380. struct qcedev_control *podev;
  2381. int ret;
  2382. podev = platform_get_drvdata(pdev);
  2383. if (!podev)
  2384. return 0;
  2385. mutex_lock(&qcedev_sent_bw_req);
  2386. if (podev->high_bw_req_count) {
  2387. ret = qcedev_control_clocks(podev, true);
  2388. if (ret)
  2389. goto resume_exit;
  2390. ret = qce_set_irqs(podev->qce, true);
  2391. if (ret) {
  2392. pr_err("%s: could not enable bam irqs, ret = %d",
  2393. __func__, ret);
  2394. qcedev_control_clocks(podev, false);
  2395. }
  2396. }
  2397. resume_exit:
  2398. mutex_unlock(&qcedev_sent_bw_req);
  2399. return 0;
  2400. }
  2401. static struct platform_driver qcedev_plat_driver = {
  2402. .probe = qcedev_probe,
  2403. .remove = qcedev_remove,
  2404. .suspend = qcedev_suspend,
  2405. .resume = qcedev_resume,
  2406. .driver = {
  2407. .name = "qce",
  2408. .of_match_table = qcedev_match,
  2409. },
  2410. };
  2411. static int _disp_stats(int id)
  2412. {
  2413. struct qcedev_stat *pstat;
  2414. int len = 0;
  2415. pstat = &_qcedev_stat;
  2416. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  2417. "\nQTI QCE dev driver %d Statistics:\n",
  2418. id + 1);
  2419. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2420. " Encryption operation success : %d\n",
  2421. pstat->qcedev_enc_success);
  2422. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2423. " Encryption operation fail : %d\n",
  2424. pstat->qcedev_enc_fail);
  2425. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2426. " Decryption operation success : %d\n",
  2427. pstat->qcedev_dec_success);
  2428. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2429. " Encryption operation fail : %d\n",
  2430. pstat->qcedev_dec_fail);
  2431. return len;
  2432. }
  2433. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  2434. size_t count, loff_t *ppos)
  2435. {
  2436. ssize_t rc = -EINVAL;
  2437. int qcedev = *((int *) file->private_data);
  2438. int len;
  2439. len = _disp_stats(qcedev);
  2440. if (len <= count)
  2441. rc = simple_read_from_buffer((void __user *) buf, len,
  2442. ppos, (void *) _debug_read_buf, len);
  2443. return rc;
  2444. }
  2445. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  2446. size_t count, loff_t *ppos)
  2447. {
  2448. memset((char *)&_qcedev_stat, 0, sizeof(struct qcedev_stat));
  2449. return count;
  2450. };
  2451. static const struct file_operations _debug_stats_ops = {
  2452. .open = simple_open,
  2453. .read = _debug_stats_read,
  2454. .write = _debug_stats_write,
  2455. };
  2456. static int _qcedev_debug_init(void)
  2457. {
  2458. int rc;
  2459. char name[DEBUG_MAX_FNAME];
  2460. struct dentry *dent;
  2461. _debug_dent = debugfs_create_dir("qcedev", NULL);
  2462. if (IS_ERR(_debug_dent)) {
  2463. pr_debug("qcedev debugfs_create_dir fail, error %ld\n",
  2464. PTR_ERR(_debug_dent));
  2465. return PTR_ERR(_debug_dent);
  2466. }
  2467. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  2468. _debug_qcedev = 0;
  2469. dent = debugfs_create_file(name, 0644, _debug_dent,
  2470. &_debug_qcedev, &_debug_stats_ops);
  2471. if (dent == NULL) {
  2472. pr_debug("qcedev debugfs_create_file fail, error %ld\n",
  2473. PTR_ERR(dent));
  2474. rc = PTR_ERR(dent);
  2475. goto err;
  2476. }
  2477. return 0;
  2478. err:
  2479. debugfs_remove_recursive(_debug_dent);
  2480. return rc;
  2481. }
  2482. static int qcedev_init(void)
  2483. {
  2484. _qcedev_debug_init();
  2485. return platform_driver_register(&qcedev_plat_driver);
  2486. }
  2487. static void qcedev_exit(void)
  2488. {
  2489. debugfs_remove_recursive(_debug_dent);
  2490. platform_driver_unregister(&qcedev_plat_driver);
  2491. }
  2492. MODULE_LICENSE("GPL v2");
  2493. MODULE_DESCRIPTION("QTI DEV Crypto driver");
  2494. MODULE_IMPORT_NS(DMA_BUF);
  2495. module_init(qcedev_init);
  2496. module_exit(qcedev_exit);