main.c 138 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  36. #include <linux/soc/qcom/smem.h>
  37. #define PERISEC_SMEM_ID 651
  38. #define HW_WIFI_UID 0x508
  39. #else
  40. #include "smcinvoke.h"
  41. #include "smcinvoke_object.h"
  42. #include "IClientEnv.h"
  43. #define HW_STATE_UID 0x108
  44. #define HW_OP_GET_STATE 1
  45. #define HW_WIFI_UID 0x508
  46. #define FEATURE_NOT_SUPPORTED 12
  47. #define PERIPHERAL_NOT_FOUND 10
  48. #endif
  49. #endif
  50. #define CNSS_DUMP_FORMAT_VER 0x11
  51. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  52. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  53. #define CNSS_DUMP_NAME "CNSS_WLAN"
  54. #define CNSS_DUMP_DESC_SIZE 0x1000
  55. #define CNSS_DUMP_SEG_VER 0x1
  56. #define FILE_SYSTEM_READY 1
  57. #define FW_READY_TIMEOUT 20000
  58. #define FW_ASSERT_TIMEOUT 5000
  59. #define CNSS_EVENT_PENDING 2989
  60. #define POWER_RESET_MIN_DELAY_MS 100
  61. #define CNSS_QUIRKS_DEFAULT 0
  62. #ifdef CONFIG_CNSS_EMULATION
  63. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  64. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  65. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  66. #else
  67. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  68. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  69. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  70. #endif
  71. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  72. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  73. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  74. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  75. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  76. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  77. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  78. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  79. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  80. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  81. enum cnss_cal_db_op {
  82. CNSS_CAL_DB_UPLOAD,
  83. CNSS_CAL_DB_DOWNLOAD,
  84. CNSS_CAL_DB_INVALID_OP,
  85. };
  86. enum cnss_recovery_type {
  87. CNSS_WLAN_RECOVERY = 0x1,
  88. CNSS_PCSS_RECOVERY = 0x2,
  89. };
  90. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  91. #define CNSS_MAX_DEV_NUM 2
  92. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  93. static int plat_env_count;
  94. #else
  95. static struct cnss_plat_data *plat_env;
  96. #endif
  97. static bool cnss_allow_driver_loading;
  98. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  99. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  100. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  101. };
  102. static struct cnss_fw_files FW_FILES_DEFAULT = {
  103. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  104. "utfbd.bin", "epping.bin", "evicted.bin"
  105. };
  106. struct cnss_driver_event {
  107. struct list_head list;
  108. enum cnss_driver_event_type type;
  109. bool sync;
  110. struct completion complete;
  111. int ret;
  112. void *data;
  113. };
  114. bool cnss_check_driver_loading_allowed(void)
  115. {
  116. return cnss_allow_driver_loading;
  117. }
  118. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  119. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  120. struct cnss_plat_data *plat_priv)
  121. {
  122. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  123. if (plat_priv) {
  124. plat_priv->plat_idx = plat_env_count;
  125. plat_env[plat_priv->plat_idx] = plat_priv;
  126. plat_env_count++;
  127. }
  128. }
  129. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  130. *plat_dev)
  131. {
  132. int i;
  133. if (!plat_dev)
  134. return NULL;
  135. for (i = 0; i < plat_env_count; i++) {
  136. if (plat_env[i]->plat_dev == plat_dev)
  137. return plat_env[i];
  138. }
  139. return NULL;
  140. }
  141. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  142. *plat_dev)
  143. {
  144. int i;
  145. if (!plat_dev) {
  146. for (i = 0; i < plat_env_count; i++) {
  147. if (plat_env[i])
  148. return plat_env[i];
  149. }
  150. }
  151. return NULL;
  152. }
  153. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  154. {
  155. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  156. plat_env[plat_priv->plat_idx] = NULL;
  157. plat_env_count--;
  158. }
  159. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  160. {
  161. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  162. "wlan_%d", plat_priv->plat_idx);
  163. return 0;
  164. }
  165. static int cnss_plat_env_available(void)
  166. {
  167. int ret = 0;
  168. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  169. cnss_pr_err("ERROR: No space to store plat_priv\n");
  170. ret = -ENOMEM;
  171. }
  172. return ret;
  173. }
  174. int cnss_get_plat_env_count(void)
  175. {
  176. return plat_env_count;
  177. }
  178. struct cnss_plat_data *cnss_get_plat_env(int index)
  179. {
  180. return plat_env[index];
  181. }
  182. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  183. {
  184. int i;
  185. for (i = 0; i < plat_env_count; i++) {
  186. if (plat_env[i]->rc_num == rc_num)
  187. return plat_env[i];
  188. }
  189. return NULL;
  190. }
  191. static inline int
  192. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  193. {
  194. return of_property_read_u32(plat_priv->dev_node,
  195. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  196. }
  197. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  198. {
  199. int ret = 0;
  200. ret = cnss_get_qrtr_node_id(plat_priv);
  201. if (ret) {
  202. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  203. plat_priv->qrtr_node_id = 0;
  204. plat_priv->wlfw_service_instance_id = 0;
  205. } else {
  206. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  207. QRTR_NODE_FW_ID_BASE;
  208. cnss_pr_dbg("service_instance_id=0x%x\n",
  209. plat_priv->wlfw_service_instance_id);
  210. }
  211. }
  212. static inline int
  213. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  214. {
  215. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  216. "qcom,pld_bus_ops_name",
  217. &plat_priv->pld_bus_ops_name);
  218. }
  219. #else
  220. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  221. struct cnss_plat_data *plat_priv)
  222. {
  223. plat_env = plat_priv;
  224. }
  225. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  226. {
  227. return plat_env;
  228. }
  229. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  230. {
  231. plat_env = NULL;
  232. }
  233. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  234. {
  235. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  236. "wlan");
  237. return 0;
  238. }
  239. static int cnss_plat_env_available(void)
  240. {
  241. return 0;
  242. }
  243. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  244. {
  245. return cnss_bus_dev_to_plat_priv(NULL);
  246. }
  247. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  248. {
  249. }
  250. static int
  251. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  252. {
  253. return 0;
  254. }
  255. #endif
  256. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  257. {
  258. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  259. "qcom,sleep-clk-support");
  260. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  261. plat_priv->sleep_clk);
  262. }
  263. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  264. {
  265. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  266. "qcom,no-bwscale");
  267. }
  268. static inline int
  269. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  270. {
  271. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  272. "qcom,wlan-rc-num", &plat_priv->rc_num);
  273. }
  274. bool cnss_is_dual_wlan_enabled(void)
  275. {
  276. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  277. }
  278. /**
  279. * cnss_get_mem_seg_count - Get segment count of memory
  280. * @type: memory type
  281. * @seg: segment count
  282. *
  283. * Return: 0 on success, negative value on failure
  284. */
  285. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  286. {
  287. struct cnss_plat_data *plat_priv;
  288. plat_priv = cnss_get_plat_priv(NULL);
  289. if (!plat_priv)
  290. return -ENODEV;
  291. switch (type) {
  292. case CNSS_REMOTE_MEM_TYPE_FW:
  293. *seg = plat_priv->fw_mem_seg_len;
  294. break;
  295. case CNSS_REMOTE_MEM_TYPE_QDSS:
  296. *seg = plat_priv->qdss_mem_seg_len;
  297. break;
  298. default:
  299. return -EINVAL;
  300. }
  301. return 0;
  302. }
  303. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  304. /**
  305. * cnss_get_wifi_kobject -return wifi kobject
  306. * Return: Null, to maintain driver comnpatibilty
  307. */
  308. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  309. {
  310. struct cnss_plat_data *plat_priv;
  311. plat_priv = cnss_get_plat_priv(NULL);
  312. if (!plat_priv)
  313. return NULL;
  314. return plat_priv->wifi_kobj;
  315. }
  316. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  317. /**
  318. * cnss_get_mem_segment_info - Get memory info of different type
  319. * @type: memory type
  320. * @segment: array to save the segment info
  321. * @seg: segment count
  322. *
  323. * Return: 0 on success, negative value on failure
  324. */
  325. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  326. struct cnss_mem_segment segment[],
  327. u32 segment_count)
  328. {
  329. struct cnss_plat_data *plat_priv;
  330. u32 i;
  331. plat_priv = cnss_get_plat_priv(NULL);
  332. if (!plat_priv)
  333. return -ENODEV;
  334. switch (type) {
  335. case CNSS_REMOTE_MEM_TYPE_FW:
  336. if (segment_count > plat_priv->fw_mem_seg_len)
  337. segment_count = plat_priv->fw_mem_seg_len;
  338. for (i = 0; i < segment_count; i++) {
  339. segment[i].size = plat_priv->fw_mem[i].size;
  340. segment[i].va = plat_priv->fw_mem[i].va;
  341. segment[i].pa = plat_priv->fw_mem[i].pa;
  342. }
  343. break;
  344. case CNSS_REMOTE_MEM_TYPE_QDSS:
  345. if (segment_count > plat_priv->qdss_mem_seg_len)
  346. segment_count = plat_priv->qdss_mem_seg_len;
  347. for (i = 0; i < segment_count; i++) {
  348. segment[i].size = plat_priv->qdss_mem[i].size;
  349. segment[i].va = plat_priv->qdss_mem[i].va;
  350. segment[i].pa = plat_priv->qdss_mem[i].pa;
  351. }
  352. break;
  353. default:
  354. return -EINVAL;
  355. }
  356. return 0;
  357. }
  358. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  359. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  360. {
  361. struct device_node *audio_ion_node;
  362. struct platform_device *audio_ion_pdev;
  363. audio_ion_node = of_find_compatible_node(NULL, NULL,
  364. "qcom,msm-audio-ion");
  365. if (!audio_ion_node) {
  366. cnss_pr_err("Unable to get Audio ion node");
  367. return -EINVAL;
  368. }
  369. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  370. of_node_put(audio_ion_node);
  371. if (!audio_ion_pdev) {
  372. cnss_pr_err("Unable to get Audio ion platform device");
  373. return -EINVAL;
  374. }
  375. plat_priv->audio_iommu_domain =
  376. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  377. put_device(&audio_ion_pdev->dev);
  378. if (!plat_priv->audio_iommu_domain) {
  379. cnss_pr_err("Unable to get Audio ion iommu domain");
  380. return -EINVAL;
  381. }
  382. return 0;
  383. }
  384. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  385. enum cnss_feature_v01 feature)
  386. {
  387. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  388. return -EINVAL;
  389. plat_priv->feature_list |= 1 << feature;
  390. return 0;
  391. }
  392. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  393. enum cnss_feature_v01 feature)
  394. {
  395. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  396. return -EINVAL;
  397. plat_priv->feature_list &= ~(1 << feature);
  398. return 0;
  399. }
  400. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  401. u64 *feature_list)
  402. {
  403. if (unlikely(!plat_priv))
  404. return -EINVAL;
  405. *feature_list = plat_priv->feature_list;
  406. return 0;
  407. }
  408. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  409. char *buf, const size_t buf_len)
  410. {
  411. if (unlikely(!plat_priv || !buf || !buf_len))
  412. return 0;
  413. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  414. "platform-name-required")) {
  415. struct device_node *root;
  416. root = of_find_node_by_path("/");
  417. if (root) {
  418. const char *model;
  419. size_t model_len;
  420. model = of_get_property(root, "model", NULL);
  421. if (model) {
  422. model_len = strlcpy(buf, model, buf_len);
  423. cnss_pr_dbg("Platform name: %s (%zu)\n",
  424. buf, model_len);
  425. return model_len;
  426. }
  427. }
  428. }
  429. return 0;
  430. }
  431. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  432. {
  433. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  434. return;
  435. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  436. plat_priv->driver_state,
  437. atomic_read(&plat_priv->pm_count));
  438. pm_stay_awake(&plat_priv->plat_dev->dev);
  439. }
  440. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  441. {
  442. int r = atomic_dec_return(&plat_priv->pm_count);
  443. WARN_ON(r < 0);
  444. if (r != 0)
  445. return;
  446. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  447. plat_priv->driver_state,
  448. atomic_read(&plat_priv->pm_count));
  449. pm_relax(&plat_priv->plat_dev->dev);
  450. }
  451. int cnss_get_fw_files_for_target(struct device *dev,
  452. struct cnss_fw_files *pfw_files,
  453. u32 target_type, u32 target_version)
  454. {
  455. if (!pfw_files)
  456. return -ENODEV;
  457. switch (target_version) {
  458. case QCA6174_REV3_VERSION:
  459. case QCA6174_REV3_2_VERSION:
  460. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  461. break;
  462. default:
  463. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  464. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  465. target_type, target_version);
  466. break;
  467. }
  468. return 0;
  469. }
  470. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  471. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  472. {
  473. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  474. if (!plat_priv)
  475. return -ENODEV;
  476. if (!cap)
  477. return -EINVAL;
  478. *cap = plat_priv->cap;
  479. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  480. return 0;
  481. }
  482. EXPORT_SYMBOL(cnss_get_platform_cap);
  483. /**
  484. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  485. * @dev: Device
  486. * @fw_cap: FW Capability which needs to be checked
  487. *
  488. * Return: TRUE if supported, FALSE on failure or if not supported
  489. */
  490. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  491. {
  492. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  493. bool is_supported = false;
  494. if (!plat_priv)
  495. return is_supported;
  496. if (!plat_priv->fw_caps)
  497. return is_supported;
  498. switch (fw_cap) {
  499. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  500. is_supported = !!(plat_priv->fw_caps &
  501. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  502. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  503. is_supported = false;
  504. break;
  505. default:
  506. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  507. }
  508. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  509. is_supported ? "supported" : "not supported");
  510. return is_supported;
  511. }
  512. EXPORT_SYMBOL(cnss_get_fw_cap);
  513. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  514. {
  515. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  516. if (!plat_priv)
  517. return;
  518. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  519. }
  520. EXPORT_SYMBOL(cnss_request_pm_qos);
  521. void cnss_remove_pm_qos(struct device *dev)
  522. {
  523. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  524. if (!plat_priv)
  525. return;
  526. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  527. }
  528. EXPORT_SYMBOL(cnss_remove_pm_qos);
  529. int cnss_wlan_enable(struct device *dev,
  530. struct cnss_wlan_enable_cfg *config,
  531. enum cnss_driver_mode mode,
  532. const char *host_version)
  533. {
  534. int ret = 0;
  535. struct cnss_plat_data *plat_priv;
  536. if (!dev) {
  537. cnss_pr_err("Invalid dev pointer\n");
  538. return -EINVAL;
  539. }
  540. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  541. if (!plat_priv)
  542. return -ENODEV;
  543. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  544. return 0;
  545. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  546. return 0;
  547. if (!config || !host_version) {
  548. cnss_pr_err("Invalid config or host_version pointer\n");
  549. return -EINVAL;
  550. }
  551. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  552. mode, config, host_version);
  553. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  554. goto skip_cfg;
  555. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  556. config->send_msi_ce = true;
  557. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  558. if (ret)
  559. goto out;
  560. skip_cfg:
  561. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  562. out:
  563. return ret;
  564. }
  565. EXPORT_SYMBOL(cnss_wlan_enable);
  566. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  567. {
  568. int ret = 0;
  569. struct cnss_plat_data *plat_priv;
  570. if (!dev) {
  571. cnss_pr_err("Invalid dev pointer\n");
  572. return -EINVAL;
  573. }
  574. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  575. if (!plat_priv)
  576. return -ENODEV;
  577. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  578. return 0;
  579. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  580. return 0;
  581. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  582. cnss_bus_free_qdss_mem(plat_priv);
  583. return ret;
  584. }
  585. EXPORT_SYMBOL(cnss_wlan_disable);
  586. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  587. int cnss_iommu_map(struct iommu_domain *domain,
  588. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  589. {
  590. return iommu_map(domain, iova, paddr, size, prot);
  591. }
  592. #else
  593. int cnss_iommu_map(struct iommu_domain *domain,
  594. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  595. {
  596. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  597. }
  598. #endif
  599. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  600. dma_addr_t iova, size_t size)
  601. {
  602. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  603. uint32_t page_offset;
  604. if (!plat_priv)
  605. return -ENODEV;
  606. if (!plat_priv->audio_iommu_domain)
  607. return -EINVAL;
  608. page_offset = iova & (PAGE_SIZE - 1);
  609. if (page_offset + size > PAGE_SIZE)
  610. size += PAGE_SIZE;
  611. iova -= page_offset;
  612. paddr -= page_offset;
  613. return cnss_iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  614. roundup(size, PAGE_SIZE), IOMMU_READ |
  615. IOMMU_WRITE | IOMMU_CACHE);
  616. }
  617. EXPORT_SYMBOL(cnss_audio_smmu_map);
  618. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  619. {
  620. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  621. uint32_t page_offset;
  622. if (!plat_priv)
  623. return;
  624. if (!plat_priv->audio_iommu_domain)
  625. return;
  626. page_offset = iova & (PAGE_SIZE - 1);
  627. if (page_offset + size > PAGE_SIZE)
  628. size += PAGE_SIZE;
  629. iova -= page_offset;
  630. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  631. roundup(size, PAGE_SIZE));
  632. }
  633. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  634. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  635. u32 data_len, u8 *output)
  636. {
  637. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  638. int ret = 0;
  639. if (!plat_priv) {
  640. cnss_pr_err("plat_priv is NULL!\n");
  641. return -EINVAL;
  642. }
  643. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  644. return 0;
  645. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  646. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  647. plat_priv->driver_state);
  648. ret = -EINVAL;
  649. goto out;
  650. }
  651. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  652. data_len, output);
  653. out:
  654. return ret;
  655. }
  656. EXPORT_SYMBOL(cnss_athdiag_read);
  657. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  658. u32 data_len, u8 *input)
  659. {
  660. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  661. int ret = 0;
  662. if (!plat_priv) {
  663. cnss_pr_err("plat_priv is NULL!\n");
  664. return -EINVAL;
  665. }
  666. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  667. return 0;
  668. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  669. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  670. plat_priv->driver_state);
  671. ret = -EINVAL;
  672. goto out;
  673. }
  674. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  675. data_len, input);
  676. out:
  677. return ret;
  678. }
  679. EXPORT_SYMBOL(cnss_athdiag_write);
  680. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  681. {
  682. struct cnss_plat_data *plat_priv;
  683. if (!dev) {
  684. cnss_pr_err("Invalid dev pointer\n");
  685. return -EINVAL;
  686. }
  687. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  688. if (!plat_priv)
  689. return -ENODEV;
  690. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  691. return 0;
  692. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  693. }
  694. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  695. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  696. {
  697. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  698. if (!plat_priv)
  699. return -EINVAL;
  700. if (!plat_priv->fw_pcie_gen_switch) {
  701. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  702. return -EOPNOTSUPP;
  703. }
  704. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  705. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  706. return -EINVAL;
  707. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  708. plat_priv->pcie_gen_speed = pcie_gen_speed;
  709. return 0;
  710. }
  711. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  712. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  713. {
  714. switch (plat_priv->device_id) {
  715. case PEACH_DEVICE_ID:
  716. if (!plat_priv->fw_aux_uc_support) {
  717. cnss_pr_dbg("FW does not support aux uc capability\n");
  718. return false;
  719. }
  720. break;
  721. default:
  722. cnss_pr_dbg("Host does not support aux uc capability\n");
  723. return false;
  724. }
  725. return true;
  726. }
  727. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  728. {
  729. int ret = 0;
  730. if (!plat_priv)
  731. return -ENODEV;
  732. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  733. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  734. if (ret)
  735. goto out;
  736. cnss_bus_load_tme_patch(plat_priv);
  737. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  738. WLFW_TME_LITE_PATCH_FILE_V01);
  739. if (plat_priv->hds_enabled)
  740. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  741. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  742. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  743. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  744. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  745. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  746. plat_priv->ctrl_params.bdf_type);
  747. if (ret)
  748. goto out;
  749. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  750. return 0;
  751. ret = cnss_bus_load_m3(plat_priv);
  752. if (ret)
  753. goto out;
  754. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  755. if (ret)
  756. goto out;
  757. if (cnss_is_aux_support_enabled(plat_priv)) {
  758. ret = cnss_bus_load_aux(plat_priv);
  759. if (ret)
  760. goto out;
  761. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  762. if (ret)
  763. goto out;
  764. }
  765. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  766. return 0;
  767. out:
  768. return ret;
  769. }
  770. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  771. {
  772. int ret = 0;
  773. if (!plat_priv->antenna) {
  774. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  775. if (ret)
  776. goto out;
  777. }
  778. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  779. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  780. if (ret)
  781. goto out;
  782. }
  783. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  784. if (ret)
  785. goto out;
  786. return 0;
  787. out:
  788. return ret;
  789. }
  790. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  791. {
  792. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  793. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  794. }
  795. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  796. {
  797. u32 i;
  798. int ret = 0;
  799. struct cnss_plat_ipc_daemon_config *cfg;
  800. ret = cnss_qmi_get_dms_mac(plat_priv);
  801. if (ret == 0 && plat_priv->dms.mac_valid)
  802. goto qmi_send;
  803. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  804. * Thus assert on failure to get MAC from DMS even after retries
  805. */
  806. if (plat_priv->use_nv_mac) {
  807. /* Check if Daemon says platform support DMS MAC provisioning */
  808. cfg = cnss_plat_ipc_qmi_daemon_config();
  809. if (cfg) {
  810. if (!cfg->dms_mac_addr_supported) {
  811. cnss_pr_err("DMS MAC address not supported\n");
  812. CNSS_ASSERT(0);
  813. return -EINVAL;
  814. }
  815. }
  816. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  817. if (plat_priv->dms.mac_valid)
  818. break;
  819. ret = cnss_qmi_get_dms_mac(plat_priv);
  820. if (ret == 0)
  821. break;
  822. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  823. }
  824. if (!plat_priv->dms.mac_valid) {
  825. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  826. CNSS_ASSERT(0);
  827. return -EINVAL;
  828. }
  829. }
  830. qmi_send:
  831. if (plat_priv->dms.mac_valid)
  832. ret =
  833. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  834. ARRAY_SIZE(plat_priv->dms.mac));
  835. return ret;
  836. }
  837. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  838. enum cnss_cal_db_op op, u32 *size)
  839. {
  840. int ret = 0;
  841. u32 timeout = cnss_get_timeout(plat_priv,
  842. CNSS_TIMEOUT_DAEMON_CONNECTION);
  843. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  844. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  845. if (op >= CNSS_CAL_DB_INVALID_OP)
  846. return -EINVAL;
  847. if (!plat_priv->cbc_file_download) {
  848. cnss_pr_info("CAL DB file not required as per BDF\n");
  849. return 0;
  850. }
  851. if (*size == 0) {
  852. cnss_pr_err("Invalid cal file size\n");
  853. return -EINVAL;
  854. }
  855. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  856. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  857. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  858. msecs_to_jiffies(timeout));
  859. if (!ret) {
  860. cnss_pr_err("Daemon not yet connected\n");
  861. CNSS_ASSERT(0);
  862. return ret;
  863. }
  864. }
  865. if (!plat_priv->cal_mem->va) {
  866. cnss_pr_err("CAL DB Memory not setup for FW\n");
  867. return -EINVAL;
  868. }
  869. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  870. if (op == CNSS_CAL_DB_DOWNLOAD) {
  871. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  872. ret = cnss_plat_ipc_qmi_file_download(client_id,
  873. CNSS_CAL_DB_FILE_NAME,
  874. plat_priv->cal_mem->va,
  875. size);
  876. } else {
  877. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  878. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  879. CNSS_CAL_DB_FILE_NAME,
  880. plat_priv->cal_mem->va,
  881. *size);
  882. }
  883. if (ret)
  884. cnss_pr_err("Cal DB file %s %s failure\n",
  885. CNSS_CAL_DB_FILE_NAME,
  886. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  887. else
  888. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  889. CNSS_CAL_DB_FILE_NAME,
  890. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  891. *size);
  892. return ret;
  893. }
  894. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  895. {
  896. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  897. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  898. return -EINVAL;
  899. }
  900. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  901. &plat_priv->cal_file_size);
  902. }
  903. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  904. u32 *cal_file_size)
  905. {
  906. /* To download pass the total size of cal DB mem allocated.
  907. * After cal file is download to mem, its size is updated in
  908. * return pointer
  909. */
  910. *cal_file_size = plat_priv->cal_mem->size;
  911. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  912. cal_file_size);
  913. }
  914. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  915. {
  916. int ret = 0;
  917. u32 cal_file_size = 0;
  918. if (!plat_priv)
  919. return -ENODEV;
  920. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  921. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  922. return -EINVAL;
  923. }
  924. cnss_pr_dbg("Processing FW Init Done..\n");
  925. del_timer(&plat_priv->fw_boot_timer);
  926. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  927. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  928. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  929. cnss_send_subsys_restart_level_msg(plat_priv);
  930. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  931. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  932. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  933. }
  934. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  935. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  936. CNSS_WALTEST);
  937. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  938. cnss_request_antenna_sharing(plat_priv);
  939. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  940. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  941. plat_priv->cal_time = jiffies;
  942. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  943. CNSS_CALIBRATION);
  944. } else {
  945. ret = cnss_setup_dms_mac(plat_priv);
  946. ret = cnss_bus_call_driver_probe(plat_priv);
  947. }
  948. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  949. goto out;
  950. else if (ret)
  951. goto shutdown;
  952. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  953. return 0;
  954. shutdown:
  955. cnss_bus_dev_shutdown(plat_priv);
  956. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  957. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  958. out:
  959. return ret;
  960. }
  961. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  962. {
  963. switch (type) {
  964. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  965. return "SERVER_ARRIVE";
  966. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  967. return "SERVER_EXIT";
  968. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  969. return "REQUEST_MEM";
  970. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  971. return "FW_MEM_READY";
  972. case CNSS_DRIVER_EVENT_FW_READY:
  973. return "FW_READY";
  974. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  975. return "COLD_BOOT_CAL_START";
  976. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  977. return "COLD_BOOT_CAL_DONE";
  978. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  979. return "REGISTER_DRIVER";
  980. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  981. return "UNREGISTER_DRIVER";
  982. case CNSS_DRIVER_EVENT_RECOVERY:
  983. return "RECOVERY";
  984. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  985. return "FORCE_FW_ASSERT";
  986. case CNSS_DRIVER_EVENT_POWER_UP:
  987. return "POWER_UP";
  988. case CNSS_DRIVER_EVENT_POWER_DOWN:
  989. return "POWER_DOWN";
  990. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  991. return "IDLE_RESTART";
  992. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  993. return "IDLE_SHUTDOWN";
  994. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  995. return "IMS_WFC_CALL_IND";
  996. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  997. return "WLFW_TWC_CFG_IND";
  998. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  999. return "QDSS_TRACE_REQ_MEM";
  1000. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1001. return "FW_MEM_FILE_SAVE";
  1002. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1003. return "QDSS_TRACE_FREE";
  1004. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1005. return "QDSS_TRACE_REQ_DATA";
  1006. case CNSS_DRIVER_EVENT_MAX:
  1007. return "EVENT_MAX";
  1008. }
  1009. return "UNKNOWN";
  1010. };
  1011. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  1012. enum cnss_driver_event_type type,
  1013. u32 flags, void *data)
  1014. {
  1015. struct cnss_driver_event *event;
  1016. unsigned long irq_flags;
  1017. int gfp = GFP_KERNEL;
  1018. int ret = 0;
  1019. if (!plat_priv)
  1020. return -ENODEV;
  1021. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1022. cnss_driver_event_to_str(type), type,
  1023. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1024. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1025. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1026. return -EINVAL;
  1027. }
  1028. if (in_interrupt() || irqs_disabled())
  1029. gfp = GFP_ATOMIC;
  1030. event = kzalloc(sizeof(*event), gfp);
  1031. if (!event)
  1032. return -ENOMEM;
  1033. cnss_pm_stay_awake(plat_priv);
  1034. event->type = type;
  1035. event->data = data;
  1036. init_completion(&event->complete);
  1037. event->ret = CNSS_EVENT_PENDING;
  1038. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1039. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1040. list_add_tail(&event->list, &plat_priv->event_list);
  1041. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1042. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1043. if (!(flags & CNSS_EVENT_SYNC))
  1044. goto out;
  1045. if (flags & CNSS_EVENT_UNKILLABLE)
  1046. wait_for_completion(&event->complete);
  1047. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1048. ret = wait_for_completion_killable(&event->complete);
  1049. else
  1050. ret = wait_for_completion_interruptible(&event->complete);
  1051. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1052. cnss_driver_event_to_str(type), type,
  1053. plat_priv->driver_state, ret, event->ret);
  1054. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1055. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1056. event->sync = false;
  1057. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1058. ret = -EINTR;
  1059. goto out;
  1060. }
  1061. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1062. ret = event->ret;
  1063. kfree(event);
  1064. out:
  1065. cnss_pm_relax(plat_priv);
  1066. return ret;
  1067. }
  1068. /**
  1069. * cnss_get_timeout - Get timeout for corresponding type.
  1070. * @plat_priv: Pointer to platform driver context.
  1071. * @cnss_timeout_type: Timeout type.
  1072. *
  1073. * Return: Timeout in milliseconds.
  1074. */
  1075. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1076. enum cnss_timeout_type timeout_type)
  1077. {
  1078. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1079. switch (timeout_type) {
  1080. case CNSS_TIMEOUT_QMI:
  1081. return qmi_timeout;
  1082. case CNSS_TIMEOUT_POWER_UP:
  1083. return (qmi_timeout << 2);
  1084. case CNSS_TIMEOUT_IDLE_RESTART:
  1085. /* In idle restart power up sequence, we have fw_boot_timer to
  1086. * handle FW initialization failure.
  1087. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1088. * account for FW dump collection and FW re-initialization on
  1089. * retry.
  1090. */
  1091. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1092. case CNSS_TIMEOUT_CALIBRATION:
  1093. /* Similar to mission mode, in CBC if FW init fails
  1094. * fw recovery is tried. Thus return 2x the CBC timeout.
  1095. */
  1096. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1097. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1098. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1099. case CNSS_TIMEOUT_RDDM:
  1100. return CNSS_RDDM_TIMEOUT_MS;
  1101. case CNSS_TIMEOUT_RECOVERY:
  1102. return RECOVERY_TIMEOUT;
  1103. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1104. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1105. default:
  1106. return qmi_timeout;
  1107. }
  1108. }
  1109. unsigned int cnss_get_boot_timeout(struct device *dev)
  1110. {
  1111. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1112. if (!plat_priv) {
  1113. cnss_pr_err("plat_priv is NULL\n");
  1114. return 0;
  1115. }
  1116. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1117. }
  1118. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1119. int cnss_power_up(struct device *dev)
  1120. {
  1121. int ret = 0;
  1122. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1123. unsigned int timeout;
  1124. if (!plat_priv) {
  1125. cnss_pr_err("plat_priv is NULL\n");
  1126. return -ENODEV;
  1127. }
  1128. cnss_pr_dbg("Powering up device\n");
  1129. ret = cnss_driver_event_post(plat_priv,
  1130. CNSS_DRIVER_EVENT_POWER_UP,
  1131. CNSS_EVENT_SYNC, NULL);
  1132. if (ret)
  1133. goto out;
  1134. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1135. goto out;
  1136. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1137. reinit_completion(&plat_priv->power_up_complete);
  1138. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1139. msecs_to_jiffies(timeout));
  1140. if (!ret) {
  1141. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1142. timeout);
  1143. ret = -EAGAIN;
  1144. goto out;
  1145. }
  1146. return 0;
  1147. out:
  1148. return ret;
  1149. }
  1150. EXPORT_SYMBOL(cnss_power_up);
  1151. int cnss_power_down(struct device *dev)
  1152. {
  1153. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1154. if (!plat_priv) {
  1155. cnss_pr_err("plat_priv is NULL\n");
  1156. return -ENODEV;
  1157. }
  1158. cnss_pr_dbg("Powering down device\n");
  1159. return cnss_driver_event_post(plat_priv,
  1160. CNSS_DRIVER_EVENT_POWER_DOWN,
  1161. CNSS_EVENT_SYNC, NULL);
  1162. }
  1163. EXPORT_SYMBOL(cnss_power_down);
  1164. int cnss_idle_restart(struct device *dev)
  1165. {
  1166. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1167. unsigned int timeout;
  1168. int ret = 0;
  1169. if (!plat_priv) {
  1170. cnss_pr_err("plat_priv is NULL\n");
  1171. return -ENODEV;
  1172. }
  1173. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1174. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1175. return -EBUSY;
  1176. }
  1177. cnss_pr_dbg("Doing idle restart\n");
  1178. reinit_completion(&plat_priv->power_up_complete);
  1179. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1180. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1181. ret = -EINVAL;
  1182. goto out;
  1183. }
  1184. ret = cnss_driver_event_post(plat_priv,
  1185. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1186. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1187. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1188. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1189. else if (ret)
  1190. goto out;
  1191. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1192. ret = cnss_bus_call_driver_probe(plat_priv);
  1193. goto out;
  1194. }
  1195. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1196. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1197. msecs_to_jiffies(timeout));
  1198. if (plat_priv->power_up_error) {
  1199. ret = plat_priv->power_up_error;
  1200. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1201. cnss_pr_dbg("Power up error:%d, exiting\n",
  1202. plat_priv->power_up_error);
  1203. goto out;
  1204. }
  1205. if (!ret) {
  1206. /* This exception occurs after attempting retry of FW recovery.
  1207. * Thus we can safely power off the device.
  1208. */
  1209. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1210. timeout);
  1211. ret = -ETIMEDOUT;
  1212. cnss_power_down(dev);
  1213. CNSS_ASSERT(0);
  1214. goto out;
  1215. }
  1216. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1217. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1218. del_timer(&plat_priv->fw_boot_timer);
  1219. ret = -EINVAL;
  1220. goto out;
  1221. }
  1222. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1223. * non-DRV is supported only once after device reboots and before wifi
  1224. * is turned on. We do not allow switching back to DRV.
  1225. * To bring device back into DRV, user needs to reboot device.
  1226. */
  1227. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1228. cnss_pr_dbg("DRV is disabled\n");
  1229. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1230. }
  1231. mutex_unlock(&plat_priv->driver_ops_lock);
  1232. return 0;
  1233. out:
  1234. mutex_unlock(&plat_priv->driver_ops_lock);
  1235. return ret;
  1236. }
  1237. EXPORT_SYMBOL(cnss_idle_restart);
  1238. int cnss_idle_shutdown(struct device *dev)
  1239. {
  1240. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1241. if (!plat_priv) {
  1242. cnss_pr_err("plat_priv is NULL\n");
  1243. return -ENODEV;
  1244. }
  1245. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1246. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1247. return -EAGAIN;
  1248. }
  1249. cnss_pr_dbg("Doing idle shutdown\n");
  1250. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1251. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1252. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1253. return -EBUSY;
  1254. }
  1255. return cnss_driver_event_post(plat_priv,
  1256. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1257. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1258. }
  1259. EXPORT_SYMBOL(cnss_idle_shutdown);
  1260. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1261. {
  1262. int ret = 0;
  1263. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1264. if (ret < 0) {
  1265. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1266. goto out;
  1267. }
  1268. ret = cnss_get_clk(plat_priv);
  1269. if (ret) {
  1270. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1271. goto put_vreg;
  1272. }
  1273. ret = cnss_get_pinctrl(plat_priv);
  1274. if (ret) {
  1275. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1276. goto put_clk;
  1277. }
  1278. return 0;
  1279. put_clk:
  1280. cnss_put_clk(plat_priv);
  1281. put_vreg:
  1282. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1283. out:
  1284. return ret;
  1285. }
  1286. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1287. {
  1288. cnss_put_clk(plat_priv);
  1289. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1290. }
  1291. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1292. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1293. unsigned long code,
  1294. void *ss_handle)
  1295. {
  1296. struct cnss_plat_data *plat_priv =
  1297. container_of(nb, struct cnss_plat_data, modem_nb);
  1298. struct cnss_esoc_info *esoc_info;
  1299. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1300. if (!plat_priv)
  1301. return NOTIFY_DONE;
  1302. esoc_info = &plat_priv->esoc_info;
  1303. if (code == SUBSYS_AFTER_POWERUP)
  1304. esoc_info->modem_current_status = 1;
  1305. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1306. esoc_info->modem_current_status = 0;
  1307. else
  1308. return NOTIFY_DONE;
  1309. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1310. esoc_info->modem_current_status))
  1311. return NOTIFY_DONE;
  1312. return NOTIFY_OK;
  1313. }
  1314. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1315. {
  1316. int ret = 0;
  1317. struct device *dev;
  1318. struct cnss_esoc_info *esoc_info;
  1319. struct esoc_desc *esoc_desc;
  1320. const char *client_desc;
  1321. dev = &plat_priv->plat_dev->dev;
  1322. esoc_info = &plat_priv->esoc_info;
  1323. esoc_info->notify_modem_status =
  1324. of_property_read_bool(dev->of_node,
  1325. "qcom,notify-modem-status");
  1326. if (!esoc_info->notify_modem_status)
  1327. goto out;
  1328. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1329. &client_desc);
  1330. if (ret) {
  1331. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1332. } else {
  1333. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1334. if (IS_ERR_OR_NULL(esoc_desc)) {
  1335. ret = PTR_RET(esoc_desc);
  1336. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1337. ret);
  1338. goto out;
  1339. }
  1340. esoc_info->esoc_desc = esoc_desc;
  1341. }
  1342. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1343. esoc_info->modem_current_status = 0;
  1344. esoc_info->modem_notify_handler =
  1345. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1346. esoc_info->esoc_desc->name :
  1347. "modem", &plat_priv->modem_nb);
  1348. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1349. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1350. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1351. ret);
  1352. goto unreg_esoc;
  1353. }
  1354. return 0;
  1355. unreg_esoc:
  1356. if (esoc_info->esoc_desc)
  1357. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1358. out:
  1359. return ret;
  1360. }
  1361. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1362. {
  1363. struct device *dev;
  1364. struct cnss_esoc_info *esoc_info;
  1365. dev = &plat_priv->plat_dev->dev;
  1366. esoc_info = &plat_priv->esoc_info;
  1367. if (esoc_info->notify_modem_status)
  1368. subsys_notif_unregister_notifier
  1369. (esoc_info->modem_notify_handler,
  1370. &plat_priv->modem_nb);
  1371. if (esoc_info->esoc_desc)
  1372. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1373. }
  1374. #else
  1375. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1376. {
  1377. return 0;
  1378. }
  1379. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1380. #endif
  1381. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1382. {
  1383. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1384. int ret = 0;
  1385. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1386. return 0;
  1387. enable_irq(sol_gpio->dev_sol_irq);
  1388. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1389. if (ret)
  1390. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1391. ret);
  1392. return ret;
  1393. }
  1394. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1395. {
  1396. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1397. int ret = 0;
  1398. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1399. return 0;
  1400. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1401. if (ret)
  1402. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1403. ret);
  1404. disable_irq(sol_gpio->dev_sol_irq);
  1405. return ret;
  1406. }
  1407. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1408. {
  1409. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1410. if (sol_gpio->dev_sol_gpio < 0)
  1411. return -EINVAL;
  1412. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1413. }
  1414. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1415. {
  1416. struct cnss_plat_data *plat_priv = data;
  1417. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1418. sol_gpio->dev_sol_counter++;
  1419. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1420. irq, sol_gpio->dev_sol_counter);
  1421. /* Make sure abort current suspend */
  1422. cnss_pm_stay_awake(plat_priv);
  1423. cnss_pm_relax(plat_priv);
  1424. pm_system_wakeup();
  1425. cnss_bus_handle_dev_sol_irq(plat_priv);
  1426. return IRQ_HANDLED;
  1427. }
  1428. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1429. {
  1430. struct device *dev = &plat_priv->plat_dev->dev;
  1431. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1432. int ret = 0;
  1433. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1434. "wlan-dev-sol-gpio", 0);
  1435. if (sol_gpio->dev_sol_gpio < 0)
  1436. goto out;
  1437. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1438. sol_gpio->dev_sol_gpio);
  1439. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1440. if (ret) {
  1441. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1442. ret);
  1443. goto out;
  1444. }
  1445. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1446. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1447. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1448. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1449. if (ret) {
  1450. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1451. goto free_gpio;
  1452. }
  1453. return 0;
  1454. free_gpio:
  1455. gpio_free(sol_gpio->dev_sol_gpio);
  1456. out:
  1457. return ret;
  1458. }
  1459. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1460. {
  1461. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1462. if (sol_gpio->dev_sol_gpio < 0)
  1463. return;
  1464. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1465. gpio_free(sol_gpio->dev_sol_gpio);
  1466. }
  1467. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1468. {
  1469. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1470. if (sol_gpio->host_sol_gpio < 0)
  1471. return -EINVAL;
  1472. if (value)
  1473. cnss_pr_dbg("Assert host SOL GPIO\n");
  1474. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1475. return 0;
  1476. }
  1477. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1478. {
  1479. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1480. if (sol_gpio->host_sol_gpio < 0)
  1481. return -EINVAL;
  1482. return gpio_get_value(sol_gpio->host_sol_gpio);
  1483. }
  1484. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1485. {
  1486. struct device *dev = &plat_priv->plat_dev->dev;
  1487. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1488. int ret = 0;
  1489. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1490. "wlan-host-sol-gpio", 0);
  1491. if (sol_gpio->host_sol_gpio < 0)
  1492. goto out;
  1493. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1494. sol_gpio->host_sol_gpio);
  1495. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1496. if (ret) {
  1497. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1498. ret);
  1499. goto out;
  1500. }
  1501. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1502. return 0;
  1503. out:
  1504. return ret;
  1505. }
  1506. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1507. {
  1508. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1509. if (sol_gpio->host_sol_gpio < 0)
  1510. return;
  1511. gpio_free(sol_gpio->host_sol_gpio);
  1512. }
  1513. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1514. {
  1515. int ret;
  1516. ret = cnss_init_dev_sol_gpio(plat_priv);
  1517. if (ret)
  1518. goto out;
  1519. ret = cnss_init_host_sol_gpio(plat_priv);
  1520. if (ret)
  1521. goto deinit_dev_sol;
  1522. return 0;
  1523. deinit_dev_sol:
  1524. cnss_deinit_dev_sol_gpio(plat_priv);
  1525. out:
  1526. return ret;
  1527. }
  1528. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1529. {
  1530. cnss_deinit_host_sol_gpio(plat_priv);
  1531. cnss_deinit_dev_sol_gpio(plat_priv);
  1532. }
  1533. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1534. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1535. {
  1536. struct cnss_plat_data *plat_priv;
  1537. int ret = 0;
  1538. if (!subsys_desc->dev) {
  1539. cnss_pr_err("dev from subsys_desc is NULL\n");
  1540. return -ENODEV;
  1541. }
  1542. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1543. if (!plat_priv) {
  1544. cnss_pr_err("plat_priv is NULL\n");
  1545. return -ENODEV;
  1546. }
  1547. if (!plat_priv->driver_state) {
  1548. cnss_pr_dbg("subsys powerup is ignored\n");
  1549. return 0;
  1550. }
  1551. ret = cnss_bus_dev_powerup(plat_priv);
  1552. if (ret)
  1553. __pm_relax(plat_priv->recovery_ws);
  1554. return ret;
  1555. }
  1556. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1557. bool force_stop)
  1558. {
  1559. struct cnss_plat_data *plat_priv;
  1560. if (!subsys_desc->dev) {
  1561. cnss_pr_err("dev from subsys_desc is NULL\n");
  1562. return -ENODEV;
  1563. }
  1564. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1565. if (!plat_priv) {
  1566. cnss_pr_err("plat_priv is NULL\n");
  1567. return -ENODEV;
  1568. }
  1569. if (!plat_priv->driver_state) {
  1570. cnss_pr_dbg("subsys shutdown is ignored\n");
  1571. return 0;
  1572. }
  1573. return cnss_bus_dev_shutdown(plat_priv);
  1574. }
  1575. void cnss_device_crashed(struct device *dev)
  1576. {
  1577. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1578. struct cnss_subsys_info *subsys_info;
  1579. if (!plat_priv)
  1580. return;
  1581. subsys_info = &plat_priv->subsys_info;
  1582. if (subsys_info->subsys_device) {
  1583. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1584. subsys_set_crash_status(subsys_info->subsys_device, true);
  1585. subsystem_restart_dev(subsys_info->subsys_device);
  1586. }
  1587. }
  1588. EXPORT_SYMBOL(cnss_device_crashed);
  1589. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1590. {
  1591. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1592. if (!plat_priv) {
  1593. cnss_pr_err("plat_priv is NULL\n");
  1594. return;
  1595. }
  1596. cnss_bus_dev_crash_shutdown(plat_priv);
  1597. }
  1598. static int cnss_subsys_ramdump(int enable,
  1599. const struct subsys_desc *subsys_desc)
  1600. {
  1601. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1602. if (!plat_priv) {
  1603. cnss_pr_err("plat_priv is NULL\n");
  1604. return -ENODEV;
  1605. }
  1606. if (!enable)
  1607. return 0;
  1608. return cnss_bus_dev_ramdump(plat_priv);
  1609. }
  1610. static void cnss_recovery_work_handler(struct work_struct *work)
  1611. {
  1612. }
  1613. #else
  1614. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1615. {
  1616. int ret;
  1617. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1618. if (!plat_priv->recovery_enabled)
  1619. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1620. cnss_bus_dev_shutdown(plat_priv);
  1621. cnss_bus_dev_ramdump(plat_priv);
  1622. /* If recovery is triggered before Host driver registration,
  1623. * avoid device power up because eventually device will be
  1624. * power up as part of driver registration.
  1625. */
  1626. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1627. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1628. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1629. plat_priv->driver_state);
  1630. return;
  1631. }
  1632. msleep(POWER_RESET_MIN_DELAY_MS);
  1633. ret = cnss_bus_dev_powerup(plat_priv);
  1634. if (ret)
  1635. __pm_relax(plat_priv->recovery_ws);
  1636. return;
  1637. }
  1638. static void cnss_recovery_work_handler(struct work_struct *work)
  1639. {
  1640. struct cnss_plat_data *plat_priv =
  1641. container_of(work, struct cnss_plat_data, recovery_work);
  1642. cnss_recovery_handler(plat_priv);
  1643. }
  1644. void cnss_device_crashed(struct device *dev)
  1645. {
  1646. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1647. if (!plat_priv)
  1648. return;
  1649. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1650. schedule_work(&plat_priv->recovery_work);
  1651. }
  1652. EXPORT_SYMBOL(cnss_device_crashed);
  1653. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1654. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1655. {
  1656. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1657. struct cnss_ramdump_info *ramdump_info;
  1658. if (!plat_priv)
  1659. return NULL;
  1660. ramdump_info = &plat_priv->ramdump_info;
  1661. *size = ramdump_info->ramdump_size;
  1662. return ramdump_info->ramdump_va;
  1663. }
  1664. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1665. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1666. {
  1667. switch (reason) {
  1668. case CNSS_REASON_DEFAULT:
  1669. return "DEFAULT";
  1670. case CNSS_REASON_LINK_DOWN:
  1671. return "LINK_DOWN";
  1672. case CNSS_REASON_RDDM:
  1673. return "RDDM";
  1674. case CNSS_REASON_TIMEOUT:
  1675. return "TIMEOUT";
  1676. }
  1677. return "UNKNOWN";
  1678. };
  1679. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1680. enum cnss_recovery_reason reason)
  1681. {
  1682. plat_priv->recovery_count++;
  1683. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1684. goto self_recovery;
  1685. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1686. cnss_pr_dbg("Skip device recovery\n");
  1687. return 0;
  1688. }
  1689. /* FW recovery sequence has multiple steps and firmware load requires
  1690. * linux PM in awake state. Thus hold the cnss wake source until
  1691. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1692. * time taken in this process.
  1693. */
  1694. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1695. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1696. true);
  1697. switch (reason) {
  1698. case CNSS_REASON_LINK_DOWN:
  1699. if (!cnss_bus_check_link_status(plat_priv)) {
  1700. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1701. return 0;
  1702. }
  1703. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1704. &plat_priv->ctrl_params.quirks))
  1705. goto self_recovery;
  1706. if (!cnss_bus_recover_link_down(plat_priv)) {
  1707. /* clear recovery bit here to avoid skipping
  1708. * the recovery work for RDDM later
  1709. */
  1710. clear_bit(CNSS_DRIVER_RECOVERY,
  1711. &plat_priv->driver_state);
  1712. return 0;
  1713. }
  1714. break;
  1715. case CNSS_REASON_RDDM:
  1716. cnss_bus_collect_dump_info(plat_priv, false);
  1717. break;
  1718. case CNSS_REASON_DEFAULT:
  1719. case CNSS_REASON_TIMEOUT:
  1720. break;
  1721. default:
  1722. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1723. cnss_recovery_reason_to_str(reason), reason);
  1724. break;
  1725. }
  1726. cnss_bus_device_crashed(plat_priv);
  1727. return 0;
  1728. self_recovery:
  1729. cnss_pr_dbg("Going for self recovery\n");
  1730. cnss_bus_dev_shutdown(plat_priv);
  1731. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1732. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1733. &plat_priv->ctrl_params.quirks);
  1734. /* If link down self recovery is triggered before Host driver
  1735. * registration, avoid device power up because eventually device
  1736. * will be power up as part of driver registration.
  1737. */
  1738. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1739. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1740. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1741. plat_priv->driver_state);
  1742. return 0;
  1743. }
  1744. cnss_bus_dev_powerup(plat_priv);
  1745. return 0;
  1746. }
  1747. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1748. void *data)
  1749. {
  1750. struct cnss_recovery_data *recovery_data = data;
  1751. int ret = 0;
  1752. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1753. cnss_recovery_reason_to_str(recovery_data->reason),
  1754. recovery_data->reason);
  1755. if (!plat_priv->driver_state) {
  1756. cnss_pr_err("Improper driver state, ignore recovery\n");
  1757. ret = -EINVAL;
  1758. goto out;
  1759. }
  1760. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1761. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1762. ret = -EINVAL;
  1763. goto out;
  1764. }
  1765. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1766. cnss_pr_err("Recovery is already in progress\n");
  1767. CNSS_ASSERT(0);
  1768. ret = -EINVAL;
  1769. goto out;
  1770. }
  1771. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1772. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1773. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1774. ret = -EINVAL;
  1775. goto out;
  1776. }
  1777. switch (plat_priv->device_id) {
  1778. case QCA6174_DEVICE_ID:
  1779. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1780. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1781. &plat_priv->driver_state)) {
  1782. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1783. ret = -EINVAL;
  1784. goto out;
  1785. }
  1786. break;
  1787. default:
  1788. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1789. set_bit(CNSS_FW_BOOT_RECOVERY,
  1790. &plat_priv->driver_state);
  1791. }
  1792. break;
  1793. }
  1794. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1795. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1796. out:
  1797. kfree(data);
  1798. return ret;
  1799. }
  1800. int cnss_self_recovery(struct device *dev,
  1801. enum cnss_recovery_reason reason)
  1802. {
  1803. cnss_schedule_recovery(dev, reason);
  1804. return 0;
  1805. }
  1806. EXPORT_SYMBOL(cnss_self_recovery);
  1807. void cnss_schedule_recovery(struct device *dev,
  1808. enum cnss_recovery_reason reason)
  1809. {
  1810. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1811. struct cnss_recovery_data *data;
  1812. int gfp = GFP_KERNEL;
  1813. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1814. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1815. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1816. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1817. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1818. return;
  1819. }
  1820. if (in_interrupt() || irqs_disabled())
  1821. gfp = GFP_ATOMIC;
  1822. data = kzalloc(sizeof(*data), gfp);
  1823. if (!data)
  1824. return;
  1825. data->reason = reason;
  1826. cnss_driver_event_post(plat_priv,
  1827. CNSS_DRIVER_EVENT_RECOVERY,
  1828. 0, data);
  1829. }
  1830. EXPORT_SYMBOL(cnss_schedule_recovery);
  1831. int cnss_force_fw_assert(struct device *dev)
  1832. {
  1833. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1834. if (!plat_priv) {
  1835. cnss_pr_err("plat_priv is NULL\n");
  1836. return -ENODEV;
  1837. }
  1838. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1839. cnss_pr_info("Forced FW assert is not supported\n");
  1840. return -EOPNOTSUPP;
  1841. }
  1842. if (cnss_bus_is_device_down(plat_priv)) {
  1843. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1844. return 0;
  1845. }
  1846. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1847. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1848. return 0;
  1849. }
  1850. if (in_interrupt() || irqs_disabled())
  1851. cnss_driver_event_post(plat_priv,
  1852. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1853. 0, NULL);
  1854. else
  1855. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1856. return 0;
  1857. }
  1858. EXPORT_SYMBOL(cnss_force_fw_assert);
  1859. int cnss_force_collect_rddm(struct device *dev)
  1860. {
  1861. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1862. unsigned int timeout;
  1863. int ret = 0;
  1864. if (!plat_priv) {
  1865. cnss_pr_err("plat_priv is NULL\n");
  1866. return -ENODEV;
  1867. }
  1868. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1869. cnss_pr_info("Force collect rddm is not supported\n");
  1870. return -EOPNOTSUPP;
  1871. }
  1872. if (cnss_bus_is_device_down(plat_priv)) {
  1873. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1874. goto wait_rddm;
  1875. }
  1876. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1877. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1878. goto wait_rddm;
  1879. }
  1880. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1881. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1882. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1883. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1884. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1885. return 0;
  1886. }
  1887. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1888. if (ret)
  1889. return ret;
  1890. wait_rddm:
  1891. reinit_completion(&plat_priv->rddm_complete);
  1892. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1893. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1894. msecs_to_jiffies(timeout));
  1895. if (!ret) {
  1896. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1897. timeout);
  1898. ret = -ETIMEDOUT;
  1899. } else if (ret > 0) {
  1900. ret = 0;
  1901. }
  1902. return ret;
  1903. }
  1904. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1905. int cnss_qmi_send_get(struct device *dev)
  1906. {
  1907. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1908. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1909. return 0;
  1910. return cnss_bus_qmi_send_get(plat_priv);
  1911. }
  1912. EXPORT_SYMBOL(cnss_qmi_send_get);
  1913. int cnss_qmi_send_put(struct device *dev)
  1914. {
  1915. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1916. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1917. return 0;
  1918. return cnss_bus_qmi_send_put(plat_priv);
  1919. }
  1920. EXPORT_SYMBOL(cnss_qmi_send_put);
  1921. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1922. int cmd_len, void *cb_ctx,
  1923. int (*cb)(void *ctx, void *event, int event_len))
  1924. {
  1925. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1926. int ret;
  1927. if (!plat_priv)
  1928. return -ENODEV;
  1929. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1930. return -EINVAL;
  1931. plat_priv->get_info_cb = cb;
  1932. plat_priv->get_info_cb_ctx = cb_ctx;
  1933. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1934. if (ret) {
  1935. plat_priv->get_info_cb = NULL;
  1936. plat_priv->get_info_cb_ctx = NULL;
  1937. }
  1938. return ret;
  1939. }
  1940. EXPORT_SYMBOL(cnss_qmi_send);
  1941. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1942. {
  1943. int ret = 0;
  1944. u32 retry = 0, timeout;
  1945. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1946. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1947. goto out;
  1948. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1949. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1950. goto out;
  1951. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1952. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1953. goto out;
  1954. }
  1955. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1956. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1957. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1958. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1959. CNSS_ASSERT(0);
  1960. return -EINVAL;
  1961. }
  1962. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1963. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1964. break;
  1965. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1966. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1967. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1968. CNSS_ASSERT(0);
  1969. ret = -EINVAL;
  1970. goto mark_cal_fail;
  1971. }
  1972. }
  1973. switch (plat_priv->device_id) {
  1974. case QCA6290_DEVICE_ID:
  1975. case QCA6390_DEVICE_ID:
  1976. case QCA6490_DEVICE_ID:
  1977. case KIWI_DEVICE_ID:
  1978. case MANGO_DEVICE_ID:
  1979. case PEACH_DEVICE_ID:
  1980. break;
  1981. default:
  1982. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1983. plat_priv->device_id);
  1984. ret = -EINVAL;
  1985. goto mark_cal_fail;
  1986. }
  1987. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1988. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1989. timeout = cnss_get_timeout(plat_priv,
  1990. CNSS_TIMEOUT_CALIBRATION);
  1991. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1992. timeout / 1000);
  1993. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1994. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1995. msecs_to_jiffies(timeout));
  1996. }
  1997. reinit_completion(&plat_priv->cal_complete);
  1998. ret = cnss_bus_dev_powerup(plat_priv);
  1999. mark_cal_fail:
  2000. if (ret) {
  2001. complete(&plat_priv->cal_complete);
  2002. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2003. /* Set CBC done in driver state to mark attempt and note error
  2004. * since calibration cannot be retried at boot.
  2005. */
  2006. plat_priv->cal_done = CNSS_CAL_FAILURE;
  2007. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2008. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  2009. plat_priv->device_id == QCN7605_DEVICE_ID) {
  2010. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2011. goto out;
  2012. cnss_pr_info("Schedule WLAN driver load\n");
  2013. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2014. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2015. 0);
  2016. }
  2017. }
  2018. out:
  2019. return ret;
  2020. }
  2021. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2022. void *data)
  2023. {
  2024. struct cnss_cal_info *cal_info = data;
  2025. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2026. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2027. goto out;
  2028. switch (cal_info->cal_status) {
  2029. case CNSS_CAL_DONE:
  2030. cnss_pr_dbg("Calibration completed successfully\n");
  2031. plat_priv->cal_done = true;
  2032. break;
  2033. case CNSS_CAL_TIMEOUT:
  2034. case CNSS_CAL_FAILURE:
  2035. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2036. cal_info->cal_status);
  2037. break;
  2038. default:
  2039. cnss_pr_err("Unknown calibration status: %u\n",
  2040. cal_info->cal_status);
  2041. break;
  2042. }
  2043. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2044. cnss_bus_free_qdss_mem(plat_priv);
  2045. cnss_release_antenna_sharing(plat_priv);
  2046. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2047. goto skip_shutdown;
  2048. cnss_bus_dev_shutdown(plat_priv);
  2049. msleep(POWER_RESET_MIN_DELAY_MS);
  2050. skip_shutdown:
  2051. complete(&plat_priv->cal_complete);
  2052. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2053. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2054. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2055. cnss_cal_mem_upload_to_file(plat_priv);
  2056. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2057. goto out;
  2058. cnss_pr_dbg("Schedule WLAN driver load\n");
  2059. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2060. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2061. 0);
  2062. }
  2063. out:
  2064. kfree(data);
  2065. return 0;
  2066. }
  2067. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2068. {
  2069. int ret;
  2070. ret = cnss_bus_dev_powerup(plat_priv);
  2071. if (ret)
  2072. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2073. return ret;
  2074. }
  2075. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2076. {
  2077. cnss_bus_dev_shutdown(plat_priv);
  2078. return 0;
  2079. }
  2080. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2081. {
  2082. int ret = 0;
  2083. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2084. if (ret < 0)
  2085. return ret;
  2086. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2087. }
  2088. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2089. u32 mem_seg_len, u64 pa, u32 size)
  2090. {
  2091. int i = 0;
  2092. u64 offset = 0;
  2093. void *va = NULL;
  2094. u64 local_pa;
  2095. u32 local_size;
  2096. for (i = 0; i < mem_seg_len; i++) {
  2097. local_pa = (u64)fw_mem[i].pa;
  2098. local_size = (u32)fw_mem[i].size;
  2099. if (pa == local_pa && size <= local_size) {
  2100. va = fw_mem[i].va;
  2101. break;
  2102. }
  2103. if (pa > local_pa &&
  2104. pa < local_pa + local_size &&
  2105. pa + size <= local_pa + local_size) {
  2106. offset = pa - local_pa;
  2107. va = fw_mem[i].va + offset;
  2108. break;
  2109. }
  2110. }
  2111. return va;
  2112. }
  2113. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2114. void *data)
  2115. {
  2116. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2117. struct cnss_fw_mem *fw_mem_seg;
  2118. int ret = 0L;
  2119. void *va = NULL;
  2120. u32 i, fw_mem_seg_len;
  2121. switch (event_data->mem_type) {
  2122. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2123. if (!plat_priv->fw_mem_seg_len)
  2124. goto invalid_mem_save;
  2125. fw_mem_seg = plat_priv->fw_mem;
  2126. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2127. break;
  2128. case QMI_WLFW_MEM_QDSS_V01:
  2129. if (!plat_priv->qdss_mem_seg_len)
  2130. goto invalid_mem_save;
  2131. fw_mem_seg = plat_priv->qdss_mem;
  2132. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2133. break;
  2134. default:
  2135. goto invalid_mem_save;
  2136. }
  2137. for (i = 0; i < event_data->mem_seg_len; i++) {
  2138. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2139. event_data->mem_seg[i].addr,
  2140. event_data->mem_seg[i].size);
  2141. if (!va) {
  2142. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2143. &event_data->mem_seg[i].addr,
  2144. event_data->mem_type);
  2145. ret = -EINVAL;
  2146. break;
  2147. }
  2148. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2149. event_data->file_name,
  2150. event_data->mem_seg[i].size);
  2151. if (ret < 0) {
  2152. cnss_pr_err("Fail to save fw mem data: %d\n",
  2153. ret);
  2154. break;
  2155. }
  2156. }
  2157. kfree(data);
  2158. return ret;
  2159. invalid_mem_save:
  2160. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2161. event_data->mem_type);
  2162. kfree(data);
  2163. return -EINVAL;
  2164. }
  2165. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2166. {
  2167. cnss_bus_free_qdss_mem(plat_priv);
  2168. return 0;
  2169. }
  2170. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2171. void *data)
  2172. {
  2173. int ret = 0;
  2174. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2175. if (!plat_priv)
  2176. return -ENODEV;
  2177. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2178. event_data->total_size);
  2179. kfree(data);
  2180. return ret;
  2181. }
  2182. static void cnss_driver_event_work(struct work_struct *work)
  2183. {
  2184. struct cnss_plat_data *plat_priv =
  2185. container_of(work, struct cnss_plat_data, event_work);
  2186. struct cnss_driver_event *event;
  2187. unsigned long flags;
  2188. int ret = 0;
  2189. if (!plat_priv) {
  2190. cnss_pr_err("plat_priv is NULL!\n");
  2191. return;
  2192. }
  2193. cnss_pm_stay_awake(plat_priv);
  2194. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2195. while (!list_empty(&plat_priv->event_list)) {
  2196. event = list_first_entry(&plat_priv->event_list,
  2197. struct cnss_driver_event, list);
  2198. list_del(&event->list);
  2199. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2200. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2201. cnss_driver_event_to_str(event->type),
  2202. event->sync ? "-sync" : "", event->type,
  2203. plat_priv->driver_state);
  2204. switch (event->type) {
  2205. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2206. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2207. break;
  2208. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2209. ret = cnss_wlfw_server_exit(plat_priv);
  2210. break;
  2211. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2212. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2213. if (ret)
  2214. break;
  2215. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2216. break;
  2217. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2218. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2219. break;
  2220. case CNSS_DRIVER_EVENT_FW_READY:
  2221. ret = cnss_fw_ready_hdlr(plat_priv);
  2222. break;
  2223. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2224. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2225. break;
  2226. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2227. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2228. event->data);
  2229. break;
  2230. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2231. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2232. event->data);
  2233. break;
  2234. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2235. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2236. break;
  2237. case CNSS_DRIVER_EVENT_RECOVERY:
  2238. ret = cnss_driver_recovery_hdlr(plat_priv,
  2239. event->data);
  2240. break;
  2241. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2242. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2243. break;
  2244. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2245. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2246. &plat_priv->driver_state);
  2247. fallthrough;
  2248. case CNSS_DRIVER_EVENT_POWER_UP:
  2249. ret = cnss_power_up_hdlr(plat_priv);
  2250. break;
  2251. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2252. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2253. &plat_priv->driver_state);
  2254. fallthrough;
  2255. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2256. ret = cnss_power_down_hdlr(plat_priv);
  2257. break;
  2258. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2259. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2260. event->data);
  2261. break;
  2262. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2263. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2264. event->data);
  2265. break;
  2266. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2267. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2268. break;
  2269. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2270. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2271. event->data);
  2272. break;
  2273. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2274. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2275. break;
  2276. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2277. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2278. event->data);
  2279. break;
  2280. default:
  2281. cnss_pr_err("Invalid driver event type: %d",
  2282. event->type);
  2283. kfree(event);
  2284. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2285. continue;
  2286. }
  2287. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2288. if (event->sync) {
  2289. event->ret = ret;
  2290. complete(&event->complete);
  2291. continue;
  2292. }
  2293. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2294. kfree(event);
  2295. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2296. }
  2297. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2298. cnss_pm_relax(plat_priv);
  2299. }
  2300. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2301. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2302. {
  2303. int ret = 0;
  2304. struct cnss_subsys_info *subsys_info;
  2305. subsys_info = &plat_priv->subsys_info;
  2306. subsys_info->subsys_desc.name = plat_priv->device_name;
  2307. subsys_info->subsys_desc.owner = THIS_MODULE;
  2308. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2309. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2310. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2311. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2312. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2313. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2314. if (IS_ERR(subsys_info->subsys_device)) {
  2315. ret = PTR_ERR(subsys_info->subsys_device);
  2316. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2317. goto out;
  2318. }
  2319. subsys_info->subsys_handle =
  2320. subsystem_get(subsys_info->subsys_desc.name);
  2321. if (!subsys_info->subsys_handle) {
  2322. cnss_pr_err("Failed to get subsys_handle!\n");
  2323. ret = -EINVAL;
  2324. goto unregister_subsys;
  2325. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2326. ret = PTR_ERR(subsys_info->subsys_handle);
  2327. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2328. goto unregister_subsys;
  2329. }
  2330. return 0;
  2331. unregister_subsys:
  2332. subsys_unregister(subsys_info->subsys_device);
  2333. out:
  2334. return ret;
  2335. }
  2336. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2337. {
  2338. struct cnss_subsys_info *subsys_info;
  2339. subsys_info = &plat_priv->subsys_info;
  2340. subsystem_put(subsys_info->subsys_handle);
  2341. subsys_unregister(subsys_info->subsys_device);
  2342. }
  2343. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2344. {
  2345. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2346. return create_ramdump_device(subsys_info->subsys_desc.name,
  2347. subsys_info->subsys_desc.dev);
  2348. }
  2349. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2350. void *ramdump_dev)
  2351. {
  2352. destroy_ramdump_device(ramdump_dev);
  2353. }
  2354. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2355. {
  2356. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2357. struct ramdump_segment segment;
  2358. memset(&segment, 0, sizeof(segment));
  2359. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2360. segment.size = ramdump_info->ramdump_size;
  2361. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2362. }
  2363. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2364. {
  2365. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2366. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2367. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2368. struct ramdump_segment *ramdump_segs, *s;
  2369. struct cnss_dump_meta_info meta_info = {0};
  2370. int i, ret = 0;
  2371. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2372. sizeof(*ramdump_segs),
  2373. GFP_KERNEL);
  2374. if (!ramdump_segs)
  2375. return -ENOMEM;
  2376. s = ramdump_segs + 1;
  2377. for (i = 0; i < dump_data->nentries; i++) {
  2378. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2379. cnss_pr_err("Unsupported dump type: %d",
  2380. dump_seg->type);
  2381. continue;
  2382. }
  2383. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2384. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2385. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2386. }
  2387. meta_info.entry[dump_seg->type].entry_num++;
  2388. s->address = dump_seg->address;
  2389. s->v_address = (void __iomem *)dump_seg->v_address;
  2390. s->size = dump_seg->size;
  2391. s++;
  2392. dump_seg++;
  2393. }
  2394. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2395. meta_info.version = CNSS_RAMDUMP_VERSION;
  2396. meta_info.chipset = plat_priv->device_id;
  2397. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2398. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2399. ramdump_segs->size = sizeof(meta_info);
  2400. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2401. dump_data->nentries + 1);
  2402. kfree(ramdump_segs);
  2403. return ret;
  2404. }
  2405. #else
  2406. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2407. void *data)
  2408. {
  2409. struct cnss_plat_data *plat_priv =
  2410. container_of(nb, struct cnss_plat_data, panic_nb);
  2411. cnss_bus_dev_crash_shutdown(plat_priv);
  2412. return NOTIFY_DONE;
  2413. }
  2414. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2415. {
  2416. int ret;
  2417. if (!plat_priv)
  2418. return -ENODEV;
  2419. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2420. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2421. &plat_priv->panic_nb);
  2422. if (ret) {
  2423. cnss_pr_err("Failed to register panic handler\n");
  2424. return -EINVAL;
  2425. }
  2426. return 0;
  2427. }
  2428. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2429. {
  2430. int ret;
  2431. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2432. &plat_priv->panic_nb);
  2433. if (ret)
  2434. cnss_pr_err("Failed to unregister panic handler\n");
  2435. }
  2436. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2437. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2438. {
  2439. return &plat_priv->plat_dev->dev;
  2440. }
  2441. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2442. void *ramdump_dev)
  2443. {
  2444. }
  2445. #endif
  2446. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2447. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2448. {
  2449. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2450. struct qcom_dump_segment segment;
  2451. struct list_head head;
  2452. INIT_LIST_HEAD(&head);
  2453. memset(&segment, 0, sizeof(segment));
  2454. segment.va = ramdump_info->ramdump_va;
  2455. segment.size = ramdump_info->ramdump_size;
  2456. list_add(&segment.node, &head);
  2457. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2458. }
  2459. #else
  2460. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2461. {
  2462. return 0;
  2463. }
  2464. /* Using completion event inside dynamically allocated ramdump_desc
  2465. * may result a race between freeing the event after setting it to
  2466. * complete inside dev coredump free callback and the thread that is
  2467. * waiting for completion.
  2468. */
  2469. DECLARE_COMPLETION(dump_done);
  2470. #define TIMEOUT_SAVE_DUMP_MS 30000
  2471. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2472. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2473. { \
  2474. if (class == ELFCLASS32) \
  2475. return sizeof(struct elf32_##__xhdr); \
  2476. else \
  2477. return sizeof(struct elf64_##__xhdr); \
  2478. }
  2479. SIZEOF_ELF_STRUCT(phdr)
  2480. SIZEOF_ELF_STRUCT(hdr)
  2481. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2482. do { \
  2483. if (class == ELFCLASS32) \
  2484. ((struct elf32_##__xhdr *)arg)->member = value; \
  2485. else \
  2486. ((struct elf64_##__xhdr *)arg)->member = value; \
  2487. } while (0)
  2488. #define set_ehdr_property(arg, class, member, value) \
  2489. set_xhdr_property(hdr, arg, class, member, value)
  2490. #define set_phdr_property(arg, class, member, value) \
  2491. set_xhdr_property(phdr, arg, class, member, value)
  2492. /* These replace qcom_ramdump driver APIs called from common API
  2493. * cnss_do_elf_dump() by the ones defined here.
  2494. */
  2495. #define qcom_dump_segment cnss_qcom_dump_segment
  2496. #define qcom_elf_dump cnss_qcom_elf_dump
  2497. #define dump_enabled cnss_dump_enabled
  2498. struct cnss_qcom_dump_segment {
  2499. struct list_head node;
  2500. dma_addr_t da;
  2501. void *va;
  2502. size_t size;
  2503. };
  2504. struct cnss_qcom_ramdump_desc {
  2505. void *data;
  2506. struct completion dump_done;
  2507. };
  2508. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2509. void *data, size_t datalen)
  2510. {
  2511. struct cnss_qcom_ramdump_desc *desc = data;
  2512. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2513. datalen);
  2514. }
  2515. static void cnss_qcom_devcd_freev(void *data)
  2516. {
  2517. struct cnss_qcom_ramdump_desc *desc = data;
  2518. cnss_pr_dbg("Free dump data for dev coredump\n");
  2519. complete(&dump_done);
  2520. vfree(desc->data);
  2521. kfree(desc);
  2522. }
  2523. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2524. gfp_t gfp)
  2525. {
  2526. struct cnss_qcom_ramdump_desc *desc;
  2527. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2528. int ret;
  2529. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2530. if (!desc)
  2531. return -ENOMEM;
  2532. desc->data = data;
  2533. reinit_completion(&dump_done);
  2534. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2535. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2536. ret = wait_for_completion_timeout(&dump_done,
  2537. msecs_to_jiffies(timeout));
  2538. if (!ret)
  2539. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2540. timeout);
  2541. return ret ? 0 : -ETIMEDOUT;
  2542. }
  2543. /* Since the elf32 and elf64 identification is identical apart from
  2544. * the class, use elf32 by default.
  2545. */
  2546. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2547. {
  2548. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2549. ehdr->e_ident[EI_CLASS] = class;
  2550. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2551. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2552. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2553. }
  2554. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2555. unsigned char class)
  2556. {
  2557. struct cnss_qcom_dump_segment *segment;
  2558. void *phdr, *ehdr;
  2559. size_t data_size, offset;
  2560. int phnum = 0;
  2561. void *data;
  2562. void __iomem *ptr;
  2563. if (!segs || list_empty(segs))
  2564. return -EINVAL;
  2565. data_size = sizeof_elf_hdr(class);
  2566. list_for_each_entry(segment, segs, node) {
  2567. data_size += sizeof_elf_phdr(class) + segment->size;
  2568. phnum++;
  2569. }
  2570. data = vmalloc(data_size);
  2571. if (!data)
  2572. return -ENOMEM;
  2573. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2574. ehdr = data;
  2575. memset(ehdr, 0, sizeof_elf_hdr(class));
  2576. init_elf_identification(ehdr, class);
  2577. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2578. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2579. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2580. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2581. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2582. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2583. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2584. phdr = data + sizeof_elf_hdr(class);
  2585. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2586. list_for_each_entry(segment, segs, node) {
  2587. memset(phdr, 0, sizeof_elf_phdr(class));
  2588. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2589. set_phdr_property(phdr, class, p_offset, offset);
  2590. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2591. set_phdr_property(phdr, class, p_paddr, segment->da);
  2592. set_phdr_property(phdr, class, p_filesz, segment->size);
  2593. set_phdr_property(phdr, class, p_memsz, segment->size);
  2594. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2595. set_phdr_property(phdr, class, p_align, 0);
  2596. if (segment->va) {
  2597. memcpy(data + offset, segment->va, segment->size);
  2598. } else {
  2599. ptr = devm_ioremap(dev, segment->da, segment->size);
  2600. if (!ptr) {
  2601. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2602. &segment->da, segment->size);
  2603. memset(data + offset, 0xff, segment->size);
  2604. } else {
  2605. memcpy_fromio(data + offset, ptr,
  2606. segment->size);
  2607. }
  2608. }
  2609. offset += segment->size;
  2610. phdr += sizeof_elf_phdr(class);
  2611. }
  2612. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2613. }
  2614. /* Saving dump to file system is always needed in this case. */
  2615. static bool cnss_dump_enabled(void)
  2616. {
  2617. return true;
  2618. }
  2619. #endif /* CONFIG_QCOM_RAMDUMP */
  2620. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2621. {
  2622. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2623. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2624. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2625. struct qcom_dump_segment *seg;
  2626. struct cnss_dump_meta_info meta_info = {0};
  2627. struct list_head head;
  2628. int i, ret = 0;
  2629. if (!dump_enabled()) {
  2630. cnss_pr_info("Dump collection is not enabled\n");
  2631. return ret;
  2632. }
  2633. INIT_LIST_HEAD(&head);
  2634. for (i = 0; i < dump_data->nentries; i++) {
  2635. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2636. cnss_pr_err("Unsupported dump type: %d",
  2637. dump_seg->type);
  2638. continue;
  2639. }
  2640. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2641. if (!seg) {
  2642. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2643. __func__, i);
  2644. continue;
  2645. }
  2646. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2647. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2648. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2649. }
  2650. meta_info.entry[dump_seg->type].entry_num++;
  2651. seg->da = dump_seg->address;
  2652. seg->va = dump_seg->v_address;
  2653. seg->size = dump_seg->size;
  2654. list_add_tail(&seg->node, &head);
  2655. dump_seg++;
  2656. }
  2657. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2658. if (!seg) {
  2659. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2660. __func__);
  2661. goto skip_elf_dump;
  2662. }
  2663. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2664. meta_info.version = CNSS_RAMDUMP_VERSION;
  2665. meta_info.chipset = plat_priv->device_id;
  2666. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2667. seg->va = &meta_info;
  2668. seg->size = sizeof(meta_info);
  2669. list_add(&seg->node, &head);
  2670. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2671. skip_elf_dump:
  2672. while (!list_empty(&head)) {
  2673. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2674. list_del(&seg->node);
  2675. kfree(seg);
  2676. }
  2677. return ret;
  2678. }
  2679. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2680. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2681. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2682. size_t num_entries_loaded)
  2683. {
  2684. struct qcom_dump_segment *seg;
  2685. struct cnss_host_dump_meta_info meta_info = {0};
  2686. struct list_head head;
  2687. int dev_ret = 0;
  2688. struct device *new_device;
  2689. static const char * const wlan_str[] = {
  2690. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2691. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2692. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2693. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2694. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2695. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2696. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2697. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2698. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2699. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2700. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2701. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2702. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2703. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2704. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2705. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2706. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data",
  2707. [CNSS_HOST_CE_DESC_HIST] = "hif_ce_desc_hist",
  2708. [CNSS_HOST_CE_COUNT_MAX] = "hif_ce_count_max",
  2709. [CNSS_HOST_CE_HISTORY_MAX] = "hif_ce_history_max",
  2710. [CNSS_HOST_ONLY_FOR_CRIT_CE] = "hif_ce_only_for_crit",
  2711. [CNSS_HOST_HIF_EVENT_HISTORY] = "hif_event_history",
  2712. [CNSS_HOST_HIF_EVENT_HIST_MAX] = "hif_event_hist_max"
  2713. };
  2714. int i;
  2715. int ret = 0;
  2716. enum cnss_host_dump_type j;
  2717. if (!dump_enabled()) {
  2718. cnss_pr_info("Dump collection is not enabled\n");
  2719. return ret;
  2720. }
  2721. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2722. if (!new_device) {
  2723. cnss_pr_err("Failed to alloc device mem\n");
  2724. return -ENOMEM;
  2725. }
  2726. device_initialize(new_device);
  2727. dev_set_name(new_device, "wlan_driver");
  2728. dev_ret = device_add(new_device);
  2729. if (dev_ret) {
  2730. cnss_pr_err("Failed to add new device\n");
  2731. goto put_device;
  2732. }
  2733. INIT_LIST_HEAD(&head);
  2734. for (i = 0; i < num_entries_loaded; i++) {
  2735. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2736. if (!seg) {
  2737. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2738. continue;
  2739. }
  2740. seg->va = ssr_entry[i].buffer_pointer;
  2741. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2742. seg->size = ssr_entry[i].buffer_size;
  2743. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2744. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2745. strlen(wlan_str[j])) == 0) {
  2746. meta_info.entry[i].type = j;
  2747. }
  2748. }
  2749. meta_info.entry[i].entry_start = i + 1;
  2750. meta_info.entry[i].entry_num++;
  2751. list_add_tail(&seg->node, &head);
  2752. }
  2753. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2754. if (!seg) {
  2755. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2756. __func__);
  2757. goto skip_host_dump;
  2758. }
  2759. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2760. meta_info.version = CNSS_RAMDUMP_VERSION;
  2761. meta_info.chipset = plat_priv->device_id;
  2762. meta_info.total_entries = num_entries_loaded;
  2763. seg->va = &meta_info;
  2764. seg->da = (dma_addr_t)&meta_info;
  2765. seg->size = sizeof(meta_info);
  2766. list_add(&seg->node, &head);
  2767. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2768. skip_host_dump:
  2769. while (!list_empty(&head)) {
  2770. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2771. list_del(&seg->node);
  2772. kfree(seg);
  2773. }
  2774. device_del(new_device);
  2775. put_device:
  2776. put_device(new_device);
  2777. kfree(new_device);
  2778. return ret;
  2779. }
  2780. #endif
  2781. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2782. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2783. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2784. {
  2785. struct cnss_ramdump_info *ramdump_info;
  2786. struct msm_dump_entry dump_entry;
  2787. ramdump_info = &plat_priv->ramdump_info;
  2788. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2789. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2790. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2791. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2792. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2793. sizeof(ramdump_info->dump_data.name));
  2794. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2795. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2796. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2797. &dump_entry);
  2798. }
  2799. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2800. {
  2801. int ret = 0;
  2802. struct device *dev;
  2803. struct cnss_ramdump_info *ramdump_info;
  2804. u32 ramdump_size = 0;
  2805. dev = &plat_priv->plat_dev->dev;
  2806. ramdump_info = &plat_priv->ramdump_info;
  2807. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2808. /* dt type: legacy or converged */
  2809. ret = of_property_read_u32(dev->of_node,
  2810. "qcom,wlan-ramdump-dynamic",
  2811. &ramdump_size);
  2812. } else {
  2813. ret = of_property_read_u32(plat_priv->dev_node,
  2814. "qcom,wlan-ramdump-dynamic",
  2815. &ramdump_size);
  2816. }
  2817. if (ret == 0) {
  2818. ramdump_info->ramdump_va =
  2819. dma_alloc_coherent(dev, ramdump_size,
  2820. &ramdump_info->ramdump_pa,
  2821. GFP_KERNEL);
  2822. if (ramdump_info->ramdump_va)
  2823. ramdump_info->ramdump_size = ramdump_size;
  2824. }
  2825. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2826. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2827. if (ramdump_info->ramdump_size == 0) {
  2828. cnss_pr_info("Ramdump will not be collected");
  2829. goto out;
  2830. }
  2831. ret = cnss_init_dump_entry(plat_priv);
  2832. if (ret) {
  2833. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2834. goto free_ramdump;
  2835. }
  2836. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2837. if (!ramdump_info->ramdump_dev) {
  2838. cnss_pr_err("Failed to create ramdump device!");
  2839. ret = -ENOMEM;
  2840. goto free_ramdump;
  2841. }
  2842. return 0;
  2843. free_ramdump:
  2844. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2845. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2846. out:
  2847. return ret;
  2848. }
  2849. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2850. {
  2851. struct device *dev;
  2852. struct cnss_ramdump_info *ramdump_info;
  2853. dev = &plat_priv->plat_dev->dev;
  2854. ramdump_info = &plat_priv->ramdump_info;
  2855. if (ramdump_info->ramdump_dev)
  2856. cnss_destroy_ramdump_device(plat_priv,
  2857. ramdump_info->ramdump_dev);
  2858. if (ramdump_info->ramdump_va)
  2859. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2860. ramdump_info->ramdump_va,
  2861. ramdump_info->ramdump_pa);
  2862. }
  2863. /**
  2864. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2865. * @ret: Error returned by msm_dump_data_register_nominidump
  2866. *
  2867. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2868. * ignore failure.
  2869. *
  2870. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2871. */
  2872. static int cnss_ignore_dump_data_reg_fail(int ret)
  2873. {
  2874. return ret;
  2875. }
  2876. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2877. {
  2878. int ret = 0;
  2879. struct cnss_ramdump_info_v2 *info_v2;
  2880. struct cnss_dump_data *dump_data;
  2881. struct msm_dump_entry dump_entry;
  2882. struct device *dev = &plat_priv->plat_dev->dev;
  2883. u32 ramdump_size = 0;
  2884. info_v2 = &plat_priv->ramdump_info_v2;
  2885. dump_data = &info_v2->dump_data;
  2886. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2887. /* dt type: legacy or converged */
  2888. ret = of_property_read_u32(dev->of_node,
  2889. "qcom,wlan-ramdump-dynamic",
  2890. &ramdump_size);
  2891. } else {
  2892. ret = of_property_read_u32(plat_priv->dev_node,
  2893. "qcom,wlan-ramdump-dynamic",
  2894. &ramdump_size);
  2895. }
  2896. if (ret == 0)
  2897. info_v2->ramdump_size = ramdump_size;
  2898. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2899. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2900. if (!info_v2->dump_data_vaddr)
  2901. return -ENOMEM;
  2902. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2903. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2904. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2905. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2906. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2907. sizeof(dump_data->name));
  2908. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2909. dump_entry.addr = virt_to_phys(dump_data);
  2910. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2911. &dump_entry);
  2912. if (ret) {
  2913. ret = cnss_ignore_dump_data_reg_fail(ret);
  2914. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2915. ret ? "Error" : "Ignoring", ret);
  2916. goto free_ramdump;
  2917. }
  2918. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2919. if (!info_v2->ramdump_dev) {
  2920. cnss_pr_err("Failed to create ramdump device!\n");
  2921. ret = -ENOMEM;
  2922. goto free_ramdump;
  2923. }
  2924. return 0;
  2925. free_ramdump:
  2926. kfree(info_v2->dump_data_vaddr);
  2927. info_v2->dump_data_vaddr = NULL;
  2928. return ret;
  2929. }
  2930. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2931. {
  2932. struct cnss_ramdump_info_v2 *info_v2;
  2933. info_v2 = &plat_priv->ramdump_info_v2;
  2934. if (info_v2->ramdump_dev)
  2935. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2936. kfree(info_v2->dump_data_vaddr);
  2937. info_v2->dump_data_vaddr = NULL;
  2938. info_v2->dump_data_valid = false;
  2939. }
  2940. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2941. {
  2942. int ret = 0;
  2943. switch (plat_priv->device_id) {
  2944. case QCA6174_DEVICE_ID:
  2945. ret = cnss_register_ramdump_v1(plat_priv);
  2946. break;
  2947. case QCA6290_DEVICE_ID:
  2948. case QCA6390_DEVICE_ID:
  2949. case QCN7605_DEVICE_ID:
  2950. case QCA6490_DEVICE_ID:
  2951. case KIWI_DEVICE_ID:
  2952. case MANGO_DEVICE_ID:
  2953. case PEACH_DEVICE_ID:
  2954. ret = cnss_register_ramdump_v2(plat_priv);
  2955. break;
  2956. default:
  2957. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2958. ret = -ENODEV;
  2959. break;
  2960. }
  2961. return ret;
  2962. }
  2963. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2964. {
  2965. switch (plat_priv->device_id) {
  2966. case QCA6174_DEVICE_ID:
  2967. cnss_unregister_ramdump_v1(plat_priv);
  2968. break;
  2969. case QCA6290_DEVICE_ID:
  2970. case QCA6390_DEVICE_ID:
  2971. case QCN7605_DEVICE_ID:
  2972. case QCA6490_DEVICE_ID:
  2973. case KIWI_DEVICE_ID:
  2974. case MANGO_DEVICE_ID:
  2975. case PEACH_DEVICE_ID:
  2976. cnss_unregister_ramdump_v2(plat_priv);
  2977. break;
  2978. default:
  2979. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2980. break;
  2981. }
  2982. }
  2983. #else
  2984. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2985. {
  2986. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2987. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2988. struct device *dev = &plat_priv->plat_dev->dev;
  2989. u32 ramdump_size = 0;
  2990. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2991. &ramdump_size) == 0)
  2992. info_v2->ramdump_size = ramdump_size;
  2993. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2994. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2995. if (!info_v2->dump_data_vaddr)
  2996. return -ENOMEM;
  2997. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2998. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2999. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3000. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3001. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3002. sizeof(dump_data->name));
  3003. info_v2->ramdump_dev = dev;
  3004. return 0;
  3005. }
  3006. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3007. {
  3008. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3009. info_v2->ramdump_dev = NULL;
  3010. kfree(info_v2->dump_data_vaddr);
  3011. info_v2->dump_data_vaddr = NULL;
  3012. info_v2->dump_data_valid = false;
  3013. }
  3014. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  3015. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  3016. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3017. phys_addr_t *pa, unsigned long attrs)
  3018. {
  3019. struct sg_table sgt;
  3020. int ret;
  3021. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  3022. if (ret) {
  3023. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3024. va, &dma, size, attrs);
  3025. return -EINVAL;
  3026. }
  3027. *pa = page_to_phys(sg_page(sgt.sgl));
  3028. sg_free_table(&sgt);
  3029. return 0;
  3030. }
  3031. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3032. enum cnss_fw_dump_type type, int seg_no,
  3033. void *va, phys_addr_t pa, size_t size)
  3034. {
  3035. struct md_region md_entry;
  3036. int ret;
  3037. switch (type) {
  3038. case CNSS_FW_IMAGE:
  3039. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3040. seg_no);
  3041. break;
  3042. case CNSS_FW_RDDM:
  3043. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3044. seg_no);
  3045. break;
  3046. case CNSS_FW_REMOTE_HEAP:
  3047. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3048. seg_no);
  3049. break;
  3050. default:
  3051. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3052. return -EINVAL;
  3053. }
  3054. md_entry.phys_addr = pa;
  3055. md_entry.virt_addr = (uintptr_t)va;
  3056. md_entry.size = size;
  3057. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3058. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3059. md_entry.name, va, &pa, size);
  3060. ret = msm_minidump_add_region(&md_entry);
  3061. if (ret < 0)
  3062. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3063. return ret;
  3064. }
  3065. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3066. enum cnss_fw_dump_type type, int seg_no,
  3067. void *va, phys_addr_t pa, size_t size)
  3068. {
  3069. struct md_region md_entry;
  3070. int ret;
  3071. switch (type) {
  3072. case CNSS_FW_IMAGE:
  3073. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3074. seg_no);
  3075. break;
  3076. case CNSS_FW_RDDM:
  3077. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3078. seg_no);
  3079. break;
  3080. case CNSS_FW_REMOTE_HEAP:
  3081. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3082. seg_no);
  3083. break;
  3084. default:
  3085. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3086. return -EINVAL;
  3087. }
  3088. md_entry.phys_addr = pa;
  3089. md_entry.virt_addr = (uintptr_t)va;
  3090. md_entry.size = size;
  3091. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3092. cnss_pr_vdbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3093. md_entry.name, va, &pa, size);
  3094. ret = msm_minidump_remove_region(&md_entry);
  3095. if (ret)
  3096. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3097. ret);
  3098. return ret;
  3099. }
  3100. #else
  3101. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3102. phys_addr_t *pa, unsigned long attrs)
  3103. {
  3104. return 0;
  3105. }
  3106. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3107. enum cnss_fw_dump_type type, int seg_no,
  3108. void *va, phys_addr_t pa, size_t size)
  3109. {
  3110. return 0;
  3111. }
  3112. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3113. enum cnss_fw_dump_type type, int seg_no,
  3114. void *va, phys_addr_t pa, size_t size)
  3115. {
  3116. return 0;
  3117. }
  3118. #endif /* CONFIG_QCOM_MINIDUMP */
  3119. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3120. const struct firmware **fw_entry,
  3121. const char *filename)
  3122. {
  3123. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3124. return request_firmware_direct(fw_entry, filename,
  3125. &plat_priv->plat_dev->dev);
  3126. else
  3127. return firmware_request_nowarn(fw_entry, filename,
  3128. &plat_priv->plat_dev->dev);
  3129. }
  3130. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3131. /**
  3132. * cnss_register_bus_scale() - Setup interconnect voting data
  3133. * @plat_priv: Platform data structure
  3134. *
  3135. * For different interconnect path configured in device tree setup voting data
  3136. * for list of bandwidth requirements.
  3137. *
  3138. * Result: 0 for success. -EINVAL if not configured
  3139. */
  3140. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3141. {
  3142. int ret = -EINVAL;
  3143. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3144. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3145. struct device *dev = &plat_priv->plat_dev->dev;
  3146. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3147. ret = of_property_read_u32(dev->of_node,
  3148. "qcom,icc-path-count",
  3149. &plat_priv->icc.path_count);
  3150. if (ret) {
  3151. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3152. return 0;
  3153. }
  3154. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3155. "qcom,bus-bw-cfg-count",
  3156. &plat_priv->icc.bus_bw_cfg_count);
  3157. if (ret) {
  3158. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3159. goto cleanup;
  3160. }
  3161. cfg_arr_size = plat_priv->icc.path_count *
  3162. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3163. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3164. if (!cfg_arr) {
  3165. cnss_pr_err("Failed to alloc cfg table mem\n");
  3166. ret = -ENOMEM;
  3167. goto cleanup;
  3168. }
  3169. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3170. "qcom,bus-bw-cfg", cfg_arr,
  3171. cfg_arr_size);
  3172. if (ret) {
  3173. cnss_pr_err("Invalid Bus BW Config Table\n");
  3174. goto cleanup;
  3175. }
  3176. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3177. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3178. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3179. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3180. GFP_KERNEL);
  3181. if (!bus_bw_info) {
  3182. ret = -ENOMEM;
  3183. goto out;
  3184. }
  3185. ret = of_property_read_string_index(dev->of_node,
  3186. "interconnect-names", idx,
  3187. &bus_bw_info->icc_name);
  3188. if (ret)
  3189. goto out;
  3190. bus_bw_info->icc_path =
  3191. of_icc_get(&plat_priv->plat_dev->dev,
  3192. bus_bw_info->icc_name);
  3193. if (IS_ERR(bus_bw_info->icc_path)) {
  3194. ret = PTR_ERR(bus_bw_info->icc_path);
  3195. if (ret != -EPROBE_DEFER) {
  3196. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3197. bus_bw_info->icc_name, ret);
  3198. goto out;
  3199. }
  3200. }
  3201. bus_bw_info->cfg_table =
  3202. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3203. sizeof(*bus_bw_info->cfg_table),
  3204. GFP_KERNEL);
  3205. if (!bus_bw_info->cfg_table) {
  3206. ret = -ENOMEM;
  3207. goto out;
  3208. }
  3209. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3210. bus_bw_info->icc_name);
  3211. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3212. CNSS_ICC_VOTE_MAX);
  3213. i < plat_priv->icc.bus_bw_cfg_count;
  3214. i++, j += 2) {
  3215. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3216. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3217. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3218. i, bus_bw_info->cfg_table[i].avg_bw,
  3219. bus_bw_info->cfg_table[i].peak_bw);
  3220. }
  3221. list_add_tail(&bus_bw_info->list,
  3222. &plat_priv->icc.list_head);
  3223. }
  3224. kfree(cfg_arr);
  3225. return 0;
  3226. out:
  3227. list_for_each_entry_safe(bus_bw_info, tmp,
  3228. &plat_priv->icc.list_head, list) {
  3229. list_del(&bus_bw_info->list);
  3230. }
  3231. cleanup:
  3232. kfree(cfg_arr);
  3233. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3234. return ret;
  3235. }
  3236. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3237. {
  3238. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3239. list_for_each_entry_safe(bus_bw_info, tmp,
  3240. &plat_priv->icc.list_head, list) {
  3241. list_del(&bus_bw_info->list);
  3242. if (bus_bw_info->icc_path)
  3243. icc_put(bus_bw_info->icc_path);
  3244. }
  3245. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3246. }
  3247. #else
  3248. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3249. {
  3250. return 0;
  3251. }
  3252. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3253. #endif /* CONFIG_INTERCONNECT */
  3254. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3255. {
  3256. struct cnss_plat_data *plat_priv = cb_ctx;
  3257. if (!plat_priv) {
  3258. cnss_pr_err("%s: Invalid context\n", __func__);
  3259. return;
  3260. }
  3261. if (status) {
  3262. cnss_pr_info("CNSS Daemon connected\n");
  3263. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3264. complete(&plat_priv->daemon_connected);
  3265. } else {
  3266. cnss_pr_info("CNSS Daemon disconnected\n");
  3267. reinit_completion(&plat_priv->daemon_connected);
  3268. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3269. }
  3270. }
  3271. static ssize_t enable_hds_store(struct device *dev,
  3272. struct device_attribute *attr,
  3273. const char *buf, size_t count)
  3274. {
  3275. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3276. unsigned int enable_hds = 0;
  3277. if (!plat_priv)
  3278. return -ENODEV;
  3279. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3280. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3281. return -EINVAL;
  3282. }
  3283. if (enable_hds)
  3284. plat_priv->hds_enabled = true;
  3285. else
  3286. plat_priv->hds_enabled = false;
  3287. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3288. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3289. return count;
  3290. }
  3291. static ssize_t recovery_show(struct device *dev,
  3292. struct device_attribute *attr,
  3293. char *buf)
  3294. {
  3295. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3296. u32 buf_size = PAGE_SIZE;
  3297. u32 curr_len = 0;
  3298. u32 buf_written = 0;
  3299. if (!plat_priv)
  3300. return -ENODEV;
  3301. buf_written = scnprintf(buf, buf_size,
  3302. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3303. "BIT0 -- wlan fw recovery\n"
  3304. "BIT1 -- wlan pcss recovery\n"
  3305. "---------------------------------\n");
  3306. curr_len += buf_written;
  3307. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3308. "WLAN recovery %s[%d]\n",
  3309. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3310. plat_priv->recovery_enabled);
  3311. curr_len += buf_written;
  3312. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3313. "WLAN PCSS recovery %s[%d]\n",
  3314. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3315. plat_priv->recovery_pcss_enabled);
  3316. curr_len += buf_written;
  3317. /*
  3318. * Now size of curr_len is not over page size for sure,
  3319. * later if new item or none-fixed size item added, need
  3320. * add check to make sure curr_len is not over page size.
  3321. */
  3322. return curr_len;
  3323. }
  3324. static ssize_t time_sync_period_show(struct device *dev,
  3325. struct device_attribute *attr,
  3326. char *buf)
  3327. {
  3328. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3329. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3330. plat_priv->ctrl_params.time_sync_period);
  3331. }
  3332. /**
  3333. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3334. * @plat_priv: Platform data structure
  3335. *
  3336. * Result: return minimum time sync period present in vote from wlan and sys
  3337. */
  3338. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3339. {
  3340. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3341. unsigned int time_sync_period;
  3342. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3343. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3344. if (min_time_sync_period > time_sync_period)
  3345. min_time_sync_period = time_sync_period;
  3346. }
  3347. return min_time_sync_period;
  3348. }
  3349. static ssize_t time_sync_period_store(struct device *dev,
  3350. struct device_attribute *attr,
  3351. const char *buf, size_t count)
  3352. {
  3353. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3354. unsigned int time_sync_period = 0;
  3355. if (!plat_priv)
  3356. return -ENODEV;
  3357. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3358. cnss_pr_err("Invalid time sync sysfs command\n");
  3359. return -EINVAL;
  3360. }
  3361. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3362. cnss_pr_err("Invalid time sync value\n");
  3363. return -EINVAL;
  3364. }
  3365. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3366. time_sync_period;
  3367. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3368. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3369. cnss_pr_err("Invalid min time sync value\n");
  3370. return -EINVAL;
  3371. }
  3372. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3373. return count;
  3374. }
  3375. /**
  3376. * cnss_update_time_sync_period() - Set time sync period given by driver
  3377. * @dev: device structure
  3378. * @time_sync_period: time sync period value
  3379. *
  3380. * Update time sync period vote of driver and set minimum of time sync period
  3381. * from stored vote through wlan and sys config
  3382. * Result: return 0 for success, error in case of invalid value and no dev
  3383. */
  3384. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3385. {
  3386. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3387. if (!plat_priv)
  3388. return -ENODEV;
  3389. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3390. cnss_pr_err("Invalid time sync value\n");
  3391. return -EINVAL;
  3392. }
  3393. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3394. time_sync_period;
  3395. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3396. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3397. cnss_pr_err("Invalid min time sync value\n");
  3398. return -EINVAL;
  3399. }
  3400. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3401. return 0;
  3402. }
  3403. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3404. /**
  3405. * cnss_reset_time_sync_period() - Reset time sync period
  3406. * @dev: device structure
  3407. *
  3408. * Update time sync period vote of driver as invalid
  3409. * and reset minimum of time sync period from
  3410. * stored vote through wlan and sys config
  3411. * Result: return 0 for success, error in case of no dev
  3412. */
  3413. int cnss_reset_time_sync_period(struct device *dev)
  3414. {
  3415. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3416. unsigned int time_sync_period = 0;
  3417. if (!plat_priv)
  3418. return -ENODEV;
  3419. /* Driver vote is set to invalid in case of reset
  3420. * In this case, only vote valid to check is sys config
  3421. */
  3422. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3423. CNSS_TIME_SYNC_PERIOD_INVALID;
  3424. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3425. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3426. cnss_pr_err("Invalid min time sync value\n");
  3427. return -EINVAL;
  3428. }
  3429. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3430. return 0;
  3431. }
  3432. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3433. static ssize_t recovery_store(struct device *dev,
  3434. struct device_attribute *attr,
  3435. const char *buf, size_t count)
  3436. {
  3437. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3438. unsigned int recovery = 0;
  3439. if (!plat_priv)
  3440. return -ENODEV;
  3441. if (sscanf(buf, "%du", &recovery) != 1) {
  3442. cnss_pr_err("Invalid recovery sysfs command\n");
  3443. return -EINVAL;
  3444. }
  3445. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3446. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3447. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3448. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3449. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3450. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3451. cnss_send_subsys_restart_level_msg(plat_priv);
  3452. return count;
  3453. }
  3454. static ssize_t shutdown_store(struct device *dev,
  3455. struct device_attribute *attr,
  3456. const char *buf, size_t count)
  3457. {
  3458. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3459. cnss_pr_dbg("Received shutdown notification\n");
  3460. if (plat_priv) {
  3461. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3462. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3463. del_timer(&plat_priv->fw_boot_timer);
  3464. complete_all(&plat_priv->power_up_complete);
  3465. complete_all(&plat_priv->cal_complete);
  3466. cnss_pr_dbg("Shutdown notification handled\n");
  3467. }
  3468. return count;
  3469. }
  3470. static ssize_t fs_ready_store(struct device *dev,
  3471. struct device_attribute *attr,
  3472. const char *buf, size_t count)
  3473. {
  3474. int fs_ready = 0;
  3475. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3476. if (sscanf(buf, "%du", &fs_ready) != 1)
  3477. return -EINVAL;
  3478. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3479. fs_ready, count);
  3480. if (!plat_priv) {
  3481. cnss_pr_err("plat_priv is NULL\n");
  3482. return count;
  3483. }
  3484. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3485. cnss_pr_dbg("QMI is bypassed\n");
  3486. return count;
  3487. }
  3488. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3489. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3490. cnss_driver_event_post(plat_priv,
  3491. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3492. 0, NULL);
  3493. }
  3494. return count;
  3495. }
  3496. static ssize_t qdss_trace_start_store(struct device *dev,
  3497. struct device_attribute *attr,
  3498. const char *buf, size_t count)
  3499. {
  3500. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3501. wlfw_qdss_trace_start(plat_priv);
  3502. cnss_pr_dbg("Received QDSS start command\n");
  3503. return count;
  3504. }
  3505. static ssize_t qdss_trace_stop_store(struct device *dev,
  3506. struct device_attribute *attr,
  3507. const char *buf, size_t count)
  3508. {
  3509. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3510. u32 option = 0;
  3511. if (sscanf(buf, "%du", &option) != 1)
  3512. return -EINVAL;
  3513. wlfw_qdss_trace_stop(plat_priv, option);
  3514. cnss_pr_dbg("Received QDSS stop command\n");
  3515. return count;
  3516. }
  3517. static ssize_t qdss_conf_download_store(struct device *dev,
  3518. struct device_attribute *attr,
  3519. const char *buf, size_t count)
  3520. {
  3521. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3522. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3523. cnss_pr_dbg("Received QDSS download config command\n");
  3524. return count;
  3525. }
  3526. static ssize_t hw_trace_override_store(struct device *dev,
  3527. struct device_attribute *attr,
  3528. const char *buf, size_t count)
  3529. {
  3530. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3531. int tmp = 0;
  3532. if (sscanf(buf, "%du", &tmp) != 1)
  3533. return -EINVAL;
  3534. plat_priv->hw_trc_override = tmp;
  3535. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3536. return count;
  3537. }
  3538. static ssize_t charger_mode_store(struct device *dev,
  3539. struct device_attribute *attr,
  3540. const char *buf, size_t count)
  3541. {
  3542. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3543. int tmp = 0;
  3544. if (sscanf(buf, "%du", &tmp) != 1)
  3545. return -EINVAL;
  3546. plat_priv->charger_mode = tmp;
  3547. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3548. return count;
  3549. }
  3550. static DEVICE_ATTR_WO(fs_ready);
  3551. static DEVICE_ATTR_WO(shutdown);
  3552. static DEVICE_ATTR_RW(recovery);
  3553. static DEVICE_ATTR_WO(enable_hds);
  3554. static DEVICE_ATTR_WO(qdss_trace_start);
  3555. static DEVICE_ATTR_WO(qdss_trace_stop);
  3556. static DEVICE_ATTR_WO(qdss_conf_download);
  3557. static DEVICE_ATTR_WO(hw_trace_override);
  3558. static DEVICE_ATTR_WO(charger_mode);
  3559. static DEVICE_ATTR_RW(time_sync_period);
  3560. static struct attribute *cnss_attrs[] = {
  3561. &dev_attr_fs_ready.attr,
  3562. &dev_attr_shutdown.attr,
  3563. &dev_attr_recovery.attr,
  3564. &dev_attr_enable_hds.attr,
  3565. &dev_attr_qdss_trace_start.attr,
  3566. &dev_attr_qdss_trace_stop.attr,
  3567. &dev_attr_qdss_conf_download.attr,
  3568. &dev_attr_hw_trace_override.attr,
  3569. &dev_attr_charger_mode.attr,
  3570. &dev_attr_time_sync_period.attr,
  3571. NULL,
  3572. };
  3573. static struct attribute_group cnss_attr_group = {
  3574. .attrs = cnss_attrs,
  3575. };
  3576. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3577. {
  3578. struct device *dev = &plat_priv->plat_dev->dev;
  3579. int ret;
  3580. char cnss_name[CNSS_FS_NAME_SIZE];
  3581. char shutdown_name[32];
  3582. if (cnss_is_dual_wlan_enabled()) {
  3583. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3584. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3585. snprintf(shutdown_name, sizeof(shutdown_name),
  3586. "shutdown_wlan_%d", plat_priv->plat_idx);
  3587. } else {
  3588. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3589. snprintf(shutdown_name, sizeof(shutdown_name),
  3590. "shutdown_wlan");
  3591. }
  3592. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3593. if (ret) {
  3594. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3595. ret);
  3596. goto out;
  3597. }
  3598. /* This is only for backward compatibility. */
  3599. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3600. if (ret) {
  3601. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3602. ret);
  3603. goto rm_cnss_link;
  3604. }
  3605. return 0;
  3606. rm_cnss_link:
  3607. sysfs_remove_link(kernel_kobj, cnss_name);
  3608. out:
  3609. return ret;
  3610. }
  3611. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3612. {
  3613. char cnss_name[CNSS_FS_NAME_SIZE];
  3614. char shutdown_name[32];
  3615. if (cnss_is_dual_wlan_enabled()) {
  3616. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3617. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3618. snprintf(shutdown_name, sizeof(shutdown_name),
  3619. "shutdown_wlan_%d", plat_priv->plat_idx);
  3620. } else {
  3621. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3622. snprintf(shutdown_name, sizeof(shutdown_name),
  3623. "shutdown_wlan");
  3624. }
  3625. sysfs_remove_link(kernel_kobj, shutdown_name);
  3626. sysfs_remove_link(kernel_kobj, cnss_name);
  3627. }
  3628. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3629. {
  3630. int ret = 0;
  3631. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3632. &cnss_attr_group);
  3633. if (ret) {
  3634. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3635. ret);
  3636. goto out;
  3637. }
  3638. cnss_create_sysfs_link(plat_priv);
  3639. return 0;
  3640. out:
  3641. return ret;
  3642. }
  3643. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3644. union cnss_device_group_devres {
  3645. const struct attribute_group *group;
  3646. };
  3647. static void devm_cnss_group_remove(struct device *dev, void *res)
  3648. {
  3649. union cnss_device_group_devres *devres = res;
  3650. const struct attribute_group *group = devres->group;
  3651. cnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3652. sysfs_remove_group(&dev->kobj, group);
  3653. }
  3654. static int devm_cnss_group_match(struct device *dev, void *res, void *data)
  3655. {
  3656. return ((union cnss_device_group_devres *)res) == data;
  3657. }
  3658. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3659. {
  3660. cnss_remove_sysfs_link(plat_priv);
  3661. WARN_ON(devres_release(&plat_priv->plat_dev->dev,
  3662. devm_cnss_group_remove, devm_cnss_group_match,
  3663. (void *)&cnss_attr_group));
  3664. }
  3665. #else
  3666. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3667. {
  3668. cnss_remove_sysfs_link(plat_priv);
  3669. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3670. }
  3671. #endif
  3672. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3673. {
  3674. spin_lock_init(&plat_priv->event_lock);
  3675. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3676. WQ_UNBOUND, 1);
  3677. if (!plat_priv->event_wq) {
  3678. cnss_pr_err("Failed to create event workqueue!\n");
  3679. return -EFAULT;
  3680. }
  3681. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3682. INIT_LIST_HEAD(&plat_priv->event_list);
  3683. return 0;
  3684. }
  3685. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3686. {
  3687. destroy_workqueue(plat_priv->event_wq);
  3688. }
  3689. static int cnss_reboot_notifier(struct notifier_block *nb,
  3690. unsigned long action,
  3691. void *data)
  3692. {
  3693. struct cnss_plat_data *plat_priv =
  3694. container_of(nb, struct cnss_plat_data, reboot_nb);
  3695. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3696. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3697. del_timer(&plat_priv->fw_boot_timer);
  3698. complete_all(&plat_priv->power_up_complete);
  3699. complete_all(&plat_priv->cal_complete);
  3700. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3701. return NOTIFY_DONE;
  3702. }
  3703. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3704. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  3705. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3706. {
  3707. uint32_t *peripheralStateInfo = NULL;
  3708. size_t size = 0;
  3709. /* Once this flag is set, secure peripheral feature
  3710. * will not be supported till next reboot
  3711. */
  3712. if (plat_priv->sec_peri_feature_disable)
  3713. return 0;
  3714. peripheralStateInfo = qcom_smem_get(QCOM_SMEM_HOST_ANY, PERISEC_SMEM_ID, &size);
  3715. if (IS_ERR_OR_NULL(peripheralStateInfo)) {
  3716. if (PTR_ERR(peripheralStateInfo) != -ENOENT)
  3717. CNSS_ASSERT(0);
  3718. cnss_pr_dbg("Secure HW feature not enabled. ret = %d\n",
  3719. PTR_ERR(peripheralStateInfo));
  3720. plat_priv->sec_peri_feature_disable = true;
  3721. return 0;
  3722. }
  3723. cnss_pr_dbg("Secure HW state: %d\n", *peripheralStateInfo);
  3724. if ((*peripheralStateInfo >> (HW_WIFI_UID - 0x500)) & 0x1)
  3725. set_bit(CNSS_WLAN_HW_DISABLED,
  3726. &plat_priv->driver_state);
  3727. else
  3728. clear_bit(CNSS_WLAN_HW_DISABLED,
  3729. &plat_priv->driver_state);
  3730. return 0;
  3731. }
  3732. #else
  3733. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3734. {
  3735. struct Object client_env;
  3736. struct Object app_object;
  3737. u32 wifi_uid = HW_WIFI_UID;
  3738. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3739. int ret;
  3740. u8 state = 0;
  3741. /* Once this flag is set, secure peripheral feature
  3742. * will not be supported till next reboot
  3743. */
  3744. if (plat_priv->sec_peri_feature_disable)
  3745. return 0;
  3746. /* get rootObj */
  3747. ret = get_client_env_object(&client_env);
  3748. if (ret) {
  3749. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3750. goto end;
  3751. }
  3752. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3753. if (ret) {
  3754. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3755. if (ret == FEATURE_NOT_SUPPORTED) {
  3756. ret = 0; /* Do not Assert */
  3757. plat_priv->sec_peri_feature_disable = true;
  3758. cnss_pr_dbg("Secure HW feature not supported\n");
  3759. }
  3760. goto exit_release_clientenv;
  3761. }
  3762. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3763. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3764. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3765. ObjectCounts_pack(1, 1, 0, 0));
  3766. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3767. if (ret) {
  3768. if (ret == PERIPHERAL_NOT_FOUND) {
  3769. ret = 0; /* Do not Assert */
  3770. plat_priv->sec_peri_feature_disable = true;
  3771. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3772. }
  3773. goto exit_release_app_obj;
  3774. }
  3775. if (state == 1)
  3776. set_bit(CNSS_WLAN_HW_DISABLED,
  3777. &plat_priv->driver_state);
  3778. else
  3779. clear_bit(CNSS_WLAN_HW_DISABLED,
  3780. &plat_priv->driver_state);
  3781. exit_release_app_obj:
  3782. Object_release(app_object);
  3783. exit_release_clientenv:
  3784. Object_release(client_env);
  3785. end:
  3786. if (ret) {
  3787. cnss_pr_err("Unable to get HW disable status\n");
  3788. CNSS_ASSERT(0);
  3789. }
  3790. return ret;
  3791. }
  3792. #endif
  3793. #else
  3794. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3795. {
  3796. return 0;
  3797. }
  3798. #endif
  3799. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3800. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3801. {
  3802. }
  3803. #else
  3804. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3805. {
  3806. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3807. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3808. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3809. }
  3810. #endif
  3811. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3812. static void cnss_initialize_mem_pool(unsigned long device_id)
  3813. {
  3814. cnss_initialize_prealloc_pool(device_id);
  3815. }
  3816. static void cnss_deinitialize_mem_pool(void)
  3817. {
  3818. cnss_deinitialize_prealloc_pool();
  3819. }
  3820. #else
  3821. static void cnss_initialize_mem_pool(unsigned long device_id)
  3822. {
  3823. }
  3824. static void cnss_deinitialize_mem_pool(void)
  3825. {
  3826. }
  3827. #endif
  3828. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3829. {
  3830. int ret;
  3831. ret = cnss_init_sol_gpio(plat_priv);
  3832. if (ret)
  3833. return ret;
  3834. timer_setup(&plat_priv->fw_boot_timer,
  3835. cnss_bus_fw_boot_timeout_hdlr, 0);
  3836. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3837. if (ret)
  3838. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3839. ret);
  3840. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3841. init_completion(&plat_priv->power_up_complete);
  3842. init_completion(&plat_priv->cal_complete);
  3843. init_completion(&plat_priv->rddm_complete);
  3844. init_completion(&plat_priv->recovery_complete);
  3845. init_completion(&plat_priv->daemon_connected);
  3846. mutex_init(&plat_priv->dev_lock);
  3847. mutex_init(&plat_priv->driver_ops_lock);
  3848. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3849. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3850. if (ret)
  3851. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3852. ret);
  3853. plat_priv->recovery_ws =
  3854. wakeup_source_register(&plat_priv->plat_dev->dev,
  3855. "CNSS_FW_RECOVERY");
  3856. if (!plat_priv->recovery_ws)
  3857. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3858. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3859. cnss_daemon_connection_update_cb,
  3860. plat_priv);
  3861. if (ret)
  3862. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3863. ret);
  3864. cnss_sram_dump_init(plat_priv);
  3865. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3866. "qcom,rc-ep-short-channel"))
  3867. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3868. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3869. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  3870. return 0;
  3871. }
  3872. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3873. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3874. {
  3875. }
  3876. #else
  3877. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3878. {
  3879. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3880. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3881. kfree(plat_priv->sram_dump);
  3882. }
  3883. #endif
  3884. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3885. {
  3886. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3887. plat_priv);
  3888. complete_all(&plat_priv->recovery_complete);
  3889. complete_all(&plat_priv->rddm_complete);
  3890. complete_all(&plat_priv->cal_complete);
  3891. complete_all(&plat_priv->power_up_complete);
  3892. complete_all(&plat_priv->daemon_connected);
  3893. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3894. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3895. del_timer(&plat_priv->fw_boot_timer);
  3896. wakeup_source_unregister(plat_priv->recovery_ws);
  3897. cnss_deinit_sol_gpio(plat_priv);
  3898. cnss_sram_dump_deinit(plat_priv);
  3899. kfree(plat_priv->on_chip_pmic_board_ids);
  3900. }
  3901. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  3902. {
  3903. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3904. CNSS_TIME_SYNC_PERIOD_INVALID;
  3905. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3906. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3907. }
  3908. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3909. {
  3910. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3911. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3912. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3913. "qcom,wlan-cbc-enabled");
  3914. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3915. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3916. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3917. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3918. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3919. cnss_init_time_sync_period_default(plat_priv);
  3920. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3921. * enabled by default
  3922. */
  3923. plat_priv->adsp_pc_enabled = true;
  3924. }
  3925. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3926. {
  3927. struct device *dev = &plat_priv->plat_dev->dev;
  3928. plat_priv->use_pm_domain =
  3929. of_property_read_bool(dev->of_node, "use-pm-domain");
  3930. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3931. }
  3932. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3933. {
  3934. struct device *dev = &plat_priv->plat_dev->dev;
  3935. plat_priv->set_wlaon_pwr_ctrl =
  3936. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3937. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3938. plat_priv->set_wlaon_pwr_ctrl);
  3939. }
  3940. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3941. {
  3942. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3943. "qcom,converged-dt") ||
  3944. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3945. "qcom,same-dt-multi-dev") ||
  3946. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3947. "qcom,multi-wlan-exchg"));
  3948. }
  3949. static const struct platform_device_id cnss_platform_id_table[] = {
  3950. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3951. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3952. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3953. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3954. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3955. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3956. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3957. { .name = "qcaconv", .driver_data = 0, },
  3958. { },
  3959. };
  3960. static const struct of_device_id cnss_of_match_table[] = {
  3961. {
  3962. .compatible = "qcom,cnss",
  3963. .data = (void *)&cnss_platform_id_table[0]},
  3964. {
  3965. .compatible = "qcom,cnss-qca6290",
  3966. .data = (void *)&cnss_platform_id_table[1]},
  3967. {
  3968. .compatible = "qcom,cnss-qca6390",
  3969. .data = (void *)&cnss_platform_id_table[2]},
  3970. {
  3971. .compatible = "qcom,cnss-qca6490",
  3972. .data = (void *)&cnss_platform_id_table[3]},
  3973. {
  3974. .compatible = "qcom,cnss-kiwi",
  3975. .data = (void *)&cnss_platform_id_table[4]},
  3976. {
  3977. .compatible = "qcom,cnss-mango",
  3978. .data = (void *)&cnss_platform_id_table[5]},
  3979. {
  3980. .compatible = "qcom,cnss-peach",
  3981. .data = (void *)&cnss_platform_id_table[6]},
  3982. {
  3983. .compatible = "qcom,cnss-qca-converged",
  3984. .data = (void *)&cnss_platform_id_table[7]},
  3985. { },
  3986. };
  3987. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3988. static inline bool
  3989. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3990. {
  3991. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3992. "use-nv-mac");
  3993. }
  3994. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3995. {
  3996. struct device_node *child;
  3997. u32 id, i;
  3998. int id_n, device_identifier_gpio, ret;
  3999. u8 gpio_value;
  4000. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  4001. return 0;
  4002. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  4003. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  4004. if (ret) {
  4005. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  4006. return ret;
  4007. }
  4008. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  4009. gpio_value = gpio_get_value(device_identifier_gpio);
  4010. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  4011. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  4012. child) {
  4013. if (strcmp(child->name, "chip_cfg"))
  4014. continue;
  4015. id_n = of_property_count_u32_elems(child, "supported-ids");
  4016. if (id_n <= 0) {
  4017. cnss_pr_err("Device id is NOT set\n");
  4018. return -EINVAL;
  4019. }
  4020. for (i = 0; i < id_n; i++) {
  4021. ret = of_property_read_u32_index(child,
  4022. "supported-ids",
  4023. i, &id);
  4024. if (ret) {
  4025. cnss_pr_err("Failed to read supported ids\n");
  4026. return -EINVAL;
  4027. }
  4028. if (gpio_value && id == QCA6490_DEVICE_ID) {
  4029. plat_priv->plat_dev->dev.of_node = child;
  4030. plat_priv->device_id = QCA6490_DEVICE_ID;
  4031. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  4032. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4033. child->name, i, id);
  4034. return 0;
  4035. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  4036. plat_priv->plat_dev->dev.of_node = child;
  4037. plat_priv->device_id = KIWI_DEVICE_ID;
  4038. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  4039. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4040. child->name, i, id);
  4041. return 0;
  4042. }
  4043. }
  4044. }
  4045. return -EINVAL;
  4046. }
  4047. static inline u32
  4048. cnss_dt_type(struct cnss_plat_data *plat_priv)
  4049. {
  4050. bool is_converged_dt = of_property_read_bool(
  4051. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  4052. bool is_multi_wlan_xchg;
  4053. if (is_converged_dt)
  4054. return CNSS_DTT_CONVERGED;
  4055. is_multi_wlan_xchg = of_property_read_bool(
  4056. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  4057. if (is_multi_wlan_xchg)
  4058. return CNSS_DTT_MULTIEXCHG;
  4059. return CNSS_DTT_LEGACY;
  4060. }
  4061. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  4062. {
  4063. int ret = 0;
  4064. int retry = 0;
  4065. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  4066. return 0;
  4067. retry:
  4068. ret = cnss_power_on_device(plat_priv, true);
  4069. if (ret)
  4070. goto end;
  4071. ret = cnss_bus_init(plat_priv);
  4072. if (ret) {
  4073. if ((ret != -EPROBE_DEFER) &&
  4074. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  4075. cnss_power_off_device(plat_priv);
  4076. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  4077. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4078. goto retry;
  4079. }
  4080. goto power_off;
  4081. }
  4082. return 0;
  4083. power_off:
  4084. cnss_power_off_device(plat_priv);
  4085. end:
  4086. return ret;
  4087. }
  4088. int cnss_wlan_hw_enable(void)
  4089. {
  4090. struct cnss_plat_data *plat_priv;
  4091. int ret = 0;
  4092. if (cnss_is_dual_wlan_enabled())
  4093. plat_priv = cnss_get_first_plat_priv(NULL);
  4094. else
  4095. plat_priv = cnss_get_plat_priv(NULL);
  4096. if (!plat_priv)
  4097. return -ENODEV;
  4098. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4099. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4100. goto register_driver;
  4101. ret = cnss_wlan_device_init(plat_priv);
  4102. if (ret) {
  4103. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4104. CNSS_ASSERT(0);
  4105. return ret;
  4106. }
  4107. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4108. cnss_driver_event_post(plat_priv,
  4109. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4110. 0, NULL);
  4111. register_driver:
  4112. if (plat_priv->driver_ops)
  4113. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4114. return ret;
  4115. }
  4116. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4117. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4118. {
  4119. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4120. int ret = 0;
  4121. if (!plat_priv)
  4122. return -ENODEV;
  4123. /* If IMS server is connected, return success without QMI send */
  4124. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4125. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4126. return ret;
  4127. }
  4128. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4129. return ret;
  4130. }
  4131. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4132. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4133. unsigned long *thermal_state)
  4134. {
  4135. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4136. if (!tcdev || !tcdev->devdata) {
  4137. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4138. return -EINVAL;
  4139. }
  4140. cnss_tcdev = tcdev->devdata;
  4141. *thermal_state = cnss_tcdev->max_thermal_state;
  4142. return 0;
  4143. }
  4144. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4145. unsigned long *thermal_state)
  4146. {
  4147. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4148. if (!tcdev || !tcdev->devdata) {
  4149. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4150. return -EINVAL;
  4151. }
  4152. cnss_tcdev = tcdev->devdata;
  4153. *thermal_state = cnss_tcdev->curr_thermal_state;
  4154. return 0;
  4155. }
  4156. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4157. unsigned long thermal_state)
  4158. {
  4159. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4160. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4161. int ret = 0;
  4162. if (!tcdev || !tcdev->devdata) {
  4163. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4164. return -EINVAL;
  4165. }
  4166. cnss_tcdev = tcdev->devdata;
  4167. if (thermal_state > cnss_tcdev->max_thermal_state)
  4168. return -EINVAL;
  4169. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4170. thermal_state, cnss_tcdev->tcdev_id);
  4171. mutex_lock(&plat_priv->tcdev_lock);
  4172. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4173. thermal_state,
  4174. cnss_tcdev->tcdev_id);
  4175. if (!ret)
  4176. cnss_tcdev->curr_thermal_state = thermal_state;
  4177. mutex_unlock(&plat_priv->tcdev_lock);
  4178. if (ret) {
  4179. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4180. ret, cnss_tcdev->tcdev_id);
  4181. return ret;
  4182. }
  4183. return 0;
  4184. }
  4185. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4186. .get_max_state = cnss_tcdev_get_max_state,
  4187. .get_cur_state = cnss_tcdev_get_cur_state,
  4188. .set_cur_state = cnss_tcdev_set_cur_state,
  4189. };
  4190. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4191. int tcdev_id)
  4192. {
  4193. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4194. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4195. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4196. struct device_node *dev_node;
  4197. int ret = 0;
  4198. if (!priv) {
  4199. cnss_pr_err("Platform driver is not initialized!\n");
  4200. return -ENODEV;
  4201. }
  4202. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4203. if (!cnss_tcdev) {
  4204. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4205. return -ENOMEM;
  4206. }
  4207. cnss_tcdev->tcdev_id = tcdev_id;
  4208. cnss_tcdev->max_thermal_state = max_state;
  4209. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4210. "qcom,cnss_cdev%d", tcdev_id);
  4211. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4212. if (!dev_node) {
  4213. cnss_pr_err("Failed to get cooling device node\n");
  4214. kfree(cnss_tcdev);
  4215. return -EINVAL;
  4216. }
  4217. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4218. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4219. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4220. cdev_node_name,
  4221. cnss_tcdev,
  4222. &cnss_cooling_ops);
  4223. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4224. ret = PTR_ERR(cnss_tcdev->tcdev);
  4225. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4226. ret, cnss_tcdev->tcdev_id);
  4227. kfree(cnss_tcdev);
  4228. } else {
  4229. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4230. cnss_tcdev->tcdev_id);
  4231. mutex_lock(&priv->tcdev_lock);
  4232. list_add(&cnss_tcdev->tcdev_list,
  4233. &priv->cnss_tcdev_list);
  4234. mutex_unlock(&priv->tcdev_lock);
  4235. }
  4236. } else {
  4237. cnss_pr_dbg("Cooling device registration not supported");
  4238. kfree(cnss_tcdev);
  4239. ret = -EOPNOTSUPP;
  4240. }
  4241. return ret;
  4242. }
  4243. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4244. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4245. {
  4246. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4247. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4248. if (!priv) {
  4249. cnss_pr_err("Platform driver is not initialized!\n");
  4250. return;
  4251. }
  4252. mutex_lock(&priv->tcdev_lock);
  4253. while (!list_empty(&priv->cnss_tcdev_list)) {
  4254. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4255. struct cnss_thermal_cdev,
  4256. tcdev_list);
  4257. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4258. list_del(&cnss_tcdev->tcdev_list);
  4259. kfree(cnss_tcdev);
  4260. }
  4261. mutex_unlock(&priv->tcdev_lock);
  4262. }
  4263. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4264. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4265. unsigned long *thermal_state,
  4266. int tcdev_id)
  4267. {
  4268. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4269. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4270. if (!priv) {
  4271. cnss_pr_err("Platform driver is not initialized!\n");
  4272. return -ENODEV;
  4273. }
  4274. mutex_lock(&priv->tcdev_lock);
  4275. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4276. if (cnss_tcdev->tcdev_id != tcdev_id)
  4277. continue;
  4278. *thermal_state = cnss_tcdev->curr_thermal_state;
  4279. mutex_unlock(&priv->tcdev_lock);
  4280. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4281. cnss_tcdev->curr_thermal_state, tcdev_id);
  4282. return 0;
  4283. }
  4284. mutex_unlock(&priv->tcdev_lock);
  4285. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4286. return -EINVAL;
  4287. }
  4288. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4289. static int cnss_probe(struct platform_device *plat_dev)
  4290. {
  4291. int ret = 0;
  4292. struct cnss_plat_data *plat_priv;
  4293. const struct of_device_id *of_id;
  4294. const struct platform_device_id *device_id;
  4295. if (cnss_get_plat_priv(plat_dev)) {
  4296. cnss_pr_err("Driver is already initialized!\n");
  4297. ret = -EEXIST;
  4298. goto out;
  4299. }
  4300. ret = cnss_plat_env_available();
  4301. if (ret)
  4302. goto out;
  4303. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4304. if (!of_id || !of_id->data) {
  4305. cnss_pr_err("Failed to find of match device!\n");
  4306. ret = -ENODEV;
  4307. goto out;
  4308. }
  4309. device_id = of_id->data;
  4310. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4311. GFP_KERNEL);
  4312. if (!plat_priv) {
  4313. ret = -ENOMEM;
  4314. goto out;
  4315. }
  4316. plat_priv->plat_dev = plat_dev;
  4317. plat_priv->dev_node = NULL;
  4318. plat_priv->device_id = device_id->driver_data;
  4319. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4320. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4321. plat_priv->dt_type);
  4322. plat_priv->use_fw_path_with_prefix =
  4323. cnss_use_fw_path_with_prefix(plat_priv);
  4324. ret = cnss_get_dev_cfg_node(plat_priv);
  4325. if (ret) {
  4326. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4327. goto reset_plat_dev;
  4328. }
  4329. cnss_initialize_mem_pool(plat_priv->device_id);
  4330. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4331. if (ret)
  4332. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4333. ret);
  4334. ret = cnss_get_rc_num(plat_priv);
  4335. if (ret)
  4336. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4337. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4338. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4339. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4340. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4341. cnss_set_plat_priv(plat_dev, plat_priv);
  4342. cnss_set_device_name(plat_priv);
  4343. platform_set_drvdata(plat_dev, plat_priv);
  4344. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4345. INIT_LIST_HEAD(&plat_priv->clk_list);
  4346. cnss_get_pm_domain_info(plat_priv);
  4347. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4348. cnss_power_misc_params_init(plat_priv);
  4349. cnss_get_tcs_info(plat_priv);
  4350. cnss_get_cpr_info(plat_priv);
  4351. cnss_aop_interface_init(plat_priv);
  4352. cnss_init_control_params(plat_priv);
  4353. ret = cnss_get_resources(plat_priv);
  4354. if (ret)
  4355. goto reset_ctx;
  4356. ret = cnss_register_esoc(plat_priv);
  4357. if (ret)
  4358. goto free_res;
  4359. ret = cnss_register_bus_scale(plat_priv);
  4360. if (ret)
  4361. goto unreg_esoc;
  4362. ret = cnss_create_sysfs(plat_priv);
  4363. if (ret)
  4364. goto unreg_bus_scale;
  4365. ret = cnss_event_work_init(plat_priv);
  4366. if (ret)
  4367. goto remove_sysfs;
  4368. ret = cnss_dms_init(plat_priv);
  4369. if (ret)
  4370. goto deinit_event_work;
  4371. ret = cnss_debugfs_create(plat_priv);
  4372. if (ret)
  4373. goto deinit_dms;
  4374. ret = cnss_misc_init(plat_priv);
  4375. if (ret)
  4376. goto destroy_debugfs;
  4377. ret = cnss_wlan_hw_disable_check(plat_priv);
  4378. if (ret)
  4379. goto deinit_misc;
  4380. /* Make sure all platform related init are done before
  4381. * device power on and bus init.
  4382. */
  4383. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4384. ret = cnss_wlan_device_init(plat_priv);
  4385. if (ret)
  4386. goto deinit_misc;
  4387. } else {
  4388. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4389. }
  4390. cnss_register_coex_service(plat_priv);
  4391. cnss_register_ims_service(plat_priv);
  4392. mutex_init(&plat_priv->tcdev_lock);
  4393. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4394. cnss_pr_info("Platform driver probed successfully.\n");
  4395. return 0;
  4396. deinit_misc:
  4397. cnss_misc_deinit(plat_priv);
  4398. destroy_debugfs:
  4399. cnss_debugfs_destroy(plat_priv);
  4400. deinit_dms:
  4401. cnss_dms_deinit(plat_priv);
  4402. deinit_event_work:
  4403. cnss_event_work_deinit(plat_priv);
  4404. remove_sysfs:
  4405. cnss_remove_sysfs(plat_priv);
  4406. unreg_bus_scale:
  4407. cnss_unregister_bus_scale(plat_priv);
  4408. unreg_esoc:
  4409. cnss_unregister_esoc(plat_priv);
  4410. free_res:
  4411. cnss_put_resources(plat_priv);
  4412. reset_ctx:
  4413. cnss_aop_interface_deinit(plat_priv);
  4414. platform_set_drvdata(plat_dev, NULL);
  4415. cnss_deinitialize_mem_pool();
  4416. reset_plat_dev:
  4417. cnss_clear_plat_priv(plat_priv);
  4418. out:
  4419. return ret;
  4420. }
  4421. static int cnss_remove(struct platform_device *plat_dev)
  4422. {
  4423. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4424. plat_priv->audio_iommu_domain = NULL;
  4425. cnss_genl_exit();
  4426. cnss_unregister_ims_service(plat_priv);
  4427. cnss_unregister_coex_service(plat_priv);
  4428. cnss_bus_deinit(plat_priv);
  4429. cnss_misc_deinit(plat_priv);
  4430. cnss_debugfs_destroy(plat_priv);
  4431. cnss_dms_deinit(plat_priv);
  4432. cnss_qmi_deinit(plat_priv);
  4433. cnss_event_work_deinit(plat_priv);
  4434. cnss_cancel_dms_work();
  4435. cnss_remove_sysfs(plat_priv);
  4436. cnss_unregister_bus_scale(plat_priv);
  4437. cnss_unregister_esoc(plat_priv);
  4438. cnss_put_resources(plat_priv);
  4439. cnss_aop_interface_deinit(plat_priv);
  4440. cnss_deinitialize_mem_pool();
  4441. platform_set_drvdata(plat_dev, NULL);
  4442. cnss_clear_plat_priv(plat_priv);
  4443. return 0;
  4444. }
  4445. static struct platform_driver cnss_platform_driver = {
  4446. .probe = cnss_probe,
  4447. .remove = cnss_remove,
  4448. .driver = {
  4449. .name = "cnss2",
  4450. .of_match_table = cnss_of_match_table,
  4451. #ifdef CONFIG_CNSS_ASYNC
  4452. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4453. #endif
  4454. },
  4455. };
  4456. static bool cnss_check_compatible_node(void)
  4457. {
  4458. struct device_node *dn = NULL;
  4459. for_each_matching_node(dn, cnss_of_match_table) {
  4460. if (of_device_is_available(dn)) {
  4461. cnss_allow_driver_loading = true;
  4462. return true;
  4463. }
  4464. }
  4465. return false;
  4466. }
  4467. /**
  4468. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4469. *
  4470. * Valid device tree node means a node with "compatible" property from the
  4471. * device match table and "status" property is not disabled.
  4472. *
  4473. * Return: true if valid device tree node found, false if not found
  4474. */
  4475. static bool cnss_is_valid_dt_node_found(void)
  4476. {
  4477. struct device_node *dn = NULL;
  4478. for_each_matching_node(dn, cnss_of_match_table) {
  4479. if (of_device_is_available(dn))
  4480. break;
  4481. }
  4482. if (dn)
  4483. return true;
  4484. return false;
  4485. }
  4486. static int __init cnss_initialize(void)
  4487. {
  4488. int ret = 0;
  4489. if (!cnss_is_valid_dt_node_found())
  4490. return -ENODEV;
  4491. if (!cnss_check_compatible_node())
  4492. return ret;
  4493. cnss_debug_init();
  4494. ret = platform_driver_register(&cnss_platform_driver);
  4495. if (ret)
  4496. cnss_debug_deinit();
  4497. ret = cnss_genl_init();
  4498. if (ret < 0)
  4499. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4500. return ret;
  4501. }
  4502. static void __exit cnss_exit(void)
  4503. {
  4504. cnss_genl_exit();
  4505. platform_driver_unregister(&cnss_platform_driver);
  4506. cnss_debug_deinit();
  4507. }
  4508. module_init(cnss_initialize);
  4509. module_exit(cnss_exit);
  4510. MODULE_LICENSE("GPL v2");
  4511. MODULE_DESCRIPTION("CNSS2 Platform Driver");