4b855f97af
Add hw headers for wkk monitor Change-Id: I832e55c1e222a28e97aa98f10819bb7208d91a16 CRs-Fixed: 3125978
105 lignes
4.1 KiB
C
105 lignes
4.1 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _TXPCU_BUFFER_STATUS_H_
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#define _TXPCU_BUFFER_STATUS_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "txpcu_buffer_basics.h"
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#define NUM_OF_DWORDS_TXPCU_BUFFER_STATUS 2
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#define NUM_OF_QWORDS_TXPCU_BUFFER_STATUS 1
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struct txpcu_buffer_status {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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struct txpcu_buffer_basics txpcu_basix_buffer_info;
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uint32_t reserved : 15,
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msdu_end : 1,
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tx_data_sync_value : 16;
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#else
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struct txpcu_buffer_basics txpcu_basix_buffer_info;
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uint32_t tx_data_sync_value : 16,
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msdu_end : 1,
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reserved : 15;
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#endif
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};
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_OFFSET 0x0000000000000000
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_LSB 0
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_MSB 7
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_MASK 0x00000000000000ff
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_OFFSET 0x0000000000000000
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_LSB 8
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MSB 15
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MASK 0x000000000000ff00
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_OFFSET 0x0000000000000000
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_LSB 16
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_MSB 31
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#define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_MASK 0x00000000ffff0000
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#define TXPCU_BUFFER_STATUS_RESERVED_OFFSET 0x0000000000000000
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#define TXPCU_BUFFER_STATUS_RESERVED_LSB 32
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#define TXPCU_BUFFER_STATUS_RESERVED_MSB 46
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#define TXPCU_BUFFER_STATUS_RESERVED_MASK 0x00007fff00000000
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#define TXPCU_BUFFER_STATUS_MSDU_END_OFFSET 0x0000000000000000
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#define TXPCU_BUFFER_STATUS_MSDU_END_LSB 47
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#define TXPCU_BUFFER_STATUS_MSDU_END_MSB 47
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#define TXPCU_BUFFER_STATUS_MSDU_END_MASK 0x0000800000000000
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#define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_OFFSET 0x0000000000000000
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#define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_LSB 48
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#define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MSB 63
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#define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MASK 0xffff000000000000
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#endif
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