mon_buffer_addr.h 4.7 KB

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  1. /*
  2. * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
  3. * SPDX-License-Identifier: ISC
  4. */
  5. #ifndef _MON_BUFFER_ADDR_H_
  6. #define _MON_BUFFER_ADDR_H_
  7. #if !defined(__ASSEMBLER__)
  8. #endif
  9. #define NUM_OF_DWORDS_MON_BUFFER_ADDR 4
  10. #define NUM_OF_QWORDS_MON_BUFFER_ADDR 2
  11. struct mon_buffer_addr {
  12. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  13. uint32_t buffer_virt_addr_31_0 : 32;
  14. uint32_t buffer_virt_addr_63_32 : 32;
  15. uint32_t dma_length : 12,
  16. reserved_2a : 4,
  17. msdu_continuation : 1,
  18. truncated : 1,
  19. reserved_2b : 14;
  20. uint32_t tlv64_padding : 32;
  21. #else
  22. uint32_t buffer_virt_addr_31_0 : 32;
  23. uint32_t buffer_virt_addr_63_32 : 32;
  24. uint32_t reserved_2b : 14,
  25. truncated : 1,
  26. msdu_continuation : 1,
  27. reserved_2a : 4,
  28. dma_length : 12;
  29. uint32_t tlv64_padding : 32;
  30. #endif
  31. };
  32. #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_31_0_OFFSET 0x0000000000000000
  33. #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_31_0_LSB 0
  34. #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_31_0_MSB 31
  35. #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_31_0_MASK 0x00000000ffffffff
  36. #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_63_32_OFFSET 0x0000000000000000
  37. #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_63_32_LSB 32
  38. #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_63_32_MSB 63
  39. #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_63_32_MASK 0xffffffff00000000
  40. #define MON_BUFFER_ADDR_DMA_LENGTH_OFFSET 0x0000000000000008
  41. #define MON_BUFFER_ADDR_DMA_LENGTH_LSB 0
  42. #define MON_BUFFER_ADDR_DMA_LENGTH_MSB 11
  43. #define MON_BUFFER_ADDR_DMA_LENGTH_MASK 0x0000000000000fff
  44. #define MON_BUFFER_ADDR_RESERVED_2A_OFFSET 0x0000000000000008
  45. #define MON_BUFFER_ADDR_RESERVED_2A_LSB 12
  46. #define MON_BUFFER_ADDR_RESERVED_2A_MSB 15
  47. #define MON_BUFFER_ADDR_RESERVED_2A_MASK 0x000000000000f000
  48. #define MON_BUFFER_ADDR_MSDU_CONTINUATION_OFFSET 0x0000000000000008
  49. #define MON_BUFFER_ADDR_MSDU_CONTINUATION_LSB 16
  50. #define MON_BUFFER_ADDR_MSDU_CONTINUATION_MSB 16
  51. #define MON_BUFFER_ADDR_MSDU_CONTINUATION_MASK 0x0000000000010000
  52. #define MON_BUFFER_ADDR_TRUNCATED_OFFSET 0x0000000000000008
  53. #define MON_BUFFER_ADDR_TRUNCATED_LSB 17
  54. #define MON_BUFFER_ADDR_TRUNCATED_MSB 17
  55. #define MON_BUFFER_ADDR_TRUNCATED_MASK 0x0000000000020000
  56. #define MON_BUFFER_ADDR_RESERVED_2B_OFFSET 0x0000000000000008
  57. #define MON_BUFFER_ADDR_RESERVED_2B_LSB 18
  58. #define MON_BUFFER_ADDR_RESERVED_2B_MSB 31
  59. #define MON_BUFFER_ADDR_RESERVED_2B_MASK 0x00000000fffc0000
  60. #define MON_BUFFER_ADDR_TLV64_PADDING_OFFSET 0x0000000000000008
  61. #define MON_BUFFER_ADDR_TLV64_PADDING_LSB 32
  62. #define MON_BUFFER_ADDR_TLV64_PADDING_MSB 63
  63. #define MON_BUFFER_ADDR_TLV64_PADDING_MASK 0xffffffff00000000
  64. #endif