dp_main.c 50 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865
  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <hal_api.h>
  21. #include <hif.h>
  22. #include <htt.h>
  23. #include <wdi_event.h>
  24. #include <queue.h>
  25. #include "dp_htt.h"
  26. #include "dp_types.h"
  27. #include "dp_internal.h"
  28. #include "dp_tx.h"
  29. #include "dp_rx.h"
  30. #include "../../wlan_cfg/wlan_cfg.h"
  31. #define DP_INTR_POLL_TIMER_MS 100
  32. /**
  33. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  34. */
  35. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  36. int ring_type, int ring_num, int pdev_id, uint32_t num_entries)
  37. {
  38. void *hal_soc = soc->hal_soc;
  39. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  40. /* TODO: See if we should get align size from hal */
  41. uint32_t ring_base_align = 8;
  42. struct hal_srng_params ring_params;
  43. srng->hal_srng = NULL;
  44. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  45. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  46. soc->osdev, soc->osdev->dev, srng->alloc_size,
  47. &(srng->base_paddr_unaligned));
  48. if (!srng->base_vaddr_unaligned) {
  49. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  50. FL("alloc failed - ring_type: %d, ring_num %d"),
  51. ring_type, ring_num);
  52. return QDF_STATUS_E_NOMEM;
  53. }
  54. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  55. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  56. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  57. ((unsigned long)(ring_params.ring_base_vaddr) -
  58. (unsigned long)srng->base_vaddr_unaligned);
  59. ring_params.num_entries = num_entries;
  60. /* TODO: Check MSI support and get MSI settings from HIF layer */
  61. ring_params.msi_data = 0;
  62. ring_params.msi_addr = 0;
  63. /* TODO: Setup interrupt timer and batch counter thresholds for
  64. * interrupt mitigation based on ring type
  65. */
  66. ring_params.intr_timer_thres_us = 8;
  67. ring_params.intr_batch_cntr_thres_entries = 1;
  68. /* TODO: Currently hal layer takes care of endianness related settings.
  69. * See if these settings need to passed from DP layer
  70. */
  71. ring_params.flags = 0;
  72. /* Enable low threshold interrupts for rx buffer rings (regular and
  73. * monitor buffer rings.
  74. * TODO: See if this is required for any other ring
  75. */
  76. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  77. /* TODO: Setting low threshold to 1/8th of ring size
  78. * see if this needs to be configurable
  79. */
  80. ring_params.low_threshold = num_entries >> 3;
  81. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  82. }
  83. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  84. pdev_id, &ring_params);
  85. return 0;
  86. }
  87. /**
  88. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  89. * Any buffers allocated and attached to ring entries are expected to be freed
  90. * before calling this function.
  91. */
  92. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  93. int ring_type, int ring_num)
  94. {
  95. if (!srng->hal_srng) {
  96. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  97. FL("Ring type: %d, num:%d not setup"),
  98. ring_type, ring_num);
  99. return;
  100. }
  101. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  102. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  103. srng->alloc_size,
  104. srng->base_vaddr_unaligned,
  105. srng->base_paddr_unaligned, 0);
  106. }
  107. /* TODO: Need this interface from HIF */
  108. void *hif_get_hal_handle(void *hif_handle);
  109. /*
  110. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  111. * @dp_ctx: DP SOC handle
  112. * @budget: Number of frames/descriptors that can be processed in one shot
  113. *
  114. * Return: remaining budget/quota for the soc device
  115. */
  116. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  117. {
  118. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  119. struct dp_soc *soc = int_ctx->soc;
  120. int ring = 0;
  121. uint32_t work_done = 0;
  122. uint32_t budget = dp_budget;
  123. uint8_t tx_mask = int_ctx->tx_ring_mask;
  124. uint8_t rx_mask = int_ctx->rx_ring_mask;
  125. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  126. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  127. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  128. /* Process Tx completion interrupts first to return back buffers */
  129. if (tx_mask) {
  130. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  131. if (tx_mask & (1 << ring)) {
  132. work_done =
  133. dp_tx_comp_handler(soc, ring, budget);
  134. budget -= work_done;
  135. if (work_done)
  136. QDF_TRACE(QDF_MODULE_ID_DP,
  137. QDF_TRACE_LEVEL_INFO,
  138. "tx mask 0x%x ring %d,"
  139. "budget %d",
  140. tx_mask, ring, budget);
  141. if (budget <= 0)
  142. goto budget_done;
  143. }
  144. }
  145. }
  146. /* Process REO Exception ring interrupt */
  147. if (rx_err_mask) {
  148. work_done = dp_rx_err_process(soc,
  149. soc->reo_exception_ring.hal_srng, budget);
  150. budget -= work_done;
  151. if (work_done)
  152. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  153. "REO Exception Ring: work_done %d budget %d",
  154. work_done, budget);
  155. if (budget <= 0) {
  156. goto budget_done;
  157. }
  158. }
  159. /* Process Rx WBM release ring interrupt */
  160. if (rx_wbm_rel_mask) {
  161. work_done = dp_rx_wbm_err_process(soc,
  162. soc->rx_rel_ring.hal_srng, budget);
  163. budget -= work_done;
  164. if (work_done)
  165. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  166. "WBM Release Ring: work_done %d budget %d",
  167. work_done, budget);
  168. if (budget <= 0) {
  169. goto budget_done;
  170. }
  171. }
  172. /* Process Rx interrupts */
  173. if (rx_mask) {
  174. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  175. if (rx_mask & (1 << ring)) {
  176. work_done =
  177. dp_rx_process(soc,
  178. soc->reo_dest_ring[ring].hal_srng,
  179. budget);
  180. budget -= work_done;
  181. if (work_done)
  182. QDF_TRACE(QDF_MODULE_ID_DP,
  183. QDF_TRACE_LEVEL_INFO,
  184. "rx mask 0x%x ring %d,"
  185. "budget %d",
  186. tx_mask, ring, budget);
  187. if (budget <= 0)
  188. goto budget_done;
  189. }
  190. }
  191. }
  192. if (reo_status_mask)
  193. dp_reo_status_ring_handler(soc);
  194. budget_done:
  195. return dp_budget - budget;
  196. }
  197. /* dp_interrupt_timer()- timer poll for interrupts
  198. *
  199. * @arg: SoC Handle
  200. *
  201. * Return:
  202. *
  203. */
  204. #ifdef DP_INTR_POLL_BASED
  205. static void dp_interrupt_timer(void *arg)
  206. {
  207. struct dp_soc *soc = (struct dp_soc *) arg;
  208. int i;
  209. for (i = 0 ; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  210. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  211. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  212. }
  213. /*
  214. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  215. * @txrx_soc: DP SOC handle
  216. *
  217. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  218. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  219. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  220. *
  221. * Return: 0 for success. nonzero for failure.
  222. */
  223. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  224. {
  225. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  226. int i;
  227. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  228. soc->intr_ctx[i].tx_ring_mask = 0xF;
  229. soc->intr_ctx[i].rx_ring_mask = 0xF;
  230. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  231. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  232. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  233. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  234. soc->intr_ctx[i].soc = soc;
  235. }
  236. qdf_timer_init(soc->osdev, &soc->int_timer,
  237. dp_interrupt_timer, (void *)soc,
  238. QDF_TIMER_TYPE_WAKE_APPS);
  239. return QDF_STATUS_SUCCESS;
  240. }
  241. /*
  242. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  243. * @txrx_soc: DP SOC handle
  244. *
  245. * Return: void
  246. */
  247. static void dp_soc_interrupt_detach(void *txrx_soc)
  248. {
  249. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  250. qdf_timer_stop(&soc->int_timer);
  251. qdf_timer_free(&soc->int_timer);
  252. }
  253. #else
  254. /*
  255. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  256. * @txrx_soc: DP SOC handle
  257. *
  258. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  259. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  260. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  261. *
  262. * Return: 0 for success. nonzero for failure.
  263. */
  264. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  265. {
  266. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  267. int i = 0;
  268. int num_irq = 0;
  269. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  270. int j = 0;
  271. int ret = 0;
  272. /* Map of IRQ ids registered with one interrupt context */
  273. int irq_id_map[HIF_MAX_GRP_IRQ];
  274. int tx_mask =
  275. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  276. int rx_mask =
  277. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  278. int rx_mon_mask =
  279. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  280. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  281. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  282. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  283. soc->intr_ctx[i].soc = soc;
  284. num_irq = 0;
  285. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  286. if (tx_mask & (1 << j)) {
  287. irq_id_map[num_irq++] =
  288. (wbm2host_tx_completions_ring1 - j);
  289. }
  290. if (rx_mask & (1 << j)) {
  291. irq_id_map[num_irq++] =
  292. (reo2host_destination_ring1 - j);
  293. }
  294. if (rx_mon_mask & (1 << j)) {
  295. irq_id_map[num_irq++] =
  296. (rxdma2host_monitor_destination_mac1
  297. - j);
  298. }
  299. }
  300. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  301. num_irq, irq_id_map,
  302. dp_service_srngs,
  303. &soc->intr_ctx[i]);
  304. if (ret) {
  305. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  306. FL("failed, ret = %d"), ret);
  307. return QDF_STATUS_E_FAILURE;
  308. }
  309. }
  310. return QDF_STATUS_SUCCESS;
  311. }
  312. /*
  313. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  314. * @txrx_soc: DP SOC handle
  315. *
  316. * Return: void
  317. */
  318. static void dp_soc_interrupt_detach(void *txrx_soc)
  319. {
  320. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  321. int i;
  322. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  323. soc->intr_ctx[i].tx_ring_mask = 0;
  324. soc->intr_ctx[i].rx_ring_mask = 0;
  325. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  326. }
  327. }
  328. #endif
  329. #define AVG_MAX_MPDUS_PER_TID 128
  330. #define AVG_TIDS_PER_CLIENT 2
  331. #define AVG_FLOWS_PER_TID 2
  332. #define AVG_MSDUS_PER_FLOW 128
  333. #define AVG_MSDUS_PER_MPDU 4
  334. /*
  335. * Allocate and setup link descriptor pool that will be used by HW for
  336. * various link and queue descriptors and managed by WBM
  337. */
  338. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  339. {
  340. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  341. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  342. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  343. uint32_t num_mpdus_per_link_desc =
  344. hal_num_mpdus_per_link_desc(soc->hal_soc);
  345. uint32_t num_msdus_per_link_desc =
  346. hal_num_msdus_per_link_desc(soc->hal_soc);
  347. uint32_t num_mpdu_links_per_queue_desc =
  348. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  349. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  350. uint32_t total_link_descs, total_mem_size;
  351. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  352. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  353. uint32_t num_link_desc_banks;
  354. uint32_t last_bank_size = 0;
  355. uint32_t entry_size, num_entries;
  356. int i;
  357. /* Only Tx queue descriptors are allocated from common link descriptor
  358. * pool Rx queue descriptors are not included in this because (REO queue
  359. * extension descriptors) they are expected to be allocated contiguously
  360. * with REO queue descriptors
  361. */
  362. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  363. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  364. num_mpdu_queue_descs = num_mpdu_link_descs /
  365. num_mpdu_links_per_queue_desc;
  366. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  367. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  368. num_msdus_per_link_desc;
  369. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  370. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  371. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  372. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  373. /* Round up to power of 2 */
  374. total_link_descs = 1;
  375. while (total_link_descs < num_entries)
  376. total_link_descs <<= 1;
  377. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  378. FL("total_link_descs: %u, link_desc_size: %d"),
  379. total_link_descs, link_desc_size);
  380. total_mem_size = total_link_descs * link_desc_size;
  381. total_mem_size += link_desc_align;
  382. if (total_mem_size <= max_alloc_size) {
  383. num_link_desc_banks = 0;
  384. last_bank_size = total_mem_size;
  385. } else {
  386. num_link_desc_banks = (total_mem_size) /
  387. (max_alloc_size - link_desc_align);
  388. last_bank_size = total_mem_size %
  389. (max_alloc_size - link_desc_align);
  390. }
  391. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  392. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  393. total_mem_size, num_link_desc_banks);
  394. for (i = 0; i < num_link_desc_banks; i++) {
  395. soc->link_desc_banks[i].base_vaddr_unaligned =
  396. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  397. max_alloc_size,
  398. &(soc->link_desc_banks[i].base_paddr_unaligned));
  399. soc->link_desc_banks[i].size = max_alloc_size;
  400. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  401. soc->link_desc_banks[i].base_vaddr_unaligned) +
  402. ((unsigned long)(
  403. soc->link_desc_banks[i].base_vaddr_unaligned) %
  404. link_desc_align));
  405. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  406. soc->link_desc_banks[i].base_paddr_unaligned) +
  407. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  408. (unsigned long)(
  409. soc->link_desc_banks[i].base_vaddr_unaligned));
  410. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  411. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  412. FL("Link descriptor memory alloc failed"));
  413. goto fail;
  414. }
  415. }
  416. if (last_bank_size) {
  417. /* Allocate last bank in case total memory required is not exact
  418. * multiple of max_alloc_size
  419. */
  420. soc->link_desc_banks[i].base_vaddr_unaligned =
  421. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  422. last_bank_size,
  423. &(soc->link_desc_banks[i].base_paddr_unaligned));
  424. soc->link_desc_banks[i].size = last_bank_size;
  425. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  426. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  427. ((unsigned long)(
  428. soc->link_desc_banks[i].base_vaddr_unaligned) %
  429. link_desc_align));
  430. soc->link_desc_banks[i].base_paddr =
  431. (unsigned long)(
  432. soc->link_desc_banks[i].base_paddr_unaligned) +
  433. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  434. (unsigned long)(
  435. soc->link_desc_banks[i].base_vaddr_unaligned));
  436. }
  437. /* Allocate and setup link descriptor idle list for HW internal use */
  438. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  439. total_mem_size = entry_size * total_link_descs;
  440. if (total_mem_size <= max_alloc_size) {
  441. void *desc;
  442. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  443. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  444. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  445. FL("Link desc idle ring setup failed"));
  446. goto fail;
  447. }
  448. hal_srng_access_start_unlocked(soc->hal_soc,
  449. soc->wbm_idle_link_ring.hal_srng);
  450. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  451. soc->link_desc_banks[i].base_paddr; i++) {
  452. uint32_t num_entries = (soc->link_desc_banks[i].size -
  453. (unsigned long)(
  454. soc->link_desc_banks[i].base_vaddr) -
  455. (unsigned long)(
  456. soc->link_desc_banks[i].base_vaddr_unaligned))
  457. / link_desc_size;
  458. unsigned long paddr = (unsigned long)(
  459. soc->link_desc_banks[i].base_paddr);
  460. while (num_entries && (desc = hal_srng_src_get_next(
  461. soc->hal_soc,
  462. soc->wbm_idle_link_ring.hal_srng))) {
  463. hal_set_link_desc_addr(desc, i, paddr);
  464. num_entries--;
  465. paddr += link_desc_size;
  466. }
  467. }
  468. hal_srng_access_end_unlocked(soc->hal_soc,
  469. soc->wbm_idle_link_ring.hal_srng);
  470. } else {
  471. uint32_t num_scatter_bufs;
  472. uint32_t num_entries_per_buf;
  473. uint32_t rem_entries;
  474. uint8_t *scatter_buf_ptr;
  475. uint16_t scatter_buf_num;
  476. soc->wbm_idle_scatter_buf_size =
  477. hal_idle_list_scatter_buf_size(soc->hal_soc);
  478. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  479. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  480. num_scatter_bufs = (total_mem_size /
  481. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  482. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  483. for (i = 0; i < num_scatter_bufs; i++) {
  484. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  485. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  486. soc->wbm_idle_scatter_buf_size,
  487. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  488. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  489. QDF_TRACE(QDF_MODULE_ID_DP,
  490. QDF_TRACE_LEVEL_ERROR,
  491. FL("Scatter list memory alloc failed"));
  492. goto fail;
  493. }
  494. }
  495. /* Populate idle list scatter buffers with link descriptor
  496. * pointers
  497. */
  498. scatter_buf_num = 0;
  499. scatter_buf_ptr = (uint8_t *)(
  500. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  501. rem_entries = num_entries_per_buf;
  502. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  503. soc->link_desc_banks[i].base_paddr; i++) {
  504. uint32_t num_link_descs =
  505. (soc->link_desc_banks[i].size -
  506. (unsigned long)(
  507. soc->link_desc_banks[i].base_vaddr) -
  508. (unsigned long)(
  509. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  510. link_desc_size;
  511. unsigned long paddr = (unsigned long)(
  512. soc->link_desc_banks[i].base_paddr);
  513. void *desc = NULL;
  514. while (num_link_descs && (desc =
  515. hal_srng_src_get_next(soc->hal_soc,
  516. soc->wbm_idle_link_ring.hal_srng))) {
  517. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  518. i, paddr);
  519. num_link_descs--;
  520. paddr += link_desc_size;
  521. if (rem_entries) {
  522. rem_entries--;
  523. scatter_buf_ptr += link_desc_size;
  524. } else {
  525. rem_entries = num_entries_per_buf;
  526. scatter_buf_num++;
  527. scatter_buf_ptr = (uint8_t *)(
  528. soc->wbm_idle_scatter_buf_base_vaddr[
  529. scatter_buf_num]);
  530. }
  531. }
  532. }
  533. /* Setup link descriptor idle list in HW */
  534. hal_setup_link_idle_list(soc->hal_soc,
  535. soc->wbm_idle_scatter_buf_base_paddr,
  536. soc->wbm_idle_scatter_buf_base_vaddr,
  537. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  538. (uint32_t)(scatter_buf_ptr -
  539. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  540. scatter_buf_num])));
  541. }
  542. return 0;
  543. fail:
  544. if (soc->wbm_idle_link_ring.hal_srng) {
  545. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  546. WBM_IDLE_LINK, 0);
  547. }
  548. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  549. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  550. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  551. soc->wbm_idle_scatter_buf_size,
  552. soc->wbm_idle_scatter_buf_base_vaddr[i],
  553. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  554. }
  555. }
  556. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  557. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  558. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  559. soc->link_desc_banks[i].size,
  560. soc->link_desc_banks[i].base_vaddr_unaligned,
  561. soc->link_desc_banks[i].base_paddr_unaligned,
  562. 0);
  563. }
  564. }
  565. return QDF_STATUS_E_FAILURE;
  566. }
  567. #ifdef notused
  568. /*
  569. * Free link descriptor pool that was setup HW
  570. */
  571. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  572. {
  573. int i;
  574. if (soc->wbm_idle_link_ring.hal_srng) {
  575. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  576. WBM_IDLE_LINK, 0);
  577. }
  578. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  579. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  580. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  581. soc->wbm_idle_scatter_buf_size,
  582. soc->wbm_idle_scatter_buf_base_vaddr[i],
  583. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  584. }
  585. }
  586. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  587. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  588. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  589. soc->link_desc_banks[i].size,
  590. soc->link_desc_banks[i].base_vaddr_unaligned,
  591. soc->link_desc_banks[i].base_paddr_unaligned,
  592. 0);
  593. }
  594. }
  595. }
  596. #endif /* notused */
  597. /* TODO: Following should be configurable */
  598. #define WBM_RELEASE_RING_SIZE 64
  599. #define TCL_DATA_RING_SIZE 512
  600. #define TCL_CMD_RING_SIZE 32
  601. #define TCL_STATUS_RING_SIZE 32
  602. #define REO_DST_RING_SIZE 2048
  603. #define REO_REINJECT_RING_SIZE 32
  604. #define RX_RELEASE_RING_SIZE 256
  605. #define REO_EXCEPTION_RING_SIZE 128
  606. #define REO_CMD_RING_SIZE 32
  607. #define REO_STATUS_RING_SIZE 32
  608. #define RXDMA_BUF_RING_SIZE 2048
  609. #define RXDMA_MONITOR_BUF_RING_SIZE 2048
  610. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  611. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  612. /*
  613. * dp_soc_cmn_setup() - Common SoC level initializion
  614. * @soc: Datapath SOC handle
  615. *
  616. * This is an internal function used to setup common SOC data structures,
  617. * to be called from PDEV attach after receiving HW mode capabilities from FW
  618. */
  619. static int dp_soc_cmn_setup(struct dp_soc *soc)
  620. {
  621. int i;
  622. if (soc->cmn_init_done)
  623. return 0;
  624. if (dp_peer_find_attach(soc))
  625. goto fail0;
  626. if (dp_hw_link_desc_pool_setup(soc))
  627. goto fail1;
  628. /* Setup SRNG rings */
  629. /* Common rings */
  630. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  631. WBM_RELEASE_RING_SIZE)) {
  632. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  633. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  634. goto fail1;
  635. }
  636. soc->num_tcl_data_rings = 0;
  637. /* Tx data rings */
  638. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  639. soc->num_tcl_data_rings =
  640. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  641. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  642. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  643. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  644. QDF_TRACE(QDF_MODULE_ID_DP,
  645. QDF_TRACE_LEVEL_ERROR,
  646. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  647. goto fail1;
  648. }
  649. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  650. WBM2SW_RELEASE, i, 0, TCL_DATA_RING_SIZE)) {
  651. QDF_TRACE(QDF_MODULE_ID_DP,
  652. QDF_TRACE_LEVEL_ERROR,
  653. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  654. goto fail1;
  655. }
  656. }
  657. } else {
  658. /* This will be incremented during per pdev ring setup */
  659. soc->num_tcl_data_rings = 0;
  660. }
  661. if (dp_tx_soc_attach(soc)) {
  662. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  663. FL("dp_tx_soc_attach failed"));
  664. goto fail1;
  665. }
  666. /* TCL command and status rings */
  667. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  668. TCL_CMD_RING_SIZE)) {
  669. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  670. FL("dp_srng_setup failed for tcl_cmd_ring"));
  671. goto fail1;
  672. }
  673. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  674. TCL_STATUS_RING_SIZE)) {
  675. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  676. FL("dp_srng_setup failed for tcl_status_ring"));
  677. goto fail1;
  678. }
  679. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  680. * descriptors
  681. */
  682. /* Rx data rings */
  683. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  684. soc->num_reo_dest_rings =
  685. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  686. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  687. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  688. i, 0, REO_DST_RING_SIZE)) {
  689. QDF_TRACE(QDF_MODULE_ID_DP,
  690. QDF_TRACE_LEVEL_ERROR,
  691. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  692. goto fail1;
  693. }
  694. }
  695. } else {
  696. /* This will be incremented during per pdev ring setup */
  697. soc->num_reo_dest_rings = 0;
  698. }
  699. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  700. /* REO reinjection ring */
  701. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  702. REO_REINJECT_RING_SIZE)) {
  703. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  704. FL("dp_srng_setup failed for reo_reinject_ring"));
  705. goto fail1;
  706. }
  707. /* Rx release ring */
  708. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  709. RX_RELEASE_RING_SIZE)) {
  710. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  711. FL("dp_srng_setup failed for rx_rel_ring"));
  712. goto fail1;
  713. }
  714. /* Rx exception ring */
  715. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  716. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  717. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  718. FL("dp_srng_setup failed for reo_exception_ring"));
  719. goto fail1;
  720. }
  721. /* REO command and status rings */
  722. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  723. REO_CMD_RING_SIZE)) {
  724. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  725. FL("dp_srng_setup failed for reo_cmd_ring"));
  726. goto fail1;
  727. }
  728. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  729. TAILQ_INIT(&soc->rx.reo_cmd_list);
  730. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  731. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  732. REO_STATUS_RING_SIZE)) {
  733. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  734. FL("dp_srng_setup failed for reo_status_ring"));
  735. goto fail1;
  736. }
  737. dp_soc_interrupt_attach(soc);
  738. /* Setup HW REO */
  739. hal_reo_setup(soc->hal_soc);
  740. soc->cmn_init_done = 1;
  741. return 0;
  742. fail1:
  743. /*
  744. * Cleanup will be done as part of soc_detach, which will
  745. * be called on pdev attach failure
  746. */
  747. fail0:
  748. return QDF_STATUS_E_FAILURE;
  749. }
  750. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force);
  751. /*
  752. * dp_pdev_attach_wifi3() - attach txrx pdev
  753. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  754. * @txrx_soc: Datapath SOC handle
  755. * @htc_handle: HTC handle for host-target interface
  756. * @qdf_osdev: QDF OS device
  757. * @pdev_id: PDEV ID
  758. *
  759. * Return: DP PDEV handle on success, NULL on failure
  760. */
  761. static void *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc, void *ctrl_pdev,
  762. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  763. {
  764. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  765. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  766. if (!pdev) {
  767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  768. FL("DP PDEV memory allocation failed"));
  769. goto fail0;
  770. }
  771. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  772. if (!pdev->wlan_cfg_ctx) {
  773. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  774. FL("pdev cfg_attach failed"));
  775. qdf_mem_free(pdev);
  776. goto fail0;
  777. }
  778. pdev->soc = soc;
  779. pdev->osif_pdev = ctrl_pdev;
  780. pdev->pdev_id = pdev_id;
  781. soc->pdev_list[pdev_id] = pdev;
  782. TAILQ_INIT(&pdev->vdev_list);
  783. pdev->vdev_count = 0;
  784. if (dp_soc_cmn_setup(soc)) {
  785. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  786. FL("dp_soc_cmn_setup failed"));
  787. goto fail1;
  788. }
  789. /* Setup per PDEV TCL rings if configured */
  790. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  791. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  792. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  793. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  794. FL("dp_srng_setup failed for tcl_data_ring"));
  795. goto fail1;
  796. }
  797. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  798. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  799. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  800. FL("dp_srng_setup failed for tx_comp_ring"));
  801. goto fail1;
  802. }
  803. soc->num_tcl_data_rings++;
  804. }
  805. /* Tx specific init */
  806. if (dp_tx_pdev_attach(pdev)) {
  807. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  808. FL("dp_tx_pdev_attach failed"));
  809. goto fail1;
  810. }
  811. /* Setup per PDEV REO rings if configured */
  812. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  813. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  814. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  815. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  816. FL("dp_srng_setup failed for reo_dest_ringn"));
  817. goto fail1;
  818. }
  819. soc->num_reo_dest_rings++;
  820. }
  821. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  822. RXDMA_BUF_RING_SIZE)) {
  823. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  824. FL("dp_srng_setup failed rx refill ring"));
  825. goto fail1;
  826. }
  827. #ifdef QCA_HOST2FW_RXBUF_RING
  828. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1, pdev_id,
  829. RXDMA_BUF_RING_SIZE)) {
  830. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  831. FL("dp_srng_setup failed rx mac ring"));
  832. goto fail1;
  833. }
  834. #endif
  835. /* TODO: RXDMA destination ring is not planned to be used currently.
  836. * Setup the ring when required
  837. */
  838. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  839. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  840. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  841. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  842. goto fail1;
  843. }
  844. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  845. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  846. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  847. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  848. goto fail1;
  849. }
  850. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  851. RXDMA_MONITOR_STATUS, 0, pdev_id,
  852. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  853. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  854. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  855. goto fail1;
  856. }
  857. /* Rx specific init */
  858. if (dp_rx_pdev_attach(pdev)) {
  859. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  860. FL("dp_rx_pdev_attach failed "));
  861. goto fail0;
  862. }
  863. #ifndef CONFIG_WIN
  864. /* MCL */
  865. dp_local_peer_id_pool_init(pdev);
  866. #endif
  867. return (void *)pdev;
  868. fail1:
  869. dp_pdev_detach_wifi3((void *)pdev, 0);
  870. fail0:
  871. return NULL;
  872. }
  873. /*
  874. * dp_pdev_detach_wifi3() - detach txrx pdev
  875. * @txrx_pdev: Datapath PDEV handle
  876. * @force: Force detach
  877. *
  878. */
  879. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force)
  880. {
  881. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  882. struct dp_soc *soc = pdev->soc;
  883. dp_tx_pdev_detach(pdev);
  884. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  885. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  886. TCL_DATA, pdev->pdev_id);
  887. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  888. WBM2SW_RELEASE, pdev->pdev_id);
  889. }
  890. dp_rx_pdev_detach(pdev);
  891. /* Setup per PDEV REO rings if configured */
  892. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  893. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  894. REO_DST, pdev->pdev_id);
  895. }
  896. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  897. #ifdef QCA_HOST2FW_RXBUF_RING
  898. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1);
  899. #endif
  900. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  901. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  902. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  903. RXDMA_MONITOR_STATUS, 0);
  904. soc->pdev_list[pdev->pdev_id] = NULL;
  905. qdf_mem_free(pdev);
  906. }
  907. /*
  908. * dp_soc_detach_wifi3() - Detach txrx SOC
  909. * @txrx_soc: DP SOC handle
  910. *
  911. */
  912. static void dp_soc_detach_wifi3(void *txrx_soc)
  913. {
  914. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  915. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  916. int i;
  917. soc->cmn_init_done = 0;
  918. dp_soc_interrupt_detach(soc);
  919. for (i = 0; i < MAX_PDEV_CNT; i++) {
  920. if (soc->pdev_list[i])
  921. dp_pdev_detach_wifi3((void *)pdev, 1);
  922. }
  923. dp_peer_find_detach(soc);
  924. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  925. * SW descriptors
  926. */
  927. /* Free the ring memories */
  928. /* Common rings */
  929. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  930. /* Tx data rings */
  931. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  932. dp_tx_soc_detach(soc);
  933. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  934. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  935. TCL_DATA, i);
  936. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  937. WBM2SW_RELEASE, i);
  938. }
  939. }
  940. /* TCL command and status rings */
  941. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  942. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  943. /* Rx data rings */
  944. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  945. soc->num_reo_dest_rings =
  946. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  947. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  948. /* TODO: Get number of rings and ring sizes
  949. * from wlan_cfg
  950. */
  951. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  952. REO_DST, i);
  953. }
  954. }
  955. /* REO reinjection ring */
  956. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  957. /* Rx release ring */
  958. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  959. /* Rx exception ring */
  960. /* TODO: Better to store ring_type and ring_num in
  961. * dp_srng during setup
  962. */
  963. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  964. /* REO command and status rings */
  965. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  966. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  967. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  968. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  969. htt_soc_detach(soc->htt_handle);
  970. }
  971. /*
  972. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  973. * @txrx_soc: Datapath SOC handle
  974. */
  975. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  976. {
  977. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  978. int i;
  979. htt_soc_attach_target(soc->htt_handle);
  980. for (i = 0; i < MAX_PDEV_CNT; i++) {
  981. struct dp_pdev *pdev = soc->pdev_list[i];
  982. if (pdev) {
  983. htt_srng_setup(soc->htt_handle, i,
  984. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  985. #ifdef QCA_HOST2FW_RXBUF_RING
  986. htt_srng_setup(soc->htt_handle, i,
  987. pdev->rx_mac_buf_ring.hal_srng, RXDMA_BUF);
  988. #endif
  989. #ifdef notyet /* FW doesn't handle monitor rings yet */
  990. htt_srng_setup(soc->htt_handle, i,
  991. pdev->rxdma_mon_buf_ring.hal_srng,
  992. RXDMA_MONITOR_BUF);
  993. htt_srng_setup(soc->htt_handle, i,
  994. pdev->rxdma_mon_dst_ring.hal_srng,
  995. RXDMA_MONITOR_DST);
  996. htt_srng_setup(soc->htt_handle, i,
  997. pdev->rxdma_mon_status_ring.hal_srng,
  998. RXDMA_MONITOR_STATUS);
  999. #endif
  1000. }
  1001. }
  1002. return 0;
  1003. }
  1004. /*
  1005. * dp_vdev_attach_wifi3() - attach txrx vdev
  1006. * @txrx_pdev: Datapath PDEV handle
  1007. * @vdev_mac_addr: MAC address of the virtual interface
  1008. * @vdev_id: VDEV Id
  1009. * @wlan_op_mode: VDEV operating mode
  1010. *
  1011. * Return: DP VDEV handle on success, NULL on failure
  1012. */
  1013. static void *dp_vdev_attach_wifi3(void *txrx_pdev,
  1014. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1015. {
  1016. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1017. struct dp_soc *soc = pdev->soc;
  1018. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1019. if (!vdev) {
  1020. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1021. FL("DP VDEV memory allocation failed"));
  1022. goto fail0;
  1023. }
  1024. vdev->pdev = pdev;
  1025. vdev->vdev_id = vdev_id;
  1026. vdev->opmode = op_mode;
  1027. vdev->osdev = soc->osdev;
  1028. vdev->osif_rx = NULL;
  1029. vdev->osif_rsim_rx_decap = NULL;
  1030. vdev->osif_rx_mon = NULL;
  1031. vdev->osif_vdev = NULL;
  1032. vdev->delete.pending = 0;
  1033. vdev->safemode = 0;
  1034. vdev->drop_unenc = 1;
  1035. #ifdef notyet
  1036. vdev->filters_num = 0;
  1037. #endif
  1038. qdf_mem_copy(
  1039. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1040. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1041. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1042. /* TODO: Initialize default HTT meta data that will be used in
  1043. * TCL descriptors for packets transmitted from this VDEV
  1044. */
  1045. TAILQ_INIT(&vdev->peer_list);
  1046. /* add this vdev into the pdev's list */
  1047. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1048. pdev->vdev_count++;
  1049. dp_tx_vdev_attach(vdev);
  1050. #ifdef DP_INTR_POLL_BASED
  1051. if (pdev->vdev_count == 1)
  1052. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1053. #endif
  1054. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1055. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1056. return (void *)vdev;
  1057. fail0:
  1058. return NULL;
  1059. }
  1060. /**
  1061. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1062. * @vdev: Datapath VDEV handle
  1063. * @osif_vdev: OSIF vdev handle
  1064. * @txrx_ops: Tx and Rx operations
  1065. *
  1066. * Return: DP VDEV handle on success, NULL on failure
  1067. */
  1068. static void dp_vdev_register_wifi3(void *vdev_handle, void *osif_vdev,
  1069. struct ol_txrx_ops *txrx_ops)
  1070. {
  1071. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1072. vdev->osif_vdev = osif_vdev;
  1073. vdev->osif_rx = txrx_ops->rx.rx;
  1074. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1075. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1076. #ifdef notyet
  1077. #if ATH_SUPPORT_WAPI
  1078. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1079. #endif
  1080. #if UMAC_SUPPORT_PROXY_ARP
  1081. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1082. #endif
  1083. #endif
  1084. /* TODO: Enable the following once Tx code is integrated */
  1085. txrx_ops->tx.tx = dp_tx_send;
  1086. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1087. "DP Vdev Register success");
  1088. }
  1089. /*
  1090. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1091. * @txrx_vdev: Datapath VDEV handle
  1092. * @callback: Callback OL_IF on completion of detach
  1093. * @cb_context: Callback context
  1094. *
  1095. */
  1096. static void dp_vdev_detach_wifi3(void *vdev_handle,
  1097. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1098. {
  1099. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1100. struct dp_pdev *pdev = vdev->pdev;
  1101. struct dp_soc *soc = pdev->soc;
  1102. /* preconditions */
  1103. qdf_assert(vdev);
  1104. /* remove the vdev from its parent pdev's list */
  1105. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1106. /*
  1107. * Use peer_ref_mutex while accessing peer_list, in case
  1108. * a peer is in the process of being removed from the list.
  1109. */
  1110. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1111. /* check that the vdev has no peers allocated */
  1112. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1113. /* debug print - will be removed later */
  1114. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1115. FL("not deleting vdev object %p (%pM)"
  1116. "until deletion finishes for all its peers"),
  1117. vdev, vdev->mac_addr.raw);
  1118. /* indicate that the vdev needs to be deleted */
  1119. vdev->delete.pending = 1;
  1120. vdev->delete.callback = callback;
  1121. vdev->delete.context = cb_context;
  1122. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1123. return;
  1124. }
  1125. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1126. dp_tx_vdev_detach(vdev);
  1127. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1128. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1129. qdf_mem_free(vdev);
  1130. if (callback)
  1131. callback(cb_context);
  1132. }
  1133. /*
  1134. * dp_peer_create_wifi3() - attach txrx peer
  1135. * @txrx_vdev: Datapath VDEV handle
  1136. * @peer_mac_addr: Peer MAC address
  1137. *
  1138. * Return: DP peeer handle on success, NULL on failure
  1139. */
  1140. static void *dp_peer_create_wifi3(void *vdev_handle, uint8_t *peer_mac_addr)
  1141. {
  1142. struct dp_peer *peer;
  1143. int i;
  1144. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1145. struct dp_pdev *pdev;
  1146. struct dp_soc *soc;
  1147. /* preconditions */
  1148. qdf_assert(vdev);
  1149. qdf_assert(peer_mac_addr);
  1150. pdev = vdev->pdev;
  1151. soc = pdev->soc;
  1152. #ifdef notyet
  1153. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1154. soc->mempool_ol_ath_peer);
  1155. #else
  1156. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1157. #endif
  1158. if (!peer)
  1159. return NULL; /* failure */
  1160. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1161. qdf_spinlock_create(&peer->peer_info_lock);
  1162. /* store provided params */
  1163. peer->vdev = vdev;
  1164. qdf_mem_copy(
  1165. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1166. /* TODO: See of rx_opt_proc is really required */
  1167. peer->rx_opt_proc = soc->rx_opt_proc;
  1168. /* initialize the peer_id */
  1169. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1170. peer->peer_ids[i] = HTT_INVALID_PEER;
  1171. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1172. qdf_atomic_init(&peer->ref_cnt);
  1173. /* keep one reference for attach */
  1174. qdf_atomic_inc(&peer->ref_cnt);
  1175. /* add this peer into the vdev's list */
  1176. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1177. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1178. /* TODO: See if hash based search is required */
  1179. dp_peer_find_hash_add(soc, peer);
  1180. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1181. "vdev %p created peer %p (%pM)",
  1182. vdev, peer, peer->mac_addr.raw);
  1183. /*
  1184. * For every peer MAp message search and set if bss_peer
  1185. */
  1186. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1187. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1188. "vdev bss_peer!!!!");
  1189. peer->bss_peer = 1;
  1190. vdev->vap_bss_peer = peer;
  1191. }
  1192. #ifndef CONFIG_WIN
  1193. dp_local_peer_id_alloc(pdev, peer);
  1194. #endif
  1195. return (void *)peer;
  1196. }
  1197. /*
  1198. * dp_peer_setup_wifi3() - initialize the peer
  1199. * @vdev_hdl: virtual device object
  1200. * @peer: Peer object
  1201. *
  1202. * Return: void
  1203. */
  1204. static void dp_peer_setup_wifi3(void *vdev_hdl, void *peer_hdl)
  1205. {
  1206. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1207. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1208. struct dp_pdev *pdev;
  1209. struct dp_soc *soc;
  1210. /* preconditions */
  1211. qdf_assert(vdev);
  1212. qdf_assert(peer);
  1213. pdev = vdev->pdev;
  1214. soc = pdev->soc;
  1215. dp_peer_rx_init(pdev, peer);
  1216. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1217. /* TODO: Check the destination ring number to be passed to FW */
  1218. soc->cdp_soc.ol_ops->peer_set_default_routing(soc->osif_soc,
  1219. peer->mac_addr.raw, peer->vdev->vdev_id, 0, 1);
  1220. }
  1221. return;
  1222. }
  1223. /*
  1224. * dp_peer_authorize() - authorize txrx peer
  1225. * @peer_handle: Datapath peer handle
  1226. * @authorize
  1227. *
  1228. */
  1229. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1230. {
  1231. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1232. struct dp_soc *soc;
  1233. if (peer != NULL) {
  1234. soc = peer->vdev->pdev->soc;
  1235. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1236. peer->authorize = authorize ? 1 : 0;
  1237. #ifdef notyet /* ATH_BAND_STEERING */
  1238. peer->peer_bs_inact_flag = 0;
  1239. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1240. #endif
  1241. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1242. }
  1243. }
  1244. /*
  1245. * dp_peer_unref_delete() - unref and delete peer
  1246. * @peer_handle: Datapath peer handle
  1247. *
  1248. */
  1249. void dp_peer_unref_delete(void *peer_handle)
  1250. {
  1251. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1252. struct dp_vdev *vdev = peer->vdev;
  1253. struct dp_soc *soc = vdev->pdev->soc;
  1254. struct dp_peer *tmppeer;
  1255. int found = 0;
  1256. uint16_t peer_id;
  1257. /*
  1258. * Hold the lock all the way from checking if the peer ref count
  1259. * is zero until the peer references are removed from the hash
  1260. * table and vdev list (if the peer ref count is zero).
  1261. * This protects against a new HL tx operation starting to use the
  1262. * peer object just after this function concludes it's done being used.
  1263. * Furthermore, the lock needs to be held while checking whether the
  1264. * vdev's list of peers is empty, to make sure that list is not modified
  1265. * concurrently with the empty check.
  1266. */
  1267. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1268. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1269. peer_id = peer->peer_ids[0];
  1270. /*
  1271. * Make sure that the reference to the peer in
  1272. * peer object map is removed
  1273. */
  1274. if (peer_id != HTT_INVALID_PEER)
  1275. soc->peer_id_to_obj_map[peer_id] = NULL;
  1276. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1277. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1278. /* remove the reference to the peer from the hash table */
  1279. dp_peer_find_hash_remove(soc, peer);
  1280. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1281. if (tmppeer == peer) {
  1282. found = 1;
  1283. break;
  1284. }
  1285. }
  1286. if (found) {
  1287. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1288. peer_list_elem);
  1289. } else {
  1290. /*Ignoring the remove operation as peer not found*/
  1291. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1292. "peer %p not found in vdev (%p)->peer_list:%p",
  1293. peer, vdev, &peer->vdev->peer_list);
  1294. }
  1295. /* cleanup the Rx reorder queues for this peer */
  1296. dp_peer_rx_cleanup(vdev, peer);
  1297. /* check whether the parent vdev has no peers left */
  1298. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1299. /*
  1300. * Now that there are no references to the peer, we can
  1301. * release the peer reference lock.
  1302. */
  1303. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1304. /*
  1305. * Check if the parent vdev was waiting for its peers
  1306. * to be deleted, in order for it to be deleted too.
  1307. */
  1308. if (vdev->delete.pending) {
  1309. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1310. vdev->delete.callback;
  1311. void *vdev_delete_context =
  1312. vdev->delete.context;
  1313. QDF_TRACE(QDF_MODULE_ID_DP,
  1314. QDF_TRACE_LEVEL_INFO_HIGH,
  1315. FL("deleting vdev object %p (%pM)"
  1316. " - its last peer is done"),
  1317. vdev, vdev->mac_addr.raw);
  1318. /* all peers are gone, go ahead and delete it */
  1319. qdf_mem_free(vdev);
  1320. if (vdev_delete_cb)
  1321. vdev_delete_cb(vdev_delete_context);
  1322. }
  1323. } else {
  1324. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1325. }
  1326. #ifdef notyet
  1327. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1328. #else
  1329. qdf_mem_free(peer);
  1330. #endif
  1331. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1332. soc->cdp_soc.ol_ops->peer_unref_delete(soc->osif_soc);
  1333. }
  1334. } else {
  1335. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1336. }
  1337. }
  1338. /*
  1339. * dp_peer_detach_wifi3() – Detach txrx peer
  1340. * @peer_handle: Datapath peer handle
  1341. *
  1342. */
  1343. static void dp_peer_delete_wifi3(void *peer_handle)
  1344. {
  1345. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1346. /* redirect the peer's rx delivery function to point to a
  1347. * discard func
  1348. */
  1349. peer->rx_opt_proc = dp_rx_discard;
  1350. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1351. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1352. /*
  1353. * Remove the reference added during peer_attach.
  1354. * The peer will still be left allocated until the
  1355. * PEER_UNMAP message arrives to remove the other
  1356. * reference, added by the PEER_MAP message.
  1357. */
  1358. dp_peer_unref_delete(peer_handle);
  1359. #ifndef CONFIG_WIN
  1360. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1361. #endif
  1362. qdf_spinlock_destroy(&peer->peer_info_lock);
  1363. }
  1364. /*
  1365. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1366. * @peer_handle: Datapath peer handle
  1367. *
  1368. */
  1369. static uint8 *dp_get_vdev_mac_addr_wifi3(void *pvdev)
  1370. {
  1371. struct dp_vdev *vdev = pvdev;
  1372. return vdev->mac_addr.raw;
  1373. }
  1374. /*
  1375. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1376. * @peer_handle: Datapath peer handle
  1377. *
  1378. */
  1379. static void *dp_get_vdev_from_vdev_id_wifi3(void *dev, uint8_t vdev_id)
  1380. {
  1381. struct dp_pdev *pdev = dev;
  1382. struct dp_vdev *vdev = NULL;
  1383. if (qdf_unlikely(!pdev))
  1384. return NULL;
  1385. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1386. if (vdev->vdev_id == vdev_id)
  1387. break;
  1388. }
  1389. return vdev;
  1390. }
  1391. static int dp_get_opmode(void *vdev_handle)
  1392. {
  1393. struct dp_vdev *vdev = vdev_handle;
  1394. return vdev->opmode;
  1395. }
  1396. static void *dp_get_ctrl_pdev_from_vdev_wifi3(void *pvdev)
  1397. {
  1398. struct dp_vdev *vdev = pvdev;
  1399. struct dp_pdev *pdev = vdev->pdev;
  1400. return (void *)pdev->wlan_cfg_ctx;
  1401. }
  1402. static struct cdp_cmn_ops dp_ops_cmn = {
  1403. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  1404. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  1405. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  1406. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  1407. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  1408. .txrx_peer_create = dp_peer_create_wifi3,
  1409. .txrx_peer_setup = dp_peer_setup_wifi3,
  1410. .txrx_peer_teardown = NULL,
  1411. .txrx_peer_delete = dp_peer_delete_wifi3,
  1412. .txrx_vdev_register = dp_vdev_register_wifi3,
  1413. .txrx_soc_detach = dp_soc_detach_wifi3,
  1414. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  1415. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  1416. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  1417. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  1418. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  1419. .delba_process = dp_delba_process_wifi3,
  1420. /* TODO: Add other functions */
  1421. };
  1422. static struct cdp_ctrl_ops dp_ops_ctrl = {
  1423. .txrx_peer_authorize = dp_peer_authorize,
  1424. /* TODO: Add other functions */
  1425. };
  1426. static struct cdp_me_ops dp_ops_me = {
  1427. /* TODO */
  1428. };
  1429. static struct cdp_mon_ops dp_ops_mon = {
  1430. /* TODO */
  1431. };
  1432. static struct cdp_host_stats_ops dp_ops_host_stats = {
  1433. /* TODO */
  1434. };
  1435. static struct cdp_wds_ops dp_ops_wds = {
  1436. /* TODO */
  1437. };
  1438. static struct cdp_raw_ops dp_ops_raw = {
  1439. /* TODO */
  1440. };
  1441. #ifdef CONFIG_WIN
  1442. static struct cdp_pflow_ops dp_ops_pflow = {
  1443. /* TODO */
  1444. };
  1445. #endif /* CONFIG_WIN */
  1446. #ifndef CONFIG_WIN
  1447. static struct cdp_misc_ops dp_ops_misc = {
  1448. .get_opmode = dp_get_opmode,
  1449. };
  1450. static struct cdp_flowctl_ops dp_ops_flowctl = {
  1451. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1452. };
  1453. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  1454. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1455. };
  1456. static struct cdp_ipa_ops dp_ops_ipa = {
  1457. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1458. };
  1459. static struct cdp_lro_ops dp_ops_lro = {
  1460. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1461. };
  1462. /**
  1463. * dp_dummy_bus_suspend() - dummy bus suspend op
  1464. *
  1465. * FIXME - This is a placeholder for the actual logic!
  1466. *
  1467. * Return: QDF_STATUS_SUCCESS
  1468. */
  1469. inline QDF_STATUS dp_dummy_bus_suspend(void)
  1470. {
  1471. return QDF_STATUS_SUCCESS;
  1472. }
  1473. /**
  1474. * dp_dummy_bus_resume() - dummy bus resume
  1475. *
  1476. * FIXME - This is a placeholder for the actual logic!
  1477. *
  1478. * Return: QDF_STATUS_SUCCESS
  1479. */
  1480. inline QDF_STATUS dp_dummy_bus_resume(void)
  1481. {
  1482. return QDF_STATUS_SUCCESS;
  1483. }
  1484. static struct cdp_bus_ops dp_ops_bus = {
  1485. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1486. .bus_suspend = dp_dummy_bus_suspend,
  1487. .bus_resume = dp_dummy_bus_resume
  1488. };
  1489. static struct cdp_ocb_ops dp_ops_ocb = {
  1490. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1491. };
  1492. static struct cdp_throttle_ops dp_ops_throttle = {
  1493. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1494. };
  1495. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  1496. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1497. };
  1498. static struct cdp_cfg_ops dp_ops_cfg = {
  1499. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1500. };
  1501. static struct cdp_peer_ops dp_ops_peer = {
  1502. .register_peer = dp_register_peer,
  1503. .clear_peer = dp_clear_peer,
  1504. .find_peer_by_addr = dp_find_peer_by_addr,
  1505. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  1506. .local_peer_id = dp_local_peer_id,
  1507. .peer_find_by_local_id = dp_peer_find_by_local_id,
  1508. .peer_state_update = dp_peer_state_update,
  1509. .get_vdevid = dp_get_vdevid,
  1510. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  1511. .get_vdev_for_peer = dp_get_vdev_for_peer,
  1512. .get_peer_state = dp_get_peer_state,
  1513. };
  1514. #endif
  1515. static struct cdp_ops dp_txrx_ops = {
  1516. .cmn_drv_ops = &dp_ops_cmn,
  1517. .ctrl_ops = &dp_ops_ctrl,
  1518. .me_ops = &dp_ops_me,
  1519. .mon_ops = &dp_ops_mon,
  1520. .host_stats_ops = &dp_ops_host_stats,
  1521. .wds_ops = &dp_ops_wds,
  1522. .raw_ops = &dp_ops_raw,
  1523. #ifdef CONFIG_WIN
  1524. .pflow_ops = &dp_ops_pflow,
  1525. #endif /* CONFIG_WIN */
  1526. #ifndef CONFIG_WIN
  1527. .misc_ops = &dp_ops_misc,
  1528. .cfg_ops = &dp_ops_cfg,
  1529. .flowctl_ops = &dp_ops_flowctl,
  1530. .l_flowctl_ops = &dp_ops_l_flowctl,
  1531. .ipa_ops = &dp_ops_ipa,
  1532. .lro_ops = &dp_ops_lro,
  1533. .bus_ops = &dp_ops_bus,
  1534. .ocb_ops = &dp_ops_ocb,
  1535. .peer_ops = &dp_ops_peer,
  1536. .throttle_ops = &dp_ops_throttle,
  1537. .mob_stats_ops = &dp_ops_mob_stats,
  1538. #endif
  1539. };
  1540. /*
  1541. * dp_soc_attach_wifi3() - Attach txrx SOC
  1542. * @osif_soc: Opaque SOC handle from OSIF/HDD
  1543. * @htc_handle: Opaque HTC handle
  1544. * @hif_handle: Opaque HIF handle
  1545. * @qdf_osdev: QDF device
  1546. *
  1547. * Return: DP SOC handle on success, NULL on failure
  1548. */
  1549. /*
  1550. * Local prototype added to temporarily address warning caused by
  1551. * -Wmissing-prototypes. A more correct solution, namely to expose
  1552. * a prototype in an appropriate header file, will come later.
  1553. */
  1554. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1555. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1556. struct ol_if_ops *ol_ops);
  1557. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1558. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1559. struct ol_if_ops *ol_ops)
  1560. {
  1561. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  1562. if (!soc) {
  1563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1564. FL("DP SOC memory allocation failed"));
  1565. goto fail0;
  1566. }
  1567. soc->cdp_soc.ops = &dp_txrx_ops;
  1568. soc->cdp_soc.ol_ops = ol_ops;
  1569. soc->osif_soc = osif_soc;
  1570. soc->osdev = qdf_osdev;
  1571. soc->hif_handle = hif_handle;
  1572. soc->hal_soc = hif_get_hal_handle(hif_handle);
  1573. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  1574. soc->hal_soc, qdf_osdev);
  1575. if (!soc->htt_handle) {
  1576. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1577. FL("HTT attach failed"));
  1578. goto fail1;
  1579. }
  1580. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  1581. if (!soc->wlan_cfg_ctx) {
  1582. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1583. FL("wlan_cfg_soc_attach failed"));
  1584. goto fail2;
  1585. }
  1586. qdf_spinlock_create(&soc->peer_ref_mutex);
  1587. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  1588. goto fail2;
  1589. }
  1590. return (void *)soc;
  1591. fail2:
  1592. htt_soc_detach(soc->htt_handle);
  1593. fail1:
  1594. qdf_mem_free(soc);
  1595. fail0:
  1596. return NULL;
  1597. }