hal_be_generic_api.h 41 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_BE_GENERIC_API_H_
  20. #define _HAL_BE_GENERIC_API_H_
  21. #include <hal_be_hw_headers.h>
  22. #include "hal_be_tx.h"
  23. #include "hal_be_reo.h"
  24. #include <hal_api_mon.h>
  25. #include <hal_generic_api.h>
  26. #include <hal_be_api_mon.h>
  27. /**
  28. * Debug macro to print the TLV header tag
  29. */
  30. #define SHOW_DEFINED(x) do {} while (0)
  31. /**
  32. * hal_tx_comp_get_status() - TQM Release reason
  33. * @hal_desc: completion ring Tx status
  34. *
  35. * This function will parse the WBM completion descriptor and populate in
  36. * HAL structure
  37. *
  38. * Return: none
  39. */
  40. static inline void
  41. hal_tx_comp_get_status_generic_be(void *desc, void *ts1,
  42. struct hal_soc *hal)
  43. {
  44. uint8_t rate_stats_valid = 0;
  45. uint32_t rate_stats = 0;
  46. struct hal_tx_completion_status *ts =
  47. (struct hal_tx_completion_status *)ts1;
  48. ts->ppdu_id = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  49. TQM_STATUS_NUMBER);
  50. ts->ack_frame_rssi = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  51. ACK_FRAME_RSSI);
  52. ts->first_msdu = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  53. FIRST_MSDU);
  54. ts->last_msdu = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  55. LAST_MSDU);
  56. #if 0
  57. // TODO - This has to be calculated form first and last msdu
  58. ts->msdu_part_of_amsdu = HAL_TX_DESC_GET(desc,
  59. WBM2SW_COMPLETION_RING_TX,
  60. MSDU_PART_OF_AMSDU);
  61. #endif
  62. ts->peer_id = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  63. SW_PEER_ID);
  64. ts->tid = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX, TID);
  65. ts->transmit_cnt = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  66. TRANSMIT_COUNT);
  67. rate_stats = HAL_TX_DESC_GET(desc, HAL_TX_COMP, TX_RATE_STATS);
  68. rate_stats_valid = HAL_TX_MS(TX_RATE_STATS_INFO,
  69. TX_RATE_STATS_INFO_VALID, rate_stats);
  70. ts->valid = rate_stats_valid;
  71. if (rate_stats_valid) {
  72. ts->bw = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_BW,
  73. rate_stats);
  74. ts->pkt_type = HAL_TX_MS(TX_RATE_STATS_INFO,
  75. TRANSMIT_PKT_TYPE, rate_stats);
  76. ts->stbc = HAL_TX_MS(TX_RATE_STATS_INFO,
  77. TRANSMIT_STBC, rate_stats);
  78. ts->ldpc = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_LDPC,
  79. rate_stats);
  80. ts->sgi = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_SGI,
  81. rate_stats);
  82. ts->mcs = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_MCS,
  83. rate_stats);
  84. ts->ofdma = HAL_TX_MS(TX_RATE_STATS_INFO, OFDMA_TRANSMISSION,
  85. rate_stats);
  86. ts->tones_in_ru = HAL_TX_MS(TX_RATE_STATS_INFO, TONES_IN_RU,
  87. rate_stats);
  88. }
  89. ts->release_src = hal_tx_comp_get_buffer_source_generic_be(desc);
  90. ts->status = hal_tx_comp_get_release_reason(
  91. desc,
  92. hal_soc_to_hal_soc_handle(hal));
  93. ts->tsf = HAL_TX_DESC_GET(desc, UNIFIED_WBM_RELEASE_RING_6,
  94. TX_RATE_STATS_INFO_TX_RATE_STATS);
  95. }
  96. /**
  97. * hal_tx_set_pcp_tid_map_generic_be() - Configure default PCP to TID map table
  98. * @soc: HAL SoC context
  99. * @map: PCP-TID mapping table
  100. *
  101. * PCP are mapped to 8 TID values using TID values programmed
  102. * in one set of mapping registers PCP_TID_MAP_<0 to 6>
  103. * The mapping register has TID mapping for 8 PCP values
  104. *
  105. * Return: none
  106. */
  107. static void hal_tx_set_pcp_tid_map_generic_be(struct hal_soc *soc, uint8_t *map)
  108. {
  109. uint32_t addr, value;
  110. addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
  111. MAC_TCL_REG_REG_BASE);
  112. value = (map[0] |
  113. (map[1] << HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT) |
  114. (map[2] << HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT) |
  115. (map[3] << HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT) |
  116. (map[4] << HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT) |
  117. (map[5] << HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT) |
  118. (map[6] << HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT) |
  119. (map[7] << HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT));
  120. HAL_REG_WRITE(soc, addr, (value & HWIO_TCL_R0_PCP_TID_MAP_RMSK));
  121. }
  122. /**
  123. * hal_tx_update_pcp_tid_generic_be() - Update the pcp tid map table with
  124. * value received from user-space
  125. * @soc: HAL SoC context
  126. * @pcp: pcp value
  127. * @tid : tid value
  128. *
  129. * Return: void
  130. */
  131. static void
  132. hal_tx_update_pcp_tid_generic_be(struct hal_soc *soc,
  133. uint8_t pcp, uint8_t tid)
  134. {
  135. uint32_t addr, value, regval;
  136. addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
  137. MAC_TCL_REG_REG_BASE);
  138. value = (uint32_t)tid << (HAL_TX_BITS_PER_TID * pcp);
  139. /* Read back previous PCP TID config and update
  140. * with new config.
  141. */
  142. regval = HAL_REG_READ(soc, addr);
  143. regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * pcp));
  144. regval |= value;
  145. HAL_REG_WRITE(soc, addr,
  146. (regval & HWIO_TCL_R0_PCP_TID_MAP_RMSK));
  147. }
  148. /**
  149. * hal_tx_update_tidmap_prty_generic_be() - Update the tid map priority
  150. * @soc: HAL SoC context
  151. * @val: priority value
  152. *
  153. * Return: void
  154. */
  155. static
  156. void hal_tx_update_tidmap_prty_generic_be(struct hal_soc *soc, uint8_t value)
  157. {
  158. uint32_t addr;
  159. addr = HWIO_TCL_R0_TID_MAP_PRTY_ADDR(
  160. MAC_TCL_REG_REG_BASE);
  161. HAL_REG_WRITE(soc, addr,
  162. (value & HWIO_TCL_R0_TID_MAP_PRTY_RMSK));
  163. }
  164. /**
  165. * hal_rx_get_tlv_size_generic_be() - Get rx packet tlv size
  166. * @rx_pkt_tlv_size: TLV size for regular RX packets
  167. * @rx_mon_pkt_tlv_size: TLV size for monitor mode packets
  168. *
  169. * Return: size of rx pkt tlv before the actual data
  170. */
  171. static void hal_rx_get_tlv_size_generic_be(uint16_t *rx_pkt_tlv_size,
  172. uint16_t *rx_mon_pkt_tlv_size)
  173. {
  174. *rx_pkt_tlv_size = RX_PKT_TLVS_LEN;
  175. /* For now mon pkt tlv is same as rx pkt tlv */
  176. *rx_mon_pkt_tlv_size = RX_PKT_TLVS_LEN;
  177. }
  178. /**
  179. * hal_rx_flow_get_tuple_info_be() - Setup a flow search entry in HW FST
  180. * @fst: Pointer to the Rx Flow Search Table
  181. * @hal_hash: HAL 5 tuple hash
  182. * @tuple_info: 5-tuple info of the flow returned to the caller
  183. *
  184. * Return: Success/Failure
  185. */
  186. static void *
  187. hal_rx_flow_get_tuple_info_be(uint8_t *rx_fst, uint32_t hal_hash,
  188. uint8_t *flow_tuple_info)
  189. {
  190. struct hal_rx_fst *fst = (struct hal_rx_fst *)rx_fst;
  191. void *hal_fse = NULL;
  192. struct hal_flow_tuple_info *tuple_info
  193. = (struct hal_flow_tuple_info *)flow_tuple_info;
  194. hal_fse = (uint8_t *)fst->base_vaddr +
  195. (hal_hash * HAL_RX_FST_ENTRY_SIZE);
  196. if (!hal_fse || !tuple_info)
  197. return NULL;
  198. if (!HAL_GET_FLD(hal_fse, RX_FLOW_SEARCH_ENTRY, VALID))
  199. return NULL;
  200. tuple_info->src_ip_127_96 =
  201. qdf_ntohl(HAL_GET_FLD(hal_fse,
  202. RX_FLOW_SEARCH_ENTRY,
  203. SRC_IP_127_96));
  204. tuple_info->src_ip_95_64 =
  205. qdf_ntohl(HAL_GET_FLD(hal_fse,
  206. RX_FLOW_SEARCH_ENTRY,
  207. SRC_IP_95_64));
  208. tuple_info->src_ip_63_32 =
  209. qdf_ntohl(HAL_GET_FLD(hal_fse,
  210. RX_FLOW_SEARCH_ENTRY,
  211. SRC_IP_63_32));
  212. tuple_info->src_ip_31_0 =
  213. qdf_ntohl(HAL_GET_FLD(hal_fse,
  214. RX_FLOW_SEARCH_ENTRY,
  215. SRC_IP_31_0));
  216. tuple_info->dest_ip_127_96 =
  217. qdf_ntohl(HAL_GET_FLD(hal_fse,
  218. RX_FLOW_SEARCH_ENTRY,
  219. DEST_IP_127_96));
  220. tuple_info->dest_ip_95_64 =
  221. qdf_ntohl(HAL_GET_FLD(hal_fse,
  222. RX_FLOW_SEARCH_ENTRY,
  223. DEST_IP_95_64));
  224. tuple_info->dest_ip_63_32 =
  225. qdf_ntohl(HAL_GET_FLD(hal_fse,
  226. RX_FLOW_SEARCH_ENTRY,
  227. DEST_IP_63_32));
  228. tuple_info->dest_ip_31_0 =
  229. qdf_ntohl(HAL_GET_FLD(hal_fse,
  230. RX_FLOW_SEARCH_ENTRY,
  231. DEST_IP_31_0));
  232. tuple_info->dest_port = HAL_GET_FLD(hal_fse,
  233. RX_FLOW_SEARCH_ENTRY,
  234. DEST_PORT);
  235. tuple_info->src_port = HAL_GET_FLD(hal_fse,
  236. RX_FLOW_SEARCH_ENTRY,
  237. SRC_PORT);
  238. tuple_info->l4_protocol = HAL_GET_FLD(hal_fse,
  239. RX_FLOW_SEARCH_ENTRY,
  240. L4_PROTOCOL);
  241. return hal_fse;
  242. }
  243. /**
  244. * hal_rx_flow_delete_entry_be() - Setup a flow search entry in HW FST
  245. * @fst: Pointer to the Rx Flow Search Table
  246. * @hal_rx_fse: Pointer to the Rx Flow that is to be deleted from the FST
  247. *
  248. * Return: Success/Failure
  249. */
  250. static QDF_STATUS
  251. hal_rx_flow_delete_entry_be(uint8_t *rx_fst, void *hal_rx_fse)
  252. {
  253. uint8_t *fse = (uint8_t *)hal_rx_fse;
  254. if (!HAL_GET_FLD(fse, RX_FLOW_SEARCH_ENTRY, VALID))
  255. return QDF_STATUS_E_NOENT;
  256. HAL_CLR_FLD(fse, RX_FLOW_SEARCH_ENTRY, VALID);
  257. return QDF_STATUS_SUCCESS;
  258. }
  259. /**
  260. * hal_rx_fst_get_fse_size_be() - Retrieve the size of each entry in Rx FST
  261. *
  262. * Return: size of each entry/flow in Rx FST
  263. */
  264. static inline uint32_t
  265. hal_rx_fst_get_fse_size_be(void)
  266. {
  267. return HAL_RX_FST_ENTRY_SIZE;
  268. }
  269. /*
  270. * TX MONITOR
  271. */
  272. #ifdef QCA_MONITOR_2_0_SUPPORT
  273. /**
  274. * hal_txmon_get_buffer_addr_generic_be() - api to get buffer address
  275. * @tx_tlv: pointer to TLV header
  276. * @status: hal mon buffer address status
  277. *
  278. * Return: Address to qdf_frag_t
  279. */
  280. static inline qdf_frag_t
  281. hal_txmon_get_buffer_addr_generic_be(void *tx_tlv,
  282. struct hal_mon_buf_addr_status *status)
  283. {
  284. struct mon_buffer_addr *hal_buffer_addr =
  285. (struct mon_buffer_addr *)((uint8_t *)tx_tlv +
  286. HAL_RX_TLV64_HDR_SIZE);
  287. qdf_frag_t buf_addr = NULL;
  288. buf_addr = (qdf_frag_t)(uintptr_t)((hal_buffer_addr->buffer_virt_addr_31_0 |
  289. ((unsigned long long)hal_buffer_addr->buffer_virt_addr_63_32 <<
  290. 32)));
  291. /* qdf_frag_t is derived from buffer address tlv */
  292. if (qdf_unlikely(status)) {
  293. qdf_mem_copy(status,
  294. (uint8_t *)tx_tlv + HAL_RX_TLV64_HDR_SIZE,
  295. sizeof(struct hal_mon_buf_addr_status));
  296. /* update hal_mon_buf_addr_status */
  297. }
  298. return buf_addr;
  299. }
  300. #if defined(TX_MONITOR_WORD_MASK)
  301. /**
  302. * hal_txmon_get_num_users() - get num users from tx_fes_setup tlv
  303. *
  304. * @tx_tlv: pointer to tx_fes_setup tlv header
  305. *
  306. * Return: number of users
  307. */
  308. static inline uint8_t
  309. hal_txmon_get_num_users(void *tx_tlv)
  310. {
  311. hal_tx_fes_setup_t *tx_fes_setup = (hal_tx_fes_setup_t *)tx_tlv;
  312. return tx_fes_setup->number_of_users;
  313. }
  314. /**
  315. * hal_txmon_parse_tx_fes_setup() - parse tx_fes_setup tlv
  316. *
  317. * @tx_tlv: pointer to tx_fes_setup tlv header
  318. * @ppdu_info: pointer to hal_tx_ppdu_info
  319. *
  320. * Return: void
  321. */
  322. static inline void
  323. hal_txmon_parse_tx_fes_setup(void *tx_tlv,
  324. struct hal_tx_ppdu_info *tx_ppdu_info)
  325. {
  326. hal_tx_fes_setup_t *tx_fes_setup = (hal_tx_fes_setup_t *)tx_tlv;
  327. tx_ppdu_info->num_users = tx_fes_setup->number_of_users;
  328. if (tx_ppdu_info->num_users == 0)
  329. tx_ppdu_info->num_users = 1;
  330. tx_ppdu_info->ppdu_id = tx_fes_setup->schedule_id;
  331. }
  332. /**
  333. * hal_txmon_parse_pcu_ppdu_setup_init() - parse pcu_ppdu_setup_init tlv
  334. *
  335. * @tx_tlv: pointer to pcu_ppdu_setup_init tlv header
  336. * @data_status_info: pointer to data hal_tx_status_info
  337. * @prot_status_info: pointer to protection hal_tx_status_info
  338. *
  339. * Return: void
  340. */
  341. static inline void
  342. hal_txmon_parse_pcu_ppdu_setup_init(void *tx_tlv,
  343. struct hal_tx_status_info *data_status_info,
  344. struct hal_tx_status_info *prot_status_info)
  345. {
  346. }
  347. /**
  348. * hal_txmon_parse_peer_entry() - parse peer entry tlv
  349. *
  350. * @tx_tlv: pointer to peer_entry tlv header
  351. * @user_id: user_id
  352. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  353. * @tx_status_info: pointer to hal_tx_status_info
  354. *
  355. * Return: void
  356. */
  357. static inline void
  358. hal_txmon_parse_peer_entry(void *tx_tlv,
  359. uint8_t user_id,
  360. struct hal_tx_ppdu_info *tx_ppdu_info,
  361. struct hal_tx_status_info *tx_status_info)
  362. {
  363. }
  364. /**
  365. * hal_txmon_parse_queue_exten() - parse queue exten tlv
  366. *
  367. * @tx_tlv: pointer to queue exten tlv header
  368. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  369. *
  370. * Return: void
  371. */
  372. static inline void
  373. hal_txmon_parse_queue_exten(void *tx_tlv,
  374. struct hal_tx_ppdu_info *tx_ppdu_info)
  375. {
  376. }
  377. /**
  378. * hal_txmon_parse_mpdu_start() - parse mpdu start tlv
  379. *
  380. * @tx_tlv: pointer to mpdu start tlv header
  381. * @user_id: user id
  382. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  383. *
  384. * Return: void
  385. */
  386. static inline void
  387. hal_txmon_parse_mpdu_start(void *tx_tlv, uint8_t user_id,
  388. struct hal_tx_ppdu_info *tx_ppdu_info)
  389. {
  390. }
  391. #else
  392. /**
  393. * hal_txmon_get_num_users() - get num users from tx_fes_setup tlv
  394. *
  395. * @tx_tlv: pointer to tx_fes_setup tlv header
  396. *
  397. * Return: number of users
  398. */
  399. static inline uint8_t
  400. hal_txmon_get_num_users(void *tx_tlv)
  401. {
  402. uint8_t num_users = HAL_TX_DESC_GET_64(tx_tlv,
  403. TX_FES_SETUP, NUMBER_OF_USERS);
  404. return num_users;
  405. }
  406. /**
  407. * hal_txmon_parse_tx_fes_setup() - parse tx_fes_setup tlv
  408. *
  409. * @tx_tlv: pointer to tx_fes_setup tlv header
  410. * @ppdu_info: pointer to hal_tx_ppdu_info
  411. *
  412. * Return: void
  413. */
  414. static inline void
  415. hal_txmon_parse_tx_fes_setup(void *tx_tlv,
  416. struct hal_tx_ppdu_info *tx_ppdu_info)
  417. {
  418. uint32_t num_users = 0;
  419. uint32_t ppdu_id = 0;
  420. num_users = HAL_TX_DESC_GET_64(tx_tlv, TX_FES_SETUP, NUMBER_OF_USERS);
  421. ppdu_id = HAL_TX_DESC_GET_64(tx_tlv, TX_FES_SETUP, SCHEDULE_ID);
  422. if (num_users == 0)
  423. num_users = 1;
  424. tx_ppdu_info->num_users = num_users;
  425. tx_ppdu_info->ppdu_id = ppdu_id;
  426. }
  427. /**
  428. * hal_txmon_parse_pcu_ppdu_setup_init() - parse pcu_ppdu_setup_init tlv
  429. *
  430. * @tx_tlv: pointer to pcu_ppdu_setup_init tlv header
  431. * @data_status_info: pointer to data hal_tx_status_info
  432. * @prot_status_info: pointer to protection hal_tx_status_info
  433. *
  434. * Return: void
  435. */
  436. static inline void
  437. hal_txmon_parse_pcu_ppdu_setup_init(void *tx_tlv,
  438. struct hal_tx_status_info *data_status_info,
  439. struct hal_tx_status_info *prot_status_info)
  440. {
  441. }
  442. /**
  443. * hal_txmon_parse_peer_entry() - parse peer entry tlv
  444. *
  445. * @tx_tlv: pointer to peer_entry tlv header
  446. * @user_id: user_id
  447. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  448. * @tx_status_info: pointer to hal_tx_status_info
  449. *
  450. * Return: void
  451. */
  452. static inline void
  453. hal_txmon_parse_peer_entry(void *tx_tlv,
  454. uint8_t user_id,
  455. struct hal_tx_ppdu_info *tx_ppdu_info,
  456. struct hal_tx_status_info *tx_status_info)
  457. {
  458. }
  459. /**
  460. * hal_txmon_parse_queue_exten() - parse queue exten tlv
  461. *
  462. * @tx_tlv: pointer to queue exten tlv header
  463. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  464. *
  465. * Return: void
  466. */
  467. static inline void
  468. hal_txmon_parse_queue_exten(void *tx_tlv,
  469. struct hal_tx_ppdu_info *tx_ppdu_info)
  470. {
  471. }
  472. /**
  473. * hal_txmon_parse_mpdu_start() - parse mpdu start tlv
  474. *
  475. * @tx_tlv: pointer to mpdu start tlv header
  476. * @user_id: user id
  477. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  478. *
  479. * Return: void
  480. */
  481. static inline void
  482. hal_txmon_parse_mpdu_start(void *tx_tlv, uint8_t user_id,
  483. struct hal_tx_ppdu_info *tx_ppdu_info)
  484. {
  485. }
  486. #endif
  487. /**
  488. * hal_txmon_status_get_num_users_generic_be() - api to get num users
  489. * from start of fes window
  490. *
  491. * @tx_tlv_hdr: pointer to TLV header
  492. * @num_users: reference to number of user
  493. *
  494. * Return: status
  495. */
  496. static inline uint32_t
  497. hal_txmon_status_get_num_users_generic_be(void *tx_tlv_hdr, uint8_t *num_users)
  498. {
  499. uint32_t tlv_tag, user_id, tlv_len;
  500. uint32_t tlv_status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  501. void *tx_tlv;
  502. tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(tx_tlv_hdr);
  503. user_id = HAL_RX_GET_USER_TLV32_USERID(tx_tlv_hdr);
  504. tlv_len = HAL_RX_GET_USER_TLV32_LEN(tx_tlv_hdr);
  505. tx_tlv = (uint8_t *)tx_tlv_hdr + HAL_RX_TLV64_HDR_SIZE;
  506. /* window starts with either initiator or response */
  507. switch (tlv_tag) {
  508. case WIFITX_FES_SETUP_E:
  509. {
  510. *num_users = hal_txmon_get_num_users(tx_tlv);
  511. if (*num_users == 0)
  512. *num_users = 1;
  513. tlv_status = HAL_MON_TX_FES_SETUP;
  514. break;
  515. }
  516. case WIFIRX_RESPONSE_REQUIRED_INFO_E:
  517. {
  518. *num_users = HAL_TX_DESC_GET_64(tx_tlv,
  519. RX_RESPONSE_REQUIRED_INFO,
  520. RESPONSE_STA_COUNT);
  521. if (*num_users == 0)
  522. *num_users = 1;
  523. tlv_status = HAL_MON_RX_RESPONSE_REQUIRED_INFO;
  524. break;
  525. }
  526. };
  527. return tlv_status;
  528. }
  529. /**
  530. * hal_txmon_free_status_buffer() - api to free status buffer
  531. * @pdev_handle: DP_PDEV handle
  532. * @status_frag: qdf_frag_t buffer
  533. * @end_offset: end offset within buffer that has valid data
  534. *
  535. * Return status
  536. */
  537. static inline QDF_STATUS
  538. hal_txmon_status_free_buffer_generic_be(qdf_frag_t status_frag,
  539. uint32_t end_offset)
  540. {
  541. uint32_t tlv_tag, tlv_len;
  542. uint32_t tlv_status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  543. uint8_t *tx_tlv;
  544. uint8_t *tx_tlv_start;
  545. qdf_frag_t frag_buf = NULL;
  546. QDF_STATUS status = QDF_STATUS_E_ABORTED;
  547. tx_tlv = (uint8_t *)status_frag;
  548. tx_tlv_start = tx_tlv;
  549. /* parse tlv and populate tx_ppdu_info */
  550. do {
  551. tlv_tag = HAL_RX_GET_USER_TLV64_TYPE(tx_tlv);
  552. tlv_len = HAL_RX_GET_USER_TLV64_LEN(tx_tlv);
  553. if (((tx_tlv - tx_tlv_start) + tlv_len) > end_offset)
  554. return QDF_STATUS_E_ABORTED;
  555. if (tlv_tag == WIFIMON_BUFFER_ADDR_E) {
  556. frag_buf = hal_txmon_get_buffer_addr_generic_be(tx_tlv,
  557. NULL);
  558. if (frag_buf)
  559. qdf_frag_free(frag_buf);
  560. frag_buf = NULL;
  561. }
  562. if (WIFITX_FES_STATUS_END_E == tlv_tag ||
  563. WIFIRESPONSE_END_STATUS_E == tlv_tag ||
  564. WIFIDUMMY_E == tlv_tag) {
  565. status = QDF_STATUS_SUCCESS;
  566. break;
  567. }
  568. /* need api definition for hal_tx_status_get_next_tlv */
  569. tx_tlv = hal_tx_status_get_next_tlv(tx_tlv);
  570. if ((tx_tlv - tx_tlv_start) >= end_offset)
  571. break;
  572. } while (tlv_status == HAL_MON_TX_STATUS_PPDU_NOT_DONE);
  573. return status;
  574. }
  575. /**
  576. * hal_tx_get_ppdu_info() - api to get tx ppdu info
  577. * @pdev_handle: DP_PDEV handle
  578. * @prot_ppdu_info: populate dp_ppdu_info protection
  579. * @tx_data_ppdu_info: populate dp_ppdu_info data
  580. * @tlv_tag: Tag
  581. *
  582. * Return: dp_tx_ppdu_info pointer
  583. */
  584. static inline void *
  585. hal_tx_get_ppdu_info(void *data_info, void *prot_info, uint32_t tlv_tag)
  586. {
  587. struct hal_tx_ppdu_info *prot_ppdu_info = prot_info;
  588. switch (tlv_tag) {
  589. case WIFITX_FES_SETUP_E:/* DOWNSTREAM */
  590. case WIFITX_FLUSH_E:/* DOWNSTREAM */
  591. case WIFIPCU_PPDU_SETUP_INIT_E:/* DOWNSTREAM */
  592. case WIFITX_PEER_ENTRY_E:/* DOWNSTREAM */
  593. case WIFITX_QUEUE_EXTENSION_E:/* DOWNSTREAM */
  594. case WIFITX_MPDU_START_E:/* DOWNSTREAM */
  595. case WIFITX_MSDU_START_E:/* DOWNSTREAM */
  596. case WIFITX_DATA_E:/* DOWNSTREAM */
  597. case WIFIMON_BUFFER_ADDR_E:/* DOWNSTREAM */
  598. case WIFITX_MPDU_END_E:/* DOWNSTREAM */
  599. case WIFITX_MSDU_END_E:/* DOWNSTREAM */
  600. case WIFITX_LAST_MPDU_FETCHED_E:/* DOWNSTREAM */
  601. case WIFITX_LAST_MPDU_END_E:/* DOWNSTREAM */
  602. case WIFICOEX_TX_REQ_E:/* DOWNSTREAM */
  603. case WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E:/* DOWNSTREAM */
  604. case WIFINDP_PREAMBLE_DONE_E:/* DOWNSTREAM */
  605. case WIFISCH_CRITICAL_TLV_REFERENCE_E:/* DOWNSTREAM */
  606. case WIFITX_LOOPBACK_SETUP_E:/* DOWNSTREAM */
  607. case WIFITX_FES_SETUP_COMPLETE_E:/* DOWNSTREAM */
  608. case WIFITQM_MPDU_GLOBAL_START_E:/* DOWNSTREAM */
  609. case WIFITX_WUR_DATA_E:/* DOWNSTREAM */
  610. case WIFISCHEDULER_END_E:/* DOWNSTREAM */
  611. case WIFITX_FES_STATUS_START_PPDU_E:/* UPSTREAM */
  612. {
  613. return data_info;
  614. }
  615. }
  616. /*
  617. * check current prot_tlv_status is start protection
  618. * check current tlv_tag is either start protection or end protection
  619. */
  620. if (TXMON_HAL(prot_ppdu_info,
  621. prot_tlv_status) == WIFITX_FES_STATUS_START_PROT_E) {
  622. return prot_info;
  623. } else if (tlv_tag == WIFITX_FES_STATUS_PROT_E ||
  624. tlv_tag == WIFITX_FES_STATUS_START_PROT_E) {
  625. TXMON_HAL(prot_ppdu_info, prot_tlv_status) = tlv_tag;
  626. return prot_info;
  627. } else {
  628. TXMON_HAL(prot_ppdu_info, prot_tlv_status) = tlv_tag;
  629. return data_info;
  630. }
  631. return data_info;
  632. }
  633. /**
  634. * hal_txmon_status_parse_tlv_generic_be() - api to parse status tlv.
  635. * @data_ppdu_info: hal_txmon data ppdu info
  636. * @prot_ppdu_info: hal_txmon prot ppdu info
  637. * @data_status_info: pointer to data status info
  638. * @prot_status_info: pointer to prot status info
  639. * @tx_tlv_hdr: fragment of tx_tlv_hdr
  640. * @status_frag: qdf_frag_t buffer
  641. *
  642. * Return: status
  643. */
  644. static inline uint32_t
  645. hal_txmon_status_parse_tlv_generic_be(void *data_ppdu_info,
  646. void *prot_ppdu_info,
  647. void *data_status_info,
  648. void *prot_status_info,
  649. void *tx_tlv_hdr,
  650. qdf_frag_t status_frag)
  651. {
  652. struct hal_tx_ppdu_info *ppdu_info;
  653. struct hal_tx_status_info *tx_status_info;
  654. uint32_t tlv_tag, user_id, tlv_len;
  655. qdf_frag_t frag_buf = NULL;
  656. uint32_t status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  657. void *tx_tlv;
  658. tlv_tag = HAL_RX_GET_USER_TLV64_TYPE(tx_tlv_hdr);
  659. /* user_id start with 1, decrement by 1 to start from 0 */
  660. user_id = HAL_RX_GET_USER_TLV64_USERID(tx_tlv_hdr) - 1;
  661. tlv_len = HAL_RX_GET_USER_TLV64_LEN(tx_tlv_hdr);
  662. tx_tlv = (uint8_t *)tx_tlv_hdr + HAL_RX_TLV64_HDR_SIZE;
  663. /* parse tlv and populate tx_ppdu_info */
  664. ppdu_info = hal_tx_get_ppdu_info(data_ppdu_info,
  665. prot_ppdu_info, tlv_tag);
  666. tx_status_info = (ppdu_info->is_data ? data_status_info :
  667. prot_status_info);
  668. user_id = user_id > ppdu_info->num_users ? 0 : ppdu_info->num_users;
  669. switch (tlv_tag) {
  670. /* start of initiator FES window */
  671. case WIFITX_FES_SETUP_E:/* DOWNSTREAM */
  672. {
  673. /* initiator PPDU window start */
  674. hal_txmon_parse_tx_fes_setup(tx_tlv, ppdu_info);
  675. status = HAL_MON_TX_FES_SETUP;
  676. SHOW_DEFINED(WIFITX_FES_SETUP_E);
  677. break;
  678. }
  679. /* end of initiator FES window */
  680. case WIFITX_FES_STATUS_END_E:/* UPSTREAM */
  681. {
  682. /* initiator PPDU window end */
  683. status = HAL_MON_TX_FES_STATUS_END;
  684. SHOW_DEFINED(WIFITX_FES_STATUS_END_E);
  685. break;
  686. }
  687. /* response window open */
  688. case WIFIRX_RESPONSE_REQUIRED_INFO_E:/* UPSTREAM */
  689. {
  690. status = HAL_MON_RX_RESPONSE_REQUIRED_INFO;
  691. SHOW_DEFINED(WIFIRX_RESPONSE_REQUIRED_INFO_E);
  692. break;
  693. }
  694. /* Response window close */
  695. case WIFIRESPONSE_END_STATUS_E:/* UPSTREAM */
  696. {
  697. /* response PPDU window end */
  698. status = HAL_MON_RESPONSE_END_STATUS_INFO;
  699. SHOW_DEFINED(WIFIRESPONSE_END_STATUS_E);
  700. break;
  701. }
  702. case WIFITX_FLUSH_E:/* DOWNSTREAM */
  703. {
  704. SHOW_DEFINED(WIFITX_FLUSH_E);
  705. break;
  706. }
  707. /* Downstream tlv */
  708. case WIFIPCU_PPDU_SETUP_INIT_E:/* DOWNSTREAM */
  709. {
  710. hal_txmon_parse_pcu_ppdu_setup_init(tx_tlv, data_status_info,
  711. prot_status_info);
  712. status = HAL_MON_TX_PCU_PPDU_SETUP_INIT;
  713. SHOW_DEFINED(WIFIPCU_PPDU_SETUP_INIT_E);
  714. break;
  715. }
  716. case WIFITX_PEER_ENTRY_E:/* DOWNSTREAM */
  717. {
  718. hal_txmon_parse_peer_entry(tx_tlv, user_id,
  719. ppdu_info, tx_status_info);
  720. SHOW_DEFINED(WIFITX_PEER_ENTRY_E);
  721. break;
  722. }
  723. case WIFITX_QUEUE_EXTENSION_E:/* DOWNSTREAM */
  724. {
  725. status = HAL_MON_TX_QUEUE_EXTENSION;
  726. hal_txmon_parse_queue_exten(tx_tlv, ppdu_info);
  727. SHOW_DEFINED(WIFITX_QUEUE_EXTENSION_E);
  728. break;
  729. }
  730. /* payload and data frame handling */
  731. case WIFITX_MPDU_START_E:/* DOWNSTREAM */
  732. {
  733. hal_txmon_parse_mpdu_start(tx_tlv, user_id, ppdu_info);
  734. status = HAL_MON_TX_MPDU_START;
  735. SHOW_DEFINED(WIFITX_MPDU_START_E);
  736. break;
  737. }
  738. case WIFITX_MSDU_START_E:/* DOWNSTREAM */
  739. {
  740. /* compacted */
  741. /* we expect frame to be 802.11 frame type */
  742. status = HAL_MON_TX_MSDU_START;
  743. SHOW_DEFINED(WIFITX_MSDU_START_E);
  744. break;
  745. }
  746. case WIFITX_DATA_E:/* DOWNSTREAM */
  747. {
  748. /*
  749. * reference of the status buffer will be held in
  750. * dp_tx_update_ppdu_info_status()
  751. */
  752. status = HAL_MON_TX_DATA;
  753. SHOW_DEFINED(WIFITX_DATA_E);
  754. break;
  755. }
  756. case WIFIMON_BUFFER_ADDR_E:
  757. {
  758. frag_buf = hal_txmon_get_buffer_addr_generic_be(tx_tlv, NULL);
  759. if (frag_buf)
  760. qdf_frag_free(frag_buf);
  761. frag_buf = NULL;
  762. status = HAL_MON_TX_BUFFER_ADDR;
  763. SHOW_DEFINED(WIFIMON_BUFFER_ADDR_E);
  764. break;
  765. }
  766. case WIFITX_MPDU_END_E:/* DOWNSTREAM */
  767. {
  768. /* no tlv content */
  769. SHOW_DEFINED(WIFITX_MPDU_END_E);
  770. break;
  771. }
  772. case WIFITX_MSDU_END_E:/* DOWNSTREAM */
  773. {
  774. /* no tlv content */
  775. SHOW_DEFINED(WIFITX_MSDU_END_E);
  776. break;
  777. }
  778. case WIFITX_LAST_MPDU_FETCHED_E:/* DOWNSTREAM */
  779. {
  780. /* no tlv content */
  781. SHOW_DEFINED(WIFITX_LAST_MPDU_FETCHED_E);
  782. break;
  783. }
  784. case WIFITX_LAST_MPDU_END_E:/* DOWNSTREAM */
  785. {
  786. /* no tlv content */
  787. SHOW_DEFINED(WIFITX_LAST_MPDU_END_E);
  788. break;
  789. }
  790. case WIFICOEX_TX_REQ_E:/* DOWNSTREAM */
  791. {
  792. /*
  793. * transmitting power
  794. * minimum transmitting power
  795. * desired nss
  796. * tx chain mask
  797. * desired bw
  798. * duration of transmit and response
  799. *
  800. * since most of the field we are deriving from other tlv
  801. * we don't need to enable this in our tlv.
  802. */
  803. SHOW_DEFINED(WIFICOEX_TX_REQ_E);
  804. break;
  805. }
  806. case WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E:/* DOWNSTREAM */
  807. {
  808. /* user tlv */
  809. /*
  810. * All Tx monitor will have 802.11 hdr
  811. * we don't need to enable this TLV
  812. */
  813. SHOW_DEFINED(WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E);
  814. break;
  815. }
  816. case WIFINDP_PREAMBLE_DONE_E:/* DOWNSTREAM */
  817. {
  818. /*
  819. * no tlv content
  820. *
  821. * TLV that indicates to TXPCU that preamble phase for the NDP
  822. * frame transmission is now over
  823. */
  824. SHOW_DEFINED(WIFINDP_PREAMBLE_DONE_E);
  825. break;
  826. }
  827. case WIFISCH_CRITICAL_TLV_REFERENCE_E:/* DOWNSTREAM */
  828. {
  829. /*
  830. * no tlv content
  831. *
  832. * TLV indicates to the SCH that all timing critical TLV
  833. * has been passed on to the transmit path
  834. */
  835. SHOW_DEFINED(WIFISCH_CRITICAL_TLV_REFERENCE_E);
  836. break;
  837. }
  838. case WIFITX_LOOPBACK_SETUP_E:/* DOWNSTREAM */
  839. {
  840. /*
  841. * Loopback specific setup info - not needed for Tx monitor
  842. */
  843. SHOW_DEFINED(WIFITX_LOOPBACK_SETUP_E);
  844. break;
  845. }
  846. case WIFITX_FES_SETUP_COMPLETE_E:/* DOWNSTREAM */
  847. {
  848. /*
  849. * no tlv content
  850. *
  851. * TLV indicates that other modules besides the scheduler can
  852. * now also start generating TLV's
  853. * prevent colliding or generating TLV's out of order
  854. */
  855. SHOW_DEFINED(WIFITX_FES_SETUP_COMPLETE_E);
  856. break;
  857. }
  858. case WIFITQM_MPDU_GLOBAL_START_E:/* DOWNSTREAM */
  859. {
  860. /*
  861. * no tlv content
  862. *
  863. * TLV indicates to SCH that a burst of MPDU info will
  864. * start to come in over the TLV
  865. */
  866. SHOW_DEFINED(WIFITQM_MPDU_GLOBAL_START_E);
  867. break;
  868. }
  869. case WIFITX_WUR_DATA_E:/* DOWNSTREAM */
  870. {
  871. SHOW_DEFINED(WIFITX_WUR_DATA_E);
  872. break;
  873. }
  874. case WIFISCHEDULER_END_E:/* DOWNSTREAM */
  875. {
  876. /*
  877. * no tlv content
  878. *
  879. * TLV indicates END of all TLV's within the scheduler TLV
  880. */
  881. SHOW_DEFINED(WIFISCHEDULER_END_E);
  882. break;
  883. }
  884. /* Upstream tlv */
  885. case WIFIPDG_TX_REQ_E:
  886. {
  887. SHOW_DEFINED(WIFIPDG_TX_REQ_E);
  888. break;
  889. }
  890. case WIFITX_FES_STATUS_START_E:
  891. {
  892. /*
  893. * TLV indicating that first transmission on the medium
  894. */
  895. status = HAL_MON_TX_FES_STATUS_START;
  896. SHOW_DEFINED(WIFITX_FES_STATUS_START_E);
  897. break;
  898. }
  899. case WIFITX_FES_STATUS_PROT_E:
  900. {
  901. /*
  902. * generated by TXPCU to indicate the result of having
  903. * received of the expected protection frame
  904. */
  905. status = HAL_MON_TX_FES_STATUS_PROT;
  906. SHOW_DEFINED(WIFITX_FES_STATUS_PROT_E);
  907. break;
  908. }
  909. case WIFITX_FES_STATUS_START_PROT_E:
  910. {
  911. status = HAL_MON_TX_FES_STATUS_START_PROT;
  912. SHOW_DEFINED(WIFITX_FES_STATUS_START_PROT_E);
  913. break;
  914. }
  915. case WIFIPROT_TX_END_E:
  916. {
  917. /*
  918. * no tlv content
  919. *
  920. * generated by TXPCU the moment that protection frame
  921. * transmission has finished on the medium
  922. */
  923. SHOW_DEFINED(WIFIPROT_TX_END_E);
  924. break;
  925. }
  926. case WIFITX_FES_STATUS_START_PPDU_E:
  927. {
  928. status = HAL_MON_TX_FES_STATUS_START_PPDU;
  929. SHOW_DEFINED(WIFITX_FES_STATUS_START_PPDU_E);
  930. break;
  931. }
  932. case WIFITX_FES_STATUS_USER_PPDU_E:
  933. {
  934. /* user tlv */
  935. status = HAL_MON_TX_FES_STATUS_USER_PPDU;
  936. SHOW_DEFINED(WIFITX_FES_STATUS_USER_PPDU_E);
  937. break;
  938. }
  939. case WIFIPPDU_TX_END_E:
  940. {
  941. /*
  942. * no tlv content
  943. *
  944. * generated by TXPCU the moment that PPDU transmission has
  945. * finished on the medium
  946. */
  947. SHOW_DEFINED(WIFIPPDU_TX_END_E);
  948. break;
  949. }
  950. case WIFITX_FES_STATUS_USER_RESPONSE_E:
  951. {
  952. /*
  953. * TLV contains the FES transmit result of the each
  954. * of the MAC users. TLV are forwarded to HWSCH
  955. */
  956. SHOW_DEFINED(WIFITX_FES_STATUS_USER_RESPONSE_E);
  957. break;
  958. }
  959. case WIFITX_FES_STATUS_ACK_OR_BA_E:
  960. {
  961. /* user tlv */
  962. /*
  963. * TLV generated by RXPCU and provide information related to
  964. * the received BA or ACK frame
  965. */
  966. SHOW_DEFINED(WIFITX_FES_STATUS_ACK_OR_BA_E);
  967. break;
  968. }
  969. case WIFITX_FES_STATUS_1K_BA_E:
  970. {
  971. /* user tlv */
  972. /*
  973. * TLV generated by RXPCU and providing information related
  974. * to the received BA frame in case of 512/1024 bitmaps
  975. */
  976. SHOW_DEFINED(WIFITX_FES_STATUS_1K_BA_E);
  977. break;
  978. }
  979. case WIFIRECEIVED_RESPONSE_USER_7_0_E:
  980. {
  981. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_7_0_E);
  982. break;
  983. }
  984. case WIFIRECEIVED_RESPONSE_USER_15_8_E:
  985. {
  986. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_15_8_E);
  987. break;
  988. }
  989. case WIFIRECEIVED_RESPONSE_USER_23_16_E:
  990. {
  991. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_23_16_E);
  992. break;
  993. }
  994. case WIFIRECEIVED_RESPONSE_USER_31_24_E:
  995. {
  996. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_31_24_E);
  997. break;
  998. }
  999. case WIFIRECEIVED_RESPONSE_USER_36_32_E:
  1000. {
  1001. /*
  1002. * RXPCU generates this TLV when it receives a response frame
  1003. * that TXPCU pre-announced it was waiting for and in
  1004. * RXPCU_SETUP TLV, TLV generated before the
  1005. * RECEIVED_RESPONSE_INFO TLV.
  1006. *
  1007. * received info user fields are there which is not needed
  1008. * for TX monitor
  1009. */
  1010. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_36_32_E);
  1011. break;
  1012. }
  1013. case WIFITXPCU_BUFFER_STATUS_E:
  1014. {
  1015. SHOW_DEFINED(WIFITXPCU_BUFFER_STATUS_E);
  1016. break;
  1017. }
  1018. case WIFITXPCU_USER_BUFFER_STATUS_E:
  1019. {
  1020. /*
  1021. * WIFITXPCU_USER_BUFFER_STATUS_E - user tlv
  1022. * for TX monitor we aren't interested in this tlv
  1023. */
  1024. SHOW_DEFINED(WIFITXPCU_USER_BUFFER_STATUS_E);
  1025. break;
  1026. }
  1027. case WIFITXDMA_STOP_REQUEST_E:
  1028. {
  1029. /*
  1030. * no tlv content
  1031. *
  1032. * TLV is destined to TXDMA and informs TXDMA to stop
  1033. * pushing data into the transmit path.
  1034. */
  1035. SHOW_DEFINED(WIFITXDMA_STOP_REQUEST_E);
  1036. break;
  1037. }
  1038. case WIFITX_CBF_INFO_E:
  1039. {
  1040. /*
  1041. * After NDPA + NDP is received, RXPCU sends the TX_CBF_INFO to
  1042. * TXPCU to respond the CBF frame
  1043. *
  1044. * compressed beamforming pkt doesn't has mac header
  1045. * Tx monitor not interested in this pkt.
  1046. */
  1047. SHOW_DEFINED(WIFITX_CBF_INFO_E);
  1048. break;
  1049. }
  1050. case WIFITX_MPDU_COUNT_TRANSFER_END_E:
  1051. {
  1052. /*
  1053. * no tlv content
  1054. *
  1055. * TLV indicates that TXPCU has finished generating the
  1056. * TQM_UPDATE_TX_MPDU_COUNT TLV for all users
  1057. */
  1058. SHOW_DEFINED(WIFITX_MPDU_COUNT_TRANSFER_END_E);
  1059. break;
  1060. }
  1061. case WIFIPDG_RESPONSE_E:
  1062. {
  1063. /*
  1064. * most of the feilds are already covered in
  1065. * other TLV
  1066. * This is generated by TX_PCU to PDG to calculate
  1067. * all the PHY header info.
  1068. *
  1069. * some useful fields like min transmit power,
  1070. * rate used for transmitting packet is present.
  1071. */
  1072. SHOW_DEFINED(WIFIPDG_RESPONSE_E);
  1073. break;
  1074. }
  1075. case WIFIPDG_TRIG_RESPONSE_E:
  1076. {
  1077. /* no tlv content */
  1078. SHOW_DEFINED(WIFIPDG_TRIG_RESPONSE_E);
  1079. break;
  1080. }
  1081. case WIFIRECEIVED_TRIGGER_INFO_E:
  1082. {
  1083. /*
  1084. * TLV generated by RXPCU to inform the scheduler that
  1085. * a trigger frame has been received
  1086. */
  1087. SHOW_DEFINED(WIFIRECEIVED_TRIGGER_INFO_E);
  1088. break;
  1089. }
  1090. case WIFIOFDMA_TRIGGER_DETAILS_E:
  1091. {
  1092. SHOW_DEFINED(WIFIOFDMA_TRIGGER_DETAILS_E);
  1093. break;
  1094. }
  1095. case WIFIRX_FRAME_BITMAP_ACK_E:
  1096. {
  1097. /* user tlv */
  1098. status = HAL_MON_RX_FRAME_BITMAP_ACK;
  1099. SHOW_DEFINED(WIFIRX_FRAME_BITMAP_ACK_E);
  1100. break;
  1101. }
  1102. case WIFIRX_FRAME_1K_BITMAP_ACK_E:
  1103. {
  1104. /* user tlv */
  1105. status = HAL_MON_RX_FRAME_BITMAP_BLOCK_ACK_1K;
  1106. SHOW_DEFINED(WIFIRX_FRAME_1K_BITMAP_ACK_E);
  1107. break;
  1108. }
  1109. case WIFIRESPONSE_START_STATUS_E:
  1110. {
  1111. /*
  1112. * TLV indicates which HW response the TXPCU
  1113. * started generating
  1114. *
  1115. * HW generated frames like
  1116. * ACK frame - handled
  1117. * CTS frame - handled
  1118. * BA frame - handled
  1119. * MBA frame - handled
  1120. * CBF frame - no frame header
  1121. * Trigger response - TODO
  1122. * NDP LMR - no frame header
  1123. */
  1124. SHOW_DEFINED(WIFIRESPONSE_START_STATUS_E);
  1125. break;
  1126. }
  1127. case WIFIRX_START_PARAM_E:
  1128. {
  1129. /*
  1130. * RXPCU send this TLV after PHY RX detected a frame
  1131. * in the medium
  1132. *
  1133. * TX monitor not interested in this TLV
  1134. */
  1135. SHOW_DEFINED(WIFIRX_START_PARAM_E);
  1136. break;
  1137. }
  1138. case WIFIRXPCU_EARLY_RX_INDICATION_E:
  1139. {
  1140. /*
  1141. * early indication of pkt type and mcs rate
  1142. * already captured in other tlv
  1143. */
  1144. SHOW_DEFINED(WIFIRXPCU_EARLY_RX_INDICATION_E);
  1145. break;
  1146. }
  1147. case WIFIRX_PM_INFO_E:
  1148. {
  1149. SHOW_DEFINED(WIFIRX_PM_INFO_E);
  1150. break;
  1151. }
  1152. /* Active window */
  1153. case WIFITX_FLUSH_REQ_E:
  1154. {
  1155. SHOW_DEFINED(WIFITX_FLUSH_REQ_E);
  1156. break;
  1157. }
  1158. case WIFICOEX_TX_STATUS_E:
  1159. {
  1160. /* duration are retrieved from coex tx status */
  1161. status = HAL_MON_COEX_TX_STATUS;
  1162. SHOW_DEFINED(WIFICOEX_TX_STATUS_E);
  1163. break;
  1164. }
  1165. case WIFIR2R_STATUS_END_E:
  1166. {
  1167. SHOW_DEFINED(WIFIR2R_STATUS_END_E);
  1168. break;
  1169. }
  1170. case WIFIRX_PREAMBLE_E:
  1171. {
  1172. SHOW_DEFINED(WIFIRX_PREAMBLE_E);
  1173. break;
  1174. }
  1175. case WIFIMACTX_SERVICE_E:
  1176. {
  1177. SHOW_DEFINED(WIFIMACTX_SERVICE_E);
  1178. break;
  1179. }
  1180. case WIFIMACTX_U_SIG_EHT_SU_MU_E:
  1181. {
  1182. SHOW_DEFINED(WIFIMACTX_U_SIG_EHT_SU_MU_E);
  1183. break;
  1184. }
  1185. case WIFIMACTX_U_SIG_EHT_TB_E:
  1186. {
  1187. /* TODO: no radiotap info available */
  1188. SHOW_DEFINED(WIFIMACTX_U_SIG_EHT_TB_E);
  1189. break;
  1190. }
  1191. case WIFIMACTX_EHT_SIG_USR_OFDMA_E:
  1192. {
  1193. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_OFDMA_E);
  1194. break;
  1195. }
  1196. case WIFIMACTX_EHT_SIG_USR_MU_MIMO_E:
  1197. {
  1198. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_MU_MIMO_E);
  1199. break;
  1200. }
  1201. case WIFIMACTX_EHT_SIG_USR_SU_E:
  1202. {
  1203. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_SU_E);
  1204. /* TODO: no radiotap info available */
  1205. break;
  1206. }
  1207. case WIFIMACTX_HE_SIG_A_SU_E:
  1208. {
  1209. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_SU_E);
  1210. break;
  1211. }
  1212. case WIFIMACTX_HE_SIG_A_MU_DL_E:
  1213. {
  1214. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_MU_DL_E);
  1215. break;
  1216. }
  1217. case WIFIMACTX_HE_SIG_A_MU_UL_E:
  1218. {
  1219. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_MU_UL_E);
  1220. break;
  1221. }
  1222. case WIFIMACTX_HE_SIG_B1_MU_E:
  1223. {
  1224. status = HAL_MON_MACTX_HE_SIG_B1_MU;
  1225. SHOW_DEFINED(WIFIMACTX_HE_SIG_B1_MU_E);
  1226. break;
  1227. }
  1228. case WIFIMACTX_HE_SIG_B2_MU_E:
  1229. {
  1230. /* user tlv */
  1231. status = HAL_MON_MACTX_HE_SIG_B2_MU;
  1232. SHOW_DEFINED(WIFIMACTX_HE_SIG_B2_MU_E);
  1233. break;
  1234. }
  1235. case WIFIMACTX_HE_SIG_B2_OFDMA_E:
  1236. {
  1237. /* user tlv */
  1238. status = HAL_MON_MACTX_HE_SIG_B2_OFDMA;
  1239. SHOW_DEFINED(WIFIMACTX_HE_SIG_B2_OFDMA_E);
  1240. break;
  1241. }
  1242. case WIFIMACTX_L_SIG_A_E:
  1243. {
  1244. status = HAL_MON_MACTX_L_SIG_A;
  1245. SHOW_DEFINED(WIFIMACTX_L_SIG_A_E);
  1246. break;
  1247. }
  1248. case WIFIMACTX_L_SIG_B_E:
  1249. {
  1250. status = HAL_MON_MACTX_L_SIG_B;
  1251. SHOW_DEFINED(WIFIMACTX_L_SIG_B_E);
  1252. break;
  1253. }
  1254. case WIFIMACTX_HT_SIG_E:
  1255. {
  1256. status = HAL_MON_MACTX_HT_SIG;
  1257. SHOW_DEFINED(WIFIMACTX_HT_SIG_E);
  1258. break;
  1259. }
  1260. case WIFIMACTX_VHT_SIG_A_E:
  1261. {
  1262. status = HAL_MON_MACTX_VHT_SIG_A;
  1263. SHOW_DEFINED(WIFIMACTX_VHT_SIG_A_E);
  1264. break;
  1265. }
  1266. case WIFIMACTX_VHT_SIG_B_MU160_E:
  1267. {
  1268. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU160_E);
  1269. break;
  1270. }
  1271. case WIFIMACTX_VHT_SIG_B_MU80_E:
  1272. {
  1273. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU80_E);
  1274. break;
  1275. }
  1276. case WIFIMACTX_VHT_SIG_B_MU40_E:
  1277. {
  1278. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU40_E);
  1279. break;
  1280. }
  1281. case WIFIMACTX_VHT_SIG_B_MU20_E:
  1282. {
  1283. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU20_E);
  1284. break;
  1285. }
  1286. case WIFIMACTX_VHT_SIG_B_SU160_E:
  1287. {
  1288. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU160_E);
  1289. break;
  1290. }
  1291. case WIFIMACTX_VHT_SIG_B_SU80_E:
  1292. {
  1293. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU80_E);
  1294. break;
  1295. }
  1296. case WIFIMACTX_VHT_SIG_B_SU40_E:
  1297. {
  1298. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU40_E);
  1299. break;
  1300. }
  1301. case WIFIMACTX_VHT_SIG_B_SU20_E:
  1302. {
  1303. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU20_E);
  1304. break;
  1305. }
  1306. case WIFIPHYTX_PPDU_HEADER_INFO_REQUEST_E:
  1307. {
  1308. SHOW_DEFINED(WIFIPHYTX_PPDU_HEADER_INFO_REQUEST_E);
  1309. break;
  1310. }
  1311. case WIFIMACTX_USER_DESC_PER_USER_E:
  1312. {
  1313. status = HAL_MON_MACTX_USER_DESC_PER_USER;
  1314. SHOW_DEFINED(WIFIMACTX_USER_DESC_PER_USER_E);
  1315. break;
  1316. }
  1317. case WIFIMACTX_USER_DESC_COMMON_E:
  1318. {
  1319. SHOW_DEFINED(WIFIMACTX_USER_DESC_COMMON_E);
  1320. break;
  1321. }
  1322. case WIFIMACTX_PHY_DESC_E:
  1323. {
  1324. status = HAL_MON_MACTX_PHY_DESC;
  1325. SHOW_DEFINED(WIFIMACTX_PHY_DESC_E);
  1326. break;
  1327. }
  1328. case WIFICOEX_RX_STATUS_E:
  1329. {
  1330. SHOW_DEFINED(WIFICOEX_RX_STATUS_E);
  1331. break;
  1332. }
  1333. case WIFIRX_PPDU_ACK_REPORT_E:
  1334. {
  1335. SHOW_DEFINED(WIFIRX_PPDU_ACK_REPORT_E);
  1336. break;
  1337. }
  1338. case WIFIRX_PPDU_NO_ACK_REPORT_E:
  1339. {
  1340. SHOW_DEFINED(WIFIRX_PPDU_NO_ACK_REPORT_E);
  1341. break;
  1342. }
  1343. case WIFITXPCU_PHYTX_OTHER_TRANSMIT_INFO32_E:
  1344. {
  1345. SHOW_DEFINED(WIFITXPCU_PHYTX_OTHER_TRANSMIT_INFO32_E);
  1346. break;
  1347. }
  1348. case WIFITXPCU_PHYTX_DEBUG32_E:
  1349. {
  1350. SHOW_DEFINED(WIFITXPCU_PHYTX_DEBUG32_E);
  1351. break;
  1352. }
  1353. case WIFITXPCU_PREAMBLE_DONE_E:
  1354. {
  1355. SHOW_DEFINED(WIFITXPCU_PREAMBLE_DONE_E);
  1356. break;
  1357. }
  1358. case WIFIRX_PHY_SLEEP_E:
  1359. {
  1360. SHOW_DEFINED(WIFIRX_PHY_SLEEP_E);
  1361. break;
  1362. }
  1363. case WIFIRX_FRAME_BITMAP_REQ_E:
  1364. {
  1365. SHOW_DEFINED(WIFIRX_FRAME_BITMAP_REQ_E);
  1366. break;
  1367. }
  1368. case WIFIRXPCU_TX_SETUP_CLEAR_E:
  1369. {
  1370. SHOW_DEFINED(WIFIRXPCU_TX_SETUP_CLEAR_E);
  1371. break;
  1372. }
  1373. case WIFIRX_TRIG_INFO_E:
  1374. {
  1375. SHOW_DEFINED(WIFIRX_TRIG_INFO_E);
  1376. break;
  1377. }
  1378. case WIFIEXPECTED_RESPONSE_E:
  1379. {
  1380. SHOW_DEFINED(WIFIEXPECTED_RESPONSE_E);
  1381. break;
  1382. }
  1383. case WIFITRIGGER_RESPONSE_TX_DONE_E:
  1384. {
  1385. SHOW_DEFINED(WIFITRIGGER_RESPONSE_TX_DONE_E);
  1386. break;
  1387. }
  1388. }
  1389. return status;
  1390. }
  1391. #endif /* QCA_MONITOR_2_0_SUPPORT */
  1392. #ifdef REO_SHARED_QREF_TABLE_EN
  1393. static void hal_reo_shared_qaddr_cache_clear_be(hal_soc_handle_t hal_soc_hdl)
  1394. {
  1395. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1396. uint32_t reg_val = 0;
  1397. /* Set Qdesc clear bit to erase REO internal storage for Qdesc pointers
  1398. * of 37 peer/tids
  1399. */
  1400. reg_val = HAL_REG_READ(hal, HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE));
  1401. reg_val |= HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, CLEAR_QDESC_ARRAY, 1);
  1402. HAL_REG_WRITE(hal,
  1403. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  1404. reg_val);
  1405. /* Clear Qdesc clear bit to erase REO internal storage for Qdesc pointers
  1406. * of 37 peer/tids
  1407. */
  1408. reg_val &= ~(HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, CLEAR_QDESC_ARRAY, 1));
  1409. HAL_REG_WRITE(hal,
  1410. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  1411. reg_val);
  1412. hal_verbose_debug("hal_soc: %pK :Setting CLEAR_DESC_ARRAY field of"
  1413. "WCSS_UMAC_REO_R0_QDESC_ADDR_READ and resetting back"
  1414. "to erase stale entries in reo storage: regval:%x", hal, reg_val);
  1415. }
  1416. /* hal_reo_shared_qaddr_write(): Write REO tid queue addr
  1417. * LUT shared by SW and HW at the index given by peer id
  1418. * and tid.
  1419. *
  1420. * @hal_soc: hal soc pointer
  1421. * @reo_qref_addr: pointer to index pointed to be peer_id
  1422. * and tid
  1423. * @tid: tid queue number
  1424. * @hw_qdesc_paddr: reo queue addr
  1425. */
  1426. static void hal_reo_shared_qaddr_write_be(hal_soc_handle_t hal_soc_hdl,
  1427. uint16_t peer_id,
  1428. int tid,
  1429. qdf_dma_addr_t hw_qdesc_paddr)
  1430. {
  1431. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1432. struct rx_reo_queue_reference *reo_qref;
  1433. uint32_t peer_tid_idx;
  1434. /* Plug hw_desc_addr in Host reo queue reference table */
  1435. if (HAL_PEER_ID_IS_MLO(peer_id)) {
  1436. peer_tid_idx = ((peer_id - HAL_ML_PEER_ID_START) *
  1437. DP_MAX_TIDS) + tid;
  1438. reo_qref = (struct rx_reo_queue_reference *)
  1439. &hal->reo_qref.mlo_reo_qref_table_vaddr[peer_tid_idx];
  1440. } else {
  1441. peer_tid_idx = (peer_id * DP_MAX_TIDS) + tid;
  1442. reo_qref = (struct rx_reo_queue_reference *)
  1443. &hal->reo_qref.non_mlo_reo_qref_table_vaddr[peer_tid_idx];
  1444. }
  1445. reo_qref->rx_reo_queue_desc_addr_31_0 =
  1446. hw_qdesc_paddr & 0xffffffff;
  1447. reo_qref->rx_reo_queue_desc_addr_39_32 =
  1448. (hw_qdesc_paddr & 0xff00000000) >> 32;
  1449. if (hw_qdesc_paddr != 0)
  1450. reo_qref->receive_queue_number = tid;
  1451. else
  1452. reo_qref->receive_queue_number = 0;
  1453. hal_reo_shared_qaddr_cache_clear_be(hal_soc_hdl);
  1454. hal_verbose_debug("hw_qdesc_paddr: %pK, tid: %d, reo_qref:%pK,"
  1455. "rx_reo_queue_desc_addr_31_0: %x,"
  1456. "rx_reo_queue_desc_addr_39_32: %x",
  1457. (void *)hw_qdesc_paddr, tid, reo_qref,
  1458. reo_qref->rx_reo_queue_desc_addr_31_0,
  1459. reo_qref->rx_reo_queue_desc_addr_39_32);
  1460. }
  1461. /**
  1462. * hal_reo_shared_qaddr_setup() - Allocate MLO and Non MLO reo queue
  1463. * reference table shared between SW and HW and initialize in Qdesc Base0
  1464. * base1 registers provided by HW.
  1465. *
  1466. * @hal_soc: HAL Soc handle
  1467. *
  1468. * Return: None
  1469. */
  1470. static void hal_reo_shared_qaddr_setup_be(hal_soc_handle_t hal_soc_hdl)
  1471. {
  1472. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1473. hal->reo_qref.reo_qref_table_en = 1;
  1474. hal->reo_qref.mlo_reo_qref_table_vaddr =
  1475. (uint64_t *)qdf_mem_alloc_consistent(
  1476. hal->qdf_dev, hal->qdf_dev->dev,
  1477. REO_QUEUE_REF_ML_TABLE_SIZE,
  1478. &hal->reo_qref.mlo_reo_qref_table_paddr);
  1479. hal->reo_qref.non_mlo_reo_qref_table_vaddr =
  1480. (uint64_t *)qdf_mem_alloc_consistent(
  1481. hal->qdf_dev, hal->qdf_dev->dev,
  1482. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  1483. &hal->reo_qref.non_mlo_reo_qref_table_paddr);
  1484. hal_verbose_debug("MLO table start paddr:%pK,"
  1485. "Non-MLO table start paddr:%pK,"
  1486. "MLO table start vaddr: %pK,"
  1487. "Non MLO table start vaddr: %pK",
  1488. (void *)hal->reo_qref.mlo_reo_qref_table_paddr,
  1489. (void *)hal->reo_qref.non_mlo_reo_qref_table_paddr,
  1490. hal->reo_qref.mlo_reo_qref_table_vaddr,
  1491. hal->reo_qref.non_mlo_reo_qref_table_vaddr);
  1492. }
  1493. /**
  1494. * hal_reo_shared_qaddr_init() - Zero out REO qref LUT and
  1495. * write start addr of MLO and Non MLO table in HW
  1496. *
  1497. * @hal_soc: HAL Soc handle
  1498. *
  1499. * Return: None
  1500. */
  1501. static void hal_reo_shared_qaddr_init_be(hal_soc_handle_t hal_soc_hdl)
  1502. {
  1503. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1504. qdf_mem_zero(hal->reo_qref.mlo_reo_qref_table_vaddr,
  1505. REO_QUEUE_REF_ML_TABLE_SIZE);
  1506. qdf_mem_zero(hal->reo_qref.non_mlo_reo_qref_table_vaddr,
  1507. REO_QUEUE_REF_NON_ML_TABLE_SIZE);
  1508. /* LUT_BASE0 and BASE1 registers expect upper 32bits of LUT base address
  1509. * and lower 8 bits to be 0. Shift the physical address by 8 to plug
  1510. * upper 32bits only
  1511. */
  1512. HAL_REG_WRITE(hal,
  1513. HWIO_REO_R0_QDESC_LUT_BASE0_ADDR_ADDR(REO_REG_REG_BASE),
  1514. hal->reo_qref.non_mlo_reo_qref_table_paddr >> 8);
  1515. HAL_REG_WRITE(hal,
  1516. HWIO_REO_R0_QDESC_LUT_BASE1_ADDR_ADDR(REO_REG_REG_BASE),
  1517. hal->reo_qref.mlo_reo_qref_table_paddr >> 8);
  1518. HAL_REG_WRITE(hal,
  1519. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  1520. HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, LUT_FEATURE_ENABLE,
  1521. 1));
  1522. HAL_REG_WRITE(hal,
  1523. HWIO_REO_R0_QDESC_MAX_SW_PEER_ID_ADDR(REO_REG_REG_BASE),
  1524. HAL_MS(HWIO_REO_R0_QDESC, MAX_SW_PEER_ID_MAX_SUPPORTED,
  1525. 0x1fff));
  1526. }
  1527. /**
  1528. * hal_reo_shared_qaddr_detach() - Free MLO and Non MLO reo queue
  1529. * reference table shared between SW and HW
  1530. *
  1531. * @hal_soc: HAL Soc handle
  1532. *
  1533. * Return: None
  1534. */
  1535. static void hal_reo_shared_qaddr_detach_be(hal_soc_handle_t hal_soc_hdl)
  1536. {
  1537. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1538. HAL_REG_WRITE(hal,
  1539. HWIO_REO_R0_QDESC_LUT_BASE0_ADDR_ADDR(REO_REG_REG_BASE),
  1540. 0);
  1541. HAL_REG_WRITE(hal,
  1542. HWIO_REO_R0_QDESC_LUT_BASE1_ADDR_ADDR(REO_REG_REG_BASE),
  1543. 0);
  1544. qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev,
  1545. REO_QUEUE_REF_ML_TABLE_SIZE,
  1546. hal->reo_qref.mlo_reo_qref_table_vaddr,
  1547. hal->reo_qref.mlo_reo_qref_table_paddr, 0);
  1548. qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev,
  1549. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  1550. hal->reo_qref.non_mlo_reo_qref_table_vaddr,
  1551. hal->reo_qref.non_mlo_reo_qref_table_paddr, 0);
  1552. }
  1553. #endif
  1554. #endif /* _HAL_BE_GENERIC_API_H_ */