main.c 124 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #ifdef SLATE_MODULE_ENABLED
  47. #include <linux/soc/qcom/slatecom_interface.h>
  48. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  49. #include <uapi/linux/slatecom_interface.h>
  50. #endif
  51. #include "main.h"
  52. #include "qmi.h"
  53. #include "debug.h"
  54. #include "power.h"
  55. #include "genl.h"
  56. #define MAX_PROP_SIZE 32
  57. #define NUM_LOG_PAGES 10
  58. #define NUM_LOG_LONG_PAGES 4
  59. #define ICNSS_MAGIC 0x5abc5abc
  60. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  61. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  62. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  63. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  64. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  65. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  66. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  67. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  68. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  69. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  70. #define ICNSS_MAX_PROBE_CNT 2
  71. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  72. #define PROBE_TIMEOUT 15000
  73. #define SMP2P_SOC_WAKE_TIMEOUT 500
  74. #ifdef CONFIG_ICNSS2_DEBUG
  75. static unsigned long qmi_timeout = 3000;
  76. module_param(qmi_timeout, ulong, 0600);
  77. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  78. #else
  79. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  80. #endif
  81. #define ICNSS_RECOVERY_TIMEOUT 60000
  82. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  83. #define ICNSS_CAL_TIMEOUT 40000
  84. static struct icnss_priv *penv;
  85. static struct work_struct wpss_loader;
  86. static struct work_struct wpss_ssr_work;
  87. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  88. #define ICNSS_EVENT_PENDING 2989
  89. #define ICNSS_EVENT_SYNC BIT(0)
  90. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  91. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  92. ICNSS_EVENT_SYNC)
  93. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  95. #define SMP2P_GET_MAX_RETRY 4
  96. #define SMP2P_GET_RETRY_DELAY_MS 500
  97. #define RAMDUMP_NUM_DEVICES 256
  98. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  99. #define WLAN_EN_TEMP_THRESHOLD 5000
  100. #define WLAN_EN_DELAY 500
  101. #define ICNSS_RPROC_LEN 10
  102. static DEFINE_IDA(rd_minor_id);
  103. enum icnss_pdr_cause_index {
  104. ICNSS_FW_CRASH,
  105. ICNSS_ROOT_PD_CRASH,
  106. ICNSS_ROOT_PD_SHUTDOWN,
  107. ICNSS_HOST_ERROR,
  108. };
  109. static const char * const icnss_pdr_cause[] = {
  110. [ICNSS_FW_CRASH] = "FW crash",
  111. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  112. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  113. [ICNSS_HOST_ERROR] = "Host error",
  114. };
  115. static void icnss_set_plat_priv(struct icnss_priv *priv)
  116. {
  117. penv = priv;
  118. }
  119. static struct icnss_priv *icnss_get_plat_priv(void)
  120. {
  121. return penv;
  122. }
  123. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  124. {
  125. if (priv && priv->rproc) {
  126. rproc_shutdown(priv->rproc);
  127. rproc_put(priv->rproc);
  128. priv->rproc = NULL;
  129. }
  130. }
  131. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  132. struct kobj_attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. struct icnss_priv *priv = icnss_get_plat_priv();
  136. if (!priv)
  137. return count;
  138. icnss_pr_dbg("Received shutdown indication");
  139. atomic_set(&priv->is_shutdown, true);
  140. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  141. icnss_wpss_unload(priv);
  142. return count;
  143. }
  144. static struct kobj_attribute icnss_sysfs_attribute =
  145. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  146. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  147. {
  148. if (atomic_inc_return(&priv->pm_count) != 1)
  149. return;
  150. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  151. atomic_read(&priv->pm_count));
  152. pm_stay_awake(&priv->pdev->dev);
  153. priv->stats.pm_stay_awake++;
  154. }
  155. static void icnss_pm_relax(struct icnss_priv *priv)
  156. {
  157. int r = atomic_dec_return(&priv->pm_count);
  158. WARN_ON(r < 0);
  159. if (r != 0)
  160. return;
  161. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  162. atomic_read(&priv->pm_count));
  163. pm_relax(&priv->pdev->dev);
  164. priv->stats.pm_relax++;
  165. }
  166. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  167. {
  168. switch (type) {
  169. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  170. return "SERVER_ARRIVE";
  171. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  172. return "SERVER_EXIT";
  173. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  174. return "FW_READY";
  175. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  176. return "REGISTER_DRIVER";
  177. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  178. return "UNREGISTER_DRIVER";
  179. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  180. return "PD_SERVICE_DOWN";
  181. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  182. return "FW_EARLY_CRASH_IND";
  183. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  184. return "IDLE_SHUTDOWN";
  185. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  186. return "IDLE_RESTART";
  187. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  188. return "FW_INIT_DONE";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  190. return "QDSS_TRACE_REQ_MEM";
  191. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  192. return "QDSS_TRACE_SAVE";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  194. return "QDSS_TRACE_FREE";
  195. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  196. return "M3_DUMP_UPLOAD";
  197. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  198. return "QDSS_TRACE_REQ_DATA";
  199. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  200. return "SUBSYS_RESTART_LEVEL";
  201. case ICNSS_DRIVER_EVENT_MAX:
  202. return "EVENT_MAX";
  203. }
  204. return "UNKNOWN";
  205. };
  206. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  207. {
  208. switch (type) {
  209. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  210. return "SOC_WAKE_REQUEST";
  211. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  212. return "SOC_WAKE_RELEASE";
  213. case ICNSS_SOC_WAKE_EVENT_MAX:
  214. return "SOC_EVENT_MAX";
  215. }
  216. return "UNKNOWN";
  217. };
  218. int icnss_driver_event_post(struct icnss_priv *priv,
  219. enum icnss_driver_event_type type,
  220. u32 flags, void *data)
  221. {
  222. struct icnss_driver_event *event;
  223. unsigned long irq_flags;
  224. int gfp = GFP_KERNEL;
  225. int ret = 0;
  226. if (!priv)
  227. return -ENODEV;
  228. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  229. icnss_driver_event_to_str(type), type, current->comm,
  230. flags, priv->state);
  231. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  232. icnss_pr_err("Invalid Event type: %d, can't post", type);
  233. return -EINVAL;
  234. }
  235. if (in_interrupt() || irqs_disabled())
  236. gfp = GFP_ATOMIC;
  237. event = kzalloc(sizeof(*event), gfp);
  238. if (event == NULL)
  239. return -ENOMEM;
  240. icnss_pm_stay_awake(priv);
  241. event->type = type;
  242. event->data = data;
  243. init_completion(&event->complete);
  244. event->ret = ICNSS_EVENT_PENDING;
  245. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  246. spin_lock_irqsave(&priv->event_lock, irq_flags);
  247. list_add_tail(&event->list, &priv->event_list);
  248. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  249. priv->stats.events[type].posted++;
  250. queue_work(priv->event_wq, &priv->event_work);
  251. if (!(flags & ICNSS_EVENT_SYNC))
  252. goto out;
  253. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  254. wait_for_completion(&event->complete);
  255. else
  256. ret = wait_for_completion_interruptible(&event->complete);
  257. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  258. icnss_driver_event_to_str(type), type, priv->state, ret,
  259. event->ret);
  260. spin_lock_irqsave(&priv->event_lock, irq_flags);
  261. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  262. event->sync = false;
  263. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  264. ret = -EINTR;
  265. goto out;
  266. }
  267. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  268. ret = event->ret;
  269. kfree(event);
  270. out:
  271. icnss_pm_relax(priv);
  272. return ret;
  273. }
  274. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  275. enum icnss_soc_wake_event_type type,
  276. u32 flags, void *data)
  277. {
  278. struct icnss_soc_wake_event *event;
  279. unsigned long irq_flags;
  280. int gfp = GFP_KERNEL;
  281. int ret = 0;
  282. if (!priv)
  283. return -ENODEV;
  284. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  285. icnss_soc_wake_event_to_str(type),
  286. type, current->comm, flags, priv->state);
  287. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  288. icnss_pr_err("Invalid Event type: %d, can't post", type);
  289. return -EINVAL;
  290. }
  291. if (in_interrupt() || irqs_disabled())
  292. gfp = GFP_ATOMIC;
  293. event = kzalloc(sizeof(*event), gfp);
  294. if (!event)
  295. return -ENOMEM;
  296. icnss_pm_stay_awake(priv);
  297. event->type = type;
  298. event->data = data;
  299. init_completion(&event->complete);
  300. event->ret = ICNSS_EVENT_PENDING;
  301. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  302. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  303. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  304. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  305. priv->stats.soc_wake_events[type].posted++;
  306. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  307. if (!(flags & ICNSS_EVENT_SYNC))
  308. goto out;
  309. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  310. wait_for_completion(&event->complete);
  311. else
  312. ret = wait_for_completion_interruptible(&event->complete);
  313. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  314. icnss_soc_wake_event_to_str(type),
  315. type, priv->state, ret, event->ret);
  316. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  317. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  318. event->sync = false;
  319. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  320. ret = -EINTR;
  321. goto out;
  322. }
  323. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  324. ret = event->ret;
  325. kfree(event);
  326. out:
  327. icnss_pm_relax(priv);
  328. return ret;
  329. }
  330. bool icnss_is_fw_ready(void)
  331. {
  332. if (!penv)
  333. return false;
  334. else
  335. return test_bit(ICNSS_FW_READY, &penv->state);
  336. }
  337. EXPORT_SYMBOL(icnss_is_fw_ready);
  338. void icnss_block_shutdown(bool status)
  339. {
  340. if (!penv)
  341. return;
  342. if (status) {
  343. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  344. reinit_completion(&penv->unblock_shutdown);
  345. } else {
  346. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  347. complete(&penv->unblock_shutdown);
  348. }
  349. }
  350. EXPORT_SYMBOL(icnss_block_shutdown);
  351. bool icnss_is_fw_down(void)
  352. {
  353. struct icnss_priv *priv = icnss_get_plat_priv();
  354. if (!priv)
  355. return false;
  356. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  357. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  358. test_bit(ICNSS_REJUVENATE, &priv->state);
  359. }
  360. EXPORT_SYMBOL(icnss_is_fw_down);
  361. unsigned long icnss_get_device_config(void)
  362. {
  363. struct icnss_priv *priv = icnss_get_plat_priv();
  364. if (!priv)
  365. return 0;
  366. return priv->device_config;
  367. }
  368. EXPORT_SYMBOL(icnss_get_device_config);
  369. bool icnss_is_rejuvenate(void)
  370. {
  371. if (!penv)
  372. return false;
  373. else
  374. return test_bit(ICNSS_REJUVENATE, &penv->state);
  375. }
  376. EXPORT_SYMBOL(icnss_is_rejuvenate);
  377. bool icnss_is_pdr(void)
  378. {
  379. if (!penv)
  380. return false;
  381. else
  382. return test_bit(ICNSS_PDR, &penv->state);
  383. }
  384. EXPORT_SYMBOL(icnss_is_pdr);
  385. static int icnss_send_smp2p(struct icnss_priv *priv,
  386. enum icnss_smp2p_msg_id msg_id,
  387. enum smp2p_out_entry smp2p_entry)
  388. {
  389. unsigned int value = 0;
  390. int ret;
  391. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  392. return -EINVAL;
  393. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  394. if (msg_id == ICNSS_RESET_MSG) {
  395. priv->smp2p_info[smp2p_entry].seq = 0;
  396. ret = qcom_smem_state_update_bits(
  397. priv->smp2p_info[smp2p_entry].smem_state,
  398. ICNSS_SMEM_VALUE_MASK,
  399. 0);
  400. if (ret)
  401. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  402. ret, icnss_smp2p_str[smp2p_entry]);
  403. return ret;
  404. }
  405. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  406. !test_bit(ICNSS_FW_READY, &priv->state)) {
  407. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  408. priv->state);
  409. return -EINVAL;
  410. }
  411. value |= priv->smp2p_info[smp2p_entry].seq++;
  412. value <<= ICNSS_SMEM_SEQ_NO_POS;
  413. value |= msg_id;
  414. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  415. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  416. reinit_completion(&penv->smp2p_soc_wake_wait);
  417. ret = qcom_smem_state_update_bits(
  418. priv->smp2p_info[smp2p_entry].smem_state,
  419. ICNSS_SMEM_VALUE_MASK,
  420. value);
  421. if (ret) {
  422. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  423. icnss_smp2p_str[smp2p_entry]);
  424. } else {
  425. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  426. msg_id == ICNSS_SOC_WAKE_REL) {
  427. if (!wait_for_completion_timeout(
  428. &priv->smp2p_soc_wake_wait,
  429. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  430. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  431. icnss_smp2p_str[smp2p_entry]);
  432. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  433. ICNSS_ASSERT(0);
  434. }
  435. }
  436. }
  437. return ret;
  438. }
  439. bool icnss_is_low_power(void)
  440. {
  441. if (!penv)
  442. return false;
  443. else
  444. return test_bit(ICNSS_LOW_POWER, &penv->state);
  445. }
  446. EXPORT_SYMBOL(icnss_is_low_power);
  447. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  448. {
  449. struct icnss_priv *priv = ctx;
  450. if (priv)
  451. priv->force_err_fatal = true;
  452. icnss_pr_err("Received force error fatal request from FW\n");
  453. return IRQ_HANDLED;
  454. }
  455. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  456. {
  457. struct icnss_priv *priv = ctx;
  458. struct icnss_uevent_fw_down_data fw_down_data = {0};
  459. icnss_pr_err("Received early crash indication from FW\n");
  460. if (priv) {
  461. if (priv->wpss_self_recovery_enabled)
  462. mod_timer(&priv->wpss_ssr_timer,
  463. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  464. set_bit(ICNSS_FW_DOWN, &priv->state);
  465. icnss_ignore_fw_timeout(true);
  466. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  467. clear_bit(ICNSS_FW_READY, &priv->state);
  468. fw_down_data.crashed = true;
  469. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  470. &fw_down_data);
  471. }
  472. }
  473. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  474. 0, NULL);
  475. return IRQ_HANDLED;
  476. }
  477. static void register_fw_error_notifications(struct device *dev)
  478. {
  479. struct icnss_priv *priv = dev_get_drvdata(dev);
  480. struct device_node *dev_node;
  481. int irq = 0, ret = 0;
  482. if (!priv)
  483. return;
  484. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  485. if (!dev_node) {
  486. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  487. return;
  488. }
  489. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  490. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  491. ret = irq = of_irq_get_byname(dev_node,
  492. "qcom,smp2p-force-fatal-error");
  493. if (ret < 0) {
  494. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  495. irq);
  496. return;
  497. }
  498. }
  499. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  500. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  501. "wlanfw-err", priv);
  502. if (ret < 0) {
  503. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  504. irq, ret);
  505. return;
  506. }
  507. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  508. priv->fw_error_fatal_irq = irq;
  509. }
  510. static void register_early_crash_notifications(struct device *dev)
  511. {
  512. struct icnss_priv *priv = dev_get_drvdata(dev);
  513. struct device_node *dev_node;
  514. int irq = 0, ret = 0;
  515. if (!priv)
  516. return;
  517. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  518. if (!dev_node) {
  519. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  520. return;
  521. }
  522. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  523. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  524. ret = irq = of_irq_get_byname(dev_node,
  525. "qcom,smp2p-early-crash-ind");
  526. if (ret < 0) {
  527. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  528. irq);
  529. return;
  530. }
  531. }
  532. ret = devm_request_threaded_irq(dev, irq, NULL,
  533. fw_crash_indication_handler,
  534. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  535. "wlanfw-early-crash-ind", priv);
  536. if (ret < 0) {
  537. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  538. irq, ret);
  539. return;
  540. }
  541. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  542. priv->fw_early_crash_irq = irq;
  543. }
  544. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  545. {
  546. struct thermal_zone_device *thermal_dev;
  547. const char *tsens;
  548. int ret;
  549. ret = of_property_read_string(priv->pdev->dev.of_node,
  550. "tsens",
  551. &tsens);
  552. if (ret)
  553. return ret;
  554. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  555. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  556. if (IS_ERR(thermal_dev)) {
  557. icnss_pr_err("Fail to get thermal zone. ret: %d",
  558. PTR_ERR(thermal_dev));
  559. return PTR_ERR(thermal_dev);
  560. }
  561. ret = thermal_zone_get_temp(thermal_dev, temp);
  562. if (ret)
  563. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  564. return ret;
  565. }
  566. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  567. {
  568. struct icnss_priv *priv = ctx;
  569. if (priv)
  570. complete(&priv->smp2p_soc_wake_wait);
  571. return IRQ_HANDLED;
  572. }
  573. static void register_soc_wake_notif(struct device *dev)
  574. {
  575. struct icnss_priv *priv = dev_get_drvdata(dev);
  576. struct device_node *dev_node;
  577. int irq = 0, ret = 0;
  578. if (!priv)
  579. return;
  580. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  581. if (!dev_node) {
  582. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  583. return;
  584. }
  585. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  586. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  587. ret = irq = of_irq_get_byname(dev_node,
  588. "qcom,smp2p-soc-wake-ack");
  589. if (ret < 0) {
  590. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  591. irq);
  592. return;
  593. }
  594. }
  595. ret = devm_request_threaded_irq(dev, irq, NULL,
  596. fw_soc_wake_ack_handler,
  597. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  598. IRQF_TRIGGER_FALLING,
  599. "wlanfw-soc-wake-ack", priv);
  600. if (ret < 0) {
  601. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  602. irq, ret);
  603. return;
  604. }
  605. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  606. priv->fw_soc_wake_ack_irq = irq;
  607. }
  608. int icnss_call_driver_uevent(struct icnss_priv *priv,
  609. enum icnss_uevent uevent, void *data)
  610. {
  611. struct icnss_uevent_data uevent_data;
  612. if (!priv->ops || !priv->ops->uevent)
  613. return 0;
  614. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  615. priv->state, uevent);
  616. uevent_data.uevent = uevent;
  617. uevent_data.data = data;
  618. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  619. }
  620. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  621. {
  622. int i;
  623. int ret = 0;
  624. ret = icnss_qmi_get_dms_mac(priv);
  625. if (ret == 0 && priv->dms.mac_valid)
  626. goto qmi_send;
  627. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  628. * Thus assert on failure to get MAC from DMS even after retries
  629. */
  630. if (priv->use_nv_mac) {
  631. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  632. if (priv->dms.mac_valid)
  633. break;
  634. ret = icnss_qmi_get_dms_mac(priv);
  635. if (ret != -EAGAIN)
  636. break;
  637. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  638. }
  639. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  640. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  641. ICNSS_ASSERT(0);
  642. return -EINVAL;
  643. }
  644. }
  645. qmi_send:
  646. if (priv->dms.mac_valid)
  647. ret =
  648. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  649. ARRAY_SIZE(priv->dms.mac));
  650. return ret;
  651. }
  652. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  653. enum smp2p_out_entry smp2p_entry)
  654. {
  655. int retry = 0;
  656. int error;
  657. if (priv->smp2p_info[smp2p_entry].smem_state)
  658. return;
  659. retry:
  660. priv->smp2p_info[smp2p_entry].smem_state =
  661. qcom_smem_state_get(&priv->pdev->dev,
  662. icnss_smp2p_str[smp2p_entry],
  663. &priv->smp2p_info[smp2p_entry].smem_bit);
  664. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  665. if (retry++ < SMP2P_GET_MAX_RETRY) {
  666. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  667. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  668. error, icnss_smp2p_str[smp2p_entry]);
  669. msleep(SMP2P_GET_RETRY_DELAY_MS);
  670. goto retry;
  671. }
  672. ICNSS_ASSERT(0);
  673. return;
  674. }
  675. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  676. }
  677. static inline
  678. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  679. {
  680. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  681. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  682. } else {
  683. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  684. }
  685. }
  686. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  687. {
  688. switch (val) {
  689. case WLAN_RF_SLATE:
  690. return WLFW_WLAN_RF_SLATE_V01;
  691. case WLAN_RF_APACHE:
  692. return WLFW_WLAN_RF_APACHE_V01;
  693. default:
  694. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  695. }
  696. }
  697. #ifdef SLATE_MODULE_ENABLED
  698. static void icnss_send_wlan_boot_init(void)
  699. {
  700. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  701. icnss_pr_info("sent wlan boot init command\n");
  702. }
  703. static void icnss_send_wlan_boot_complete(void)
  704. {
  705. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  706. icnss_pr_info("sent wlan boot complete command\n");
  707. }
  708. static void icnss_wait_for_slate_complete(struct icnss_priv *priv)
  709. {
  710. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  711. reinit_completion(&priv->slate_boot_complete);
  712. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  713. priv->state);
  714. wait_for_completion(&priv->slate_boot_complete);
  715. }
  716. icnss_send_wlan_boot_init();
  717. }
  718. #else
  719. static void icnss_send_wlan_boot_complete(void)
  720. {
  721. }
  722. static void icnss_wait_for_slate_complete(struct icnss_priv *priv)
  723. {
  724. }
  725. #endif
  726. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  727. void *data)
  728. {
  729. int ret = 0;
  730. int temp = 0;
  731. bool ignore_assert = false;
  732. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  733. if (!priv)
  734. return -ENODEV;
  735. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  736. clear_bit(ICNSS_FW_DOWN, &priv->state);
  737. clear_bit(ICNSS_FW_READY, &priv->state);
  738. icnss_ignore_fw_timeout(false);
  739. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  740. icnss_pr_err("QMI Server already in Connected State\n");
  741. ICNSS_ASSERT(0);
  742. }
  743. ret = icnss_connect_to_fw_server(priv, data);
  744. if (ret)
  745. goto fail;
  746. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  747. if (priv->is_slate_rfa)
  748. icnss_wait_for_slate_complete(priv);
  749. ret = wlfw_ind_register_send_sync_msg(priv);
  750. if (ret < 0) {
  751. if (ret == -EALREADY) {
  752. ret = 0;
  753. goto qmi_registered;
  754. }
  755. ignore_assert = true;
  756. goto fail;
  757. }
  758. if (priv->is_rf_subtype_valid) {
  759. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  760. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  761. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  762. if (ret < 0)
  763. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  764. ret);
  765. } else {
  766. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  767. priv->rf_subtype);
  768. }
  769. }
  770. if (priv->device_id == WCN6750_DEVICE_ID ||
  771. priv->device_id == WCN6450_DEVICE_ID) {
  772. if (!icnss_get_temperature(priv, &temp)) {
  773. icnss_pr_dbg("Temperature: %d\n", temp);
  774. if (temp < WLAN_EN_TEMP_THRESHOLD)
  775. icnss_set_wlan_en_delay(priv);
  776. }
  777. ret = wlfw_host_cap_send_sync(priv);
  778. if (ret < 0)
  779. goto fail;
  780. }
  781. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  782. if (!priv->msa_va) {
  783. icnss_pr_err("Invalid MSA address\n");
  784. ret = -EINVAL;
  785. goto fail;
  786. }
  787. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  788. if (ret < 0) {
  789. ignore_assert = true;
  790. goto fail;
  791. }
  792. ret = wlfw_msa_ready_send_sync_msg(priv);
  793. if (ret < 0) {
  794. ignore_assert = true;
  795. goto fail;
  796. }
  797. }
  798. if (priv->device_id == WCN6450_DEVICE_ID)
  799. icnss_hw_power_off(priv);
  800. ret = wlfw_cap_send_sync_msg(priv);
  801. if (ret < 0) {
  802. ignore_assert = true;
  803. goto fail;
  804. }
  805. ret = icnss_hw_power_on(priv);
  806. if (ret)
  807. goto fail;
  808. if (priv->device_id == WCN6750_DEVICE_ID ||
  809. priv->device_id == WCN6450_DEVICE_ID) {
  810. ret = wlfw_device_info_send_msg(priv);
  811. if (ret < 0) {
  812. ignore_assert = true;
  813. goto device_info_failure;
  814. }
  815. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  816. priv->mem_base_pa,
  817. priv->mem_base_size);
  818. if (!priv->mem_base_va) {
  819. icnss_pr_err("Ioremap failed for bar address\n");
  820. goto device_info_failure;
  821. }
  822. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  823. &priv->mem_base_pa,
  824. priv->mem_base_va);
  825. if (priv->mhi_state_info_pa)
  826. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  827. priv->mhi_state_info_pa,
  828. PAGE_SIZE);
  829. if (!priv->mhi_state_info_va)
  830. icnss_pr_err("Ioremap failed for MHI info address\n");
  831. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  832. &priv->mhi_state_info_pa,
  833. priv->mhi_state_info_va);
  834. }
  835. if (priv->bdf_download_support) {
  836. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  837. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  838. priv->ctrl_params.bdf_type);
  839. if (ret < 0)
  840. goto device_info_failure;
  841. }
  842. if (priv->device_id == WCN6450_DEVICE_ID) {
  843. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  844. if (ret < 0)
  845. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  846. ret);
  847. }
  848. if (priv->device_id == WCN6750_DEVICE_ID ||
  849. priv->device_id == WCN6450_DEVICE_ID) {
  850. if (!priv->fw_soc_wake_ack_irq)
  851. register_soc_wake_notif(&priv->pdev->dev);
  852. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  853. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  854. }
  855. if (priv->wpss_supported)
  856. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  857. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  858. if (priv->bdf_download_support) {
  859. ret = wlfw_cal_report_req(priv);
  860. if (ret < 0)
  861. goto device_info_failure;
  862. }
  863. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  864. dynamic_feature_mask);
  865. }
  866. if (!priv->fw_error_fatal_irq)
  867. register_fw_error_notifications(&priv->pdev->dev);
  868. if (!priv->fw_early_crash_irq)
  869. register_early_crash_notifications(&priv->pdev->dev);
  870. if (priv->psf_supported)
  871. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  872. return ret;
  873. device_info_failure:
  874. icnss_hw_power_off(priv);
  875. fail:
  876. ICNSS_ASSERT(ignore_assert);
  877. qmi_registered:
  878. return ret;
  879. }
  880. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  881. {
  882. if (!priv)
  883. return -ENODEV;
  884. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  885. icnss_clear_server(priv);
  886. if (priv->psf_supported)
  887. priv->last_updated_voltage = 0;
  888. return 0;
  889. }
  890. static int icnss_call_driver_probe(struct icnss_priv *priv)
  891. {
  892. int ret = 0;
  893. int probe_cnt = 0;
  894. if (!priv->ops || !priv->ops->probe)
  895. return 0;
  896. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  897. return -EINVAL;
  898. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  899. icnss_hw_power_on(priv);
  900. icnss_block_shutdown(true);
  901. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  902. ret = priv->ops->probe(&priv->pdev->dev);
  903. probe_cnt++;
  904. if (ret != -EPROBE_DEFER)
  905. break;
  906. }
  907. if (ret < 0) {
  908. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  909. ret, priv->state, probe_cnt);
  910. icnss_block_shutdown(false);
  911. goto out;
  912. }
  913. icnss_block_shutdown(false);
  914. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  915. return 0;
  916. out:
  917. icnss_hw_power_off(priv);
  918. return ret;
  919. }
  920. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  921. {
  922. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  923. goto out;
  924. if (!priv->ops || !priv->ops->shutdown)
  925. goto out;
  926. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  927. goto out;
  928. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  929. priv->ops->shutdown(&priv->pdev->dev);
  930. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  931. out:
  932. return 0;
  933. }
  934. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  935. {
  936. int ret = 0;
  937. icnss_pm_relax(priv);
  938. icnss_call_driver_shutdown(priv);
  939. clear_bit(ICNSS_PDR, &priv->state);
  940. clear_bit(ICNSS_REJUVENATE, &priv->state);
  941. clear_bit(ICNSS_PD_RESTART, &priv->state);
  942. clear_bit(ICNSS_LOW_POWER, &priv->state);
  943. priv->early_crash_ind = false;
  944. priv->is_ssr = false;
  945. if (!priv->ops || !priv->ops->reinit)
  946. goto out;
  947. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  948. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  949. priv->state);
  950. goto out;
  951. }
  952. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  953. goto call_probe;
  954. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  955. icnss_hw_power_on(priv);
  956. icnss_block_shutdown(true);
  957. ret = priv->ops->reinit(&priv->pdev->dev);
  958. if (ret < 0) {
  959. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  960. ret, priv->state);
  961. if (!priv->allow_recursive_recovery)
  962. ICNSS_ASSERT(false);
  963. icnss_block_shutdown(false);
  964. goto out_power_off;
  965. }
  966. icnss_block_shutdown(false);
  967. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  968. return 0;
  969. call_probe:
  970. return icnss_call_driver_probe(priv);
  971. out_power_off:
  972. icnss_hw_power_off(priv);
  973. out:
  974. return ret;
  975. }
  976. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  977. {
  978. int ret = 0;
  979. if (!priv)
  980. return -ENODEV;
  981. del_timer(&priv->recovery_timer);
  982. set_bit(ICNSS_FW_READY, &priv->state);
  983. clear_bit(ICNSS_MODE_ON, &priv->state);
  984. atomic_set(&priv->soc_wake_ref_count, 0);
  985. if (priv->device_id == WCN6750_DEVICE_ID ||
  986. priv->device_id == WCN6450_DEVICE_ID)
  987. icnss_free_qdss_mem(priv);
  988. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  989. icnss_hw_power_off(priv);
  990. if (!priv->pdev) {
  991. icnss_pr_err("Device is not ready\n");
  992. ret = -ENODEV;
  993. goto out;
  994. }
  995. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  996. icnss_send_wlan_boot_complete();
  997. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  998. ret = icnss_pd_restart_complete(priv);
  999. } else {
  1000. if (priv->wpss_supported)
  1001. icnss_setup_dms_mac(priv);
  1002. ret = icnss_call_driver_probe(priv);
  1003. }
  1004. icnss_vreg_unvote(priv);
  1005. out:
  1006. return ret;
  1007. }
  1008. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1009. {
  1010. int ret = 0;
  1011. if (!priv)
  1012. return -ENODEV;
  1013. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1014. if (priv->device_id == WCN6750_DEVICE_ID) {
  1015. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1016. if (ret < 0)
  1017. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1018. ret);
  1019. }
  1020. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1021. mod_timer(&priv->recovery_timer,
  1022. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1023. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1024. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1025. } else {
  1026. icnss_driver_event_fw_ready_ind(priv, NULL);
  1027. }
  1028. return ret;
  1029. }
  1030. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1031. {
  1032. struct platform_device *pdev = priv->pdev;
  1033. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1034. int i, j;
  1035. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1036. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1037. qdss_mem[i].va =
  1038. dma_alloc_coherent(&pdev->dev,
  1039. qdss_mem[i].size,
  1040. &qdss_mem[i].pa,
  1041. GFP_KERNEL);
  1042. if (!qdss_mem[i].va) {
  1043. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1044. qdss_mem[i].size,
  1045. qdss_mem[i].type, i);
  1046. break;
  1047. }
  1048. }
  1049. }
  1050. /* Best-effort allocation for QDSS trace */
  1051. if (i < priv->qdss_mem_seg_len) {
  1052. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1053. qdss_mem[j].type = 0;
  1054. qdss_mem[j].size = 0;
  1055. }
  1056. priv->qdss_mem_seg_len = i;
  1057. }
  1058. return 0;
  1059. }
  1060. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1061. {
  1062. struct platform_device *pdev = priv->pdev;
  1063. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1064. int i;
  1065. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1066. if (qdss_mem[i].va && qdss_mem[i].size) {
  1067. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1068. &qdss_mem[i].pa, qdss_mem[i].size,
  1069. qdss_mem[i].type);
  1070. dma_free_coherent(&pdev->dev,
  1071. qdss_mem[i].size, qdss_mem[i].va,
  1072. qdss_mem[i].pa);
  1073. qdss_mem[i].va = NULL;
  1074. qdss_mem[i].pa = 0;
  1075. qdss_mem[i].size = 0;
  1076. qdss_mem[i].type = 0;
  1077. }
  1078. }
  1079. priv->qdss_mem_seg_len = 0;
  1080. }
  1081. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1082. {
  1083. int ret = 0;
  1084. ret = icnss_alloc_qdss_mem(priv);
  1085. if (ret < 0)
  1086. return ret;
  1087. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1088. }
  1089. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1090. u64 pa, u32 size, int *seg_id)
  1091. {
  1092. int i = 0;
  1093. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1094. u64 offset = 0;
  1095. void *va = NULL;
  1096. u64 local_pa;
  1097. u32 local_size;
  1098. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1099. local_pa = (u64)qdss_mem[i].pa;
  1100. local_size = (u32)qdss_mem[i].size;
  1101. if (pa == local_pa && size <= local_size) {
  1102. va = qdss_mem[i].va;
  1103. break;
  1104. }
  1105. if (pa > local_pa &&
  1106. pa < local_pa + local_size &&
  1107. pa + size <= local_pa + local_size) {
  1108. offset = pa - local_pa;
  1109. va = qdss_mem[i].va + offset;
  1110. break;
  1111. }
  1112. }
  1113. *seg_id = i;
  1114. return va;
  1115. }
  1116. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1117. void *data)
  1118. {
  1119. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1120. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1121. int ret = 0;
  1122. int i;
  1123. void *va = NULL;
  1124. u64 pa;
  1125. u32 size;
  1126. int seg_id = 0;
  1127. if (!priv->qdss_mem_seg_len) {
  1128. icnss_pr_err("Memory for QDSS trace is not available\n");
  1129. return -ENOMEM;
  1130. }
  1131. if (event_data->mem_seg_len == 0) {
  1132. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1133. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1134. ICNSS_GENL_MSG_TYPE_QDSS,
  1135. event_data->file_name,
  1136. qdss_mem[i].size);
  1137. if (ret < 0) {
  1138. icnss_pr_err("Fail to save QDSS data: %d\n",
  1139. ret);
  1140. break;
  1141. }
  1142. }
  1143. } else {
  1144. for (i = 0; i < event_data->mem_seg_len; i++) {
  1145. pa = event_data->mem_seg[i].addr;
  1146. size = event_data->mem_seg[i].size;
  1147. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1148. size, &seg_id);
  1149. if (!va) {
  1150. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1151. &pa);
  1152. ret = -EINVAL;
  1153. break;
  1154. }
  1155. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1156. event_data->file_name, size);
  1157. if (ret < 0) {
  1158. icnss_pr_err("Fail to save QDSS data: %d\n",
  1159. ret);
  1160. break;
  1161. }
  1162. }
  1163. }
  1164. kfree(data);
  1165. return ret;
  1166. }
  1167. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1168. {
  1169. int dec, c = atomic_read(v);
  1170. do {
  1171. dec = c - 1;
  1172. if (unlikely(dec < 1))
  1173. break;
  1174. } while (!atomic_try_cmpxchg(v, &c, dec));
  1175. return dec;
  1176. }
  1177. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1178. void *data)
  1179. {
  1180. int ret = 0;
  1181. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1182. if (!priv)
  1183. return -ENODEV;
  1184. if (!data)
  1185. return -EINVAL;
  1186. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1187. event_data->total_size);
  1188. kfree(data);
  1189. return ret;
  1190. }
  1191. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1192. {
  1193. int ret = 0;
  1194. if (!priv)
  1195. return -ENODEV;
  1196. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1197. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1198. atomic_read(&priv->soc_wake_ref_count));
  1199. return 0;
  1200. }
  1201. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1202. ICNSS_SMP2P_OUT_SOC_WAKE);
  1203. if (!ret)
  1204. atomic_inc(&priv->soc_wake_ref_count);
  1205. return ret;
  1206. }
  1207. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1208. {
  1209. int ret = 0;
  1210. if (!priv)
  1211. return -ENODEV;
  1212. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1213. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1214. priv->soc_wake_ref_count);
  1215. return 0;
  1216. }
  1217. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1218. ICNSS_SMP2P_OUT_SOC_WAKE);
  1219. return ret;
  1220. }
  1221. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1222. void *data)
  1223. {
  1224. int ret = 0;
  1225. int probe_cnt = 0;
  1226. if (priv->ops)
  1227. return -EEXIST;
  1228. priv->ops = data;
  1229. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1230. set_bit(ICNSS_FW_READY, &priv->state);
  1231. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1232. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1233. priv->state);
  1234. return -ENODEV;
  1235. }
  1236. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1237. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1238. priv->state);
  1239. goto out;
  1240. }
  1241. ret = icnss_hw_power_on(priv);
  1242. if (ret)
  1243. goto out;
  1244. icnss_block_shutdown(true);
  1245. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1246. ret = priv->ops->probe(&priv->pdev->dev);
  1247. probe_cnt++;
  1248. if (ret != -EPROBE_DEFER)
  1249. break;
  1250. }
  1251. if (ret) {
  1252. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1253. ret, priv->state, probe_cnt);
  1254. icnss_block_shutdown(false);
  1255. goto power_off;
  1256. }
  1257. icnss_block_shutdown(false);
  1258. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1259. return 0;
  1260. power_off:
  1261. icnss_hw_power_off(priv);
  1262. out:
  1263. return ret;
  1264. }
  1265. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1266. void *data)
  1267. {
  1268. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1269. priv->ops = NULL;
  1270. goto out;
  1271. }
  1272. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1273. icnss_block_shutdown(true);
  1274. if (priv->ops)
  1275. priv->ops->remove(&priv->pdev->dev);
  1276. icnss_block_shutdown(false);
  1277. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1278. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1279. priv->ops = NULL;
  1280. icnss_hw_power_off(priv);
  1281. out:
  1282. return 0;
  1283. }
  1284. static int icnss_fw_crashed(struct icnss_priv *priv,
  1285. struct icnss_event_pd_service_down_data *event_data)
  1286. {
  1287. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1288. set_bit(ICNSS_PD_RESTART, &priv->state);
  1289. clear_bit(ICNSS_FW_READY, &priv->state);
  1290. icnss_pm_stay_awake(priv);
  1291. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1292. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1293. if (event_data && event_data->fw_rejuvenate)
  1294. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1295. return 0;
  1296. }
  1297. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1298. struct icnss_uevent_hang_data *hang_data)
  1299. {
  1300. if (!priv->hang_event_data_va)
  1301. return -EINVAL;
  1302. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1303. priv->hang_event_data_len,
  1304. GFP_ATOMIC);
  1305. if (!priv->hang_event_data)
  1306. return -ENOMEM;
  1307. // Update the hang event params
  1308. hang_data->hang_event_data = priv->hang_event_data;
  1309. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1310. return 0;
  1311. }
  1312. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1313. {
  1314. struct icnss_uevent_hang_data hang_data = {0};
  1315. int ret = 0xFF;
  1316. if (priv->early_crash_ind) {
  1317. ret = icnss_update_hang_event_data(priv, &hang_data);
  1318. if (ret)
  1319. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1320. }
  1321. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1322. &hang_data);
  1323. if (!ret) {
  1324. kfree(priv->hang_event_data);
  1325. priv->hang_event_data = NULL;
  1326. }
  1327. return 0;
  1328. }
  1329. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1330. void *data)
  1331. {
  1332. struct icnss_event_pd_service_down_data *event_data = data;
  1333. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1334. icnss_ignore_fw_timeout(false);
  1335. goto out;
  1336. }
  1337. if (priv->force_err_fatal)
  1338. ICNSS_ASSERT(0);
  1339. if (priv->device_id == WCN6750_DEVICE_ID ||
  1340. priv->device_id == WCN6450_DEVICE_ID) {
  1341. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1342. ICNSS_SMP2P_OUT_SOC_WAKE);
  1343. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1344. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1345. }
  1346. if (priv->wpss_supported)
  1347. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1348. ICNSS_SMP2P_OUT_POWER_SAVE);
  1349. icnss_send_hang_event_data(priv);
  1350. if (priv->early_crash_ind) {
  1351. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1352. event_data->crashed, priv->state);
  1353. goto out;
  1354. }
  1355. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1356. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1357. event_data->crashed, priv->state);
  1358. if (!priv->allow_recursive_recovery)
  1359. ICNSS_ASSERT(0);
  1360. goto out;
  1361. }
  1362. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1363. icnss_fw_crashed(priv, event_data);
  1364. out:
  1365. kfree(data);
  1366. return 0;
  1367. }
  1368. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1369. void *data)
  1370. {
  1371. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1372. icnss_ignore_fw_timeout(false);
  1373. goto out;
  1374. }
  1375. priv->early_crash_ind = true;
  1376. icnss_fw_crashed(priv, NULL);
  1377. out:
  1378. kfree(data);
  1379. return 0;
  1380. }
  1381. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1382. void *data)
  1383. {
  1384. int ret = 0;
  1385. if (!priv->ops || !priv->ops->idle_shutdown)
  1386. return 0;
  1387. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1388. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1389. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1390. ret = -EBUSY;
  1391. } else {
  1392. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1393. priv->state);
  1394. icnss_block_shutdown(true);
  1395. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1396. icnss_block_shutdown(false);
  1397. }
  1398. return ret;
  1399. }
  1400. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1401. void *data)
  1402. {
  1403. int ret = 0;
  1404. if (!priv->ops || !priv->ops->idle_restart)
  1405. return 0;
  1406. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1407. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1408. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1409. ret = -EBUSY;
  1410. } else {
  1411. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1412. priv->state);
  1413. icnss_block_shutdown(true);
  1414. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1415. icnss_block_shutdown(false);
  1416. }
  1417. return ret;
  1418. }
  1419. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1420. {
  1421. icnss_free_qdss_mem(priv);
  1422. return 0;
  1423. }
  1424. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1425. void *data)
  1426. {
  1427. struct icnss_m3_upload_segments_req_data *event_data = data;
  1428. struct qcom_dump_segment segment;
  1429. int i, status = 0, ret = 0;
  1430. struct list_head head;
  1431. if (!dump_enabled()) {
  1432. icnss_pr_info("Dump collection is not enabled\n");
  1433. return ret;
  1434. }
  1435. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1436. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1437. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1438. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1439. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1440. return ret;
  1441. INIT_LIST_HEAD(&head);
  1442. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1443. memset(&segment, 0, sizeof(segment));
  1444. segment.va = devm_ioremap(&priv->pdev->dev,
  1445. event_data->m3_segment[i].addr,
  1446. event_data->m3_segment[i].size);
  1447. if (!segment.va) {
  1448. icnss_pr_err("Failed to ioremap M3 Dump region");
  1449. ret = -ENOMEM;
  1450. goto send_resp;
  1451. }
  1452. segment.size = event_data->m3_segment[i].size;
  1453. list_add(&segment.node, &head);
  1454. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1455. event_data->m3_segment[i].name);
  1456. switch (event_data->m3_segment[i].type) {
  1457. case QMI_M3_SEGMENT_PHYAREG_V01:
  1458. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1459. break;
  1460. case QMI_M3_SEGMENT_PHYDBG_V01:
  1461. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1462. break;
  1463. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1464. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1465. break;
  1466. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1467. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1468. break;
  1469. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1470. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1471. break;
  1472. default:
  1473. icnss_pr_err("Invalid Segment type: %d",
  1474. event_data->m3_segment[i].type);
  1475. }
  1476. if (ret) {
  1477. status = ret;
  1478. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1479. event_data->m3_segment[i].name, ret);
  1480. }
  1481. list_del(&segment.node);
  1482. }
  1483. send_resp:
  1484. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1485. status);
  1486. return ret;
  1487. }
  1488. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1489. {
  1490. int ret = 0;
  1491. struct icnss_subsys_restart_level_data *event_data = data;
  1492. if (!priv)
  1493. return -ENODEV;
  1494. if (!data)
  1495. return -EINVAL;
  1496. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1497. kfree(data);
  1498. return ret;
  1499. }
  1500. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1501. {
  1502. int ret;
  1503. struct icnss_priv *priv = icnss_get_plat_priv();
  1504. rproc_shutdown(priv->rproc);
  1505. ret = rproc_boot(priv->rproc);
  1506. if (ret) {
  1507. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1508. rproc_put(priv->rproc);
  1509. }
  1510. }
  1511. static void icnss_driver_event_work(struct work_struct *work)
  1512. {
  1513. struct icnss_priv *priv =
  1514. container_of(work, struct icnss_priv, event_work);
  1515. struct icnss_driver_event *event;
  1516. unsigned long flags;
  1517. int ret;
  1518. icnss_pm_stay_awake(priv);
  1519. spin_lock_irqsave(&priv->event_lock, flags);
  1520. while (!list_empty(&priv->event_list)) {
  1521. event = list_first_entry(&priv->event_list,
  1522. struct icnss_driver_event, list);
  1523. list_del(&event->list);
  1524. spin_unlock_irqrestore(&priv->event_lock, flags);
  1525. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1526. icnss_driver_event_to_str(event->type),
  1527. event->sync ? "-sync" : "", event->type,
  1528. priv->state);
  1529. switch (event->type) {
  1530. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1531. ret = icnss_driver_event_server_arrive(priv,
  1532. event->data);
  1533. break;
  1534. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1535. ret = icnss_driver_event_server_exit(priv);
  1536. break;
  1537. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1538. ret = icnss_driver_event_fw_ready_ind(priv,
  1539. event->data);
  1540. break;
  1541. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1542. ret = icnss_driver_event_register_driver(priv,
  1543. event->data);
  1544. break;
  1545. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1546. ret = icnss_driver_event_unregister_driver(priv,
  1547. event->data);
  1548. break;
  1549. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1550. ret = icnss_driver_event_pd_service_down(priv,
  1551. event->data);
  1552. break;
  1553. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1554. ret = icnss_driver_event_early_crash_ind(priv,
  1555. event->data);
  1556. break;
  1557. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1558. ret = icnss_driver_event_idle_shutdown(priv,
  1559. event->data);
  1560. break;
  1561. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1562. ret = icnss_driver_event_idle_restart(priv,
  1563. event->data);
  1564. break;
  1565. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1566. ret = icnss_driver_event_fw_init_done(priv,
  1567. event->data);
  1568. break;
  1569. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1570. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1571. break;
  1572. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1573. ret = icnss_qdss_trace_save_hdlr(priv,
  1574. event->data);
  1575. break;
  1576. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1577. ret = icnss_qdss_trace_free_hdlr(priv);
  1578. break;
  1579. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1580. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1581. break;
  1582. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1583. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1584. event->data);
  1585. break;
  1586. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1587. ret = icnss_subsys_restart_level(priv, event->data);
  1588. break;
  1589. default:
  1590. icnss_pr_err("Invalid Event type: %d", event->type);
  1591. kfree(event);
  1592. continue;
  1593. }
  1594. priv->stats.events[event->type].processed++;
  1595. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1596. icnss_driver_event_to_str(event->type),
  1597. event->sync ? "-sync" : "", event->type, ret,
  1598. priv->state);
  1599. spin_lock_irqsave(&priv->event_lock, flags);
  1600. if (event->sync) {
  1601. event->ret = ret;
  1602. complete(&event->complete);
  1603. continue;
  1604. }
  1605. spin_unlock_irqrestore(&priv->event_lock, flags);
  1606. kfree(event);
  1607. spin_lock_irqsave(&priv->event_lock, flags);
  1608. }
  1609. spin_unlock_irqrestore(&priv->event_lock, flags);
  1610. icnss_pm_relax(priv);
  1611. }
  1612. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1613. {
  1614. struct icnss_priv *priv =
  1615. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1616. struct icnss_soc_wake_event *event;
  1617. unsigned long flags;
  1618. int ret;
  1619. icnss_pm_stay_awake(priv);
  1620. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1621. while (!list_empty(&priv->soc_wake_msg_list)) {
  1622. event = list_first_entry(&priv->soc_wake_msg_list,
  1623. struct icnss_soc_wake_event, list);
  1624. list_del(&event->list);
  1625. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1626. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1627. icnss_soc_wake_event_to_str(event->type),
  1628. event->sync ? "-sync" : "", event->type,
  1629. priv->state);
  1630. switch (event->type) {
  1631. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1632. ret = icnss_event_soc_wake_request(priv,
  1633. event->data);
  1634. break;
  1635. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1636. ret = icnss_event_soc_wake_release(priv,
  1637. event->data);
  1638. break;
  1639. default:
  1640. icnss_pr_err("Invalid Event type: %d", event->type);
  1641. kfree(event);
  1642. continue;
  1643. }
  1644. priv->stats.soc_wake_events[event->type].processed++;
  1645. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1646. icnss_soc_wake_event_to_str(event->type),
  1647. event->sync ? "-sync" : "", event->type, ret,
  1648. priv->state);
  1649. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1650. if (event->sync) {
  1651. event->ret = ret;
  1652. complete(&event->complete);
  1653. continue;
  1654. }
  1655. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1656. kfree(event);
  1657. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1658. }
  1659. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1660. icnss_pm_relax(priv);
  1661. }
  1662. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1663. {
  1664. int ret = 0;
  1665. struct qcom_dump_segment segment;
  1666. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1667. struct list_head head;
  1668. if (!dump_enabled()) {
  1669. icnss_pr_info("Dump collection is not enabled\n");
  1670. return ret;
  1671. }
  1672. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1673. return ret;
  1674. INIT_LIST_HEAD(&head);
  1675. memset(&segment, 0, sizeof(segment));
  1676. segment.va = priv->msa_va;
  1677. segment.size = priv->msa_mem_size;
  1678. list_add(&segment.node, &head);
  1679. if (!msa0_dump_dev->dev) {
  1680. icnss_pr_err("Created Dump Device not found\n");
  1681. return 0;
  1682. }
  1683. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1684. if (ret) {
  1685. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1686. return ret;
  1687. }
  1688. list_del(&segment.node);
  1689. return ret;
  1690. }
  1691. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1692. void *data)
  1693. {
  1694. struct qcom_ssr_notify_data *notif = data;
  1695. int ret = 0;
  1696. if (!notif->crashed) {
  1697. if (atomic_read(&priv->is_shutdown)) {
  1698. atomic_set(&priv->is_shutdown, false);
  1699. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1700. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1701. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1702. clear_bit(ICNSS_FW_READY, &priv->state);
  1703. icnss_driver_event_post(priv,
  1704. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1705. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1706. NULL);
  1707. }
  1708. }
  1709. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1710. if (!wait_for_completion_timeout(
  1711. &priv->unblock_shutdown,
  1712. msecs_to_jiffies(PROBE_TIMEOUT)))
  1713. icnss_pr_err("modem block shutdown timeout\n");
  1714. }
  1715. ret = wlfw_send_modem_shutdown_msg(priv);
  1716. if (ret < 0)
  1717. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1718. ret);
  1719. }
  1720. }
  1721. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1722. {
  1723. switch (code) {
  1724. case QCOM_SSR_BEFORE_POWERUP:
  1725. return "BEFORE_POWERUP";
  1726. case QCOM_SSR_AFTER_POWERUP:
  1727. return "AFTER_POWERUP";
  1728. case QCOM_SSR_BEFORE_SHUTDOWN:
  1729. return "BEFORE_SHUTDOWN";
  1730. case QCOM_SSR_AFTER_SHUTDOWN:
  1731. return "AFTER_SHUTDOWN";
  1732. default:
  1733. return "UNKNOWN";
  1734. }
  1735. };
  1736. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1737. unsigned long code,
  1738. void *data)
  1739. {
  1740. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1741. wpss_early_ssr_nb);
  1742. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1743. icnss_qcom_ssr_notify_state_to_str(code), code);
  1744. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1745. set_bit(ICNSS_FW_DOWN, &priv->state);
  1746. icnss_ignore_fw_timeout(true);
  1747. }
  1748. return NOTIFY_DONE;
  1749. }
  1750. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1751. unsigned long code,
  1752. void *data)
  1753. {
  1754. struct icnss_event_pd_service_down_data *event_data;
  1755. struct qcom_ssr_notify_data *notif = data;
  1756. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1757. wpss_ssr_nb);
  1758. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1759. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1760. icnss_qcom_ssr_notify_state_to_str(code), code);
  1761. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1762. icnss_pr_info("Collecting msa0 segment dump\n");
  1763. icnss_msa0_ramdump(priv);
  1764. goto out;
  1765. }
  1766. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1767. goto out;
  1768. if (priv->wpss_self_recovery_enabled)
  1769. del_timer(&priv->wpss_ssr_timer);
  1770. priv->is_ssr = true;
  1771. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1772. priv->state, notif->crashed);
  1773. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1774. icnss_update_state_send_modem_shutdown(priv, data);
  1775. set_bit(ICNSS_FW_DOWN, &priv->state);
  1776. icnss_ignore_fw_timeout(true);
  1777. if (notif->crashed)
  1778. priv->stats.recovery.root_pd_crash++;
  1779. else
  1780. priv->stats.recovery.root_pd_shutdown++;
  1781. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1782. if (event_data == NULL)
  1783. return notifier_from_errno(-ENOMEM);
  1784. event_data->crashed = notif->crashed;
  1785. fw_down_data.crashed = !!notif->crashed;
  1786. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1787. clear_bit(ICNSS_FW_READY, &priv->state);
  1788. fw_down_data.crashed = !!notif->crashed;
  1789. icnss_call_driver_uevent(priv,
  1790. ICNSS_UEVENT_FW_DOWN,
  1791. &fw_down_data);
  1792. }
  1793. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1794. ICNSS_EVENT_SYNC, event_data);
  1795. if (notif->crashed)
  1796. mod_timer(&priv->recovery_timer,
  1797. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1798. out:
  1799. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1800. return NOTIFY_OK;
  1801. }
  1802. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1803. unsigned long code,
  1804. void *data)
  1805. {
  1806. struct icnss_event_pd_service_down_data *event_data;
  1807. struct qcom_ssr_notify_data *notif = data;
  1808. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1809. modem_ssr_nb);
  1810. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1811. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1812. icnss_qcom_ssr_notify_state_to_str(code), code);
  1813. switch (code) {
  1814. case QCOM_SSR_BEFORE_SHUTDOWN:
  1815. if (!notif->crashed &&
  1816. priv->low_power_support) { /* Hibernate */
  1817. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1818. icnss_driver_event_post(
  1819. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1820. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1821. set_bit(ICNSS_LOW_POWER, &priv->state);
  1822. }
  1823. break;
  1824. case QCOM_SSR_AFTER_SHUTDOWN:
  1825. /* Collect ramdump only when there was a crash. */
  1826. if (notif->crashed) {
  1827. icnss_pr_info("Collecting msa0 segment dump\n");
  1828. icnss_msa0_ramdump(priv);
  1829. }
  1830. goto out;
  1831. default:
  1832. goto out;
  1833. }
  1834. priv->is_ssr = true;
  1835. if (notif->crashed) {
  1836. priv->stats.recovery.root_pd_crash++;
  1837. priv->root_pd_shutdown = false;
  1838. } else {
  1839. priv->stats.recovery.root_pd_shutdown++;
  1840. priv->root_pd_shutdown = true;
  1841. }
  1842. icnss_update_state_send_modem_shutdown(priv, data);
  1843. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1844. set_bit(ICNSS_FW_DOWN, &priv->state);
  1845. icnss_ignore_fw_timeout(true);
  1846. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1847. clear_bit(ICNSS_FW_READY, &priv->state);
  1848. fw_down_data.crashed = !!notif->crashed;
  1849. icnss_call_driver_uevent(priv,
  1850. ICNSS_UEVENT_FW_DOWN,
  1851. &fw_down_data);
  1852. }
  1853. goto out;
  1854. }
  1855. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1856. priv->state, notif->crashed);
  1857. set_bit(ICNSS_FW_DOWN, &priv->state);
  1858. icnss_ignore_fw_timeout(true);
  1859. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1860. if (event_data == NULL)
  1861. return notifier_from_errno(-ENOMEM);
  1862. event_data->crashed = notif->crashed;
  1863. fw_down_data.crashed = !!notif->crashed;
  1864. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1865. clear_bit(ICNSS_FW_READY, &priv->state);
  1866. fw_down_data.crashed = !!notif->crashed;
  1867. icnss_call_driver_uevent(priv,
  1868. ICNSS_UEVENT_FW_DOWN,
  1869. &fw_down_data);
  1870. }
  1871. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1872. ICNSS_EVENT_SYNC, event_data);
  1873. if (notif->crashed)
  1874. mod_timer(&priv->recovery_timer,
  1875. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1876. out:
  1877. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1878. return NOTIFY_OK;
  1879. }
  1880. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1881. {
  1882. int ret = 0;
  1883. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1884. priv->wpss_early_notify_handler =
  1885. qcom_register_early_ssr_notifier("wpss",
  1886. &priv->wpss_early_ssr_nb);
  1887. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1888. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1889. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1890. }
  1891. return ret;
  1892. }
  1893. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1894. {
  1895. int ret = 0;
  1896. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1897. /*
  1898. * Assign priority of icnss wpss notifier callback over IPA
  1899. * modem notifier callback which is 0
  1900. */
  1901. priv->wpss_ssr_nb.priority = 1;
  1902. priv->wpss_notify_handler =
  1903. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1904. if (IS_ERR(priv->wpss_notify_handler)) {
  1905. ret = PTR_ERR(priv->wpss_notify_handler);
  1906. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1907. }
  1908. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1909. return ret;
  1910. }
  1911. #ifdef SLATE_MODULE_ENABLED
  1912. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1913. unsigned long event, void *data)
  1914. {
  1915. if (event == SLATE_STATUS) {
  1916. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1917. seb_nb);
  1918. enum boot_status status = *(enum boot_status *)data;
  1919. if (status == SLATE_READY) {
  1920. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1921. priv->state);
  1922. set_bit(ICNSS_SLATE_READY, &priv->state);
  1923. set_bit(ICNSS_SLATE_UP, &priv->state);
  1924. complete(&priv->slate_boot_complete);
  1925. }
  1926. }
  1927. return NOTIFY_OK;
  1928. }
  1929. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1930. {
  1931. int ret = 0;
  1932. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1933. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1934. &priv->seb_nb);
  1935. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1936. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1937. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1938. ret);
  1939. }
  1940. return ret;
  1941. }
  1942. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1943. unsigned long code,
  1944. void *data)
  1945. {
  1946. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1947. slate_ssr_nb);
  1948. int ret = 0;
  1949. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1950. if (code == QCOM_SSR_AFTER_POWERUP &&
  1951. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  1952. set_bit(ICNSS_SLATE_UP, &priv->state);
  1953. complete(&priv->slate_boot_complete);
  1954. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1955. priv->state);
  1956. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1957. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1958. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1959. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1960. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1961. priv->state);
  1962. goto skip_pdr;
  1963. }
  1964. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1965. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1966. if (ret < 0) {
  1967. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1968. ret, priv->state);
  1969. goto skip_pdr;
  1970. }
  1971. }
  1972. skip_pdr:
  1973. return NOTIFY_OK;
  1974. }
  1975. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1976. {
  1977. int ret = 0;
  1978. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1979. priv->slate_notify_handler =
  1980. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1981. if (IS_ERR(priv->slate_notify_handler)) {
  1982. ret = PTR_ERR(priv->slate_notify_handler);
  1983. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1984. }
  1985. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1986. return ret;
  1987. }
  1988. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1989. {
  1990. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1991. return 0;
  1992. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1993. &priv->slate_ssr_nb);
  1994. priv->slate_notify_handler = NULL;
  1995. return 0;
  1996. }
  1997. #else
  1998. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1999. {
  2000. return 0;
  2001. }
  2002. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2003. {
  2004. return 0;
  2005. }
  2006. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2007. {
  2008. return 0;
  2009. }
  2010. #endif
  2011. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2012. {
  2013. int ret = 0;
  2014. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2015. /*
  2016. * Assign priority of icnss modem notifier callback over IPA
  2017. * modem notifier callback which is 0
  2018. */
  2019. priv->modem_ssr_nb.priority = 1;
  2020. priv->modem_notify_handler =
  2021. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2022. if (IS_ERR(priv->modem_notify_handler)) {
  2023. ret = PTR_ERR(priv->modem_notify_handler);
  2024. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2025. }
  2026. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2027. return ret;
  2028. }
  2029. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2030. {
  2031. if (IS_ERR(priv->wpss_early_notify_handler))
  2032. return;
  2033. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2034. &priv->wpss_early_ssr_nb);
  2035. priv->wpss_early_notify_handler = NULL;
  2036. }
  2037. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2038. {
  2039. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2040. return 0;
  2041. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2042. &priv->wpss_ssr_nb);
  2043. priv->wpss_notify_handler = NULL;
  2044. return 0;
  2045. }
  2046. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2047. {
  2048. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2049. return 0;
  2050. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2051. &priv->modem_ssr_nb);
  2052. priv->modem_notify_handler = NULL;
  2053. return 0;
  2054. }
  2055. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2056. {
  2057. struct icnss_priv *priv = priv_cb;
  2058. struct icnss_event_pd_service_down_data *event_data;
  2059. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2060. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2061. if (!priv)
  2062. return;
  2063. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2064. state, priv->state);
  2065. switch (state) {
  2066. case SERVREG_SERVICE_STATE_DOWN:
  2067. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2068. if (!event_data)
  2069. return;
  2070. event_data->crashed = true;
  2071. if (!priv->is_ssr) {
  2072. set_bit(ICNSS_PDR, &penv->state);
  2073. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2074. cause = ICNSS_HOST_ERROR;
  2075. priv->stats.recovery.pdr_host_error++;
  2076. } else {
  2077. cause = ICNSS_FW_CRASH;
  2078. priv->stats.recovery.pdr_fw_crash++;
  2079. }
  2080. } else if (priv->root_pd_shutdown) {
  2081. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2082. event_data->crashed = false;
  2083. }
  2084. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2085. priv->state, icnss_pdr_cause[cause]);
  2086. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2087. set_bit(ICNSS_FW_DOWN, &priv->state);
  2088. icnss_ignore_fw_timeout(true);
  2089. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2090. clear_bit(ICNSS_FW_READY, &priv->state);
  2091. fw_down_data.crashed = event_data->crashed;
  2092. icnss_call_driver_uevent(priv,
  2093. ICNSS_UEVENT_FW_DOWN,
  2094. &fw_down_data);
  2095. }
  2096. }
  2097. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2098. if (event_data->crashed)
  2099. mod_timer(&priv->recovery_timer,
  2100. jiffies +
  2101. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2102. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2103. ICNSS_EVENT_SYNC, event_data);
  2104. break;
  2105. case SERVREG_SERVICE_STATE_UP:
  2106. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2107. break;
  2108. default:
  2109. break;
  2110. }
  2111. return;
  2112. }
  2113. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2114. {
  2115. struct pdr_handle *handle = NULL;
  2116. struct pdr_service *service = NULL;
  2117. int err = 0;
  2118. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2119. if (IS_ERR_OR_NULL(handle)) {
  2120. err = PTR_ERR(handle);
  2121. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2122. goto out;
  2123. }
  2124. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2125. if (IS_ERR_OR_NULL(service)) {
  2126. err = PTR_ERR(service);
  2127. icnss_pr_err("Failed to add lookup, err %d", err);
  2128. goto out;
  2129. }
  2130. priv->pdr_handle = handle;
  2131. priv->pdr_service = service;
  2132. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2133. icnss_pr_info("PDR registration happened");
  2134. out:
  2135. return err;
  2136. }
  2137. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2138. {
  2139. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2140. return;
  2141. pdr_handle_release(priv->pdr_handle);
  2142. }
  2143. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2144. {
  2145. int ret = 0;
  2146. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2147. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2148. ret = PTR_ERR(priv->icnss_ramdump_class);
  2149. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2150. return ret;
  2151. }
  2152. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2153. ICNSS_RAMDUMP_NAME);
  2154. if (ret < 0) {
  2155. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2156. goto fail_alloc_major;
  2157. }
  2158. return 0;
  2159. fail_alloc_major:
  2160. class_destroy(priv->icnss_ramdump_class);
  2161. return ret;
  2162. }
  2163. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2164. {
  2165. int ret = 0;
  2166. struct icnss_ramdump_info *ramdump_info;
  2167. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2168. if (!ramdump_info)
  2169. return ERR_PTR(-ENOMEM);
  2170. if (!dev_name) {
  2171. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2172. return NULL;
  2173. }
  2174. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2175. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2176. if (ramdump_info->minor < 0) {
  2177. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2178. ramdump_info->minor);
  2179. ret = -ENODEV;
  2180. goto fail_out_of_minors;
  2181. }
  2182. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2183. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2184. ramdump_info->minor),
  2185. ramdump_info, ramdump_info->name);
  2186. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2187. ret = PTR_ERR(ramdump_info->dev);
  2188. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2189. ramdump_info->name, ret);
  2190. goto fail_device_create;
  2191. }
  2192. return (void *)ramdump_info;
  2193. fail_device_create:
  2194. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2195. fail_out_of_minors:
  2196. kfree(ramdump_info);
  2197. return ERR_PTR(ret);
  2198. }
  2199. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2200. {
  2201. int ret = 0;
  2202. if (!priv || !priv->pdev) {
  2203. icnss_pr_err("Platform priv or pdev is NULL\n");
  2204. return -EINVAL;
  2205. }
  2206. ret = icnss_ramdump_devnode_init(priv);
  2207. if (ret)
  2208. return ret;
  2209. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2210. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2211. icnss_pr_err("Failed to create msa0 dump device!");
  2212. return -ENOMEM;
  2213. }
  2214. if (priv->device_id == WCN6750_DEVICE_ID ||
  2215. priv->device_id == WCN6450_DEVICE_ID) {
  2216. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2217. ICNSS_M3_SEGMENT(
  2218. ICNSS_M3_SEGMENT_PHYAREG));
  2219. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2220. !priv->m3_dump_phyareg->dev) {
  2221. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2222. return -ENOMEM;
  2223. }
  2224. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2225. ICNSS_M3_SEGMENT(
  2226. ICNSS_M3_SEGMENT_PHYA));
  2227. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2228. !priv->m3_dump_phydbg->dev) {
  2229. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2230. return -ENOMEM;
  2231. }
  2232. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2233. ICNSS_M3_SEGMENT(
  2234. ICNSS_M3_SEGMENT_WMACREG));
  2235. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2236. !priv->m3_dump_wmac0reg->dev) {
  2237. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2238. return -ENOMEM;
  2239. }
  2240. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2241. ICNSS_M3_SEGMENT(
  2242. ICNSS_M3_SEGMENT_WCSSDBG));
  2243. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2244. !priv->m3_dump_wcssdbg->dev) {
  2245. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2246. return -ENOMEM;
  2247. }
  2248. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2249. ICNSS_M3_SEGMENT(
  2250. ICNSS_M3_SEGMENT_PHYAM3));
  2251. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2252. !priv->m3_dump_phyapdmem->dev) {
  2253. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2254. return -ENOMEM;
  2255. }
  2256. }
  2257. return 0;
  2258. }
  2259. static int icnss_enable_recovery(struct icnss_priv *priv)
  2260. {
  2261. int ret;
  2262. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2263. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2264. return 0;
  2265. }
  2266. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2267. icnss_pr_dbg("SSR disabled through module parameter\n");
  2268. goto enable_pdr;
  2269. }
  2270. ret = icnss_register_ramdump_devices(priv);
  2271. if (ret)
  2272. return ret;
  2273. if (priv->wpss_supported) {
  2274. icnss_wpss_early_ssr_register_notifier(priv);
  2275. icnss_wpss_ssr_register_notifier(priv);
  2276. return 0;
  2277. }
  2278. icnss_modem_ssr_register_notifier(priv);
  2279. if (priv->is_slate_rfa) {
  2280. icnss_slate_ssr_register_notifier(priv);
  2281. icnss_register_slate_event_notifier(priv);
  2282. }
  2283. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2284. icnss_pr_dbg("PDR disabled through module parameter\n");
  2285. return 0;
  2286. }
  2287. enable_pdr:
  2288. ret = icnss_pd_restart_enable(priv);
  2289. if (ret)
  2290. return ret;
  2291. return 0;
  2292. }
  2293. static int icnss_dev_id_match(struct icnss_priv *priv,
  2294. struct device_info *dev_info)
  2295. {
  2296. while (dev_info->device_id) {
  2297. if (priv->device_id == dev_info->device_id)
  2298. return 1;
  2299. dev_info++;
  2300. }
  2301. return 0;
  2302. }
  2303. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2304. unsigned long *thermal_state)
  2305. {
  2306. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2307. *thermal_state = icnss_tcdev->max_thermal_state;
  2308. return 0;
  2309. }
  2310. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2311. unsigned long *thermal_state)
  2312. {
  2313. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2314. *thermal_state = icnss_tcdev->curr_thermal_state;
  2315. return 0;
  2316. }
  2317. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2318. unsigned long thermal_state)
  2319. {
  2320. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2321. struct device *dev = &penv->pdev->dev;
  2322. int ret = 0;
  2323. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2324. return 0;
  2325. if (thermal_state > icnss_tcdev->max_thermal_state)
  2326. return -EINVAL;
  2327. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2328. thermal_state, icnss_tcdev->tcdev_id);
  2329. mutex_lock(&penv->tcdev_lock);
  2330. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2331. icnss_tcdev->tcdev_id);
  2332. if (!ret)
  2333. icnss_tcdev->curr_thermal_state = thermal_state;
  2334. mutex_unlock(&penv->tcdev_lock);
  2335. if (ret) {
  2336. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2337. ret, icnss_tcdev->tcdev_id);
  2338. return ret;
  2339. }
  2340. return 0;
  2341. }
  2342. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2343. .get_max_state = icnss_tcdev_get_max_state,
  2344. .get_cur_state = icnss_tcdev_get_cur_state,
  2345. .set_cur_state = icnss_tcdev_set_cur_state,
  2346. };
  2347. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2348. int tcdev_id)
  2349. {
  2350. struct icnss_priv *priv = dev_get_drvdata(dev);
  2351. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2352. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2353. struct device_node *dev_node;
  2354. int ret = 0;
  2355. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2356. if (!icnss_tcdev)
  2357. return -ENOMEM;
  2358. icnss_tcdev->tcdev_id = tcdev_id;
  2359. icnss_tcdev->max_thermal_state = max_state;
  2360. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2361. "qcom,icnss_cdev%d", tcdev_id);
  2362. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2363. if (!dev_node) {
  2364. icnss_pr_err("Failed to get cooling device node\n");
  2365. return -EINVAL;
  2366. }
  2367. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2368. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2369. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2370. dev_node,
  2371. cdev_node_name, icnss_tcdev,
  2372. &icnss_cooling_ops);
  2373. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2374. ret = PTR_ERR(icnss_tcdev->tcdev);
  2375. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2376. ret, icnss_tcdev->tcdev_id);
  2377. } else {
  2378. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2379. icnss_tcdev->tcdev_id);
  2380. list_add(&icnss_tcdev->tcdev_list,
  2381. &priv->icnss_tcdev_list);
  2382. }
  2383. } else {
  2384. icnss_pr_dbg("Cooling device registration not supported");
  2385. ret = -EOPNOTSUPP;
  2386. }
  2387. return ret;
  2388. }
  2389. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2390. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2391. {
  2392. struct icnss_priv *priv = dev_get_drvdata(dev);
  2393. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2394. while (!list_empty(&priv->icnss_tcdev_list)) {
  2395. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2396. struct icnss_thermal_cdev,
  2397. tcdev_list);
  2398. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2399. list_del(&icnss_tcdev->tcdev_list);
  2400. kfree(icnss_tcdev);
  2401. }
  2402. }
  2403. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2404. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2405. unsigned long *thermal_state,
  2406. int tcdev_id)
  2407. {
  2408. struct icnss_priv *priv = dev_get_drvdata(dev);
  2409. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2410. mutex_lock(&priv->tcdev_lock);
  2411. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2412. if (icnss_tcdev->tcdev_id != tcdev_id)
  2413. continue;
  2414. *thermal_state = icnss_tcdev->curr_thermal_state;
  2415. mutex_unlock(&priv->tcdev_lock);
  2416. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2417. icnss_tcdev->curr_thermal_state, tcdev_id);
  2418. return 0;
  2419. }
  2420. mutex_unlock(&priv->tcdev_lock);
  2421. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2422. return -EINVAL;
  2423. }
  2424. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2425. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2426. int cmd_len, void *cb_ctx,
  2427. int (*cb)(void *ctx, void *event, int event_len))
  2428. {
  2429. struct icnss_priv *priv = icnss_get_plat_priv();
  2430. int ret;
  2431. if (!priv)
  2432. return -ENODEV;
  2433. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2434. return -EINVAL;
  2435. priv->get_info_cb = cb;
  2436. priv->get_info_cb_ctx = cb_ctx;
  2437. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2438. if (ret) {
  2439. priv->get_info_cb = NULL;
  2440. priv->get_info_cb_ctx = NULL;
  2441. }
  2442. return ret;
  2443. }
  2444. EXPORT_SYMBOL(icnss_qmi_send);
  2445. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2446. struct module *owner, const char *mod_name)
  2447. {
  2448. int ret = 0;
  2449. struct icnss_priv *priv = icnss_get_plat_priv();
  2450. if (!priv || !priv->pdev) {
  2451. ret = -ENODEV;
  2452. goto out;
  2453. }
  2454. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2455. if (priv->ops) {
  2456. icnss_pr_err("Driver already registered\n");
  2457. ret = -EEXIST;
  2458. goto out;
  2459. }
  2460. if (!ops->dev_info) {
  2461. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2462. return -EINVAL;
  2463. }
  2464. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2465. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2466. ops->dev_info->name);
  2467. return -ENODEV;
  2468. }
  2469. if (!ops->probe || !ops->remove) {
  2470. ret = -EINVAL;
  2471. goto out;
  2472. }
  2473. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2474. 0, ops);
  2475. if (ret == -EINTR)
  2476. ret = 0;
  2477. out:
  2478. return ret;
  2479. }
  2480. EXPORT_SYMBOL(__icnss_register_driver);
  2481. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2482. {
  2483. int ret;
  2484. struct icnss_priv *priv = icnss_get_plat_priv();
  2485. if (!priv || !priv->pdev) {
  2486. ret = -ENODEV;
  2487. goto out;
  2488. }
  2489. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2490. if (!priv->ops) {
  2491. icnss_pr_err("Driver not registered\n");
  2492. ret = -ENOENT;
  2493. goto out;
  2494. }
  2495. ret = icnss_driver_event_post(priv,
  2496. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2497. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2498. out:
  2499. return ret;
  2500. }
  2501. EXPORT_SYMBOL(icnss_unregister_driver);
  2502. static struct icnss_msi_config msi_config_wcn6750 = {
  2503. .total_vectors = 28,
  2504. .total_users = 2,
  2505. .users = (struct icnss_msi_user[]) {
  2506. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2507. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2508. },
  2509. };
  2510. static struct icnss_msi_config msi_config_wcn6450 = {
  2511. .total_vectors = 10,
  2512. .total_users = 1,
  2513. .users = (struct icnss_msi_user[]) {
  2514. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2515. },
  2516. };
  2517. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2518. {
  2519. if (priv->device_id == WCN6750_DEVICE_ID)
  2520. priv->msi_config = &msi_config_wcn6750;
  2521. else
  2522. priv->msi_config = &msi_config_wcn6450;
  2523. return 0;
  2524. }
  2525. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2526. int *num_vectors, u32 *user_base_data,
  2527. u32 *base_vector)
  2528. {
  2529. struct icnss_priv *priv = dev_get_drvdata(dev);
  2530. struct icnss_msi_config *msi_config;
  2531. int idx;
  2532. if (!priv)
  2533. return -ENODEV;
  2534. msi_config = priv->msi_config;
  2535. if (!msi_config) {
  2536. icnss_pr_err("MSI is not supported.\n");
  2537. return -EINVAL;
  2538. }
  2539. for (idx = 0; idx < msi_config->total_users; idx++) {
  2540. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2541. *num_vectors = msi_config->users[idx].num_vectors;
  2542. *user_base_data = msi_config->users[idx].base_vector
  2543. + priv->msi_base_data;
  2544. *base_vector = msi_config->users[idx].base_vector;
  2545. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2546. user_name, *num_vectors, *user_base_data,
  2547. *base_vector);
  2548. return 0;
  2549. }
  2550. }
  2551. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2552. return -EINVAL;
  2553. }
  2554. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2555. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2556. {
  2557. struct icnss_priv *priv = dev_get_drvdata(dev);
  2558. int irq_num;
  2559. irq_num = priv->srng_irqs[vector];
  2560. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2561. irq_num, vector);
  2562. return irq_num;
  2563. }
  2564. EXPORT_SYMBOL(icnss_get_msi_irq);
  2565. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2566. u32 *msi_addr_high)
  2567. {
  2568. struct icnss_priv *priv = dev_get_drvdata(dev);
  2569. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2570. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2571. }
  2572. EXPORT_SYMBOL(icnss_get_msi_address);
  2573. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2574. irqreturn_t (*handler)(int, void *),
  2575. unsigned long flags, const char *name, void *ctx)
  2576. {
  2577. int ret = 0;
  2578. unsigned int irq;
  2579. struct ce_irq_list *irq_entry;
  2580. struct icnss_priv *priv = dev_get_drvdata(dev);
  2581. if (!priv || !priv->pdev) {
  2582. ret = -ENODEV;
  2583. goto out;
  2584. }
  2585. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2586. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2587. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2588. ret = -EINVAL;
  2589. goto out;
  2590. }
  2591. irq = priv->ce_irqs[ce_id];
  2592. irq_entry = &priv->ce_irq_list[ce_id];
  2593. if (irq_entry->handler || irq_entry->irq) {
  2594. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2595. irq, ce_id);
  2596. ret = -EEXIST;
  2597. goto out;
  2598. }
  2599. ret = request_irq(irq, handler, flags, name, ctx);
  2600. if (ret) {
  2601. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2602. irq, ce_id, ret);
  2603. goto out;
  2604. }
  2605. irq_entry->irq = irq;
  2606. irq_entry->handler = handler;
  2607. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2608. penv->stats.ce_irqs[ce_id].request++;
  2609. out:
  2610. return ret;
  2611. }
  2612. EXPORT_SYMBOL(icnss_ce_request_irq);
  2613. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2614. {
  2615. int ret = 0;
  2616. unsigned int irq;
  2617. struct ce_irq_list *irq_entry;
  2618. if (!penv || !penv->pdev || !dev) {
  2619. ret = -ENODEV;
  2620. goto out;
  2621. }
  2622. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2623. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2624. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2625. ret = -EINVAL;
  2626. goto out;
  2627. }
  2628. irq = penv->ce_irqs[ce_id];
  2629. irq_entry = &penv->ce_irq_list[ce_id];
  2630. if (!irq_entry->handler || !irq_entry->irq) {
  2631. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2632. ret = -EEXIST;
  2633. goto out;
  2634. }
  2635. free_irq(irq, ctx);
  2636. irq_entry->irq = 0;
  2637. irq_entry->handler = NULL;
  2638. penv->stats.ce_irqs[ce_id].free++;
  2639. out:
  2640. return ret;
  2641. }
  2642. EXPORT_SYMBOL(icnss_ce_free_irq);
  2643. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2644. {
  2645. unsigned int irq;
  2646. if (!penv || !penv->pdev || !dev) {
  2647. icnss_pr_err("Platform driver not initialized\n");
  2648. return;
  2649. }
  2650. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2651. penv->state);
  2652. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2653. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2654. return;
  2655. }
  2656. penv->stats.ce_irqs[ce_id].enable++;
  2657. irq = penv->ce_irqs[ce_id];
  2658. enable_irq(irq);
  2659. }
  2660. EXPORT_SYMBOL(icnss_enable_irq);
  2661. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2662. {
  2663. unsigned int irq;
  2664. if (!penv || !penv->pdev || !dev) {
  2665. icnss_pr_err("Platform driver not initialized\n");
  2666. return;
  2667. }
  2668. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2669. penv->state);
  2670. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2671. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2672. ce_id);
  2673. return;
  2674. }
  2675. irq = penv->ce_irqs[ce_id];
  2676. disable_irq(irq);
  2677. penv->stats.ce_irqs[ce_id].disable++;
  2678. }
  2679. EXPORT_SYMBOL(icnss_disable_irq);
  2680. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2681. {
  2682. char *fw_build_timestamp = NULL;
  2683. struct icnss_priv *priv = dev_get_drvdata(dev);
  2684. if (!priv) {
  2685. icnss_pr_err("Platform driver not initialized\n");
  2686. return -EINVAL;
  2687. }
  2688. info->v_addr = priv->mem_base_va;
  2689. info->p_addr = priv->mem_base_pa;
  2690. info->chip_id = priv->chip_info.chip_id;
  2691. info->chip_family = priv->chip_info.chip_family;
  2692. info->board_id = priv->board_id;
  2693. info->soc_id = priv->soc_id;
  2694. info->fw_version = priv->fw_version_info.fw_version;
  2695. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2696. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2697. strlcpy(info->fw_build_timestamp,
  2698. priv->fw_version_info.fw_build_timestamp,
  2699. WLFW_MAX_TIMESTAMP_LEN + 1);
  2700. strlcpy(info->fw_build_id, priv->fw_build_id,
  2701. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2702. return 0;
  2703. }
  2704. EXPORT_SYMBOL(icnss_get_soc_info);
  2705. int icnss_get_mhi_state(struct device *dev)
  2706. {
  2707. struct icnss_priv *priv = dev_get_drvdata(dev);
  2708. if (!priv) {
  2709. icnss_pr_err("Platform driver not initialized\n");
  2710. return -EINVAL;
  2711. }
  2712. if (!priv->mhi_state_info_va)
  2713. return -ENOMEM;
  2714. return ioread32(priv->mhi_state_info_va);
  2715. }
  2716. EXPORT_SYMBOL(icnss_get_mhi_state);
  2717. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2718. {
  2719. int ret;
  2720. struct icnss_priv *priv;
  2721. if (!dev)
  2722. return -ENODEV;
  2723. priv = dev_get_drvdata(dev);
  2724. if (!priv) {
  2725. icnss_pr_err("Platform driver not initialized\n");
  2726. return -EINVAL;
  2727. }
  2728. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2729. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2730. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2731. priv->state);
  2732. return -EINVAL;
  2733. }
  2734. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2735. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2736. if (ret)
  2737. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2738. ret, fw_log_mode);
  2739. return ret;
  2740. }
  2741. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2742. int icnss_force_wake_request(struct device *dev)
  2743. {
  2744. struct icnss_priv *priv;
  2745. if (!dev)
  2746. return -ENODEV;
  2747. priv = dev_get_drvdata(dev);
  2748. if (!priv) {
  2749. icnss_pr_err("Platform driver not initialized\n");
  2750. return -EINVAL;
  2751. }
  2752. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2753. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2754. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2755. priv->state);
  2756. return -EINVAL;
  2757. }
  2758. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2759. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2760. atomic_read(&priv->soc_wake_ref_count));
  2761. return 0;
  2762. }
  2763. icnss_pr_soc_wake("Calling SOC Wake request");
  2764. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2765. 0, NULL);
  2766. return 0;
  2767. }
  2768. EXPORT_SYMBOL(icnss_force_wake_request);
  2769. int icnss_force_wake_release(struct device *dev)
  2770. {
  2771. struct icnss_priv *priv;
  2772. if (!dev)
  2773. return -ENODEV;
  2774. priv = dev_get_drvdata(dev);
  2775. if (!priv) {
  2776. icnss_pr_err("Platform driver not initialized\n");
  2777. return -EINVAL;
  2778. }
  2779. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2780. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2781. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2782. priv->state);
  2783. return -EINVAL;
  2784. }
  2785. icnss_pr_soc_wake("Calling SOC Wake response");
  2786. if (atomic_read(&priv->soc_wake_ref_count) &&
  2787. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2788. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2789. atomic_read(&priv->soc_wake_ref_count));
  2790. return 0;
  2791. }
  2792. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2793. 0, NULL);
  2794. return 0;
  2795. }
  2796. EXPORT_SYMBOL(icnss_force_wake_release);
  2797. int icnss_is_device_awake(struct device *dev)
  2798. {
  2799. struct icnss_priv *priv = dev_get_drvdata(dev);
  2800. if (!priv) {
  2801. icnss_pr_err("Platform driver not initialized\n");
  2802. return -EINVAL;
  2803. }
  2804. return atomic_read(&priv->soc_wake_ref_count);
  2805. }
  2806. EXPORT_SYMBOL(icnss_is_device_awake);
  2807. int icnss_is_pci_ep_awake(struct device *dev)
  2808. {
  2809. struct icnss_priv *priv = dev_get_drvdata(dev);
  2810. if (!priv) {
  2811. icnss_pr_err("Platform driver not initialized\n");
  2812. return -EINVAL;
  2813. }
  2814. if (!priv->mhi_state_info_va)
  2815. return -ENOMEM;
  2816. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2817. }
  2818. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2819. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2820. uint32_t mem_type, uint32_t data_len,
  2821. uint8_t *output)
  2822. {
  2823. int ret = 0;
  2824. struct icnss_priv *priv = dev_get_drvdata(dev);
  2825. if (priv->magic != ICNSS_MAGIC) {
  2826. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2827. dev, priv, priv->magic);
  2828. return -EINVAL;
  2829. }
  2830. if (!output || data_len == 0
  2831. || data_len > WLFW_MAX_DATA_SIZE) {
  2832. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2833. output, data_len);
  2834. ret = -EINVAL;
  2835. goto out;
  2836. }
  2837. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2838. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2839. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2840. priv->state);
  2841. ret = -EINVAL;
  2842. goto out;
  2843. }
  2844. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2845. data_len, output);
  2846. out:
  2847. return ret;
  2848. }
  2849. EXPORT_SYMBOL(icnss_athdiag_read);
  2850. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2851. uint32_t mem_type, uint32_t data_len,
  2852. uint8_t *input)
  2853. {
  2854. int ret = 0;
  2855. struct icnss_priv *priv = dev_get_drvdata(dev);
  2856. if (priv->magic != ICNSS_MAGIC) {
  2857. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2858. dev, priv, priv->magic);
  2859. return -EINVAL;
  2860. }
  2861. if (!input || data_len == 0
  2862. || data_len > WLFW_MAX_DATA_SIZE) {
  2863. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2864. input, data_len);
  2865. ret = -EINVAL;
  2866. goto out;
  2867. }
  2868. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2869. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2870. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2871. priv->state);
  2872. ret = -EINVAL;
  2873. goto out;
  2874. }
  2875. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2876. data_len, input);
  2877. out:
  2878. return ret;
  2879. }
  2880. EXPORT_SYMBOL(icnss_athdiag_write);
  2881. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2882. enum icnss_driver_mode mode,
  2883. const char *host_version)
  2884. {
  2885. struct icnss_priv *priv = dev_get_drvdata(dev);
  2886. int temp = 0, ret = 0;
  2887. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2888. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2889. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2890. priv->state);
  2891. return -EINVAL;
  2892. }
  2893. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2894. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2895. priv->state);
  2896. return -EINVAL;
  2897. }
  2898. if (priv->wpss_supported &&
  2899. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2900. icnss_setup_dms_mac(priv);
  2901. if (priv->device_id == WCN6750_DEVICE_ID) {
  2902. if (!icnss_get_temperature(priv, &temp)) {
  2903. icnss_pr_dbg("Temperature: %d\n", temp);
  2904. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2905. icnss_set_wlan_en_delay(priv);
  2906. }
  2907. }
  2908. if (priv->device_id == WCN6450_DEVICE_ID)
  2909. icnss_hw_power_off(priv);
  2910. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2911. if (priv->device_id == WCN6450_DEVICE_ID)
  2912. icnss_hw_power_on(priv);
  2913. return ret;
  2914. }
  2915. EXPORT_SYMBOL(icnss_wlan_enable);
  2916. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2917. {
  2918. struct icnss_priv *priv = dev_get_drvdata(dev);
  2919. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2920. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2921. priv->state);
  2922. return 0;
  2923. }
  2924. return icnss_send_wlan_disable_to_fw(priv);
  2925. }
  2926. EXPORT_SYMBOL(icnss_wlan_disable);
  2927. bool icnss_is_qmi_disable(struct device *dev)
  2928. {
  2929. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2930. }
  2931. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2932. int icnss_get_ce_id(struct device *dev, int irq)
  2933. {
  2934. int i;
  2935. if (!penv || !penv->pdev || !dev)
  2936. return -ENODEV;
  2937. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2938. if (penv->ce_irqs[i] == irq)
  2939. return i;
  2940. }
  2941. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2942. return -EINVAL;
  2943. }
  2944. EXPORT_SYMBOL(icnss_get_ce_id);
  2945. int icnss_get_irq(struct device *dev, int ce_id)
  2946. {
  2947. int irq;
  2948. if (!penv || !penv->pdev || !dev)
  2949. return -ENODEV;
  2950. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2951. return -EINVAL;
  2952. irq = penv->ce_irqs[ce_id];
  2953. return irq;
  2954. }
  2955. EXPORT_SYMBOL(icnss_get_irq);
  2956. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2957. {
  2958. struct icnss_priv *priv = dev_get_drvdata(dev);
  2959. if (!priv) {
  2960. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2961. return NULL;
  2962. }
  2963. return priv->iommu_domain;
  2964. }
  2965. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2966. int icnss_smmu_map(struct device *dev,
  2967. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2968. {
  2969. struct icnss_priv *priv = dev_get_drvdata(dev);
  2970. int flag = IOMMU_READ | IOMMU_WRITE;
  2971. bool dma_coherent = false;
  2972. unsigned long iova;
  2973. int prop_len = 0;
  2974. size_t len;
  2975. int ret = 0;
  2976. if (!priv) {
  2977. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2978. dev, priv);
  2979. return -EINVAL;
  2980. }
  2981. if (!iova_addr) {
  2982. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2983. &paddr, size);
  2984. return -EINVAL;
  2985. }
  2986. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2987. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2988. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2989. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2990. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2991. iova,
  2992. &priv->smmu_iova_ipa_start,
  2993. priv->smmu_iova_ipa_len);
  2994. return -ENOMEM;
  2995. }
  2996. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2997. icnss_pr_dbg("dma-coherent is %s\n",
  2998. dma_coherent ? "enabled" : "disabled");
  2999. if (dma_coherent)
  3000. flag |= IOMMU_CACHE;
  3001. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3002. ret = iommu_map(priv->iommu_domain, iova,
  3003. rounddown(paddr, PAGE_SIZE), len,
  3004. flag);
  3005. if (ret) {
  3006. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3007. return ret;
  3008. }
  3009. priv->smmu_iova_ipa_current = iova + len;
  3010. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3011. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3012. return 0;
  3013. }
  3014. EXPORT_SYMBOL(icnss_smmu_map);
  3015. int icnss_smmu_unmap(struct device *dev,
  3016. uint32_t iova_addr, size_t size)
  3017. {
  3018. struct icnss_priv *priv = dev_get_drvdata(dev);
  3019. unsigned long iova;
  3020. size_t len, unmapped_len;
  3021. if (!priv) {
  3022. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3023. dev, priv);
  3024. return -EINVAL;
  3025. }
  3026. if (!iova_addr) {
  3027. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3028. size);
  3029. return -EINVAL;
  3030. }
  3031. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3032. PAGE_SIZE);
  3033. iova = rounddown(iova_addr, PAGE_SIZE);
  3034. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3035. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3036. iova,
  3037. &priv->smmu_iova_ipa_start,
  3038. priv->smmu_iova_ipa_len);
  3039. return -ENOMEM;
  3040. }
  3041. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3042. iova, len);
  3043. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3044. if (unmapped_len != len) {
  3045. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3046. return -EINVAL;
  3047. }
  3048. priv->smmu_iova_ipa_current = iova;
  3049. return 0;
  3050. }
  3051. EXPORT_SYMBOL(icnss_smmu_unmap);
  3052. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3053. {
  3054. return socinfo_get_serial_number();
  3055. }
  3056. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3057. int icnss_trigger_recovery(struct device *dev)
  3058. {
  3059. int ret = 0;
  3060. struct icnss_priv *priv = dev_get_drvdata(dev);
  3061. if (priv->magic != ICNSS_MAGIC) {
  3062. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3063. ret = -EINVAL;
  3064. goto out;
  3065. }
  3066. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3067. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3068. priv->state);
  3069. ret = -EPERM;
  3070. goto out;
  3071. }
  3072. if (priv->wpss_supported) {
  3073. icnss_pr_vdbg("Initiate Root PD restart");
  3074. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3075. ICNSS_SMP2P_OUT_POWER_SAVE);
  3076. if (!ret)
  3077. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3078. return ret;
  3079. }
  3080. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3081. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3082. priv->state);
  3083. ret = -EOPNOTSUPP;
  3084. goto out;
  3085. }
  3086. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3087. priv->state);
  3088. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3089. if (!ret)
  3090. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3091. out:
  3092. return ret;
  3093. }
  3094. EXPORT_SYMBOL(icnss_trigger_recovery);
  3095. int icnss_idle_shutdown(struct device *dev)
  3096. {
  3097. struct icnss_priv *priv = dev_get_drvdata(dev);
  3098. if (!priv) {
  3099. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3100. return -EINVAL;
  3101. }
  3102. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3103. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3104. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3105. return -EBUSY;
  3106. }
  3107. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3108. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3109. }
  3110. EXPORT_SYMBOL(icnss_idle_shutdown);
  3111. int icnss_idle_restart(struct device *dev)
  3112. {
  3113. struct icnss_priv *priv = dev_get_drvdata(dev);
  3114. if (!priv) {
  3115. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3116. return -EINVAL;
  3117. }
  3118. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3119. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3120. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3121. return -EBUSY;
  3122. }
  3123. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3124. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3125. }
  3126. EXPORT_SYMBOL(icnss_idle_restart);
  3127. int icnss_exit_power_save(struct device *dev)
  3128. {
  3129. struct icnss_priv *priv = dev_get_drvdata(dev);
  3130. icnss_pr_vdbg("Calling Exit Power Save\n");
  3131. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3132. !test_bit(ICNSS_MODE_ON, &priv->state))
  3133. return 0;
  3134. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3135. ICNSS_SMP2P_OUT_POWER_SAVE);
  3136. }
  3137. EXPORT_SYMBOL(icnss_exit_power_save);
  3138. int icnss_prevent_l1(struct device *dev)
  3139. {
  3140. struct icnss_priv *priv = dev_get_drvdata(dev);
  3141. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3142. !test_bit(ICNSS_MODE_ON, &priv->state))
  3143. return 0;
  3144. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3145. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3146. }
  3147. EXPORT_SYMBOL(icnss_prevent_l1);
  3148. void icnss_allow_l1(struct device *dev)
  3149. {
  3150. struct icnss_priv *priv = dev_get_drvdata(dev);
  3151. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3152. !test_bit(ICNSS_MODE_ON, &priv->state))
  3153. return;
  3154. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3155. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3156. }
  3157. EXPORT_SYMBOL(icnss_allow_l1);
  3158. void icnss_allow_recursive_recovery(struct device *dev)
  3159. {
  3160. struct icnss_priv *priv = dev_get_drvdata(dev);
  3161. priv->allow_recursive_recovery = true;
  3162. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3163. }
  3164. void icnss_disallow_recursive_recovery(struct device *dev)
  3165. {
  3166. struct icnss_priv *priv = dev_get_drvdata(dev);
  3167. priv->allow_recursive_recovery = false;
  3168. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3169. }
  3170. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3171. {
  3172. struct kobject *icnss_kobject;
  3173. int ret = 0;
  3174. atomic_set(&priv->is_shutdown, false);
  3175. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3176. if (!icnss_kobject) {
  3177. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3178. return -EINVAL;
  3179. }
  3180. priv->icnss_kobject = icnss_kobject;
  3181. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3182. if (ret) {
  3183. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3184. return ret;
  3185. }
  3186. return ret;
  3187. }
  3188. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3189. {
  3190. struct kobject *icnss_kobject;
  3191. icnss_kobject = priv->icnss_kobject;
  3192. if (icnss_kobject)
  3193. kobject_put(icnss_kobject);
  3194. }
  3195. static ssize_t qdss_tr_start_store(struct device *dev,
  3196. struct device_attribute *attr,
  3197. const char *buf, size_t count)
  3198. {
  3199. struct icnss_priv *priv = dev_get_drvdata(dev);
  3200. wlfw_qdss_trace_start(priv);
  3201. icnss_pr_dbg("Received QDSS start command\n");
  3202. return count;
  3203. }
  3204. static ssize_t qdss_tr_stop_store(struct device *dev,
  3205. struct device_attribute *attr,
  3206. const char *user_buf, size_t count)
  3207. {
  3208. struct icnss_priv *priv = dev_get_drvdata(dev);
  3209. u32 option = 0;
  3210. if (sscanf(user_buf, "%du", &option) != 1)
  3211. return -EINVAL;
  3212. wlfw_qdss_trace_stop(priv, option);
  3213. icnss_pr_dbg("Received QDSS stop command\n");
  3214. return count;
  3215. }
  3216. static ssize_t qdss_conf_download_store(struct device *dev,
  3217. struct device_attribute *attr,
  3218. const char *buf, size_t count)
  3219. {
  3220. struct icnss_priv *priv = dev_get_drvdata(dev);
  3221. icnss_wlfw_qdss_dnld_send_sync(priv);
  3222. icnss_pr_dbg("Received QDSS download config command\n");
  3223. return count;
  3224. }
  3225. static ssize_t hw_trc_override_store(struct device *dev,
  3226. struct device_attribute *attr,
  3227. const char *buf, size_t count)
  3228. {
  3229. struct icnss_priv *priv = dev_get_drvdata(dev);
  3230. int tmp = 0;
  3231. if (sscanf(buf, "%du", &tmp) != 1)
  3232. return -EINVAL;
  3233. priv->hw_trc_override = tmp;
  3234. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3235. return count;
  3236. }
  3237. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3238. {
  3239. struct icnss_priv *priv = icnss_get_plat_priv();
  3240. phandle rproc_phandle;
  3241. int ret;
  3242. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3243. &rproc_phandle)) {
  3244. icnss_pr_err("error reading rproc phandle\n");
  3245. return;
  3246. }
  3247. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3248. if (IS_ERR_OR_NULL(priv->rproc)) {
  3249. icnss_pr_err("rproc not found");
  3250. return;
  3251. }
  3252. ret = rproc_boot(priv->rproc);
  3253. if (ret) {
  3254. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3255. rproc_put(priv->rproc);
  3256. }
  3257. }
  3258. static ssize_t wpss_boot_store(struct device *dev,
  3259. struct device_attribute *attr,
  3260. const char *buf, size_t count)
  3261. {
  3262. struct icnss_priv *priv = dev_get_drvdata(dev);
  3263. int wpss_rproc = 0;
  3264. if (!priv->wpss_supported)
  3265. return count;
  3266. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3267. icnss_pr_err("Failed to read wpss rproc info");
  3268. return -EINVAL;
  3269. }
  3270. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3271. if (wpss_rproc == 1)
  3272. schedule_work(&wpss_loader);
  3273. else if (wpss_rproc == 0)
  3274. icnss_wpss_unload(priv);
  3275. return count;
  3276. }
  3277. static ssize_t wlan_en_delay_store(struct device *dev,
  3278. struct device_attribute *attr,
  3279. const char *buf, size_t count)
  3280. {
  3281. struct icnss_priv *priv = dev_get_drvdata(dev);
  3282. uint32_t wlan_en_delay = 0;
  3283. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3284. return count;
  3285. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3286. icnss_pr_err("Failed to read wlan_en_delay");
  3287. return -EINVAL;
  3288. }
  3289. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3290. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3291. return count;
  3292. }
  3293. static DEVICE_ATTR_WO(qdss_tr_start);
  3294. static DEVICE_ATTR_WO(qdss_tr_stop);
  3295. static DEVICE_ATTR_WO(qdss_conf_download);
  3296. static DEVICE_ATTR_WO(hw_trc_override);
  3297. static DEVICE_ATTR_WO(wpss_boot);
  3298. static DEVICE_ATTR_WO(wlan_en_delay);
  3299. static struct attribute *icnss_attrs[] = {
  3300. &dev_attr_qdss_tr_start.attr,
  3301. &dev_attr_qdss_tr_stop.attr,
  3302. &dev_attr_qdss_conf_download.attr,
  3303. &dev_attr_hw_trc_override.attr,
  3304. &dev_attr_wpss_boot.attr,
  3305. &dev_attr_wlan_en_delay.attr,
  3306. NULL,
  3307. };
  3308. static struct attribute_group icnss_attr_group = {
  3309. .attrs = icnss_attrs,
  3310. };
  3311. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3312. {
  3313. struct device *dev = &priv->pdev->dev;
  3314. int ret;
  3315. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3316. if (ret) {
  3317. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3318. ret);
  3319. goto out;
  3320. }
  3321. return 0;
  3322. out:
  3323. return ret;
  3324. }
  3325. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3326. {
  3327. sysfs_remove_link(kernel_kobj, "icnss");
  3328. }
  3329. static int icnss_sysfs_create(struct icnss_priv *priv)
  3330. {
  3331. int ret = 0;
  3332. ret = devm_device_add_group(&priv->pdev->dev,
  3333. &icnss_attr_group);
  3334. if (ret) {
  3335. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3336. ret);
  3337. goto out;
  3338. }
  3339. icnss_create_sysfs_link(priv);
  3340. ret = icnss_create_shutdown_sysfs(priv);
  3341. if (ret)
  3342. goto remove_icnss_group;
  3343. return 0;
  3344. remove_icnss_group:
  3345. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3346. out:
  3347. return ret;
  3348. }
  3349. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3350. {
  3351. icnss_destroy_shutdown_sysfs(priv);
  3352. icnss_remove_sysfs_link(priv);
  3353. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3354. }
  3355. static int icnss_resource_parse(struct icnss_priv *priv)
  3356. {
  3357. int ret = 0, i = 0;
  3358. struct platform_device *pdev = priv->pdev;
  3359. struct device *dev = &pdev->dev;
  3360. struct resource *res;
  3361. u32 int_prop;
  3362. ret = icnss_get_vreg(priv);
  3363. if (ret) {
  3364. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3365. goto out;
  3366. }
  3367. ret = icnss_get_clk(priv);
  3368. if (ret) {
  3369. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3370. goto put_vreg;
  3371. }
  3372. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3373. ret = icnss_get_psf_info(priv);
  3374. if (ret < 0)
  3375. goto out;
  3376. priv->psf_supported = true;
  3377. }
  3378. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3379. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3380. "membase");
  3381. if (!res) {
  3382. icnss_pr_err("Memory base not found in DT\n");
  3383. ret = -EINVAL;
  3384. goto put_clk;
  3385. }
  3386. priv->mem_base_pa = res->start;
  3387. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3388. resource_size(res));
  3389. if (!priv->mem_base_va) {
  3390. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3391. &priv->mem_base_pa);
  3392. ret = -EINVAL;
  3393. goto put_clk;
  3394. }
  3395. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3396. &priv->mem_base_pa,
  3397. priv->mem_base_va);
  3398. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3399. res = platform_get_resource(priv->pdev,
  3400. IORESOURCE_IRQ, i);
  3401. if (!res) {
  3402. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3403. ret = -ENODEV;
  3404. goto put_clk;
  3405. } else {
  3406. priv->ce_irqs[i] = res->start;
  3407. }
  3408. }
  3409. if (of_property_read_bool(pdev->dev.of_node,
  3410. "qcom,is_low_power")) {
  3411. priv->low_power_support = true;
  3412. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3413. }
  3414. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3415. &priv->rf_subtype) == 0) {
  3416. priv->is_rf_subtype_valid = true;
  3417. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3418. }
  3419. if (of_property_read_bool(pdev->dev.of_node,
  3420. "qcom,is_slate_rfa")) {
  3421. priv->is_slate_rfa = true;
  3422. icnss_pr_err("SLATE rfa is enabled\n");
  3423. }
  3424. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3425. priv->device_id == WCN6450_DEVICE_ID) {
  3426. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3427. "msi_addr");
  3428. if (!res) {
  3429. icnss_pr_err("MSI address not found in DT\n");
  3430. ret = -EINVAL;
  3431. goto put_clk;
  3432. }
  3433. priv->msi_addr_pa = res->start;
  3434. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3435. PAGE_SIZE,
  3436. DMA_FROM_DEVICE, 0);
  3437. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3438. icnss_pr_err("MSI: failed to map msi address\n");
  3439. priv->msi_addr_iova = 0;
  3440. ret = -ENOMEM;
  3441. goto put_clk;
  3442. }
  3443. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3444. &priv->msi_addr_pa,
  3445. priv->msi_addr_iova);
  3446. ret = of_property_read_u32_index(dev->of_node,
  3447. "interrupts",
  3448. 1,
  3449. &int_prop);
  3450. if (ret) {
  3451. icnss_pr_dbg("Read interrupt prop failed");
  3452. goto put_clk;
  3453. }
  3454. priv->msi_base_data = int_prop + 32;
  3455. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3456. priv->msi_base_data, int_prop);
  3457. icnss_get_msi_assignment(priv);
  3458. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3459. res = platform_get_resource(priv->pdev,
  3460. IORESOURCE_IRQ, i);
  3461. if (!res) {
  3462. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3463. ret = -ENODEV;
  3464. goto put_clk;
  3465. } else {
  3466. priv->srng_irqs[i] = res->start;
  3467. }
  3468. }
  3469. }
  3470. return 0;
  3471. put_clk:
  3472. icnss_put_clk(priv);
  3473. put_vreg:
  3474. icnss_put_vreg(priv);
  3475. out:
  3476. return ret;
  3477. }
  3478. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3479. {
  3480. int ret = 0;
  3481. struct platform_device *pdev = priv->pdev;
  3482. struct device *dev = &pdev->dev;
  3483. struct device_node *np = NULL;
  3484. u64 prop_size = 0;
  3485. const __be32 *addrp = NULL;
  3486. np = of_parse_phandle(dev->of_node,
  3487. "qcom,wlan-msa-fixed-region", 0);
  3488. if (np) {
  3489. addrp = of_get_address(np, 0, &prop_size, NULL);
  3490. if (!addrp) {
  3491. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3492. ret = -EINVAL;
  3493. of_node_put(np);
  3494. goto out;
  3495. }
  3496. priv->msa_pa = of_translate_address(np, addrp);
  3497. if (priv->msa_pa == OF_BAD_ADDR) {
  3498. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3499. ret = -EINVAL;
  3500. of_node_put(np);
  3501. goto out;
  3502. }
  3503. of_node_put(np);
  3504. priv->msa_va = memremap(priv->msa_pa,
  3505. (unsigned long)prop_size, MEMREMAP_WT);
  3506. if (!priv->msa_va) {
  3507. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3508. &priv->msa_pa);
  3509. ret = -EINVAL;
  3510. goto out;
  3511. }
  3512. priv->msa_mem_size = prop_size;
  3513. } else {
  3514. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3515. &priv->msa_mem_size);
  3516. if (ret || priv->msa_mem_size == 0) {
  3517. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3518. priv->msa_mem_size, ret);
  3519. goto out;
  3520. }
  3521. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3522. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3523. if (!priv->msa_va) {
  3524. icnss_pr_err("DMA alloc failed for MSA\n");
  3525. ret = -ENOMEM;
  3526. goto out;
  3527. }
  3528. }
  3529. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3530. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3531. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3532. "qcom,fw-prefix");
  3533. return 0;
  3534. out:
  3535. return ret;
  3536. }
  3537. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3538. struct device *dev, unsigned long iova,
  3539. int flags, void *handler_token)
  3540. {
  3541. struct icnss_priv *priv = handler_token;
  3542. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3543. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3544. if (!priv) {
  3545. icnss_pr_err("priv is NULL\n");
  3546. return -ENODEV;
  3547. }
  3548. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3549. fw_down_data.crashed = true;
  3550. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3551. &fw_down_data);
  3552. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3553. &fw_down_data);
  3554. }
  3555. icnss_trigger_recovery(&priv->pdev->dev);
  3556. /* IOMMU driver requires non-zero return value to print debug info. */
  3557. return -EINVAL;
  3558. }
  3559. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3560. {
  3561. int ret = 0;
  3562. struct platform_device *pdev = priv->pdev;
  3563. struct device *dev = &pdev->dev;
  3564. const char *iommu_dma_type;
  3565. struct resource *res;
  3566. u32 addr_win[2];
  3567. ret = of_property_read_u32_array(dev->of_node,
  3568. "qcom,iommu-dma-addr-pool",
  3569. addr_win,
  3570. ARRAY_SIZE(addr_win));
  3571. if (ret) {
  3572. icnss_pr_err("SMMU IOVA base not found\n");
  3573. } else {
  3574. priv->smmu_iova_start = addr_win[0];
  3575. priv->smmu_iova_len = addr_win[1];
  3576. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3577. &priv->smmu_iova_start,
  3578. priv->smmu_iova_len);
  3579. priv->iommu_domain =
  3580. iommu_get_domain_for_dev(&pdev->dev);
  3581. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3582. &iommu_dma_type);
  3583. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3584. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3585. priv->smmu_s1_enable = true;
  3586. if (priv->device_id == WCN6750_DEVICE_ID ||
  3587. priv->device_id == WCN6450_DEVICE_ID)
  3588. iommu_set_fault_handler(priv->iommu_domain,
  3589. icnss_smmu_fault_handler,
  3590. priv);
  3591. }
  3592. res = platform_get_resource_byname(pdev,
  3593. IORESOURCE_MEM,
  3594. "smmu_iova_ipa");
  3595. if (!res) {
  3596. icnss_pr_err("SMMU IOVA IPA not found\n");
  3597. } else {
  3598. priv->smmu_iova_ipa_start = res->start;
  3599. priv->smmu_iova_ipa_current = res->start;
  3600. priv->smmu_iova_ipa_len = resource_size(res);
  3601. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3602. &priv->smmu_iova_ipa_start,
  3603. priv->smmu_iova_ipa_len);
  3604. }
  3605. }
  3606. return 0;
  3607. }
  3608. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3609. {
  3610. if (!priv)
  3611. return -ENODEV;
  3612. if (!priv->smmu_iova_len)
  3613. return -EINVAL;
  3614. *addr = priv->smmu_iova_start;
  3615. *size = priv->smmu_iova_len;
  3616. return 0;
  3617. }
  3618. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3619. {
  3620. if (!priv)
  3621. return -ENODEV;
  3622. if (!priv->smmu_iova_ipa_len)
  3623. return -EINVAL;
  3624. *addr = priv->smmu_iova_ipa_start;
  3625. *size = priv->smmu_iova_ipa_len;
  3626. return 0;
  3627. }
  3628. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3629. char *name)
  3630. {
  3631. if (!priv)
  3632. return;
  3633. if (!priv->use_prefix_path) {
  3634. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3635. return;
  3636. }
  3637. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3638. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3639. ADRASTEA_PATH_PREFIX "%s", name);
  3640. else if (priv->device_id == WCN6750_DEVICE_ID)
  3641. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3642. QCA6750_PATH_PREFIX "%s", name);
  3643. else if (priv->device_id == WCN6450_DEVICE_ID)
  3644. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3645. WCN6450_PATH_PREFIX "%s", name);
  3646. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3647. }
  3648. static const struct platform_device_id icnss_platform_id_table[] = {
  3649. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3650. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3651. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3652. { },
  3653. };
  3654. static const struct of_device_id icnss_dt_match[] = {
  3655. {
  3656. .compatible = "qcom,wcn6750",
  3657. .data = (void *)&icnss_platform_id_table[0]},
  3658. {
  3659. .compatible = "qcom,icnss",
  3660. .data = (void *)&icnss_platform_id_table[1]},
  3661. {
  3662. .compatible = "qcom,wcn6450",
  3663. .data = (void *)&icnss_platform_id_table[2]},
  3664. { },
  3665. };
  3666. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3667. static void icnss_init_control_params(struct icnss_priv *priv)
  3668. {
  3669. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3670. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3671. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3672. if (priv->device_id == WCN6750_DEVICE_ID ||
  3673. of_property_read_bool(priv->pdev->dev.of_node,
  3674. "wpss-support-enable"))
  3675. priv->wpss_supported = true;
  3676. if (of_property_read_bool(priv->pdev->dev.of_node,
  3677. "bdf-download-support"))
  3678. priv->bdf_download_support = true;
  3679. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3680. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3681. }
  3682. static void icnss_read_device_configs(struct icnss_priv *priv)
  3683. {
  3684. if (of_property_read_bool(priv->pdev->dev.of_node,
  3685. "wlan-ipa-disabled")) {
  3686. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3687. }
  3688. if (of_property_read_bool(priv->pdev->dev.of_node,
  3689. "qcom,wpss-self-recovery"))
  3690. priv->wpss_self_recovery_enabled = true;
  3691. }
  3692. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3693. {
  3694. pm_runtime_get_sync(&priv->pdev->dev);
  3695. pm_runtime_forbid(&priv->pdev->dev);
  3696. pm_runtime_set_active(&priv->pdev->dev);
  3697. pm_runtime_enable(&priv->pdev->dev);
  3698. }
  3699. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3700. {
  3701. pm_runtime_disable(&priv->pdev->dev);
  3702. pm_runtime_allow(&priv->pdev->dev);
  3703. pm_runtime_put_sync(&priv->pdev->dev);
  3704. }
  3705. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3706. {
  3707. return of_property_read_bool(priv->pdev->dev.of_node,
  3708. "use-nv-mac");
  3709. }
  3710. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3711. {
  3712. struct icnss_subsys_restart_level_data *restart_level_data;
  3713. icnss_pr_info("rproc name: %s recovery disable: %d",
  3714. rproc->name, rproc->recovery_disabled);
  3715. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3716. if (!restart_level_data)
  3717. return;
  3718. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3719. if (rproc->recovery_disabled)
  3720. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3721. else
  3722. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3723. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3724. 0, restart_level_data);
  3725. }
  3726. }
  3727. #ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
  3728. static void icnss_initialize_mem_pool(unsigned long device_id)
  3729. {
  3730. cnss_initialize_prealloc_pool(device_id);
  3731. }
  3732. static void icnss_deinitialize_mem_pool(void)
  3733. {
  3734. cnss_deinitialize_prealloc_pool();
  3735. }
  3736. #else
  3737. static void icnss_initialize_mem_pool(unsigned long device_id)
  3738. {
  3739. }
  3740. static void icnss_deinitialize_mem_pool(void)
  3741. {
  3742. }
  3743. #endif
  3744. static int icnss_probe(struct platform_device *pdev)
  3745. {
  3746. int ret = 0;
  3747. struct device *dev = &pdev->dev;
  3748. struct icnss_priv *priv;
  3749. const struct of_device_id *of_id;
  3750. const struct platform_device_id *device_id;
  3751. if (dev_get_drvdata(dev)) {
  3752. icnss_pr_err("Driver is already initialized\n");
  3753. return -EEXIST;
  3754. }
  3755. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3756. if (!of_id || !of_id->data) {
  3757. icnss_pr_err("Failed to find of match device!\n");
  3758. ret = -ENODEV;
  3759. goto out_reset_drvdata;
  3760. }
  3761. device_id = of_id->data;
  3762. icnss_pr_dbg("Platform driver probe\n");
  3763. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3764. if (!priv)
  3765. return -ENOMEM;
  3766. priv->magic = ICNSS_MAGIC;
  3767. dev_set_drvdata(dev, priv);
  3768. priv->pdev = pdev;
  3769. priv->device_id = device_id->driver_data;
  3770. priv->is_chain1_supported = true;
  3771. INIT_LIST_HEAD(&priv->vreg_list);
  3772. INIT_LIST_HEAD(&priv->clk_list);
  3773. icnss_allow_recursive_recovery(dev);
  3774. icnss_initialize_mem_pool(priv->device_id);
  3775. icnss_init_control_params(priv);
  3776. icnss_read_device_configs(priv);
  3777. ret = icnss_resource_parse(priv);
  3778. if (ret)
  3779. goto out_reset_drvdata;
  3780. ret = icnss_msa_dt_parse(priv);
  3781. if (ret)
  3782. goto out_free_resources;
  3783. ret = icnss_smmu_dt_parse(priv);
  3784. if (ret)
  3785. goto out_free_resources;
  3786. spin_lock_init(&priv->event_lock);
  3787. spin_lock_init(&priv->on_off_lock);
  3788. spin_lock_init(&priv->soc_wake_msg_lock);
  3789. mutex_init(&priv->dev_lock);
  3790. mutex_init(&priv->tcdev_lock);
  3791. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3792. if (!priv->event_wq) {
  3793. icnss_pr_err("Workqueue creation failed\n");
  3794. ret = -EFAULT;
  3795. goto smmu_cleanup;
  3796. }
  3797. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3798. INIT_LIST_HEAD(&priv->event_list);
  3799. if (priv->is_slate_rfa)
  3800. init_completion(&priv->slate_boot_complete);
  3801. ret = icnss_register_fw_service(priv);
  3802. if (ret < 0) {
  3803. icnss_pr_err("fw service registration failed: %d\n", ret);
  3804. goto out_destroy_wq;
  3805. }
  3806. icnss_enable_recovery(priv);
  3807. icnss_debugfs_create(priv);
  3808. icnss_sysfs_create(priv);
  3809. ret = device_init_wakeup(&priv->pdev->dev, true);
  3810. if (ret)
  3811. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3812. ret);
  3813. icnss_set_plat_priv(priv);
  3814. init_completion(&priv->unblock_shutdown);
  3815. if (priv->device_id == WCN6750_DEVICE_ID ||
  3816. priv->device_id == WCN6450_DEVICE_ID) {
  3817. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3818. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3819. if (!priv->soc_wake_wq) {
  3820. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3821. ret = -EFAULT;
  3822. goto out_unregister_fw_service;
  3823. }
  3824. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3825. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3826. ret = icnss_genl_init();
  3827. if (ret < 0)
  3828. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3829. init_completion(&priv->smp2p_soc_wake_wait);
  3830. icnss_runtime_pm_init(priv);
  3831. icnss_aop_mbox_init(priv);
  3832. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3833. priv->bdf_download_support = true;
  3834. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3835. }
  3836. if (priv->wpss_supported) {
  3837. ret = icnss_dms_init(priv);
  3838. if (ret)
  3839. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3840. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3841. icnss_pr_dbg("NV MAC feature is %s\n",
  3842. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3843. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3844. }
  3845. timer_setup(&priv->recovery_timer,
  3846. icnss_recovery_timeout_hdlr, 0);
  3847. if (priv->wpss_self_recovery_enabled) {
  3848. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3849. timer_setup(&priv->wpss_ssr_timer,
  3850. icnss_wpss_ssr_timeout_hdlr, 0);
  3851. }
  3852. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3853. icnss_pr_info("Platform driver probed successfully\n");
  3854. return 0;
  3855. out_unregister_fw_service:
  3856. icnss_unregister_fw_service(priv);
  3857. out_destroy_wq:
  3858. destroy_workqueue(priv->event_wq);
  3859. smmu_cleanup:
  3860. priv->iommu_domain = NULL;
  3861. out_free_resources:
  3862. icnss_put_resources(priv);
  3863. out_reset_drvdata:
  3864. icnss_deinitialize_mem_pool();
  3865. dev_set_drvdata(dev, NULL);
  3866. return ret;
  3867. }
  3868. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3869. {
  3870. if (IS_ERR_OR_NULL(ramdump_info))
  3871. return;
  3872. device_unregister(ramdump_info->dev);
  3873. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3874. kfree(ramdump_info);
  3875. }
  3876. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3877. {
  3878. if (priv->batt_psy)
  3879. power_supply_put(penv->batt_psy);
  3880. if (priv->psf_supported) {
  3881. flush_workqueue(priv->soc_update_wq);
  3882. destroy_workqueue(priv->soc_update_wq);
  3883. power_supply_unreg_notifier(&priv->psf_nb);
  3884. }
  3885. }
  3886. static int icnss_remove(struct platform_device *pdev)
  3887. {
  3888. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3889. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3890. del_timer(&priv->recovery_timer);
  3891. if (priv->wpss_self_recovery_enabled)
  3892. del_timer(&priv->wpss_ssr_timer);
  3893. device_init_wakeup(&priv->pdev->dev, false);
  3894. icnss_debugfs_destroy(priv);
  3895. icnss_unregister_power_supply_notifier(penv);
  3896. icnss_sysfs_destroy(priv);
  3897. complete_all(&priv->unblock_shutdown);
  3898. if (priv->is_slate_rfa)
  3899. icnss_slate_ssr_unregister_notifier(priv);
  3900. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3901. if (priv->wpss_supported) {
  3902. icnss_dms_deinit(priv);
  3903. icnss_wpss_early_ssr_unregister_notifier(priv);
  3904. icnss_wpss_ssr_unregister_notifier(priv);
  3905. } else {
  3906. icnss_modem_ssr_unregister_notifier(priv);
  3907. icnss_pdr_unregister_notifier(priv);
  3908. }
  3909. if (priv->device_id == WCN6750_DEVICE_ID ||
  3910. priv->device_id == WCN6450_DEVICE_ID) {
  3911. icnss_genl_exit();
  3912. icnss_runtime_pm_deinit(priv);
  3913. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3914. mbox_free_channel(priv->mbox_chan);
  3915. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3916. complete_all(&priv->smp2p_soc_wake_wait);
  3917. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3918. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3919. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3920. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3921. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3922. if (priv->soc_wake_wq)
  3923. destroy_workqueue(priv->soc_wake_wq);
  3924. }
  3925. class_destroy(priv->icnss_ramdump_class);
  3926. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3927. icnss_unregister_fw_service(priv);
  3928. if (priv->event_wq)
  3929. destroy_workqueue(priv->event_wq);
  3930. priv->iommu_domain = NULL;
  3931. icnss_hw_power_off(priv);
  3932. icnss_put_resources(priv);
  3933. icnss_deinitialize_mem_pool();
  3934. dev_set_drvdata(&pdev->dev, NULL);
  3935. return 0;
  3936. }
  3937. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3938. {
  3939. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3940. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3941. ICNSS_ASSERT(0);
  3942. }
  3943. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3944. {
  3945. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3946. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3947. priv->state);
  3948. schedule_work(&wpss_ssr_work);
  3949. }
  3950. #ifdef CONFIG_PM_SLEEP
  3951. static int icnss_pm_suspend(struct device *dev)
  3952. {
  3953. struct icnss_priv *priv = dev_get_drvdata(dev);
  3954. int ret = 0;
  3955. if (priv->magic != ICNSS_MAGIC) {
  3956. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3957. dev, priv, priv->magic);
  3958. return -EINVAL;
  3959. }
  3960. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3961. if (!priv->ops || !priv->ops->pm_suspend ||
  3962. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3963. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3964. return 0;
  3965. ret = priv->ops->pm_suspend(dev);
  3966. if (ret == 0) {
  3967. if (priv->device_id == WCN6750_DEVICE_ID ||
  3968. priv->device_id == WCN6450_DEVICE_ID) {
  3969. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3970. !test_bit(ICNSS_MODE_ON, &priv->state))
  3971. return 0;
  3972. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3973. ICNSS_SMP2P_OUT_POWER_SAVE);
  3974. }
  3975. priv->stats.pm_suspend++;
  3976. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3977. } else {
  3978. priv->stats.pm_suspend_err++;
  3979. }
  3980. return ret;
  3981. }
  3982. static int icnss_pm_resume(struct device *dev)
  3983. {
  3984. struct icnss_priv *priv = dev_get_drvdata(dev);
  3985. int ret = 0;
  3986. if (priv->magic != ICNSS_MAGIC) {
  3987. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3988. dev, priv, priv->magic);
  3989. return -EINVAL;
  3990. }
  3991. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3992. if (!priv->ops || !priv->ops->pm_resume ||
  3993. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3994. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3995. goto out;
  3996. ret = priv->ops->pm_resume(dev);
  3997. out:
  3998. if (ret == 0) {
  3999. priv->stats.pm_resume++;
  4000. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4001. } else {
  4002. priv->stats.pm_resume_err++;
  4003. }
  4004. return ret;
  4005. }
  4006. static int icnss_pm_suspend_noirq(struct device *dev)
  4007. {
  4008. struct icnss_priv *priv = dev_get_drvdata(dev);
  4009. int ret = 0;
  4010. if (priv->magic != ICNSS_MAGIC) {
  4011. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4012. dev, priv, priv->magic);
  4013. return -EINVAL;
  4014. }
  4015. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4016. if (!priv->ops || !priv->ops->suspend_noirq ||
  4017. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4018. goto out;
  4019. ret = priv->ops->suspend_noirq(dev);
  4020. out:
  4021. if (ret == 0) {
  4022. priv->stats.pm_suspend_noirq++;
  4023. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4024. } else {
  4025. priv->stats.pm_suspend_noirq_err++;
  4026. }
  4027. return ret;
  4028. }
  4029. static int icnss_pm_resume_noirq(struct device *dev)
  4030. {
  4031. struct icnss_priv *priv = dev_get_drvdata(dev);
  4032. int ret = 0;
  4033. if (priv->magic != ICNSS_MAGIC) {
  4034. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4035. dev, priv, priv->magic);
  4036. return -EINVAL;
  4037. }
  4038. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4039. if (!priv->ops || !priv->ops->resume_noirq ||
  4040. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4041. goto out;
  4042. ret = priv->ops->resume_noirq(dev);
  4043. out:
  4044. if (ret == 0) {
  4045. priv->stats.pm_resume_noirq++;
  4046. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4047. } else {
  4048. priv->stats.pm_resume_noirq_err++;
  4049. }
  4050. return ret;
  4051. }
  4052. static int icnss_pm_runtime_suspend(struct device *dev)
  4053. {
  4054. struct icnss_priv *priv = dev_get_drvdata(dev);
  4055. int ret = 0;
  4056. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4057. icnss_pr_err("Ignore runtime suspend:\n");
  4058. goto out;
  4059. }
  4060. if (priv->magic != ICNSS_MAGIC) {
  4061. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4062. dev, priv, priv->magic);
  4063. return -EINVAL;
  4064. }
  4065. if (!priv->ops || !priv->ops->runtime_suspend ||
  4066. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4067. goto out;
  4068. icnss_pr_vdbg("Runtime suspend\n");
  4069. ret = priv->ops->runtime_suspend(dev);
  4070. if (!ret) {
  4071. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4072. !test_bit(ICNSS_MODE_ON, &priv->state))
  4073. return 0;
  4074. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4075. ICNSS_SMP2P_OUT_POWER_SAVE);
  4076. }
  4077. out:
  4078. return ret;
  4079. }
  4080. static int icnss_pm_runtime_resume(struct device *dev)
  4081. {
  4082. struct icnss_priv *priv = dev_get_drvdata(dev);
  4083. int ret = 0;
  4084. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4085. icnss_pr_err("Ignore runtime resume\n");
  4086. goto out;
  4087. }
  4088. if (priv->magic != ICNSS_MAGIC) {
  4089. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4090. dev, priv, priv->magic);
  4091. return -EINVAL;
  4092. }
  4093. if (!priv->ops || !priv->ops->runtime_resume ||
  4094. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4095. goto out;
  4096. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4097. ret = priv->ops->runtime_resume(dev);
  4098. out:
  4099. return ret;
  4100. }
  4101. static int icnss_pm_runtime_idle(struct device *dev)
  4102. {
  4103. struct icnss_priv *priv = dev_get_drvdata(dev);
  4104. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4105. icnss_pr_err("Ignore runtime idle\n");
  4106. goto out;
  4107. }
  4108. icnss_pr_vdbg("Runtime idle\n");
  4109. pm_request_autosuspend(dev);
  4110. out:
  4111. return -EBUSY;
  4112. }
  4113. #endif
  4114. static const struct dev_pm_ops icnss_pm_ops = {
  4115. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4116. icnss_pm_resume)
  4117. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4118. icnss_pm_resume_noirq)
  4119. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4120. icnss_pm_runtime_idle)
  4121. };
  4122. static struct platform_driver icnss_driver = {
  4123. .probe = icnss_probe,
  4124. .remove = icnss_remove,
  4125. .driver = {
  4126. .name = "icnss2",
  4127. .pm = &icnss_pm_ops,
  4128. .of_match_table = icnss_dt_match,
  4129. },
  4130. };
  4131. static int __init icnss_initialize(void)
  4132. {
  4133. icnss_debug_init();
  4134. return platform_driver_register(&icnss_driver);
  4135. }
  4136. static void __exit icnss_exit(void)
  4137. {
  4138. platform_driver_unregister(&icnss_driver);
  4139. icnss_debug_deinit();
  4140. }
  4141. module_init(icnss_initialize);
  4142. module_exit(icnss_exit);
  4143. MODULE_LICENSE("GPL v2");
  4144. MODULE_DESCRIPTION("iWCN CORE platform driver");