dp_main.c 187 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. #define DP_INTR_POLL_TIMER_MS 10
  63. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  64. #define DP_MCS_LENGTH (6*MAX_MCS)
  65. #define DP_NSS_LENGTH (6*SS_COUNT)
  66. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  67. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  68. #define DP_MAX_MCS_STRING_LEN 30
  69. #define DP_CURR_FW_STATS_AVAIL 19
  70. #define DP_HTT_DBG_EXT_STATS_MAX 256
  71. #ifdef IPA_OFFLOAD
  72. /* Exclude IPA rings from the interrupt context */
  73. #define TX_RING_MASK_VAL 0xb
  74. #define RX_RING_MASK_VAL 0x7
  75. #else
  76. #define TX_RING_MASK_VAL 0xF
  77. #define RX_RING_MASK_VAL 0xF
  78. #endif
  79. bool rx_hash = 1;
  80. qdf_declare_param(rx_hash, bool);
  81. #define STR_MAXLEN 64
  82. #define DP_PPDU_STATS_CFG_ALL 0xffff
  83. /**
  84. * default_dscp_tid_map - Default DSCP-TID mapping
  85. *
  86. * DSCP TID AC
  87. * 000000 0 WME_AC_BE
  88. * 001000 1 WME_AC_BK
  89. * 010000 1 WME_AC_BK
  90. * 011000 0 WME_AC_BE
  91. * 100000 5 WME_AC_VI
  92. * 101000 5 WME_AC_VI
  93. * 110000 6 WME_AC_VO
  94. * 111000 6 WME_AC_VO
  95. */
  96. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  97. 0, 0, 0, 0, 0, 0, 0, 0,
  98. 1, 1, 1, 1, 1, 1, 1, 1,
  99. 1, 1, 1, 1, 1, 1, 1, 1,
  100. 0, 0, 0, 0, 0, 0, 0, 0,
  101. 5, 5, 5, 5, 5, 5, 5, 5,
  102. 5, 5, 5, 5, 5, 5, 5, 5,
  103. 6, 6, 6, 6, 6, 6, 6, 6,
  104. 6, 6, 6, 6, 6, 6, 6, 6,
  105. };
  106. /*
  107. * struct dp_rate_debug
  108. *
  109. * @mcs_type: print string for a given mcs
  110. * @valid: valid mcs rate?
  111. */
  112. struct dp_rate_debug {
  113. char mcs_type[DP_MAX_MCS_STRING_LEN];
  114. uint8_t valid;
  115. };
  116. #define MCS_VALID 1
  117. #define MCS_INVALID 0
  118. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  119. {
  120. {"OFDM 48 Mbps", MCS_VALID},
  121. {"OFDM 24 Mbps", MCS_VALID},
  122. {"OFDM 12 Mbps", MCS_VALID},
  123. {"OFDM 6 Mbps ", MCS_VALID},
  124. {"OFDM 54 Mbps", MCS_VALID},
  125. {"OFDM 36 Mbps", MCS_VALID},
  126. {"OFDM 18 Mbps", MCS_VALID},
  127. {"OFDM 9 Mbps ", MCS_VALID},
  128. {"INVALID ", MCS_INVALID},
  129. {"INVALID ", MCS_INVALID},
  130. {"INVALID ", MCS_INVALID},
  131. {"INVALID ", MCS_INVALID},
  132. {"INVALID ", MCS_VALID},
  133. },
  134. {
  135. {"CCK 11 Mbps Long ", MCS_VALID},
  136. {"CCK 5.5 Mbps Long ", MCS_VALID},
  137. {"CCK 2 Mbps Long ", MCS_VALID},
  138. {"CCK 1 Mbps Long ", MCS_VALID},
  139. {"CCK 11 Mbps Short ", MCS_VALID},
  140. {"CCK 5.5 Mbps Short", MCS_VALID},
  141. {"CCK 2 Mbps Short ", MCS_VALID},
  142. {"INVALID ", MCS_INVALID},
  143. {"INVALID ", MCS_INVALID},
  144. {"INVALID ", MCS_INVALID},
  145. {"INVALID ", MCS_INVALID},
  146. {"INVALID ", MCS_INVALID},
  147. {"INVALID ", MCS_VALID},
  148. },
  149. {
  150. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  151. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  152. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  153. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  154. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  155. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  156. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  157. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  158. {"INVALID ", MCS_INVALID},
  159. {"INVALID ", MCS_INVALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_INVALID},
  162. {"INVALID ", MCS_VALID},
  163. },
  164. {
  165. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  166. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  167. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  168. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  169. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  170. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  171. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  172. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  173. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  174. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  175. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  176. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  177. {"INVALID ", MCS_VALID},
  178. },
  179. {
  180. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  181. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  182. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  183. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  184. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  185. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  186. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  187. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  188. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  189. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  190. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  191. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  192. {"INVALID ", MCS_VALID},
  193. }
  194. };
  195. /**
  196. * @brief Cpu ring map types
  197. */
  198. enum dp_cpu_ring_map_types {
  199. DP_DEFAULT_MAP,
  200. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  201. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  202. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  203. DP_CPU_RING_MAP_MAX
  204. };
  205. /**
  206. * @brief Cpu to tx ring map
  207. */
  208. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  209. {0x0, 0x1, 0x2, 0x0},
  210. {0x1, 0x2, 0x1, 0x2},
  211. {0x0, 0x2, 0x0, 0x2},
  212. {0x2, 0x2, 0x2, 0x2}
  213. };
  214. /**
  215. * @brief Select the type of statistics
  216. */
  217. enum dp_stats_type {
  218. STATS_FW = 0,
  219. STATS_HOST = 1,
  220. STATS_TYPE_MAX = 2,
  221. };
  222. /**
  223. * @brief General Firmware statistics options
  224. *
  225. */
  226. enum dp_fw_stats {
  227. TXRX_FW_STATS_INVALID = -1,
  228. };
  229. /**
  230. * dp_stats_mapping_table - Firmware and Host statistics
  231. * currently supported
  232. */
  233. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  234. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  235. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  236. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  237. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  238. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  239. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  240. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  241. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  242. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  244. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  245. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  253. /* Last ENUM for HTT FW STATS */
  254. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  255. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  256. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  257. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  258. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  259. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  260. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  261. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  262. };
  263. /**
  264. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  265. * @ring_num: ring num of the ring being queried
  266. * @grp_mask: the grp_mask array for the ring type in question.
  267. *
  268. * The grp_mask array is indexed by group number and the bit fields correspond
  269. * to ring numbers. We are finding which interrupt group a ring belongs to.
  270. *
  271. * Return: the index in the grp_mask array with the ring number.
  272. * -QDF_STATUS_E_NOENT if no entry is found
  273. */
  274. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  275. {
  276. int ext_group_num;
  277. int mask = 1 << ring_num;
  278. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  279. ext_group_num++) {
  280. if (mask & grp_mask[ext_group_num])
  281. return ext_group_num;
  282. }
  283. return -QDF_STATUS_E_NOENT;
  284. }
  285. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  286. enum hal_ring_type ring_type,
  287. int ring_num)
  288. {
  289. int *grp_mask;
  290. switch (ring_type) {
  291. case WBM2SW_RELEASE:
  292. /* dp_tx_comp_handler - soc->tx_comp_ring */
  293. if (ring_num < 3)
  294. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  295. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  296. else if (ring_num == 3) {
  297. /* sw treats this as a separate ring type */
  298. grp_mask = &soc->wlan_cfg_ctx->
  299. int_rx_wbm_rel_ring_mask[0];
  300. ring_num = 0;
  301. } else {
  302. qdf_assert(0);
  303. return -QDF_STATUS_E_NOENT;
  304. }
  305. break;
  306. case REO_EXCEPTION:
  307. /* dp_rx_err_process - &soc->reo_exception_ring */
  308. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  309. break;
  310. case REO_DST:
  311. /* dp_rx_process - soc->reo_dest_ring */
  312. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  313. break;
  314. case REO_STATUS:
  315. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  316. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  317. break;
  318. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  319. case RXDMA_MONITOR_STATUS:
  320. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  321. case RXDMA_MONITOR_DST:
  322. /* dp_mon_process */
  323. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  324. break;
  325. case RXDMA_DST:
  326. /* dp_rxdma_err_process */
  327. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  328. break;
  329. case RXDMA_BUF:
  330. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  331. break;
  332. case RXDMA_MONITOR_BUF:
  333. /* TODO: support low_thresh interrupt */
  334. return -QDF_STATUS_E_NOENT;
  335. break;
  336. case TCL_DATA:
  337. case TCL_CMD:
  338. case REO_CMD:
  339. case SW2WBM_RELEASE:
  340. case WBM_IDLE_LINK:
  341. /* normally empty SW_TO_HW rings */
  342. return -QDF_STATUS_E_NOENT;
  343. break;
  344. case TCL_STATUS:
  345. case REO_REINJECT:
  346. /* misc unused rings */
  347. return -QDF_STATUS_E_NOENT;
  348. break;
  349. case CE_SRC:
  350. case CE_DST:
  351. case CE_DST_STATUS:
  352. /* CE_rings - currently handled by hif */
  353. default:
  354. return -QDF_STATUS_E_NOENT;
  355. break;
  356. }
  357. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  358. }
  359. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  360. *ring_params, int ring_type, int ring_num)
  361. {
  362. int msi_group_number;
  363. int msi_data_count;
  364. int ret;
  365. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  366. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  367. &msi_data_count, &msi_data_start,
  368. &msi_irq_start);
  369. if (ret)
  370. return;
  371. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  372. ring_num);
  373. if (msi_group_number < 0) {
  374. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  375. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  376. ring_type, ring_num);
  377. ring_params->msi_addr = 0;
  378. ring_params->msi_data = 0;
  379. return;
  380. }
  381. if (msi_group_number > msi_data_count) {
  382. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  383. FL("2 msi_groups will share an msi; msi_group_num %d"),
  384. msi_group_number);
  385. QDF_ASSERT(0);
  386. }
  387. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  388. ring_params->msi_addr = addr_low;
  389. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  390. ring_params->msi_data = (msi_group_number % msi_data_count)
  391. + msi_data_start;
  392. ring_params->flags |= HAL_SRNG_MSI_INTR;
  393. }
  394. /**
  395. * dp_print_ast_stats() - Dump AST table contents
  396. * @soc: Datapath soc handle
  397. *
  398. * return void
  399. */
  400. #ifdef FEATURE_WDS
  401. static void dp_print_ast_stats(struct dp_soc *soc)
  402. {
  403. uint8_t i;
  404. uint8_t num_entries = 0;
  405. struct dp_vdev *vdev;
  406. struct dp_pdev *pdev;
  407. struct dp_peer *peer;
  408. struct dp_ast_entry *ase, *tmp_ase;
  409. DP_PRINT_STATS("AST Stats:");
  410. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  411. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  412. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  413. DP_PRINT_STATS("AST Table:");
  414. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  415. pdev = soc->pdev_list[i];
  416. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  417. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  418. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  419. DP_PRINT_STATS("%6d mac_addr = %pM"
  420. " peer_mac_addr = %pM"
  421. " type = %d"
  422. " next_hop = %d"
  423. " is_active = %d"
  424. " is_bss = %d",
  425. ++num_entries,
  426. ase->mac_addr.raw,
  427. ase->peer->mac_addr.raw,
  428. ase->type,
  429. ase->next_hop,
  430. ase->is_active,
  431. ase->is_bss);
  432. }
  433. }
  434. }
  435. }
  436. }
  437. #else
  438. static void dp_print_ast_stats(struct dp_soc *soc)
  439. {
  440. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_WDS");
  441. return;
  442. }
  443. #endif
  444. /*
  445. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  446. */
  447. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  448. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  449. {
  450. void *hal_soc = soc->hal_soc;
  451. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  452. /* TODO: See if we should get align size from hal */
  453. uint32_t ring_base_align = 8;
  454. struct hal_srng_params ring_params;
  455. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  456. /* TODO: Currently hal layer takes care of endianness related settings.
  457. * See if these settings need to passed from DP layer
  458. */
  459. ring_params.flags = 0;
  460. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  461. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  462. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  463. srng->hal_srng = NULL;
  464. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  465. srng->num_entries = num_entries;
  466. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  467. soc->osdev, soc->osdev->dev, srng->alloc_size,
  468. &(srng->base_paddr_unaligned));
  469. if (!srng->base_vaddr_unaligned) {
  470. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  471. FL("alloc failed - ring_type: %d, ring_num %d"),
  472. ring_type, ring_num);
  473. return QDF_STATUS_E_NOMEM;
  474. }
  475. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  476. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  477. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  478. ((unsigned long)(ring_params.ring_base_vaddr) -
  479. (unsigned long)srng->base_vaddr_unaligned);
  480. ring_params.num_entries = num_entries;
  481. if (soc->intr_mode == DP_INTR_MSI) {
  482. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  483. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  484. FL("Using MSI for ring_type: %d, ring_num %d"),
  485. ring_type, ring_num);
  486. } else {
  487. ring_params.msi_data = 0;
  488. ring_params.msi_addr = 0;
  489. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  490. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  491. ring_type, ring_num);
  492. }
  493. /*
  494. * Setup interrupt timer and batch counter thresholds for
  495. * interrupt mitigation based on ring type
  496. */
  497. if (ring_type == REO_DST) {
  498. ring_params.intr_timer_thres_us =
  499. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  500. ring_params.intr_batch_cntr_thres_entries =
  501. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  502. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  503. ring_params.intr_timer_thres_us =
  504. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  505. ring_params.intr_batch_cntr_thres_entries =
  506. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  507. } else {
  508. ring_params.intr_timer_thres_us =
  509. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  510. ring_params.intr_batch_cntr_thres_entries =
  511. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  512. }
  513. /* Enable low threshold interrupts for rx buffer rings (regular and
  514. * monitor buffer rings.
  515. * TODO: See if this is required for any other ring
  516. */
  517. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  518. (ring_type == RXDMA_MONITOR_STATUS)) {
  519. /* TODO: Setting low threshold to 1/8th of ring size
  520. * see if this needs to be configurable
  521. */
  522. ring_params.low_threshold = num_entries >> 3;
  523. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  524. ring_params.intr_timer_thres_us = 0x1000;
  525. }
  526. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  527. mac_id, &ring_params);
  528. if (!srng->hal_srng) {
  529. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  530. srng->alloc_size,
  531. srng->base_vaddr_unaligned,
  532. srng->base_paddr_unaligned, 0);
  533. }
  534. return 0;
  535. }
  536. /**
  537. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  538. * Any buffers allocated and attached to ring entries are expected to be freed
  539. * before calling this function.
  540. */
  541. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  542. int ring_type, int ring_num)
  543. {
  544. if (!srng->hal_srng) {
  545. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  546. FL("Ring type: %d, num:%d not setup"),
  547. ring_type, ring_num);
  548. return;
  549. }
  550. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  551. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  552. srng->alloc_size,
  553. srng->base_vaddr_unaligned,
  554. srng->base_paddr_unaligned, 0);
  555. srng->hal_srng = NULL;
  556. }
  557. /* TODO: Need this interface from HIF */
  558. void *hif_get_hal_handle(void *hif_handle);
  559. /*
  560. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  561. * @dp_ctx: DP SOC handle
  562. * @budget: Number of frames/descriptors that can be processed in one shot
  563. *
  564. * Return: remaining budget/quota for the soc device
  565. */
  566. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  567. {
  568. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  569. struct dp_soc *soc = int_ctx->soc;
  570. int ring = 0;
  571. uint32_t work_done = 0;
  572. int budget = dp_budget;
  573. uint8_t tx_mask = int_ctx->tx_ring_mask;
  574. uint8_t rx_mask = int_ctx->rx_ring_mask;
  575. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  576. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  577. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  578. uint32_t remaining_quota = dp_budget;
  579. struct dp_pdev *pdev = NULL;
  580. /* Process Tx completion interrupts first to return back buffers */
  581. while (tx_mask) {
  582. if (tx_mask & 0x1) {
  583. work_done = dp_tx_comp_handler(soc,
  584. soc->tx_comp_ring[ring].hal_srng,
  585. remaining_quota);
  586. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  587. "tx mask 0x%x ring %d, budget %d, work_done %d",
  588. tx_mask, ring, budget, work_done);
  589. budget -= work_done;
  590. if (budget <= 0)
  591. goto budget_done;
  592. remaining_quota = budget;
  593. }
  594. tx_mask = tx_mask >> 1;
  595. ring++;
  596. }
  597. /* Process REO Exception ring interrupt */
  598. if (rx_err_mask) {
  599. work_done = dp_rx_err_process(soc,
  600. soc->reo_exception_ring.hal_srng,
  601. remaining_quota);
  602. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  603. "REO Exception Ring: work_done %d budget %d",
  604. work_done, budget);
  605. budget -= work_done;
  606. if (budget <= 0) {
  607. goto budget_done;
  608. }
  609. remaining_quota = budget;
  610. }
  611. /* Process Rx WBM release ring interrupt */
  612. if (rx_wbm_rel_mask) {
  613. work_done = dp_rx_wbm_err_process(soc,
  614. soc->rx_rel_ring.hal_srng, remaining_quota);
  615. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  616. "WBM Release Ring: work_done %d budget %d",
  617. work_done, budget);
  618. budget -= work_done;
  619. if (budget <= 0) {
  620. goto budget_done;
  621. }
  622. remaining_quota = budget;
  623. }
  624. /* Process Rx interrupts */
  625. if (rx_mask) {
  626. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  627. if (rx_mask & (1 << ring)) {
  628. work_done = dp_rx_process(int_ctx,
  629. soc->reo_dest_ring[ring].hal_srng,
  630. remaining_quota);
  631. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  632. "rx mask 0x%x ring %d, work_done %d budget %d",
  633. rx_mask, ring, work_done, budget);
  634. budget -= work_done;
  635. if (budget <= 0)
  636. goto budget_done;
  637. remaining_quota = budget;
  638. }
  639. }
  640. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  641. /* Need to check on this, why is required */
  642. work_done = dp_rxdma_err_process(soc, ring,
  643. remaining_quota);
  644. budget -= work_done;
  645. }
  646. }
  647. if (reo_status_mask)
  648. dp_reo_status_ring_handler(soc);
  649. /* Process LMAC interrupts */
  650. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  651. pdev = soc->pdev_list[ring];
  652. if (pdev == NULL)
  653. continue;
  654. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  655. work_done = dp_mon_process(soc, ring, remaining_quota);
  656. budget -= work_done;
  657. if (budget <= 0)
  658. goto budget_done;
  659. remaining_quota = budget;
  660. }
  661. if (int_ctx->rxdma2host_ring_mask & (1 << ring)) {
  662. work_done = dp_rxdma_err_process(soc, ring,
  663. remaining_quota);
  664. budget -= work_done;
  665. if (budget <= 0)
  666. goto budget_done;
  667. remaining_quota = budget;
  668. }
  669. if (int_ctx->host2rxdma_ring_mask & (1 << ring)) {
  670. union dp_rx_desc_list_elem_t *desc_list = NULL;
  671. union dp_rx_desc_list_elem_t *tail = NULL;
  672. struct dp_srng *rx_refill_buf_ring =
  673. &pdev->rx_refill_buf_ring;
  674. DP_STATS_INC(pdev, replenish.low_thresh_intrs, 1);
  675. dp_rx_buffers_replenish(soc, ring,
  676. rx_refill_buf_ring,
  677. &soc->rx_desc_buf[ring], 0,
  678. &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  679. }
  680. }
  681. qdf_lro_flush(int_ctx->lro_ctx);
  682. budget_done:
  683. return dp_budget - budget;
  684. }
  685. #ifdef DP_INTR_POLL_BASED
  686. /* dp_interrupt_timer()- timer poll for interrupts
  687. *
  688. * @arg: SoC Handle
  689. *
  690. * Return:
  691. *
  692. */
  693. static void dp_interrupt_timer(void *arg)
  694. {
  695. struct dp_soc *soc = (struct dp_soc *) arg;
  696. int i;
  697. if (qdf_atomic_read(&soc->cmn_init_done)) {
  698. for (i = 0;
  699. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  700. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  701. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  702. }
  703. }
  704. /*
  705. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  706. * @txrx_soc: DP SOC handle
  707. *
  708. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  709. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  710. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  711. *
  712. * Return: 0 for success. nonzero for failure.
  713. */
  714. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  715. {
  716. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  717. int i;
  718. soc->intr_mode = DP_INTR_POLL;
  719. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  720. soc->intr_ctx[i].dp_intr_id = i;
  721. soc->intr_ctx[i].tx_ring_mask =
  722. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  723. soc->intr_ctx[i].rx_ring_mask =
  724. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  725. soc->intr_ctx[i].rx_mon_ring_mask =
  726. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  727. soc->intr_ctx[i].rx_err_ring_mask =
  728. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  729. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  730. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  731. soc->intr_ctx[i].reo_status_ring_mask =
  732. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  733. soc->intr_ctx[i].rxdma2host_ring_mask =
  734. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  735. soc->intr_ctx[i].soc = soc;
  736. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  737. }
  738. qdf_timer_init(soc->osdev, &soc->int_timer,
  739. dp_interrupt_timer, (void *)soc,
  740. QDF_TIMER_TYPE_WAKE_APPS);
  741. return QDF_STATUS_SUCCESS;
  742. }
  743. #if defined(CONFIG_MCL)
  744. extern int con_mode_monitor;
  745. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  746. /*
  747. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  748. * @txrx_soc: DP SOC handle
  749. *
  750. * Call the appropriate attach function based on the mode of operation.
  751. * This is a WAR for enabling monitor mode.
  752. *
  753. * Return: 0 for success. nonzero for failure.
  754. */
  755. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  756. {
  757. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  758. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  759. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  760. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  761. "%s: Poll mode", __func__);
  762. return dp_soc_interrupt_attach_poll(txrx_soc);
  763. } else {
  764. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  765. "%s: Interrupt mode", __func__);
  766. return dp_soc_interrupt_attach(txrx_soc);
  767. }
  768. }
  769. #else
  770. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  771. {
  772. return dp_soc_interrupt_attach_poll(txrx_soc);
  773. }
  774. #endif
  775. #endif
  776. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  777. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  778. {
  779. int j;
  780. int num_irq = 0;
  781. int tx_mask =
  782. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  783. int rx_mask =
  784. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  785. int rx_mon_mask =
  786. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  787. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  788. soc->wlan_cfg_ctx, intr_ctx_num);
  789. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  790. soc->wlan_cfg_ctx, intr_ctx_num);
  791. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  792. soc->wlan_cfg_ctx, intr_ctx_num);
  793. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  794. soc->wlan_cfg_ctx, intr_ctx_num);
  795. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  796. soc->wlan_cfg_ctx, intr_ctx_num);
  797. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  798. if (tx_mask & (1 << j)) {
  799. irq_id_map[num_irq++] =
  800. (wbm2host_tx_completions_ring1 - j);
  801. }
  802. if (rx_mask & (1 << j)) {
  803. irq_id_map[num_irq++] =
  804. (reo2host_destination_ring1 - j);
  805. }
  806. if (rxdma2host_ring_mask & (1 << j)) {
  807. irq_id_map[num_irq++] =
  808. rxdma2host_destination_ring_mac1 -
  809. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  810. }
  811. if (host2rxdma_ring_mask & (1 << j)) {
  812. irq_id_map[num_irq++] =
  813. host2rxdma_host_buf_ring_mac1 -
  814. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  815. }
  816. if (rx_mon_mask & (1 << j)) {
  817. irq_id_map[num_irq++] =
  818. ppdu_end_interrupts_mac1 -
  819. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  820. irq_id_map[num_irq++] =
  821. rxdma2host_monitor_status_ring_mac1 -
  822. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  823. }
  824. if (rx_wbm_rel_ring_mask & (1 << j))
  825. irq_id_map[num_irq++] = wbm2host_rx_release;
  826. if (rx_err_ring_mask & (1 << j))
  827. irq_id_map[num_irq++] = reo2host_exception;
  828. if (reo_status_ring_mask & (1 << j))
  829. irq_id_map[num_irq++] = reo2host_status;
  830. }
  831. *num_irq_r = num_irq;
  832. }
  833. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  834. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  835. int msi_vector_count, int msi_vector_start)
  836. {
  837. int tx_mask = wlan_cfg_get_tx_ring_mask(
  838. soc->wlan_cfg_ctx, intr_ctx_num);
  839. int rx_mask = wlan_cfg_get_rx_ring_mask(
  840. soc->wlan_cfg_ctx, intr_ctx_num);
  841. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  842. soc->wlan_cfg_ctx, intr_ctx_num);
  843. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  844. soc->wlan_cfg_ctx, intr_ctx_num);
  845. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  846. soc->wlan_cfg_ctx, intr_ctx_num);
  847. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  848. soc->wlan_cfg_ctx, intr_ctx_num);
  849. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  850. soc->wlan_cfg_ctx, intr_ctx_num);
  851. unsigned int vector =
  852. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  853. int num_irq = 0;
  854. soc->intr_mode = DP_INTR_MSI;
  855. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  856. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  857. irq_id_map[num_irq++] =
  858. pld_get_msi_irq(soc->osdev->dev, vector);
  859. *num_irq_r = num_irq;
  860. }
  861. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  862. int *irq_id_map, int *num_irq)
  863. {
  864. int msi_vector_count, ret;
  865. uint32_t msi_base_data, msi_vector_start;
  866. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  867. &msi_vector_count,
  868. &msi_base_data,
  869. &msi_vector_start);
  870. if (ret)
  871. return dp_soc_interrupt_map_calculate_integrated(soc,
  872. intr_ctx_num, irq_id_map, num_irq);
  873. else
  874. dp_soc_interrupt_map_calculate_msi(soc,
  875. intr_ctx_num, irq_id_map, num_irq,
  876. msi_vector_count, msi_vector_start);
  877. }
  878. /*
  879. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  880. * @txrx_soc: DP SOC handle
  881. *
  882. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  883. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  884. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  885. *
  886. * Return: 0 for success. nonzero for failure.
  887. */
  888. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  889. {
  890. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  891. int i = 0;
  892. int num_irq = 0;
  893. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  894. int ret = 0;
  895. /* Map of IRQ ids registered with one interrupt context */
  896. int irq_id_map[HIF_MAX_GRP_IRQ];
  897. int tx_mask =
  898. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  899. int rx_mask =
  900. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  901. int rx_mon_mask =
  902. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  903. int rx_err_ring_mask =
  904. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  905. int rx_wbm_rel_ring_mask =
  906. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  907. int reo_status_ring_mask =
  908. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  909. int rxdma2host_ring_mask =
  910. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  911. int host2rxdma_ring_mask =
  912. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  913. soc->intr_ctx[i].dp_intr_id = i;
  914. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  915. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  916. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  917. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  918. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  919. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  920. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  921. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  922. soc->intr_ctx[i].soc = soc;
  923. num_irq = 0;
  924. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  925. &num_irq);
  926. ret = hif_register_ext_group(soc->hif_handle,
  927. num_irq, irq_id_map, dp_service_srngs,
  928. &soc->intr_ctx[i], "dp_intr",
  929. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  930. if (ret) {
  931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  932. FL("failed, ret = %d"), ret);
  933. return QDF_STATUS_E_FAILURE;
  934. }
  935. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  936. }
  937. hif_configure_ext_group_interrupts(soc->hif_handle);
  938. return QDF_STATUS_SUCCESS;
  939. }
  940. /*
  941. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  942. * @txrx_soc: DP SOC handle
  943. *
  944. * Return: void
  945. */
  946. static void dp_soc_interrupt_detach(void *txrx_soc)
  947. {
  948. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  949. int i;
  950. if (soc->intr_mode == DP_INTR_POLL) {
  951. qdf_timer_stop(&soc->int_timer);
  952. qdf_timer_free(&soc->int_timer);
  953. } else {
  954. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  955. }
  956. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  957. soc->intr_ctx[i].tx_ring_mask = 0;
  958. soc->intr_ctx[i].rx_ring_mask = 0;
  959. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  960. soc->intr_ctx[i].rx_err_ring_mask = 0;
  961. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  962. soc->intr_ctx[i].reo_status_ring_mask = 0;
  963. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  964. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  965. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  966. }
  967. }
  968. #define AVG_MAX_MPDUS_PER_TID 128
  969. #define AVG_TIDS_PER_CLIENT 2
  970. #define AVG_FLOWS_PER_TID 2
  971. #define AVG_MSDUS_PER_FLOW 128
  972. #define AVG_MSDUS_PER_MPDU 4
  973. /*
  974. * Allocate and setup link descriptor pool that will be used by HW for
  975. * various link and queue descriptors and managed by WBM
  976. */
  977. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  978. {
  979. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  980. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  981. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  982. uint32_t num_mpdus_per_link_desc =
  983. hal_num_mpdus_per_link_desc(soc->hal_soc);
  984. uint32_t num_msdus_per_link_desc =
  985. hal_num_msdus_per_link_desc(soc->hal_soc);
  986. uint32_t num_mpdu_links_per_queue_desc =
  987. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  988. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  989. uint32_t total_link_descs, total_mem_size;
  990. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  991. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  992. uint32_t num_link_desc_banks;
  993. uint32_t last_bank_size = 0;
  994. uint32_t entry_size, num_entries;
  995. int i;
  996. uint32_t desc_id = 0;
  997. /* Only Tx queue descriptors are allocated from common link descriptor
  998. * pool Rx queue descriptors are not included in this because (REO queue
  999. * extension descriptors) they are expected to be allocated contiguously
  1000. * with REO queue descriptors
  1001. */
  1002. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1003. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1004. num_mpdu_queue_descs = num_mpdu_link_descs /
  1005. num_mpdu_links_per_queue_desc;
  1006. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1007. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1008. num_msdus_per_link_desc;
  1009. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1010. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1011. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1012. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1013. /* Round up to power of 2 */
  1014. total_link_descs = 1;
  1015. while (total_link_descs < num_entries)
  1016. total_link_descs <<= 1;
  1017. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1018. FL("total_link_descs: %u, link_desc_size: %d"),
  1019. total_link_descs, link_desc_size);
  1020. total_mem_size = total_link_descs * link_desc_size;
  1021. total_mem_size += link_desc_align;
  1022. if (total_mem_size <= max_alloc_size) {
  1023. num_link_desc_banks = 0;
  1024. last_bank_size = total_mem_size;
  1025. } else {
  1026. num_link_desc_banks = (total_mem_size) /
  1027. (max_alloc_size - link_desc_align);
  1028. last_bank_size = total_mem_size %
  1029. (max_alloc_size - link_desc_align);
  1030. }
  1031. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1032. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1033. total_mem_size, num_link_desc_banks);
  1034. for (i = 0; i < num_link_desc_banks; i++) {
  1035. soc->link_desc_banks[i].base_vaddr_unaligned =
  1036. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1037. max_alloc_size,
  1038. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1039. soc->link_desc_banks[i].size = max_alloc_size;
  1040. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1041. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1042. ((unsigned long)(
  1043. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1044. link_desc_align));
  1045. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1046. soc->link_desc_banks[i].base_paddr_unaligned) +
  1047. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1048. (unsigned long)(
  1049. soc->link_desc_banks[i].base_vaddr_unaligned));
  1050. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1051. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1052. FL("Link descriptor memory alloc failed"));
  1053. goto fail;
  1054. }
  1055. }
  1056. if (last_bank_size) {
  1057. /* Allocate last bank in case total memory required is not exact
  1058. * multiple of max_alloc_size
  1059. */
  1060. soc->link_desc_banks[i].base_vaddr_unaligned =
  1061. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1062. last_bank_size,
  1063. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1064. soc->link_desc_banks[i].size = last_bank_size;
  1065. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1066. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1067. ((unsigned long)(
  1068. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1069. link_desc_align));
  1070. soc->link_desc_banks[i].base_paddr =
  1071. (unsigned long)(
  1072. soc->link_desc_banks[i].base_paddr_unaligned) +
  1073. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1074. (unsigned long)(
  1075. soc->link_desc_banks[i].base_vaddr_unaligned));
  1076. }
  1077. /* Allocate and setup link descriptor idle list for HW internal use */
  1078. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1079. total_mem_size = entry_size * total_link_descs;
  1080. if (total_mem_size <= max_alloc_size) {
  1081. void *desc;
  1082. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1083. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1084. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1085. FL("Link desc idle ring setup failed"));
  1086. goto fail;
  1087. }
  1088. hal_srng_access_start_unlocked(soc->hal_soc,
  1089. soc->wbm_idle_link_ring.hal_srng);
  1090. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1091. soc->link_desc_banks[i].base_paddr; i++) {
  1092. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1093. ((unsigned long)(
  1094. soc->link_desc_banks[i].base_vaddr) -
  1095. (unsigned long)(
  1096. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1097. / link_desc_size;
  1098. unsigned long paddr = (unsigned long)(
  1099. soc->link_desc_banks[i].base_paddr);
  1100. while (num_entries && (desc = hal_srng_src_get_next(
  1101. soc->hal_soc,
  1102. soc->wbm_idle_link_ring.hal_srng))) {
  1103. hal_set_link_desc_addr(desc,
  1104. LINK_DESC_COOKIE(desc_id, i), paddr);
  1105. num_entries--;
  1106. desc_id++;
  1107. paddr += link_desc_size;
  1108. }
  1109. }
  1110. hal_srng_access_end_unlocked(soc->hal_soc,
  1111. soc->wbm_idle_link_ring.hal_srng);
  1112. } else {
  1113. uint32_t num_scatter_bufs;
  1114. uint32_t num_entries_per_buf;
  1115. uint32_t rem_entries;
  1116. uint8_t *scatter_buf_ptr;
  1117. uint16_t scatter_buf_num;
  1118. soc->wbm_idle_scatter_buf_size =
  1119. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1120. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1121. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1122. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1123. soc->hal_soc, total_mem_size,
  1124. soc->wbm_idle_scatter_buf_size);
  1125. for (i = 0; i < num_scatter_bufs; i++) {
  1126. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1127. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1128. soc->wbm_idle_scatter_buf_size,
  1129. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1130. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1131. QDF_TRACE(QDF_MODULE_ID_DP,
  1132. QDF_TRACE_LEVEL_ERROR,
  1133. FL("Scatter list memory alloc failed"));
  1134. goto fail;
  1135. }
  1136. }
  1137. /* Populate idle list scatter buffers with link descriptor
  1138. * pointers
  1139. */
  1140. scatter_buf_num = 0;
  1141. scatter_buf_ptr = (uint8_t *)(
  1142. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1143. rem_entries = num_entries_per_buf;
  1144. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1145. soc->link_desc_banks[i].base_paddr; i++) {
  1146. uint32_t num_link_descs =
  1147. (soc->link_desc_banks[i].size -
  1148. ((unsigned long)(
  1149. soc->link_desc_banks[i].base_vaddr) -
  1150. (unsigned long)(
  1151. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1152. / link_desc_size;
  1153. unsigned long paddr = (unsigned long)(
  1154. soc->link_desc_banks[i].base_paddr);
  1155. while (num_link_descs) {
  1156. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1157. LINK_DESC_COOKIE(desc_id, i), paddr);
  1158. num_link_descs--;
  1159. desc_id++;
  1160. paddr += link_desc_size;
  1161. rem_entries--;
  1162. if (rem_entries) {
  1163. scatter_buf_ptr += entry_size;
  1164. } else {
  1165. rem_entries = num_entries_per_buf;
  1166. scatter_buf_num++;
  1167. if (scatter_buf_num >= num_scatter_bufs)
  1168. break;
  1169. scatter_buf_ptr = (uint8_t *)(
  1170. soc->wbm_idle_scatter_buf_base_vaddr[
  1171. scatter_buf_num]);
  1172. }
  1173. }
  1174. }
  1175. /* Setup link descriptor idle list in HW */
  1176. hal_setup_link_idle_list(soc->hal_soc,
  1177. soc->wbm_idle_scatter_buf_base_paddr,
  1178. soc->wbm_idle_scatter_buf_base_vaddr,
  1179. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1180. (uint32_t)(scatter_buf_ptr -
  1181. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1182. scatter_buf_num-1])), total_link_descs);
  1183. }
  1184. return 0;
  1185. fail:
  1186. if (soc->wbm_idle_link_ring.hal_srng) {
  1187. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1188. WBM_IDLE_LINK, 0);
  1189. }
  1190. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1191. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1192. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1193. soc->wbm_idle_scatter_buf_size,
  1194. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1195. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1196. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1197. }
  1198. }
  1199. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1200. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1201. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1202. soc->link_desc_banks[i].size,
  1203. soc->link_desc_banks[i].base_vaddr_unaligned,
  1204. soc->link_desc_banks[i].base_paddr_unaligned,
  1205. 0);
  1206. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1207. }
  1208. }
  1209. return QDF_STATUS_E_FAILURE;
  1210. }
  1211. /*
  1212. * Free link descriptor pool that was setup HW
  1213. */
  1214. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1215. {
  1216. int i;
  1217. if (soc->wbm_idle_link_ring.hal_srng) {
  1218. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1219. WBM_IDLE_LINK, 0);
  1220. }
  1221. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1222. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1223. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1224. soc->wbm_idle_scatter_buf_size,
  1225. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1226. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1227. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1228. }
  1229. }
  1230. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1231. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1232. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1233. soc->link_desc_banks[i].size,
  1234. soc->link_desc_banks[i].base_vaddr_unaligned,
  1235. soc->link_desc_banks[i].base_paddr_unaligned,
  1236. 0);
  1237. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1238. }
  1239. }
  1240. }
  1241. /* TODO: Following should be configurable */
  1242. #define WBM_RELEASE_RING_SIZE 64
  1243. #define TCL_CMD_RING_SIZE 32
  1244. #define TCL_STATUS_RING_SIZE 32
  1245. #if defined(QCA_WIFI_QCA6290)
  1246. #define REO_DST_RING_SIZE 1024
  1247. #else
  1248. #define REO_DST_RING_SIZE 2048
  1249. #endif
  1250. #define REO_REINJECT_RING_SIZE 32
  1251. #define RX_RELEASE_RING_SIZE 1024
  1252. #define REO_EXCEPTION_RING_SIZE 128
  1253. #define REO_CMD_RING_SIZE 32
  1254. #define REO_STATUS_RING_SIZE 32
  1255. #define RXDMA_BUF_RING_SIZE 1024
  1256. #define RXDMA_REFILL_RING_SIZE 4096
  1257. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1258. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1259. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1260. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1261. #define RXDMA_ERR_DST_RING_SIZE 1024
  1262. /*
  1263. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1264. * @soc: Datapath SOC handle
  1265. *
  1266. * This is a timer function used to age out stale WDS nodes from
  1267. * AST table
  1268. */
  1269. #ifdef FEATURE_WDS
  1270. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1271. {
  1272. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1273. struct dp_pdev *pdev;
  1274. struct dp_vdev *vdev;
  1275. struct dp_peer *peer;
  1276. struct dp_ast_entry *ase, *temp_ase;
  1277. int i;
  1278. qdf_spin_lock_bh(&soc->ast_lock);
  1279. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1280. pdev = soc->pdev_list[i];
  1281. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1282. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1283. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1284. /*
  1285. * Do not expire static ast entries
  1286. */
  1287. if (ase->type == CDP_TXRX_AST_TYPE_STATIC)
  1288. continue;
  1289. if (ase->is_active) {
  1290. ase->is_active = FALSE;
  1291. continue;
  1292. }
  1293. DP_STATS_INC(soc, ast.aged_out, 1);
  1294. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  1295. vdev->osif_vdev,
  1296. ase->mac_addr.raw);
  1297. dp_peer_del_ast(soc, ase);
  1298. }
  1299. }
  1300. }
  1301. }
  1302. qdf_spin_unlock_bh(&soc->ast_lock);
  1303. if (qdf_atomic_read(&soc->cmn_init_done))
  1304. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1305. }
  1306. /*
  1307. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1308. * @soc: Datapath SOC handle
  1309. *
  1310. * Return: None
  1311. */
  1312. static void dp_soc_wds_attach(struct dp_soc *soc)
  1313. {
  1314. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1315. dp_wds_aging_timer_fn, (void *)soc,
  1316. QDF_TIMER_TYPE_WAKE_APPS);
  1317. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1318. }
  1319. /*
  1320. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1321. * @txrx_soc: DP SOC handle
  1322. *
  1323. * Return: None
  1324. */
  1325. static void dp_soc_wds_detach(struct dp_soc *soc)
  1326. {
  1327. qdf_timer_stop(&soc->wds_aging_timer);
  1328. qdf_timer_free(&soc->wds_aging_timer);
  1329. }
  1330. #else
  1331. static void dp_soc_wds_attach(struct dp_soc *soc)
  1332. {
  1333. }
  1334. static void dp_soc_wds_detach(struct dp_soc *soc)
  1335. {
  1336. }
  1337. #endif
  1338. /*
  1339. * dp_soc_reset_ring_map() - Reset cpu ring map
  1340. * @soc: Datapath soc handler
  1341. *
  1342. * This api resets the default cpu ring map
  1343. */
  1344. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1345. {
  1346. uint8_t i;
  1347. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1348. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1349. if (nss_config == 1) {
  1350. /*
  1351. * Setting Tx ring map for one nss offloaded radio
  1352. */
  1353. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1354. } else if (nss_config == 2) {
  1355. /*
  1356. * Setting Tx ring for two nss offloaded radios
  1357. */
  1358. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1359. } else {
  1360. /*
  1361. * Setting Tx ring map for all nss offloaded radios
  1362. */
  1363. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1364. }
  1365. }
  1366. }
  1367. /*
  1368. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1369. * @dp_soc - DP soc handle
  1370. * @ring_type - ring type
  1371. * @ring_num - ring_num
  1372. *
  1373. * return 0 or 1
  1374. */
  1375. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1376. {
  1377. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1378. uint8_t status = 0;
  1379. switch (ring_type) {
  1380. case WBM2SW_RELEASE:
  1381. case REO_DST:
  1382. case RXDMA_BUF:
  1383. status = ((nss_config) & (1 << ring_num));
  1384. break;
  1385. default:
  1386. break;
  1387. }
  1388. return status;
  1389. }
  1390. /*
  1391. * dp_soc_reset_intr_mask() - reset interrupt mask
  1392. * @dp_soc - DP Soc handle
  1393. *
  1394. * Return: Return void
  1395. */
  1396. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1397. {
  1398. uint8_t j;
  1399. int *grp_mask = NULL;
  1400. int group_number, mask, num_ring;
  1401. /* number of tx ring */
  1402. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1403. /*
  1404. * group mask for tx completion ring.
  1405. */
  1406. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1407. /* loop and reset the mask for only offloaded ring */
  1408. for (j = 0; j < num_ring; j++) {
  1409. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1410. continue;
  1411. }
  1412. /*
  1413. * Group number corresponding to tx offloaded ring.
  1414. */
  1415. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1416. if (group_number < 0) {
  1417. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1418. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1419. WBM2SW_RELEASE, j);
  1420. return;
  1421. }
  1422. /* reset the tx mask for offloaded ring */
  1423. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1424. mask &= (~(1 << j));
  1425. /*
  1426. * reset the interrupt mask for offloaded ring.
  1427. */
  1428. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1429. }
  1430. /* number of rx rings */
  1431. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1432. /*
  1433. * group mask for reo destination ring.
  1434. */
  1435. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1436. /* loop and reset the mask for only offloaded ring */
  1437. for (j = 0; j < num_ring; j++) {
  1438. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1439. continue;
  1440. }
  1441. /*
  1442. * Group number corresponding to rx offloaded ring.
  1443. */
  1444. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1445. if (group_number < 0) {
  1446. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1447. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1448. REO_DST, j);
  1449. return;
  1450. }
  1451. /* set the interrupt mask for offloaded ring */
  1452. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1453. mask &= (~(1 << j));
  1454. /*
  1455. * set the interrupt mask to zero for rx offloaded radio.
  1456. */
  1457. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1458. }
  1459. /*
  1460. * group mask for Rx buffer refill ring
  1461. */
  1462. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1463. /* loop and reset the mask for only offloaded ring */
  1464. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1465. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1466. continue;
  1467. }
  1468. /*
  1469. * Group number corresponding to rx offloaded ring.
  1470. */
  1471. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1472. if (group_number < 0) {
  1473. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1474. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1475. REO_DST, j);
  1476. return;
  1477. }
  1478. /* set the interrupt mask for offloaded ring */
  1479. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1480. group_number);
  1481. mask &= (~(1 << j));
  1482. /*
  1483. * set the interrupt mask to zero for rx offloaded radio.
  1484. */
  1485. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1486. group_number, mask);
  1487. }
  1488. }
  1489. #ifdef IPA_OFFLOAD
  1490. /**
  1491. * dp_reo_remap_config() - configure reo remap register value based
  1492. * nss configuration.
  1493. * based on offload_radio value below remap configuration
  1494. * get applied.
  1495. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1496. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1497. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1498. * 3 - both Radios handled by NSS (remap not required)
  1499. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1500. *
  1501. * @remap1: output parameter indicates reo remap 1 register value
  1502. * @remap2: output parameter indicates reo remap 2 register value
  1503. * Return: bool type, true if remap is configured else false.
  1504. */
  1505. static bool dp_reo_remap_config(struct dp_soc *soc,
  1506. uint32_t *remap1,
  1507. uint32_t *remap2)
  1508. {
  1509. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1510. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1511. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1512. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1513. return true;
  1514. }
  1515. #else
  1516. static bool dp_reo_remap_config(struct dp_soc *soc,
  1517. uint32_t *remap1,
  1518. uint32_t *remap2)
  1519. {
  1520. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1521. switch (offload_radio) {
  1522. case 0:
  1523. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1524. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1525. (0x3 << 18) | (0x4 << 21)) << 8;
  1526. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1527. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1528. (0x3 << 18) | (0x4 << 21)) << 8;
  1529. break;
  1530. case 1:
  1531. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1532. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1533. (0x2 << 18) | (0x3 << 21)) << 8;
  1534. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1535. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1536. (0x4 << 18) | (0x2 << 21)) << 8;
  1537. break;
  1538. case 2:
  1539. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1540. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1541. (0x1 << 18) | (0x3 << 21)) << 8;
  1542. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1543. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1544. (0x4 << 18) | (0x1 << 21)) << 8;
  1545. break;
  1546. case 3:
  1547. /* return false if both radios are offloaded to NSS */
  1548. return false;
  1549. }
  1550. return true;
  1551. }
  1552. #endif
  1553. /*
  1554. * dp_reo_frag_dst_set() - configure reo register to set the
  1555. * fragment destination ring
  1556. * @soc : Datapath soc
  1557. * @frag_dst_ring : output parameter to set fragment destination ring
  1558. *
  1559. * Based on offload_radio below fragment destination rings is selected
  1560. * 0 - TCL
  1561. * 1 - SW1
  1562. * 2 - SW2
  1563. * 3 - SW3
  1564. * 4 - SW4
  1565. * 5 - Release
  1566. * 6 - FW
  1567. * 7 - alternate select
  1568. *
  1569. * return: void
  1570. */
  1571. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1572. {
  1573. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1574. switch (offload_radio) {
  1575. case 0:
  1576. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1577. break;
  1578. case 3:
  1579. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1580. break;
  1581. default:
  1582. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1583. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1584. break;
  1585. }
  1586. }
  1587. /*
  1588. * dp_soc_cmn_setup() - Common SoC level initializion
  1589. * @soc: Datapath SOC handle
  1590. *
  1591. * This is an internal function used to setup common SOC data structures,
  1592. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1593. */
  1594. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1595. {
  1596. int i;
  1597. struct hal_reo_params reo_params;
  1598. int tx_ring_size;
  1599. int tx_comp_ring_size;
  1600. if (qdf_atomic_read(&soc->cmn_init_done))
  1601. return 0;
  1602. if (dp_peer_find_attach(soc))
  1603. goto fail0;
  1604. if (dp_hw_link_desc_pool_setup(soc))
  1605. goto fail1;
  1606. /* Setup SRNG rings */
  1607. /* Common rings */
  1608. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1609. WBM_RELEASE_RING_SIZE)) {
  1610. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1611. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1612. goto fail1;
  1613. }
  1614. soc->num_tcl_data_rings = 0;
  1615. /* Tx data rings */
  1616. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1617. soc->num_tcl_data_rings =
  1618. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1619. tx_comp_ring_size =
  1620. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1621. tx_ring_size =
  1622. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1623. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1624. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1625. TCL_DATA, i, 0, tx_ring_size)) {
  1626. QDF_TRACE(QDF_MODULE_ID_DP,
  1627. QDF_TRACE_LEVEL_ERROR,
  1628. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1629. goto fail1;
  1630. }
  1631. /*
  1632. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1633. * count
  1634. */
  1635. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1636. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1637. QDF_TRACE(QDF_MODULE_ID_DP,
  1638. QDF_TRACE_LEVEL_ERROR,
  1639. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1640. goto fail1;
  1641. }
  1642. }
  1643. } else {
  1644. /* This will be incremented during per pdev ring setup */
  1645. soc->num_tcl_data_rings = 0;
  1646. }
  1647. if (dp_tx_soc_attach(soc)) {
  1648. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1649. FL("dp_tx_soc_attach failed"));
  1650. goto fail1;
  1651. }
  1652. /* TCL command and status rings */
  1653. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1654. TCL_CMD_RING_SIZE)) {
  1655. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1656. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1657. goto fail1;
  1658. }
  1659. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1660. TCL_STATUS_RING_SIZE)) {
  1661. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1662. FL("dp_srng_setup failed for tcl_status_ring"));
  1663. goto fail1;
  1664. }
  1665. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1666. * descriptors
  1667. */
  1668. /* Rx data rings */
  1669. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1670. soc->num_reo_dest_rings =
  1671. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1672. QDF_TRACE(QDF_MODULE_ID_DP,
  1673. QDF_TRACE_LEVEL_ERROR,
  1674. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1675. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1676. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1677. i, 0, REO_DST_RING_SIZE)) {
  1678. QDF_TRACE(QDF_MODULE_ID_DP,
  1679. QDF_TRACE_LEVEL_ERROR,
  1680. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1681. goto fail1;
  1682. }
  1683. }
  1684. } else {
  1685. /* This will be incremented during per pdev ring setup */
  1686. soc->num_reo_dest_rings = 0;
  1687. }
  1688. /* LMAC RxDMA to SW Rings configuration */
  1689. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1690. /* Only valid for MCL */
  1691. struct dp_pdev *pdev = soc->pdev_list[0];
  1692. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1693. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1694. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1695. QDF_TRACE(QDF_MODULE_ID_DP,
  1696. QDF_TRACE_LEVEL_ERROR,
  1697. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1698. goto fail1;
  1699. }
  1700. }
  1701. }
  1702. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1703. /* REO reinjection ring */
  1704. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1705. REO_REINJECT_RING_SIZE)) {
  1706. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1707. FL("dp_srng_setup failed for reo_reinject_ring"));
  1708. goto fail1;
  1709. }
  1710. /* Rx release ring */
  1711. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1712. RX_RELEASE_RING_SIZE)) {
  1713. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1714. FL("dp_srng_setup failed for rx_rel_ring"));
  1715. goto fail1;
  1716. }
  1717. /* Rx exception ring */
  1718. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1719. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1720. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1721. FL("dp_srng_setup failed for reo_exception_ring"));
  1722. goto fail1;
  1723. }
  1724. /* REO command and status rings */
  1725. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1726. REO_CMD_RING_SIZE)) {
  1727. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1728. FL("dp_srng_setup failed for reo_cmd_ring"));
  1729. goto fail1;
  1730. }
  1731. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1732. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1733. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1734. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1735. REO_STATUS_RING_SIZE)) {
  1736. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1737. FL("dp_srng_setup failed for reo_status_ring"));
  1738. goto fail1;
  1739. }
  1740. qdf_spinlock_create(&soc->ast_lock);
  1741. dp_soc_wds_attach(soc);
  1742. /* Reset the cpu ring map if radio is NSS offloaded */
  1743. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1744. dp_soc_reset_cpu_ring_map(soc);
  1745. dp_soc_reset_intr_mask(soc);
  1746. }
  1747. /* Setup HW REO */
  1748. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1749. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1750. /*
  1751. * Reo ring remap is not required if both radios
  1752. * are offloaded to NSS
  1753. */
  1754. if (!dp_reo_remap_config(soc,
  1755. &reo_params.remap1,
  1756. &reo_params.remap2))
  1757. goto out;
  1758. reo_params.rx_hash_enabled = true;
  1759. }
  1760. /* setup the global rx defrag waitlist */
  1761. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1762. soc->rx.defrag.timeout_ms =
  1763. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1764. soc->rx.flags.defrag_timeout_check =
  1765. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1766. out:
  1767. /*
  1768. * set the fragment destination ring
  1769. */
  1770. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1771. hal_reo_setup(soc->hal_soc, &reo_params);
  1772. qdf_atomic_set(&soc->cmn_init_done, 1);
  1773. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1774. return 0;
  1775. fail1:
  1776. /*
  1777. * Cleanup will be done as part of soc_detach, which will
  1778. * be called on pdev attach failure
  1779. */
  1780. fail0:
  1781. return QDF_STATUS_E_FAILURE;
  1782. }
  1783. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1784. static void dp_lro_hash_setup(struct dp_soc *soc)
  1785. {
  1786. struct cdp_lro_hash_config lro_hash;
  1787. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1788. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1789. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1790. FL("LRO disabled RX hash disabled"));
  1791. return;
  1792. }
  1793. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1794. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1795. lro_hash.lro_enable = 1;
  1796. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1797. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1798. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1799. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1800. }
  1801. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  1802. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1803. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1804. LRO_IPV4_SEED_ARR_SZ));
  1805. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1806. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1807. LRO_IPV6_SEED_ARR_SZ));
  1808. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1809. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  1810. lro_hash.lro_enable, lro_hash.tcp_flag,
  1811. lro_hash.tcp_flag_mask);
  1812. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1813. QDF_TRACE_LEVEL_ERROR,
  1814. (void *)lro_hash.toeplitz_hash_ipv4,
  1815. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1816. LRO_IPV4_SEED_ARR_SZ));
  1817. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1818. QDF_TRACE_LEVEL_ERROR,
  1819. (void *)lro_hash.toeplitz_hash_ipv6,
  1820. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1821. LRO_IPV6_SEED_ARR_SZ));
  1822. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1823. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1824. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1825. (soc->ctrl_psoc, &lro_hash);
  1826. }
  1827. /*
  1828. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1829. * @soc: data path SoC handle
  1830. * @pdev: Physical device handle
  1831. *
  1832. * Return: 0 - success, > 0 - failure
  1833. */
  1834. #ifdef QCA_HOST2FW_RXBUF_RING
  1835. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1836. struct dp_pdev *pdev)
  1837. {
  1838. int max_mac_rings =
  1839. wlan_cfg_get_num_mac_rings
  1840. (pdev->wlan_cfg_ctx);
  1841. int i;
  1842. for (i = 0; i < max_mac_rings; i++) {
  1843. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1844. "%s: pdev_id %d mac_id %d\n",
  1845. __func__, pdev->pdev_id, i);
  1846. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1847. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1848. QDF_TRACE(QDF_MODULE_ID_DP,
  1849. QDF_TRACE_LEVEL_ERROR,
  1850. FL("failed rx mac ring setup"));
  1851. return QDF_STATUS_E_FAILURE;
  1852. }
  1853. }
  1854. return QDF_STATUS_SUCCESS;
  1855. }
  1856. #else
  1857. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1858. struct dp_pdev *pdev)
  1859. {
  1860. return QDF_STATUS_SUCCESS;
  1861. }
  1862. #endif
  1863. /**
  1864. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1865. * @pdev - DP_PDEV handle
  1866. *
  1867. * Return: void
  1868. */
  1869. static inline void
  1870. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1871. {
  1872. uint8_t map_id;
  1873. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1874. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1875. sizeof(default_dscp_tid_map));
  1876. }
  1877. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1878. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1879. pdev->dscp_tid_map[map_id],
  1880. map_id);
  1881. }
  1882. }
  1883. #ifdef QCA_SUPPORT_SON
  1884. /**
  1885. * dp_mark_peer_inact(): Update peer inactivity status
  1886. * @peer_handle - datapath peer handle
  1887. *
  1888. * Return: void
  1889. */
  1890. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  1891. {
  1892. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1893. struct dp_pdev *pdev;
  1894. struct dp_soc *soc;
  1895. bool inactive_old;
  1896. if (!peer)
  1897. return;
  1898. pdev = peer->vdev->pdev;
  1899. soc = pdev->soc;
  1900. inactive_old = peer->peer_bs_inact_flag == 1;
  1901. if (!inactive)
  1902. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1903. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  1904. if (inactive_old != inactive) {
  1905. struct ieee80211com *ic;
  1906. struct ol_ath_softc_net80211 *scn;
  1907. scn = (struct ol_ath_softc_net80211 *)pdev->osif_pdev;
  1908. ic = &scn->sc_ic;
  1909. /**
  1910. * Note: a node lookup can happen in RX datapath context
  1911. * when a node changes from inactive to active (at most once
  1912. * per inactivity timeout threshold)
  1913. */
  1914. if (soc->cdp_soc.ol_ops->record_act_change) {
  1915. soc->cdp_soc.ol_ops->record_act_change(ic->ic_pdev_obj,
  1916. peer->mac_addr.raw, !inactive);
  1917. }
  1918. }
  1919. }
  1920. /**
  1921. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  1922. *
  1923. * Periodically checks the inactivity status
  1924. */
  1925. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  1926. {
  1927. struct dp_pdev *pdev;
  1928. struct dp_vdev *vdev;
  1929. struct dp_peer *peer;
  1930. struct dp_soc *soc;
  1931. int i;
  1932. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  1933. qdf_spin_lock(&soc->peer_ref_mutex);
  1934. for (i = 0; i < soc->pdev_count; i++) {
  1935. pdev = soc->pdev_list[i];
  1936. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1937. if (vdev->opmode != wlan_op_mode_ap)
  1938. continue;
  1939. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1940. if (!peer->authorize) {
  1941. /**
  1942. * Inactivity check only interested in
  1943. * connected node
  1944. */
  1945. continue;
  1946. }
  1947. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  1948. /**
  1949. * This check ensures we do not wait extra long
  1950. * due to the potential race condition
  1951. */
  1952. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1953. }
  1954. if (peer->peer_bs_inact > 0) {
  1955. /* Do not let it wrap around */
  1956. peer->peer_bs_inact--;
  1957. }
  1958. if (peer->peer_bs_inact == 0)
  1959. dp_mark_peer_inact(peer, true);
  1960. }
  1961. }
  1962. }
  1963. qdf_spin_unlock(&soc->peer_ref_mutex);
  1964. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  1965. soc->pdev_bs_inact_interval * 1000);
  1966. }
  1967. #else
  1968. void dp_mark_peer_inact(void *peer, bool inactive)
  1969. {
  1970. return;
  1971. }
  1972. #endif
  1973. /*
  1974. * dp_pdev_attach_wifi3() - attach txrx pdev
  1975. * @ctrl_pdev: Opaque PDEV object
  1976. * @txrx_soc: Datapath SOC handle
  1977. * @htc_handle: HTC handle for host-target interface
  1978. * @qdf_osdev: QDF OS device
  1979. * @pdev_id: PDEV ID
  1980. *
  1981. * Return: DP PDEV handle on success, NULL on failure
  1982. */
  1983. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  1984. struct cdp_cfg *ctrl_pdev,
  1985. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  1986. {
  1987. int tx_ring_size;
  1988. int tx_comp_ring_size;
  1989. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1990. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  1991. if (!pdev) {
  1992. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1993. FL("DP PDEV memory allocation failed"));
  1994. goto fail0;
  1995. }
  1996. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  1997. if (!pdev->wlan_cfg_ctx) {
  1998. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1999. FL("pdev cfg_attach failed"));
  2000. qdf_mem_free(pdev);
  2001. goto fail0;
  2002. }
  2003. /*
  2004. * set nss pdev config based on soc config
  2005. */
  2006. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2007. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2008. pdev->soc = soc;
  2009. pdev->osif_pdev = ctrl_pdev;
  2010. pdev->pdev_id = pdev_id;
  2011. soc->pdev_list[pdev_id] = pdev;
  2012. soc->pdev_count++;
  2013. TAILQ_INIT(&pdev->vdev_list);
  2014. pdev->vdev_count = 0;
  2015. qdf_spinlock_create(&pdev->tx_mutex);
  2016. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2017. TAILQ_INIT(&pdev->neighbour_peers_list);
  2018. if (dp_soc_cmn_setup(soc)) {
  2019. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2020. FL("dp_soc_cmn_setup failed"));
  2021. goto fail1;
  2022. }
  2023. /* Setup per PDEV TCL rings if configured */
  2024. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2025. tx_ring_size =
  2026. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2027. tx_comp_ring_size =
  2028. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2029. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2030. pdev_id, pdev_id, tx_ring_size)) {
  2031. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2032. FL("dp_srng_setup failed for tcl_data_ring"));
  2033. goto fail1;
  2034. }
  2035. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2036. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2037. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2038. FL("dp_srng_setup failed for tx_comp_ring"));
  2039. goto fail1;
  2040. }
  2041. soc->num_tcl_data_rings++;
  2042. }
  2043. /* Tx specific init */
  2044. if (dp_tx_pdev_attach(pdev)) {
  2045. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2046. FL("dp_tx_pdev_attach failed"));
  2047. goto fail1;
  2048. }
  2049. /* Setup per PDEV REO rings if configured */
  2050. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2051. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2052. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2053. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2054. FL("dp_srng_setup failed for reo_dest_ringn"));
  2055. goto fail1;
  2056. }
  2057. soc->num_reo_dest_rings++;
  2058. }
  2059. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2060. RXDMA_REFILL_RING_SIZE)) {
  2061. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2062. FL("dp_srng_setup failed rx refill ring"));
  2063. goto fail1;
  2064. }
  2065. if (dp_rxdma_ring_setup(soc, pdev)) {
  2066. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2067. FL("RXDMA ring config failed"));
  2068. goto fail1;
  2069. }
  2070. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  2071. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  2072. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2073. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2074. goto fail1;
  2075. }
  2076. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  2077. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  2078. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2079. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2080. goto fail1;
  2081. }
  2082. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  2083. RXDMA_MONITOR_STATUS, 0, pdev_id,
  2084. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2085. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2086. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2087. goto fail1;
  2088. }
  2089. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  2090. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  2091. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2092. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2093. goto fail1;
  2094. }
  2095. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2096. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2097. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2098. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2099. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2100. goto fail1;
  2101. }
  2102. }
  2103. /* Setup second Rx refill buffer ring */
  2104. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2,
  2105. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2106. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2107. FL("dp_srng_setup failed second rx refill ring"));
  2108. goto fail1;
  2109. }
  2110. if (dp_ipa_ring_resource_setup(soc, pdev))
  2111. goto fail1;
  2112. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2113. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2114. FL("dp_ipa_uc_attach failed"));
  2115. goto fail1;
  2116. }
  2117. /* Rx specific init */
  2118. if (dp_rx_pdev_attach(pdev)) {
  2119. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2120. FL("dp_rx_pdev_attach failed"));
  2121. goto fail0;
  2122. }
  2123. DP_STATS_INIT(pdev);
  2124. /* Monitor filter init */
  2125. pdev->mon_filter_mode = MON_FILTER_ALL;
  2126. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2127. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2128. pdev->fp_data_filter = FILTER_DATA_ALL;
  2129. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2130. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2131. pdev->mo_data_filter = FILTER_DATA_ALL;
  2132. #ifndef CONFIG_WIN
  2133. /* MCL */
  2134. dp_local_peer_id_pool_init(pdev);
  2135. #endif
  2136. dp_dscp_tid_map_setup(pdev);
  2137. /* Rx monitor mode specific init */
  2138. if (dp_rx_pdev_mon_attach(pdev)) {
  2139. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2140. "dp_rx_pdev_attach failed\n");
  2141. goto fail1;
  2142. }
  2143. if (dp_wdi_event_attach(pdev)) {
  2144. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2145. "dp_wdi_evet_attach failed\n");
  2146. goto fail1;
  2147. }
  2148. #ifdef QCA_SUPPORT_SON
  2149. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  2150. dp_txrx_peer_find_inact_timeout_handler,
  2151. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  2152. #endif
  2153. /* set the reo destination during initialization */
  2154. pdev->reo_dest = pdev->pdev_id + 1;
  2155. return (struct cdp_pdev *)pdev;
  2156. fail1:
  2157. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2158. fail0:
  2159. return NULL;
  2160. }
  2161. /*
  2162. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2163. * @soc: data path SoC handle
  2164. * @pdev: Physical device handle
  2165. *
  2166. * Return: void
  2167. */
  2168. #ifdef QCA_HOST2FW_RXBUF_RING
  2169. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2170. struct dp_pdev *pdev)
  2171. {
  2172. int max_mac_rings =
  2173. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2174. int i;
  2175. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2176. max_mac_rings : MAX_RX_MAC_RINGS;
  2177. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2178. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2179. RXDMA_BUF, 1);
  2180. qdf_timer_free(&soc->mon_reap_timer);
  2181. }
  2182. #else
  2183. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2184. struct dp_pdev *pdev)
  2185. {
  2186. }
  2187. #endif
  2188. /*
  2189. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2190. * @pdev: device object
  2191. *
  2192. * Return: void
  2193. */
  2194. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2195. {
  2196. struct dp_neighbour_peer *peer = NULL;
  2197. struct dp_neighbour_peer *temp_peer = NULL;
  2198. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2199. neighbour_peer_list_elem, temp_peer) {
  2200. /* delete this peer from the list */
  2201. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2202. peer, neighbour_peer_list_elem);
  2203. qdf_mem_free(peer);
  2204. }
  2205. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2206. }
  2207. /*
  2208. * dp_pdev_detach_wifi3() - detach txrx pdev
  2209. * @txrx_pdev: Datapath PDEV handle
  2210. * @force: Force detach
  2211. *
  2212. */
  2213. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2214. {
  2215. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2216. struct dp_soc *soc = pdev->soc;
  2217. qdf_nbuf_t curr_nbuf, next_nbuf;
  2218. dp_wdi_event_detach(pdev);
  2219. dp_tx_pdev_detach(pdev);
  2220. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2221. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2222. TCL_DATA, pdev->pdev_id);
  2223. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2224. WBM2SW_RELEASE, pdev->pdev_id);
  2225. }
  2226. dp_pktlogmod_exit(pdev);
  2227. dp_rx_pdev_detach(pdev);
  2228. dp_rx_pdev_mon_detach(pdev);
  2229. dp_neighbour_peers_detach(pdev);
  2230. qdf_spinlock_destroy(&pdev->tx_mutex);
  2231. dp_ipa_uc_detach(soc, pdev);
  2232. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2);
  2233. /* Cleanup per PDEV REO rings if configured */
  2234. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2235. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2236. REO_DST, pdev->pdev_id);
  2237. }
  2238. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2239. dp_rxdma_ring_cleanup(soc, pdev);
  2240. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  2241. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  2242. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  2243. RXDMA_MONITOR_STATUS, 0);
  2244. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  2245. RXDMA_MONITOR_DESC, 0);
  2246. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2247. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST, 0);
  2248. } else {
  2249. int i;
  2250. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2251. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[i],
  2252. RXDMA_DST, 0);
  2253. }
  2254. curr_nbuf = pdev->invalid_peer_head_msdu;
  2255. while (curr_nbuf) {
  2256. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2257. qdf_nbuf_free(curr_nbuf);
  2258. curr_nbuf = next_nbuf;
  2259. }
  2260. soc->pdev_list[pdev->pdev_id] = NULL;
  2261. soc->pdev_count--;
  2262. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2263. qdf_mem_free(pdev->dp_txrx_handle);
  2264. qdf_mem_free(pdev);
  2265. }
  2266. /*
  2267. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2268. * @soc: DP SOC handle
  2269. */
  2270. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2271. {
  2272. struct reo_desc_list_node *desc;
  2273. struct dp_rx_tid *rx_tid;
  2274. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2275. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2276. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2277. rx_tid = &desc->rx_tid;
  2278. qdf_mem_unmap_nbytes_single(soc->osdev,
  2279. rx_tid->hw_qdesc_paddr,
  2280. QDF_DMA_BIDIRECTIONAL,
  2281. rx_tid->hw_qdesc_alloc_size);
  2282. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2283. qdf_mem_free(desc);
  2284. }
  2285. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2286. qdf_list_destroy(&soc->reo_desc_freelist);
  2287. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2288. }
  2289. /*
  2290. * dp_soc_detach_wifi3() - Detach txrx SOC
  2291. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2292. */
  2293. static void dp_soc_detach_wifi3(void *txrx_soc)
  2294. {
  2295. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2296. int i;
  2297. qdf_atomic_set(&soc->cmn_init_done, 0);
  2298. qdf_flush_work(&soc->htt_stats.work);
  2299. qdf_disable_work(&soc->htt_stats.work);
  2300. /* Free pending htt stats messages */
  2301. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2302. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2303. if (soc->pdev_list[i])
  2304. dp_pdev_detach_wifi3(
  2305. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2306. }
  2307. dp_peer_find_detach(soc);
  2308. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2309. * SW descriptors
  2310. */
  2311. /* Free the ring memories */
  2312. /* Common rings */
  2313. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2314. dp_tx_soc_detach(soc);
  2315. /* Tx data rings */
  2316. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2317. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2318. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2319. TCL_DATA, i);
  2320. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2321. WBM2SW_RELEASE, i);
  2322. }
  2323. }
  2324. /* TCL command and status rings */
  2325. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2326. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2327. /* Rx data rings */
  2328. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2329. soc->num_reo_dest_rings =
  2330. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2331. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2332. /* TODO: Get number of rings and ring sizes
  2333. * from wlan_cfg
  2334. */
  2335. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2336. REO_DST, i);
  2337. }
  2338. }
  2339. /* REO reinjection ring */
  2340. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2341. /* Rx release ring */
  2342. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2343. /* Rx exception ring */
  2344. /* TODO: Better to store ring_type and ring_num in
  2345. * dp_srng during setup
  2346. */
  2347. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2348. /* REO command and status rings */
  2349. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2350. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2351. dp_hw_link_desc_pool_cleanup(soc);
  2352. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2353. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2354. htt_soc_detach(soc->htt_handle);
  2355. dp_reo_cmdlist_destroy(soc);
  2356. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2357. dp_reo_desc_freelist_destroy(soc);
  2358. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2359. dp_soc_wds_detach(soc);
  2360. qdf_spinlock_destroy(&soc->ast_lock);
  2361. qdf_mem_free(soc);
  2362. }
  2363. /*
  2364. * dp_rxdma_ring_config() - configure the RX DMA rings
  2365. *
  2366. * This function is used to configure the MAC rings.
  2367. * On MCL host provides buffers in Host2FW ring
  2368. * FW refills (copies) buffers to the ring and updates
  2369. * ring_idx in register
  2370. *
  2371. * @soc: data path SoC handle
  2372. *
  2373. * Return: void
  2374. */
  2375. #ifdef QCA_HOST2FW_RXBUF_RING
  2376. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2377. {
  2378. int i;
  2379. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2380. struct dp_pdev *pdev = soc->pdev_list[i];
  2381. if (pdev) {
  2382. int mac_id = 0;
  2383. int j;
  2384. bool dbs_enable = 0;
  2385. int max_mac_rings =
  2386. wlan_cfg_get_num_mac_rings
  2387. (pdev->wlan_cfg_ctx);
  2388. htt_srng_setup(soc->htt_handle, 0,
  2389. pdev->rx_refill_buf_ring.hal_srng,
  2390. RXDMA_BUF);
  2391. if (pdev->rx_refill_buf_ring2.hal_srng)
  2392. htt_srng_setup(soc->htt_handle, 0,
  2393. pdev->rx_refill_buf_ring2.hal_srng,
  2394. RXDMA_BUF);
  2395. if (soc->cdp_soc.ol_ops->
  2396. is_hw_dbs_2x2_capable) {
  2397. dbs_enable = soc->cdp_soc.ol_ops->
  2398. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2399. }
  2400. if (dbs_enable) {
  2401. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2402. QDF_TRACE_LEVEL_ERROR,
  2403. FL("DBS enabled max_mac_rings %d\n"),
  2404. max_mac_rings);
  2405. } else {
  2406. max_mac_rings = 1;
  2407. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2408. QDF_TRACE_LEVEL_ERROR,
  2409. FL("DBS disabled, max_mac_rings %d\n"),
  2410. max_mac_rings);
  2411. }
  2412. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2413. FL("pdev_id %d max_mac_rings %d\n"),
  2414. pdev->pdev_id, max_mac_rings);
  2415. for (j = 0; j < max_mac_rings; j++) {
  2416. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2417. QDF_TRACE_LEVEL_ERROR,
  2418. FL("mac_id %d\n"), mac_id);
  2419. htt_srng_setup(soc->htt_handle, mac_id,
  2420. pdev->rx_mac_buf_ring[j]
  2421. .hal_srng,
  2422. RXDMA_BUF);
  2423. htt_srng_setup(soc->htt_handle, mac_id,
  2424. pdev->rxdma_err_dst_ring[j]
  2425. .hal_srng,
  2426. RXDMA_DST);
  2427. mac_id++;
  2428. }
  2429. /* Configure monitor mode rings */
  2430. htt_srng_setup(soc->htt_handle, i,
  2431. pdev->rxdma_mon_buf_ring.hal_srng,
  2432. RXDMA_MONITOR_BUF);
  2433. htt_srng_setup(soc->htt_handle, i,
  2434. pdev->rxdma_mon_dst_ring.hal_srng,
  2435. RXDMA_MONITOR_DST);
  2436. htt_srng_setup(soc->htt_handle, i,
  2437. pdev->rxdma_mon_status_ring.hal_srng,
  2438. RXDMA_MONITOR_STATUS);
  2439. htt_srng_setup(soc->htt_handle, i,
  2440. pdev->rxdma_mon_desc_ring.hal_srng,
  2441. RXDMA_MONITOR_DESC);
  2442. }
  2443. }
  2444. /*
  2445. * Timer to reap rxdma status rings.
  2446. * Needed until we enable ppdu end interrupts
  2447. */
  2448. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2449. dp_service_mon_rings, (void *)soc,
  2450. QDF_TIMER_TYPE_WAKE_APPS);
  2451. soc->reap_timer_init = 1;
  2452. }
  2453. #else
  2454. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2455. {
  2456. int i;
  2457. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2458. struct dp_pdev *pdev = soc->pdev_list[i];
  2459. if (pdev) {
  2460. int ring_idx = dp_get_ring_id_for_mac_id(soc, i);
  2461. htt_srng_setup(soc->htt_handle, i,
  2462. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2463. htt_srng_setup(soc->htt_handle, i,
  2464. pdev->rxdma_mon_buf_ring.hal_srng,
  2465. RXDMA_MONITOR_BUF);
  2466. htt_srng_setup(soc->htt_handle, i,
  2467. pdev->rxdma_mon_dst_ring.hal_srng,
  2468. RXDMA_MONITOR_DST);
  2469. htt_srng_setup(soc->htt_handle, i,
  2470. pdev->rxdma_mon_status_ring.hal_srng,
  2471. RXDMA_MONITOR_STATUS);
  2472. htt_srng_setup(soc->htt_handle, i,
  2473. pdev->rxdma_mon_desc_ring.hal_srng,
  2474. RXDMA_MONITOR_DESC);
  2475. htt_srng_setup(soc->htt_handle, i,
  2476. pdev->rxdma_err_dst_ring[ring_idx].hal_srng,
  2477. RXDMA_DST);
  2478. }
  2479. }
  2480. }
  2481. #endif
  2482. /*
  2483. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2484. * @txrx_soc: Datapath SOC handle
  2485. */
  2486. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2487. {
  2488. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2489. htt_soc_attach_target(soc->htt_handle);
  2490. dp_rxdma_ring_config(soc);
  2491. DP_STATS_INIT(soc);
  2492. /* initialize work queue for stats processing */
  2493. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2494. return 0;
  2495. }
  2496. /*
  2497. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2498. * @txrx_soc: Datapath SOC handle
  2499. */
  2500. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2501. {
  2502. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2503. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2504. }
  2505. /*
  2506. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2507. * @txrx_soc: Datapath SOC handle
  2508. * @nss_cfg: nss config
  2509. */
  2510. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2511. {
  2512. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2513. wlan_cfg_set_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx, config);
  2514. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2515. FL("nss-wifi<0> nss config is enabled"));
  2516. }
  2517. /*
  2518. * dp_vdev_attach_wifi3() - attach txrx vdev
  2519. * @txrx_pdev: Datapath PDEV handle
  2520. * @vdev_mac_addr: MAC address of the virtual interface
  2521. * @vdev_id: VDEV Id
  2522. * @wlan_op_mode: VDEV operating mode
  2523. *
  2524. * Return: DP VDEV handle on success, NULL on failure
  2525. */
  2526. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2527. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2528. {
  2529. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2530. struct dp_soc *soc = pdev->soc;
  2531. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2532. int tx_ring_size;
  2533. if (!vdev) {
  2534. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2535. FL("DP VDEV memory allocation failed"));
  2536. goto fail0;
  2537. }
  2538. vdev->pdev = pdev;
  2539. vdev->vdev_id = vdev_id;
  2540. vdev->opmode = op_mode;
  2541. vdev->osdev = soc->osdev;
  2542. vdev->osif_rx = NULL;
  2543. vdev->osif_rsim_rx_decap = NULL;
  2544. vdev->osif_get_key = NULL;
  2545. vdev->osif_rx_mon = NULL;
  2546. vdev->osif_tx_free_ext = NULL;
  2547. vdev->osif_vdev = NULL;
  2548. vdev->delete.pending = 0;
  2549. vdev->safemode = 0;
  2550. vdev->drop_unenc = 1;
  2551. vdev->sec_type = cdp_sec_type_none;
  2552. #ifdef notyet
  2553. vdev->filters_num = 0;
  2554. #endif
  2555. qdf_mem_copy(
  2556. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2557. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2558. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2559. vdev->dscp_tid_map_id = 0;
  2560. vdev->mcast_enhancement_en = 0;
  2561. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2562. /* TODO: Initialize default HTT meta data that will be used in
  2563. * TCL descriptors for packets transmitted from this VDEV
  2564. */
  2565. TAILQ_INIT(&vdev->peer_list);
  2566. /* add this vdev into the pdev's list */
  2567. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2568. pdev->vdev_count++;
  2569. dp_tx_vdev_attach(vdev);
  2570. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2571. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2572. goto fail1;
  2573. if ((soc->intr_mode == DP_INTR_POLL) &&
  2574. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2575. if (pdev->vdev_count == 1)
  2576. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2577. }
  2578. dp_lro_hash_setup(soc);
  2579. /* LRO */
  2580. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2581. wlan_op_mode_sta == vdev->opmode)
  2582. vdev->lro_enable = true;
  2583. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2584. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2585. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2586. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2587. DP_STATS_INIT(vdev);
  2588. return (struct cdp_vdev *)vdev;
  2589. fail1:
  2590. dp_tx_vdev_detach(vdev);
  2591. qdf_mem_free(vdev);
  2592. fail0:
  2593. return NULL;
  2594. }
  2595. /**
  2596. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2597. * @vdev: Datapath VDEV handle
  2598. * @osif_vdev: OSIF vdev handle
  2599. * @txrx_ops: Tx and Rx operations
  2600. *
  2601. * Return: DP VDEV handle on success, NULL on failure
  2602. */
  2603. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2604. void *osif_vdev,
  2605. struct ol_txrx_ops *txrx_ops)
  2606. {
  2607. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2608. vdev->osif_vdev = osif_vdev;
  2609. vdev->osif_rx = txrx_ops->rx.rx;
  2610. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2611. vdev->osif_get_key = txrx_ops->get_key;
  2612. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2613. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2614. #ifdef notyet
  2615. #if ATH_SUPPORT_WAPI
  2616. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2617. #endif
  2618. #endif
  2619. #ifdef UMAC_SUPPORT_PROXY_ARP
  2620. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2621. #endif
  2622. vdev->me_convert = txrx_ops->me_convert;
  2623. /* TODO: Enable the following once Tx code is integrated */
  2624. if (vdev->mesh_vdev)
  2625. txrx_ops->tx.tx = dp_tx_send_mesh;
  2626. else
  2627. txrx_ops->tx.tx = dp_tx_send;
  2628. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2630. "DP Vdev Register success");
  2631. }
  2632. /*
  2633. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2634. * @txrx_vdev: Datapath VDEV handle
  2635. * @callback: Callback OL_IF on completion of detach
  2636. * @cb_context: Callback context
  2637. *
  2638. */
  2639. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2640. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2641. {
  2642. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2643. struct dp_pdev *pdev = vdev->pdev;
  2644. struct dp_soc *soc = pdev->soc;
  2645. /* preconditions */
  2646. qdf_assert(vdev);
  2647. /* remove the vdev from its parent pdev's list */
  2648. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2649. /*
  2650. * Use peer_ref_mutex while accessing peer_list, in case
  2651. * a peer is in the process of being removed from the list.
  2652. */
  2653. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2654. /* check that the vdev has no peers allocated */
  2655. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2656. /* debug print - will be removed later */
  2657. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2658. FL("not deleting vdev object %pK (%pM)"
  2659. "until deletion finishes for all its peers"),
  2660. vdev, vdev->mac_addr.raw);
  2661. /* indicate that the vdev needs to be deleted */
  2662. vdev->delete.pending = 1;
  2663. vdev->delete.callback = callback;
  2664. vdev->delete.context = cb_context;
  2665. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2666. return;
  2667. }
  2668. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2669. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  2670. vdev->vdev_id);
  2671. dp_tx_vdev_detach(vdev);
  2672. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2673. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  2674. qdf_mem_free(vdev);
  2675. if (callback)
  2676. callback(cb_context);
  2677. }
  2678. /*
  2679. * dp_peer_create_wifi3() - attach txrx peer
  2680. * @txrx_vdev: Datapath VDEV handle
  2681. * @peer_mac_addr: Peer MAC address
  2682. *
  2683. * Return: DP peeer handle on success, NULL on failure
  2684. */
  2685. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  2686. uint8_t *peer_mac_addr)
  2687. {
  2688. struct dp_peer *peer;
  2689. int i;
  2690. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2691. struct dp_pdev *pdev;
  2692. struct dp_soc *soc;
  2693. /* preconditions */
  2694. qdf_assert(vdev);
  2695. qdf_assert(peer_mac_addr);
  2696. pdev = vdev->pdev;
  2697. soc = pdev->soc;
  2698. #ifdef notyet
  2699. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  2700. soc->mempool_ol_ath_peer);
  2701. #else
  2702. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  2703. #endif
  2704. if (!peer)
  2705. return NULL; /* failure */
  2706. qdf_mem_zero(peer, sizeof(struct dp_peer));
  2707. TAILQ_INIT(&peer->ast_entry_list);
  2708. /* store provided params */
  2709. peer->vdev = vdev;
  2710. dp_peer_add_ast(soc, peer, peer_mac_addr, dp_ast_type_static);
  2711. qdf_spinlock_create(&peer->peer_info_lock);
  2712. qdf_mem_copy(
  2713. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2714. /* TODO: See of rx_opt_proc is really required */
  2715. peer->rx_opt_proc = soc->rx_opt_proc;
  2716. /* initialize the peer_id */
  2717. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2718. peer->peer_ids[i] = HTT_INVALID_PEER;
  2719. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2720. qdf_atomic_init(&peer->ref_cnt);
  2721. /* keep one reference for attach */
  2722. qdf_atomic_inc(&peer->ref_cnt);
  2723. /* add this peer into the vdev's list */
  2724. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  2725. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2726. /* TODO: See if hash based search is required */
  2727. dp_peer_find_hash_add(soc, peer);
  2728. /* Initialize the peer state */
  2729. peer->state = OL_TXRX_PEER_STATE_DISC;
  2730. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2731. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  2732. vdev, peer, peer->mac_addr.raw,
  2733. qdf_atomic_read(&peer->ref_cnt));
  2734. /*
  2735. * For every peer MAp message search and set if bss_peer
  2736. */
  2737. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  2738. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2739. "vdev bss_peer!!!!");
  2740. peer->bss_peer = 1;
  2741. vdev->vap_bss_peer = peer;
  2742. }
  2743. #ifndef CONFIG_WIN
  2744. dp_local_peer_id_alloc(pdev, peer);
  2745. #endif
  2746. DP_STATS_INIT(peer);
  2747. return (void *)peer;
  2748. }
  2749. /*
  2750. * dp_peer_setup_wifi3() - initialize the peer
  2751. * @vdev_hdl: virtual device object
  2752. * @peer: Peer object
  2753. *
  2754. * Return: void
  2755. */
  2756. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  2757. {
  2758. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  2759. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2760. struct dp_pdev *pdev;
  2761. struct dp_soc *soc;
  2762. bool hash_based = 0;
  2763. enum cdp_host_reo_dest_ring reo_dest;
  2764. /* preconditions */
  2765. qdf_assert(vdev);
  2766. qdf_assert(peer);
  2767. pdev = vdev->pdev;
  2768. soc = pdev->soc;
  2769. dp_peer_rx_init(pdev, peer);
  2770. peer->last_assoc_rcvd = 0;
  2771. peer->last_disassoc_rcvd = 0;
  2772. peer->last_deauth_rcvd = 0;
  2773. /*
  2774. * hash based steering is disabled for Radios which are offloaded
  2775. * to NSS
  2776. */
  2777. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2778. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2780. FL("hash based steering for pdev: %d is %d\n"),
  2781. pdev->pdev_id, hash_based);
  2782. /*
  2783. * Below line of code will ensure the proper reo_dest ring is choosen
  2784. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2785. */
  2786. reo_dest = pdev->reo_dest;
  2787. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2788. /* TODO: Check the destination ring number to be passed to FW */
  2789. soc->cdp_soc.ol_ops->peer_set_default_routing(
  2790. pdev->osif_pdev, peer->mac_addr.raw,
  2791. peer->vdev->vdev_id, hash_based, reo_dest);
  2792. }
  2793. return;
  2794. }
  2795. /*
  2796. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  2797. * @vdev_handle: virtual device object
  2798. * @htt_pkt_type: type of pkt
  2799. *
  2800. * Return: void
  2801. */
  2802. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  2803. enum htt_cmn_pkt_type val)
  2804. {
  2805. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2806. vdev->tx_encap_type = val;
  2807. }
  2808. /*
  2809. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  2810. * @vdev_handle: virtual device object
  2811. * @htt_pkt_type: type of pkt
  2812. *
  2813. * Return: void
  2814. */
  2815. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  2816. enum htt_cmn_pkt_type val)
  2817. {
  2818. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2819. vdev->rx_decap_type = val;
  2820. }
  2821. /*
  2822. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  2823. * @pdev_handle: physical device object
  2824. * @val: reo destination ring index (1 - 4)
  2825. *
  2826. * Return: void
  2827. */
  2828. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  2829. enum cdp_host_reo_dest_ring val)
  2830. {
  2831. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2832. if (pdev)
  2833. pdev->reo_dest = val;
  2834. }
  2835. /*
  2836. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  2837. * @pdev_handle: physical device object
  2838. *
  2839. * Return: reo destination ring index
  2840. */
  2841. static enum cdp_host_reo_dest_ring
  2842. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  2843. {
  2844. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2845. if (pdev)
  2846. return pdev->reo_dest;
  2847. else
  2848. return cdp_host_reo_dest_ring_unknown;
  2849. }
  2850. #ifdef QCA_SUPPORT_SON
  2851. static void dp_son_peer_authorize(struct dp_peer *peer)
  2852. {
  2853. struct dp_soc *soc;
  2854. soc = peer->vdev->pdev->soc;
  2855. peer->peer_bs_inact_flag = 0;
  2856. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2857. return;
  2858. }
  2859. #else
  2860. static void dp_son_peer_authorize(struct dp_peer *peer)
  2861. {
  2862. return;
  2863. }
  2864. #endif
  2865. /*
  2866. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  2867. * @pdev_handle: device object
  2868. * @val: value to be set
  2869. *
  2870. * Return: void
  2871. */
  2872. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2873. uint32_t val)
  2874. {
  2875. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2876. /* Enable/Disable smart mesh filtering. This flag will be checked
  2877. * during rx processing to check if packets are from NAC clients.
  2878. */
  2879. pdev->filter_neighbour_peers = val;
  2880. return 0;
  2881. }
  2882. /*
  2883. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  2884. * address for smart mesh filtering
  2885. * @pdev_handle: device object
  2886. * @cmd: Add/Del command
  2887. * @macaddr: nac client mac address
  2888. *
  2889. * Return: void
  2890. */
  2891. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2892. uint32_t cmd, uint8_t *macaddr)
  2893. {
  2894. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2895. struct dp_neighbour_peer *peer = NULL;
  2896. if (!macaddr)
  2897. goto fail0;
  2898. /* Store address of NAC (neighbour peer) which will be checked
  2899. * against TA of received packets.
  2900. */
  2901. if (cmd == DP_NAC_PARAM_ADD) {
  2902. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  2903. sizeof(*peer));
  2904. if (!peer) {
  2905. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2906. FL("DP neighbour peer node memory allocation failed"));
  2907. goto fail0;
  2908. }
  2909. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  2910. macaddr, DP_MAC_ADDR_LEN);
  2911. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  2912. /* add this neighbour peer into the list */
  2913. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  2914. neighbour_peer_list_elem);
  2915. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  2916. return 1;
  2917. } else if (cmd == DP_NAC_PARAM_DEL) {
  2918. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  2919. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  2920. neighbour_peer_list_elem) {
  2921. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  2922. macaddr, DP_MAC_ADDR_LEN)) {
  2923. /* delete this peer from the list */
  2924. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2925. peer, neighbour_peer_list_elem);
  2926. qdf_mem_free(peer);
  2927. break;
  2928. }
  2929. }
  2930. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  2931. return 1;
  2932. }
  2933. fail0:
  2934. return 0;
  2935. }
  2936. /*
  2937. * dp_get_sec_type() - Get the security type
  2938. * @peer: Datapath peer handle
  2939. * @sec_idx: Security id (mcast, ucast)
  2940. *
  2941. * return sec_type: Security type
  2942. */
  2943. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  2944. {
  2945. struct dp_peer *dpeer = (struct dp_peer *)peer;
  2946. return dpeer->security[sec_idx].sec_type;
  2947. }
  2948. /*
  2949. * dp_peer_authorize() - authorize txrx peer
  2950. * @peer_handle: Datapath peer handle
  2951. * @authorize
  2952. *
  2953. */
  2954. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  2955. {
  2956. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2957. struct dp_soc *soc;
  2958. if (peer != NULL) {
  2959. soc = peer->vdev->pdev->soc;
  2960. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2961. dp_son_peer_authorize(peer);
  2962. peer->authorize = authorize ? 1 : 0;
  2963. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2964. }
  2965. }
  2966. #ifdef QCA_SUPPORT_SON
  2967. /*
  2968. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  2969. * @pdev_handle: Device handle
  2970. * @new_threshold : updated threshold value
  2971. *
  2972. */
  2973. static void
  2974. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  2975. u_int16_t new_threshold)
  2976. {
  2977. struct dp_vdev *vdev;
  2978. struct dp_peer *peer;
  2979. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2980. struct dp_soc *soc = pdev->soc;
  2981. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  2982. if (old_threshold == new_threshold)
  2983. return;
  2984. soc->pdev_bs_inact_reload = new_threshold;
  2985. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2986. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2987. if (vdev->opmode != wlan_op_mode_ap)
  2988. continue;
  2989. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2990. if (!peer->authorize)
  2991. continue;
  2992. if (old_threshold - peer->peer_bs_inact >=
  2993. new_threshold) {
  2994. dp_mark_peer_inact((void *)peer, true);
  2995. peer->peer_bs_inact = 0;
  2996. } else {
  2997. peer->peer_bs_inact = new_threshold -
  2998. (old_threshold - peer->peer_bs_inact);
  2999. }
  3000. }
  3001. }
  3002. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3003. }
  3004. /**
  3005. * dp_txrx_reset_inact_count(): Reset inact count
  3006. * @pdev_handle - device handle
  3007. *
  3008. * Return: void
  3009. */
  3010. static void
  3011. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3012. {
  3013. struct dp_vdev *vdev = NULL;
  3014. struct dp_peer *peer = NULL;
  3015. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3016. struct dp_soc *soc = pdev->soc;
  3017. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3018. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3019. if (vdev->opmode != wlan_op_mode_ap)
  3020. continue;
  3021. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3022. if (!peer->authorize)
  3023. continue;
  3024. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3025. }
  3026. }
  3027. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3028. }
  3029. /**
  3030. * dp_set_inact_params(): set inactivity params
  3031. * @pdev_handle - device handle
  3032. * @inact_check_interval - inactivity interval
  3033. * @inact_normal - Inactivity normal
  3034. * @inact_overload - Inactivity overload
  3035. *
  3036. * Return: bool
  3037. */
  3038. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3039. u_int16_t inact_check_interval,
  3040. u_int16_t inact_normal, u_int16_t inact_overload)
  3041. {
  3042. struct dp_soc *soc;
  3043. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3044. if (!pdev)
  3045. return false;
  3046. soc = pdev->soc;
  3047. if (!soc)
  3048. return false;
  3049. soc->pdev_bs_inact_interval = inact_check_interval;
  3050. soc->pdev_bs_inact_normal = inact_normal;
  3051. soc->pdev_bs_inact_overload = inact_overload;
  3052. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3053. soc->pdev_bs_inact_normal);
  3054. return true;
  3055. }
  3056. /**
  3057. * dp_start_inact_timer(): Inactivity timer start
  3058. * @pdev_handle - device handle
  3059. * @enable - Inactivity timer start/stop
  3060. *
  3061. * Return: bool
  3062. */
  3063. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3064. {
  3065. struct dp_soc *soc;
  3066. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3067. if (!pdev)
  3068. return false;
  3069. soc = pdev->soc;
  3070. if (!soc)
  3071. return false;
  3072. if (enable) {
  3073. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3074. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3075. soc->pdev_bs_inact_interval * 1000);
  3076. } else {
  3077. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3078. }
  3079. return true;
  3080. }
  3081. /**
  3082. * dp_set_overload(): Set inactivity overload
  3083. * @pdev_handle - device handle
  3084. * @overload - overload status
  3085. *
  3086. * Return: void
  3087. */
  3088. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3089. {
  3090. struct dp_soc *soc;
  3091. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3092. if (!pdev)
  3093. return;
  3094. soc = pdev->soc;
  3095. if (!soc)
  3096. return;
  3097. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3098. overload ? soc->pdev_bs_inact_overload :
  3099. soc->pdev_bs_inact_normal);
  3100. }
  3101. /**
  3102. * dp_peer_is_inact(): check whether peer is inactive
  3103. * @peer_handle - datapath peer handle
  3104. *
  3105. * Return: bool
  3106. */
  3107. bool dp_peer_is_inact(void *peer_handle)
  3108. {
  3109. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3110. if (!peer)
  3111. return false;
  3112. return peer->peer_bs_inact_flag == 1;
  3113. }
  3114. #else
  3115. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3116. u_int16_t inact_normal, u_int16_t inact_overload)
  3117. {
  3118. return false;
  3119. }
  3120. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3121. {
  3122. return false;
  3123. }
  3124. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3125. {
  3126. return;
  3127. }
  3128. bool dp_peer_is_inact(void *peer)
  3129. {
  3130. return false;
  3131. }
  3132. #endif
  3133. /*
  3134. * dp_peer_unref_delete() - unref and delete peer
  3135. * @peer_handle: Datapath peer handle
  3136. *
  3137. */
  3138. void dp_peer_unref_delete(void *peer_handle)
  3139. {
  3140. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3141. struct dp_peer *bss_peer = NULL;
  3142. struct dp_vdev *vdev = peer->vdev;
  3143. struct dp_pdev *pdev = vdev->pdev;
  3144. struct dp_soc *soc = pdev->soc;
  3145. struct dp_peer *tmppeer;
  3146. int found = 0;
  3147. uint16_t peer_id;
  3148. /*
  3149. * Hold the lock all the way from checking if the peer ref count
  3150. * is zero until the peer references are removed from the hash
  3151. * table and vdev list (if the peer ref count is zero).
  3152. * This protects against a new HL tx operation starting to use the
  3153. * peer object just after this function concludes it's done being used.
  3154. * Furthermore, the lock needs to be held while checking whether the
  3155. * vdev's list of peers is empty, to make sure that list is not modified
  3156. * concurrently with the empty check.
  3157. */
  3158. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3159. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3160. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3161. peer, qdf_atomic_read(&peer->ref_cnt));
  3162. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3163. peer_id = peer->peer_ids[0];
  3164. /*
  3165. * Make sure that the reference to the peer in
  3166. * peer object map is removed
  3167. */
  3168. if (peer_id != HTT_INVALID_PEER)
  3169. soc->peer_id_to_obj_map[peer_id] = NULL;
  3170. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3171. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3172. /* remove the reference to the peer from the hash table */
  3173. dp_peer_find_hash_remove(soc, peer);
  3174. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3175. if (tmppeer == peer) {
  3176. found = 1;
  3177. break;
  3178. }
  3179. }
  3180. if (found) {
  3181. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3182. peer_list_elem);
  3183. } else {
  3184. /*Ignoring the remove operation as peer not found*/
  3185. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3186. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3187. peer, vdev, &peer->vdev->peer_list);
  3188. }
  3189. /* cleanup the peer data */
  3190. dp_peer_cleanup(vdev, peer);
  3191. /* check whether the parent vdev has no peers left */
  3192. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3193. /*
  3194. * Now that there are no references to the peer, we can
  3195. * release the peer reference lock.
  3196. */
  3197. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3198. /*
  3199. * Check if the parent vdev was waiting for its peers
  3200. * to be deleted, in order for it to be deleted too.
  3201. */
  3202. if (vdev->delete.pending) {
  3203. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3204. vdev->delete.callback;
  3205. void *vdev_delete_context =
  3206. vdev->delete.context;
  3207. QDF_TRACE(QDF_MODULE_ID_DP,
  3208. QDF_TRACE_LEVEL_INFO_HIGH,
  3209. FL("deleting vdev object %pK (%pM)"
  3210. " - its last peer is done"),
  3211. vdev, vdev->mac_addr.raw);
  3212. /* all peers are gone, go ahead and delete it */
  3213. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id,
  3214. FLOW_TYPE_VDEV,
  3215. vdev->vdev_id);
  3216. dp_tx_vdev_detach(vdev);
  3217. QDF_TRACE(QDF_MODULE_ID_DP,
  3218. QDF_TRACE_LEVEL_INFO_HIGH,
  3219. FL("deleting vdev object %pK (%pM)"),
  3220. vdev, vdev->mac_addr.raw);
  3221. qdf_mem_free(vdev);
  3222. if (vdev_delete_cb)
  3223. vdev_delete_cb(vdev_delete_context);
  3224. }
  3225. } else {
  3226. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3227. }
  3228. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3229. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3230. vdev->vdev_id, peer->mac_addr.raw);
  3231. }
  3232. #ifdef notyet
  3233. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3234. #else
  3235. if (!vdev || !vdev->vap_bss_peer)
  3236. goto free_peer;
  3237. bss_peer = vdev->vap_bss_peer;
  3238. DP_UPDATE_STATS(bss_peer, peer);
  3239. free_peer:
  3240. qdf_mem_free(peer);
  3241. #endif
  3242. } else {
  3243. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3244. }
  3245. }
  3246. /*
  3247. * dp_peer_detach_wifi3() – Detach txrx peer
  3248. * @peer_handle: Datapath peer handle
  3249. * @bitmap: bitmap indicating special handling of request.
  3250. *
  3251. */
  3252. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3253. {
  3254. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3255. /* redirect the peer's rx delivery function to point to a
  3256. * discard func
  3257. */
  3258. peer->rx_opt_proc = dp_rx_discard;
  3259. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3260. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3261. #ifndef CONFIG_WIN
  3262. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3263. #endif
  3264. qdf_spinlock_destroy(&peer->peer_info_lock);
  3265. /*
  3266. * Remove the reference added during peer_attach.
  3267. * The peer will still be left allocated until the
  3268. * PEER_UNMAP message arrives to remove the other
  3269. * reference, added by the PEER_MAP message.
  3270. */
  3271. dp_peer_unref_delete(peer_handle);
  3272. }
  3273. /*
  3274. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3275. * @peer_handle: Datapath peer handle
  3276. *
  3277. */
  3278. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3279. {
  3280. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3281. return vdev->mac_addr.raw;
  3282. }
  3283. /*
  3284. * dp_vdev_set_wds() - Enable per packet stats
  3285. * @vdev_handle: DP VDEV handle
  3286. * @val: value
  3287. *
  3288. * Return: none
  3289. */
  3290. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3291. {
  3292. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3293. vdev->wds_enabled = val;
  3294. return 0;
  3295. }
  3296. /*
  3297. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3298. * @peer_handle: Datapath peer handle
  3299. *
  3300. */
  3301. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3302. uint8_t vdev_id)
  3303. {
  3304. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3305. struct dp_vdev *vdev = NULL;
  3306. if (qdf_unlikely(!pdev))
  3307. return NULL;
  3308. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3309. if (vdev->vdev_id == vdev_id)
  3310. break;
  3311. }
  3312. return (struct cdp_vdev *)vdev;
  3313. }
  3314. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3315. {
  3316. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3317. return vdev->opmode;
  3318. }
  3319. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3320. {
  3321. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3322. struct dp_pdev *pdev = vdev->pdev;
  3323. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3324. }
  3325. /**
  3326. * dp_reset_monitor_mode() - Disable monitor mode
  3327. * @pdev_handle: Datapath PDEV handle
  3328. *
  3329. * Return: 0 on success, not 0 on failure
  3330. */
  3331. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3332. {
  3333. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3334. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3335. struct dp_soc *soc;
  3336. uint8_t pdev_id;
  3337. pdev_id = pdev->pdev_id;
  3338. soc = pdev->soc;
  3339. pdev->monitor_vdev = NULL;
  3340. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3341. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3342. pdev->rxdma_mon_buf_ring.hal_srng,
  3343. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3344. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3345. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3346. RX_BUFFER_SIZE, &htt_tlv_filter);
  3347. return 0;
  3348. }
  3349. /**
  3350. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3351. * @vdev_handle: Datapath VDEV handle
  3352. * @smart_monitor: Flag to denote if its smart monitor mode
  3353. *
  3354. * Return: 0 on success, not 0 on failure
  3355. */
  3356. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3357. uint8_t smart_monitor)
  3358. {
  3359. /* Many monitor VAPs can exists in a system but only one can be up at
  3360. * anytime
  3361. */
  3362. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3363. struct dp_pdev *pdev;
  3364. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3365. struct dp_soc *soc;
  3366. uint8_t pdev_id;
  3367. qdf_assert(vdev);
  3368. pdev = vdev->pdev;
  3369. pdev_id = pdev->pdev_id;
  3370. soc = pdev->soc;
  3371. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3372. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3373. pdev, pdev_id, soc, vdev);
  3374. /*Check if current pdev's monitor_vdev exists */
  3375. if (pdev->monitor_vdev) {
  3376. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3377. "vdev=%pK\n", vdev);
  3378. qdf_assert(vdev);
  3379. }
  3380. pdev->monitor_vdev = vdev;
  3381. /* If smart monitor mode, do not configure monitor ring */
  3382. if (smart_monitor)
  3383. return QDF_STATUS_SUCCESS;
  3384. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3385. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3386. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3387. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3388. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3389. pdev->mo_data_filter);
  3390. htt_tlv_filter.mpdu_start = 1;
  3391. htt_tlv_filter.msdu_start = 1;
  3392. htt_tlv_filter.packet = 1;
  3393. htt_tlv_filter.msdu_end = 1;
  3394. htt_tlv_filter.mpdu_end = 1;
  3395. htt_tlv_filter.packet_header = 1;
  3396. htt_tlv_filter.attention = 1;
  3397. htt_tlv_filter.ppdu_start = 0;
  3398. htt_tlv_filter.ppdu_end = 0;
  3399. htt_tlv_filter.ppdu_end_user_stats = 0;
  3400. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3401. htt_tlv_filter.ppdu_end_status_done = 0;
  3402. htt_tlv_filter.header_per_msdu = 1;
  3403. htt_tlv_filter.enable_fp =
  3404. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3405. htt_tlv_filter.enable_md = 0;
  3406. htt_tlv_filter.enable_mo =
  3407. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3408. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3409. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3410. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3411. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3412. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3413. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3414. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3415. pdev->rxdma_mon_buf_ring.hal_srng,
  3416. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3417. htt_tlv_filter.mpdu_start = 1;
  3418. htt_tlv_filter.msdu_start = 1;
  3419. htt_tlv_filter.packet = 0;
  3420. htt_tlv_filter.msdu_end = 1;
  3421. htt_tlv_filter.mpdu_end = 1;
  3422. htt_tlv_filter.packet_header = 1;
  3423. htt_tlv_filter.attention = 1;
  3424. htt_tlv_filter.ppdu_start = 1;
  3425. htt_tlv_filter.ppdu_end = 1;
  3426. htt_tlv_filter.ppdu_end_user_stats = 1;
  3427. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3428. htt_tlv_filter.ppdu_end_status_done = 1;
  3429. htt_tlv_filter.header_per_msdu = 0;
  3430. htt_tlv_filter.enable_fp =
  3431. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3432. htt_tlv_filter.enable_md = 0;
  3433. htt_tlv_filter.enable_mo =
  3434. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3435. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3436. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3437. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3438. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3439. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3440. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3441. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3442. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3443. RX_BUFFER_SIZE, &htt_tlv_filter);
  3444. return QDF_STATUS_SUCCESS;
  3445. }
  3446. /**
  3447. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3448. * @pdev_handle: Datapath PDEV handle
  3449. * @filter_val: Flag to select Filter for monitor mode
  3450. * Return: 0 on success, not 0 on failure
  3451. */
  3452. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3453. struct cdp_monitor_filter *filter_val)
  3454. {
  3455. /* Many monitor VAPs can exists in a system but only one can be up at
  3456. * anytime
  3457. */
  3458. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3459. struct dp_vdev *vdev = pdev->monitor_vdev;
  3460. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3461. struct dp_soc *soc;
  3462. uint8_t pdev_id;
  3463. pdev_id = pdev->pdev_id;
  3464. soc = pdev->soc;
  3465. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3466. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3467. pdev, pdev_id, soc, vdev);
  3468. /*Check if current pdev's monitor_vdev exists */
  3469. if (!pdev->monitor_vdev) {
  3470. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3471. "vdev=%pK\n", vdev);
  3472. qdf_assert(vdev);
  3473. }
  3474. /* update filter mode, type in pdev structure */
  3475. pdev->mon_filter_mode = filter_val->mode;
  3476. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3477. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3478. pdev->fp_data_filter = filter_val->fp_data;
  3479. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3480. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3481. pdev->mo_data_filter = filter_val->mo_data;
  3482. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3483. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3484. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3485. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3486. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3487. pdev->mo_data_filter);
  3488. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3489. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3490. pdev->rxdma_mon_buf_ring.hal_srng,
  3491. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3492. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3493. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3494. RX_BUFFER_SIZE, &htt_tlv_filter);
  3495. htt_tlv_filter.mpdu_start = 1;
  3496. htt_tlv_filter.msdu_start = 1;
  3497. htt_tlv_filter.packet = 1;
  3498. htt_tlv_filter.msdu_end = 1;
  3499. htt_tlv_filter.mpdu_end = 1;
  3500. htt_tlv_filter.packet_header = 1;
  3501. htt_tlv_filter.attention = 1;
  3502. htt_tlv_filter.ppdu_start = 0;
  3503. htt_tlv_filter.ppdu_end = 0;
  3504. htt_tlv_filter.ppdu_end_user_stats = 0;
  3505. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3506. htt_tlv_filter.ppdu_end_status_done = 0;
  3507. htt_tlv_filter.header_per_msdu = 1;
  3508. htt_tlv_filter.enable_fp =
  3509. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3510. htt_tlv_filter.enable_md = 0;
  3511. htt_tlv_filter.enable_mo =
  3512. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3513. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3514. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3515. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3516. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3517. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3518. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3519. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3520. pdev->rxdma_mon_buf_ring.hal_srng, RXDMA_MONITOR_BUF,
  3521. RX_BUFFER_SIZE, &htt_tlv_filter);
  3522. htt_tlv_filter.mpdu_start = 1;
  3523. htt_tlv_filter.msdu_start = 1;
  3524. htt_tlv_filter.packet = 0;
  3525. htt_tlv_filter.msdu_end = 1;
  3526. htt_tlv_filter.mpdu_end = 1;
  3527. htt_tlv_filter.packet_header = 1;
  3528. htt_tlv_filter.attention = 1;
  3529. htt_tlv_filter.ppdu_start = 1;
  3530. htt_tlv_filter.ppdu_end = 1;
  3531. htt_tlv_filter.ppdu_end_user_stats = 1;
  3532. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3533. htt_tlv_filter.ppdu_end_status_done = 1;
  3534. htt_tlv_filter.header_per_msdu = 0;
  3535. htt_tlv_filter.enable_fp =
  3536. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3537. htt_tlv_filter.enable_md = 0;
  3538. htt_tlv_filter.enable_mo =
  3539. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3540. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3541. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3542. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3543. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3544. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3545. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3546. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3547. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3548. RX_BUFFER_SIZE, &htt_tlv_filter);
  3549. return QDF_STATUS_SUCCESS;
  3550. }
  3551. /**
  3552. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  3553. * @vdev_handle: Datapath VDEV handle
  3554. * Return: true on ucast filter flag set
  3555. */
  3556. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  3557. {
  3558. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3559. struct dp_pdev *pdev;
  3560. pdev = vdev->pdev;
  3561. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  3562. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  3563. return true;
  3564. return false;
  3565. }
  3566. /**
  3567. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  3568. * @vdev_handle: Datapath VDEV handle
  3569. * Return: true on mcast filter flag set
  3570. */
  3571. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  3572. {
  3573. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3574. struct dp_pdev *pdev;
  3575. pdev = vdev->pdev;
  3576. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  3577. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  3578. return true;
  3579. return false;
  3580. }
  3581. /**
  3582. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  3583. * @vdev_handle: Datapath VDEV handle
  3584. * Return: true on non data filter flag set
  3585. */
  3586. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  3587. {
  3588. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3589. struct dp_pdev *pdev;
  3590. pdev = vdev->pdev;
  3591. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  3592. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  3593. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  3594. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  3595. return true;
  3596. }
  3597. }
  3598. return false;
  3599. }
  3600. #ifdef MESH_MODE_SUPPORT
  3601. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  3602. {
  3603. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3604. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3605. FL("val %d"), val);
  3606. vdev->mesh_vdev = val;
  3607. }
  3608. /*
  3609. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  3610. * @vdev_hdl: virtual device object
  3611. * @val: value to be set
  3612. *
  3613. * Return: void
  3614. */
  3615. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  3616. {
  3617. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3618. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3619. FL("val %d"), val);
  3620. vdev->mesh_rx_filter = val;
  3621. }
  3622. #endif
  3623. /*
  3624. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  3625. * Current scope is bar recieved count
  3626. *
  3627. * @pdev_handle: DP_PDEV handle
  3628. *
  3629. * Return: void
  3630. */
  3631. #define STATS_PROC_TIMEOUT (HZ/10)
  3632. static void
  3633. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  3634. {
  3635. struct dp_vdev *vdev;
  3636. struct dp_peer *peer;
  3637. uint32_t waitcnt;
  3638. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3639. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3640. if (!peer) {
  3641. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3642. FL("DP Invalid Peer refernce"));
  3643. return;
  3644. }
  3645. waitcnt = 0;
  3646. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  3647. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  3648. && waitcnt < 10) {
  3649. schedule_timeout_interruptible(
  3650. STATS_PROC_TIMEOUT);
  3651. waitcnt++;
  3652. }
  3653. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  3654. }
  3655. }
  3656. }
  3657. /**
  3658. * dp_rx_bar_stats_cb(): BAR received stats callback
  3659. * @soc: SOC handle
  3660. * @cb_ctxt: Call back context
  3661. * @reo_status: Reo status
  3662. *
  3663. * return: void
  3664. */
  3665. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3666. union hal_reo_status *reo_status)
  3667. {
  3668. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3669. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3670. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3671. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  3672. queue_status->header.status);
  3673. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3674. return;
  3675. }
  3676. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3677. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3678. }
  3679. /**
  3680. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  3681. * @vdev: DP VDEV handle
  3682. *
  3683. * return: void
  3684. */
  3685. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  3686. {
  3687. struct dp_peer *peer = NULL;
  3688. struct dp_soc *soc = vdev->pdev->soc;
  3689. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  3690. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  3691. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  3692. DP_UPDATE_STATS(vdev, peer);
  3693. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3694. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  3695. &vdev->stats, (uint16_t) vdev->vdev_id,
  3696. UPDATE_VDEV_STATS);
  3697. }
  3698. /**
  3699. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  3700. * @pdev: DP PDEV handle
  3701. *
  3702. * return: void
  3703. */
  3704. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  3705. {
  3706. struct dp_vdev *vdev = NULL;
  3707. struct dp_soc *soc = pdev->soc;
  3708. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  3709. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  3710. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  3711. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3712. dp_aggregate_vdev_stats(vdev);
  3713. DP_UPDATE_STATS(pdev, vdev);
  3714. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  3715. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  3716. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  3717. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  3718. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  3719. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  3720. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  3721. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  3722. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  3723. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  3724. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  3725. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  3726. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  3727. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  3728. DP_STATS_AGGR(pdev, vdev,
  3729. tx_i.mcast_en.dropped_map_error);
  3730. DP_STATS_AGGR(pdev, vdev,
  3731. tx_i.mcast_en.dropped_self_mac);
  3732. DP_STATS_AGGR(pdev, vdev,
  3733. tx_i.mcast_en.dropped_send_fail);
  3734. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  3735. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  3736. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  3737. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  3738. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  3739. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  3740. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  3741. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  3742. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  3743. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  3744. pdev->stats.tx_i.dropped.dropped_pkt.num =
  3745. pdev->stats.tx_i.dropped.dma_error +
  3746. pdev->stats.tx_i.dropped.ring_full +
  3747. pdev->stats.tx_i.dropped.enqueue_fail +
  3748. pdev->stats.tx_i.dropped.desc_na +
  3749. pdev->stats.tx_i.dropped.res_full;
  3750. pdev->stats.tx.last_ack_rssi =
  3751. vdev->stats.tx.last_ack_rssi;
  3752. pdev->stats.tx_i.tso.num_seg =
  3753. vdev->stats.tx_i.tso.num_seg;
  3754. }
  3755. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3756. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  3757. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  3758. }
  3759. /**
  3760. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  3761. * @pdev: DP_PDEV Handle
  3762. *
  3763. * Return:void
  3764. */
  3765. static inline void
  3766. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  3767. {
  3768. DP_PRINT_STATS("PDEV Tx Stats:\n");
  3769. DP_PRINT_STATS("Received From Stack:");
  3770. DP_PRINT_STATS(" Packets = %d",
  3771. pdev->stats.tx_i.rcvd.num);
  3772. DP_PRINT_STATS(" Bytes = %llu",
  3773. pdev->stats.tx_i.rcvd.bytes);
  3774. DP_PRINT_STATS("Processed:");
  3775. DP_PRINT_STATS(" Packets = %d",
  3776. pdev->stats.tx_i.processed.num);
  3777. DP_PRINT_STATS(" Bytes = %llu",
  3778. pdev->stats.tx_i.processed.bytes);
  3779. DP_PRINT_STATS("Completions:");
  3780. DP_PRINT_STATS(" Packets = %d",
  3781. pdev->stats.tx.comp_pkt.num);
  3782. DP_PRINT_STATS(" Bytes = %llu",
  3783. pdev->stats.tx.comp_pkt.bytes);
  3784. DP_PRINT_STATS("Dropped:");
  3785. DP_PRINT_STATS(" Total = %d",
  3786. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3787. DP_PRINT_STATS(" Dma_map_error = %d",
  3788. pdev->stats.tx_i.dropped.dma_error);
  3789. DP_PRINT_STATS(" Ring Full = %d",
  3790. pdev->stats.tx_i.dropped.ring_full);
  3791. DP_PRINT_STATS(" Descriptor Not available = %d",
  3792. pdev->stats.tx_i.dropped.desc_na);
  3793. DP_PRINT_STATS(" HW enqueue failed= %d",
  3794. pdev->stats.tx_i.dropped.enqueue_fail);
  3795. DP_PRINT_STATS(" Resources Full = %d",
  3796. pdev->stats.tx_i.dropped.res_full);
  3797. DP_PRINT_STATS(" FW removed = %d",
  3798. pdev->stats.tx.dropped.fw_rem);
  3799. DP_PRINT_STATS(" FW removed transmitted = %d",
  3800. pdev->stats.tx.dropped.fw_rem_tx);
  3801. DP_PRINT_STATS(" FW removed untransmitted = %d",
  3802. pdev->stats.tx.dropped.fw_rem_notx);
  3803. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  3804. pdev->stats.tx.dropped.age_out);
  3805. DP_PRINT_STATS("Scatter Gather:");
  3806. DP_PRINT_STATS(" Packets = %d",
  3807. pdev->stats.tx_i.sg.sg_pkt.num);
  3808. DP_PRINT_STATS(" Bytes = %llu",
  3809. pdev->stats.tx_i.sg.sg_pkt.bytes);
  3810. DP_PRINT_STATS(" Dropped By Host = %d",
  3811. pdev->stats.tx_i.sg.dropped_host);
  3812. DP_PRINT_STATS(" Dropped By Target = %d",
  3813. pdev->stats.tx_i.sg.dropped_target);
  3814. DP_PRINT_STATS("TSO:");
  3815. DP_PRINT_STATS(" Number of Segments = %d",
  3816. pdev->stats.tx_i.tso.num_seg);
  3817. DP_PRINT_STATS(" Packets = %d",
  3818. pdev->stats.tx_i.tso.tso_pkt.num);
  3819. DP_PRINT_STATS(" Bytes = %llu",
  3820. pdev->stats.tx_i.tso.tso_pkt.bytes);
  3821. DP_PRINT_STATS(" Dropped By Host = %d",
  3822. pdev->stats.tx_i.tso.dropped_host);
  3823. DP_PRINT_STATS("Mcast Enhancement:");
  3824. DP_PRINT_STATS(" Packets = %d",
  3825. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  3826. DP_PRINT_STATS(" Bytes = %llu",
  3827. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  3828. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  3829. pdev->stats.tx_i.mcast_en.dropped_map_error);
  3830. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  3831. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  3832. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  3833. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  3834. DP_PRINT_STATS(" Unicast sent = %d",
  3835. pdev->stats.tx_i.mcast_en.ucast);
  3836. DP_PRINT_STATS("Raw:");
  3837. DP_PRINT_STATS(" Packets = %d",
  3838. pdev->stats.tx_i.raw.raw_pkt.num);
  3839. DP_PRINT_STATS(" Bytes = %llu",
  3840. pdev->stats.tx_i.raw.raw_pkt.bytes);
  3841. DP_PRINT_STATS(" DMA map error = %d",
  3842. pdev->stats.tx_i.raw.dma_map_error);
  3843. DP_PRINT_STATS("Reinjected:");
  3844. DP_PRINT_STATS(" Packets = %d",
  3845. pdev->stats.tx_i.reinject_pkts.num);
  3846. DP_PRINT_STATS("Bytes = %llu\n",
  3847. pdev->stats.tx_i.reinject_pkts.bytes);
  3848. DP_PRINT_STATS("Inspected:");
  3849. DP_PRINT_STATS(" Packets = %d",
  3850. pdev->stats.tx_i.inspect_pkts.num);
  3851. DP_PRINT_STATS(" Bytes = %llu",
  3852. pdev->stats.tx_i.inspect_pkts.bytes);
  3853. DP_PRINT_STATS("Nawds Multicast:");
  3854. DP_PRINT_STATS(" Packets = %d",
  3855. pdev->stats.tx_i.nawds_mcast.num);
  3856. DP_PRINT_STATS(" Bytes = %llu",
  3857. pdev->stats.tx_i.nawds_mcast.bytes);
  3858. DP_PRINT_STATS("CCE Classified:");
  3859. DP_PRINT_STATS(" CCE Classified Packets: %u",
  3860. pdev->stats.tx_i.cce_classified);
  3861. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  3862. pdev->stats.tx_i.cce_classified_raw);
  3863. DP_PRINT_STATS("Mesh stats:");
  3864. DP_PRINT_STATS(" frames to firmware: %u",
  3865. pdev->stats.tx_i.mesh.exception_fw);
  3866. DP_PRINT_STATS(" completions from fw: %u",
  3867. pdev->stats.tx_i.mesh.completion_fw);
  3868. }
  3869. /**
  3870. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  3871. * @pdev: DP_PDEV Handle
  3872. *
  3873. * Return: void
  3874. */
  3875. static inline void
  3876. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  3877. {
  3878. DP_PRINT_STATS("PDEV Rx Stats:\n");
  3879. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  3880. DP_PRINT_STATS(" Packets = %d %d %d %d",
  3881. pdev->stats.rx.rcvd_reo[0].num,
  3882. pdev->stats.rx.rcvd_reo[1].num,
  3883. pdev->stats.rx.rcvd_reo[2].num,
  3884. pdev->stats.rx.rcvd_reo[3].num);
  3885. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  3886. pdev->stats.rx.rcvd_reo[0].bytes,
  3887. pdev->stats.rx.rcvd_reo[1].bytes,
  3888. pdev->stats.rx.rcvd_reo[2].bytes,
  3889. pdev->stats.rx.rcvd_reo[3].bytes);
  3890. DP_PRINT_STATS("Replenished:");
  3891. DP_PRINT_STATS(" Packets = %d",
  3892. pdev->stats.replenish.pkts.num);
  3893. DP_PRINT_STATS(" Bytes = %llu",
  3894. pdev->stats.replenish.pkts.bytes);
  3895. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  3896. pdev->stats.buf_freelist);
  3897. DP_PRINT_STATS(" Low threshold intr = %d",
  3898. pdev->stats.replenish.low_thresh_intrs);
  3899. DP_PRINT_STATS("Dropped:");
  3900. DP_PRINT_STATS(" msdu_not_done = %d",
  3901. pdev->stats.dropped.msdu_not_done);
  3902. DP_PRINT_STATS("Sent To Stack:");
  3903. DP_PRINT_STATS(" Packets = %d",
  3904. pdev->stats.rx.to_stack.num);
  3905. DP_PRINT_STATS(" Bytes = %llu",
  3906. pdev->stats.rx.to_stack.bytes);
  3907. DP_PRINT_STATS("Multicast/Broadcast:");
  3908. DP_PRINT_STATS(" Packets = %d",
  3909. pdev->stats.rx.multicast.num);
  3910. DP_PRINT_STATS(" Bytes = %llu",
  3911. pdev->stats.rx.multicast.bytes);
  3912. DP_PRINT_STATS("Errors:");
  3913. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  3914. pdev->stats.replenish.rxdma_err);
  3915. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  3916. pdev->stats.err.desc_alloc_fail);
  3917. /* Get bar_recv_cnt */
  3918. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  3919. DP_PRINT_STATS("BAR Received Count: = %d",
  3920. pdev->stats.rx.bar_recv_cnt);
  3921. }
  3922. /**
  3923. * dp_print_soc_tx_stats(): Print SOC level stats
  3924. * @soc DP_SOC Handle
  3925. *
  3926. * Return: void
  3927. */
  3928. static inline void
  3929. dp_print_soc_tx_stats(struct dp_soc *soc)
  3930. {
  3931. DP_PRINT_STATS("SOC Tx Stats:\n");
  3932. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  3933. soc->stats.tx.desc_in_use);
  3934. DP_PRINT_STATS("Invalid peer:");
  3935. DP_PRINT_STATS(" Packets = %d",
  3936. soc->stats.tx.tx_invalid_peer.num);
  3937. DP_PRINT_STATS(" Bytes = %llu",
  3938. soc->stats.tx.tx_invalid_peer.bytes);
  3939. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  3940. soc->stats.tx.tcl_ring_full[0],
  3941. soc->stats.tx.tcl_ring_full[1],
  3942. soc->stats.tx.tcl_ring_full[2]);
  3943. }
  3944. /**
  3945. * dp_print_soc_rx_stats: Print SOC level Rx stats
  3946. * @soc: DP_SOC Handle
  3947. *
  3948. * Return:void
  3949. */
  3950. static inline void
  3951. dp_print_soc_rx_stats(struct dp_soc *soc)
  3952. {
  3953. uint32_t i;
  3954. char reo_error[DP_REO_ERR_LENGTH];
  3955. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  3956. uint8_t index = 0;
  3957. DP_PRINT_STATS("SOC Rx Stats:\n");
  3958. DP_PRINT_STATS("Errors:\n");
  3959. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  3960. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  3961. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  3962. DP_PRINT_STATS("Invalid RBM = %d",
  3963. soc->stats.rx.err.invalid_rbm);
  3964. DP_PRINT_STATS("Invalid Vdev = %d",
  3965. soc->stats.rx.err.invalid_vdev);
  3966. DP_PRINT_STATS("Invalid Pdev = %d",
  3967. soc->stats.rx.err.invalid_pdev);
  3968. DP_PRINT_STATS("Invalid Peer = %d",
  3969. soc->stats.rx.err.rx_invalid_peer.num);
  3970. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  3971. soc->stats.rx.err.hal_ring_access_fail);
  3972. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  3973. index += qdf_snprint(&rxdma_error[index],
  3974. DP_RXDMA_ERR_LENGTH - index,
  3975. " %d", soc->stats.rx.err.rxdma_error[i]);
  3976. }
  3977. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  3978. rxdma_error);
  3979. index = 0;
  3980. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  3981. index += qdf_snprint(&reo_error[index],
  3982. DP_REO_ERR_LENGTH - index,
  3983. " %d", soc->stats.rx.err.reo_error[i]);
  3984. }
  3985. DP_PRINT_STATS("REO Error(0-14):%s",
  3986. reo_error);
  3987. }
  3988. /**
  3989. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  3990. * @soc: DP_SOC handle
  3991. * @srng: DP_SRNG handle
  3992. * @ring_name: SRNG name
  3993. *
  3994. * Return: void
  3995. */
  3996. static inline void
  3997. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  3998. char *ring_name)
  3999. {
  4000. uint32_t tailp;
  4001. uint32_t headp;
  4002. if (srng->hal_srng != NULL) {
  4003. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4004. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4005. ring_name, headp, tailp);
  4006. }
  4007. }
  4008. /**
  4009. * dp_print_ring_stats(): Print tail and head pointer
  4010. * @pdev: DP_PDEV handle
  4011. *
  4012. * Return:void
  4013. */
  4014. static inline void
  4015. dp_print_ring_stats(struct dp_pdev *pdev)
  4016. {
  4017. uint32_t i;
  4018. char ring_name[STR_MAXLEN + 1];
  4019. dp_print_ring_stat_from_hal(pdev->soc,
  4020. &pdev->soc->reo_exception_ring,
  4021. "Reo Exception Ring");
  4022. dp_print_ring_stat_from_hal(pdev->soc,
  4023. &pdev->soc->reo_reinject_ring,
  4024. "Reo Inject Ring");
  4025. dp_print_ring_stat_from_hal(pdev->soc,
  4026. &pdev->soc->reo_cmd_ring,
  4027. "Reo Command Ring");
  4028. dp_print_ring_stat_from_hal(pdev->soc,
  4029. &pdev->soc->reo_status_ring,
  4030. "Reo Status Ring");
  4031. dp_print_ring_stat_from_hal(pdev->soc,
  4032. &pdev->soc->rx_rel_ring,
  4033. "Rx Release ring");
  4034. dp_print_ring_stat_from_hal(pdev->soc,
  4035. &pdev->soc->tcl_cmd_ring,
  4036. "Tcl command Ring");
  4037. dp_print_ring_stat_from_hal(pdev->soc,
  4038. &pdev->soc->tcl_status_ring,
  4039. "Tcl Status Ring");
  4040. dp_print_ring_stat_from_hal(pdev->soc,
  4041. &pdev->soc->wbm_desc_rel_ring,
  4042. "Wbm Desc Rel Ring");
  4043. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4044. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4045. dp_print_ring_stat_from_hal(pdev->soc,
  4046. &pdev->soc->reo_dest_ring[i],
  4047. ring_name);
  4048. }
  4049. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4050. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4051. dp_print_ring_stat_from_hal(pdev->soc,
  4052. &pdev->soc->tcl_data_ring[i],
  4053. ring_name);
  4054. }
  4055. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4056. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4057. dp_print_ring_stat_from_hal(pdev->soc,
  4058. &pdev->soc->tx_comp_ring[i],
  4059. ring_name);
  4060. }
  4061. dp_print_ring_stat_from_hal(pdev->soc,
  4062. &pdev->rx_refill_buf_ring,
  4063. "Rx Refill Buf Ring");
  4064. dp_print_ring_stat_from_hal(pdev->soc,
  4065. &pdev->rx_refill_buf_ring2,
  4066. "Second Rx Refill Buf Ring");
  4067. dp_print_ring_stat_from_hal(pdev->soc,
  4068. &pdev->rxdma_mon_buf_ring,
  4069. "Rxdma Mon Buf Ring");
  4070. dp_print_ring_stat_from_hal(pdev->soc,
  4071. &pdev->rxdma_mon_dst_ring,
  4072. "Rxdma Mon Dst Ring");
  4073. dp_print_ring_stat_from_hal(pdev->soc,
  4074. &pdev->rxdma_mon_status_ring,
  4075. "Rxdma Mon Status Ring");
  4076. dp_print_ring_stat_from_hal(pdev->soc,
  4077. &pdev->rxdma_mon_desc_ring,
  4078. "Rxdma mon desc Ring");
  4079. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4080. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4081. dp_print_ring_stat_from_hal(pdev->soc,
  4082. &pdev->rxdma_err_dst_ring[i],
  4083. ring_name);
  4084. }
  4085. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4086. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4087. dp_print_ring_stat_from_hal(pdev->soc,
  4088. &pdev->rx_mac_buf_ring[i],
  4089. ring_name);
  4090. }
  4091. }
  4092. /**
  4093. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4094. * @vdev: DP_VDEV handle
  4095. *
  4096. * Return:void
  4097. */
  4098. static inline void
  4099. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4100. {
  4101. struct dp_peer *peer = NULL;
  4102. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4103. DP_STATS_CLR(vdev->pdev);
  4104. DP_STATS_CLR(vdev->pdev->soc);
  4105. DP_STATS_CLR(vdev);
  4106. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4107. if (!peer)
  4108. return;
  4109. DP_STATS_CLR(peer);
  4110. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4111. soc->cdp_soc.ol_ops->update_dp_stats(
  4112. vdev->pdev->osif_pdev,
  4113. &peer->stats,
  4114. peer->peer_ids[0],
  4115. UPDATE_PEER_STATS);
  4116. }
  4117. }
  4118. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4119. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4120. &vdev->stats, (uint16_t)vdev->vdev_id,
  4121. UPDATE_VDEV_STATS);
  4122. }
  4123. /**
  4124. * dp_print_rx_rates(): Print Rx rate stats
  4125. * @vdev: DP_VDEV handle
  4126. *
  4127. * Return:void
  4128. */
  4129. static inline void
  4130. dp_print_rx_rates(struct dp_vdev *vdev)
  4131. {
  4132. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4133. uint8_t i, mcs, pkt_type;
  4134. uint8_t index = 0;
  4135. char nss[DP_NSS_LENGTH];
  4136. DP_PRINT_STATS("Rx Rate Info:\n");
  4137. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4138. index = 0;
  4139. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4140. if (!dp_rate_string[pkt_type][mcs].valid)
  4141. continue;
  4142. DP_PRINT_STATS(" %s = %d",
  4143. dp_rate_string[pkt_type][mcs].mcs_type,
  4144. pdev->stats.rx.pkt_type[pkt_type].
  4145. mcs_count[mcs]);
  4146. }
  4147. DP_PRINT_STATS("\n");
  4148. }
  4149. index = 0;
  4150. for (i = 0; i < SS_COUNT; i++) {
  4151. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4152. " %d", pdev->stats.rx.nss[i]);
  4153. }
  4154. DP_PRINT_STATS("NSS(1-8) = %s",
  4155. nss);
  4156. DP_PRINT_STATS("SGI ="
  4157. " 0.8us %d,"
  4158. " 0.4us %d,"
  4159. " 1.6us %d,"
  4160. " 3.2us %d,",
  4161. pdev->stats.rx.sgi_count[0],
  4162. pdev->stats.rx.sgi_count[1],
  4163. pdev->stats.rx.sgi_count[2],
  4164. pdev->stats.rx.sgi_count[3]);
  4165. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4166. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4167. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4168. DP_PRINT_STATS("Reception Type ="
  4169. " SU: %d,"
  4170. " MU_MIMO:%d,"
  4171. " MU_OFDMA:%d,"
  4172. " MU_OFDMA_MIMO:%d\n",
  4173. pdev->stats.rx.reception_type[0],
  4174. pdev->stats.rx.reception_type[1],
  4175. pdev->stats.rx.reception_type[2],
  4176. pdev->stats.rx.reception_type[3]);
  4177. DP_PRINT_STATS("Aggregation:\n");
  4178. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4179. pdev->stats.rx.ampdu_cnt);
  4180. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4181. pdev->stats.rx.non_ampdu_cnt);
  4182. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4183. pdev->stats.rx.amsdu_cnt);
  4184. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4185. pdev->stats.rx.non_amsdu_cnt);
  4186. }
  4187. /**
  4188. * dp_print_tx_rates(): Print tx rates
  4189. * @vdev: DP_VDEV handle
  4190. *
  4191. * Return:void
  4192. */
  4193. static inline void
  4194. dp_print_tx_rates(struct dp_vdev *vdev)
  4195. {
  4196. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4197. uint8_t mcs, pkt_type;
  4198. uint32_t index;
  4199. DP_PRINT_STATS("Tx Rate Info:\n");
  4200. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4201. index = 0;
  4202. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4203. if (!dp_rate_string[pkt_type][mcs].valid)
  4204. continue;
  4205. DP_PRINT_STATS(" %s = %d",
  4206. dp_rate_string[pkt_type][mcs].mcs_type,
  4207. pdev->stats.tx.pkt_type[pkt_type].
  4208. mcs_count[mcs]);
  4209. }
  4210. DP_PRINT_STATS("\n");
  4211. }
  4212. DP_PRINT_STATS("SGI ="
  4213. " 0.8us %d"
  4214. " 0.4us %d"
  4215. " 1.6us %d"
  4216. " 3.2us %d",
  4217. pdev->stats.tx.sgi_count[0],
  4218. pdev->stats.tx.sgi_count[1],
  4219. pdev->stats.tx.sgi_count[2],
  4220. pdev->stats.tx.sgi_count[3]);
  4221. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4222. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4223. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4224. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4225. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4226. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4227. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4228. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4229. DP_PRINT_STATS("Aggregation:\n");
  4230. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4231. pdev->stats.tx.amsdu_cnt);
  4232. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4233. pdev->stats.tx.non_amsdu_cnt);
  4234. }
  4235. /**
  4236. * dp_print_peer_stats():print peer stats
  4237. * @peer: DP_PEER handle
  4238. *
  4239. * return void
  4240. */
  4241. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4242. {
  4243. uint8_t i, mcs, pkt_type;
  4244. uint32_t index;
  4245. char nss[DP_NSS_LENGTH];
  4246. DP_PRINT_STATS("Node Tx Stats:\n");
  4247. DP_PRINT_STATS("Total Packet Completions = %d",
  4248. peer->stats.tx.comp_pkt.num);
  4249. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4250. peer->stats.tx.comp_pkt.bytes);
  4251. DP_PRINT_STATS("Success Packets = %d",
  4252. peer->stats.tx.tx_success.num);
  4253. DP_PRINT_STATS("Success Bytes = %llu",
  4254. peer->stats.tx.tx_success.bytes);
  4255. DP_PRINT_STATS("Unicast Success Packets = %d",
  4256. peer->stats.tx.ucast.num);
  4257. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4258. peer->stats.tx.ucast.bytes);
  4259. DP_PRINT_STATS("Multicast Success Packets = %d",
  4260. peer->stats.tx.mcast.num);
  4261. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4262. peer->stats.tx.mcast.bytes);
  4263. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4264. peer->stats.tx.bcast.num);
  4265. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4266. peer->stats.tx.bcast.bytes);
  4267. DP_PRINT_STATS("Packets Failed = %d",
  4268. peer->stats.tx.tx_failed);
  4269. DP_PRINT_STATS("Packets In OFDMA = %d",
  4270. peer->stats.tx.ofdma);
  4271. DP_PRINT_STATS("Packets In STBC = %d",
  4272. peer->stats.tx.stbc);
  4273. DP_PRINT_STATS("Packets In LDPC = %d",
  4274. peer->stats.tx.ldpc);
  4275. DP_PRINT_STATS("Packet Retries = %d",
  4276. peer->stats.tx.retries);
  4277. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4278. peer->stats.tx.amsdu_cnt);
  4279. DP_PRINT_STATS("Last Packet RSSI = %d",
  4280. peer->stats.tx.last_ack_rssi);
  4281. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4282. peer->stats.tx.dropped.fw_rem);
  4283. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4284. peer->stats.tx.dropped.fw_rem_tx);
  4285. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4286. peer->stats.tx.dropped.fw_rem_notx);
  4287. DP_PRINT_STATS("Dropped : Age Out = %d",
  4288. peer->stats.tx.dropped.age_out);
  4289. DP_PRINT_STATS("NAWDS : ");
  4290. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4291. peer->stats.tx.nawds_mcast_drop);
  4292. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4293. peer->stats.tx.nawds_mcast.num);
  4294. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4295. peer->stats.tx.nawds_mcast.bytes);
  4296. DP_PRINT_STATS("Rate Info:");
  4297. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4298. index = 0;
  4299. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4300. if (!dp_rate_string[pkt_type][mcs].valid)
  4301. continue;
  4302. DP_PRINT_STATS(" %s = %d",
  4303. dp_rate_string[pkt_type][mcs].mcs_type,
  4304. peer->stats.tx.pkt_type[pkt_type].
  4305. mcs_count[mcs]);
  4306. }
  4307. DP_PRINT_STATS("\n");
  4308. }
  4309. DP_PRINT_STATS("SGI = "
  4310. " 0.8us %d"
  4311. " 0.4us %d"
  4312. " 1.6us %d"
  4313. " 3.2us %d",
  4314. peer->stats.tx.sgi_count[0],
  4315. peer->stats.tx.sgi_count[1],
  4316. peer->stats.tx.sgi_count[2],
  4317. peer->stats.tx.sgi_count[3]);
  4318. DP_PRINT_STATS("Excess Retries per AC ");
  4319. DP_PRINT_STATS(" Best effort = %d",
  4320. peer->stats.tx.excess_retries_per_ac[0]);
  4321. DP_PRINT_STATS(" Background= %d",
  4322. peer->stats.tx.excess_retries_per_ac[1]);
  4323. DP_PRINT_STATS(" Video = %d",
  4324. peer->stats.tx.excess_retries_per_ac[2]);
  4325. DP_PRINT_STATS(" Voice = %d",
  4326. peer->stats.tx.excess_retries_per_ac[3]);
  4327. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4328. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4329. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4330. index = 0;
  4331. for (i = 0; i < SS_COUNT; i++) {
  4332. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4333. " %d", peer->stats.tx.nss[i]);
  4334. }
  4335. DP_PRINT_STATS("NSS(1-8) = %s",
  4336. nss);
  4337. DP_PRINT_STATS("Aggregation:");
  4338. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4339. peer->stats.tx.amsdu_cnt);
  4340. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4341. peer->stats.tx.non_amsdu_cnt);
  4342. DP_PRINT_STATS("Node Rx Stats:");
  4343. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4344. peer->stats.rx.to_stack.num);
  4345. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4346. peer->stats.rx.to_stack.bytes);
  4347. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4348. DP_PRINT_STATS("Ring Id = %d", i);
  4349. DP_PRINT_STATS(" Packets Received = %d",
  4350. peer->stats.rx.rcvd_reo[i].num);
  4351. DP_PRINT_STATS(" Bytes Received = %llu",
  4352. peer->stats.rx.rcvd_reo[i].bytes);
  4353. }
  4354. DP_PRINT_STATS("Multicast Packets Received = %d",
  4355. peer->stats.rx.multicast.num);
  4356. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4357. peer->stats.rx.multicast.bytes);
  4358. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4359. peer->stats.rx.bcast.num);
  4360. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4361. peer->stats.rx.bcast.bytes);
  4362. DP_PRINT_STATS("WDS Packets Received = %d",
  4363. peer->stats.rx.wds.num);
  4364. DP_PRINT_STATS("WDS Bytes Received = %llu",
  4365. peer->stats.rx.wds.bytes);
  4366. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4367. peer->stats.rx.intra_bss.pkts.num);
  4368. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4369. peer->stats.rx.intra_bss.pkts.bytes);
  4370. DP_PRINT_STATS("Raw Packets Received = %d",
  4371. peer->stats.rx.raw.num);
  4372. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4373. peer->stats.rx.raw.bytes);
  4374. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4375. peer->stats.rx.err.mic_err);
  4376. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4377. peer->stats.rx.err.decrypt_err);
  4378. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4379. peer->stats.rx.non_ampdu_cnt);
  4380. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4381. peer->stats.rx.ampdu_cnt);
  4382. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4383. peer->stats.rx.non_amsdu_cnt);
  4384. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4385. peer->stats.rx.amsdu_cnt);
  4386. DP_PRINT_STATS("NAWDS : ");
  4387. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4388. peer->stats.rx.nawds_mcast_drop.num);
  4389. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4390. peer->stats.rx.nawds_mcast_drop.bytes);
  4391. DP_PRINT_STATS("SGI ="
  4392. " 0.8us %d"
  4393. " 0.4us %d"
  4394. " 1.6us %d"
  4395. " 3.2us %d",
  4396. peer->stats.rx.sgi_count[0],
  4397. peer->stats.rx.sgi_count[1],
  4398. peer->stats.rx.sgi_count[2],
  4399. peer->stats.rx.sgi_count[3]);
  4400. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4401. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4402. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4403. DP_PRINT_STATS("Reception Type ="
  4404. " SU %d,"
  4405. " MU_MIMO %d,"
  4406. " MU_OFDMA %d,"
  4407. " MU_OFDMA_MIMO %d",
  4408. peer->stats.rx.reception_type[0],
  4409. peer->stats.rx.reception_type[1],
  4410. peer->stats.rx.reception_type[2],
  4411. peer->stats.rx.reception_type[3]);
  4412. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4413. index = 0;
  4414. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4415. if (!dp_rate_string[pkt_type][mcs].valid)
  4416. continue;
  4417. DP_PRINT_STATS(" %s = %d",
  4418. dp_rate_string[pkt_type][mcs].mcs_type,
  4419. peer->stats.rx.pkt_type[pkt_type].
  4420. mcs_count[mcs]);
  4421. }
  4422. DP_PRINT_STATS("\n");
  4423. }
  4424. index = 0;
  4425. for (i = 0; i < SS_COUNT; i++) {
  4426. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4427. " %d", peer->stats.rx.nss[i]);
  4428. }
  4429. DP_PRINT_STATS("NSS(1-8) = %s",
  4430. nss);
  4431. DP_PRINT_STATS("Aggregation:");
  4432. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4433. peer->stats.rx.ampdu_cnt);
  4434. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4435. peer->stats.rx.non_ampdu_cnt);
  4436. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4437. peer->stats.rx.amsdu_cnt);
  4438. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4439. peer->stats.rx.non_amsdu_cnt);
  4440. }
  4441. /**
  4442. * dp_print_host_stats()- Function to print the stats aggregated at host
  4443. * @vdev_handle: DP_VDEV handle
  4444. * @type: host stats type
  4445. *
  4446. * Available Stat types
  4447. * TXRX_CLEAR_STATS : Clear the stats
  4448. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4449. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4450. * TXRX_TX_HOST_STATS: Print Tx Stats
  4451. * TXRX_RX_HOST_STATS: Print Rx Stats
  4452. * TXRX_AST_STATS: Print AST Stats
  4453. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4454. *
  4455. * Return: 0 on success, print error message in case of failure
  4456. */
  4457. static int
  4458. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4459. {
  4460. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4461. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4462. dp_aggregate_pdev_stats(pdev);
  4463. switch (type) {
  4464. case TXRX_CLEAR_STATS:
  4465. dp_txrx_host_stats_clr(vdev);
  4466. break;
  4467. case TXRX_RX_RATE_STATS:
  4468. dp_print_rx_rates(vdev);
  4469. break;
  4470. case TXRX_TX_RATE_STATS:
  4471. dp_print_tx_rates(vdev);
  4472. break;
  4473. case TXRX_TX_HOST_STATS:
  4474. dp_print_pdev_tx_stats(pdev);
  4475. dp_print_soc_tx_stats(pdev->soc);
  4476. break;
  4477. case TXRX_RX_HOST_STATS:
  4478. dp_print_pdev_rx_stats(pdev);
  4479. dp_print_soc_rx_stats(pdev->soc);
  4480. break;
  4481. case TXRX_AST_STATS:
  4482. dp_print_ast_stats(pdev->soc);
  4483. break;
  4484. case TXRX_SRNG_PTR_STATS:
  4485. dp_print_ring_stats(pdev);
  4486. break;
  4487. default:
  4488. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4489. break;
  4490. }
  4491. return 0;
  4492. }
  4493. /*
  4494. * dp_get_host_peer_stats()- function to print peer stats
  4495. * @pdev_handle: DP_PDEV handle
  4496. * @mac_addr: mac address of the peer
  4497. *
  4498. * Return: void
  4499. */
  4500. static void
  4501. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4502. {
  4503. struct dp_peer *peer;
  4504. uint8_t local_id;
  4505. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  4506. &local_id);
  4507. if (!peer) {
  4508. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4509. "%s: Invalid peer\n", __func__);
  4510. return;
  4511. }
  4512. dp_print_peer_stats(peer);
  4513. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  4514. return;
  4515. }
  4516. /*
  4517. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  4518. * @pdev: DP_PDEV handle
  4519. *
  4520. * Return: void
  4521. */
  4522. static void
  4523. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  4524. {
  4525. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4526. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4527. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4528. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4529. RX_BUFFER_SIZE, &htt_tlv_filter);
  4530. }
  4531. /*
  4532. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  4533. * @pdev: DP_PDEV handle
  4534. *
  4535. * Return: void
  4536. */
  4537. static void
  4538. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  4539. {
  4540. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  4541. htt_tlv_filter.mpdu_start = 0;
  4542. htt_tlv_filter.msdu_start = 0;
  4543. htt_tlv_filter.packet = 0;
  4544. htt_tlv_filter.msdu_end = 0;
  4545. htt_tlv_filter.mpdu_end = 0;
  4546. htt_tlv_filter.packet_header = 1;
  4547. htt_tlv_filter.attention = 1;
  4548. htt_tlv_filter.ppdu_start = 1;
  4549. htt_tlv_filter.ppdu_end = 1;
  4550. htt_tlv_filter.ppdu_end_user_stats = 1;
  4551. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4552. htt_tlv_filter.ppdu_end_status_done = 1;
  4553. htt_tlv_filter.enable_fp = 1;
  4554. htt_tlv_filter.enable_md = 0;
  4555. htt_tlv_filter.enable_mo = 0;
  4556. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4557. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4558. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4559. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4560. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4561. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4562. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4563. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4564. RX_BUFFER_SIZE, &htt_tlv_filter);
  4565. }
  4566. /*
  4567. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  4568. * @pdev_handle: DP_PDEV handle
  4569. * @val: user provided value
  4570. *
  4571. * Return: void
  4572. */
  4573. static void
  4574. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  4575. {
  4576. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4577. switch (val) {
  4578. case 0:
  4579. pdev->tx_sniffer_enable = 0;
  4580. pdev->mcopy_mode = 0;
  4581. if (!pdev->enhanced_stats_en) {
  4582. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4583. dp_ppdu_ring_reset(pdev);
  4584. }
  4585. break;
  4586. case 1:
  4587. pdev->tx_sniffer_enable = 1;
  4588. pdev->mcopy_mode = 0;
  4589. if (!pdev->enhanced_stats_en)
  4590. dp_h2t_cfg_stats_msg_send(pdev,
  4591. DP_PPDU_STATS_CFG_ALL, pdev->pdev_id);
  4592. break;
  4593. case 2:
  4594. pdev->mcopy_mode = 1;
  4595. pdev->tx_sniffer_enable = 0;
  4596. if (!pdev->enhanced_stats_en) {
  4597. dp_ppdu_ring_cfg(pdev);
  4598. dp_h2t_cfg_stats_msg_send(pdev,
  4599. DP_PPDU_STATS_CFG_ALL, pdev->pdev_id);
  4600. }
  4601. break;
  4602. default:
  4603. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4604. "Invalid value\n");
  4605. break;
  4606. }
  4607. }
  4608. /*
  4609. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  4610. * @pdev_handle: DP_PDEV handle
  4611. *
  4612. * Return: void
  4613. */
  4614. static void
  4615. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4616. {
  4617. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4618. pdev->enhanced_stats_en = 1;
  4619. if (!pdev->mcopy_mode)
  4620. dp_ppdu_ring_cfg(pdev);
  4621. if (!pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4622. dp_h2t_cfg_stats_msg_send(pdev, 0xffff, pdev->pdev_id);
  4623. }
  4624. /*
  4625. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  4626. * @pdev_handle: DP_PDEV handle
  4627. *
  4628. * Return: void
  4629. */
  4630. static void
  4631. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4632. {
  4633. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4634. pdev->enhanced_stats_en = 0;
  4635. if (!pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4636. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4637. if (!pdev->mcopy_mode)
  4638. dp_ppdu_ring_reset(pdev);
  4639. }
  4640. /*
  4641. * dp_get_fw_peer_stats()- function to print peer stats
  4642. * @pdev_handle: DP_PDEV handle
  4643. * @mac_addr: mac address of the peer
  4644. * @cap: Type of htt stats requested
  4645. *
  4646. * Currently Supporting only MAC ID based requests Only
  4647. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  4648. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  4649. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  4650. *
  4651. * Return: void
  4652. */
  4653. static void
  4654. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  4655. uint32_t cap)
  4656. {
  4657. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4658. int i;
  4659. uint32_t config_param0 = 0;
  4660. uint32_t config_param1 = 0;
  4661. uint32_t config_param2 = 0;
  4662. uint32_t config_param3 = 0;
  4663. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  4664. config_param0 |= (1 << (cap + 1));
  4665. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  4666. config_param1 |= (1 << i);
  4667. }
  4668. config_param2 |= (mac_addr[0] & 0x000000ff);
  4669. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  4670. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  4671. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  4672. config_param3 |= (mac_addr[4] & 0x000000ff);
  4673. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  4674. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  4675. config_param0, config_param1, config_param2,
  4676. config_param3, 0);
  4677. }
  4678. /* This struct definition will be removed from here
  4679. * once it get added in FW headers*/
  4680. struct httstats_cmd_req {
  4681. uint32_t config_param0;
  4682. uint32_t config_param1;
  4683. uint32_t config_param2;
  4684. uint32_t config_param3;
  4685. int cookie;
  4686. u_int8_t stats_id;
  4687. };
  4688. /*
  4689. * dp_get_htt_stats: function to process the httstas request
  4690. * @pdev_handle: DP pdev handle
  4691. * @data: pointer to request data
  4692. * @data_len: length for request data
  4693. *
  4694. * return: void
  4695. */
  4696. static void
  4697. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  4698. {
  4699. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4700. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  4701. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  4702. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  4703. req->config_param0, req->config_param1,
  4704. req->config_param2, req->config_param3,
  4705. req->cookie);
  4706. }
  4707. /*
  4708. * dp_set_pdev_param: function to set parameters in pdev
  4709. * @pdev_handle: DP pdev handle
  4710. * @param: parameter type to be set
  4711. * @val: value of parameter to be set
  4712. *
  4713. * return: void
  4714. */
  4715. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  4716. enum cdp_pdev_param_type param, uint8_t val)
  4717. {
  4718. switch (param) {
  4719. case CDP_CONFIG_DEBUG_SNIFFER:
  4720. dp_config_debug_sniffer(pdev_handle, val);
  4721. break;
  4722. default:
  4723. break;
  4724. }
  4725. }
  4726. /*
  4727. * dp_set_vdev_param: function to set parameters in vdev
  4728. * @param: parameter type to be set
  4729. * @val: value of parameter to be set
  4730. *
  4731. * return: void
  4732. */
  4733. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  4734. enum cdp_vdev_param_type param, uint32_t val)
  4735. {
  4736. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4737. switch (param) {
  4738. case CDP_ENABLE_WDS:
  4739. vdev->wds_enabled = val;
  4740. break;
  4741. case CDP_ENABLE_NAWDS:
  4742. vdev->nawds_enabled = val;
  4743. break;
  4744. case CDP_ENABLE_MCAST_EN:
  4745. vdev->mcast_enhancement_en = val;
  4746. break;
  4747. case CDP_ENABLE_PROXYSTA:
  4748. vdev->proxysta_vdev = val;
  4749. break;
  4750. case CDP_UPDATE_TDLS_FLAGS:
  4751. vdev->tdls_link_connected = val;
  4752. break;
  4753. case CDP_CFG_WDS_AGING_TIMER:
  4754. if (val == 0)
  4755. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  4756. else if (val != vdev->wds_aging_timer_val)
  4757. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  4758. vdev->wds_aging_timer_val = val;
  4759. break;
  4760. case CDP_ENABLE_AP_BRIDGE:
  4761. if (wlan_op_mode_sta != vdev->opmode)
  4762. vdev->ap_bridge_enabled = val;
  4763. else
  4764. vdev->ap_bridge_enabled = false;
  4765. break;
  4766. case CDP_ENABLE_CIPHER:
  4767. vdev->sec_type = val;
  4768. break;
  4769. case CDP_ENABLE_QWRAP_ISOLATION:
  4770. vdev->isolation_vdev = val;
  4771. break;
  4772. default:
  4773. break;
  4774. }
  4775. dp_tx_vdev_update_search_flags(vdev);
  4776. }
  4777. /**
  4778. * dp_peer_set_nawds: set nawds bit in peer
  4779. * @peer_handle: pointer to peer
  4780. * @value: enable/disable nawds
  4781. *
  4782. * return: void
  4783. */
  4784. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  4785. {
  4786. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4787. peer->nawds_enabled = value;
  4788. }
  4789. /*
  4790. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  4791. * @vdev_handle: DP_VDEV handle
  4792. * @map_id:ID of map that needs to be updated
  4793. *
  4794. * Return: void
  4795. */
  4796. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  4797. uint8_t map_id)
  4798. {
  4799. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4800. vdev->dscp_tid_map_id = map_id;
  4801. return;
  4802. }
  4803. /*
  4804. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  4805. * @pdev_handle: DP_PDEV handle
  4806. * @buf: to hold pdev_stats
  4807. *
  4808. * Return: int
  4809. */
  4810. static int
  4811. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  4812. {
  4813. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4814. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  4815. dp_aggregate_pdev_stats(pdev);
  4816. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  4817. return TXRX_STATS_LEVEL;
  4818. }
  4819. /**
  4820. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  4821. * @pdev: DP_PDEV handle
  4822. * @map_id: ID of map that needs to be updated
  4823. * @tos: index value in map
  4824. * @tid: tid value passed by the user
  4825. *
  4826. * Return: void
  4827. */
  4828. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  4829. uint8_t map_id, uint8_t tos, uint8_t tid)
  4830. {
  4831. uint8_t dscp;
  4832. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  4833. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  4834. pdev->dscp_tid_map[map_id][dscp] = tid;
  4835. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  4836. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  4837. map_id, dscp);
  4838. return;
  4839. }
  4840. /**
  4841. * dp_fw_stats_process(): Process TxRX FW stats request
  4842. * @vdev_handle: DP VDEV handle
  4843. * @req: stats request
  4844. *
  4845. * return: int
  4846. */
  4847. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  4848. struct cdp_txrx_stats_req *req)
  4849. {
  4850. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4851. struct dp_pdev *pdev = NULL;
  4852. uint32_t stats = req->stats;
  4853. if (!vdev) {
  4854. DP_TRACE(NONE, "VDEV not found");
  4855. return 1;
  4856. }
  4857. pdev = vdev->pdev;
  4858. /*
  4859. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  4860. * from param0 to param3 according to below rule:
  4861. *
  4862. * PARAM:
  4863. * - config_param0 : start_offset (stats type)
  4864. * - config_param1 : stats bmask from start offset
  4865. * - config_param2 : stats bmask from start offset + 32
  4866. * - config_param3 : stats bmask from start offset + 64
  4867. */
  4868. if (req->stats == CDP_TXRX_STATS_0) {
  4869. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  4870. req->param1 = 0xFFFFFFFF;
  4871. req->param2 = 0xFFFFFFFF;
  4872. req->param3 = 0xFFFFFFFF;
  4873. }
  4874. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  4875. req->param1, req->param2, req->param3, 0);
  4876. }
  4877. /**
  4878. * dp_txrx_stats_request - function to map to firmware and host stats
  4879. * @vdev: virtual handle
  4880. * @req: stats request
  4881. *
  4882. * Return: integer
  4883. */
  4884. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  4885. struct cdp_txrx_stats_req *req)
  4886. {
  4887. int host_stats;
  4888. int fw_stats;
  4889. enum cdp_stats stats;
  4890. if (!vdev || !req) {
  4891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4892. "Invalid vdev/req instance");
  4893. return 0;
  4894. }
  4895. stats = req->stats;
  4896. if (stats >= CDP_TXRX_MAX_STATS)
  4897. return 0;
  4898. /*
  4899. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  4900. * has to be updated if new FW HTT stats added
  4901. */
  4902. if (stats > CDP_TXRX_STATS_HTT_MAX)
  4903. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  4904. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  4905. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  4906. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4907. "stats: %u fw_stats_type: %d host_stats_type: %d",
  4908. stats, fw_stats, host_stats);
  4909. if (fw_stats != TXRX_FW_STATS_INVALID) {
  4910. /* update request with FW stats type */
  4911. req->stats = fw_stats;
  4912. return dp_fw_stats_process(vdev, req);
  4913. }
  4914. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  4915. (host_stats <= TXRX_HOST_STATS_MAX))
  4916. return dp_print_host_stats(vdev, host_stats);
  4917. else
  4918. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4919. "Wrong Input for TxRx Stats");
  4920. return 0;
  4921. }
  4922. /**
  4923. * dp_txrx_stats() - function to map to firmware and host stats
  4924. * @vdev: virtual handle
  4925. * @stats: type of statistics requested
  4926. *
  4927. * Return: integer
  4928. */
  4929. static int dp_txrx_stats(struct cdp_vdev *vdev, enum cdp_stats stats)
  4930. {
  4931. struct cdp_txrx_stats_req req = {0,};
  4932. req.stats = stats;
  4933. return dp_txrx_stats_request(vdev, &req);
  4934. }
  4935. /*
  4936. * dp_print_napi_stats(): NAPI stats
  4937. * @soc - soc handle
  4938. */
  4939. static void dp_print_napi_stats(struct dp_soc *soc)
  4940. {
  4941. hif_print_napi_stats(soc->hif_handle);
  4942. }
  4943. /*
  4944. * dp_print_per_ring_stats(): Packet count per ring
  4945. * @soc - soc handle
  4946. */
  4947. static void dp_print_per_ring_stats(struct dp_soc *soc)
  4948. {
  4949. uint8_t ring;
  4950. uint16_t core;
  4951. uint64_t total_packets;
  4952. DP_TRACE(FATAL, "Reo packets per ring:");
  4953. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  4954. total_packets = 0;
  4955. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  4956. for (core = 0; core < NR_CPUS; core++) {
  4957. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  4958. core, soc->stats.rx.ring_packets[core][ring]);
  4959. total_packets += soc->stats.rx.ring_packets[core][ring];
  4960. }
  4961. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  4962. ring, total_packets);
  4963. }
  4964. }
  4965. /*
  4966. * dp_txrx_path_stats() - Function to display dump stats
  4967. * @soc - soc handle
  4968. *
  4969. * return: none
  4970. */
  4971. static void dp_txrx_path_stats(struct dp_soc *soc)
  4972. {
  4973. uint8_t error_code;
  4974. uint8_t loop_pdev;
  4975. struct dp_pdev *pdev;
  4976. uint8_t i;
  4977. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  4978. pdev = soc->pdev_list[loop_pdev];
  4979. dp_aggregate_pdev_stats(pdev);
  4980. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4981. "Tx path Statistics:");
  4982. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  4983. pdev->stats.tx_i.rcvd.num,
  4984. pdev->stats.tx_i.rcvd.bytes);
  4985. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  4986. pdev->stats.tx_i.processed.num,
  4987. pdev->stats.tx_i.processed.bytes);
  4988. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  4989. pdev->stats.tx.tx_success.num,
  4990. pdev->stats.tx.tx_success.bytes);
  4991. DP_TRACE(FATAL, "Dropped in host:");
  4992. DP_TRACE(FATAL, "Total packets dropped: %u,",
  4993. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4994. DP_TRACE(FATAL, "Descriptor not available: %u",
  4995. pdev->stats.tx_i.dropped.desc_na);
  4996. DP_TRACE(FATAL, "Ring full: %u",
  4997. pdev->stats.tx_i.dropped.ring_full);
  4998. DP_TRACE(FATAL, "Enqueue fail: %u",
  4999. pdev->stats.tx_i.dropped.enqueue_fail);
  5000. DP_TRACE(FATAL, "DMA Error: %u",
  5001. pdev->stats.tx_i.dropped.dma_error);
  5002. DP_TRACE(FATAL, "Dropped in hardware:");
  5003. DP_TRACE(FATAL, "total packets dropped: %u",
  5004. pdev->stats.tx.tx_failed);
  5005. DP_TRACE(FATAL, "mpdu age out: %u",
  5006. pdev->stats.tx.dropped.age_out);
  5007. DP_TRACE(FATAL, "firmware removed: %u",
  5008. pdev->stats.tx.dropped.fw_rem);
  5009. DP_TRACE(FATAL, "firmware removed tx: %u",
  5010. pdev->stats.tx.dropped.fw_rem_tx);
  5011. DP_TRACE(FATAL, "firmware removed notx %u",
  5012. pdev->stats.tx.dropped.fw_rem_notx);
  5013. DP_TRACE(FATAL, "peer_invalid: %u",
  5014. pdev->soc->stats.tx.tx_invalid_peer.num);
  5015. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5016. DP_TRACE(FATAL, "Single Packet: %u",
  5017. pdev->stats.tx_comp_histogram.pkts_1);
  5018. DP_TRACE(FATAL, "2-20 Packets: %u",
  5019. pdev->stats.tx_comp_histogram.pkts_2_20);
  5020. DP_TRACE(FATAL, "21-40 Packets: %u",
  5021. pdev->stats.tx_comp_histogram.pkts_21_40);
  5022. DP_TRACE(FATAL, "41-60 Packets: %u",
  5023. pdev->stats.tx_comp_histogram.pkts_41_60);
  5024. DP_TRACE(FATAL, "61-80 Packets: %u",
  5025. pdev->stats.tx_comp_histogram.pkts_61_80);
  5026. DP_TRACE(FATAL, "81-100 Packets: %u",
  5027. pdev->stats.tx_comp_histogram.pkts_81_100);
  5028. DP_TRACE(FATAL, "101-200 Packets: %u",
  5029. pdev->stats.tx_comp_histogram.pkts_101_200);
  5030. DP_TRACE(FATAL, " 201+ Packets: %u",
  5031. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5032. DP_TRACE(FATAL, "Rx path statistics");
  5033. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5034. pdev->stats.rx.to_stack.num,
  5035. pdev->stats.rx.to_stack.bytes);
  5036. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5037. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5038. i, pdev->stats.rx.rcvd_reo[i].num,
  5039. pdev->stats.rx.rcvd_reo[i].bytes);
  5040. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5041. pdev->stats.rx.intra_bss.pkts.num,
  5042. pdev->stats.rx.intra_bss.pkts.bytes);
  5043. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5044. pdev->stats.rx.intra_bss.fail.num,
  5045. pdev->stats.rx.intra_bss.fail.bytes);
  5046. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5047. pdev->stats.rx.raw.num,
  5048. pdev->stats.rx.raw.bytes);
  5049. DP_TRACE(FATAL, "dropped: error %u msdus",
  5050. pdev->stats.rx.err.mic_err);
  5051. DP_TRACE(FATAL, "peer invalid %u",
  5052. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5053. DP_TRACE(FATAL, "Reo Statistics");
  5054. DP_TRACE(FATAL, "rbm error: %u msdus",
  5055. pdev->soc->stats.rx.err.invalid_rbm);
  5056. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5057. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5058. DP_TRACE(FATAL, "Reo errors");
  5059. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5060. error_code++) {
  5061. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5062. error_code,
  5063. pdev->soc->stats.rx.err.reo_error[error_code]);
  5064. }
  5065. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5066. error_code++) {
  5067. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5068. error_code,
  5069. pdev->soc->stats.rx.err
  5070. .rxdma_error[error_code]);
  5071. }
  5072. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5073. DP_TRACE(FATAL, "Single Packet: %u",
  5074. pdev->stats.rx_ind_histogram.pkts_1);
  5075. DP_TRACE(FATAL, "2-20 Packets: %u",
  5076. pdev->stats.rx_ind_histogram.pkts_2_20);
  5077. DP_TRACE(FATAL, "21-40 Packets: %u",
  5078. pdev->stats.rx_ind_histogram.pkts_21_40);
  5079. DP_TRACE(FATAL, "41-60 Packets: %u",
  5080. pdev->stats.rx_ind_histogram.pkts_41_60);
  5081. DP_TRACE(FATAL, "61-80 Packets: %u",
  5082. pdev->stats.rx_ind_histogram.pkts_61_80);
  5083. DP_TRACE(FATAL, "81-100 Packets: %u",
  5084. pdev->stats.rx_ind_histogram.pkts_81_100);
  5085. DP_TRACE(FATAL, "101-200 Packets: %u",
  5086. pdev->stats.rx_ind_histogram.pkts_101_200);
  5087. DP_TRACE(FATAL, " 201+ Packets: %u",
  5088. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5089. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5090. __func__,
  5091. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5092. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5093. pdev->soc->wlan_cfg_ctx->rx_hash,
  5094. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5095. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5096. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5097. __func__,
  5098. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5099. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5100. #endif
  5101. }
  5102. }
  5103. /*
  5104. * dp_txrx_dump_stats() - Dump statistics
  5105. * @value - Statistics option
  5106. */
  5107. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5108. enum qdf_stats_verbosity_level level)
  5109. {
  5110. struct dp_soc *soc =
  5111. (struct dp_soc *)psoc;
  5112. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5113. if (!soc) {
  5114. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5115. "%s: soc is NULL", __func__);
  5116. return QDF_STATUS_E_INVAL;
  5117. }
  5118. switch (value) {
  5119. case CDP_TXRX_PATH_STATS:
  5120. dp_txrx_path_stats(soc);
  5121. break;
  5122. case CDP_RX_RING_STATS:
  5123. dp_print_per_ring_stats(soc);
  5124. break;
  5125. case CDP_TXRX_TSO_STATS:
  5126. /* TODO: NOT IMPLEMENTED */
  5127. break;
  5128. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5129. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5130. break;
  5131. case CDP_DP_NAPI_STATS:
  5132. dp_print_napi_stats(soc);
  5133. break;
  5134. case CDP_TXRX_DESC_STATS:
  5135. /* TODO: NOT IMPLEMENTED */
  5136. break;
  5137. default:
  5138. status = QDF_STATUS_E_INVAL;
  5139. break;
  5140. }
  5141. return status;
  5142. }
  5143. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5144. /**
  5145. * dp_update_flow_control_parameters() - API to store datapath
  5146. * config parameters
  5147. * @soc: soc handle
  5148. * @cfg: ini parameter handle
  5149. *
  5150. * Return: void
  5151. */
  5152. static inline
  5153. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5154. struct cdp_config_params *params)
  5155. {
  5156. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5157. params->tx_flow_stop_queue_threshold;
  5158. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5159. params->tx_flow_start_queue_offset;
  5160. }
  5161. #else
  5162. static inline
  5163. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5164. struct cdp_config_params *params)
  5165. {
  5166. }
  5167. #endif
  5168. /**
  5169. * dp_update_config_parameters() - API to store datapath
  5170. * config parameters
  5171. * @soc: soc handle
  5172. * @cfg: ini parameter handle
  5173. *
  5174. * Return: status
  5175. */
  5176. static
  5177. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5178. struct cdp_config_params *params)
  5179. {
  5180. struct dp_soc *soc = (struct dp_soc *)psoc;
  5181. if (!(soc)) {
  5182. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5183. "%s: Invalid handle", __func__);
  5184. return QDF_STATUS_E_INVAL;
  5185. }
  5186. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5187. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5188. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5189. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5190. params->tcp_udp_checksumoffload;
  5191. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5192. dp_update_flow_control_parameters(soc, params);
  5193. return QDF_STATUS_SUCCESS;
  5194. }
  5195. /**
  5196. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5197. * config parameters
  5198. * @vdev_handle - datapath vdev handle
  5199. * @cfg: ini parameter handle
  5200. *
  5201. * Return: status
  5202. */
  5203. #ifdef WDS_VENDOR_EXTENSION
  5204. void
  5205. dp_txrx_set_wds_rx_policy(
  5206. struct cdp_vdev *vdev_handle,
  5207. u_int32_t val)
  5208. {
  5209. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5210. struct dp_peer *peer;
  5211. if (vdev->opmode == wlan_op_mode_ap) {
  5212. /* for ap, set it on bss_peer */
  5213. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5214. if (peer->bss_peer) {
  5215. peer->wds_ecm.wds_rx_filter = 1;
  5216. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5217. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5218. break;
  5219. }
  5220. }
  5221. } else if (vdev->opmode == wlan_op_mode_sta) {
  5222. peer = TAILQ_FIRST(&vdev->peer_list);
  5223. peer->wds_ecm.wds_rx_filter = 1;
  5224. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5225. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5226. }
  5227. }
  5228. /**
  5229. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5230. *
  5231. * @peer_handle - datapath peer handle
  5232. * @wds_tx_ucast: policy for unicast transmission
  5233. * @wds_tx_mcast: policy for multicast transmission
  5234. *
  5235. * Return: void
  5236. */
  5237. void
  5238. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5239. int wds_tx_ucast, int wds_tx_mcast)
  5240. {
  5241. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5242. if (wds_tx_ucast || wds_tx_mcast) {
  5243. peer->wds_enabled = 1;
  5244. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5245. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5246. } else {
  5247. peer->wds_enabled = 0;
  5248. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5249. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5250. }
  5251. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5252. FL("Policy Update set to :\
  5253. peer->wds_enabled %d\
  5254. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5255. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5256. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5257. peer->wds_ecm.wds_tx_mcast_4addr);
  5258. return;
  5259. }
  5260. #endif
  5261. static struct cdp_wds_ops dp_ops_wds = {
  5262. .vdev_set_wds = dp_vdev_set_wds,
  5263. #ifdef WDS_VENDOR_EXTENSION
  5264. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5265. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5266. #endif
  5267. };
  5268. /*
  5269. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5270. * @soc - datapath soc handle
  5271. * @peer - datapath peer handle
  5272. *
  5273. * Delete the AST entries belonging to a peer
  5274. */
  5275. #ifdef FEATURE_WDS
  5276. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5277. struct dp_peer *peer)
  5278. {
  5279. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5280. qdf_spin_lock_bh(&soc->ast_lock);
  5281. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry) {
  5282. if (ast_entry->next_hop) {
  5283. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  5284. peer->vdev->osif_vdev,
  5285. ast_entry->mac_addr.raw);
  5286. }
  5287. dp_peer_del_ast(soc, ast_entry);
  5288. }
  5289. qdf_spin_unlock_bh(&soc->ast_lock);
  5290. }
  5291. #else
  5292. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5293. struct dp_peer *peer)
  5294. {
  5295. }
  5296. #endif
  5297. /*
  5298. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5299. * @vdev_handle - datapath vdev handle
  5300. * @callback - callback function
  5301. * @ctxt: callback context
  5302. *
  5303. */
  5304. static void
  5305. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5306. ol_txrx_data_tx_cb callback, void *ctxt)
  5307. {
  5308. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5309. vdev->tx_non_std_data_callback.func = callback;
  5310. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5311. }
  5312. /**
  5313. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5314. * @pdev_hdl: datapath pdev handle
  5315. *
  5316. * Return: opaque pointer to dp txrx handle
  5317. */
  5318. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5319. {
  5320. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5321. return pdev->dp_txrx_handle;
  5322. }
  5323. /**
  5324. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5325. * @pdev_hdl: datapath pdev handle
  5326. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5327. *
  5328. * Return: void
  5329. */
  5330. static void
  5331. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5332. {
  5333. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5334. pdev->dp_txrx_handle = dp_txrx_hdl;
  5335. }
  5336. #ifdef CONFIG_WIN
  5337. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5338. {
  5339. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5340. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5341. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5342. peer->delete_in_progress = true;
  5343. dp_peer_delete_ast_entries(soc, peer);
  5344. }
  5345. #endif
  5346. static struct cdp_cmn_ops dp_ops_cmn = {
  5347. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5348. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5349. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5350. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5351. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5352. .txrx_peer_create = dp_peer_create_wifi3,
  5353. .txrx_peer_setup = dp_peer_setup_wifi3,
  5354. #ifdef CONFIG_WIN
  5355. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5356. #else
  5357. .txrx_peer_teardown = NULL,
  5358. #endif
  5359. .txrx_peer_delete = dp_peer_delete_wifi3,
  5360. .txrx_vdev_register = dp_vdev_register_wifi3,
  5361. .txrx_soc_detach = dp_soc_detach_wifi3,
  5362. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5363. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5364. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5365. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5366. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5367. .delba_process = dp_delba_process_wifi3,
  5368. .set_addba_response = dp_set_addba_response,
  5369. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5370. .flush_cache_rx_queue = NULL,
  5371. /* TODO: get API's for dscp-tid need to be added*/
  5372. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5373. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5374. .txrx_stats = dp_txrx_stats,
  5375. .txrx_stats_request = dp_txrx_stats_request,
  5376. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5377. .display_stats = dp_txrx_dump_stats,
  5378. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5379. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5380. #ifdef DP_INTR_POLL_BASED
  5381. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5382. #else
  5383. .txrx_intr_attach = dp_soc_interrupt_attach,
  5384. #endif
  5385. .txrx_intr_detach = dp_soc_interrupt_detach,
  5386. .set_pn_check = dp_set_pn_check_wifi3,
  5387. .update_config_parameters = dp_update_config_parameters,
  5388. /* TODO: Add other functions */
  5389. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5390. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5391. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5392. };
  5393. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5394. .txrx_peer_authorize = dp_peer_authorize,
  5395. #ifdef QCA_SUPPORT_SON
  5396. .txrx_set_inact_params = dp_set_inact_params,
  5397. .txrx_start_inact_timer = dp_start_inact_timer,
  5398. .txrx_set_overload = dp_set_overload,
  5399. .txrx_peer_is_inact = dp_peer_is_inact,
  5400. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5401. #endif
  5402. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5403. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5404. #ifdef MESH_MODE_SUPPORT
  5405. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5406. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5407. #endif
  5408. .txrx_set_vdev_param = dp_set_vdev_param,
  5409. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5410. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5411. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5412. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5413. .txrx_update_filter_neighbour_peers =
  5414. dp_update_filter_neighbour_peers,
  5415. .txrx_get_sec_type = dp_get_sec_type,
  5416. /* TODO: Add other functions */
  5417. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5418. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5419. #ifdef WDI_EVENT_ENABLE
  5420. .txrx_get_pldev = dp_get_pldev,
  5421. #endif
  5422. .txrx_set_pdev_param = dp_set_pdev_param,
  5423. };
  5424. static struct cdp_me_ops dp_ops_me = {
  5425. #ifdef ATH_SUPPORT_IQUE
  5426. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  5427. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  5428. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  5429. #endif
  5430. };
  5431. static struct cdp_mon_ops dp_ops_mon = {
  5432. .txrx_monitor_set_filter_ucast_data = NULL,
  5433. .txrx_monitor_set_filter_mcast_data = NULL,
  5434. .txrx_monitor_set_filter_non_data = NULL,
  5435. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  5436. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  5437. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  5438. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  5439. /* Added support for HK advance filter */
  5440. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  5441. };
  5442. static struct cdp_host_stats_ops dp_ops_host_stats = {
  5443. .txrx_per_peer_stats = dp_get_host_peer_stats,
  5444. .get_fw_peer_stats = dp_get_fw_peer_stats,
  5445. .get_htt_stats = dp_get_htt_stats,
  5446. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  5447. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  5448. .txrx_stats_publish = dp_txrx_stats_publish,
  5449. /* TODO */
  5450. };
  5451. static struct cdp_raw_ops dp_ops_raw = {
  5452. /* TODO */
  5453. };
  5454. #ifdef CONFIG_WIN
  5455. static struct cdp_pflow_ops dp_ops_pflow = {
  5456. /* TODO */
  5457. };
  5458. #endif /* CONFIG_WIN */
  5459. #ifdef FEATURE_RUNTIME_PM
  5460. /**
  5461. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  5462. * @opaque_pdev: DP pdev context
  5463. *
  5464. * DP is ready to runtime suspend if there are no pending TX packets.
  5465. *
  5466. * Return: QDF_STATUS
  5467. */
  5468. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  5469. {
  5470. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5471. struct dp_soc *soc = pdev->soc;
  5472. /* Call DP TX flow control API to check if there is any
  5473. pending packets */
  5474. if (soc->intr_mode == DP_INTR_POLL)
  5475. qdf_timer_stop(&soc->int_timer);
  5476. return QDF_STATUS_SUCCESS;
  5477. }
  5478. /**
  5479. * dp_runtime_resume() - ensure DP is ready to runtime resume
  5480. * @opaque_pdev: DP pdev context
  5481. *
  5482. * Resume DP for runtime PM.
  5483. *
  5484. * Return: QDF_STATUS
  5485. */
  5486. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  5487. {
  5488. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5489. struct dp_soc *soc = pdev->soc;
  5490. void *hal_srng;
  5491. int i;
  5492. if (soc->intr_mode == DP_INTR_POLL)
  5493. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5494. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5495. hal_srng = soc->tcl_data_ring[i].hal_srng;
  5496. if (hal_srng) {
  5497. /* We actually only need to acquire the lock */
  5498. hal_srng_access_start(soc->hal_soc, hal_srng);
  5499. /* Update SRC ring head pointer for HW to send
  5500. all pending packets */
  5501. hal_srng_access_end(soc->hal_soc, hal_srng);
  5502. }
  5503. }
  5504. return QDF_STATUS_SUCCESS;
  5505. }
  5506. #endif /* FEATURE_RUNTIME_PM */
  5507. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  5508. {
  5509. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5510. struct dp_soc *soc = pdev->soc;
  5511. if (soc->intr_mode == DP_INTR_POLL)
  5512. qdf_timer_stop(&soc->int_timer);
  5513. return QDF_STATUS_SUCCESS;
  5514. }
  5515. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  5516. {
  5517. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5518. struct dp_soc *soc = pdev->soc;
  5519. if (soc->intr_mode == DP_INTR_POLL)
  5520. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5521. return QDF_STATUS_SUCCESS;
  5522. }
  5523. #ifndef CONFIG_WIN
  5524. static struct cdp_misc_ops dp_ops_misc = {
  5525. .tx_non_std = dp_tx_non_std,
  5526. .get_opmode = dp_get_opmode,
  5527. #ifdef FEATURE_RUNTIME_PM
  5528. .runtime_suspend = dp_runtime_suspend,
  5529. .runtime_resume = dp_runtime_resume,
  5530. #endif /* FEATURE_RUNTIME_PM */
  5531. .pkt_log_init = dp_pkt_log_init,
  5532. .pkt_log_con_service = dp_pkt_log_con_service,
  5533. };
  5534. static struct cdp_flowctl_ops dp_ops_flowctl = {
  5535. /* WIFI 3.0 DP implement as required. */
  5536. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5537. .register_pause_cb = dp_txrx_register_pause_cb,
  5538. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  5539. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  5540. };
  5541. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  5542. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5543. };
  5544. #ifdef IPA_OFFLOAD
  5545. static struct cdp_ipa_ops dp_ops_ipa = {
  5546. .ipa_get_resource = dp_ipa_get_resource,
  5547. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  5548. .ipa_op_response = dp_ipa_op_response,
  5549. .ipa_register_op_cb = dp_ipa_register_op_cb,
  5550. .ipa_get_stat = dp_ipa_get_stat,
  5551. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  5552. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  5553. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  5554. .ipa_setup = dp_ipa_setup,
  5555. .ipa_cleanup = dp_ipa_cleanup,
  5556. .ipa_setup_iface = dp_ipa_setup_iface,
  5557. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  5558. .ipa_enable_pipes = dp_ipa_enable_pipes,
  5559. .ipa_disable_pipes = dp_ipa_disable_pipes,
  5560. .ipa_set_perf_level = dp_ipa_set_perf_level
  5561. };
  5562. #endif
  5563. static struct cdp_bus_ops dp_ops_bus = {
  5564. .bus_suspend = dp_bus_suspend,
  5565. .bus_resume = dp_bus_resume
  5566. };
  5567. static struct cdp_ocb_ops dp_ops_ocb = {
  5568. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5569. };
  5570. static struct cdp_throttle_ops dp_ops_throttle = {
  5571. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5572. };
  5573. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  5574. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5575. };
  5576. static struct cdp_cfg_ops dp_ops_cfg = {
  5577. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5578. };
  5579. /*
  5580. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  5581. * @dev: physical device instance
  5582. * @peer_mac_addr: peer mac address
  5583. * @local_id: local id for the peer
  5584. * @debug_id: to track enum peer access
  5585. * Return: peer instance pointer
  5586. */
  5587. static inline void *
  5588. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  5589. u8 *local_id,
  5590. enum peer_debug_id_type debug_id)
  5591. {
  5592. /*
  5593. * Currently this function does not implement the "get ref"
  5594. * functionality and is mapped to dp_find_peer_by_addr which does not
  5595. * increment the peer ref count. So the peer state is uncertain after
  5596. * calling this API. The functionality needs to be implemented.
  5597. * Accordingly the corresponding release_ref function is NULL.
  5598. */
  5599. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  5600. }
  5601. static struct cdp_peer_ops dp_ops_peer = {
  5602. .register_peer = dp_register_peer,
  5603. .clear_peer = dp_clear_peer,
  5604. .find_peer_by_addr = dp_find_peer_by_addr,
  5605. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  5606. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  5607. .peer_release_ref = NULL,
  5608. .local_peer_id = dp_local_peer_id,
  5609. .peer_find_by_local_id = dp_peer_find_by_local_id,
  5610. .peer_state_update = dp_peer_state_update,
  5611. .get_vdevid = dp_get_vdevid,
  5612. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  5613. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  5614. .get_vdev_for_peer = dp_get_vdev_for_peer,
  5615. .get_peer_state = dp_get_peer_state,
  5616. .last_assoc_received = dp_get_last_assoc_received,
  5617. .last_disassoc_received = dp_get_last_disassoc_received,
  5618. .last_deauth_received = dp_get_last_deauth_received,
  5619. };
  5620. #endif
  5621. static struct cdp_ops dp_txrx_ops = {
  5622. .cmn_drv_ops = &dp_ops_cmn,
  5623. .ctrl_ops = &dp_ops_ctrl,
  5624. .me_ops = &dp_ops_me,
  5625. .mon_ops = &dp_ops_mon,
  5626. .host_stats_ops = &dp_ops_host_stats,
  5627. .wds_ops = &dp_ops_wds,
  5628. .raw_ops = &dp_ops_raw,
  5629. #ifdef CONFIG_WIN
  5630. .pflow_ops = &dp_ops_pflow,
  5631. #endif /* CONFIG_WIN */
  5632. #ifndef CONFIG_WIN
  5633. .misc_ops = &dp_ops_misc,
  5634. .cfg_ops = &dp_ops_cfg,
  5635. .flowctl_ops = &dp_ops_flowctl,
  5636. .l_flowctl_ops = &dp_ops_l_flowctl,
  5637. #ifdef IPA_OFFLOAD
  5638. .ipa_ops = &dp_ops_ipa,
  5639. #endif
  5640. .bus_ops = &dp_ops_bus,
  5641. .ocb_ops = &dp_ops_ocb,
  5642. .peer_ops = &dp_ops_peer,
  5643. .throttle_ops = &dp_ops_throttle,
  5644. .mob_stats_ops = &dp_ops_mob_stats,
  5645. #endif
  5646. };
  5647. /*
  5648. * dp_soc_set_txrx_ring_map()
  5649. * @dp_soc: DP handler for soc
  5650. *
  5651. * Return: Void
  5652. */
  5653. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  5654. {
  5655. uint32_t i;
  5656. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  5657. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  5658. }
  5659. }
  5660. /*
  5661. * dp_soc_attach_wifi3() - Attach txrx SOC
  5662. * @ctrl_psoc: Opaque SOC handle from control plane
  5663. * @htc_handle: Opaque HTC handle
  5664. * @hif_handle: Opaque HIF handle
  5665. * @qdf_osdev: QDF device
  5666. *
  5667. * Return: DP SOC handle on success, NULL on failure
  5668. */
  5669. /*
  5670. * Local prototype added to temporarily address warning caused by
  5671. * -Wmissing-prototypes. A more correct solution, namely to expose
  5672. * a prototype in an appropriate header file, will come later.
  5673. */
  5674. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  5675. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5676. struct ol_if_ops *ol_ops);
  5677. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  5678. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5679. struct ol_if_ops *ol_ops)
  5680. {
  5681. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  5682. if (!soc) {
  5683. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5684. FL("DP SOC memory allocation failed"));
  5685. goto fail0;
  5686. }
  5687. soc->cdp_soc.ops = &dp_txrx_ops;
  5688. soc->cdp_soc.ol_ops = ol_ops;
  5689. soc->ctrl_psoc = ctrl_psoc;
  5690. soc->osdev = qdf_osdev;
  5691. soc->hif_handle = hif_handle;
  5692. soc->hal_soc = hif_get_hal_handle(hif_handle);
  5693. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  5694. soc->hal_soc, qdf_osdev);
  5695. if (!soc->htt_handle) {
  5696. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5697. FL("HTT attach failed"));
  5698. goto fail1;
  5699. }
  5700. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  5701. if (!soc->wlan_cfg_ctx) {
  5702. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5703. FL("wlan_cfg_soc_attach failed"));
  5704. goto fail2;
  5705. }
  5706. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  5707. soc->cce_disable = false;
  5708. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  5709. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  5710. CDP_CFG_MAX_PEER_ID);
  5711. if (ret != -EINVAL) {
  5712. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  5713. }
  5714. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  5715. CDP_CFG_CCE_DISABLE);
  5716. if (ret)
  5717. soc->cce_disable = true;
  5718. }
  5719. qdf_spinlock_create(&soc->peer_ref_mutex);
  5720. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  5721. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  5722. /* fill the tx/rx cpu ring map*/
  5723. dp_soc_set_txrx_ring_map(soc);
  5724. qdf_spinlock_create(&soc->htt_stats.lock);
  5725. /* initialize work queue for stats processing */
  5726. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  5727. return (void *)soc;
  5728. fail2:
  5729. htt_soc_detach(soc->htt_handle);
  5730. fail1:
  5731. qdf_mem_free(soc);
  5732. fail0:
  5733. return NULL;
  5734. }
  5735. /*
  5736. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  5737. *
  5738. * @soc: handle to DP soc
  5739. * @mac_id: MAC id
  5740. *
  5741. * Return: Return pdev corresponding to MAC
  5742. */
  5743. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5744. {
  5745. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5746. return soc->pdev_list[mac_id];
  5747. /* Typically for MCL as there only 1 PDEV*/
  5748. return soc->pdev_list[0];
  5749. }
  5750. /*
  5751. * dp_get_ring_id_for_mac_id() - Return pdev for mac_id
  5752. *
  5753. * @soc: handle to DP soc
  5754. * @mac_id: MAC id
  5755. *
  5756. * Return: ring id
  5757. */
  5758. int dp_get_ring_id_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5759. {
  5760. /*
  5761. * Single pdev using both MACs will operate on both MAC rings,
  5762. * which is the case for MCL.
  5763. */
  5764. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5765. return mac_id;
  5766. /* For WIN each PDEV will operate one ring, so index is zero. */
  5767. return 0;
  5768. }
  5769. /*
  5770. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  5771. * @soc: DP SoC context
  5772. * @max_mac_rings: No of MAC rings
  5773. *
  5774. * Return: None
  5775. */
  5776. static
  5777. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  5778. int *max_mac_rings)
  5779. {
  5780. bool dbs_enable = false;
  5781. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  5782. dbs_enable = soc->cdp_soc.ol_ops->
  5783. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  5784. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  5785. }
  5786. /*
  5787. * dp_set_pktlog_wifi3() - attach txrx vdev
  5788. * @pdev: Datapath PDEV handle
  5789. * @event: which event's notifications are being subscribed to
  5790. * @enable: WDI event subscribe or not. (True or False)
  5791. *
  5792. * Return: Success, NULL on failure
  5793. */
  5794. #ifdef WDI_EVENT_ENABLE
  5795. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  5796. bool enable)
  5797. {
  5798. struct dp_soc *soc = pdev->soc;
  5799. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5800. int max_mac_rings = wlan_cfg_get_num_mac_rings
  5801. (pdev->wlan_cfg_ctx);
  5802. uint8_t mac_id = 0;
  5803. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  5804. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  5805. FL("Max_mac_rings %d \n"),
  5806. max_mac_rings);
  5807. if (enable) {
  5808. switch (event) {
  5809. case WDI_EVENT_RX_DESC:
  5810. if (pdev->monitor_vdev) {
  5811. /* Nothing needs to be done if monitor mode is
  5812. * enabled
  5813. */
  5814. return 0;
  5815. }
  5816. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  5817. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  5818. htt_tlv_filter.mpdu_start = 1;
  5819. htt_tlv_filter.msdu_start = 1;
  5820. htt_tlv_filter.msdu_end = 1;
  5821. htt_tlv_filter.mpdu_end = 1;
  5822. htt_tlv_filter.packet_header = 1;
  5823. htt_tlv_filter.attention = 1;
  5824. htt_tlv_filter.ppdu_start = 1;
  5825. htt_tlv_filter.ppdu_end = 1;
  5826. htt_tlv_filter.ppdu_end_user_stats = 1;
  5827. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5828. htt_tlv_filter.ppdu_end_status_done = 1;
  5829. htt_tlv_filter.enable_fp = 1;
  5830. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5831. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5832. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5833. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5834. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5835. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5836. for (mac_id = 0; mac_id < max_mac_rings;
  5837. mac_id++) {
  5838. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5839. pdev->pdev_id + mac_id,
  5840. pdev->rxdma_mon_status_ring
  5841. .hal_srng,
  5842. RXDMA_MONITOR_STATUS,
  5843. RX_BUFFER_SIZE,
  5844. &htt_tlv_filter);
  5845. }
  5846. if (soc->reap_timer_init)
  5847. qdf_timer_mod(&soc->mon_reap_timer,
  5848. DP_INTR_POLL_TIMER_MS);
  5849. }
  5850. break;
  5851. case WDI_EVENT_LITE_RX:
  5852. if (pdev->monitor_vdev) {
  5853. /* Nothing needs to be done if monitor mode is
  5854. * enabled
  5855. */
  5856. return 0;
  5857. }
  5858. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  5859. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  5860. htt_tlv_filter.ppdu_start = 1;
  5861. htt_tlv_filter.ppdu_end = 1;
  5862. htt_tlv_filter.ppdu_end_user_stats = 1;
  5863. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5864. htt_tlv_filter.ppdu_end_status_done = 1;
  5865. htt_tlv_filter.mpdu_start = 1;
  5866. htt_tlv_filter.enable_fp = 1;
  5867. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5868. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5869. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5870. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5871. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5872. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5873. for (mac_id = 0; mac_id < max_mac_rings;
  5874. mac_id++) {
  5875. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5876. pdev->pdev_id + mac_id,
  5877. pdev->rxdma_mon_status_ring
  5878. .hal_srng,
  5879. RXDMA_MONITOR_STATUS,
  5880. RX_BUFFER_SIZE_PKTLOG_LITE,
  5881. &htt_tlv_filter);
  5882. }
  5883. if (soc->reap_timer_init)
  5884. qdf_timer_mod(&soc->mon_reap_timer,
  5885. DP_INTR_POLL_TIMER_MS);
  5886. }
  5887. break;
  5888. case WDI_EVENT_LITE_T2H:
  5889. if (pdev->monitor_vdev) {
  5890. /* Nothing needs to be done if monitor mode is
  5891. * enabled
  5892. */
  5893. return 0;
  5894. }
  5895. /* To enable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  5896. * passing value 0xffff. Once these macros will define
  5897. * in htt header file will use proper macros
  5898. */
  5899. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  5900. dp_h2t_cfg_stats_msg_send(pdev, 0xffff,
  5901. pdev->pdev_id + mac_id);
  5902. }
  5903. break;
  5904. default:
  5905. /* Nothing needs to be done for other pktlog types */
  5906. break;
  5907. }
  5908. } else {
  5909. switch (event) {
  5910. case WDI_EVENT_RX_DESC:
  5911. case WDI_EVENT_LITE_RX:
  5912. if (pdev->monitor_vdev) {
  5913. /* Nothing needs to be done if monitor mode is
  5914. * enabled
  5915. */
  5916. return 0;
  5917. }
  5918. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  5919. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  5920. for (mac_id = 0; mac_id < max_mac_rings;
  5921. mac_id++) {
  5922. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5923. pdev->pdev_id + mac_id,
  5924. pdev->rxdma_mon_status_ring
  5925. .hal_srng,
  5926. RXDMA_MONITOR_STATUS,
  5927. RX_BUFFER_SIZE,
  5928. &htt_tlv_filter);
  5929. }
  5930. if (soc->reap_timer_init)
  5931. qdf_timer_stop(&soc->mon_reap_timer);
  5932. }
  5933. break;
  5934. case WDI_EVENT_LITE_T2H:
  5935. if (pdev->monitor_vdev) {
  5936. /* Nothing needs to be done if monitor mode is
  5937. * enabled
  5938. */
  5939. return 0;
  5940. }
  5941. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  5942. * passing value 0. Once these macros will define in htt
  5943. * header file will use proper macros
  5944. */
  5945. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  5946. dp_h2t_cfg_stats_msg_send(pdev, 0,
  5947. pdev->pdev_id + mac_id);
  5948. }
  5949. break;
  5950. default:
  5951. /* Nothing needs to be done for other pktlog types */
  5952. break;
  5953. }
  5954. }
  5955. return 0;
  5956. }
  5957. #endif
  5958. #ifdef CONFIG_MCL
  5959. /*
  5960. * dp_service_mon_rings()- timer to reap monitor rings
  5961. * reqd as we are not getting ppdu end interrupts
  5962. * @arg: SoC Handle
  5963. *
  5964. * Return:
  5965. *
  5966. */
  5967. static void dp_service_mon_rings(void *arg)
  5968. {
  5969. struct dp_soc *soc = (struct dp_soc *) arg;
  5970. int ring = 0, work_done;
  5971. work_done = dp_mon_process(soc, ring, QCA_NAPI_BUDGET);
  5972. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  5973. FL("Reaped %d descs from Monitor rings"), work_done);
  5974. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  5975. }
  5976. #ifndef REMOVE_PKT_LOG
  5977. /**
  5978. * dp_pkt_log_init() - API to initialize packet log
  5979. * @ppdev: physical device handle
  5980. * @scn: HIF context
  5981. *
  5982. * Return: none
  5983. */
  5984. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  5985. {
  5986. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  5987. if (handle->pkt_log_init) {
  5988. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5989. "%s: Packet log not initialized", __func__);
  5990. return;
  5991. }
  5992. pktlog_sethandle(&handle->pl_dev, scn);
  5993. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  5994. if (pktlogmod_init(scn)) {
  5995. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5996. "%s: pktlogmod_init failed", __func__);
  5997. handle->pkt_log_init = false;
  5998. } else {
  5999. handle->pkt_log_init = true;
  6000. }
  6001. }
  6002. /**
  6003. * dp_pkt_log_con_service() - connect packet log service
  6004. * @ppdev: physical device handle
  6005. * @scn: device context
  6006. *
  6007. * Return: none
  6008. */
  6009. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6010. {
  6011. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6012. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6013. pktlog_htc_attach();
  6014. }
  6015. /**
  6016. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6017. * @handle: Pdev handle
  6018. *
  6019. * Return: none
  6020. */
  6021. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6022. {
  6023. void *scn = (void *)handle->soc->hif_handle;
  6024. if (!scn) {
  6025. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6026. "%s: Invalid hif(scn) handle", __func__);
  6027. return;
  6028. }
  6029. pktlogmod_exit(scn);
  6030. handle->pkt_log_init = false;
  6031. }
  6032. #endif
  6033. #else
  6034. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6035. #endif