goodix_brl_fwupdate.c 34 KB

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  1. /*
  2. * Goodix Touchscreen Driver
  3. * Copyright (C) 2020 - 2021 Goodix, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be a reference
  11. * to you, when you are integrating the GOODiX's CTP IC into your system,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. */
  17. #include "goodix_ts_core.h"
  18. #define BUS_TYPE_SPI 1
  19. #define BUS_TYPE_I2C 0
  20. #define GOODIX_BUS_RETRY_TIMES 3
  21. #define FW_HEADER_SIZE_BRA 256
  22. #define FW_HEADER_SIZE 512
  23. #define FW_SUBSYS_INFO_SIZE 10
  24. #define FW_SUBSYS_INFO_OFFSET_BRA 36
  25. #define FW_SUBSYS_INFO_OFFSET 42
  26. #define FW_SUBSYS_MAX_NUM 47
  27. #define ISP_MAX_BUFFERSIZE 4096
  28. #define FW_PID_LEN 8
  29. #define FW_VID_LEN 4
  30. #define FLASH_CMD_LEN 11
  31. #define FW_FILE_CHECKSUM_OFFSET 8
  32. #define CONFIG_DATA_TYPE 4
  33. #define ISP_RAM_ADDR_BRA 0x18400
  34. #define ISP_RAM_ADDR_BRB 0x57000
  35. #define ISP_RAM_ADDR_BRD 0x23800
  36. #define HW_REG_CPU_RUN_FROM 0x10000
  37. #define FLASH_CMD_REG_BRA 0x10400
  38. #define FLASH_CMD_REG_BRB 0x13400
  39. #define FLASH_CMD_REG_BRD 0x12400
  40. #define HW_REG_ISP_BUFFER_BRA 0x10410
  41. #define HW_REG_ISP_BUFFER_BRB 0x13410
  42. #define HW_REG_ISP_BUFFER_BRD 0x12410
  43. #define CONFIG_DATA_ADDR_BRA 0x3E000
  44. #define CONFIG_DATA_ADDR_BRB 0x40000
  45. #define CONFIG_DATA_ADDR_BRD 0x3E000
  46. #define GOODIX_CFG_ID_ADDR_BRA 0x1006E
  47. #define GOODIX_CFG_ID_ADDR_BRB 0x10076
  48. #define GOODIX_CFG_ID_ADDR_BRD 0x10076
  49. #define HOLD_CPU_REG_W 0x0002
  50. #define HOLD_CPU_REG_R 0x2000
  51. #define MISCTL_REG_BRA 0xD807
  52. #define MISCTL_REG_BRB 0xD80B
  53. #define MISCTL_REG_BRD 0xD804
  54. #define ENABLE_MISCTL_BRA 0x08
  55. #define ENABLE_MISCTL_BRB 0x40
  56. #define ENABLE_MISCTL_BRD 0x20700000
  57. #define ESD_KEY_REG 0xCC58
  58. #define WATCH_DOG_REG_BRA 0xCC54
  59. #define WATCH_DOG_REG_BRB 0xD054
  60. #define WATCH_DOG_REG_BRD 0xD040
  61. #define FLASH_CMD_TYPE_READ 0xAA
  62. #define FLASH_CMD_TYPE_WRITE 0xBB
  63. #define FLASH_CMD_ACK_CHK_PASS 0xEE
  64. #define FLASH_CMD_ACK_CHK_ERROR 0x33
  65. #define FLASH_CMD_ACK_IDLE 0x11
  66. #define FLASH_CMD_W_STATUS_CHK_PASS 0x22
  67. #define FLASH_CMD_W_STATUS_CHK_FAIL 0x33
  68. #define FLASH_CMD_W_STATUS_ADDR_ERR 0x44
  69. #define FLASH_CMD_W_STATUS_WRITE_ERR 0x55
  70. #define FLASH_CMD_W_STATUS_WRITE_OK 0xEE
  71. #define CHIP_TYPE_BRA 0x96
  72. #define CHIP_TYPE_BRB 0x97
  73. #define CHIP_TYPE_BRD 0x98
  74. struct update_info_t {
  75. int header_size;
  76. int subsys_info_offset;
  77. u32 isp_ram_reg;
  78. u32 flash_cmd_reg;
  79. u32 isp_buffer_reg;
  80. u32 config_data_reg;
  81. u32 misctl_reg;
  82. u32 watch_dog_reg;
  83. u32 config_id_reg;
  84. u32 enable_misctl_val;
  85. };
  86. /* berlinA update into */
  87. struct update_info_t update_bra = {
  88. FW_HEADER_SIZE_BRA,
  89. FW_SUBSYS_INFO_OFFSET_BRA,
  90. ISP_RAM_ADDR_BRA,
  91. FLASH_CMD_REG_BRA,
  92. HW_REG_ISP_BUFFER_BRA,
  93. CONFIG_DATA_ADDR_BRA,
  94. MISCTL_REG_BRA,
  95. WATCH_DOG_REG_BRA,
  96. GOODIX_CFG_ID_ADDR_BRA,
  97. ENABLE_MISCTL_BRA,
  98. };
  99. /* berlinB update info */
  100. struct update_info_t update_brb = {
  101. FW_HEADER_SIZE,
  102. FW_SUBSYS_INFO_OFFSET,
  103. ISP_RAM_ADDR_BRB,
  104. FLASH_CMD_REG_BRB,
  105. HW_REG_ISP_BUFFER_BRB,
  106. CONFIG_DATA_ADDR_BRB,
  107. MISCTL_REG_BRB,
  108. WATCH_DOG_REG_BRB,
  109. GOODIX_CFG_ID_ADDR_BRB,
  110. ENABLE_MISCTL_BRB,
  111. };
  112. /* berlinD update info */
  113. struct update_info_t update_brd = {
  114. FW_HEADER_SIZE,
  115. FW_SUBSYS_INFO_OFFSET,
  116. ISP_RAM_ADDR_BRD,
  117. FLASH_CMD_REG_BRD,
  118. HW_REG_ISP_BUFFER_BRD,
  119. CONFIG_DATA_ADDR_BRD,
  120. MISCTL_REG_BRD,
  121. WATCH_DOG_REG_BRD,
  122. GOODIX_CFG_ID_ADDR_BRD,
  123. ENABLE_MISCTL_BRD,
  124. };
  125. /**
  126. * fw_subsys_info - subsytem firmware information
  127. * @type: sybsystem type
  128. * @size: firmware size
  129. * @flash_addr: flash address
  130. * @data: firmware data
  131. */
  132. struct fw_subsys_info {
  133. u8 type;
  134. u32 size;
  135. u32 flash_addr;
  136. const u8 *data;
  137. };
  138. /**
  139. * firmware_summary
  140. * @size: fw total length
  141. * @checksum: checksum of fw
  142. * @hw_pid: mask pid string
  143. * @hw_pid: mask vid code
  144. * @fw_pid: fw pid string
  145. * @fw_vid: fw vid code
  146. * @subsys_num: number of fw subsystem
  147. * @chip_type: chip type
  148. * @protocol_ver: firmware packing
  149. * protocol version
  150. * @bus_type: 0 represent I2C, 1 for SPI
  151. * @subsys: sybsystem info
  152. */
  153. #pragma pack(1)
  154. struct firmware_summary {
  155. u32 size;
  156. u32 checksum;
  157. u8 hw_pid[6];
  158. u8 hw_vid[3];
  159. u8 fw_pid[FW_PID_LEN];
  160. u8 fw_vid[FW_VID_LEN];
  161. u8 subsys_num;
  162. u8 chip_type;
  163. u8 protocol_ver;
  164. u8 bus_type;
  165. u8 flash_protect;
  166. // u8 reserved[8];
  167. struct fw_subsys_info subsys[FW_SUBSYS_MAX_NUM];
  168. };
  169. #pragma pack()
  170. /**
  171. * firmware_data - firmware data structure
  172. * @fw_summary: firmware information
  173. * @firmware: firmware data structure
  174. */
  175. struct firmware_data {
  176. struct firmware_summary fw_summary;
  177. const struct firmware *firmware;
  178. struct firmware *fw_sysfs;
  179. };
  180. struct config_data {
  181. u8 *data;
  182. int size;
  183. };
  184. #pragma pack(1)
  185. struct goodix_flash_cmd {
  186. union {
  187. struct {
  188. u8 status;
  189. u8 ack;
  190. u8 len;
  191. u8 cmd;
  192. u8 fw_type;
  193. u16 fw_len;
  194. u32 fw_addr;
  195. //u16 checksum;
  196. };
  197. u8 buf[16];
  198. };
  199. };
  200. #pragma pack()
  201. enum update_status {
  202. UPSTA_NOTWORK = 0,
  203. UPSTA_PREPARING,
  204. UPSTA_UPDATING,
  205. UPSTA_SUCCESS,
  206. UPSTA_FAILED
  207. };
  208. enum compare_status {
  209. COMPARE_EQUAL = 0,
  210. COMPARE_NOCODE,
  211. COMPARE_PIDMISMATCH,
  212. COMPARE_FW_NOTEQUAL,
  213. COMPARE_CFG_NOTEQUAL,
  214. };
  215. /**
  216. * fw_update_ctrl - structure used to control the
  217. * firmware update process
  218. * @initialized: struct init state
  219. * @mode: indicate weather reflash config or not, fw data source,
  220. * and run on block mode or not.
  221. * @status: update status
  222. * @progress: indicate the progress of update
  223. * @fw_data: firmware data
  224. * @fw_name: firmware name
  225. * @attr_fwimage: sysfs bin attrs, for storing fw image
  226. * @fw_data_src: firmware data source form sysfs, request or head file
  227. * @kobj: pointer to the sysfs kobject
  228. */
  229. struct fw_update_ctrl {
  230. struct mutex mutex;
  231. int initialized;
  232. char fw_name[GOODIX_MAX_STR_LABLE_LEN];
  233. int mode;
  234. enum update_status status;
  235. int spend_time;
  236. struct firmware_data fw_data;
  237. struct goodix_ic_config *ic_config;
  238. struct goodix_ts_core *core_data;
  239. struct update_info_t *update_info;
  240. struct bin_attribute attr_fwimage;
  241. struct kobject *kobj;
  242. };
  243. static struct fw_update_ctrl goodix_fw_update_ctrl;
  244. static int goodix_fw_update_reset(int delay)
  245. {
  246. struct goodix_ts_hw_ops *hw_ops;
  247. hw_ops = goodix_fw_update_ctrl.core_data->hw_ops;
  248. return hw_ops->reset(goodix_fw_update_ctrl.core_data, delay);
  249. }
  250. static int get_fw_version_info(struct goodix_fw_version *fw_version)
  251. {
  252. struct goodix_ts_hw_ops *hw_ops =
  253. goodix_fw_update_ctrl.core_data->hw_ops;
  254. return hw_ops->read_version(goodix_fw_update_ctrl.core_data,
  255. fw_version);
  256. }
  257. static int goodix_reg_write(unsigned int addr,
  258. unsigned char *data, unsigned int len)
  259. {
  260. struct goodix_ts_hw_ops *hw_ops =
  261. goodix_fw_update_ctrl.core_data->hw_ops;
  262. return hw_ops->write(goodix_fw_update_ctrl.core_data,
  263. addr, data, len);
  264. }
  265. static int goodix_reg_read(unsigned int addr,
  266. unsigned char *data, unsigned int len)
  267. {
  268. struct goodix_ts_hw_ops *hw_ops =
  269. goodix_fw_update_ctrl.core_data->hw_ops;
  270. return hw_ops->read(goodix_fw_update_ctrl.core_data,
  271. addr, data, len);
  272. }
  273. /**
  274. * goodix_parse_firmware - parse firmware header information
  275. * and subsystem information from firmware data buffer
  276. *
  277. * @fw_data: firmware struct, contains firmware header info
  278. * and firmware data.
  279. * return: 0 - OK, < 0 - error
  280. */
  281. /* sizeof(length) + sizeof(checksum) */
  282. static int goodix_parse_firmware(struct firmware_data *fw_data)
  283. {
  284. const struct firmware *firmware;
  285. struct firmware_summary *fw_summary;
  286. unsigned int i, fw_offset, info_offset;
  287. u32 checksum;
  288. int ic_type =
  289. goodix_fw_update_ctrl.core_data->bus->ic_type;
  290. int subsys_info_offset =
  291. goodix_fw_update_ctrl.update_info->subsys_info_offset;
  292. int header_size =
  293. goodix_fw_update_ctrl.update_info->header_size;
  294. int r = 0;
  295. fw_summary = &fw_data->fw_summary;
  296. /* copy firmware head info */
  297. if (goodix_fw_update_ctrl.mode & UPDATE_MODE_SRC_SYSFS)
  298. firmware = fw_data->fw_sysfs;
  299. else
  300. firmware = fw_data->firmware;
  301. if (firmware->size < subsys_info_offset) {
  302. ts_err("Invalid firmware size:%zu", firmware->size);
  303. r = -EINVAL;
  304. goto err_size;
  305. }
  306. memcpy(fw_summary, firmware->data, sizeof(*fw_summary));
  307. /* check firmware size */
  308. fw_summary->size = le32_to_cpu(fw_summary->size);
  309. if (firmware->size != fw_summary->size + FW_FILE_CHECKSUM_OFFSET) {
  310. ts_err("Bad firmware, size not match, %zu != %d",
  311. firmware->size,
  312. fw_summary->size + FW_FILE_CHECKSUM_OFFSET);
  313. r = -EINVAL;
  314. goto err_size;
  315. }
  316. for (i = FW_FILE_CHECKSUM_OFFSET, checksum = 0;
  317. i < firmware->size; i += 2)
  318. checksum += firmware->data[i] + (firmware->data[i+1] << 8);
  319. /* byte order change, and check */
  320. fw_summary->checksum = le32_to_cpu(fw_summary->checksum);
  321. if (checksum != fw_summary->checksum) {
  322. ts_err("Bad firmware, cheksum error");
  323. r = -EINVAL;
  324. goto err_size;
  325. }
  326. if (fw_summary->subsys_num > FW_SUBSYS_MAX_NUM) {
  327. ts_err("Bad firmware, invalid subsys num: %d",
  328. fw_summary->subsys_num);
  329. r = -EINVAL;
  330. goto err_size;
  331. }
  332. /* parse subsystem info */
  333. fw_offset = header_size;
  334. for (i = 0; i < fw_summary->subsys_num; i++) {
  335. info_offset = subsys_info_offset +
  336. i * FW_SUBSYS_INFO_SIZE;
  337. fw_summary->subsys[i].type = firmware->data[info_offset];
  338. fw_summary->subsys[i].size =
  339. le32_to_cpup((__le32 *)&firmware->data[info_offset + 1]);
  340. fw_summary->subsys[i].flash_addr =
  341. le32_to_cpup((__le32 *)&firmware->data[info_offset + 5]);
  342. if (fw_offset > firmware->size) {
  343. ts_err("Sybsys offset exceed Firmware size");
  344. goto err_size;
  345. }
  346. fw_summary->subsys[i].data = firmware->data + fw_offset;
  347. fw_offset += fw_summary->subsys[i].size;
  348. }
  349. ts_info("Firmware package protocol: V%u", fw_summary->protocol_ver);
  350. ts_info("Firmware PID:GT%s", fw_summary->fw_pid);
  351. ts_info("Firmware VID:%*ph", 4, fw_summary->fw_vid);
  352. ts_info("Firmware chip type:0x%02X", fw_summary->chip_type);
  353. ts_info("Firmware bus type:%s",
  354. (fw_summary->bus_type & BUS_TYPE_SPI) ? "SPI" : "I2C");
  355. ts_info("Firmware size:%u", fw_summary->size);
  356. ts_info("Firmware subsystem num:%u", fw_summary->subsys_num);
  357. for (i = 0; i < fw_summary->subsys_num; i++) {
  358. ts_debug("------------------------------------------");
  359. ts_debug("Index:%d", i);
  360. ts_debug("Subsystem type:%02X", fw_summary->subsys[i].type);
  361. ts_debug("Subsystem size:%u", fw_summary->subsys[i].size);
  362. ts_debug("Subsystem flash_addr:%08X",
  363. fw_summary->subsys[i].flash_addr);
  364. ts_debug("Subsystem Ptr:%p", fw_summary->subsys[i].data);
  365. }
  366. if (fw_summary->chip_type == CHIP_TYPE_BRA &&
  367. ic_type != IC_TYPE_BERLIN_A) {
  368. ts_err("ic type mismatch!");
  369. r = -EINVAL;
  370. } else if (fw_summary->chip_type == CHIP_TYPE_BRB &&
  371. ic_type != IC_TYPE_BERLIN_B) {
  372. ts_err("ic type mismatch!");
  373. r = -EINVAL;
  374. } else if (fw_summary->chip_type == CHIP_TYPE_BRD &&
  375. ic_type != IC_TYPE_BERLIN_D) {
  376. ts_err("ic type mismatch!");
  377. r = -EINVAL;
  378. }
  379. err_size:
  380. return r;
  381. }
  382. /**
  383. * goodix_fw_version_compare - compare the active version with
  384. * firmware file version.
  385. * @fwu_ctrl: firmware information to be compared
  386. * return: 0 equal, < 0 unequal
  387. */
  388. #define GOODIX_NOCODE "NOCODE"
  389. static int goodix_fw_version_compare(struct fw_update_ctrl *fwu_ctrl)
  390. {
  391. int ret = 0;
  392. struct goodix_fw_version fw_version;
  393. struct firmware_summary *fw_summary = &fwu_ctrl->fw_data.fw_summary;
  394. u32 config_id_reg = goodix_fw_update_ctrl.update_info->config_id_reg;
  395. u32 file_cfg_id;
  396. u32 ic_cfg_id;
  397. /* compare fw_version */
  398. ret = get_fw_version_info(&fw_version);
  399. if (ret)
  400. return -EINVAL;
  401. if (!memcmp(fw_version.rom_pid, GOODIX_NOCODE, 6) ||
  402. !memcmp(fw_version.patch_pid, GOODIX_NOCODE, 6)) {
  403. ts_info("there is no code in the chip");
  404. return COMPARE_NOCODE;
  405. }
  406. if (memcmp(fw_version.patch_pid, fw_summary->fw_pid, FW_PID_LEN)) {
  407. ts_err("Product ID mismatch:%s != %s",
  408. fw_version.patch_pid, fw_summary->fw_pid);
  409. return COMPARE_PIDMISMATCH;
  410. }
  411. ret = memcmp(fw_version.patch_vid, fw_summary->fw_vid, FW_VID_LEN);
  412. if (ret) {
  413. ts_info("active firmware version:%*ph", FW_VID_LEN,
  414. fw_version.patch_vid);
  415. ts_info("firmware file version: %*ph", FW_VID_LEN,
  416. fw_summary->fw_vid);
  417. return COMPARE_FW_NOTEQUAL;
  418. }
  419. ts_info("fw_version equal");
  420. /* compare config id */
  421. if (fwu_ctrl->ic_config && fwu_ctrl->ic_config->len > 0) {
  422. file_cfg_id =
  423. goodix_get_file_config_id(fwu_ctrl->ic_config->data);
  424. goodix_reg_read(config_id_reg,
  425. (u8 *)&ic_cfg_id, sizeof(ic_cfg_id));
  426. if (ic_cfg_id != file_cfg_id) {
  427. ts_info("ic_cfg_id:0x%x != file_cfg_id:0x%x",
  428. ic_cfg_id, file_cfg_id);
  429. return COMPARE_CFG_NOTEQUAL;
  430. }
  431. ts_info("config_id equal");
  432. }
  433. return COMPARE_EQUAL;
  434. }
  435. /**
  436. * goodix_reg_write_confirm - write register and confirm the value
  437. * in the register.
  438. * @dev: pointer to touch device
  439. * @addr: register address
  440. * @data: pointer to data buffer
  441. * @len: data length
  442. * return: 0 write success and confirm ok
  443. * < 0 failed
  444. */
  445. static int goodix_reg_write_confirm(unsigned int addr,
  446. unsigned char *data, unsigned int len)
  447. {
  448. u8 *cfm = NULL;
  449. u8 cfm_buf[32];
  450. int r, i;
  451. if (len > sizeof(cfm_buf)) {
  452. cfm = kzalloc(len, GFP_KERNEL);
  453. if (!cfm)
  454. return -ENOMEM;
  455. } else {
  456. cfm = &cfm_buf[0];
  457. }
  458. for (i = 0; i < GOODIX_BUS_RETRY_TIMES; i++) {
  459. r = goodix_reg_write(addr, data, len);
  460. if (r < 0)
  461. goto exit;
  462. r = goodix_reg_read(addr, cfm, len);
  463. if (r < 0)
  464. goto exit;
  465. if (memcmp(data, cfm, len)) {
  466. r = -EINVAL;
  467. continue;
  468. } else {
  469. r = 0;
  470. break;
  471. }
  472. }
  473. exit:
  474. if (cfm != &cfm_buf[0])
  475. kfree(cfm);
  476. return r;
  477. }
  478. /**
  479. * goodix_load_isp - load ISP program to device ram
  480. * @dev: pointer to touch device
  481. * @fw_data: firmware data
  482. * return 0 ok, <0 error
  483. */
  484. static int goodix_load_isp(struct firmware_data *fw_data)
  485. {
  486. struct goodix_fw_version isp_fw_version;
  487. struct fw_subsys_info *fw_isp;
  488. u32 isp_ram_reg = goodix_fw_update_ctrl.update_info->isp_ram_reg;
  489. u8 reg_val[8] = {0x00};
  490. int r;
  491. memset(&isp_fw_version, 0, sizeof(isp_fw_version));
  492. fw_isp = &fw_data->fw_summary.subsys[0];
  493. ts_info("Loading ISP start");
  494. r = goodix_reg_write_confirm(isp_ram_reg,
  495. (u8 *)fw_isp->data, fw_isp->size);
  496. if (r < 0) {
  497. ts_err("Loading ISP error");
  498. return r;
  499. }
  500. ts_info("Success send ISP data");
  501. /* SET BOOT OPTION TO 0X55 */
  502. memset(reg_val, 0x55, 8);
  503. r = goodix_reg_write_confirm(HW_REG_CPU_RUN_FROM, reg_val, 8);
  504. if (r < 0) {
  505. ts_err("Failed set REG_CPU_RUN_FROM flag");
  506. return r;
  507. }
  508. ts_info("Success write [8]0x55 to 0x%x", HW_REG_CPU_RUN_FROM);
  509. if (goodix_fw_update_reset(100))
  510. ts_err("reset abnormal");
  511. /*check isp state */
  512. if (get_fw_version_info(&isp_fw_version)) {
  513. ts_err("failed read isp version");
  514. return -2;
  515. }
  516. if (memcmp(&isp_fw_version.patch_pid[3], "ISP", 3)) {
  517. ts_err("patch id error %c%c%c != %s",
  518. isp_fw_version.patch_pid[3], isp_fw_version.patch_pid[4],
  519. isp_fw_version.patch_pid[5], "ISP");
  520. return -3;
  521. }
  522. ts_info("ISP running successfully");
  523. return 0;
  524. }
  525. /**
  526. * goodix_update_prepare - update prepare, loading ISP program
  527. * and make sure the ISP is running.
  528. * @fwu_ctrl: pointer to fimrware control structure
  529. * return: 0 ok, <0 error
  530. */
  531. static int goodix_update_prepare(struct fw_update_ctrl *fwu_ctrl)
  532. {
  533. u32 misctl_reg = fwu_ctrl->update_info->misctl_reg;
  534. u32 watch_dog_reg = fwu_ctrl->update_info->watch_dog_reg;
  535. u32 enable_misctl_val = fwu_ctrl->update_info->enable_misctl_val;
  536. u8 reg_val[4] = {0};
  537. u8 temp_buf[64] = {0};
  538. int retry = 20;
  539. int r;
  540. /*reset IC*/
  541. ts_info("firmware update, reset");
  542. if (goodix_fw_update_reset(5))
  543. ts_err("reset abnormal");
  544. retry = 100;
  545. /* Hold cpu*/
  546. do {
  547. reg_val[0] = 0x01;
  548. reg_val[1] = 0x00;
  549. r = goodix_reg_write(HOLD_CPU_REG_W, reg_val, 2);
  550. r |= goodix_reg_read(HOLD_CPU_REG_R, &temp_buf[0], 4);
  551. r |= goodix_reg_read(HOLD_CPU_REG_R, &temp_buf[4], 4);
  552. r |= goodix_reg_read(HOLD_CPU_REG_R, &temp_buf[8], 4);
  553. if (!r && !memcmp(&temp_buf[0], &temp_buf[4], 4) &&
  554. !memcmp(&temp_buf[4], &temp_buf[8], 4) &&
  555. !memcmp(&temp_buf[0], &temp_buf[8], 4)) {
  556. break;
  557. }
  558. usleep_range(1000, 1100);
  559. ts_info("retry hold cpu %d", retry);
  560. ts_debug("data:%*ph", 12, temp_buf);
  561. } while (--retry);
  562. if (!retry) {
  563. ts_err("Failed to hold CPU, return =%d", r);
  564. return -1;
  565. }
  566. ts_info("Success hold CPU");
  567. /* enable misctl clock */
  568. if (fwu_ctrl->core_data->bus->ic_type == IC_TYPE_BERLIN_D)
  569. goodix_reg_write(misctl_reg, (u8 *)&enable_misctl_val, 4);
  570. else
  571. goodix_reg_write(misctl_reg, (u8 *)&enable_misctl_val, 1);
  572. ts_info("enbale misctl clock");
  573. if (fwu_ctrl->core_data->bus->ic_type == IC_TYPE_BERLIN_A) {
  574. /* open ESD_KEY */
  575. retry = 20;
  576. do {
  577. reg_val[0] = 0x95;
  578. r = goodix_reg_write(ESD_KEY_REG, reg_val, 1);
  579. r |= goodix_reg_read(ESD_KEY_REG, temp_buf, 1);
  580. if (!r && temp_buf[0] == 0x01)
  581. break;
  582. usleep_range(1000, 1100);
  583. ts_info("retry %d enable esd key, 0x%x",
  584. retry, temp_buf[0]);
  585. } while (--retry);
  586. if (!retry) {
  587. ts_err("Failed to enable esd key, return =%d", r);
  588. return -2;
  589. }
  590. ts_info("success enable esd key");
  591. }
  592. /* disable watch dog */
  593. reg_val[0] = 0x00;
  594. r = goodix_reg_write(watch_dog_reg, reg_val, 1);
  595. ts_info("disable watch dog");
  596. /* load ISP code and run form isp */
  597. r = goodix_load_isp(&fwu_ctrl->fw_data);
  598. if (r < 0)
  599. ts_err("Failed load and run isp");
  600. return r;
  601. }
  602. /* goodix_send_flash_cmd: send command to read or write flash data
  603. * @flash_cmd: command need to send.
  604. */
  605. static int goodix_send_flash_cmd(struct goodix_flash_cmd *flash_cmd)
  606. {
  607. int i, ret, retry;
  608. struct goodix_flash_cmd tmp_cmd;
  609. u32 flash_cmd_reg = goodix_fw_update_ctrl.update_info->flash_cmd_reg;
  610. ts_info("try send flash cmd:%*ph", (int)sizeof(flash_cmd->buf),
  611. flash_cmd->buf);
  612. memset(tmp_cmd.buf, 0, sizeof(tmp_cmd));
  613. ret = goodix_reg_write(flash_cmd_reg,
  614. flash_cmd->buf, sizeof(flash_cmd->buf));
  615. if (ret) {
  616. ts_err("failed send flash cmd %d", ret);
  617. return ret;
  618. }
  619. retry = 5;
  620. for (i = 0; i < retry; i++) {
  621. ret = goodix_reg_read(flash_cmd_reg,
  622. tmp_cmd.buf, sizeof(tmp_cmd.buf));
  623. if (!ret && tmp_cmd.ack == FLASH_CMD_ACK_CHK_PASS)
  624. break;
  625. usleep_range(5000, 5100);
  626. ts_info("flash cmd ack error retry %d, ack 0x%x, ret %d",
  627. i, tmp_cmd.ack, ret);
  628. }
  629. if (tmp_cmd.ack != FLASH_CMD_ACK_CHK_PASS) {
  630. ts_err("flash cmd ack error, ack 0x%x, ret %d",
  631. tmp_cmd.ack, ret);
  632. ts_err("data:%*ph", (int)sizeof(tmp_cmd.buf), tmp_cmd.buf);
  633. return -EINVAL;
  634. }
  635. ts_info("flash cmd ack check pass");
  636. msleep(50);
  637. retry = 20;
  638. for (i = 0; i < retry; i++) {
  639. ret = goodix_reg_read(flash_cmd_reg,
  640. tmp_cmd.buf, sizeof(tmp_cmd.buf));
  641. if (!ret && tmp_cmd.ack == FLASH_CMD_ACK_CHK_PASS &&
  642. tmp_cmd.status == FLASH_CMD_W_STATUS_WRITE_OK) {
  643. ts_info("flash status check pass");
  644. return 0;
  645. }
  646. ts_info("flash cmd status not ready, retry %d, ack 0x%x, status 0x%x, ret %d",
  647. i, tmp_cmd.ack, tmp_cmd.status, ret);
  648. usleep_range(10000, 11000);
  649. }
  650. ts_err("flash cmd status error %d, ack 0x%x, status 0x%x, ret %d",
  651. i, tmp_cmd.ack, tmp_cmd.status, ret);
  652. if (ret) {
  653. ts_info("reason: bus or paltform error");
  654. return -EINVAL;
  655. }
  656. switch (tmp_cmd.status) {
  657. case FLASH_CMD_W_STATUS_CHK_PASS:
  658. ts_err("data check pass, but failed get follow-up results");
  659. return -EFAULT;
  660. case FLASH_CMD_W_STATUS_CHK_FAIL:
  661. ts_err("data check failed, please retry");
  662. return -EAGAIN;
  663. case FLASH_CMD_W_STATUS_ADDR_ERR:
  664. ts_err("flash target addr error, please check");
  665. return -EFAULT;
  666. case FLASH_CMD_W_STATUS_WRITE_ERR:
  667. ts_err("flash data write err, please retry");
  668. return -EAGAIN;
  669. default:
  670. ts_err("unknown status");
  671. return -EFAULT;
  672. }
  673. }
  674. static int goodix_flash_package(u8 subsys_type, u8 *pkg,
  675. u32 flash_addr, u16 pkg_len)
  676. {
  677. int ret, retry;
  678. struct goodix_flash_cmd flash_cmd;
  679. u32 isp_buffer_reg = goodix_fw_update_ctrl.update_info->isp_buffer_reg;
  680. retry = 2;
  681. do {
  682. ret = goodix_reg_write(isp_buffer_reg, pkg, pkg_len);
  683. if (ret < 0) {
  684. ts_err("Failed to write firmware packet");
  685. return ret;
  686. }
  687. flash_cmd.status = 0;
  688. flash_cmd.ack = 0;
  689. flash_cmd.len = FLASH_CMD_LEN;
  690. flash_cmd.cmd = FLASH_CMD_TYPE_WRITE;
  691. flash_cmd.fw_type = subsys_type;
  692. flash_cmd.fw_len = cpu_to_le16(pkg_len);
  693. flash_cmd.fw_addr = cpu_to_le32(flash_addr);
  694. goodix_append_checksum(&(flash_cmd.buf[2]),
  695. 9, CHECKSUM_MODE_U8_LE);
  696. ret = goodix_send_flash_cmd(&flash_cmd);
  697. if (!ret) {
  698. ts_info("success write package to 0x%x, len %d",
  699. flash_addr, pkg_len - 4);
  700. return 0;
  701. }
  702. } while (ret == -EAGAIN && --retry);
  703. return ret;
  704. }
  705. /**
  706. * goodix_flash_subsystem - flash subsystem firmware,
  707. * Main flow of flashing firmware.
  708. * Each firmware subsystem is divided into several
  709. * packets, the max size of packet is limited to
  710. * @{ISP_MAX_BUFFERSIZE}
  711. * @dev: pointer to touch device
  712. * @subsys: subsystem information
  713. * return: 0 ok, < 0 error
  714. */
  715. static int goodix_flash_subsystem(struct fw_subsys_info *subsys)
  716. {
  717. u32 data_size, offset;
  718. u32 total_size;
  719. //TODO: confirm flash addr ,<< 8??
  720. u32 subsys_base_addr = subsys->flash_addr;
  721. u8 *fw_packet = NULL;
  722. int r = 0;
  723. /*
  724. * if bus(i2c/spi) error occued, then exit, we will do
  725. * hardware reset and re-prepare ISP and then retry
  726. * flashing
  727. */
  728. total_size = subsys->size;
  729. fw_packet = kzalloc(ISP_MAX_BUFFERSIZE + 4, GFP_KERNEL);
  730. if (!fw_packet) {
  731. ts_err("Failed alloc memory");
  732. return -EINVAL;
  733. }
  734. offset = 0;
  735. while (total_size > 0) {
  736. data_size = total_size > ISP_MAX_BUFFERSIZE ?
  737. ISP_MAX_BUFFERSIZE : total_size;
  738. ts_info("Flash firmware to %08x,size:%u bytes",
  739. subsys_base_addr + offset, data_size);
  740. memcpy(fw_packet, &subsys->data[offset], data_size);
  741. /* set checksum for package data */
  742. goodix_append_checksum(fw_packet,
  743. data_size, CHECKSUM_MODE_U16_LE);
  744. r = goodix_flash_package(subsys->type, fw_packet,
  745. subsys_base_addr + offset, data_size + 4);
  746. if (r) {
  747. ts_err("failed flash to %08x,size:%u bytes",
  748. subsys_base_addr + offset, data_size);
  749. break;
  750. }
  751. offset += data_size;
  752. total_size -= data_size;
  753. } /* end while */
  754. kfree(fw_packet);
  755. return r;
  756. }
  757. /**
  758. * goodix_flash_firmware - flash firmware
  759. * @dev: pointer to touch device
  760. * @fw_data: firmware data
  761. * return: 0 ok, < 0 error
  762. */
  763. static int goodix_flash_firmware(struct fw_update_ctrl *fw_ctrl)
  764. {
  765. struct firmware_data *fw_data = &fw_ctrl->fw_data;
  766. struct firmware_summary *fw_summary;
  767. struct fw_subsys_info *fw_x;
  768. struct fw_subsys_info subsys_cfg = {0};
  769. u32 config_data_reg = fw_ctrl->update_info->config_data_reg;
  770. int retry = GOODIX_BUS_RETRY_TIMES;
  771. int i, r = 0, fw_num;
  772. /* start from subsystem 1,
  773. * subsystem 0 is the ISP program
  774. */
  775. fw_summary = &fw_data->fw_summary;
  776. fw_num = fw_summary->subsys_num;
  777. /* flash config data first if we have */
  778. if (fw_ctrl->ic_config && fw_ctrl->ic_config->len) {
  779. subsys_cfg.data = fw_ctrl->ic_config->data;
  780. subsys_cfg.size = fw_ctrl->ic_config->len;
  781. subsys_cfg.flash_addr = config_data_reg;
  782. subsys_cfg.type = CONFIG_DATA_TYPE;
  783. r = goodix_flash_subsystem(&subsys_cfg);
  784. if (r) {
  785. ts_err("failed flash config with ISP, %d", r);
  786. return r;
  787. }
  788. ts_info("success flash config with ISP");
  789. }
  790. for (i = 1; i < fw_num && retry;) {
  791. ts_info("--- Start to flash subsystem[%d] ---", i);
  792. fw_x = &fw_summary->subsys[i];
  793. r = goodix_flash_subsystem(fw_x);
  794. if (r == 0) {
  795. ts_info("--- End flash subsystem[%d]: OK ---", i);
  796. i++;
  797. } else if (r == -EAGAIN) {
  798. retry--;
  799. ts_err("--- End flash subsystem%d: Fail, errno:%d, retry:%d ---",
  800. i, r, GOODIX_BUS_RETRY_TIMES - retry);
  801. } else if (r < 0) { /* bus error */
  802. ts_err("--- End flash subsystem%d: Fatal error:%d exit ---",
  803. i, r);
  804. goto exit_flash;
  805. }
  806. }
  807. exit_flash:
  808. return r;
  809. }
  810. /**
  811. * goodix_update_finish - update finished, FREE resource
  812. * and reset flags---
  813. * @fwu_ctrl: pointer to fw_update_ctrl structrue
  814. * return: 0 ok, < 0 error
  815. */
  816. static int goodix_update_finish(struct fw_update_ctrl *fwu_ctrl)
  817. {
  818. int ret;
  819. if (goodix_fw_update_reset(100))
  820. ts_err("reset abnormal");
  821. ret = goodix_fw_version_compare(fwu_ctrl);
  822. if (ret == COMPARE_EQUAL || ret == COMPARE_CFG_NOTEQUAL)
  823. return 0;
  824. return -EINVAL;
  825. }
  826. /**
  827. * goodix_fw_update_proc - firmware update process, the entry of
  828. * firmware update flow
  829. * @fwu_ctrl: firmware control
  830. * return: = 0 update ok, < 0 error or NO_NEED_UPDATE
  831. */
  832. int goodix_fw_update_proc(struct fw_update_ctrl *fwu_ctrl)
  833. {
  834. #define FW_UPDATE_RETRY 2
  835. int retry0 = FW_UPDATE_RETRY;
  836. int retry1 = FW_UPDATE_RETRY;
  837. int ret = 0;
  838. ret = goodix_parse_firmware(&fwu_ctrl->fw_data);
  839. if (ret < 0)
  840. return ret;
  841. if (!(fwu_ctrl->mode & UPDATE_MODE_FORCE)) {
  842. ret = goodix_fw_version_compare(fwu_ctrl);
  843. ts_info("need to upgrade");
  844. }
  845. start_update:
  846. fwu_ctrl->status = UPSTA_PREPARING;
  847. do {
  848. ret = goodix_update_prepare(fwu_ctrl);
  849. if (ret) {
  850. ts_err("failed prepare ISP, retry %d",
  851. FW_UPDATE_RETRY - retry0);
  852. }
  853. } while (ret && --retry0 > 0);
  854. if (ret) {
  855. ts_err("Failed to prepare ISP, exit update:%d", ret);
  856. goto err_fw_prepare;
  857. }
  858. /* progress: 20%~100% */
  859. fwu_ctrl->status = UPSTA_UPDATING;
  860. ret = goodix_flash_firmware(fwu_ctrl);
  861. if (ret < 0 && --retry1 > 0) {
  862. ts_err("Bus error, retry firmware update:%d",
  863. FW_UPDATE_RETRY - retry1);
  864. goto start_update;
  865. }
  866. if (ret)
  867. ts_err("flash fw data enter error, ret:%d", ret);
  868. else
  869. ts_info("flash fw data success, need check version");
  870. err_fw_prepare:
  871. ret = goodix_update_finish(fwu_ctrl);
  872. if (!ret)
  873. ts_info("Firmware update successfully");
  874. else
  875. ts_err("Firmware update failed, ret:%d", ret);
  876. return ret;
  877. }
  878. /*
  879. * goodix_sysfs_update_en_store: start fw update manually
  880. * @buf: '1'[001] update in blocking mode with fwdata from sysfs
  881. * '2'[010] update in blocking mode with fwdata from request
  882. * '5'[101] update in unblocking mode with fwdata from sysfs
  883. * '6'[110] update in unblocking mode with fwdata from request
  884. */
  885. static ssize_t goodix_sysfs_update_en_store(
  886. struct device *dev, struct device_attribute *attr,
  887. const char *buf, size_t count)
  888. {
  889. int ret = 0;
  890. int mode = 0;
  891. struct fw_update_ctrl *fw_ctrl = &goodix_fw_update_ctrl;
  892. if (!buf || count <= 0) {
  893. ts_err("invalid params");
  894. return -EINVAL;
  895. }
  896. if (!fw_ctrl || !fw_ctrl->initialized) {
  897. ts_err("fw module uninit");
  898. return -EINVAL;
  899. }
  900. ts_info("set update mode:0x%x", buf[0]);
  901. if (buf[0] == '1') {
  902. mode = UPDATE_MODE_FORCE | UPDATE_MODE_BLOCK |
  903. UPDATE_MODE_SRC_SYSFS;
  904. } else if (buf[0] == '2') {
  905. mode = UPDATE_MODE_FORCE | UPDATE_MODE_BLOCK |
  906. UPDATE_MODE_SRC_REQUEST;
  907. } else if (buf[0] == '5') {
  908. mode = UPDATE_MODE_FORCE | UPDATE_MODE_SRC_SYSFS;
  909. } else if (buf[0] == '6') {
  910. mode = UPDATE_MODE_FORCE | UPDATE_MODE_SRC_REQUEST;
  911. } else {
  912. ts_err("invalid update mode:0x%x", buf[0]);
  913. return -EINVAL;
  914. }
  915. ret = goodix_do_fw_update(NULL, mode);
  916. if (!ret) {
  917. ts_info("success do update work");
  918. return count;
  919. }
  920. ts_err("failed do fw update work");
  921. return -EINVAL;
  922. }
  923. static ssize_t goodix_sysfs_fwimage_store(struct file *file,
  924. struct kobject *kobj, struct bin_attribute *attr,
  925. char *buf, loff_t pos, size_t count)
  926. {
  927. struct firmware **fw = &goodix_fw_update_ctrl.fw_data.fw_sysfs;
  928. if (*fw == NULL) {
  929. *fw = kzalloc(sizeof(**fw), GFP_KERNEL);
  930. if (*fw == NULL)
  931. return -ENOMEM;
  932. (*fw)->data = vmalloc(GOODIX_FW_MAX_SIEZE);
  933. if ((*fw)->data == NULL) {
  934. kfree(*fw);
  935. *fw = NULL;
  936. return -ENOMEM;
  937. }
  938. }
  939. if (pos + count > GOODIX_FW_MAX_SIEZE)
  940. return -EFAULT;
  941. memcpy((u8 *)&(*fw)->data[pos], buf, count);
  942. (*fw)->size = pos + count;
  943. return count;
  944. }
  945. /* return fw_update result */
  946. static ssize_t goodix_sysfs_result_show(
  947. struct device *dev, struct device_attribute *attr,
  948. char *buf)
  949. {
  950. struct fw_update_ctrl *fw_ctrl = &goodix_fw_update_ctrl;
  951. char str[GOODIX_MAX_STR_LABLE_LEN] = {0};
  952. int r = -EINVAL;
  953. if (!fw_ctrl)
  954. return r;
  955. switch (fw_ctrl->status) {
  956. case UPSTA_PREPARING:
  957. scnprintf(str, ARRAY_SIZE(str), "preparing");
  958. break;
  959. case UPSTA_UPDATING:
  960. scnprintf(str, ARRAY_SIZE(str), "updating");
  961. break;
  962. case UPSTA_SUCCESS:
  963. scnprintf(str, ARRAY_SIZE(str), "success");
  964. break;
  965. case UPSTA_FAILED:
  966. scnprintf(str, ARRAY_SIZE(str), "failed");
  967. break;
  968. case UPSTA_NOTWORK:
  969. default:
  970. scnprintf(str, ARRAY_SIZE(str), "notwork");
  971. break;
  972. }
  973. r = snprintf(buf, PAGE_SIZE, "result:%s spend_time:%dms\n",
  974. str, fw_ctrl->spend_time);
  975. return r;
  976. }
  977. static DEVICE_ATTR(update_en, 0220, NULL, goodix_sysfs_update_en_store);
  978. static DEVICE_ATTR(result, 0664, goodix_sysfs_result_show, NULL);
  979. static struct attribute *goodix_fwu_attrs[] = {
  980. &dev_attr_update_en.attr,
  981. &dev_attr_result.attr
  982. };
  983. static int goodix_fw_sysfs_init(struct goodix_ts_core *core_data,
  984. struct fw_update_ctrl *fw_ctrl)
  985. {
  986. int ret = 0, i;
  987. fw_ctrl->kobj = kobject_create_and_add("fwupdate",
  988. &core_data->pdev->dev.kobj);
  989. if (!fw_ctrl->kobj) {
  990. ts_err("failed create sub dir for fwupdate");
  991. return -EINVAL;
  992. }
  993. for (i = 0; i < ARRAY_SIZE(goodix_fwu_attrs) && !ret; i++)
  994. ret = sysfs_create_file(fw_ctrl->kobj, goodix_fwu_attrs[i]);
  995. if (ret) {
  996. ts_err("failed create fwu sysfs files");
  997. while (--i >= 0)
  998. sysfs_remove_file(fw_ctrl->kobj, goodix_fwu_attrs[i]);
  999. kobject_put(fw_ctrl->kobj);
  1000. return -EINVAL;
  1001. }
  1002. fw_ctrl->attr_fwimage.attr.name = "fwimage";
  1003. fw_ctrl->attr_fwimage.attr.mode = 0664;
  1004. fw_ctrl->attr_fwimage.size = 0;
  1005. fw_ctrl->attr_fwimage.write = goodix_sysfs_fwimage_store;
  1006. ret = sysfs_create_bin_file(fw_ctrl->kobj, &fw_ctrl->attr_fwimage);
  1007. if (ret) {
  1008. ts_err("failed create fwimage bin node, %d", ret);
  1009. for (i = 0; i < ARRAY_SIZE(goodix_fwu_attrs); i++)
  1010. sysfs_remove_file(fw_ctrl->kobj, goodix_fwu_attrs[i]);
  1011. kobject_put(fw_ctrl->kobj);
  1012. }
  1013. return ret;
  1014. }
  1015. static void goodix_fw_sysfs_remove(void)
  1016. {
  1017. struct fw_update_ctrl *fw_ctrl = &goodix_fw_update_ctrl;
  1018. int i;
  1019. sysfs_remove_bin_file(fw_ctrl->kobj, &fw_ctrl->attr_fwimage);
  1020. for (i = 0; i < ARRAY_SIZE(goodix_fwu_attrs); i++)
  1021. sysfs_remove_file(fw_ctrl->kobj,
  1022. goodix_fwu_attrs[i]);
  1023. kobject_put(fw_ctrl->kobj);
  1024. }
  1025. /**
  1026. * goodix_request_firmware - request firmware data from user space
  1027. *
  1028. * @fw_data: firmware struct, contains firmware header info
  1029. * and firmware data pointer.
  1030. * return: 0 - OK, < 0 - error
  1031. */
  1032. static int goodix_request_firmware(struct firmware_data *fw_data,
  1033. const char *name)
  1034. {
  1035. struct fw_update_ctrl *fw_ctrl =
  1036. container_of(fw_data, struct fw_update_ctrl, fw_data);
  1037. struct device *dev = &(fw_ctrl->core_data->pdev->dev);
  1038. int r;
  1039. int retry = GOODIX_RETRY_3;
  1040. ts_info("Request firmware image [%s]", name);
  1041. while (retry--) {
  1042. r = request_firmware(&fw_data->firmware, name, dev);
  1043. if (!r)
  1044. break;
  1045. ts_info("get fw bin retry:[%d]", GOODIX_RETRY_3 - retry);
  1046. msleep(200);
  1047. }
  1048. if (retry < 0) {
  1049. ts_err("Firmware image [%s] not available,errno:%d", name, r);
  1050. return r;
  1051. }
  1052. ts_info("Firmware image [%s] is ready", name);
  1053. return 0;
  1054. }
  1055. /**
  1056. * relase firmware resources
  1057. *
  1058. */
  1059. static inline void goodix_release_firmware(struct firmware_data *fw_data)
  1060. {
  1061. if (fw_data->firmware) {
  1062. release_firmware(fw_data->firmware);
  1063. fw_data->firmware = NULL;
  1064. }
  1065. }
  1066. static int goodix_fw_update_thread(void *data)
  1067. {
  1068. struct fw_update_ctrl *fwu_ctrl = data;
  1069. ktime_t start, end;
  1070. int r = -EINVAL;
  1071. start = ktime_get();
  1072. fwu_ctrl->spend_time = 0;
  1073. fwu_ctrl->status = UPSTA_NOTWORK;
  1074. mutex_lock(&fwu_ctrl->mutex);
  1075. ts_debug("notify update start");
  1076. goodix_ts_blocking_notify(NOTIFY_FWUPDATE_START, NULL);
  1077. if (fwu_ctrl->mode & UPDATE_MODE_SRC_REQUEST) {
  1078. ts_info("Firmware request update starts");
  1079. r = goodix_request_firmware(&fwu_ctrl->fw_data,
  1080. fwu_ctrl->fw_name);
  1081. if (r < 0)
  1082. goto out;
  1083. } else if (fwu_ctrl->mode & UPDATE_MODE_SRC_SYSFS) {
  1084. if (!fwu_ctrl->fw_data.fw_sysfs) {
  1085. ts_err("Invalid firmware from sysfs");
  1086. r = -EINVAL;
  1087. goto out;
  1088. }
  1089. if (fwu_ctrl->fw_data.fw_sysfs->size < 4096) {
  1090. ts_err("Invalid firmware size[%ld] from sysfs",
  1091. fwu_ctrl->fw_data.fw_sysfs->size);
  1092. vfree(fwu_ctrl->fw_data.fw_sysfs->data);
  1093. kfree(fwu_ctrl->fw_data.fw_sysfs);
  1094. fwu_ctrl->fw_data.fw_sysfs = NULL;
  1095. r = -EINVAL;
  1096. goto out;
  1097. }
  1098. } else {
  1099. ts_err("unknown update mode 0x%x", fwu_ctrl->mode);
  1100. r = -EINVAL;
  1101. goto out;
  1102. }
  1103. /* ready to update */
  1104. ts_debug("start update proc");
  1105. r = goodix_fw_update_proc(fwu_ctrl);
  1106. /* clean */
  1107. if (fwu_ctrl->mode & UPDATE_MODE_SRC_SYSFS) {
  1108. vfree(fwu_ctrl->fw_data.fw_sysfs->data);
  1109. kfree(fwu_ctrl->fw_data.fw_sysfs);
  1110. fwu_ctrl->fw_data.fw_sysfs = NULL;
  1111. } else if (fwu_ctrl->mode & UPDATE_MODE_SRC_REQUEST) {
  1112. goodix_release_firmware(&fwu_ctrl->fw_data);
  1113. }
  1114. out:
  1115. fwu_ctrl->mode = UPDATE_MODE_DEFAULT;
  1116. mutex_unlock(&fwu_ctrl->mutex);
  1117. if (r) {
  1118. ts_err("fw update failed, %d", r);
  1119. fwu_ctrl->status = UPSTA_FAILED;
  1120. goodix_ts_blocking_notify(NOTIFY_FWUPDATE_FAILED, NULL);
  1121. } else {
  1122. ts_info("fw update success");
  1123. fwu_ctrl->status = UPSTA_SUCCESS;
  1124. goodix_ts_blocking_notify(NOTIFY_FWUPDATE_SUCCESS, NULL);
  1125. }
  1126. end = ktime_get();
  1127. fwu_ctrl->spend_time = ktime_to_ms(ktime_sub(end, start));
  1128. return r;
  1129. }
  1130. int goodix_do_fw_update(struct goodix_ic_config *ic_config, int mode)
  1131. {
  1132. struct task_struct *fwu_thrd;
  1133. struct fw_update_ctrl *fwu_ctrl = &goodix_fw_update_ctrl;
  1134. int ret;
  1135. if (!fwu_ctrl->initialized) {
  1136. ts_err("fw mode uninit");
  1137. return -EINVAL;
  1138. }
  1139. fwu_ctrl->mode = mode;
  1140. fwu_ctrl->ic_config = ic_config;
  1141. ts_debug("fw update mode 0x%x", mode);
  1142. if (fwu_ctrl->mode & UPDATE_MODE_BLOCK) {
  1143. ret = goodix_fw_update_thread(fwu_ctrl);
  1144. ts_info("fw update return %d", ret);
  1145. return ret;
  1146. }
  1147. /* create and run update thread */
  1148. fwu_thrd = kthread_run(goodix_fw_update_thread,
  1149. fwu_ctrl, "goodix-fwu");
  1150. if (IS_ERR_OR_NULL(fwu_thrd)) {
  1151. ts_err("Failed to create update thread:%ld",
  1152. PTR_ERR(fwu_thrd));
  1153. return -EFAULT;
  1154. }
  1155. ts_info("success create fw update thread");
  1156. return 0;
  1157. }
  1158. int goodix_fw_update_init(struct goodix_ts_core *core_data)
  1159. {
  1160. int ret;
  1161. if (!core_data || !core_data->hw_ops) {
  1162. ts_err("core_data && hw_ops cann't be null");
  1163. return -ENODEV;
  1164. }
  1165. mutex_init(&goodix_fw_update_ctrl.mutex);
  1166. goodix_fw_update_ctrl.core_data = core_data;
  1167. goodix_fw_update_ctrl.mode = 0;
  1168. strlcpy(goodix_fw_update_ctrl.fw_name, core_data->board_data.fw_name,
  1169. sizeof(goodix_fw_update_ctrl.fw_name));
  1170. ret = goodix_fw_sysfs_init(core_data, &goodix_fw_update_ctrl);
  1171. if (ret) {
  1172. ts_err("failed create fwupate sysfs node");
  1173. return ret;
  1174. }
  1175. if (core_data->bus->ic_type == IC_TYPE_BERLIN_A)
  1176. goodix_fw_update_ctrl.update_info = &update_bra;
  1177. else if (core_data->bus->ic_type == IC_TYPE_BERLIN_B)
  1178. goodix_fw_update_ctrl.update_info = &update_brb;
  1179. else
  1180. goodix_fw_update_ctrl.update_info = &update_brd;
  1181. goodix_fw_update_ctrl.initialized = 1;
  1182. return 0;
  1183. }
  1184. void goodix_fw_update_uninit(void)
  1185. {
  1186. if (!goodix_fw_update_ctrl.initialized)
  1187. return;
  1188. mutex_lock(&goodix_fw_update_ctrl.mutex);
  1189. goodix_fw_sysfs_remove();
  1190. goodix_fw_update_ctrl.initialized = 0;
  1191. mutex_unlock(&goodix_fw_update_ctrl.mutex);
  1192. mutex_destroy(&goodix_fw_update_ctrl.mutex);
  1193. }