sde_hw_wb.h 8.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #ifndef _SDE_HW_WB_H
  7. #define _SDE_HW_WB_H
  8. #include "sde_hw_catalog.h"
  9. #include "sde_hw_mdss.h"
  10. #include "sde_hw_top.h"
  11. #include "sde_hw_util.h"
  12. #include "sde_hw_pingpong.h"
  13. #include "sde_hw_vbif.h"
  14. struct sde_hw_wb;
  15. struct sde_hw_wb_cfg {
  16. struct sde_hw_fmt_layout dest;
  17. enum sde_intf_mode intf_mode;
  18. struct sde_rect roi;
  19. struct sde_rect crop;
  20. bool is_secure;
  21. bool rotate_90;
  22. };
  23. /**
  24. * enum CDP preload ahead address size
  25. */
  26. enum {
  27. SDE_WB_CDP_PRELOAD_AHEAD_32,
  28. SDE_WB_CDP_PRELOAD_AHEAD_64
  29. };
  30. /**
  31. * struct sde_hw_wb_cdp_cfg : CDP configuration
  32. * @enable: true to enable CDP
  33. * @ubwc_meta_enable: true to enable ubwc metadata preload
  34. * @tile_amortize_enable: true to enable amortization control for tile format
  35. * @preload_ahead: number of request to preload ahead
  36. * SDE_WB_CDP_PRELOAD_AHEAD_32,
  37. * SDE_WB_CDP_PRELOAD_AHEAD_64
  38. */
  39. struct sde_hw_wb_cdp_cfg {
  40. bool enable;
  41. bool ubwc_meta_enable;
  42. bool tile_amortize_enable;
  43. u32 preload_ahead;
  44. };
  45. /**
  46. * enum sde_hw_wb_qos_mode: enumeration of available QOS modes for WB
  47. * @SDE_WB_QOS_MODE_STATIC: static qos mode same as existing NRT qos mode
  48. * @SDE_WB_QOS_MODE_DYNAMIC: new qos mode to support rotation for real time
  49. */
  50. enum sde_hw_wb_qos_mode {
  51. SDE_WB_QOS_MODE_STATIC,
  52. SDE_WB_QOS_MODE_DYNAMIC,
  53. };
  54. /**
  55. * struct sde_hw_wb_qos_cfg : Writeback pipe QoS configuration
  56. * @danger_lut: LUT for generate danger level based on fill level
  57. * @safe_lut: LUT for generate safe level based on fill level
  58. * @creq_lut: LUT for generate creq level based on fill level
  59. * @bytes_per_clk: WB output bytes per XO clock value used in rotation
  60. * @qos_mode: enum value mapped for selecting WB QOS mode
  61. * @danger_safe_en: enable danger safe generation
  62. */
  63. struct sde_hw_wb_qos_cfg {
  64. u32 danger_lut;
  65. u32 safe_lut;
  66. u64 creq_lut;
  67. u32 bytes_per_clk;
  68. enum sde_hw_wb_qos_mode qos_mode;
  69. bool danger_safe_en;
  70. };
  71. /**
  72. * struct sde_hw_wb_sc_cfg - system cache configuration
  73. * @wr_en: system cache read enable
  74. * @wr_scid: system cache read block id
  75. * @wr_noallocate: system cache read no allocate attribute
  76. * @wr_op_type: system cache read operation type
  77. * @flags: dirty flags to change the configuration
  78. * @type: sys cache type
  79. */
  80. struct sde_hw_wb_sc_cfg {
  81. bool wr_en;
  82. u32 wr_scid;
  83. bool wr_noallocate;
  84. u32 wr_op_type;
  85. u32 flags;
  86. enum sde_sys_cache_type type;
  87. };
  88. /**
  89. *
  90. * struct sde_hw_wb_ops : Interface to the wb Hw driver functions
  91. * Assumption is these functions will be called after clocks are enabled
  92. */
  93. struct sde_hw_wb_ops {
  94. void (*setup_csc_data)(struct sde_hw_wb *ctx,
  95. struct sde_csc_cfg *data);
  96. void (*setup_outaddress)(struct sde_hw_wb *ctx,
  97. struct sde_hw_wb_cfg *wb);
  98. void (*setup_outformat)(struct sde_hw_wb *ctx,
  99. struct sde_hw_wb_cfg *wb);
  100. void (*setup_rotator)(struct sde_hw_wb *ctx,
  101. struct sde_hw_wb_cfg *wb);
  102. void (*setup_dither)(struct sde_hw_wb *ctx,
  103. struct sde_hw_wb_cfg *wb);
  104. void (*setup_cdwn)(struct sde_hw_wb *ctx,
  105. struct sde_hw_wb_cfg *wb);
  106. void (*setup_trafficshaper)(struct sde_hw_wb *ctx,
  107. struct sde_hw_wb_cfg *wb);
  108. void (*setup_roi)(struct sde_hw_wb *ctx,
  109. struct sde_hw_wb_cfg *wb);
  110. void (*setup_crop)(struct sde_hw_wb *ctx,
  111. struct sde_hw_wb_cfg *wb, bool crop);
  112. /**
  113. * setup_qos_lut - setup danger, safe, creq, etc. LUTs
  114. * @ctx: Pointer to pipe context
  115. * @cfg: Pointer to pipe QoS configuration
  116. */
  117. void (*setup_qos_lut)(struct sde_hw_wb *ctx,
  118. struct sde_hw_wb_qos_cfg *cfg);
  119. /**
  120. * setup_cdp - setup CDP
  121. * @ctx: Pointer to pipe context
  122. * @cfg: Pointer to pipe CDP configuration
  123. */
  124. void (*setup_cdp)(struct sde_hw_wb *ctx,
  125. struct sde_hw_wb_cdp_cfg *cfg);
  126. /**
  127. * bind_pingpong_blk - enable/disable the connection with pp
  128. * @ctx: Pointer to wb context
  129. * @enable: enable/disable connection
  130. * @pp: pingpong blk id
  131. */
  132. void (*bind_pingpong_blk)(struct sde_hw_wb *ctx,
  133. bool enable,
  134. const enum sde_pingpong pp);
  135. /**
  136. * bind_dcwb_pp_blk - enable/disable the connection with cwb pp
  137. * @ctx: Pointer to wb context
  138. * @enable: enable/disable connection
  139. * @pp: pingpong blk id
  140. */
  141. void (*bind_dcwb_pp_blk)(struct sde_hw_wb *ctx,
  142. bool enable,
  143. const enum sde_pingpong pp);
  144. /**
  145. * program_cwb_ctrl - program cwb block configp
  146. * @ctx: Pointer to wb context
  147. * @pp_idx: Current CWB block index to poram
  148. * @data_src: Source CWB/PingPong block index
  149. * @dspp_out: Tap dspp output or default LM output
  150. * @enable: enable or disable the CWB path to tap the output
  151. */
  152. void (*program_cwb_ctrl)(struct sde_hw_wb *ctx, const enum sde_cwb cwb,
  153. const enum sde_cwb data_src, bool dspp_out, bool enable);
  154. /**
  155. * program_dcwb_ctrl - program cwb block configp
  156. * @ctx: Pointer to wb context
  157. * @pp_idx: Current CWB block index to poram
  158. * @data_src: Source CWB/PingPong block index
  159. * @tap_location: Tap LM output, dspp output or Demura output
  160. * @enable: enable or disable the CWB path to tap the output
  161. */
  162. void (*program_dcwb_ctrl)(struct sde_hw_wb *ctx, const enum sde_dcwb cwb,
  163. const enum sde_cwb data_src, int tap_location, bool enable);
  164. /**
  165. * setup_sys_cache - setup system cache configuration
  166. * @ctx: Pointer to wb context
  167. * @cfg: Pointer to wb system cache configuration
  168. */
  169. void (*setup_sys_cache)(struct sde_hw_wb *ctx, struct sde_hw_wb_sc_cfg *cfg);
  170. /**
  171. * program_cwb_dither_ctrl - program cwb dither block config
  172. * @ctx: Pointer to wb context
  173. * @dcwb_idx: Current Ping-Pong CWB block index to program
  174. * @cfg: cwb dither data
  175. * @len: the size of cwb dither data
  176. * @enable: enable or disable the cwb dither
  177. */
  178. void (*program_cwb_dither_ctrl)(struct sde_hw_wb *ctx,
  179. const enum sde_dcwb dcwb_idx, void *cfg, size_t len, bool enable);
  180. /**
  181. * get_line_count - get current wb output linecount
  182. * @ctx: Pointer to wb context
  183. */
  184. u32 (*get_line_count)(struct sde_hw_wb *ctx);
  185. /**
  186. * set_prog_line_count - set wb programmable line
  187. * @ctx: Pointer to wb context
  188. * @line_count: programmable line-count value
  189. */
  190. void (*set_prog_line_count)(struct sde_hw_wb *ctx, u32 line_count);
  191. /**
  192. * get_ubwc_error - get ubwc error status
  193. * @ctx: Pointer to wb context
  194. */
  195. u32 (*get_ubwc_error)(struct sde_hw_wb *ctx);
  196. /**
  197. * clear_ubwc_error - clear ubwc error status
  198. * @ctx: Pointer to wb context
  199. */
  200. void (*clear_ubwc_error)(struct sde_hw_wb *ctx);
  201. };
  202. /**
  203. * struct sde_hw_wb : WB driver object
  204. * @base: hardware block base structure
  205. * @hw: block hardware details
  206. * @catalog: back pointer to catalog
  207. * @mdp: pointer to associated mdp portion of the catalog
  208. * @idx: hardware index number within type
  209. * @wb_hw_caps: hardware capabilities
  210. * @ops: function pointers
  211. * @hw_mdp: MDP top level hardware block
  212. * @cwb_hw: CWB control hwio details
  213. * @dcwb_hw: DCWB control hwio details
  214. * @dcwb_pp_hw: DCWB PingPong control hwio details
  215. */
  216. struct sde_hw_wb {
  217. struct sde_hw_blk_reg_map hw;
  218. struct sde_mdss_cfg *catalog;
  219. struct sde_mdp_cfg *mdp;
  220. /* wb path */
  221. int idx;
  222. const struct sde_wb_cfg *caps;
  223. /* ops */
  224. struct sde_hw_wb_ops ops;
  225. struct sde_hw_mdp *hw_mdp;
  226. struct sde_hw_blk_reg_map cwb_hw;
  227. struct sde_hw_blk_reg_map dcwb_hw[MAX_CWB_BLOCKS];
  228. struct sde_hw_pingpong dcwb_pp_hw[DCWB_MAX - DCWB_0];
  229. };
  230. /**
  231. * to_sde_hw_wb - convert base hw object to sde_hw_wb container
  232. * @hw: Pointer to hardware block register map object
  233. * return: Pointer to hardware block container
  234. */
  235. static inline struct sde_hw_wb *to_sde_hw_wb(struct sde_hw_blk_reg_map *hw)
  236. {
  237. return container_of(hw, struct sde_hw_wb, hw);
  238. }
  239. /**
  240. * sde_hw_wb_init(): Initializes and return writeback hw driver object.
  241. * @idx: wb_path index for which driver object is required
  242. * @addr: mapped register io address of MDP
  243. * @m : pointer to mdss catalog data
  244. * @hw_mdp: pointer to mdp top hw driver object
  245. * @clk_client: pointer to vbif clk client info
  246. */
  247. struct sde_hw_blk_reg_map *sde_hw_wb_init(enum sde_wb idx,
  248. void __iomem *addr,
  249. struct sde_mdss_cfg *m,
  250. struct sde_hw_mdp *hw_mdp,
  251. struct sde_vbif_clk_client *clk_client);
  252. /**
  253. * sde_hw_wb_destroy(): Destroy writeback hw driver object.
  254. * @hw: Pointer to hardware block register map object
  255. */
  256. void sde_hw_wb_destroy(struct sde_hw_blk_reg_map *hw);
  257. #endif /*_SDE_HW_WB_H */