main.c 121 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. #define ICNSS_RECOVERY_TIMEOUT 60000
  78. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  79. #define ICNSS_CAL_TIMEOUT 40000
  80. static struct icnss_priv *penv;
  81. static struct work_struct wpss_loader;
  82. static struct work_struct wpss_ssr_work;
  83. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  84. #define ICNSS_EVENT_PENDING 2989
  85. #define ICNSS_EVENT_SYNC BIT(0)
  86. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  87. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  88. ICNSS_EVENT_SYNC)
  89. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  90. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  91. #define SMP2P_GET_MAX_RETRY 4
  92. #define SMP2P_GET_RETRY_DELAY_MS 500
  93. #define RAMDUMP_NUM_DEVICES 256
  94. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  95. #define WLAN_EN_TEMP_THRESHOLD 5000
  96. #define WLAN_EN_DELAY 500
  97. #define ICNSS_RPROC_LEN 10
  98. static DEFINE_IDA(rd_minor_id);
  99. enum icnss_pdr_cause_index {
  100. ICNSS_FW_CRASH,
  101. ICNSS_ROOT_PD_CRASH,
  102. ICNSS_ROOT_PD_SHUTDOWN,
  103. ICNSS_HOST_ERROR,
  104. };
  105. static const char * const icnss_pdr_cause[] = {
  106. [ICNSS_FW_CRASH] = "FW crash",
  107. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  108. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  109. [ICNSS_HOST_ERROR] = "Host error",
  110. };
  111. static void icnss_set_plat_priv(struct icnss_priv *priv)
  112. {
  113. penv = priv;
  114. }
  115. static struct icnss_priv *icnss_get_plat_priv(void)
  116. {
  117. return penv;
  118. }
  119. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  120. {
  121. if (priv && priv->rproc) {
  122. rproc_shutdown(priv->rproc);
  123. rproc_put(priv->rproc);
  124. priv->rproc = NULL;
  125. }
  126. }
  127. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  128. struct kobj_attribute *attr,
  129. const char *buf, size_t count)
  130. {
  131. struct icnss_priv *priv = icnss_get_plat_priv();
  132. if (!priv)
  133. return count;
  134. icnss_pr_dbg("Received shutdown indication");
  135. atomic_set(&priv->is_shutdown, true);
  136. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  137. icnss_wpss_unload(priv);
  138. return count;
  139. }
  140. static struct kobj_attribute icnss_sysfs_attribute =
  141. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  142. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  143. {
  144. if (atomic_inc_return(&priv->pm_count) != 1)
  145. return;
  146. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  147. atomic_read(&priv->pm_count));
  148. pm_stay_awake(&priv->pdev->dev);
  149. priv->stats.pm_stay_awake++;
  150. }
  151. static void icnss_pm_relax(struct icnss_priv *priv)
  152. {
  153. int r = atomic_dec_return(&priv->pm_count);
  154. WARN_ON(r < 0);
  155. if (r != 0)
  156. return;
  157. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  158. atomic_read(&priv->pm_count));
  159. pm_relax(&priv->pdev->dev);
  160. priv->stats.pm_relax++;
  161. }
  162. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  163. {
  164. switch (type) {
  165. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  166. return "SERVER_ARRIVE";
  167. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  168. return "SERVER_EXIT";
  169. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  170. return "FW_READY";
  171. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  172. return "REGISTER_DRIVER";
  173. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  174. return "UNREGISTER_DRIVER";
  175. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  176. return "PD_SERVICE_DOWN";
  177. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  178. return "FW_EARLY_CRASH_IND";
  179. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  180. return "IDLE_SHUTDOWN";
  181. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  182. return "IDLE_RESTART";
  183. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  184. return "FW_INIT_DONE";
  185. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  186. return "QDSS_TRACE_REQ_MEM";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  188. return "QDSS_TRACE_SAVE";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  190. return "QDSS_TRACE_FREE";
  191. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  192. return "M3_DUMP_UPLOAD";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  194. return "QDSS_TRACE_REQ_DATA";
  195. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  196. return "SUBSYS_RESTART_LEVEL";
  197. case ICNSS_DRIVER_EVENT_MAX:
  198. return "EVENT_MAX";
  199. }
  200. return "UNKNOWN";
  201. };
  202. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  203. {
  204. switch (type) {
  205. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  206. return "SOC_WAKE_REQUEST";
  207. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  208. return "SOC_WAKE_RELEASE";
  209. case ICNSS_SOC_WAKE_EVENT_MAX:
  210. return "SOC_EVENT_MAX";
  211. }
  212. return "UNKNOWN";
  213. };
  214. int icnss_driver_event_post(struct icnss_priv *priv,
  215. enum icnss_driver_event_type type,
  216. u32 flags, void *data)
  217. {
  218. struct icnss_driver_event *event;
  219. unsigned long irq_flags;
  220. int gfp = GFP_KERNEL;
  221. int ret = 0;
  222. if (!priv)
  223. return -ENODEV;
  224. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  225. icnss_driver_event_to_str(type), type, current->comm,
  226. flags, priv->state);
  227. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  228. icnss_pr_err("Invalid Event type: %d, can't post", type);
  229. return -EINVAL;
  230. }
  231. if (in_interrupt() || irqs_disabled())
  232. gfp = GFP_ATOMIC;
  233. event = kzalloc(sizeof(*event), gfp);
  234. if (event == NULL)
  235. return -ENOMEM;
  236. icnss_pm_stay_awake(priv);
  237. event->type = type;
  238. event->data = data;
  239. init_completion(&event->complete);
  240. event->ret = ICNSS_EVENT_PENDING;
  241. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  242. spin_lock_irqsave(&priv->event_lock, irq_flags);
  243. list_add_tail(&event->list, &priv->event_list);
  244. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  245. priv->stats.events[type].posted++;
  246. queue_work(priv->event_wq, &priv->event_work);
  247. if (!(flags & ICNSS_EVENT_SYNC))
  248. goto out;
  249. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  250. wait_for_completion(&event->complete);
  251. else
  252. ret = wait_for_completion_interruptible(&event->complete);
  253. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  254. icnss_driver_event_to_str(type), type, priv->state, ret,
  255. event->ret);
  256. spin_lock_irqsave(&priv->event_lock, irq_flags);
  257. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  258. event->sync = false;
  259. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  260. ret = -EINTR;
  261. goto out;
  262. }
  263. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  264. ret = event->ret;
  265. kfree(event);
  266. out:
  267. icnss_pm_relax(priv);
  268. return ret;
  269. }
  270. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  271. enum icnss_soc_wake_event_type type,
  272. u32 flags, void *data)
  273. {
  274. struct icnss_soc_wake_event *event;
  275. unsigned long irq_flags;
  276. int gfp = GFP_KERNEL;
  277. int ret = 0;
  278. if (!priv)
  279. return -ENODEV;
  280. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  281. icnss_soc_wake_event_to_str(type),
  282. type, current->comm, flags, priv->state);
  283. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  284. icnss_pr_err("Invalid Event type: %d, can't post", type);
  285. return -EINVAL;
  286. }
  287. if (in_interrupt() || irqs_disabled())
  288. gfp = GFP_ATOMIC;
  289. event = kzalloc(sizeof(*event), gfp);
  290. if (!event)
  291. return -ENOMEM;
  292. icnss_pm_stay_awake(priv);
  293. event->type = type;
  294. event->data = data;
  295. init_completion(&event->complete);
  296. event->ret = ICNSS_EVENT_PENDING;
  297. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  298. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  299. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  300. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  301. priv->stats.soc_wake_events[type].posted++;
  302. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  303. if (!(flags & ICNSS_EVENT_SYNC))
  304. goto out;
  305. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  306. wait_for_completion(&event->complete);
  307. else
  308. ret = wait_for_completion_interruptible(&event->complete);
  309. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  310. icnss_soc_wake_event_to_str(type),
  311. type, priv->state, ret, event->ret);
  312. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  313. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  314. event->sync = false;
  315. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  316. ret = -EINTR;
  317. goto out;
  318. }
  319. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  320. ret = event->ret;
  321. kfree(event);
  322. out:
  323. icnss_pm_relax(priv);
  324. return ret;
  325. }
  326. bool icnss_is_fw_ready(void)
  327. {
  328. if (!penv)
  329. return false;
  330. else
  331. return test_bit(ICNSS_FW_READY, &penv->state);
  332. }
  333. EXPORT_SYMBOL(icnss_is_fw_ready);
  334. void icnss_block_shutdown(bool status)
  335. {
  336. if (!penv)
  337. return;
  338. if (status) {
  339. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  340. reinit_completion(&penv->unblock_shutdown);
  341. } else {
  342. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  343. complete(&penv->unblock_shutdown);
  344. }
  345. }
  346. EXPORT_SYMBOL(icnss_block_shutdown);
  347. bool icnss_is_fw_down(void)
  348. {
  349. struct icnss_priv *priv = icnss_get_plat_priv();
  350. if (!priv)
  351. return false;
  352. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  353. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  354. test_bit(ICNSS_REJUVENATE, &priv->state);
  355. }
  356. EXPORT_SYMBOL(icnss_is_fw_down);
  357. unsigned long icnss_get_device_config(void)
  358. {
  359. struct icnss_priv *priv = icnss_get_plat_priv();
  360. if (!priv)
  361. return 0;
  362. return priv->device_config;
  363. }
  364. EXPORT_SYMBOL(icnss_get_device_config);
  365. bool icnss_is_rejuvenate(void)
  366. {
  367. if (!penv)
  368. return false;
  369. else
  370. return test_bit(ICNSS_REJUVENATE, &penv->state);
  371. }
  372. EXPORT_SYMBOL(icnss_is_rejuvenate);
  373. bool icnss_is_pdr(void)
  374. {
  375. if (!penv)
  376. return false;
  377. else
  378. return test_bit(ICNSS_PDR, &penv->state);
  379. }
  380. EXPORT_SYMBOL(icnss_is_pdr);
  381. static int icnss_send_smp2p(struct icnss_priv *priv,
  382. enum icnss_smp2p_msg_id msg_id,
  383. enum smp2p_out_entry smp2p_entry)
  384. {
  385. unsigned int value = 0;
  386. int ret;
  387. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  388. return -EINVAL;
  389. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  390. if (msg_id == ICNSS_RESET_MSG) {
  391. priv->smp2p_info[smp2p_entry].seq = 0;
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. 0);
  396. if (ret)
  397. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  398. ret, icnss_smp2p_str[smp2p_entry]);
  399. return ret;
  400. }
  401. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  402. return -ENODEV;
  403. value |= priv->smp2p_info[smp2p_entry].seq++;
  404. value <<= ICNSS_SMEM_SEQ_NO_POS;
  405. value |= msg_id;
  406. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  407. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  408. reinit_completion(&penv->smp2p_soc_wake_wait);
  409. ret = qcom_smem_state_update_bits(
  410. priv->smp2p_info[smp2p_entry].smem_state,
  411. ICNSS_SMEM_VALUE_MASK,
  412. value);
  413. if (ret) {
  414. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  415. icnss_smp2p_str[smp2p_entry]);
  416. } else {
  417. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  418. msg_id == ICNSS_SOC_WAKE_REL) {
  419. if (!wait_for_completion_timeout(
  420. &priv->smp2p_soc_wake_wait,
  421. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  422. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  423. icnss_smp2p_str[smp2p_entry]);
  424. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  425. ICNSS_ASSERT(0);
  426. }
  427. }
  428. }
  429. return ret;
  430. }
  431. bool icnss_is_low_power(void)
  432. {
  433. if (!penv)
  434. return false;
  435. else
  436. return test_bit(ICNSS_LOW_POWER, &penv->state);
  437. }
  438. EXPORT_SYMBOL(icnss_is_low_power);
  439. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  440. {
  441. struct icnss_priv *priv = ctx;
  442. if (priv)
  443. priv->force_err_fatal = true;
  444. icnss_pr_err("Received force error fatal request from FW\n");
  445. return IRQ_HANDLED;
  446. }
  447. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  448. {
  449. struct icnss_priv *priv = ctx;
  450. struct icnss_uevent_fw_down_data fw_down_data = {0};
  451. icnss_pr_err("Received early crash indication from FW\n");
  452. if (priv) {
  453. if (priv->wpss_self_recovery_enabled)
  454. mod_timer(&priv->wpss_ssr_timer,
  455. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  456. set_bit(ICNSS_FW_DOWN, &priv->state);
  457. icnss_ignore_fw_timeout(true);
  458. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  459. clear_bit(ICNSS_FW_READY, &priv->state);
  460. fw_down_data.crashed = true;
  461. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  462. &fw_down_data);
  463. }
  464. }
  465. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  466. 0, NULL);
  467. return IRQ_HANDLED;
  468. }
  469. static void register_fw_error_notifications(struct device *dev)
  470. {
  471. struct icnss_priv *priv = dev_get_drvdata(dev);
  472. struct device_node *dev_node;
  473. int irq = 0, ret = 0;
  474. if (!priv)
  475. return;
  476. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  477. if (!dev_node) {
  478. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  479. return;
  480. }
  481. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  482. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  483. ret = irq = of_irq_get_byname(dev_node,
  484. "qcom,smp2p-force-fatal-error");
  485. if (ret < 0) {
  486. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  487. irq);
  488. return;
  489. }
  490. }
  491. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  492. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  493. "wlanfw-err", priv);
  494. if (ret < 0) {
  495. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  496. irq, ret);
  497. return;
  498. }
  499. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  500. priv->fw_error_fatal_irq = irq;
  501. }
  502. static void register_early_crash_notifications(struct device *dev)
  503. {
  504. struct icnss_priv *priv = dev_get_drvdata(dev);
  505. struct device_node *dev_node;
  506. int irq = 0, ret = 0;
  507. if (!priv)
  508. return;
  509. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  510. if (!dev_node) {
  511. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  512. return;
  513. }
  514. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  515. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  516. ret = irq = of_irq_get_byname(dev_node,
  517. "qcom,smp2p-early-crash-ind");
  518. if (ret < 0) {
  519. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  520. irq);
  521. return;
  522. }
  523. }
  524. ret = devm_request_threaded_irq(dev, irq, NULL,
  525. fw_crash_indication_handler,
  526. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  527. "wlanfw-early-crash-ind", priv);
  528. if (ret < 0) {
  529. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  530. irq, ret);
  531. return;
  532. }
  533. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  534. priv->fw_early_crash_irq = irq;
  535. }
  536. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  537. {
  538. struct thermal_zone_device *thermal_dev;
  539. const char *tsens;
  540. int ret;
  541. ret = of_property_read_string(priv->pdev->dev.of_node,
  542. "tsens",
  543. &tsens);
  544. if (ret)
  545. return ret;
  546. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  547. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  548. if (IS_ERR(thermal_dev)) {
  549. icnss_pr_err("Fail to get thermal zone. ret: %d",
  550. PTR_ERR(thermal_dev));
  551. return PTR_ERR(thermal_dev);
  552. }
  553. ret = thermal_zone_get_temp(thermal_dev, temp);
  554. if (ret)
  555. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  556. return ret;
  557. }
  558. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  559. {
  560. struct icnss_priv *priv = ctx;
  561. if (priv)
  562. complete(&priv->smp2p_soc_wake_wait);
  563. return IRQ_HANDLED;
  564. }
  565. static void register_soc_wake_notif(struct device *dev)
  566. {
  567. struct icnss_priv *priv = dev_get_drvdata(dev);
  568. struct device_node *dev_node;
  569. int irq = 0, ret = 0;
  570. if (!priv)
  571. return;
  572. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  573. if (!dev_node) {
  574. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  575. return;
  576. }
  577. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  578. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  579. ret = irq = of_irq_get_byname(dev_node,
  580. "qcom,smp2p-soc-wake-ack");
  581. if (ret < 0) {
  582. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  583. irq);
  584. return;
  585. }
  586. }
  587. ret = devm_request_threaded_irq(dev, irq, NULL,
  588. fw_soc_wake_ack_handler,
  589. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  590. IRQF_TRIGGER_FALLING,
  591. "wlanfw-soc-wake-ack", priv);
  592. if (ret < 0) {
  593. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  594. irq, ret);
  595. return;
  596. }
  597. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  598. priv->fw_soc_wake_ack_irq = irq;
  599. }
  600. int icnss_call_driver_uevent(struct icnss_priv *priv,
  601. enum icnss_uevent uevent, void *data)
  602. {
  603. struct icnss_uevent_data uevent_data;
  604. if (!priv->ops || !priv->ops->uevent)
  605. return 0;
  606. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  607. priv->state, uevent);
  608. uevent_data.uevent = uevent;
  609. uevent_data.data = data;
  610. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  611. }
  612. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  613. {
  614. int i;
  615. int ret = 0;
  616. ret = icnss_qmi_get_dms_mac(priv);
  617. if (ret == 0 && priv->dms.mac_valid)
  618. goto qmi_send;
  619. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  620. * Thus assert on failure to get MAC from DMS even after retries
  621. */
  622. if (priv->use_nv_mac) {
  623. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  624. if (priv->dms.mac_valid)
  625. break;
  626. ret = icnss_qmi_get_dms_mac(priv);
  627. if (ret != -EAGAIN)
  628. break;
  629. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  630. }
  631. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  632. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  633. ICNSS_ASSERT(0);
  634. return -EINVAL;
  635. }
  636. }
  637. qmi_send:
  638. if (priv->dms.mac_valid)
  639. ret =
  640. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  641. ARRAY_SIZE(priv->dms.mac));
  642. return ret;
  643. }
  644. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  645. enum smp2p_out_entry smp2p_entry)
  646. {
  647. int retry = 0;
  648. int error;
  649. if (priv->smp2p_info[smp2p_entry].smem_state)
  650. return;
  651. retry:
  652. priv->smp2p_info[smp2p_entry].smem_state =
  653. qcom_smem_state_get(&priv->pdev->dev,
  654. icnss_smp2p_str[smp2p_entry],
  655. &priv->smp2p_info[smp2p_entry].smem_bit);
  656. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  657. if (retry++ < SMP2P_GET_MAX_RETRY) {
  658. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  659. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  660. error, icnss_smp2p_str[smp2p_entry]);
  661. msleep(SMP2P_GET_RETRY_DELAY_MS);
  662. goto retry;
  663. }
  664. ICNSS_ASSERT(0);
  665. return;
  666. }
  667. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  668. }
  669. static inline
  670. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  671. {
  672. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  673. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  674. } else {
  675. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  676. }
  677. }
  678. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  679. {
  680. switch (val) {
  681. case WLAN_RF_SLATE:
  682. return WLFW_WLAN_RF_SLATE_V01;
  683. case WLAN_RF_APACHE:
  684. return WLFW_WLAN_RF_APACHE_V01;
  685. default:
  686. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  687. }
  688. }
  689. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  690. void *data)
  691. {
  692. int ret = 0;
  693. int temp = 0;
  694. bool ignore_assert = false;
  695. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  696. if (!priv)
  697. return -ENODEV;
  698. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  699. clear_bit(ICNSS_FW_DOWN, &priv->state);
  700. clear_bit(ICNSS_FW_READY, &priv->state);
  701. icnss_ignore_fw_timeout(false);
  702. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  703. icnss_pr_err("QMI Server already in Connected State\n");
  704. ICNSS_ASSERT(0);
  705. }
  706. ret = icnss_connect_to_fw_server(priv, data);
  707. if (ret)
  708. goto fail;
  709. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  710. if (priv->is_slate_rfa) {
  711. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  712. reinit_completion(&priv->slate_boot_complete);
  713. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  714. priv->state);
  715. wait_for_completion(&priv->slate_boot_complete);
  716. }
  717. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  718. icnss_pr_info("sent wlan boot init command\n");
  719. }
  720. ret = wlfw_ind_register_send_sync_msg(priv);
  721. if (ret < 0) {
  722. if (ret == -EALREADY) {
  723. ret = 0;
  724. goto qmi_registered;
  725. }
  726. ignore_assert = true;
  727. goto fail;
  728. }
  729. if (priv->is_rf_subtype_valid) {
  730. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  731. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  732. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  733. if (ret < 0)
  734. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  735. ret);
  736. } else {
  737. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  738. priv->rf_subtype);
  739. }
  740. }
  741. if (priv->device_id == WCN6750_DEVICE_ID ||
  742. priv->device_id == WCN6450_DEVICE_ID) {
  743. if (!icnss_get_temperature(priv, &temp)) {
  744. icnss_pr_dbg("Temperature: %d\n", temp);
  745. if (temp < WLAN_EN_TEMP_THRESHOLD)
  746. icnss_set_wlan_en_delay(priv);
  747. }
  748. ret = wlfw_host_cap_send_sync(priv);
  749. if (ret < 0)
  750. goto fail;
  751. }
  752. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  753. if (!priv->msa_va) {
  754. icnss_pr_err("Invalid MSA address\n");
  755. ret = -EINVAL;
  756. goto fail;
  757. }
  758. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  759. if (ret < 0) {
  760. ignore_assert = true;
  761. goto fail;
  762. }
  763. ret = wlfw_msa_ready_send_sync_msg(priv);
  764. if (ret < 0) {
  765. ignore_assert = true;
  766. goto fail;
  767. }
  768. }
  769. if (priv->device_id == WCN6450_DEVICE_ID)
  770. icnss_hw_power_off(priv);
  771. ret = wlfw_cap_send_sync_msg(priv);
  772. if (ret < 0) {
  773. ignore_assert = true;
  774. goto fail;
  775. }
  776. ret = icnss_hw_power_on(priv);
  777. if (ret)
  778. goto fail;
  779. if (priv->device_id == WCN6750_DEVICE_ID ||
  780. priv->device_id == WCN6450_DEVICE_ID) {
  781. ret = wlfw_device_info_send_msg(priv);
  782. if (ret < 0) {
  783. ignore_assert = true;
  784. goto device_info_failure;
  785. }
  786. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  787. priv->mem_base_pa,
  788. priv->mem_base_size);
  789. if (!priv->mem_base_va) {
  790. icnss_pr_err("Ioremap failed for bar address\n");
  791. goto device_info_failure;
  792. }
  793. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  794. &priv->mem_base_pa,
  795. priv->mem_base_va);
  796. if (priv->mhi_state_info_pa)
  797. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  798. priv->mhi_state_info_pa,
  799. PAGE_SIZE);
  800. if (!priv->mhi_state_info_va)
  801. icnss_pr_err("Ioremap failed for MHI info address\n");
  802. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  803. &priv->mhi_state_info_pa,
  804. priv->mhi_state_info_va);
  805. }
  806. if (priv->bdf_download_support) {
  807. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  808. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  809. priv->ctrl_params.bdf_type);
  810. if (ret < 0)
  811. goto device_info_failure;
  812. }
  813. if (priv->device_id == WCN6750_DEVICE_ID ||
  814. priv->device_id == WCN6450_DEVICE_ID) {
  815. if (!priv->fw_soc_wake_ack_irq)
  816. register_soc_wake_notif(&priv->pdev->dev);
  817. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  818. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  819. }
  820. if (priv->wpss_supported)
  821. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  822. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  823. if (priv->bdf_download_support) {
  824. ret = wlfw_cal_report_req(priv);
  825. if (ret < 0)
  826. goto device_info_failure;
  827. }
  828. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  829. dynamic_feature_mask);
  830. }
  831. if (!priv->fw_error_fatal_irq)
  832. register_fw_error_notifications(&priv->pdev->dev);
  833. if (!priv->fw_early_crash_irq)
  834. register_early_crash_notifications(&priv->pdev->dev);
  835. if (priv->psf_supported)
  836. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  837. return ret;
  838. device_info_failure:
  839. icnss_hw_power_off(priv);
  840. fail:
  841. ICNSS_ASSERT(ignore_assert);
  842. qmi_registered:
  843. return ret;
  844. }
  845. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  846. {
  847. if (!priv)
  848. return -ENODEV;
  849. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  850. icnss_clear_server(priv);
  851. if (priv->psf_supported)
  852. priv->last_updated_voltage = 0;
  853. return 0;
  854. }
  855. static int icnss_call_driver_probe(struct icnss_priv *priv)
  856. {
  857. int ret = 0;
  858. int probe_cnt = 0;
  859. if (!priv->ops || !priv->ops->probe)
  860. return 0;
  861. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  862. return -EINVAL;
  863. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  864. icnss_hw_power_on(priv);
  865. icnss_block_shutdown(true);
  866. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  867. ret = priv->ops->probe(&priv->pdev->dev);
  868. probe_cnt++;
  869. if (ret != -EPROBE_DEFER)
  870. break;
  871. }
  872. if (ret < 0) {
  873. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  874. ret, priv->state, probe_cnt);
  875. icnss_block_shutdown(false);
  876. goto out;
  877. }
  878. icnss_block_shutdown(false);
  879. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  880. return 0;
  881. out:
  882. icnss_hw_power_off(priv);
  883. return ret;
  884. }
  885. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  886. {
  887. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  888. goto out;
  889. if (!priv->ops || !priv->ops->shutdown)
  890. goto out;
  891. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  892. goto out;
  893. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  894. priv->ops->shutdown(&priv->pdev->dev);
  895. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  896. out:
  897. return 0;
  898. }
  899. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  900. {
  901. int ret = 0;
  902. icnss_pm_relax(priv);
  903. icnss_call_driver_shutdown(priv);
  904. clear_bit(ICNSS_PDR, &priv->state);
  905. clear_bit(ICNSS_REJUVENATE, &priv->state);
  906. clear_bit(ICNSS_PD_RESTART, &priv->state);
  907. clear_bit(ICNSS_LOW_POWER, &priv->state);
  908. priv->early_crash_ind = false;
  909. priv->is_ssr = false;
  910. if (!priv->ops || !priv->ops->reinit)
  911. goto out;
  912. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  913. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  914. priv->state);
  915. goto out;
  916. }
  917. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  918. goto call_probe;
  919. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  920. icnss_hw_power_on(priv);
  921. icnss_block_shutdown(true);
  922. ret = priv->ops->reinit(&priv->pdev->dev);
  923. if (ret < 0) {
  924. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  925. ret, priv->state);
  926. if (!priv->allow_recursive_recovery)
  927. ICNSS_ASSERT(false);
  928. icnss_block_shutdown(false);
  929. goto out_power_off;
  930. }
  931. icnss_block_shutdown(false);
  932. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  933. return 0;
  934. call_probe:
  935. return icnss_call_driver_probe(priv);
  936. out_power_off:
  937. icnss_hw_power_off(priv);
  938. out:
  939. return ret;
  940. }
  941. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  942. {
  943. int ret = 0;
  944. if (!priv)
  945. return -ENODEV;
  946. del_timer(&priv->recovery_timer);
  947. set_bit(ICNSS_FW_READY, &priv->state);
  948. clear_bit(ICNSS_MODE_ON, &priv->state);
  949. atomic_set(&priv->soc_wake_ref_count, 0);
  950. if (priv->device_id == WCN6750_DEVICE_ID ||
  951. priv->device_id == WCN6450_DEVICE_ID)
  952. icnss_free_qdss_mem(priv);
  953. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  954. icnss_hw_power_off(priv);
  955. if (!priv->pdev) {
  956. icnss_pr_err("Device is not ready\n");
  957. ret = -ENODEV;
  958. goto out;
  959. }
  960. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  961. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  962. icnss_pr_info("sent wlan boot complete command\n");
  963. }
  964. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  965. ret = icnss_pd_restart_complete(priv);
  966. } else {
  967. if (priv->wpss_supported)
  968. icnss_setup_dms_mac(priv);
  969. ret = icnss_call_driver_probe(priv);
  970. }
  971. icnss_vreg_unvote(priv);
  972. out:
  973. return ret;
  974. }
  975. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  976. {
  977. int ret = 0;
  978. if (!priv)
  979. return -ENODEV;
  980. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  981. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  982. icnss_pr_info("Failed to download qdss configuration file");
  983. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  984. mod_timer(&priv->recovery_timer,
  985. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  986. ret = wlfw_wlan_mode_send_sync_msg(priv,
  987. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  988. } else {
  989. icnss_driver_event_fw_ready_ind(priv, NULL);
  990. }
  991. return ret;
  992. }
  993. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  994. {
  995. struct platform_device *pdev = priv->pdev;
  996. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  997. int i, j;
  998. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  999. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1000. qdss_mem[i].va =
  1001. dma_alloc_coherent(&pdev->dev,
  1002. qdss_mem[i].size,
  1003. &qdss_mem[i].pa,
  1004. GFP_KERNEL);
  1005. if (!qdss_mem[i].va) {
  1006. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1007. qdss_mem[i].size,
  1008. qdss_mem[i].type, i);
  1009. break;
  1010. }
  1011. }
  1012. }
  1013. /* Best-effort allocation for QDSS trace */
  1014. if (i < priv->qdss_mem_seg_len) {
  1015. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1016. qdss_mem[j].type = 0;
  1017. qdss_mem[j].size = 0;
  1018. }
  1019. priv->qdss_mem_seg_len = i;
  1020. }
  1021. return 0;
  1022. }
  1023. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1024. {
  1025. struct platform_device *pdev = priv->pdev;
  1026. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1027. int i;
  1028. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1029. if (qdss_mem[i].va && qdss_mem[i].size) {
  1030. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1031. &qdss_mem[i].pa, qdss_mem[i].size,
  1032. qdss_mem[i].type);
  1033. dma_free_coherent(&pdev->dev,
  1034. qdss_mem[i].size, qdss_mem[i].va,
  1035. qdss_mem[i].pa);
  1036. qdss_mem[i].va = NULL;
  1037. qdss_mem[i].pa = 0;
  1038. qdss_mem[i].size = 0;
  1039. qdss_mem[i].type = 0;
  1040. }
  1041. }
  1042. priv->qdss_mem_seg_len = 0;
  1043. }
  1044. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1045. {
  1046. int ret = 0;
  1047. ret = icnss_alloc_qdss_mem(priv);
  1048. if (ret < 0)
  1049. return ret;
  1050. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1051. }
  1052. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1053. u64 pa, u32 size, int *seg_id)
  1054. {
  1055. int i = 0;
  1056. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1057. u64 offset = 0;
  1058. void *va = NULL;
  1059. u64 local_pa;
  1060. u32 local_size;
  1061. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1062. local_pa = (u64)qdss_mem[i].pa;
  1063. local_size = (u32)qdss_mem[i].size;
  1064. if (pa == local_pa && size <= local_size) {
  1065. va = qdss_mem[i].va;
  1066. break;
  1067. }
  1068. if (pa > local_pa &&
  1069. pa < local_pa + local_size &&
  1070. pa + size <= local_pa + local_size) {
  1071. offset = pa - local_pa;
  1072. va = qdss_mem[i].va + offset;
  1073. break;
  1074. }
  1075. }
  1076. *seg_id = i;
  1077. return va;
  1078. }
  1079. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1080. void *data)
  1081. {
  1082. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1083. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1084. int ret = 0;
  1085. int i;
  1086. void *va = NULL;
  1087. u64 pa;
  1088. u32 size;
  1089. int seg_id = 0;
  1090. if (!priv->qdss_mem_seg_len) {
  1091. icnss_pr_err("Memory for QDSS trace is not available\n");
  1092. return -ENOMEM;
  1093. }
  1094. if (event_data->mem_seg_len == 0) {
  1095. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1096. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1097. ICNSS_GENL_MSG_TYPE_QDSS,
  1098. event_data->file_name,
  1099. qdss_mem[i].size);
  1100. if (ret < 0) {
  1101. icnss_pr_err("Fail to save QDSS data: %d\n",
  1102. ret);
  1103. break;
  1104. }
  1105. }
  1106. } else {
  1107. for (i = 0; i < event_data->mem_seg_len; i++) {
  1108. pa = event_data->mem_seg[i].addr;
  1109. size = event_data->mem_seg[i].size;
  1110. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1111. size, &seg_id);
  1112. if (!va) {
  1113. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1114. &pa);
  1115. ret = -EINVAL;
  1116. break;
  1117. }
  1118. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1119. event_data->file_name, size);
  1120. if (ret < 0) {
  1121. icnss_pr_err("Fail to save QDSS data: %d\n",
  1122. ret);
  1123. break;
  1124. }
  1125. }
  1126. }
  1127. kfree(data);
  1128. return ret;
  1129. }
  1130. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1131. {
  1132. int dec, c = atomic_read(v);
  1133. do {
  1134. dec = c - 1;
  1135. if (unlikely(dec < 1))
  1136. break;
  1137. } while (!atomic_try_cmpxchg(v, &c, dec));
  1138. return dec;
  1139. }
  1140. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1141. void *data)
  1142. {
  1143. int ret = 0;
  1144. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1145. if (!priv)
  1146. return -ENODEV;
  1147. if (!data)
  1148. return -EINVAL;
  1149. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1150. event_data->total_size);
  1151. kfree(data);
  1152. return ret;
  1153. }
  1154. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1155. {
  1156. int ret = 0;
  1157. if (!priv)
  1158. return -ENODEV;
  1159. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1160. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1161. atomic_read(&priv->soc_wake_ref_count));
  1162. return 0;
  1163. }
  1164. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1165. ICNSS_SMP2P_OUT_SOC_WAKE);
  1166. if (!ret)
  1167. atomic_inc(&priv->soc_wake_ref_count);
  1168. return ret;
  1169. }
  1170. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1171. {
  1172. int ret = 0;
  1173. if (!priv)
  1174. return -ENODEV;
  1175. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1176. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1177. priv->soc_wake_ref_count);
  1178. return 0;
  1179. }
  1180. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1181. ICNSS_SMP2P_OUT_SOC_WAKE);
  1182. return ret;
  1183. }
  1184. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1185. void *data)
  1186. {
  1187. int ret = 0;
  1188. int probe_cnt = 0;
  1189. if (priv->ops)
  1190. return -EEXIST;
  1191. priv->ops = data;
  1192. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1193. set_bit(ICNSS_FW_READY, &priv->state);
  1194. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1195. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1196. priv->state);
  1197. return -ENODEV;
  1198. }
  1199. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1200. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1201. priv->state);
  1202. goto out;
  1203. }
  1204. ret = icnss_hw_power_on(priv);
  1205. if (ret)
  1206. goto out;
  1207. icnss_block_shutdown(true);
  1208. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1209. ret = priv->ops->probe(&priv->pdev->dev);
  1210. probe_cnt++;
  1211. if (ret != -EPROBE_DEFER)
  1212. break;
  1213. }
  1214. if (ret) {
  1215. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1216. ret, priv->state, probe_cnt);
  1217. icnss_block_shutdown(false);
  1218. goto power_off;
  1219. }
  1220. icnss_block_shutdown(false);
  1221. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1222. return 0;
  1223. power_off:
  1224. icnss_hw_power_off(priv);
  1225. out:
  1226. return ret;
  1227. }
  1228. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1229. void *data)
  1230. {
  1231. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1232. priv->ops = NULL;
  1233. goto out;
  1234. }
  1235. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1236. icnss_block_shutdown(true);
  1237. if (priv->ops)
  1238. priv->ops->remove(&priv->pdev->dev);
  1239. icnss_block_shutdown(false);
  1240. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1241. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1242. priv->ops = NULL;
  1243. icnss_hw_power_off(priv);
  1244. out:
  1245. return 0;
  1246. }
  1247. static int icnss_fw_crashed(struct icnss_priv *priv,
  1248. struct icnss_event_pd_service_down_data *event_data)
  1249. {
  1250. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1251. set_bit(ICNSS_PD_RESTART, &priv->state);
  1252. clear_bit(ICNSS_FW_READY, &priv->state);
  1253. icnss_pm_stay_awake(priv);
  1254. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1255. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1256. if (event_data && event_data->fw_rejuvenate)
  1257. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1258. return 0;
  1259. }
  1260. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1261. struct icnss_uevent_hang_data *hang_data)
  1262. {
  1263. if (!priv->hang_event_data_va)
  1264. return -EINVAL;
  1265. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1266. priv->hang_event_data_len,
  1267. GFP_ATOMIC);
  1268. if (!priv->hang_event_data)
  1269. return -ENOMEM;
  1270. // Update the hang event params
  1271. hang_data->hang_event_data = priv->hang_event_data;
  1272. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1273. return 0;
  1274. }
  1275. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1276. {
  1277. struct icnss_uevent_hang_data hang_data = {0};
  1278. int ret = 0xFF;
  1279. if (priv->early_crash_ind) {
  1280. ret = icnss_update_hang_event_data(priv, &hang_data);
  1281. if (ret)
  1282. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1283. }
  1284. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1285. &hang_data);
  1286. if (!ret) {
  1287. kfree(priv->hang_event_data);
  1288. priv->hang_event_data = NULL;
  1289. }
  1290. return 0;
  1291. }
  1292. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1293. void *data)
  1294. {
  1295. struct icnss_event_pd_service_down_data *event_data = data;
  1296. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1297. icnss_ignore_fw_timeout(false);
  1298. goto out;
  1299. }
  1300. if (priv->force_err_fatal)
  1301. ICNSS_ASSERT(0);
  1302. if (priv->device_id == WCN6750_DEVICE_ID ||
  1303. priv->device_id == WCN6450_DEVICE_ID) {
  1304. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1305. ICNSS_SMP2P_OUT_SOC_WAKE);
  1306. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1307. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1308. }
  1309. if (priv->wpss_supported)
  1310. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1311. ICNSS_SMP2P_OUT_POWER_SAVE);
  1312. icnss_send_hang_event_data(priv);
  1313. if (priv->early_crash_ind) {
  1314. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1315. event_data->crashed, priv->state);
  1316. goto out;
  1317. }
  1318. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1319. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1320. event_data->crashed, priv->state);
  1321. if (!priv->allow_recursive_recovery)
  1322. ICNSS_ASSERT(0);
  1323. goto out;
  1324. }
  1325. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1326. icnss_fw_crashed(priv, event_data);
  1327. out:
  1328. kfree(data);
  1329. return 0;
  1330. }
  1331. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1332. void *data)
  1333. {
  1334. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1335. icnss_ignore_fw_timeout(false);
  1336. goto out;
  1337. }
  1338. priv->early_crash_ind = true;
  1339. icnss_fw_crashed(priv, NULL);
  1340. out:
  1341. kfree(data);
  1342. return 0;
  1343. }
  1344. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1345. void *data)
  1346. {
  1347. int ret = 0;
  1348. if (!priv->ops || !priv->ops->idle_shutdown)
  1349. return 0;
  1350. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1351. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1352. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1353. ret = -EBUSY;
  1354. } else {
  1355. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1356. priv->state);
  1357. icnss_block_shutdown(true);
  1358. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1359. icnss_block_shutdown(false);
  1360. }
  1361. return ret;
  1362. }
  1363. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1364. void *data)
  1365. {
  1366. int ret = 0;
  1367. if (!priv->ops || !priv->ops->idle_restart)
  1368. return 0;
  1369. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1370. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1371. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1372. ret = -EBUSY;
  1373. } else {
  1374. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1375. priv->state);
  1376. icnss_block_shutdown(true);
  1377. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1378. icnss_block_shutdown(false);
  1379. }
  1380. return ret;
  1381. }
  1382. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1383. {
  1384. icnss_free_qdss_mem(priv);
  1385. return 0;
  1386. }
  1387. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1388. void *data)
  1389. {
  1390. struct icnss_m3_upload_segments_req_data *event_data = data;
  1391. struct qcom_dump_segment segment;
  1392. int i, status = 0, ret = 0;
  1393. struct list_head head;
  1394. if (!dump_enabled()) {
  1395. icnss_pr_info("Dump collection is not enabled\n");
  1396. return ret;
  1397. }
  1398. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1399. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1400. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1401. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1402. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1403. return ret;
  1404. INIT_LIST_HEAD(&head);
  1405. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1406. memset(&segment, 0, sizeof(segment));
  1407. segment.va = devm_ioremap(&priv->pdev->dev,
  1408. event_data->m3_segment[i].addr,
  1409. event_data->m3_segment[i].size);
  1410. if (!segment.va) {
  1411. icnss_pr_err("Failed to ioremap M3 Dump region");
  1412. ret = -ENOMEM;
  1413. goto send_resp;
  1414. }
  1415. segment.size = event_data->m3_segment[i].size;
  1416. list_add(&segment.node, &head);
  1417. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1418. event_data->m3_segment[i].name);
  1419. switch (event_data->m3_segment[i].type) {
  1420. case QMI_M3_SEGMENT_PHYAREG_V01:
  1421. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1422. break;
  1423. case QMI_M3_SEGMENT_PHYDBG_V01:
  1424. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1425. break;
  1426. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1427. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1428. break;
  1429. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1430. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1431. break;
  1432. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1433. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1434. break;
  1435. default:
  1436. icnss_pr_err("Invalid Segment type: %d",
  1437. event_data->m3_segment[i].type);
  1438. }
  1439. if (ret) {
  1440. status = ret;
  1441. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1442. event_data->m3_segment[i].name, ret);
  1443. }
  1444. list_del(&segment.node);
  1445. }
  1446. send_resp:
  1447. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1448. status);
  1449. return ret;
  1450. }
  1451. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1452. {
  1453. int ret = 0;
  1454. struct icnss_subsys_restart_level_data *event_data = data;
  1455. if (!priv)
  1456. return -ENODEV;
  1457. if (!data)
  1458. return -EINVAL;
  1459. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1460. kfree(data);
  1461. return ret;
  1462. }
  1463. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1464. {
  1465. int ret;
  1466. struct icnss_priv *priv = icnss_get_plat_priv();
  1467. rproc_shutdown(priv->rproc);
  1468. ret = rproc_boot(priv->rproc);
  1469. if (ret) {
  1470. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1471. rproc_put(priv->rproc);
  1472. }
  1473. }
  1474. static void icnss_driver_event_work(struct work_struct *work)
  1475. {
  1476. struct icnss_priv *priv =
  1477. container_of(work, struct icnss_priv, event_work);
  1478. struct icnss_driver_event *event;
  1479. unsigned long flags;
  1480. int ret;
  1481. icnss_pm_stay_awake(priv);
  1482. spin_lock_irqsave(&priv->event_lock, flags);
  1483. while (!list_empty(&priv->event_list)) {
  1484. event = list_first_entry(&priv->event_list,
  1485. struct icnss_driver_event, list);
  1486. list_del(&event->list);
  1487. spin_unlock_irqrestore(&priv->event_lock, flags);
  1488. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1489. icnss_driver_event_to_str(event->type),
  1490. event->sync ? "-sync" : "", event->type,
  1491. priv->state);
  1492. switch (event->type) {
  1493. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1494. ret = icnss_driver_event_server_arrive(priv,
  1495. event->data);
  1496. break;
  1497. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1498. ret = icnss_driver_event_server_exit(priv);
  1499. break;
  1500. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1501. ret = icnss_driver_event_fw_ready_ind(priv,
  1502. event->data);
  1503. break;
  1504. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1505. ret = icnss_driver_event_register_driver(priv,
  1506. event->data);
  1507. break;
  1508. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1509. ret = icnss_driver_event_unregister_driver(priv,
  1510. event->data);
  1511. break;
  1512. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1513. ret = icnss_driver_event_pd_service_down(priv,
  1514. event->data);
  1515. break;
  1516. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1517. ret = icnss_driver_event_early_crash_ind(priv,
  1518. event->data);
  1519. break;
  1520. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1521. ret = icnss_driver_event_idle_shutdown(priv,
  1522. event->data);
  1523. break;
  1524. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1525. ret = icnss_driver_event_idle_restart(priv,
  1526. event->data);
  1527. break;
  1528. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1529. ret = icnss_driver_event_fw_init_done(priv,
  1530. event->data);
  1531. break;
  1532. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1533. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1534. break;
  1535. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1536. ret = icnss_qdss_trace_save_hdlr(priv,
  1537. event->data);
  1538. break;
  1539. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1540. ret = icnss_qdss_trace_free_hdlr(priv);
  1541. break;
  1542. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1543. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1544. break;
  1545. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1546. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1547. event->data);
  1548. break;
  1549. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1550. ret = icnss_subsys_restart_level(priv, event->data);
  1551. break;
  1552. default:
  1553. icnss_pr_err("Invalid Event type: %d", event->type);
  1554. kfree(event);
  1555. continue;
  1556. }
  1557. priv->stats.events[event->type].processed++;
  1558. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1559. icnss_driver_event_to_str(event->type),
  1560. event->sync ? "-sync" : "", event->type, ret,
  1561. priv->state);
  1562. spin_lock_irqsave(&priv->event_lock, flags);
  1563. if (event->sync) {
  1564. event->ret = ret;
  1565. complete(&event->complete);
  1566. continue;
  1567. }
  1568. spin_unlock_irqrestore(&priv->event_lock, flags);
  1569. kfree(event);
  1570. spin_lock_irqsave(&priv->event_lock, flags);
  1571. }
  1572. spin_unlock_irqrestore(&priv->event_lock, flags);
  1573. icnss_pm_relax(priv);
  1574. }
  1575. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1576. {
  1577. struct icnss_priv *priv =
  1578. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1579. struct icnss_soc_wake_event *event;
  1580. unsigned long flags;
  1581. int ret;
  1582. icnss_pm_stay_awake(priv);
  1583. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1584. while (!list_empty(&priv->soc_wake_msg_list)) {
  1585. event = list_first_entry(&priv->soc_wake_msg_list,
  1586. struct icnss_soc_wake_event, list);
  1587. list_del(&event->list);
  1588. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1589. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1590. icnss_soc_wake_event_to_str(event->type),
  1591. event->sync ? "-sync" : "", event->type,
  1592. priv->state);
  1593. switch (event->type) {
  1594. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1595. ret = icnss_event_soc_wake_request(priv,
  1596. event->data);
  1597. break;
  1598. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1599. ret = icnss_event_soc_wake_release(priv,
  1600. event->data);
  1601. break;
  1602. default:
  1603. icnss_pr_err("Invalid Event type: %d", event->type);
  1604. kfree(event);
  1605. continue;
  1606. }
  1607. priv->stats.soc_wake_events[event->type].processed++;
  1608. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1609. icnss_soc_wake_event_to_str(event->type),
  1610. event->sync ? "-sync" : "", event->type, ret,
  1611. priv->state);
  1612. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1613. if (event->sync) {
  1614. event->ret = ret;
  1615. complete(&event->complete);
  1616. continue;
  1617. }
  1618. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1619. kfree(event);
  1620. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1621. }
  1622. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1623. icnss_pm_relax(priv);
  1624. }
  1625. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1626. {
  1627. int ret = 0;
  1628. struct qcom_dump_segment segment;
  1629. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1630. struct list_head head;
  1631. if (!dump_enabled()) {
  1632. icnss_pr_info("Dump collection is not enabled\n");
  1633. return ret;
  1634. }
  1635. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1636. return ret;
  1637. INIT_LIST_HEAD(&head);
  1638. memset(&segment, 0, sizeof(segment));
  1639. segment.va = priv->msa_va;
  1640. segment.size = priv->msa_mem_size;
  1641. list_add(&segment.node, &head);
  1642. if (!msa0_dump_dev->dev) {
  1643. icnss_pr_err("Created Dump Device not found\n");
  1644. return 0;
  1645. }
  1646. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1647. if (ret) {
  1648. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1649. return ret;
  1650. }
  1651. list_del(&segment.node);
  1652. return ret;
  1653. }
  1654. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1655. void *data)
  1656. {
  1657. struct qcom_ssr_notify_data *notif = data;
  1658. int ret = 0;
  1659. if (!notif->crashed) {
  1660. if (atomic_read(&priv->is_shutdown)) {
  1661. atomic_set(&priv->is_shutdown, false);
  1662. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1663. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1664. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1665. clear_bit(ICNSS_FW_READY, &priv->state);
  1666. icnss_driver_event_post(priv,
  1667. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1668. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1669. NULL);
  1670. }
  1671. }
  1672. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1673. if (!wait_for_completion_timeout(
  1674. &priv->unblock_shutdown,
  1675. msecs_to_jiffies(PROBE_TIMEOUT)))
  1676. icnss_pr_err("modem block shutdown timeout\n");
  1677. }
  1678. ret = wlfw_send_modem_shutdown_msg(priv);
  1679. if (ret < 0)
  1680. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1681. ret);
  1682. }
  1683. }
  1684. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1685. {
  1686. switch (code) {
  1687. case QCOM_SSR_BEFORE_POWERUP:
  1688. return "BEFORE_POWERUP";
  1689. case QCOM_SSR_AFTER_POWERUP:
  1690. return "AFTER_POWERUP";
  1691. case QCOM_SSR_BEFORE_SHUTDOWN:
  1692. return "BEFORE_SHUTDOWN";
  1693. case QCOM_SSR_AFTER_SHUTDOWN:
  1694. return "AFTER_SHUTDOWN";
  1695. default:
  1696. return "UNKNOWN";
  1697. }
  1698. };
  1699. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1700. unsigned long code,
  1701. void *data)
  1702. {
  1703. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1704. wpss_early_ssr_nb);
  1705. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1706. icnss_qcom_ssr_notify_state_to_str(code), code);
  1707. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1708. set_bit(ICNSS_FW_DOWN, &priv->state);
  1709. icnss_ignore_fw_timeout(true);
  1710. }
  1711. return NOTIFY_DONE;
  1712. }
  1713. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1714. unsigned long code,
  1715. void *data)
  1716. {
  1717. struct icnss_event_pd_service_down_data *event_data;
  1718. struct qcom_ssr_notify_data *notif = data;
  1719. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1720. wpss_ssr_nb);
  1721. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1722. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1723. icnss_qcom_ssr_notify_state_to_str(code), code);
  1724. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1725. icnss_pr_info("Collecting msa0 segment dump\n");
  1726. icnss_msa0_ramdump(priv);
  1727. goto out;
  1728. }
  1729. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1730. goto out;
  1731. if (priv->wpss_self_recovery_enabled)
  1732. del_timer(&priv->wpss_ssr_timer);
  1733. priv->is_ssr = true;
  1734. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1735. priv->state, notif->crashed);
  1736. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1737. icnss_update_state_send_modem_shutdown(priv, data);
  1738. set_bit(ICNSS_FW_DOWN, &priv->state);
  1739. icnss_ignore_fw_timeout(true);
  1740. if (notif->crashed)
  1741. priv->stats.recovery.root_pd_crash++;
  1742. else
  1743. priv->stats.recovery.root_pd_shutdown++;
  1744. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1745. if (event_data == NULL)
  1746. return notifier_from_errno(-ENOMEM);
  1747. event_data->crashed = notif->crashed;
  1748. fw_down_data.crashed = !!notif->crashed;
  1749. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1750. clear_bit(ICNSS_FW_READY, &priv->state);
  1751. fw_down_data.crashed = !!notif->crashed;
  1752. icnss_call_driver_uevent(priv,
  1753. ICNSS_UEVENT_FW_DOWN,
  1754. &fw_down_data);
  1755. }
  1756. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1757. ICNSS_EVENT_SYNC, event_data);
  1758. if (notif->crashed)
  1759. mod_timer(&priv->recovery_timer,
  1760. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1761. out:
  1762. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1763. return NOTIFY_OK;
  1764. }
  1765. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1766. unsigned long code,
  1767. void *data)
  1768. {
  1769. struct icnss_event_pd_service_down_data *event_data;
  1770. struct qcom_ssr_notify_data *notif = data;
  1771. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1772. modem_ssr_nb);
  1773. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1774. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1775. icnss_qcom_ssr_notify_state_to_str(code), code);
  1776. switch (code) {
  1777. case QCOM_SSR_BEFORE_SHUTDOWN:
  1778. if (!notif->crashed &&
  1779. priv->low_power_support) { /* Hibernate */
  1780. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1781. icnss_driver_event_post(
  1782. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1783. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1784. set_bit(ICNSS_LOW_POWER, &priv->state);
  1785. }
  1786. break;
  1787. case QCOM_SSR_AFTER_SHUTDOWN:
  1788. /* Collect ramdump only when there was a crash. */
  1789. if (notif->crashed) {
  1790. icnss_pr_info("Collecting msa0 segment dump\n");
  1791. icnss_msa0_ramdump(priv);
  1792. }
  1793. goto out;
  1794. default:
  1795. goto out;
  1796. }
  1797. priv->is_ssr = true;
  1798. if (notif->crashed) {
  1799. priv->stats.recovery.root_pd_crash++;
  1800. priv->root_pd_shutdown = false;
  1801. } else {
  1802. priv->stats.recovery.root_pd_shutdown++;
  1803. priv->root_pd_shutdown = true;
  1804. }
  1805. icnss_update_state_send_modem_shutdown(priv, data);
  1806. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1807. set_bit(ICNSS_FW_DOWN, &priv->state);
  1808. icnss_ignore_fw_timeout(true);
  1809. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1810. clear_bit(ICNSS_FW_READY, &priv->state);
  1811. fw_down_data.crashed = !!notif->crashed;
  1812. icnss_call_driver_uevent(priv,
  1813. ICNSS_UEVENT_FW_DOWN,
  1814. &fw_down_data);
  1815. }
  1816. goto out;
  1817. }
  1818. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1819. priv->state, notif->crashed);
  1820. set_bit(ICNSS_FW_DOWN, &priv->state);
  1821. icnss_ignore_fw_timeout(true);
  1822. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1823. if (event_data == NULL)
  1824. return notifier_from_errno(-ENOMEM);
  1825. event_data->crashed = notif->crashed;
  1826. fw_down_data.crashed = !!notif->crashed;
  1827. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1828. clear_bit(ICNSS_FW_READY, &priv->state);
  1829. fw_down_data.crashed = !!notif->crashed;
  1830. icnss_call_driver_uevent(priv,
  1831. ICNSS_UEVENT_FW_DOWN,
  1832. &fw_down_data);
  1833. }
  1834. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1835. ICNSS_EVENT_SYNC, event_data);
  1836. if (notif->crashed)
  1837. mod_timer(&priv->recovery_timer,
  1838. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1839. out:
  1840. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1841. return NOTIFY_OK;
  1842. }
  1843. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1844. {
  1845. int ret = 0;
  1846. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1847. priv->wpss_early_notify_handler =
  1848. qcom_register_early_ssr_notifier("wpss",
  1849. &priv->wpss_early_ssr_nb);
  1850. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1851. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1852. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1853. }
  1854. return ret;
  1855. }
  1856. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1857. {
  1858. int ret = 0;
  1859. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1860. /*
  1861. * Assign priority of icnss wpss notifier callback over IPA
  1862. * modem notifier callback which is 0
  1863. */
  1864. priv->wpss_ssr_nb.priority = 1;
  1865. priv->wpss_notify_handler =
  1866. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1867. if (IS_ERR(priv->wpss_notify_handler)) {
  1868. ret = PTR_ERR(priv->wpss_notify_handler);
  1869. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1870. }
  1871. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1872. return ret;
  1873. }
  1874. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1875. unsigned long code,
  1876. void *data)
  1877. {
  1878. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1879. slate_ssr_nb);
  1880. int ret = 0;
  1881. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1882. if (code == QCOM_SSR_AFTER_POWERUP) {
  1883. set_bit(ICNSS_SLATE_UP, &priv->state);
  1884. complete(&priv->slate_boot_complete);
  1885. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1886. priv->state);
  1887. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1888. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1889. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1890. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1891. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1892. priv->state);
  1893. goto skip_pdr;
  1894. }
  1895. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1896. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1897. if (ret < 0) {
  1898. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1899. ret, priv->state);
  1900. goto skip_pdr;
  1901. }
  1902. }
  1903. skip_pdr:
  1904. return NOTIFY_OK;
  1905. }
  1906. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1907. {
  1908. int ret = 0;
  1909. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1910. priv->slate_notify_handler =
  1911. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1912. if (IS_ERR(priv->slate_notify_handler)) {
  1913. ret = PTR_ERR(priv->slate_notify_handler);
  1914. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1915. }
  1916. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1917. return ret;
  1918. }
  1919. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1920. {
  1921. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1922. return 0;
  1923. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1924. &priv->slate_ssr_nb);
  1925. priv->slate_notify_handler = NULL;
  1926. return 0;
  1927. }
  1928. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1929. {
  1930. int ret = 0;
  1931. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1932. /*
  1933. * Assign priority of icnss modem notifier callback over IPA
  1934. * modem notifier callback which is 0
  1935. */
  1936. priv->modem_ssr_nb.priority = 1;
  1937. priv->modem_notify_handler =
  1938. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1939. if (IS_ERR(priv->modem_notify_handler)) {
  1940. ret = PTR_ERR(priv->modem_notify_handler);
  1941. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1942. }
  1943. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1944. return ret;
  1945. }
  1946. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1947. {
  1948. if (IS_ERR(priv->wpss_early_notify_handler))
  1949. return;
  1950. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1951. &priv->wpss_early_ssr_nb);
  1952. priv->wpss_early_notify_handler = NULL;
  1953. }
  1954. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1955. {
  1956. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1957. return 0;
  1958. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1959. &priv->wpss_ssr_nb);
  1960. priv->wpss_notify_handler = NULL;
  1961. return 0;
  1962. }
  1963. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1964. {
  1965. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1966. return 0;
  1967. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1968. &priv->modem_ssr_nb);
  1969. priv->modem_notify_handler = NULL;
  1970. return 0;
  1971. }
  1972. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1973. {
  1974. struct icnss_priv *priv = priv_cb;
  1975. struct icnss_event_pd_service_down_data *event_data;
  1976. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1977. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1978. if (!priv)
  1979. return;
  1980. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1981. state, priv->state);
  1982. switch (state) {
  1983. case SERVREG_SERVICE_STATE_DOWN:
  1984. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1985. if (!event_data)
  1986. return;
  1987. event_data->crashed = true;
  1988. if (!priv->is_ssr) {
  1989. set_bit(ICNSS_PDR, &penv->state);
  1990. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1991. cause = ICNSS_HOST_ERROR;
  1992. priv->stats.recovery.pdr_host_error++;
  1993. } else {
  1994. cause = ICNSS_FW_CRASH;
  1995. priv->stats.recovery.pdr_fw_crash++;
  1996. }
  1997. } else if (priv->root_pd_shutdown) {
  1998. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1999. event_data->crashed = false;
  2000. }
  2001. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2002. priv->state, icnss_pdr_cause[cause]);
  2003. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2004. set_bit(ICNSS_FW_DOWN, &priv->state);
  2005. icnss_ignore_fw_timeout(true);
  2006. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2007. clear_bit(ICNSS_FW_READY, &priv->state);
  2008. fw_down_data.crashed = event_data->crashed;
  2009. icnss_call_driver_uevent(priv,
  2010. ICNSS_UEVENT_FW_DOWN,
  2011. &fw_down_data);
  2012. }
  2013. }
  2014. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2015. if (event_data->crashed)
  2016. mod_timer(&priv->recovery_timer,
  2017. jiffies +
  2018. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2019. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2020. ICNSS_EVENT_SYNC, event_data);
  2021. break;
  2022. case SERVREG_SERVICE_STATE_UP:
  2023. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2024. break;
  2025. default:
  2026. break;
  2027. }
  2028. return;
  2029. }
  2030. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2031. {
  2032. struct pdr_handle *handle = NULL;
  2033. struct pdr_service *service = NULL;
  2034. int err = 0;
  2035. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2036. if (IS_ERR_OR_NULL(handle)) {
  2037. err = PTR_ERR(handle);
  2038. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2039. goto out;
  2040. }
  2041. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2042. if (IS_ERR_OR_NULL(service)) {
  2043. err = PTR_ERR(service);
  2044. icnss_pr_err("Failed to add lookup, err %d", err);
  2045. goto out;
  2046. }
  2047. priv->pdr_handle = handle;
  2048. priv->pdr_service = service;
  2049. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2050. icnss_pr_info("PDR registration happened");
  2051. out:
  2052. return err;
  2053. }
  2054. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2055. {
  2056. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2057. return;
  2058. pdr_handle_release(priv->pdr_handle);
  2059. }
  2060. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2061. {
  2062. int ret = 0;
  2063. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2064. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2065. ret = PTR_ERR(priv->icnss_ramdump_class);
  2066. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2067. return ret;
  2068. }
  2069. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2070. ICNSS_RAMDUMP_NAME);
  2071. if (ret < 0) {
  2072. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2073. goto fail_alloc_major;
  2074. }
  2075. return 0;
  2076. fail_alloc_major:
  2077. class_destroy(priv->icnss_ramdump_class);
  2078. return ret;
  2079. }
  2080. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2081. {
  2082. int ret = 0;
  2083. struct icnss_ramdump_info *ramdump_info;
  2084. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2085. if (!ramdump_info)
  2086. return ERR_PTR(-ENOMEM);
  2087. if (!dev_name) {
  2088. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2089. return NULL;
  2090. }
  2091. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2092. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2093. if (ramdump_info->minor < 0) {
  2094. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2095. ramdump_info->minor);
  2096. ret = -ENODEV;
  2097. goto fail_out_of_minors;
  2098. }
  2099. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2100. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2101. ramdump_info->minor),
  2102. ramdump_info, ramdump_info->name);
  2103. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2104. ret = PTR_ERR(ramdump_info->dev);
  2105. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2106. ramdump_info->name, ret);
  2107. goto fail_device_create;
  2108. }
  2109. return (void *)ramdump_info;
  2110. fail_device_create:
  2111. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2112. fail_out_of_minors:
  2113. kfree(ramdump_info);
  2114. return ERR_PTR(ret);
  2115. }
  2116. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2117. {
  2118. int ret = 0;
  2119. if (!priv || !priv->pdev) {
  2120. icnss_pr_err("Platform priv or pdev is NULL\n");
  2121. return -EINVAL;
  2122. }
  2123. ret = icnss_ramdump_devnode_init(priv);
  2124. if (ret)
  2125. return ret;
  2126. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2127. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2128. icnss_pr_err("Failed to create msa0 dump device!");
  2129. return -ENOMEM;
  2130. }
  2131. if (priv->device_id == WCN6750_DEVICE_ID ||
  2132. priv->device_id == WCN6450_DEVICE_ID) {
  2133. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2134. ICNSS_M3_SEGMENT(
  2135. ICNSS_M3_SEGMENT_PHYAREG));
  2136. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2137. !priv->m3_dump_phyareg->dev) {
  2138. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2139. return -ENOMEM;
  2140. }
  2141. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2142. ICNSS_M3_SEGMENT(
  2143. ICNSS_M3_SEGMENT_PHYA));
  2144. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2145. !priv->m3_dump_phydbg->dev) {
  2146. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2147. return -ENOMEM;
  2148. }
  2149. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2150. ICNSS_M3_SEGMENT(
  2151. ICNSS_M3_SEGMENT_WMACREG));
  2152. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2153. !priv->m3_dump_wmac0reg->dev) {
  2154. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2155. return -ENOMEM;
  2156. }
  2157. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2158. ICNSS_M3_SEGMENT(
  2159. ICNSS_M3_SEGMENT_WCSSDBG));
  2160. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2161. !priv->m3_dump_wcssdbg->dev) {
  2162. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2163. return -ENOMEM;
  2164. }
  2165. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2166. ICNSS_M3_SEGMENT(
  2167. ICNSS_M3_SEGMENT_PHYAM3));
  2168. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2169. !priv->m3_dump_phyapdmem->dev) {
  2170. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2171. return -ENOMEM;
  2172. }
  2173. }
  2174. return 0;
  2175. }
  2176. static int icnss_enable_recovery(struct icnss_priv *priv)
  2177. {
  2178. int ret;
  2179. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2180. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2181. return 0;
  2182. }
  2183. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2184. icnss_pr_dbg("SSR disabled through module parameter\n");
  2185. goto enable_pdr;
  2186. }
  2187. ret = icnss_register_ramdump_devices(priv);
  2188. if (ret)
  2189. return ret;
  2190. if (priv->wpss_supported) {
  2191. icnss_wpss_early_ssr_register_notifier(priv);
  2192. icnss_wpss_ssr_register_notifier(priv);
  2193. return 0;
  2194. }
  2195. icnss_modem_ssr_register_notifier(priv);
  2196. if (priv->is_slate_rfa)
  2197. icnss_slate_ssr_register_notifier(priv);
  2198. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2199. icnss_pr_dbg("PDR disabled through module parameter\n");
  2200. return 0;
  2201. }
  2202. enable_pdr:
  2203. ret = icnss_pd_restart_enable(priv);
  2204. if (ret)
  2205. return ret;
  2206. return 0;
  2207. }
  2208. static int icnss_dev_id_match(struct icnss_priv *priv,
  2209. struct device_info *dev_info)
  2210. {
  2211. while (dev_info->device_id) {
  2212. if (priv->device_id == dev_info->device_id)
  2213. return 1;
  2214. dev_info++;
  2215. }
  2216. return 0;
  2217. }
  2218. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2219. unsigned long *thermal_state)
  2220. {
  2221. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2222. *thermal_state = icnss_tcdev->max_thermal_state;
  2223. return 0;
  2224. }
  2225. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2226. unsigned long *thermal_state)
  2227. {
  2228. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2229. *thermal_state = icnss_tcdev->curr_thermal_state;
  2230. return 0;
  2231. }
  2232. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2233. unsigned long thermal_state)
  2234. {
  2235. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2236. struct device *dev = &penv->pdev->dev;
  2237. int ret = 0;
  2238. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2239. return 0;
  2240. if (thermal_state > icnss_tcdev->max_thermal_state)
  2241. return -EINVAL;
  2242. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2243. thermal_state, icnss_tcdev->tcdev_id);
  2244. mutex_lock(&penv->tcdev_lock);
  2245. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2246. icnss_tcdev->tcdev_id);
  2247. if (!ret)
  2248. icnss_tcdev->curr_thermal_state = thermal_state;
  2249. mutex_unlock(&penv->tcdev_lock);
  2250. if (ret) {
  2251. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2252. ret, icnss_tcdev->tcdev_id);
  2253. return ret;
  2254. }
  2255. return 0;
  2256. }
  2257. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2258. .get_max_state = icnss_tcdev_get_max_state,
  2259. .get_cur_state = icnss_tcdev_get_cur_state,
  2260. .set_cur_state = icnss_tcdev_set_cur_state,
  2261. };
  2262. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2263. int tcdev_id)
  2264. {
  2265. struct icnss_priv *priv = dev_get_drvdata(dev);
  2266. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2267. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2268. struct device_node *dev_node;
  2269. int ret = 0;
  2270. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2271. if (!icnss_tcdev)
  2272. return -ENOMEM;
  2273. icnss_tcdev->tcdev_id = tcdev_id;
  2274. icnss_tcdev->max_thermal_state = max_state;
  2275. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2276. "qcom,icnss_cdev%d", tcdev_id);
  2277. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2278. if (!dev_node) {
  2279. icnss_pr_err("Failed to get cooling device node\n");
  2280. return -EINVAL;
  2281. }
  2282. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2283. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2284. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2285. dev_node,
  2286. cdev_node_name, icnss_tcdev,
  2287. &icnss_cooling_ops);
  2288. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2289. ret = PTR_ERR(icnss_tcdev->tcdev);
  2290. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2291. ret, icnss_tcdev->tcdev_id);
  2292. } else {
  2293. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2294. icnss_tcdev->tcdev_id);
  2295. list_add(&icnss_tcdev->tcdev_list,
  2296. &priv->icnss_tcdev_list);
  2297. }
  2298. } else {
  2299. icnss_pr_dbg("Cooling device registration not supported");
  2300. ret = -EOPNOTSUPP;
  2301. }
  2302. return ret;
  2303. }
  2304. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2305. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2306. {
  2307. struct icnss_priv *priv = dev_get_drvdata(dev);
  2308. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2309. while (!list_empty(&priv->icnss_tcdev_list)) {
  2310. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2311. struct icnss_thermal_cdev,
  2312. tcdev_list);
  2313. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2314. list_del(&icnss_tcdev->tcdev_list);
  2315. kfree(icnss_tcdev);
  2316. }
  2317. }
  2318. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2319. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2320. unsigned long *thermal_state,
  2321. int tcdev_id)
  2322. {
  2323. struct icnss_priv *priv = dev_get_drvdata(dev);
  2324. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2325. mutex_lock(&priv->tcdev_lock);
  2326. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2327. if (icnss_tcdev->tcdev_id != tcdev_id)
  2328. continue;
  2329. *thermal_state = icnss_tcdev->curr_thermal_state;
  2330. mutex_unlock(&priv->tcdev_lock);
  2331. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2332. icnss_tcdev->curr_thermal_state, tcdev_id);
  2333. return 0;
  2334. }
  2335. mutex_unlock(&priv->tcdev_lock);
  2336. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2337. return -EINVAL;
  2338. }
  2339. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2340. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2341. int cmd_len, void *cb_ctx,
  2342. int (*cb)(void *ctx, void *event, int event_len))
  2343. {
  2344. struct icnss_priv *priv = icnss_get_plat_priv();
  2345. int ret;
  2346. if (!priv)
  2347. return -ENODEV;
  2348. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2349. return -EINVAL;
  2350. priv->get_info_cb = cb;
  2351. priv->get_info_cb_ctx = cb_ctx;
  2352. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2353. if (ret) {
  2354. priv->get_info_cb = NULL;
  2355. priv->get_info_cb_ctx = NULL;
  2356. }
  2357. return ret;
  2358. }
  2359. EXPORT_SYMBOL(icnss_qmi_send);
  2360. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2361. struct module *owner, const char *mod_name)
  2362. {
  2363. int ret = 0;
  2364. struct icnss_priv *priv = icnss_get_plat_priv();
  2365. if (!priv || !priv->pdev) {
  2366. ret = -ENODEV;
  2367. goto out;
  2368. }
  2369. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2370. if (priv->ops) {
  2371. icnss_pr_err("Driver already registered\n");
  2372. ret = -EEXIST;
  2373. goto out;
  2374. }
  2375. if (!ops->dev_info) {
  2376. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2377. return -EINVAL;
  2378. }
  2379. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2380. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2381. ops->dev_info->name);
  2382. return -ENODEV;
  2383. }
  2384. if (!ops->probe || !ops->remove) {
  2385. ret = -EINVAL;
  2386. goto out;
  2387. }
  2388. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2389. 0, ops);
  2390. if (ret == -EINTR)
  2391. ret = 0;
  2392. out:
  2393. return ret;
  2394. }
  2395. EXPORT_SYMBOL(__icnss_register_driver);
  2396. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2397. {
  2398. int ret;
  2399. struct icnss_priv *priv = icnss_get_plat_priv();
  2400. if (!priv || !priv->pdev) {
  2401. ret = -ENODEV;
  2402. goto out;
  2403. }
  2404. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2405. if (!priv->ops) {
  2406. icnss_pr_err("Driver not registered\n");
  2407. ret = -ENOENT;
  2408. goto out;
  2409. }
  2410. ret = icnss_driver_event_post(priv,
  2411. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2412. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2413. out:
  2414. return ret;
  2415. }
  2416. EXPORT_SYMBOL(icnss_unregister_driver);
  2417. static struct icnss_msi_config msi_config_wcn6750 = {
  2418. .total_vectors = 28,
  2419. .total_users = 2,
  2420. .users = (struct icnss_msi_user[]) {
  2421. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2422. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2423. },
  2424. };
  2425. static struct icnss_msi_config msi_config_wcn6450 = {
  2426. .total_vectors = 10,
  2427. .total_users = 1,
  2428. .users = (struct icnss_msi_user[]) {
  2429. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2430. },
  2431. };
  2432. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2433. {
  2434. if (priv->device_id == WCN6750_DEVICE_ID)
  2435. priv->msi_config = &msi_config_wcn6750;
  2436. else
  2437. priv->msi_config = &msi_config_wcn6450;
  2438. return 0;
  2439. }
  2440. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2441. int *num_vectors, u32 *user_base_data,
  2442. u32 *base_vector)
  2443. {
  2444. struct icnss_priv *priv = dev_get_drvdata(dev);
  2445. struct icnss_msi_config *msi_config;
  2446. int idx;
  2447. if (!priv)
  2448. return -ENODEV;
  2449. msi_config = priv->msi_config;
  2450. if (!msi_config) {
  2451. icnss_pr_err("MSI is not supported.\n");
  2452. return -EINVAL;
  2453. }
  2454. for (idx = 0; idx < msi_config->total_users; idx++) {
  2455. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2456. *num_vectors = msi_config->users[idx].num_vectors;
  2457. *user_base_data = msi_config->users[idx].base_vector
  2458. + priv->msi_base_data;
  2459. *base_vector = msi_config->users[idx].base_vector;
  2460. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2461. user_name, *num_vectors, *user_base_data,
  2462. *base_vector);
  2463. return 0;
  2464. }
  2465. }
  2466. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2467. return -EINVAL;
  2468. }
  2469. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2470. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2471. {
  2472. struct icnss_priv *priv = dev_get_drvdata(dev);
  2473. int irq_num;
  2474. irq_num = priv->srng_irqs[vector];
  2475. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2476. irq_num, vector);
  2477. return irq_num;
  2478. }
  2479. EXPORT_SYMBOL(icnss_get_msi_irq);
  2480. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2481. u32 *msi_addr_high)
  2482. {
  2483. struct icnss_priv *priv = dev_get_drvdata(dev);
  2484. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2485. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2486. }
  2487. EXPORT_SYMBOL(icnss_get_msi_address);
  2488. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2489. irqreturn_t (*handler)(int, void *),
  2490. unsigned long flags, const char *name, void *ctx)
  2491. {
  2492. int ret = 0;
  2493. unsigned int irq;
  2494. struct ce_irq_list *irq_entry;
  2495. struct icnss_priv *priv = dev_get_drvdata(dev);
  2496. if (!priv || !priv->pdev) {
  2497. ret = -ENODEV;
  2498. goto out;
  2499. }
  2500. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2501. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2502. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2503. ret = -EINVAL;
  2504. goto out;
  2505. }
  2506. irq = priv->ce_irqs[ce_id];
  2507. irq_entry = &priv->ce_irq_list[ce_id];
  2508. if (irq_entry->handler || irq_entry->irq) {
  2509. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2510. irq, ce_id);
  2511. ret = -EEXIST;
  2512. goto out;
  2513. }
  2514. ret = request_irq(irq, handler, flags, name, ctx);
  2515. if (ret) {
  2516. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2517. irq, ce_id, ret);
  2518. goto out;
  2519. }
  2520. irq_entry->irq = irq;
  2521. irq_entry->handler = handler;
  2522. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2523. penv->stats.ce_irqs[ce_id].request++;
  2524. out:
  2525. return ret;
  2526. }
  2527. EXPORT_SYMBOL(icnss_ce_request_irq);
  2528. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2529. {
  2530. int ret = 0;
  2531. unsigned int irq;
  2532. struct ce_irq_list *irq_entry;
  2533. if (!penv || !penv->pdev || !dev) {
  2534. ret = -ENODEV;
  2535. goto out;
  2536. }
  2537. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2538. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2539. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2540. ret = -EINVAL;
  2541. goto out;
  2542. }
  2543. irq = penv->ce_irqs[ce_id];
  2544. irq_entry = &penv->ce_irq_list[ce_id];
  2545. if (!irq_entry->handler || !irq_entry->irq) {
  2546. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2547. ret = -EEXIST;
  2548. goto out;
  2549. }
  2550. free_irq(irq, ctx);
  2551. irq_entry->irq = 0;
  2552. irq_entry->handler = NULL;
  2553. penv->stats.ce_irqs[ce_id].free++;
  2554. out:
  2555. return ret;
  2556. }
  2557. EXPORT_SYMBOL(icnss_ce_free_irq);
  2558. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2559. {
  2560. unsigned int irq;
  2561. if (!penv || !penv->pdev || !dev) {
  2562. icnss_pr_err("Platform driver not initialized\n");
  2563. return;
  2564. }
  2565. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2566. penv->state);
  2567. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2568. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2569. return;
  2570. }
  2571. penv->stats.ce_irqs[ce_id].enable++;
  2572. irq = penv->ce_irqs[ce_id];
  2573. enable_irq(irq);
  2574. }
  2575. EXPORT_SYMBOL(icnss_enable_irq);
  2576. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2577. {
  2578. unsigned int irq;
  2579. if (!penv || !penv->pdev || !dev) {
  2580. icnss_pr_err("Platform driver not initialized\n");
  2581. return;
  2582. }
  2583. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2584. penv->state);
  2585. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2586. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2587. ce_id);
  2588. return;
  2589. }
  2590. irq = penv->ce_irqs[ce_id];
  2591. disable_irq(irq);
  2592. penv->stats.ce_irqs[ce_id].disable++;
  2593. }
  2594. EXPORT_SYMBOL(icnss_disable_irq);
  2595. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2596. {
  2597. char *fw_build_timestamp = NULL;
  2598. struct icnss_priv *priv = dev_get_drvdata(dev);
  2599. if (!priv) {
  2600. icnss_pr_err("Platform driver not initialized\n");
  2601. return -EINVAL;
  2602. }
  2603. info->v_addr = priv->mem_base_va;
  2604. info->p_addr = priv->mem_base_pa;
  2605. info->chip_id = priv->chip_info.chip_id;
  2606. info->chip_family = priv->chip_info.chip_family;
  2607. info->board_id = priv->board_id;
  2608. info->soc_id = priv->soc_id;
  2609. info->fw_version = priv->fw_version_info.fw_version;
  2610. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2611. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2612. strlcpy(info->fw_build_timestamp,
  2613. priv->fw_version_info.fw_build_timestamp,
  2614. WLFW_MAX_TIMESTAMP_LEN + 1);
  2615. strlcpy(info->fw_build_id, priv->fw_build_id,
  2616. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2617. return 0;
  2618. }
  2619. EXPORT_SYMBOL(icnss_get_soc_info);
  2620. int icnss_get_mhi_state(struct device *dev)
  2621. {
  2622. struct icnss_priv *priv = dev_get_drvdata(dev);
  2623. if (!priv) {
  2624. icnss_pr_err("Platform driver not initialized\n");
  2625. return -EINVAL;
  2626. }
  2627. if (!priv->mhi_state_info_va)
  2628. return -ENOMEM;
  2629. return ioread32(priv->mhi_state_info_va);
  2630. }
  2631. EXPORT_SYMBOL(icnss_get_mhi_state);
  2632. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2633. {
  2634. int ret;
  2635. struct icnss_priv *priv;
  2636. if (!dev)
  2637. return -ENODEV;
  2638. priv = dev_get_drvdata(dev);
  2639. if (!priv) {
  2640. icnss_pr_err("Platform driver not initialized\n");
  2641. return -EINVAL;
  2642. }
  2643. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2644. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2645. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2646. priv->state);
  2647. return -EINVAL;
  2648. }
  2649. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2650. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2651. if (ret)
  2652. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2653. ret, fw_log_mode);
  2654. return ret;
  2655. }
  2656. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2657. int icnss_force_wake_request(struct device *dev)
  2658. {
  2659. struct icnss_priv *priv;
  2660. if (!dev)
  2661. return -ENODEV;
  2662. priv = dev_get_drvdata(dev);
  2663. if (!priv) {
  2664. icnss_pr_err("Platform driver not initialized\n");
  2665. return -EINVAL;
  2666. }
  2667. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2668. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2669. atomic_read(&priv->soc_wake_ref_count));
  2670. return 0;
  2671. }
  2672. icnss_pr_soc_wake("Calling SOC Wake request");
  2673. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2674. 0, NULL);
  2675. return 0;
  2676. }
  2677. EXPORT_SYMBOL(icnss_force_wake_request);
  2678. int icnss_force_wake_release(struct device *dev)
  2679. {
  2680. struct icnss_priv *priv;
  2681. if (!dev)
  2682. return -ENODEV;
  2683. priv = dev_get_drvdata(dev);
  2684. if (!priv) {
  2685. icnss_pr_err("Platform driver not initialized\n");
  2686. return -EINVAL;
  2687. }
  2688. icnss_pr_soc_wake("Calling SOC Wake response");
  2689. if (atomic_read(&priv->soc_wake_ref_count) &&
  2690. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2691. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2692. atomic_read(&priv->soc_wake_ref_count));
  2693. return 0;
  2694. }
  2695. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2696. 0, NULL);
  2697. return 0;
  2698. }
  2699. EXPORT_SYMBOL(icnss_force_wake_release);
  2700. int icnss_is_device_awake(struct device *dev)
  2701. {
  2702. struct icnss_priv *priv = dev_get_drvdata(dev);
  2703. if (!priv) {
  2704. icnss_pr_err("Platform driver not initialized\n");
  2705. return -EINVAL;
  2706. }
  2707. return atomic_read(&priv->soc_wake_ref_count);
  2708. }
  2709. EXPORT_SYMBOL(icnss_is_device_awake);
  2710. int icnss_is_pci_ep_awake(struct device *dev)
  2711. {
  2712. struct icnss_priv *priv = dev_get_drvdata(dev);
  2713. if (!priv) {
  2714. icnss_pr_err("Platform driver not initialized\n");
  2715. return -EINVAL;
  2716. }
  2717. if (!priv->mhi_state_info_va)
  2718. return -ENOMEM;
  2719. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2720. }
  2721. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2722. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2723. uint32_t mem_type, uint32_t data_len,
  2724. uint8_t *output)
  2725. {
  2726. int ret = 0;
  2727. struct icnss_priv *priv = dev_get_drvdata(dev);
  2728. if (priv->magic != ICNSS_MAGIC) {
  2729. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2730. dev, priv, priv->magic);
  2731. return -EINVAL;
  2732. }
  2733. if (!output || data_len == 0
  2734. || data_len > WLFW_MAX_DATA_SIZE) {
  2735. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2736. output, data_len);
  2737. ret = -EINVAL;
  2738. goto out;
  2739. }
  2740. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2741. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2742. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2743. priv->state);
  2744. ret = -EINVAL;
  2745. goto out;
  2746. }
  2747. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2748. data_len, output);
  2749. out:
  2750. return ret;
  2751. }
  2752. EXPORT_SYMBOL(icnss_athdiag_read);
  2753. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2754. uint32_t mem_type, uint32_t data_len,
  2755. uint8_t *input)
  2756. {
  2757. int ret = 0;
  2758. struct icnss_priv *priv = dev_get_drvdata(dev);
  2759. if (priv->magic != ICNSS_MAGIC) {
  2760. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2761. dev, priv, priv->magic);
  2762. return -EINVAL;
  2763. }
  2764. if (!input || data_len == 0
  2765. || data_len > WLFW_MAX_DATA_SIZE) {
  2766. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2767. input, data_len);
  2768. ret = -EINVAL;
  2769. goto out;
  2770. }
  2771. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2772. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2773. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2774. priv->state);
  2775. ret = -EINVAL;
  2776. goto out;
  2777. }
  2778. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2779. data_len, input);
  2780. out:
  2781. return ret;
  2782. }
  2783. EXPORT_SYMBOL(icnss_athdiag_write);
  2784. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2785. enum icnss_driver_mode mode,
  2786. const char *host_version)
  2787. {
  2788. struct icnss_priv *priv = dev_get_drvdata(dev);
  2789. int temp = 0, ret = 0;
  2790. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2791. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2792. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2793. priv->state);
  2794. return -EINVAL;
  2795. }
  2796. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2797. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2798. priv->state);
  2799. return -EINVAL;
  2800. }
  2801. if (priv->wpss_supported &&
  2802. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2803. icnss_setup_dms_mac(priv);
  2804. if (priv->device_id == WCN6750_DEVICE_ID) {
  2805. if (!icnss_get_temperature(priv, &temp)) {
  2806. icnss_pr_dbg("Temperature: %d\n", temp);
  2807. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2808. icnss_set_wlan_en_delay(priv);
  2809. }
  2810. }
  2811. if (priv->device_id == WCN6450_DEVICE_ID)
  2812. icnss_hw_power_off(priv);
  2813. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2814. if (priv->device_id == WCN6450_DEVICE_ID)
  2815. icnss_hw_power_on(priv);
  2816. return ret;
  2817. }
  2818. EXPORT_SYMBOL(icnss_wlan_enable);
  2819. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2820. {
  2821. struct icnss_priv *priv = dev_get_drvdata(dev);
  2822. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2823. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2824. priv->state);
  2825. return 0;
  2826. }
  2827. return icnss_send_wlan_disable_to_fw(priv);
  2828. }
  2829. EXPORT_SYMBOL(icnss_wlan_disable);
  2830. bool icnss_is_qmi_disable(struct device *dev)
  2831. {
  2832. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2833. }
  2834. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2835. int icnss_get_ce_id(struct device *dev, int irq)
  2836. {
  2837. int i;
  2838. if (!penv || !penv->pdev || !dev)
  2839. return -ENODEV;
  2840. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2841. if (penv->ce_irqs[i] == irq)
  2842. return i;
  2843. }
  2844. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2845. return -EINVAL;
  2846. }
  2847. EXPORT_SYMBOL(icnss_get_ce_id);
  2848. int icnss_get_irq(struct device *dev, int ce_id)
  2849. {
  2850. int irq;
  2851. if (!penv || !penv->pdev || !dev)
  2852. return -ENODEV;
  2853. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2854. return -EINVAL;
  2855. irq = penv->ce_irqs[ce_id];
  2856. return irq;
  2857. }
  2858. EXPORT_SYMBOL(icnss_get_irq);
  2859. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2860. {
  2861. struct icnss_priv *priv = dev_get_drvdata(dev);
  2862. if (!priv) {
  2863. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2864. return NULL;
  2865. }
  2866. return priv->iommu_domain;
  2867. }
  2868. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2869. int icnss_smmu_map(struct device *dev,
  2870. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2871. {
  2872. struct icnss_priv *priv = dev_get_drvdata(dev);
  2873. int flag = IOMMU_READ | IOMMU_WRITE;
  2874. bool dma_coherent = false;
  2875. unsigned long iova;
  2876. int prop_len = 0;
  2877. size_t len;
  2878. int ret = 0;
  2879. if (!priv) {
  2880. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2881. dev, priv);
  2882. return -EINVAL;
  2883. }
  2884. if (!iova_addr) {
  2885. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2886. &paddr, size);
  2887. return -EINVAL;
  2888. }
  2889. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2890. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2891. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2892. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2893. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2894. iova,
  2895. &priv->smmu_iova_ipa_start,
  2896. priv->smmu_iova_ipa_len);
  2897. return -ENOMEM;
  2898. }
  2899. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2900. icnss_pr_dbg("dma-coherent is %s\n",
  2901. dma_coherent ? "enabled" : "disabled");
  2902. if (dma_coherent)
  2903. flag |= IOMMU_CACHE;
  2904. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2905. ret = iommu_map(priv->iommu_domain, iova,
  2906. rounddown(paddr, PAGE_SIZE), len,
  2907. flag);
  2908. if (ret) {
  2909. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2910. return ret;
  2911. }
  2912. priv->smmu_iova_ipa_current = iova + len;
  2913. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2914. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2915. return 0;
  2916. }
  2917. EXPORT_SYMBOL(icnss_smmu_map);
  2918. int icnss_smmu_unmap(struct device *dev,
  2919. uint32_t iova_addr, size_t size)
  2920. {
  2921. struct icnss_priv *priv = dev_get_drvdata(dev);
  2922. unsigned long iova;
  2923. size_t len, unmapped_len;
  2924. if (!priv) {
  2925. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2926. dev, priv);
  2927. return -EINVAL;
  2928. }
  2929. if (!iova_addr) {
  2930. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2931. size);
  2932. return -EINVAL;
  2933. }
  2934. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2935. PAGE_SIZE);
  2936. iova = rounddown(iova_addr, PAGE_SIZE);
  2937. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2938. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2939. iova,
  2940. &priv->smmu_iova_ipa_start,
  2941. priv->smmu_iova_ipa_len);
  2942. return -ENOMEM;
  2943. }
  2944. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2945. iova, len);
  2946. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2947. if (unmapped_len != len) {
  2948. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2949. return -EINVAL;
  2950. }
  2951. priv->smmu_iova_ipa_current = iova;
  2952. return 0;
  2953. }
  2954. EXPORT_SYMBOL(icnss_smmu_unmap);
  2955. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2956. {
  2957. return socinfo_get_serial_number();
  2958. }
  2959. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2960. int icnss_trigger_recovery(struct device *dev)
  2961. {
  2962. int ret = 0;
  2963. struct icnss_priv *priv = dev_get_drvdata(dev);
  2964. if (priv->magic != ICNSS_MAGIC) {
  2965. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2966. ret = -EINVAL;
  2967. goto out;
  2968. }
  2969. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2970. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2971. priv->state);
  2972. ret = -EPERM;
  2973. goto out;
  2974. }
  2975. if (priv->wpss_supported) {
  2976. icnss_pr_vdbg("Initiate Root PD restart");
  2977. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2978. ICNSS_SMP2P_OUT_POWER_SAVE);
  2979. if (!ret)
  2980. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2981. return ret;
  2982. }
  2983. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2984. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2985. priv->state);
  2986. ret = -EOPNOTSUPP;
  2987. goto out;
  2988. }
  2989. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2990. priv->state);
  2991. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2992. if (!ret)
  2993. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2994. out:
  2995. return ret;
  2996. }
  2997. EXPORT_SYMBOL(icnss_trigger_recovery);
  2998. int icnss_idle_shutdown(struct device *dev)
  2999. {
  3000. struct icnss_priv *priv = dev_get_drvdata(dev);
  3001. if (!priv) {
  3002. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3003. return -EINVAL;
  3004. }
  3005. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3006. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3007. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3008. return -EBUSY;
  3009. }
  3010. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3011. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3012. }
  3013. EXPORT_SYMBOL(icnss_idle_shutdown);
  3014. int icnss_idle_restart(struct device *dev)
  3015. {
  3016. struct icnss_priv *priv = dev_get_drvdata(dev);
  3017. if (!priv) {
  3018. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3019. return -EINVAL;
  3020. }
  3021. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3022. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3023. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3024. return -EBUSY;
  3025. }
  3026. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3027. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3028. }
  3029. EXPORT_SYMBOL(icnss_idle_restart);
  3030. int icnss_exit_power_save(struct device *dev)
  3031. {
  3032. struct icnss_priv *priv = dev_get_drvdata(dev);
  3033. icnss_pr_vdbg("Calling Exit Power Save\n");
  3034. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3035. !test_bit(ICNSS_MODE_ON, &priv->state))
  3036. return 0;
  3037. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3038. ICNSS_SMP2P_OUT_POWER_SAVE);
  3039. }
  3040. EXPORT_SYMBOL(icnss_exit_power_save);
  3041. int icnss_prevent_l1(struct device *dev)
  3042. {
  3043. struct icnss_priv *priv = dev_get_drvdata(dev);
  3044. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3045. !test_bit(ICNSS_MODE_ON, &priv->state))
  3046. return 0;
  3047. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3048. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3049. }
  3050. EXPORT_SYMBOL(icnss_prevent_l1);
  3051. void icnss_allow_l1(struct device *dev)
  3052. {
  3053. struct icnss_priv *priv = dev_get_drvdata(dev);
  3054. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3055. !test_bit(ICNSS_MODE_ON, &priv->state))
  3056. return;
  3057. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3058. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3059. }
  3060. EXPORT_SYMBOL(icnss_allow_l1);
  3061. void icnss_allow_recursive_recovery(struct device *dev)
  3062. {
  3063. struct icnss_priv *priv = dev_get_drvdata(dev);
  3064. priv->allow_recursive_recovery = true;
  3065. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3066. }
  3067. void icnss_disallow_recursive_recovery(struct device *dev)
  3068. {
  3069. struct icnss_priv *priv = dev_get_drvdata(dev);
  3070. priv->allow_recursive_recovery = false;
  3071. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3072. }
  3073. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3074. {
  3075. struct kobject *icnss_kobject;
  3076. int ret = 0;
  3077. atomic_set(&priv->is_shutdown, false);
  3078. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3079. if (!icnss_kobject) {
  3080. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3081. return -EINVAL;
  3082. }
  3083. priv->icnss_kobject = icnss_kobject;
  3084. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3085. if (ret) {
  3086. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3087. return ret;
  3088. }
  3089. return ret;
  3090. }
  3091. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3092. {
  3093. struct kobject *icnss_kobject;
  3094. icnss_kobject = priv->icnss_kobject;
  3095. if (icnss_kobject)
  3096. kobject_put(icnss_kobject);
  3097. }
  3098. static ssize_t qdss_tr_start_store(struct device *dev,
  3099. struct device_attribute *attr,
  3100. const char *buf, size_t count)
  3101. {
  3102. struct icnss_priv *priv = dev_get_drvdata(dev);
  3103. wlfw_qdss_trace_start(priv);
  3104. icnss_pr_dbg("Received QDSS start command\n");
  3105. return count;
  3106. }
  3107. static ssize_t qdss_tr_stop_store(struct device *dev,
  3108. struct device_attribute *attr,
  3109. const char *user_buf, size_t count)
  3110. {
  3111. struct icnss_priv *priv = dev_get_drvdata(dev);
  3112. u32 option = 0;
  3113. if (sscanf(user_buf, "%du", &option) != 1)
  3114. return -EINVAL;
  3115. wlfw_qdss_trace_stop(priv, option);
  3116. icnss_pr_dbg("Received QDSS stop command\n");
  3117. return count;
  3118. }
  3119. static ssize_t qdss_conf_download_store(struct device *dev,
  3120. struct device_attribute *attr,
  3121. const char *buf, size_t count)
  3122. {
  3123. struct icnss_priv *priv = dev_get_drvdata(dev);
  3124. icnss_wlfw_qdss_dnld_send_sync(priv);
  3125. icnss_pr_dbg("Received QDSS download config command\n");
  3126. return count;
  3127. }
  3128. static ssize_t hw_trc_override_store(struct device *dev,
  3129. struct device_attribute *attr,
  3130. const char *buf, size_t count)
  3131. {
  3132. struct icnss_priv *priv = dev_get_drvdata(dev);
  3133. int tmp = 0;
  3134. if (sscanf(buf, "%du", &tmp) != 1)
  3135. return -EINVAL;
  3136. priv->hw_trc_override = tmp;
  3137. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3138. return count;
  3139. }
  3140. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3141. {
  3142. struct icnss_priv *priv = icnss_get_plat_priv();
  3143. phandle rproc_phandle;
  3144. int ret;
  3145. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3146. &rproc_phandle)) {
  3147. icnss_pr_err("error reading rproc phandle\n");
  3148. return;
  3149. }
  3150. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3151. if (IS_ERR_OR_NULL(priv->rproc)) {
  3152. icnss_pr_err("rproc not found");
  3153. return;
  3154. }
  3155. ret = rproc_boot(priv->rproc);
  3156. if (ret) {
  3157. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3158. rproc_put(priv->rproc);
  3159. }
  3160. }
  3161. static ssize_t wpss_boot_store(struct device *dev,
  3162. struct device_attribute *attr,
  3163. const char *buf, size_t count)
  3164. {
  3165. struct icnss_priv *priv = dev_get_drvdata(dev);
  3166. int wpss_rproc = 0;
  3167. if (!priv->wpss_supported)
  3168. return count;
  3169. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3170. icnss_pr_err("Failed to read wpss rproc info");
  3171. return -EINVAL;
  3172. }
  3173. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3174. if (wpss_rproc == 1)
  3175. schedule_work(&wpss_loader);
  3176. else if (wpss_rproc == 0)
  3177. icnss_wpss_unload(priv);
  3178. return count;
  3179. }
  3180. static ssize_t wlan_en_delay_store(struct device *dev,
  3181. struct device_attribute *attr,
  3182. const char *buf, size_t count)
  3183. {
  3184. struct icnss_priv *priv = dev_get_drvdata(dev);
  3185. uint32_t wlan_en_delay = 0;
  3186. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3187. return count;
  3188. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3189. icnss_pr_err("Failed to read wlan_en_delay");
  3190. return -EINVAL;
  3191. }
  3192. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3193. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3194. return count;
  3195. }
  3196. static DEVICE_ATTR_WO(qdss_tr_start);
  3197. static DEVICE_ATTR_WO(qdss_tr_stop);
  3198. static DEVICE_ATTR_WO(qdss_conf_download);
  3199. static DEVICE_ATTR_WO(hw_trc_override);
  3200. static DEVICE_ATTR_WO(wpss_boot);
  3201. static DEVICE_ATTR_WO(wlan_en_delay);
  3202. static struct attribute *icnss_attrs[] = {
  3203. &dev_attr_qdss_tr_start.attr,
  3204. &dev_attr_qdss_tr_stop.attr,
  3205. &dev_attr_qdss_conf_download.attr,
  3206. &dev_attr_hw_trc_override.attr,
  3207. &dev_attr_wpss_boot.attr,
  3208. &dev_attr_wlan_en_delay.attr,
  3209. NULL,
  3210. };
  3211. static struct attribute_group icnss_attr_group = {
  3212. .attrs = icnss_attrs,
  3213. };
  3214. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3215. {
  3216. struct device *dev = &priv->pdev->dev;
  3217. int ret;
  3218. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3219. if (ret) {
  3220. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3221. ret);
  3222. goto out;
  3223. }
  3224. return 0;
  3225. out:
  3226. return ret;
  3227. }
  3228. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3229. {
  3230. sysfs_remove_link(kernel_kobj, "icnss");
  3231. }
  3232. static int icnss_sysfs_create(struct icnss_priv *priv)
  3233. {
  3234. int ret = 0;
  3235. ret = devm_device_add_group(&priv->pdev->dev,
  3236. &icnss_attr_group);
  3237. if (ret) {
  3238. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3239. ret);
  3240. goto out;
  3241. }
  3242. icnss_create_sysfs_link(priv);
  3243. ret = icnss_create_shutdown_sysfs(priv);
  3244. if (ret)
  3245. goto remove_icnss_group;
  3246. return 0;
  3247. remove_icnss_group:
  3248. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3249. out:
  3250. return ret;
  3251. }
  3252. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3253. {
  3254. icnss_destroy_shutdown_sysfs(priv);
  3255. icnss_remove_sysfs_link(priv);
  3256. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3257. }
  3258. static int icnss_resource_parse(struct icnss_priv *priv)
  3259. {
  3260. int ret = 0, i = 0;
  3261. struct platform_device *pdev = priv->pdev;
  3262. struct device *dev = &pdev->dev;
  3263. struct resource *res;
  3264. u32 int_prop;
  3265. ret = icnss_get_vreg(priv);
  3266. if (ret) {
  3267. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3268. goto out;
  3269. }
  3270. ret = icnss_get_clk(priv);
  3271. if (ret) {
  3272. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3273. goto put_vreg;
  3274. }
  3275. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3276. ret = icnss_get_psf_info(priv);
  3277. if (ret < 0)
  3278. goto out;
  3279. priv->psf_supported = true;
  3280. }
  3281. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3282. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3283. "membase");
  3284. if (!res) {
  3285. icnss_pr_err("Memory base not found in DT\n");
  3286. ret = -EINVAL;
  3287. goto put_clk;
  3288. }
  3289. priv->mem_base_pa = res->start;
  3290. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3291. resource_size(res));
  3292. if (!priv->mem_base_va) {
  3293. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3294. &priv->mem_base_pa);
  3295. ret = -EINVAL;
  3296. goto put_clk;
  3297. }
  3298. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3299. &priv->mem_base_pa,
  3300. priv->mem_base_va);
  3301. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3302. res = platform_get_resource(priv->pdev,
  3303. IORESOURCE_IRQ, i);
  3304. if (!res) {
  3305. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3306. ret = -ENODEV;
  3307. goto put_clk;
  3308. } else {
  3309. priv->ce_irqs[i] = res->start;
  3310. }
  3311. }
  3312. if (of_property_read_bool(pdev->dev.of_node,
  3313. "qcom,is_low_power")) {
  3314. priv->low_power_support = true;
  3315. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3316. }
  3317. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3318. &priv->rf_subtype) == 0) {
  3319. priv->is_rf_subtype_valid = true;
  3320. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3321. }
  3322. if (of_property_read_bool(pdev->dev.of_node,
  3323. "qcom,is_slate_rfa")) {
  3324. priv->is_slate_rfa = true;
  3325. icnss_pr_err("SLATE rfa is enabled\n");
  3326. }
  3327. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3328. priv->device_id == WCN6450_DEVICE_ID) {
  3329. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3330. "msi_addr");
  3331. if (!res) {
  3332. icnss_pr_err("MSI address not found in DT\n");
  3333. ret = -EINVAL;
  3334. goto put_clk;
  3335. }
  3336. priv->msi_addr_pa = res->start;
  3337. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3338. PAGE_SIZE,
  3339. DMA_FROM_DEVICE, 0);
  3340. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3341. icnss_pr_err("MSI: failed to map msi address\n");
  3342. priv->msi_addr_iova = 0;
  3343. ret = -ENOMEM;
  3344. goto put_clk;
  3345. }
  3346. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3347. &priv->msi_addr_pa,
  3348. priv->msi_addr_iova);
  3349. ret = of_property_read_u32_index(dev->of_node,
  3350. "interrupts",
  3351. 1,
  3352. &int_prop);
  3353. if (ret) {
  3354. icnss_pr_dbg("Read interrupt prop failed");
  3355. goto put_clk;
  3356. }
  3357. priv->msi_base_data = int_prop + 32;
  3358. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3359. priv->msi_base_data, int_prop);
  3360. icnss_get_msi_assignment(priv);
  3361. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3362. res = platform_get_resource(priv->pdev,
  3363. IORESOURCE_IRQ, i);
  3364. if (!res) {
  3365. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3366. ret = -ENODEV;
  3367. goto put_clk;
  3368. } else {
  3369. priv->srng_irqs[i] = res->start;
  3370. }
  3371. }
  3372. }
  3373. return 0;
  3374. put_clk:
  3375. icnss_put_clk(priv);
  3376. put_vreg:
  3377. icnss_put_vreg(priv);
  3378. out:
  3379. return ret;
  3380. }
  3381. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3382. {
  3383. int ret = 0;
  3384. struct platform_device *pdev = priv->pdev;
  3385. struct device *dev = &pdev->dev;
  3386. struct device_node *np = NULL;
  3387. u64 prop_size = 0;
  3388. const __be32 *addrp = NULL;
  3389. np = of_parse_phandle(dev->of_node,
  3390. "qcom,wlan-msa-fixed-region", 0);
  3391. if (np) {
  3392. addrp = of_get_address(np, 0, &prop_size, NULL);
  3393. if (!addrp) {
  3394. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3395. ret = -EINVAL;
  3396. of_node_put(np);
  3397. goto out;
  3398. }
  3399. priv->msa_pa = of_translate_address(np, addrp);
  3400. if (priv->msa_pa == OF_BAD_ADDR) {
  3401. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3402. ret = -EINVAL;
  3403. of_node_put(np);
  3404. goto out;
  3405. }
  3406. of_node_put(np);
  3407. priv->msa_va = memremap(priv->msa_pa,
  3408. (unsigned long)prop_size, MEMREMAP_WT);
  3409. if (!priv->msa_va) {
  3410. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3411. &priv->msa_pa);
  3412. ret = -EINVAL;
  3413. goto out;
  3414. }
  3415. priv->msa_mem_size = prop_size;
  3416. } else {
  3417. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3418. &priv->msa_mem_size);
  3419. if (ret || priv->msa_mem_size == 0) {
  3420. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3421. priv->msa_mem_size, ret);
  3422. goto out;
  3423. }
  3424. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3425. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3426. if (!priv->msa_va) {
  3427. icnss_pr_err("DMA alloc failed for MSA\n");
  3428. ret = -ENOMEM;
  3429. goto out;
  3430. }
  3431. }
  3432. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3433. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3434. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3435. "qcom,fw-prefix");
  3436. return 0;
  3437. out:
  3438. return ret;
  3439. }
  3440. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3441. struct device *dev, unsigned long iova,
  3442. int flags, void *handler_token)
  3443. {
  3444. struct icnss_priv *priv = handler_token;
  3445. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3446. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3447. if (!priv) {
  3448. icnss_pr_err("priv is NULL\n");
  3449. return -ENODEV;
  3450. }
  3451. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3452. fw_down_data.crashed = true;
  3453. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3454. &fw_down_data);
  3455. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3456. &fw_down_data);
  3457. }
  3458. icnss_trigger_recovery(&priv->pdev->dev);
  3459. /* IOMMU driver requires non-zero return value to print debug info. */
  3460. return -EINVAL;
  3461. }
  3462. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3463. {
  3464. int ret = 0;
  3465. struct platform_device *pdev = priv->pdev;
  3466. struct device *dev = &pdev->dev;
  3467. const char *iommu_dma_type;
  3468. struct resource *res;
  3469. u32 addr_win[2];
  3470. ret = of_property_read_u32_array(dev->of_node,
  3471. "qcom,iommu-dma-addr-pool",
  3472. addr_win,
  3473. ARRAY_SIZE(addr_win));
  3474. if (ret) {
  3475. icnss_pr_err("SMMU IOVA base not found\n");
  3476. } else {
  3477. priv->smmu_iova_start = addr_win[0];
  3478. priv->smmu_iova_len = addr_win[1];
  3479. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3480. &priv->smmu_iova_start,
  3481. priv->smmu_iova_len);
  3482. priv->iommu_domain =
  3483. iommu_get_domain_for_dev(&pdev->dev);
  3484. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3485. &iommu_dma_type);
  3486. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3487. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3488. priv->smmu_s1_enable = true;
  3489. if (priv->device_id == WCN6750_DEVICE_ID ||
  3490. priv->device_id == WCN6450_DEVICE_ID)
  3491. iommu_set_fault_handler(priv->iommu_domain,
  3492. icnss_smmu_fault_handler,
  3493. priv);
  3494. }
  3495. res = platform_get_resource_byname(pdev,
  3496. IORESOURCE_MEM,
  3497. "smmu_iova_ipa");
  3498. if (!res) {
  3499. icnss_pr_err("SMMU IOVA IPA not found\n");
  3500. } else {
  3501. priv->smmu_iova_ipa_start = res->start;
  3502. priv->smmu_iova_ipa_current = res->start;
  3503. priv->smmu_iova_ipa_len = resource_size(res);
  3504. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3505. &priv->smmu_iova_ipa_start,
  3506. priv->smmu_iova_ipa_len);
  3507. }
  3508. }
  3509. return 0;
  3510. }
  3511. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3512. {
  3513. if (!priv)
  3514. return -ENODEV;
  3515. if (!priv->smmu_iova_len)
  3516. return -EINVAL;
  3517. *addr = priv->smmu_iova_start;
  3518. *size = priv->smmu_iova_len;
  3519. return 0;
  3520. }
  3521. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3522. {
  3523. if (!priv)
  3524. return -ENODEV;
  3525. if (!priv->smmu_iova_ipa_len)
  3526. return -EINVAL;
  3527. *addr = priv->smmu_iova_ipa_start;
  3528. *size = priv->smmu_iova_ipa_len;
  3529. return 0;
  3530. }
  3531. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3532. char *name)
  3533. {
  3534. if (!priv)
  3535. return;
  3536. if (!priv->use_prefix_path) {
  3537. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3538. return;
  3539. }
  3540. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3541. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3542. ADRASTEA_PATH_PREFIX "%s", name);
  3543. else if (priv->device_id == WCN6750_DEVICE_ID)
  3544. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3545. QCA6750_PATH_PREFIX "%s", name);
  3546. else if (priv->device_id == WCN6450_DEVICE_ID)
  3547. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3548. WCN6450_PATH_PREFIX "%s", name);
  3549. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3550. }
  3551. static const struct platform_device_id icnss_platform_id_table[] = {
  3552. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3553. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3554. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3555. { },
  3556. };
  3557. static const struct of_device_id icnss_dt_match[] = {
  3558. {
  3559. .compatible = "qcom,wcn6750",
  3560. .data = (void *)&icnss_platform_id_table[0]},
  3561. {
  3562. .compatible = "qcom,icnss",
  3563. .data = (void *)&icnss_platform_id_table[1]},
  3564. {
  3565. .compatible = "qcom,wcn6450",
  3566. .data = (void *)&icnss_platform_id_table[2]},
  3567. { },
  3568. };
  3569. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3570. static void icnss_init_control_params(struct icnss_priv *priv)
  3571. {
  3572. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3573. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3574. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3575. if (priv->device_id == WCN6750_DEVICE_ID ||
  3576. of_property_read_bool(priv->pdev->dev.of_node,
  3577. "wpss-support-enable"))
  3578. priv->wpss_supported = true;
  3579. if (of_property_read_bool(priv->pdev->dev.of_node,
  3580. "bdf-download-support"))
  3581. priv->bdf_download_support = true;
  3582. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3583. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3584. }
  3585. static void icnss_read_device_configs(struct icnss_priv *priv)
  3586. {
  3587. if (of_property_read_bool(priv->pdev->dev.of_node,
  3588. "wlan-ipa-disabled")) {
  3589. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3590. }
  3591. if (of_property_read_bool(priv->pdev->dev.of_node,
  3592. "qcom,wpss-self-recovery"))
  3593. priv->wpss_self_recovery_enabled = true;
  3594. }
  3595. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3596. {
  3597. pm_runtime_get_sync(&priv->pdev->dev);
  3598. pm_runtime_forbid(&priv->pdev->dev);
  3599. pm_runtime_set_active(&priv->pdev->dev);
  3600. pm_runtime_enable(&priv->pdev->dev);
  3601. }
  3602. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3603. {
  3604. pm_runtime_disable(&priv->pdev->dev);
  3605. pm_runtime_allow(&priv->pdev->dev);
  3606. pm_runtime_put_sync(&priv->pdev->dev);
  3607. }
  3608. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3609. {
  3610. return of_property_read_bool(priv->pdev->dev.of_node,
  3611. "use-nv-mac");
  3612. }
  3613. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3614. {
  3615. struct icnss_subsys_restart_level_data *restart_level_data;
  3616. icnss_pr_info("rproc name: %s recovery disable: %d",
  3617. rproc->name, rproc->recovery_disabled);
  3618. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3619. if (!restart_level_data)
  3620. return;
  3621. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3622. if (rproc->recovery_disabled)
  3623. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3624. else
  3625. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3626. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3627. 0, restart_level_data);
  3628. }
  3629. }
  3630. static int icnss_probe(struct platform_device *pdev)
  3631. {
  3632. int ret = 0;
  3633. struct device *dev = &pdev->dev;
  3634. struct icnss_priv *priv;
  3635. const struct of_device_id *of_id;
  3636. const struct platform_device_id *device_id;
  3637. if (dev_get_drvdata(dev)) {
  3638. icnss_pr_err("Driver is already initialized\n");
  3639. return -EEXIST;
  3640. }
  3641. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3642. if (!of_id || !of_id->data) {
  3643. icnss_pr_err("Failed to find of match device!\n");
  3644. ret = -ENODEV;
  3645. goto out_reset_drvdata;
  3646. }
  3647. device_id = of_id->data;
  3648. icnss_pr_dbg("Platform driver probe\n");
  3649. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3650. if (!priv)
  3651. return -ENOMEM;
  3652. priv->magic = ICNSS_MAGIC;
  3653. dev_set_drvdata(dev, priv);
  3654. priv->pdev = pdev;
  3655. priv->device_id = device_id->driver_data;
  3656. priv->is_chain1_supported = true;
  3657. INIT_LIST_HEAD(&priv->vreg_list);
  3658. INIT_LIST_HEAD(&priv->clk_list);
  3659. icnss_allow_recursive_recovery(dev);
  3660. icnss_init_control_params(priv);
  3661. icnss_read_device_configs(priv);
  3662. ret = icnss_resource_parse(priv);
  3663. if (ret)
  3664. goto out_reset_drvdata;
  3665. ret = icnss_msa_dt_parse(priv);
  3666. if (ret)
  3667. goto out_free_resources;
  3668. ret = icnss_smmu_dt_parse(priv);
  3669. if (ret)
  3670. goto out_free_resources;
  3671. spin_lock_init(&priv->event_lock);
  3672. spin_lock_init(&priv->on_off_lock);
  3673. spin_lock_init(&priv->soc_wake_msg_lock);
  3674. mutex_init(&priv->dev_lock);
  3675. mutex_init(&priv->tcdev_lock);
  3676. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3677. if (!priv->event_wq) {
  3678. icnss_pr_err("Workqueue creation failed\n");
  3679. ret = -EFAULT;
  3680. goto smmu_cleanup;
  3681. }
  3682. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3683. INIT_LIST_HEAD(&priv->event_list);
  3684. ret = icnss_register_fw_service(priv);
  3685. if (ret < 0) {
  3686. icnss_pr_err("fw service registration failed: %d\n", ret);
  3687. goto out_destroy_wq;
  3688. }
  3689. icnss_enable_recovery(priv);
  3690. icnss_debugfs_create(priv);
  3691. icnss_sysfs_create(priv);
  3692. ret = device_init_wakeup(&priv->pdev->dev, true);
  3693. if (ret)
  3694. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3695. ret);
  3696. icnss_set_plat_priv(priv);
  3697. init_completion(&priv->unblock_shutdown);
  3698. if (priv->is_slate_rfa)
  3699. init_completion(&priv->slate_boot_complete);
  3700. if (priv->device_id == WCN6750_DEVICE_ID ||
  3701. priv->device_id == WCN6450_DEVICE_ID) {
  3702. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3703. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3704. if (!priv->soc_wake_wq) {
  3705. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3706. ret = -EFAULT;
  3707. goto out_unregister_fw_service;
  3708. }
  3709. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3710. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3711. ret = icnss_genl_init();
  3712. if (ret < 0)
  3713. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3714. init_completion(&priv->smp2p_soc_wake_wait);
  3715. icnss_runtime_pm_init(priv);
  3716. icnss_aop_mbox_init(priv);
  3717. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3718. priv->bdf_download_support = true;
  3719. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3720. }
  3721. if (priv->wpss_supported) {
  3722. ret = icnss_dms_init(priv);
  3723. if (ret)
  3724. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3725. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3726. icnss_pr_dbg("NV MAC feature is %s\n",
  3727. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3728. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3729. }
  3730. timer_setup(&priv->recovery_timer,
  3731. icnss_recovery_timeout_hdlr, 0);
  3732. if (priv->wpss_self_recovery_enabled) {
  3733. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3734. timer_setup(&priv->wpss_ssr_timer,
  3735. icnss_wpss_ssr_timeout_hdlr, 0);
  3736. }
  3737. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3738. icnss_pr_info("Platform driver probed successfully\n");
  3739. return 0;
  3740. out_unregister_fw_service:
  3741. icnss_unregister_fw_service(priv);
  3742. out_destroy_wq:
  3743. destroy_workqueue(priv->event_wq);
  3744. smmu_cleanup:
  3745. priv->iommu_domain = NULL;
  3746. out_free_resources:
  3747. icnss_put_resources(priv);
  3748. out_reset_drvdata:
  3749. dev_set_drvdata(dev, NULL);
  3750. return ret;
  3751. }
  3752. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3753. {
  3754. if (IS_ERR_OR_NULL(ramdump_info))
  3755. return;
  3756. device_unregister(ramdump_info->dev);
  3757. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3758. kfree(ramdump_info);
  3759. }
  3760. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3761. {
  3762. if (priv->batt_psy)
  3763. power_supply_put(penv->batt_psy);
  3764. if (priv->psf_supported) {
  3765. flush_workqueue(priv->soc_update_wq);
  3766. destroy_workqueue(priv->soc_update_wq);
  3767. power_supply_unreg_notifier(&priv->psf_nb);
  3768. }
  3769. }
  3770. static int icnss_remove(struct platform_device *pdev)
  3771. {
  3772. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3773. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3774. del_timer(&priv->recovery_timer);
  3775. if (priv->wpss_self_recovery_enabled)
  3776. del_timer(&priv->wpss_ssr_timer);
  3777. device_init_wakeup(&priv->pdev->dev, false);
  3778. icnss_debugfs_destroy(priv);
  3779. icnss_unregister_power_supply_notifier(penv);
  3780. icnss_sysfs_destroy(priv);
  3781. complete_all(&priv->unblock_shutdown);
  3782. if (priv->is_slate_rfa)
  3783. icnss_slate_ssr_unregister_notifier(priv);
  3784. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3785. if (priv->wpss_supported) {
  3786. icnss_dms_deinit(priv);
  3787. icnss_wpss_early_ssr_unregister_notifier(priv);
  3788. icnss_wpss_ssr_unregister_notifier(priv);
  3789. } else {
  3790. icnss_modem_ssr_unregister_notifier(priv);
  3791. icnss_pdr_unregister_notifier(priv);
  3792. }
  3793. if (priv->device_id == WCN6750_DEVICE_ID ||
  3794. priv->device_id == WCN6450_DEVICE_ID) {
  3795. icnss_genl_exit();
  3796. icnss_runtime_pm_deinit(priv);
  3797. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3798. mbox_free_channel(priv->mbox_chan);
  3799. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3800. complete_all(&priv->smp2p_soc_wake_wait);
  3801. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3802. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3803. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3804. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3805. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3806. if (priv->soc_wake_wq)
  3807. destroy_workqueue(priv->soc_wake_wq);
  3808. }
  3809. class_destroy(priv->icnss_ramdump_class);
  3810. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3811. icnss_unregister_fw_service(priv);
  3812. if (priv->event_wq)
  3813. destroy_workqueue(priv->event_wq);
  3814. priv->iommu_domain = NULL;
  3815. icnss_hw_power_off(priv);
  3816. icnss_put_resources(priv);
  3817. dev_set_drvdata(&pdev->dev, NULL);
  3818. return 0;
  3819. }
  3820. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3821. {
  3822. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3823. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3824. ICNSS_ASSERT(0);
  3825. }
  3826. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3827. {
  3828. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3829. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3830. priv->state);
  3831. schedule_work(&wpss_ssr_work);
  3832. }
  3833. #ifdef CONFIG_PM_SLEEP
  3834. static int icnss_pm_suspend(struct device *dev)
  3835. {
  3836. struct icnss_priv *priv = dev_get_drvdata(dev);
  3837. int ret = 0;
  3838. if (priv->magic != ICNSS_MAGIC) {
  3839. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3840. dev, priv, priv->magic);
  3841. return -EINVAL;
  3842. }
  3843. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3844. if (!priv->ops || !priv->ops->pm_suspend ||
  3845. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3846. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3847. return 0;
  3848. ret = priv->ops->pm_suspend(dev);
  3849. if (ret == 0) {
  3850. if (priv->device_id == WCN6750_DEVICE_ID ||
  3851. priv->device_id == WCN6450_DEVICE_ID) {
  3852. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3853. !test_bit(ICNSS_MODE_ON, &priv->state))
  3854. return 0;
  3855. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3856. ICNSS_SMP2P_OUT_POWER_SAVE);
  3857. }
  3858. priv->stats.pm_suspend++;
  3859. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3860. } else {
  3861. priv->stats.pm_suspend_err++;
  3862. }
  3863. return ret;
  3864. }
  3865. static int icnss_pm_resume(struct device *dev)
  3866. {
  3867. struct icnss_priv *priv = dev_get_drvdata(dev);
  3868. int ret = 0;
  3869. if (priv->magic != ICNSS_MAGIC) {
  3870. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3871. dev, priv, priv->magic);
  3872. return -EINVAL;
  3873. }
  3874. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3875. if (!priv->ops || !priv->ops->pm_resume ||
  3876. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3877. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3878. goto out;
  3879. ret = priv->ops->pm_resume(dev);
  3880. out:
  3881. if (ret == 0) {
  3882. priv->stats.pm_resume++;
  3883. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3884. } else {
  3885. priv->stats.pm_resume_err++;
  3886. }
  3887. return ret;
  3888. }
  3889. static int icnss_pm_suspend_noirq(struct device *dev)
  3890. {
  3891. struct icnss_priv *priv = dev_get_drvdata(dev);
  3892. int ret = 0;
  3893. if (priv->magic != ICNSS_MAGIC) {
  3894. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3895. dev, priv, priv->magic);
  3896. return -EINVAL;
  3897. }
  3898. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3899. if (!priv->ops || !priv->ops->suspend_noirq ||
  3900. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3901. goto out;
  3902. ret = priv->ops->suspend_noirq(dev);
  3903. out:
  3904. if (ret == 0) {
  3905. priv->stats.pm_suspend_noirq++;
  3906. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3907. } else {
  3908. priv->stats.pm_suspend_noirq_err++;
  3909. }
  3910. return ret;
  3911. }
  3912. static int icnss_pm_resume_noirq(struct device *dev)
  3913. {
  3914. struct icnss_priv *priv = dev_get_drvdata(dev);
  3915. int ret = 0;
  3916. if (priv->magic != ICNSS_MAGIC) {
  3917. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3918. dev, priv, priv->magic);
  3919. return -EINVAL;
  3920. }
  3921. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3922. if (!priv->ops || !priv->ops->resume_noirq ||
  3923. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3924. goto out;
  3925. ret = priv->ops->resume_noirq(dev);
  3926. out:
  3927. if (ret == 0) {
  3928. priv->stats.pm_resume_noirq++;
  3929. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3930. } else {
  3931. priv->stats.pm_resume_noirq_err++;
  3932. }
  3933. return ret;
  3934. }
  3935. static int icnss_pm_runtime_suspend(struct device *dev)
  3936. {
  3937. struct icnss_priv *priv = dev_get_drvdata(dev);
  3938. int ret = 0;
  3939. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3940. icnss_pr_err("Ignore runtime suspend:\n");
  3941. goto out;
  3942. }
  3943. if (priv->magic != ICNSS_MAGIC) {
  3944. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3945. dev, priv, priv->magic);
  3946. return -EINVAL;
  3947. }
  3948. if (!priv->ops || !priv->ops->runtime_suspend ||
  3949. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3950. goto out;
  3951. icnss_pr_vdbg("Runtime suspend\n");
  3952. ret = priv->ops->runtime_suspend(dev);
  3953. if (!ret) {
  3954. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3955. !test_bit(ICNSS_MODE_ON, &priv->state))
  3956. return 0;
  3957. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3958. ICNSS_SMP2P_OUT_POWER_SAVE);
  3959. }
  3960. out:
  3961. return ret;
  3962. }
  3963. static int icnss_pm_runtime_resume(struct device *dev)
  3964. {
  3965. struct icnss_priv *priv = dev_get_drvdata(dev);
  3966. int ret = 0;
  3967. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3968. icnss_pr_err("Ignore runtime resume\n");
  3969. goto out;
  3970. }
  3971. if (priv->magic != ICNSS_MAGIC) {
  3972. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3973. dev, priv, priv->magic);
  3974. return -EINVAL;
  3975. }
  3976. if (!priv->ops || !priv->ops->runtime_resume ||
  3977. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3978. goto out;
  3979. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3980. ret = priv->ops->runtime_resume(dev);
  3981. out:
  3982. return ret;
  3983. }
  3984. static int icnss_pm_runtime_idle(struct device *dev)
  3985. {
  3986. struct icnss_priv *priv = dev_get_drvdata(dev);
  3987. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3988. icnss_pr_err("Ignore runtime idle\n");
  3989. goto out;
  3990. }
  3991. icnss_pr_vdbg("Runtime idle\n");
  3992. pm_request_autosuspend(dev);
  3993. out:
  3994. return -EBUSY;
  3995. }
  3996. #endif
  3997. static const struct dev_pm_ops icnss_pm_ops = {
  3998. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3999. icnss_pm_resume)
  4000. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4001. icnss_pm_resume_noirq)
  4002. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4003. icnss_pm_runtime_idle)
  4004. };
  4005. static struct platform_driver icnss_driver = {
  4006. .probe = icnss_probe,
  4007. .remove = icnss_remove,
  4008. .driver = {
  4009. .name = "icnss2",
  4010. .pm = &icnss_pm_ops,
  4011. .of_match_table = icnss_dt_match,
  4012. },
  4013. };
  4014. static int __init icnss_initialize(void)
  4015. {
  4016. icnss_debug_init();
  4017. return platform_driver_register(&icnss_driver);
  4018. }
  4019. static void __exit icnss_exit(void)
  4020. {
  4021. platform_driver_unregister(&icnss_driver);
  4022. icnss_debug_deinit();
  4023. }
  4024. module_init(icnss_initialize);
  4025. module_exit(icnss_exit);
  4026. MODULE_LICENSE("GPL v2");
  4027. MODULE_DESCRIPTION("iWCN CORE platform driver");