main.c 127 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <linux/version.h>
  46. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  47. #include <trace/hooks/remoteproc.h>
  48. #endif
  49. #ifdef SLATE_MODULE_ENABLED
  50. #include <linux/soc/qcom/slatecom_interface.h>
  51. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  52. #include <uapi/linux/slatecom_interface.h>
  53. #endif
  54. #include "main.h"
  55. #include "qmi.h"
  56. #include "debug.h"
  57. #include "power.h"
  58. #include "genl.h"
  59. #define MAX_PROP_SIZE 32
  60. #define NUM_LOG_PAGES 10
  61. #define NUM_LOG_LONG_PAGES 4
  62. #define ICNSS_MAGIC 0x5abc5abc
  63. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  64. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  65. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  66. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  67. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  68. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  69. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  70. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  71. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  72. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  73. #define ICNSS_MAX_PROBE_CNT 2
  74. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  75. #define PROBE_TIMEOUT 15000
  76. #define SMP2P_SOC_WAKE_TIMEOUT 500
  77. #ifdef CONFIG_ICNSS2_DEBUG
  78. static unsigned long qmi_timeout = 3000;
  79. module_param(qmi_timeout, ulong, 0600);
  80. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  81. #else
  82. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  83. #endif
  84. #define ICNSS_RECOVERY_TIMEOUT 60000
  85. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  86. #define ICNSS_CAL_TIMEOUT 40000
  87. static struct icnss_priv *penv;
  88. static struct work_struct wpss_loader;
  89. static struct work_struct wpss_ssr_work;
  90. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  91. #define ICNSS_EVENT_PENDING 2989
  92. #define ICNSS_EVENT_SYNC BIT(0)
  93. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  94. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  95. ICNSS_EVENT_SYNC)
  96. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  97. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  98. #define SMP2P_GET_MAX_RETRY 4
  99. #define SMP2P_GET_RETRY_DELAY_MS 500
  100. #define RAMDUMP_NUM_DEVICES 256
  101. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  102. #define WLAN_EN_TEMP_THRESHOLD 5000
  103. #define WLAN_EN_DELAY 500
  104. #define ICNSS_RPROC_LEN 10
  105. static DEFINE_IDA(rd_minor_id);
  106. enum icnss_pdr_cause_index {
  107. ICNSS_FW_CRASH,
  108. ICNSS_ROOT_PD_CRASH,
  109. ICNSS_ROOT_PD_SHUTDOWN,
  110. ICNSS_HOST_ERROR,
  111. };
  112. static const char * const icnss_pdr_cause[] = {
  113. [ICNSS_FW_CRASH] = "FW crash",
  114. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  115. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  116. [ICNSS_HOST_ERROR] = "Host error",
  117. };
  118. static void icnss_set_plat_priv(struct icnss_priv *priv)
  119. {
  120. penv = priv;
  121. }
  122. static struct icnss_priv *icnss_get_plat_priv(void)
  123. {
  124. return penv;
  125. }
  126. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  127. {
  128. if (priv && priv->rproc) {
  129. rproc_shutdown(priv->rproc);
  130. rproc_put(priv->rproc);
  131. priv->rproc = NULL;
  132. }
  133. }
  134. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  135. struct kobj_attribute *attr,
  136. const char *buf, size_t count)
  137. {
  138. struct icnss_priv *priv = icnss_get_plat_priv();
  139. if (!priv)
  140. return count;
  141. icnss_pr_dbg("Received shutdown indication");
  142. atomic_set(&priv->is_shutdown, true);
  143. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  144. priv->device_id == ADRASTEA_DEVICE_ID)
  145. icnss_wpss_unload(priv);
  146. return count;
  147. }
  148. static struct kobj_attribute icnss_sysfs_attribute =
  149. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  150. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  151. {
  152. if (atomic_inc_return(&priv->pm_count) != 1)
  153. return;
  154. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  155. atomic_read(&priv->pm_count));
  156. pm_stay_awake(&priv->pdev->dev);
  157. priv->stats.pm_stay_awake++;
  158. }
  159. static void icnss_pm_relax(struct icnss_priv *priv)
  160. {
  161. int r = atomic_dec_return(&priv->pm_count);
  162. WARN_ON(r < 0);
  163. if (r != 0)
  164. return;
  165. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  166. atomic_read(&priv->pm_count));
  167. pm_relax(&priv->pdev->dev);
  168. priv->stats.pm_relax++;
  169. }
  170. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  171. {
  172. switch (type) {
  173. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  174. return "SERVER_ARRIVE";
  175. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  176. return "SERVER_EXIT";
  177. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  178. return "FW_READY";
  179. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  180. return "REGISTER_DRIVER";
  181. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  182. return "UNREGISTER_DRIVER";
  183. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  184. return "PD_SERVICE_DOWN";
  185. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  186. return "FW_EARLY_CRASH_IND";
  187. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  188. return "IDLE_SHUTDOWN";
  189. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  190. return "IDLE_RESTART";
  191. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  192. return "FW_INIT_DONE";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  194. return "QDSS_TRACE_REQ_MEM";
  195. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  196. return "QDSS_TRACE_SAVE";
  197. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  198. return "QDSS_TRACE_FREE";
  199. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  200. return "M3_DUMP_UPLOAD";
  201. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  202. return "QDSS_TRACE_REQ_DATA";
  203. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  204. return "SUBSYS_RESTART_LEVEL";
  205. case ICNSS_DRIVER_EVENT_MAX:
  206. return "EVENT_MAX";
  207. }
  208. return "UNKNOWN";
  209. };
  210. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  211. {
  212. switch (type) {
  213. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  214. return "SOC_WAKE_REQUEST";
  215. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  216. return "SOC_WAKE_RELEASE";
  217. case ICNSS_SOC_WAKE_EVENT_MAX:
  218. return "SOC_EVENT_MAX";
  219. }
  220. return "UNKNOWN";
  221. };
  222. int icnss_driver_event_post(struct icnss_priv *priv,
  223. enum icnss_driver_event_type type,
  224. u32 flags, void *data)
  225. {
  226. struct icnss_driver_event *event;
  227. unsigned long irq_flags;
  228. int gfp = GFP_KERNEL;
  229. int ret = 0;
  230. if (!priv)
  231. return -ENODEV;
  232. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  233. icnss_driver_event_to_str(type), type, current->comm,
  234. flags, priv->state);
  235. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  236. icnss_pr_err("Invalid Event type: %d, can't post", type);
  237. return -EINVAL;
  238. }
  239. if (in_interrupt() || irqs_disabled())
  240. gfp = GFP_ATOMIC;
  241. event = kzalloc(sizeof(*event), gfp);
  242. if (event == NULL)
  243. return -ENOMEM;
  244. icnss_pm_stay_awake(priv);
  245. event->type = type;
  246. event->data = data;
  247. init_completion(&event->complete);
  248. event->ret = ICNSS_EVENT_PENDING;
  249. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  250. spin_lock_irqsave(&priv->event_lock, irq_flags);
  251. list_add_tail(&event->list, &priv->event_list);
  252. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  253. priv->stats.events[type].posted++;
  254. queue_work(priv->event_wq, &priv->event_work);
  255. if (!(flags & ICNSS_EVENT_SYNC))
  256. goto out;
  257. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  258. wait_for_completion(&event->complete);
  259. else
  260. ret = wait_for_completion_interruptible(&event->complete);
  261. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  262. icnss_driver_event_to_str(type), type, priv->state, ret,
  263. event->ret);
  264. spin_lock_irqsave(&priv->event_lock, irq_flags);
  265. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  266. event->sync = false;
  267. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  268. ret = -EINTR;
  269. goto out;
  270. }
  271. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  272. ret = event->ret;
  273. kfree(event);
  274. out:
  275. icnss_pm_relax(priv);
  276. return ret;
  277. }
  278. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  279. enum icnss_soc_wake_event_type type,
  280. u32 flags, void *data)
  281. {
  282. struct icnss_soc_wake_event *event;
  283. unsigned long irq_flags;
  284. int gfp = GFP_KERNEL;
  285. int ret = 0;
  286. if (!priv)
  287. return -ENODEV;
  288. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  289. icnss_soc_wake_event_to_str(type),
  290. type, current->comm, flags, priv->state);
  291. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  292. icnss_pr_err("Invalid Event type: %d, can't post", type);
  293. return -EINVAL;
  294. }
  295. if (in_interrupt() || irqs_disabled())
  296. gfp = GFP_ATOMIC;
  297. event = kzalloc(sizeof(*event), gfp);
  298. if (!event)
  299. return -ENOMEM;
  300. icnss_pm_stay_awake(priv);
  301. event->type = type;
  302. event->data = data;
  303. init_completion(&event->complete);
  304. event->ret = ICNSS_EVENT_PENDING;
  305. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  306. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  307. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  308. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  309. priv->stats.soc_wake_events[type].posted++;
  310. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  311. if (!(flags & ICNSS_EVENT_SYNC))
  312. goto out;
  313. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  314. wait_for_completion(&event->complete);
  315. else
  316. ret = wait_for_completion_interruptible(&event->complete);
  317. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  318. icnss_soc_wake_event_to_str(type),
  319. type, priv->state, ret, event->ret);
  320. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  321. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  322. event->sync = false;
  323. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  324. ret = -EINTR;
  325. goto out;
  326. }
  327. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  328. ret = event->ret;
  329. kfree(event);
  330. out:
  331. icnss_pm_relax(priv);
  332. return ret;
  333. }
  334. bool icnss_is_fw_ready(void)
  335. {
  336. if (!penv)
  337. return false;
  338. else
  339. return test_bit(ICNSS_FW_READY, &penv->state);
  340. }
  341. EXPORT_SYMBOL(icnss_is_fw_ready);
  342. void icnss_block_shutdown(bool status)
  343. {
  344. if (!penv)
  345. return;
  346. if (status) {
  347. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  348. reinit_completion(&penv->unblock_shutdown);
  349. } else {
  350. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  351. complete(&penv->unblock_shutdown);
  352. }
  353. }
  354. EXPORT_SYMBOL(icnss_block_shutdown);
  355. bool icnss_is_fw_down(void)
  356. {
  357. struct icnss_priv *priv = icnss_get_plat_priv();
  358. if (!priv)
  359. return false;
  360. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  361. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  362. test_bit(ICNSS_REJUVENATE, &priv->state);
  363. }
  364. EXPORT_SYMBOL(icnss_is_fw_down);
  365. unsigned long icnss_get_device_config(void)
  366. {
  367. struct icnss_priv *priv = icnss_get_plat_priv();
  368. if (!priv)
  369. return 0;
  370. return priv->device_config;
  371. }
  372. EXPORT_SYMBOL(icnss_get_device_config);
  373. bool icnss_is_rejuvenate(void)
  374. {
  375. if (!penv)
  376. return false;
  377. else
  378. return test_bit(ICNSS_REJUVENATE, &penv->state);
  379. }
  380. EXPORT_SYMBOL(icnss_is_rejuvenate);
  381. bool icnss_is_pdr(void)
  382. {
  383. if (!penv)
  384. return false;
  385. else
  386. return test_bit(ICNSS_PDR, &penv->state);
  387. }
  388. EXPORT_SYMBOL(icnss_is_pdr);
  389. static int icnss_send_smp2p(struct icnss_priv *priv,
  390. enum icnss_smp2p_msg_id msg_id,
  391. enum smp2p_out_entry smp2p_entry)
  392. {
  393. unsigned int value = 0;
  394. int ret;
  395. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  396. return -EINVAL;
  397. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  398. if (msg_id == ICNSS_RESET_MSG) {
  399. priv->smp2p_info[smp2p_entry].seq = 0;
  400. ret = qcom_smem_state_update_bits(
  401. priv->smp2p_info[smp2p_entry].smem_state,
  402. ICNSS_SMEM_VALUE_MASK,
  403. 0);
  404. if (ret)
  405. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  406. ret, icnss_smp2p_str[smp2p_entry]);
  407. return ret;
  408. }
  409. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  410. !test_bit(ICNSS_FW_READY, &priv->state)) {
  411. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  412. priv->state);
  413. return -EINVAL;
  414. }
  415. value |= priv->smp2p_info[smp2p_entry].seq++;
  416. value <<= ICNSS_SMEM_SEQ_NO_POS;
  417. value |= msg_id;
  418. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  419. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  420. reinit_completion(&penv->smp2p_soc_wake_wait);
  421. ret = qcom_smem_state_update_bits(
  422. priv->smp2p_info[smp2p_entry].smem_state,
  423. ICNSS_SMEM_VALUE_MASK,
  424. value);
  425. if (ret) {
  426. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  427. icnss_smp2p_str[smp2p_entry]);
  428. } else {
  429. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  430. msg_id == ICNSS_SOC_WAKE_REL) {
  431. if (!wait_for_completion_timeout(
  432. &priv->smp2p_soc_wake_wait,
  433. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  434. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  435. icnss_smp2p_str[smp2p_entry]);
  436. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  437. ICNSS_ASSERT(0);
  438. }
  439. }
  440. }
  441. return ret;
  442. }
  443. bool icnss_is_low_power(void)
  444. {
  445. if (!penv)
  446. return false;
  447. else
  448. return test_bit(ICNSS_LOW_POWER, &penv->state);
  449. }
  450. EXPORT_SYMBOL(icnss_is_low_power);
  451. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  452. {
  453. struct icnss_priv *priv = ctx;
  454. if (priv)
  455. priv->force_err_fatal = true;
  456. icnss_pr_err("Received force error fatal request from FW\n");
  457. return IRQ_HANDLED;
  458. }
  459. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  460. {
  461. struct icnss_priv *priv = ctx;
  462. struct icnss_uevent_fw_down_data fw_down_data = {0};
  463. icnss_pr_err("Received early crash indication from FW\n");
  464. if (priv) {
  465. if (priv->wpss_self_recovery_enabled)
  466. mod_timer(&priv->wpss_ssr_timer,
  467. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  468. set_bit(ICNSS_FW_DOWN, &priv->state);
  469. icnss_ignore_fw_timeout(true);
  470. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  471. clear_bit(ICNSS_FW_READY, &priv->state);
  472. fw_down_data.crashed = true;
  473. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  474. &fw_down_data);
  475. }
  476. }
  477. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  478. 0, NULL);
  479. return IRQ_HANDLED;
  480. }
  481. static void register_fw_error_notifications(struct device *dev)
  482. {
  483. struct icnss_priv *priv = dev_get_drvdata(dev);
  484. struct device_node *dev_node;
  485. int irq = 0, ret = 0;
  486. if (!priv)
  487. return;
  488. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  489. if (!dev_node) {
  490. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  491. return;
  492. }
  493. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  494. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  495. ret = irq = of_irq_get_byname(dev_node,
  496. "qcom,smp2p-force-fatal-error");
  497. if (ret < 0) {
  498. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  499. irq);
  500. return;
  501. }
  502. }
  503. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  504. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  505. "wlanfw-err", priv);
  506. if (ret < 0) {
  507. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  508. irq, ret);
  509. return;
  510. }
  511. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  512. priv->fw_error_fatal_irq = irq;
  513. }
  514. static void register_early_crash_notifications(struct device *dev)
  515. {
  516. struct icnss_priv *priv = dev_get_drvdata(dev);
  517. struct device_node *dev_node;
  518. int irq = 0, ret = 0;
  519. if (!priv)
  520. return;
  521. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  522. if (!dev_node) {
  523. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  524. return;
  525. }
  526. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  527. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  528. ret = irq = of_irq_get_byname(dev_node,
  529. "qcom,smp2p-early-crash-ind");
  530. if (ret < 0) {
  531. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  532. irq);
  533. return;
  534. }
  535. }
  536. ret = devm_request_threaded_irq(dev, irq, NULL,
  537. fw_crash_indication_handler,
  538. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  539. "wlanfw-early-crash-ind", priv);
  540. if (ret < 0) {
  541. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  542. irq, ret);
  543. return;
  544. }
  545. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  546. priv->fw_early_crash_irq = irq;
  547. }
  548. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  549. {
  550. struct thermal_zone_device *thermal_dev;
  551. const char *tsens;
  552. int ret;
  553. ret = of_property_read_string(priv->pdev->dev.of_node,
  554. "tsens",
  555. &tsens);
  556. if (ret)
  557. return ret;
  558. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  559. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  560. if (IS_ERR(thermal_dev)) {
  561. icnss_pr_err("Fail to get thermal zone. ret: %d",
  562. PTR_ERR(thermal_dev));
  563. return PTR_ERR(thermal_dev);
  564. }
  565. ret = thermal_zone_get_temp(thermal_dev, temp);
  566. if (ret)
  567. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  568. return ret;
  569. }
  570. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  571. {
  572. struct icnss_priv *priv = ctx;
  573. if (priv)
  574. complete(&priv->smp2p_soc_wake_wait);
  575. return IRQ_HANDLED;
  576. }
  577. static void register_soc_wake_notif(struct device *dev)
  578. {
  579. struct icnss_priv *priv = dev_get_drvdata(dev);
  580. struct device_node *dev_node;
  581. int irq = 0, ret = 0;
  582. if (!priv)
  583. return;
  584. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  585. if (!dev_node) {
  586. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  587. return;
  588. }
  589. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  590. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  591. ret = irq = of_irq_get_byname(dev_node,
  592. "qcom,smp2p-soc-wake-ack");
  593. if (ret < 0) {
  594. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  595. irq);
  596. return;
  597. }
  598. }
  599. ret = devm_request_threaded_irq(dev, irq, NULL,
  600. fw_soc_wake_ack_handler,
  601. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  602. IRQF_TRIGGER_FALLING,
  603. "wlanfw-soc-wake-ack", priv);
  604. if (ret < 0) {
  605. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  606. irq, ret);
  607. return;
  608. }
  609. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  610. priv->fw_soc_wake_ack_irq = irq;
  611. }
  612. int icnss_call_driver_uevent(struct icnss_priv *priv,
  613. enum icnss_uevent uevent, void *data)
  614. {
  615. struct icnss_uevent_data uevent_data;
  616. if (!priv->ops || !priv->ops->uevent)
  617. return 0;
  618. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  619. priv->state, uevent);
  620. uevent_data.uevent = uevent;
  621. uevent_data.data = data;
  622. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  623. }
  624. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  625. {
  626. int i;
  627. int ret = 0;
  628. ret = icnss_qmi_get_dms_mac(priv);
  629. if (ret == 0 && priv->dms.mac_valid)
  630. goto qmi_send;
  631. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  632. * Thus assert on failure to get MAC from DMS even after retries
  633. */
  634. if (priv->use_nv_mac) {
  635. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  636. if (priv->dms.mac_valid)
  637. break;
  638. ret = icnss_qmi_get_dms_mac(priv);
  639. if (ret != -EAGAIN)
  640. break;
  641. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  642. }
  643. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  644. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  645. ICNSS_ASSERT(0);
  646. return -EINVAL;
  647. }
  648. }
  649. qmi_send:
  650. if (priv->dms.mac_valid)
  651. ret =
  652. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  653. ARRAY_SIZE(priv->dms.mac));
  654. return ret;
  655. }
  656. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  657. enum smp2p_out_entry smp2p_entry)
  658. {
  659. int retry = 0;
  660. int error;
  661. if (priv->smp2p_info[smp2p_entry].smem_state)
  662. return;
  663. retry:
  664. priv->smp2p_info[smp2p_entry].smem_state =
  665. qcom_smem_state_get(&priv->pdev->dev,
  666. icnss_smp2p_str[smp2p_entry],
  667. &priv->smp2p_info[smp2p_entry].smem_bit);
  668. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  669. if (retry++ < SMP2P_GET_MAX_RETRY) {
  670. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  671. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  672. error, icnss_smp2p_str[smp2p_entry]);
  673. msleep(SMP2P_GET_RETRY_DELAY_MS);
  674. goto retry;
  675. }
  676. ICNSS_ASSERT(0);
  677. return;
  678. }
  679. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  680. }
  681. static inline
  682. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  683. {
  684. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  685. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  686. } else {
  687. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  688. }
  689. }
  690. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  691. {
  692. switch (val) {
  693. case WLAN_RF_SLATE:
  694. return WLFW_WLAN_RF_SLATE_V01;
  695. case WLAN_RF_APACHE:
  696. return WLFW_WLAN_RF_APACHE_V01;
  697. default:
  698. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  699. }
  700. }
  701. #ifdef SLATE_MODULE_ENABLED
  702. static void icnss_send_wlan_boot_init(void)
  703. {
  704. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  705. icnss_pr_info("sent wlan boot init command\n");
  706. }
  707. static void icnss_send_wlan_boot_complete(void)
  708. {
  709. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  710. icnss_pr_info("sent wlan boot complete command\n");
  711. }
  712. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  713. {
  714. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  715. reinit_completion(&priv->slate_boot_complete);
  716. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  717. priv->state);
  718. wait_for_completion(&priv->slate_boot_complete);
  719. }
  720. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  721. return -EINVAL;
  722. icnss_send_wlan_boot_init();
  723. return 0;
  724. }
  725. #else
  726. static void icnss_send_wlan_boot_complete(void)
  727. {
  728. }
  729. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  730. {
  731. return 0;
  732. }
  733. #endif
  734. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  735. void *data)
  736. {
  737. int ret = 0;
  738. int temp = 0;
  739. bool ignore_assert = false;
  740. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  741. if (!priv)
  742. return -ENODEV;
  743. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  744. clear_bit(ICNSS_FW_DOWN, &priv->state);
  745. clear_bit(ICNSS_FW_READY, &priv->state);
  746. if (priv->is_slate_rfa) {
  747. ret = icnss_wait_for_slate_complete(priv);
  748. if (ret == -EINVAL) {
  749. icnss_pr_err("Slate complete failed\n");
  750. return ret;
  751. }
  752. }
  753. icnss_ignore_fw_timeout(false);
  754. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  755. icnss_pr_err("QMI Server already in Connected State\n");
  756. ICNSS_ASSERT(0);
  757. }
  758. ret = icnss_connect_to_fw_server(priv, data);
  759. if (ret)
  760. goto fail;
  761. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  762. ret = wlfw_ind_register_send_sync_msg(priv);
  763. if (ret < 0) {
  764. if (ret == -EALREADY) {
  765. ret = 0;
  766. goto qmi_registered;
  767. }
  768. ignore_assert = true;
  769. goto fail;
  770. }
  771. if (priv->is_rf_subtype_valid) {
  772. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  773. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  774. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  775. if (ret < 0)
  776. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  777. ret);
  778. } else {
  779. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  780. priv->rf_subtype);
  781. }
  782. }
  783. if (priv->device_id == WCN6750_DEVICE_ID ||
  784. priv->device_id == WCN6450_DEVICE_ID) {
  785. if (!icnss_get_temperature(priv, &temp)) {
  786. icnss_pr_dbg("Temperature: %d\n", temp);
  787. if (temp < WLAN_EN_TEMP_THRESHOLD)
  788. icnss_set_wlan_en_delay(priv);
  789. }
  790. ret = wlfw_host_cap_send_sync(priv);
  791. if (ret < 0)
  792. goto fail;
  793. }
  794. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  795. if (!priv->msa_va) {
  796. icnss_pr_err("Invalid MSA address\n");
  797. ret = -EINVAL;
  798. goto fail;
  799. }
  800. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  801. if (ret < 0) {
  802. ignore_assert = true;
  803. goto fail;
  804. }
  805. ret = wlfw_msa_ready_send_sync_msg(priv);
  806. if (ret < 0) {
  807. ignore_assert = true;
  808. goto fail;
  809. }
  810. }
  811. if (priv->device_id == WCN6450_DEVICE_ID)
  812. icnss_hw_power_off(priv);
  813. ret = wlfw_cap_send_sync_msg(priv);
  814. if (ret < 0) {
  815. ignore_assert = true;
  816. goto fail;
  817. }
  818. ret = icnss_hw_power_on(priv);
  819. if (ret)
  820. goto fail;
  821. if (priv->device_id == WCN6750_DEVICE_ID ||
  822. priv->device_id == WCN6450_DEVICE_ID) {
  823. ret = wlfw_device_info_send_msg(priv);
  824. if (ret < 0) {
  825. ignore_assert = true;
  826. goto device_info_failure;
  827. }
  828. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  829. priv->mem_base_pa,
  830. priv->mem_base_size);
  831. if (!priv->mem_base_va) {
  832. icnss_pr_err("Ioremap failed for bar address\n");
  833. goto device_info_failure;
  834. }
  835. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  836. &priv->mem_base_pa,
  837. priv->mem_base_va);
  838. if (priv->mhi_state_info_pa)
  839. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  840. priv->mhi_state_info_pa,
  841. PAGE_SIZE);
  842. if (!priv->mhi_state_info_va)
  843. icnss_pr_err("Ioremap failed for MHI info address\n");
  844. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  845. &priv->mhi_state_info_pa,
  846. priv->mhi_state_info_va);
  847. }
  848. if (priv->bdf_download_support) {
  849. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  850. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  851. priv->ctrl_params.bdf_type);
  852. if (ret < 0)
  853. goto device_info_failure;
  854. }
  855. if (priv->device_id == WCN6450_DEVICE_ID) {
  856. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  857. if (ret < 0)
  858. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  859. ret);
  860. }
  861. if (priv->device_id == WCN6750_DEVICE_ID ||
  862. priv->device_id == WCN6450_DEVICE_ID) {
  863. if (!priv->fw_soc_wake_ack_irq)
  864. register_soc_wake_notif(&priv->pdev->dev);
  865. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  866. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  867. }
  868. if (priv->wpss_supported)
  869. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  870. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  871. if (priv->bdf_download_support) {
  872. ret = wlfw_cal_report_req(priv);
  873. if (ret < 0)
  874. goto device_info_failure;
  875. }
  876. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  877. dynamic_feature_mask);
  878. }
  879. if (!priv->fw_error_fatal_irq)
  880. register_fw_error_notifications(&priv->pdev->dev);
  881. if (!priv->fw_early_crash_irq)
  882. register_early_crash_notifications(&priv->pdev->dev);
  883. if (priv->psf_supported)
  884. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  885. return ret;
  886. device_info_failure:
  887. icnss_hw_power_off(priv);
  888. fail:
  889. ICNSS_ASSERT(ignore_assert);
  890. qmi_registered:
  891. return ret;
  892. }
  893. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  894. {
  895. if (!priv)
  896. return -ENODEV;
  897. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  898. icnss_clear_server(priv);
  899. if (priv->psf_supported)
  900. priv->last_updated_voltage = 0;
  901. return 0;
  902. }
  903. static int icnss_call_driver_probe(struct icnss_priv *priv)
  904. {
  905. int ret = 0;
  906. int probe_cnt = 0;
  907. if (!priv->ops || !priv->ops->probe)
  908. return 0;
  909. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  910. return -EINVAL;
  911. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  912. icnss_hw_power_on(priv);
  913. icnss_block_shutdown(true);
  914. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  915. ret = priv->ops->probe(&priv->pdev->dev);
  916. probe_cnt++;
  917. if (ret != -EPROBE_DEFER)
  918. break;
  919. }
  920. if (ret < 0) {
  921. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  922. ret, priv->state, probe_cnt);
  923. icnss_block_shutdown(false);
  924. goto out;
  925. }
  926. icnss_block_shutdown(false);
  927. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  928. return 0;
  929. out:
  930. icnss_hw_power_off(priv);
  931. return ret;
  932. }
  933. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  934. {
  935. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  936. goto out;
  937. if (!priv->ops || !priv->ops->shutdown)
  938. goto out;
  939. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  940. goto out;
  941. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  942. priv->ops->shutdown(&priv->pdev->dev);
  943. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  944. out:
  945. return 0;
  946. }
  947. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  948. {
  949. int ret = 0;
  950. icnss_pm_relax(priv);
  951. icnss_call_driver_shutdown(priv);
  952. clear_bit(ICNSS_PDR, &priv->state);
  953. clear_bit(ICNSS_REJUVENATE, &priv->state);
  954. clear_bit(ICNSS_PD_RESTART, &priv->state);
  955. clear_bit(ICNSS_LOW_POWER, &priv->state);
  956. priv->early_crash_ind = false;
  957. priv->is_ssr = false;
  958. if (!priv->ops || !priv->ops->reinit)
  959. goto out;
  960. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  961. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  962. priv->state);
  963. goto out;
  964. }
  965. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  966. goto call_probe;
  967. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  968. icnss_hw_power_on(priv);
  969. icnss_block_shutdown(true);
  970. ret = priv->ops->reinit(&priv->pdev->dev);
  971. if (ret < 0) {
  972. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  973. ret, priv->state);
  974. if (!priv->allow_recursive_recovery)
  975. ICNSS_ASSERT(false);
  976. icnss_block_shutdown(false);
  977. goto out_power_off;
  978. }
  979. icnss_block_shutdown(false);
  980. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  981. return 0;
  982. call_probe:
  983. return icnss_call_driver_probe(priv);
  984. out_power_off:
  985. icnss_hw_power_off(priv);
  986. out:
  987. return ret;
  988. }
  989. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  990. {
  991. int ret = 0;
  992. if (!priv)
  993. return -ENODEV;
  994. del_timer(&priv->recovery_timer);
  995. set_bit(ICNSS_FW_READY, &priv->state);
  996. clear_bit(ICNSS_MODE_ON, &priv->state);
  997. atomic_set(&priv->soc_wake_ref_count, 0);
  998. if (priv->device_id == WCN6750_DEVICE_ID ||
  999. priv->device_id == WCN6450_DEVICE_ID)
  1000. icnss_free_qdss_mem(priv);
  1001. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  1002. icnss_hw_power_off(priv);
  1003. if (!priv->pdev) {
  1004. icnss_pr_err("Device is not ready\n");
  1005. ret = -ENODEV;
  1006. goto out;
  1007. }
  1008. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1009. icnss_send_wlan_boot_complete();
  1010. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1011. ret = icnss_pd_restart_complete(priv);
  1012. } else {
  1013. if (priv->wpss_supported)
  1014. icnss_setup_dms_mac(priv);
  1015. ret = icnss_call_driver_probe(priv);
  1016. }
  1017. icnss_vreg_unvote(priv);
  1018. out:
  1019. return ret;
  1020. }
  1021. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1022. {
  1023. int ret = 0;
  1024. if (!priv)
  1025. return -ENODEV;
  1026. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1027. if (priv->device_id == WCN6750_DEVICE_ID) {
  1028. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1029. if (ret < 0)
  1030. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1031. ret);
  1032. }
  1033. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1034. mod_timer(&priv->recovery_timer,
  1035. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1036. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1037. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1038. } else {
  1039. icnss_driver_event_fw_ready_ind(priv, NULL);
  1040. }
  1041. return ret;
  1042. }
  1043. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1044. {
  1045. struct platform_device *pdev = priv->pdev;
  1046. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1047. int i, j;
  1048. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1049. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1050. qdss_mem[i].va =
  1051. dma_alloc_coherent(&pdev->dev,
  1052. qdss_mem[i].size,
  1053. &qdss_mem[i].pa,
  1054. GFP_KERNEL);
  1055. if (!qdss_mem[i].va) {
  1056. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1057. qdss_mem[i].size,
  1058. qdss_mem[i].type, i);
  1059. break;
  1060. }
  1061. }
  1062. }
  1063. /* Best-effort allocation for QDSS trace */
  1064. if (i < priv->qdss_mem_seg_len) {
  1065. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1066. qdss_mem[j].type = 0;
  1067. qdss_mem[j].size = 0;
  1068. }
  1069. priv->qdss_mem_seg_len = i;
  1070. }
  1071. return 0;
  1072. }
  1073. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1074. {
  1075. struct platform_device *pdev = priv->pdev;
  1076. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1077. int i;
  1078. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1079. if (qdss_mem[i].va && qdss_mem[i].size) {
  1080. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1081. &qdss_mem[i].pa, qdss_mem[i].size,
  1082. qdss_mem[i].type);
  1083. dma_free_coherent(&pdev->dev,
  1084. qdss_mem[i].size, qdss_mem[i].va,
  1085. qdss_mem[i].pa);
  1086. qdss_mem[i].va = NULL;
  1087. qdss_mem[i].pa = 0;
  1088. qdss_mem[i].size = 0;
  1089. qdss_mem[i].type = 0;
  1090. }
  1091. }
  1092. priv->qdss_mem_seg_len = 0;
  1093. }
  1094. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1095. {
  1096. int ret = 0;
  1097. ret = icnss_alloc_qdss_mem(priv);
  1098. if (ret < 0)
  1099. return ret;
  1100. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1101. }
  1102. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1103. u64 pa, u32 size, int *seg_id)
  1104. {
  1105. int i = 0;
  1106. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1107. u64 offset = 0;
  1108. void *va = NULL;
  1109. u64 local_pa;
  1110. u32 local_size;
  1111. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1112. local_pa = (u64)qdss_mem[i].pa;
  1113. local_size = (u32)qdss_mem[i].size;
  1114. if (pa == local_pa && size <= local_size) {
  1115. va = qdss_mem[i].va;
  1116. break;
  1117. }
  1118. if (pa > local_pa &&
  1119. pa < local_pa + local_size &&
  1120. pa + size <= local_pa + local_size) {
  1121. offset = pa - local_pa;
  1122. va = qdss_mem[i].va + offset;
  1123. break;
  1124. }
  1125. }
  1126. *seg_id = i;
  1127. return va;
  1128. }
  1129. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1130. void *data)
  1131. {
  1132. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1133. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1134. int ret = 0;
  1135. int i;
  1136. void *va = NULL;
  1137. u64 pa;
  1138. u32 size;
  1139. int seg_id = 0;
  1140. if (!priv->qdss_mem_seg_len) {
  1141. icnss_pr_err("Memory for QDSS trace is not available\n");
  1142. return -ENOMEM;
  1143. }
  1144. if (event_data->mem_seg_len == 0) {
  1145. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1146. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1147. ICNSS_GENL_MSG_TYPE_QDSS,
  1148. event_data->file_name,
  1149. qdss_mem[i].size);
  1150. if (ret < 0) {
  1151. icnss_pr_err("Fail to save QDSS data: %d\n",
  1152. ret);
  1153. break;
  1154. }
  1155. }
  1156. } else {
  1157. for (i = 0; i < event_data->mem_seg_len; i++) {
  1158. pa = event_data->mem_seg[i].addr;
  1159. size = event_data->mem_seg[i].size;
  1160. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1161. size, &seg_id);
  1162. if (!va) {
  1163. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1164. &pa);
  1165. ret = -EINVAL;
  1166. break;
  1167. }
  1168. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1169. event_data->file_name, size);
  1170. if (ret < 0) {
  1171. icnss_pr_err("Fail to save QDSS data: %d\n",
  1172. ret);
  1173. break;
  1174. }
  1175. }
  1176. }
  1177. kfree(data);
  1178. return ret;
  1179. }
  1180. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1181. {
  1182. int dec, c = atomic_read(v);
  1183. do {
  1184. dec = c - 1;
  1185. if (unlikely(dec < 1))
  1186. break;
  1187. } while (!atomic_try_cmpxchg(v, &c, dec));
  1188. return dec;
  1189. }
  1190. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1191. void *data)
  1192. {
  1193. int ret = 0;
  1194. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1195. if (!priv)
  1196. return -ENODEV;
  1197. if (!data)
  1198. return -EINVAL;
  1199. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1200. event_data->total_size);
  1201. kfree(data);
  1202. return ret;
  1203. }
  1204. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1205. {
  1206. int ret = 0;
  1207. if (!priv)
  1208. return -ENODEV;
  1209. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1210. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1211. atomic_read(&priv->soc_wake_ref_count));
  1212. return 0;
  1213. }
  1214. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1215. ICNSS_SMP2P_OUT_SOC_WAKE);
  1216. if (!ret)
  1217. atomic_inc(&priv->soc_wake_ref_count);
  1218. return ret;
  1219. }
  1220. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1221. {
  1222. int ret = 0;
  1223. if (!priv)
  1224. return -ENODEV;
  1225. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1226. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1227. priv->soc_wake_ref_count);
  1228. return 0;
  1229. }
  1230. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1231. ICNSS_SMP2P_OUT_SOC_WAKE);
  1232. return ret;
  1233. }
  1234. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1235. void *data)
  1236. {
  1237. int ret = 0;
  1238. int probe_cnt = 0;
  1239. if (priv->ops)
  1240. return -EEXIST;
  1241. priv->ops = data;
  1242. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1243. set_bit(ICNSS_FW_READY, &priv->state);
  1244. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1245. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1246. priv->state);
  1247. return -ENODEV;
  1248. }
  1249. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1250. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1251. priv->state);
  1252. goto out;
  1253. }
  1254. ret = icnss_hw_power_on(priv);
  1255. if (ret)
  1256. goto out;
  1257. icnss_block_shutdown(true);
  1258. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1259. ret = priv->ops->probe(&priv->pdev->dev);
  1260. probe_cnt++;
  1261. if (ret != -EPROBE_DEFER)
  1262. break;
  1263. }
  1264. if (ret) {
  1265. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1266. ret, priv->state, probe_cnt);
  1267. icnss_block_shutdown(false);
  1268. goto power_off;
  1269. }
  1270. icnss_block_shutdown(false);
  1271. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1272. return 0;
  1273. power_off:
  1274. icnss_hw_power_off(priv);
  1275. out:
  1276. return ret;
  1277. }
  1278. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1279. void *data)
  1280. {
  1281. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1282. priv->ops = NULL;
  1283. goto out;
  1284. }
  1285. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1286. icnss_block_shutdown(true);
  1287. if (priv->ops)
  1288. priv->ops->remove(&priv->pdev->dev);
  1289. icnss_block_shutdown(false);
  1290. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1291. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1292. priv->ops = NULL;
  1293. icnss_hw_power_off(priv);
  1294. out:
  1295. return 0;
  1296. }
  1297. static int icnss_fw_crashed(struct icnss_priv *priv,
  1298. struct icnss_event_pd_service_down_data *event_data)
  1299. {
  1300. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1301. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1302. set_bit(ICNSS_PD_RESTART, &priv->state);
  1303. icnss_pm_stay_awake(priv);
  1304. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1305. test_bit(ICNSS_FW_READY, &priv->state)) {
  1306. clear_bit(ICNSS_FW_READY, &priv->state);
  1307. fw_down_data.crashed = true;
  1308. icnss_call_driver_uevent(priv,
  1309. ICNSS_UEVENT_FW_DOWN,
  1310. &fw_down_data);
  1311. }
  1312. if (event_data && event_data->fw_rejuvenate)
  1313. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1314. return 0;
  1315. }
  1316. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1317. struct icnss_uevent_hang_data *hang_data)
  1318. {
  1319. if (!priv->hang_event_data_va)
  1320. return -EINVAL;
  1321. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1322. priv->hang_event_data_len,
  1323. GFP_ATOMIC);
  1324. if (!priv->hang_event_data)
  1325. return -ENOMEM;
  1326. // Update the hang event params
  1327. hang_data->hang_event_data = priv->hang_event_data;
  1328. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1329. return 0;
  1330. }
  1331. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1332. {
  1333. struct icnss_uevent_hang_data hang_data = {0};
  1334. int ret = 0xFF;
  1335. if (priv->early_crash_ind) {
  1336. ret = icnss_update_hang_event_data(priv, &hang_data);
  1337. if (ret)
  1338. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1339. }
  1340. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1341. &hang_data);
  1342. if (!ret) {
  1343. kfree(priv->hang_event_data);
  1344. priv->hang_event_data = NULL;
  1345. }
  1346. return 0;
  1347. }
  1348. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1349. void *data)
  1350. {
  1351. struct icnss_event_pd_service_down_data *event_data = data;
  1352. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1353. icnss_ignore_fw_timeout(false);
  1354. goto out;
  1355. }
  1356. if (priv->force_err_fatal)
  1357. ICNSS_ASSERT(0);
  1358. if (priv->device_id == WCN6750_DEVICE_ID ||
  1359. priv->device_id == WCN6450_DEVICE_ID) {
  1360. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1361. ICNSS_SMP2P_OUT_SOC_WAKE);
  1362. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1363. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1364. }
  1365. if (priv->wpss_supported)
  1366. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1367. ICNSS_SMP2P_OUT_POWER_SAVE);
  1368. icnss_send_hang_event_data(priv);
  1369. if (priv->early_crash_ind) {
  1370. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1371. event_data->crashed, priv->state);
  1372. goto out;
  1373. }
  1374. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1375. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1376. event_data->crashed, priv->state);
  1377. if (!priv->allow_recursive_recovery)
  1378. ICNSS_ASSERT(0);
  1379. goto out;
  1380. }
  1381. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1382. icnss_fw_crashed(priv, event_data);
  1383. out:
  1384. kfree(data);
  1385. return 0;
  1386. }
  1387. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1388. void *data)
  1389. {
  1390. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1391. icnss_ignore_fw_timeout(false);
  1392. goto out;
  1393. }
  1394. priv->early_crash_ind = true;
  1395. icnss_fw_crashed(priv, NULL);
  1396. out:
  1397. kfree(data);
  1398. return 0;
  1399. }
  1400. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1401. void *data)
  1402. {
  1403. int ret = 0;
  1404. if (!priv->ops || !priv->ops->idle_shutdown)
  1405. return 0;
  1406. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1407. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1408. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1409. ret = -EBUSY;
  1410. } else {
  1411. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1412. priv->state);
  1413. icnss_block_shutdown(true);
  1414. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1415. icnss_block_shutdown(false);
  1416. }
  1417. return ret;
  1418. }
  1419. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1420. void *data)
  1421. {
  1422. int ret = 0;
  1423. if (!priv->ops || !priv->ops->idle_restart)
  1424. return 0;
  1425. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1426. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1427. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1428. ret = -EBUSY;
  1429. } else {
  1430. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1431. priv->state);
  1432. icnss_block_shutdown(true);
  1433. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1434. icnss_block_shutdown(false);
  1435. }
  1436. return ret;
  1437. }
  1438. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1439. {
  1440. icnss_free_qdss_mem(priv);
  1441. return 0;
  1442. }
  1443. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1444. void *data)
  1445. {
  1446. struct icnss_m3_upload_segments_req_data *event_data = data;
  1447. struct qcom_dump_segment segment;
  1448. int i, status = 0, ret = 0;
  1449. struct list_head head;
  1450. if (!dump_enabled()) {
  1451. icnss_pr_info("Dump collection is not enabled\n");
  1452. return ret;
  1453. }
  1454. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1455. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1456. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1457. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1458. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1459. return ret;
  1460. INIT_LIST_HEAD(&head);
  1461. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1462. memset(&segment, 0, sizeof(segment));
  1463. segment.va = devm_ioremap(&priv->pdev->dev,
  1464. event_data->m3_segment[i].addr,
  1465. event_data->m3_segment[i].size);
  1466. if (!segment.va) {
  1467. icnss_pr_err("Failed to ioremap M3 Dump region");
  1468. ret = -ENOMEM;
  1469. goto send_resp;
  1470. }
  1471. segment.size = event_data->m3_segment[i].size;
  1472. list_add(&segment.node, &head);
  1473. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1474. event_data->m3_segment[i].name);
  1475. switch (event_data->m3_segment[i].type) {
  1476. case QMI_M3_SEGMENT_PHYAREG_V01:
  1477. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1478. break;
  1479. case QMI_M3_SEGMENT_PHYDBG_V01:
  1480. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1481. break;
  1482. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1483. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1484. break;
  1485. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1486. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1487. break;
  1488. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1489. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1490. break;
  1491. default:
  1492. icnss_pr_err("Invalid Segment type: %d",
  1493. event_data->m3_segment[i].type);
  1494. }
  1495. if (ret) {
  1496. status = ret;
  1497. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1498. event_data->m3_segment[i].name, ret);
  1499. }
  1500. list_del(&segment.node);
  1501. }
  1502. send_resp:
  1503. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1504. status);
  1505. return ret;
  1506. }
  1507. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1508. {
  1509. int ret = 0;
  1510. struct icnss_subsys_restart_level_data *event_data = data;
  1511. if (!priv)
  1512. return -ENODEV;
  1513. if (!data)
  1514. return -EINVAL;
  1515. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1516. kfree(data);
  1517. return ret;
  1518. }
  1519. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1520. {
  1521. int ret;
  1522. struct icnss_priv *priv = icnss_get_plat_priv();
  1523. rproc_shutdown(priv->rproc);
  1524. ret = rproc_boot(priv->rproc);
  1525. if (ret) {
  1526. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1527. rproc_put(priv->rproc);
  1528. }
  1529. }
  1530. static void icnss_driver_event_work(struct work_struct *work)
  1531. {
  1532. struct icnss_priv *priv =
  1533. container_of(work, struct icnss_priv, event_work);
  1534. struct icnss_driver_event *event;
  1535. unsigned long flags;
  1536. int ret;
  1537. icnss_pm_stay_awake(priv);
  1538. spin_lock_irqsave(&priv->event_lock, flags);
  1539. while (!list_empty(&priv->event_list)) {
  1540. event = list_first_entry(&priv->event_list,
  1541. struct icnss_driver_event, list);
  1542. list_del(&event->list);
  1543. spin_unlock_irqrestore(&priv->event_lock, flags);
  1544. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1545. icnss_driver_event_to_str(event->type),
  1546. event->sync ? "-sync" : "", event->type,
  1547. priv->state);
  1548. switch (event->type) {
  1549. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1550. ret = icnss_driver_event_server_arrive(priv,
  1551. event->data);
  1552. break;
  1553. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1554. ret = icnss_driver_event_server_exit(priv);
  1555. break;
  1556. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1557. ret = icnss_driver_event_fw_ready_ind(priv,
  1558. event->data);
  1559. break;
  1560. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1561. ret = icnss_driver_event_register_driver(priv,
  1562. event->data);
  1563. break;
  1564. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1565. ret = icnss_driver_event_unregister_driver(priv,
  1566. event->data);
  1567. break;
  1568. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1569. ret = icnss_driver_event_pd_service_down(priv,
  1570. event->data);
  1571. break;
  1572. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1573. ret = icnss_driver_event_early_crash_ind(priv,
  1574. event->data);
  1575. break;
  1576. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1577. ret = icnss_driver_event_idle_shutdown(priv,
  1578. event->data);
  1579. break;
  1580. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1581. ret = icnss_driver_event_idle_restart(priv,
  1582. event->data);
  1583. break;
  1584. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1585. ret = icnss_driver_event_fw_init_done(priv,
  1586. event->data);
  1587. break;
  1588. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1589. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1590. break;
  1591. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1592. ret = icnss_qdss_trace_save_hdlr(priv,
  1593. event->data);
  1594. break;
  1595. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1596. ret = icnss_qdss_trace_free_hdlr(priv);
  1597. break;
  1598. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1599. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1600. break;
  1601. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1602. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1603. event->data);
  1604. break;
  1605. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1606. ret = icnss_subsys_restart_level(priv, event->data);
  1607. break;
  1608. default:
  1609. icnss_pr_err("Invalid Event type: %d", event->type);
  1610. kfree(event);
  1611. continue;
  1612. }
  1613. priv->stats.events[event->type].processed++;
  1614. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1615. icnss_driver_event_to_str(event->type),
  1616. event->sync ? "-sync" : "", event->type, ret,
  1617. priv->state);
  1618. spin_lock_irqsave(&priv->event_lock, flags);
  1619. if (event->sync) {
  1620. event->ret = ret;
  1621. complete(&event->complete);
  1622. continue;
  1623. }
  1624. spin_unlock_irqrestore(&priv->event_lock, flags);
  1625. kfree(event);
  1626. spin_lock_irqsave(&priv->event_lock, flags);
  1627. }
  1628. spin_unlock_irqrestore(&priv->event_lock, flags);
  1629. icnss_pm_relax(priv);
  1630. }
  1631. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1632. {
  1633. struct icnss_priv *priv =
  1634. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1635. struct icnss_soc_wake_event *event;
  1636. unsigned long flags;
  1637. int ret;
  1638. icnss_pm_stay_awake(priv);
  1639. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1640. while (!list_empty(&priv->soc_wake_msg_list)) {
  1641. event = list_first_entry(&priv->soc_wake_msg_list,
  1642. struct icnss_soc_wake_event, list);
  1643. list_del(&event->list);
  1644. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1645. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1646. icnss_soc_wake_event_to_str(event->type),
  1647. event->sync ? "-sync" : "", event->type,
  1648. priv->state);
  1649. switch (event->type) {
  1650. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1651. ret = icnss_event_soc_wake_request(priv,
  1652. event->data);
  1653. break;
  1654. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1655. ret = icnss_event_soc_wake_release(priv,
  1656. event->data);
  1657. break;
  1658. default:
  1659. icnss_pr_err("Invalid Event type: %d", event->type);
  1660. kfree(event);
  1661. continue;
  1662. }
  1663. priv->stats.soc_wake_events[event->type].processed++;
  1664. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1665. icnss_soc_wake_event_to_str(event->type),
  1666. event->sync ? "-sync" : "", event->type, ret,
  1667. priv->state);
  1668. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1669. if (event->sync) {
  1670. event->ret = ret;
  1671. complete(&event->complete);
  1672. continue;
  1673. }
  1674. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1675. kfree(event);
  1676. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1677. }
  1678. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1679. icnss_pm_relax(priv);
  1680. }
  1681. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1682. {
  1683. int ret = 0;
  1684. struct qcom_dump_segment segment;
  1685. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1686. struct list_head head;
  1687. if (!dump_enabled()) {
  1688. icnss_pr_info("Dump collection is not enabled\n");
  1689. return ret;
  1690. }
  1691. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1692. return ret;
  1693. INIT_LIST_HEAD(&head);
  1694. memset(&segment, 0, sizeof(segment));
  1695. segment.va = priv->msa_va;
  1696. segment.size = priv->msa_mem_size;
  1697. list_add(&segment.node, &head);
  1698. if (!msa0_dump_dev->dev) {
  1699. icnss_pr_err("Created Dump Device not found\n");
  1700. return 0;
  1701. }
  1702. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1703. if (ret) {
  1704. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1705. return ret;
  1706. }
  1707. list_del(&segment.node);
  1708. return ret;
  1709. }
  1710. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1711. void *data)
  1712. {
  1713. struct qcom_ssr_notify_data *notif = data;
  1714. int ret = 0;
  1715. if (!notif->crashed) {
  1716. if (atomic_read(&priv->is_shutdown)) {
  1717. atomic_set(&priv->is_shutdown, false);
  1718. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1719. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1720. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1721. clear_bit(ICNSS_FW_READY, &priv->state);
  1722. icnss_driver_event_post(priv,
  1723. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1724. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1725. NULL);
  1726. }
  1727. }
  1728. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1729. if (!wait_for_completion_timeout(
  1730. &priv->unblock_shutdown,
  1731. msecs_to_jiffies(PROBE_TIMEOUT)))
  1732. icnss_pr_err("modem block shutdown timeout\n");
  1733. }
  1734. ret = wlfw_send_modem_shutdown_msg(priv);
  1735. if (ret < 0)
  1736. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1737. ret);
  1738. }
  1739. }
  1740. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1741. {
  1742. switch (code) {
  1743. case QCOM_SSR_BEFORE_POWERUP:
  1744. return "BEFORE_POWERUP";
  1745. case QCOM_SSR_AFTER_POWERUP:
  1746. return "AFTER_POWERUP";
  1747. case QCOM_SSR_BEFORE_SHUTDOWN:
  1748. return "BEFORE_SHUTDOWN";
  1749. case QCOM_SSR_AFTER_SHUTDOWN:
  1750. return "AFTER_SHUTDOWN";
  1751. default:
  1752. return "UNKNOWN";
  1753. }
  1754. };
  1755. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1756. unsigned long code,
  1757. void *data)
  1758. {
  1759. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1760. wpss_early_ssr_nb);
  1761. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1762. icnss_qcom_ssr_notify_state_to_str(code), code);
  1763. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1764. set_bit(ICNSS_FW_DOWN, &priv->state);
  1765. icnss_ignore_fw_timeout(true);
  1766. }
  1767. return NOTIFY_DONE;
  1768. }
  1769. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1770. unsigned long code,
  1771. void *data)
  1772. {
  1773. struct icnss_event_pd_service_down_data *event_data;
  1774. struct qcom_ssr_notify_data *notif = data;
  1775. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1776. wpss_ssr_nb);
  1777. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1778. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1779. icnss_qcom_ssr_notify_state_to_str(code), code);
  1780. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1781. icnss_pr_info("Collecting msa0 segment dump\n");
  1782. icnss_msa0_ramdump(priv);
  1783. goto out;
  1784. }
  1785. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1786. goto out;
  1787. if (priv->wpss_self_recovery_enabled)
  1788. del_timer(&priv->wpss_ssr_timer);
  1789. priv->is_ssr = true;
  1790. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1791. priv->state, notif->crashed);
  1792. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1793. icnss_update_state_send_modem_shutdown(priv, data);
  1794. set_bit(ICNSS_FW_DOWN, &priv->state);
  1795. icnss_ignore_fw_timeout(true);
  1796. if (notif->crashed)
  1797. priv->stats.recovery.root_pd_crash++;
  1798. else
  1799. priv->stats.recovery.root_pd_shutdown++;
  1800. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1801. if (event_data == NULL)
  1802. return notifier_from_errno(-ENOMEM);
  1803. event_data->crashed = notif->crashed;
  1804. fw_down_data.crashed = !!notif->crashed;
  1805. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1806. clear_bit(ICNSS_FW_READY, &priv->state);
  1807. fw_down_data.crashed = !!notif->crashed;
  1808. icnss_call_driver_uevent(priv,
  1809. ICNSS_UEVENT_FW_DOWN,
  1810. &fw_down_data);
  1811. }
  1812. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1813. ICNSS_EVENT_SYNC, event_data);
  1814. if (notif->crashed)
  1815. mod_timer(&priv->recovery_timer,
  1816. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1817. out:
  1818. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1819. return NOTIFY_OK;
  1820. }
  1821. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1822. unsigned long code,
  1823. void *data)
  1824. {
  1825. struct icnss_event_pd_service_down_data *event_data;
  1826. struct qcom_ssr_notify_data *notif = data;
  1827. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1828. modem_ssr_nb);
  1829. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1830. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1831. icnss_qcom_ssr_notify_state_to_str(code), code);
  1832. switch (code) {
  1833. case QCOM_SSR_BEFORE_SHUTDOWN:
  1834. if (priv->is_slate_rfa)
  1835. complete(&priv->slate_boot_complete);
  1836. if (!notif->crashed &&
  1837. priv->low_power_support) { /* Hibernate */
  1838. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1839. icnss_driver_event_post(
  1840. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1841. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1842. set_bit(ICNSS_LOW_POWER, &priv->state);
  1843. }
  1844. break;
  1845. case QCOM_SSR_AFTER_SHUTDOWN:
  1846. /* Collect ramdump only when there was a crash. */
  1847. if (notif->crashed) {
  1848. icnss_pr_info("Collecting msa0 segment dump\n");
  1849. icnss_msa0_ramdump(priv);
  1850. }
  1851. goto out;
  1852. default:
  1853. goto out;
  1854. }
  1855. priv->is_ssr = true;
  1856. if (notif->crashed) {
  1857. priv->stats.recovery.root_pd_crash++;
  1858. priv->root_pd_shutdown = false;
  1859. } else {
  1860. priv->stats.recovery.root_pd_shutdown++;
  1861. priv->root_pd_shutdown = true;
  1862. }
  1863. icnss_update_state_send_modem_shutdown(priv, data);
  1864. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1865. set_bit(ICNSS_FW_DOWN, &priv->state);
  1866. icnss_ignore_fw_timeout(true);
  1867. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1868. clear_bit(ICNSS_FW_READY, &priv->state);
  1869. fw_down_data.crashed = !!notif->crashed;
  1870. icnss_call_driver_uevent(priv,
  1871. ICNSS_UEVENT_FW_DOWN,
  1872. &fw_down_data);
  1873. }
  1874. goto out;
  1875. }
  1876. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1877. priv->state, notif->crashed);
  1878. set_bit(ICNSS_FW_DOWN, &priv->state);
  1879. icnss_ignore_fw_timeout(true);
  1880. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1881. if (event_data == NULL)
  1882. return notifier_from_errno(-ENOMEM);
  1883. event_data->crashed = notif->crashed;
  1884. fw_down_data.crashed = !!notif->crashed;
  1885. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1886. clear_bit(ICNSS_FW_READY, &priv->state);
  1887. fw_down_data.crashed = !!notif->crashed;
  1888. icnss_call_driver_uevent(priv,
  1889. ICNSS_UEVENT_FW_DOWN,
  1890. &fw_down_data);
  1891. }
  1892. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1893. ICNSS_EVENT_SYNC, event_data);
  1894. if (notif->crashed)
  1895. mod_timer(&priv->recovery_timer,
  1896. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1897. out:
  1898. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1899. return NOTIFY_OK;
  1900. }
  1901. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1902. {
  1903. int ret = 0;
  1904. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1905. priv->wpss_early_notify_handler =
  1906. qcom_register_early_ssr_notifier("wpss",
  1907. &priv->wpss_early_ssr_nb);
  1908. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1909. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1910. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1911. }
  1912. return ret;
  1913. }
  1914. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1915. {
  1916. int ret = 0;
  1917. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1918. /*
  1919. * Assign priority of icnss wpss notifier callback over IPA
  1920. * modem notifier callback which is 0
  1921. */
  1922. priv->wpss_ssr_nb.priority = 1;
  1923. priv->wpss_notify_handler =
  1924. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1925. if (IS_ERR(priv->wpss_notify_handler)) {
  1926. ret = PTR_ERR(priv->wpss_notify_handler);
  1927. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1928. }
  1929. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1930. return ret;
  1931. }
  1932. #ifdef SLATE_MODULE_ENABLED
  1933. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1934. unsigned long event, void *data)
  1935. {
  1936. icnss_pr_info("Received slate event 0x%x\n", event);
  1937. if (event == SLATE_STATUS) {
  1938. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1939. seb_nb);
  1940. enum boot_status status = *(enum boot_status *)data;
  1941. if (status == SLATE_READY) {
  1942. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1943. priv->state);
  1944. set_bit(ICNSS_SLATE_READY, &priv->state);
  1945. set_bit(ICNSS_SLATE_UP, &priv->state);
  1946. complete(&priv->slate_boot_complete);
  1947. }
  1948. }
  1949. return NOTIFY_OK;
  1950. }
  1951. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1952. {
  1953. int ret = 0;
  1954. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1955. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1956. &priv->seb_nb);
  1957. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1958. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1959. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1960. ret);
  1961. }
  1962. return ret;
  1963. }
  1964. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  1965. {
  1966. int ret = 0;
  1967. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  1968. if (ret < 0)
  1969. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  1970. return ret;
  1971. }
  1972. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1973. unsigned long code,
  1974. void *data)
  1975. {
  1976. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1977. slate_ssr_nb);
  1978. int ret = 0;
  1979. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1980. if (code == QCOM_SSR_AFTER_POWERUP &&
  1981. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  1982. set_bit(ICNSS_SLATE_UP, &priv->state);
  1983. complete(&priv->slate_boot_complete);
  1984. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1985. priv->state);
  1986. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1987. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1988. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1989. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1990. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1991. priv->state);
  1992. goto skip_pdr;
  1993. }
  1994. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1995. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1996. if (ret < 0) {
  1997. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1998. ret, priv->state);
  1999. goto skip_pdr;
  2000. }
  2001. }
  2002. skip_pdr:
  2003. return NOTIFY_OK;
  2004. }
  2005. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2006. {
  2007. int ret = 0;
  2008. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2009. priv->slate_notify_handler =
  2010. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2011. if (IS_ERR(priv->slate_notify_handler)) {
  2012. ret = PTR_ERR(priv->slate_notify_handler);
  2013. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2014. }
  2015. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2016. return ret;
  2017. }
  2018. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2019. {
  2020. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2021. return 0;
  2022. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2023. &priv->slate_ssr_nb);
  2024. priv->slate_notify_handler = NULL;
  2025. return 0;
  2026. }
  2027. #else
  2028. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2029. {
  2030. return 0;
  2031. }
  2032. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2033. {
  2034. return 0;
  2035. }
  2036. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2037. {
  2038. return 0;
  2039. }
  2040. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2041. {
  2042. return 0;
  2043. }
  2044. #endif
  2045. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2046. {
  2047. int ret = 0;
  2048. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2049. /*
  2050. * Assign priority of icnss modem notifier callback over IPA
  2051. * modem notifier callback which is 0
  2052. */
  2053. priv->modem_ssr_nb.priority = 1;
  2054. priv->modem_notify_handler =
  2055. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2056. if (IS_ERR(priv->modem_notify_handler)) {
  2057. ret = PTR_ERR(priv->modem_notify_handler);
  2058. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2059. }
  2060. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2061. return ret;
  2062. }
  2063. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2064. {
  2065. if (IS_ERR(priv->wpss_early_notify_handler))
  2066. return;
  2067. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2068. &priv->wpss_early_ssr_nb);
  2069. priv->wpss_early_notify_handler = NULL;
  2070. }
  2071. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2072. {
  2073. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2074. return 0;
  2075. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2076. &priv->wpss_ssr_nb);
  2077. priv->wpss_notify_handler = NULL;
  2078. return 0;
  2079. }
  2080. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2081. {
  2082. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2083. return 0;
  2084. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2085. &priv->modem_ssr_nb);
  2086. priv->modem_notify_handler = NULL;
  2087. return 0;
  2088. }
  2089. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2090. {
  2091. struct icnss_priv *priv = priv_cb;
  2092. struct icnss_event_pd_service_down_data *event_data;
  2093. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2094. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2095. if (!priv)
  2096. return;
  2097. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2098. state, priv->state);
  2099. switch (state) {
  2100. case SERVREG_SERVICE_STATE_DOWN:
  2101. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2102. if (!event_data)
  2103. return;
  2104. event_data->crashed = true;
  2105. if (!priv->is_ssr) {
  2106. set_bit(ICNSS_PDR, &penv->state);
  2107. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2108. cause = ICNSS_HOST_ERROR;
  2109. priv->stats.recovery.pdr_host_error++;
  2110. } else {
  2111. cause = ICNSS_FW_CRASH;
  2112. priv->stats.recovery.pdr_fw_crash++;
  2113. }
  2114. } else if (priv->root_pd_shutdown) {
  2115. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2116. event_data->crashed = false;
  2117. }
  2118. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2119. priv->state, icnss_pdr_cause[cause]);
  2120. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2121. set_bit(ICNSS_FW_DOWN, &priv->state);
  2122. icnss_ignore_fw_timeout(true);
  2123. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2124. clear_bit(ICNSS_FW_READY, &priv->state);
  2125. fw_down_data.crashed = event_data->crashed;
  2126. icnss_call_driver_uevent(priv,
  2127. ICNSS_UEVENT_FW_DOWN,
  2128. &fw_down_data);
  2129. }
  2130. }
  2131. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2132. if (event_data->crashed)
  2133. mod_timer(&priv->recovery_timer,
  2134. jiffies +
  2135. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2136. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2137. ICNSS_EVENT_SYNC, event_data);
  2138. break;
  2139. case SERVREG_SERVICE_STATE_UP:
  2140. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2141. break;
  2142. default:
  2143. break;
  2144. }
  2145. return;
  2146. }
  2147. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2148. {
  2149. struct pdr_handle *handle = NULL;
  2150. struct pdr_service *service = NULL;
  2151. int err = 0;
  2152. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2153. if (IS_ERR_OR_NULL(handle)) {
  2154. err = PTR_ERR(handle);
  2155. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2156. goto out;
  2157. }
  2158. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2159. if (IS_ERR_OR_NULL(service)) {
  2160. err = PTR_ERR(service);
  2161. icnss_pr_err("Failed to add lookup, err %d", err);
  2162. goto out;
  2163. }
  2164. priv->pdr_handle = handle;
  2165. priv->pdr_service = service;
  2166. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2167. icnss_pr_info("PDR registration happened");
  2168. out:
  2169. return err;
  2170. }
  2171. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2172. {
  2173. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2174. return;
  2175. pdr_handle_release(priv->pdr_handle);
  2176. }
  2177. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2178. {
  2179. int ret = 0;
  2180. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  2181. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2182. #else
  2183. priv->icnss_ramdump_class = class_create(ICNSS_RAMDUMP_NAME);
  2184. #endif
  2185. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2186. ret = PTR_ERR(priv->icnss_ramdump_class);
  2187. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2188. return ret;
  2189. }
  2190. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2191. ICNSS_RAMDUMP_NAME);
  2192. if (ret < 0) {
  2193. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2194. goto fail_alloc_major;
  2195. }
  2196. return 0;
  2197. fail_alloc_major:
  2198. class_destroy(priv->icnss_ramdump_class);
  2199. return ret;
  2200. }
  2201. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2202. {
  2203. int ret = 0;
  2204. struct icnss_ramdump_info *ramdump_info;
  2205. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2206. if (!ramdump_info)
  2207. return ERR_PTR(-ENOMEM);
  2208. if (!dev_name) {
  2209. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2210. return NULL;
  2211. }
  2212. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2213. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2214. if (ramdump_info->minor < 0) {
  2215. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2216. ramdump_info->minor);
  2217. ret = -ENODEV;
  2218. goto fail_out_of_minors;
  2219. }
  2220. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2221. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2222. ramdump_info->minor),
  2223. ramdump_info, ramdump_info->name);
  2224. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2225. ret = PTR_ERR(ramdump_info->dev);
  2226. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2227. ramdump_info->name, ret);
  2228. goto fail_device_create;
  2229. }
  2230. return (void *)ramdump_info;
  2231. fail_device_create:
  2232. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2233. fail_out_of_minors:
  2234. kfree(ramdump_info);
  2235. return ERR_PTR(ret);
  2236. }
  2237. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2238. {
  2239. int ret = 0;
  2240. if (!priv || !priv->pdev) {
  2241. icnss_pr_err("Platform priv or pdev is NULL\n");
  2242. return -EINVAL;
  2243. }
  2244. ret = icnss_ramdump_devnode_init(priv);
  2245. if (ret)
  2246. return ret;
  2247. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2248. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2249. icnss_pr_err("Failed to create msa0 dump device!");
  2250. return -ENOMEM;
  2251. }
  2252. if (priv->device_id == WCN6750_DEVICE_ID ||
  2253. priv->device_id == WCN6450_DEVICE_ID) {
  2254. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2255. ICNSS_M3_SEGMENT(
  2256. ICNSS_M3_SEGMENT_PHYAREG));
  2257. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2258. !priv->m3_dump_phyareg->dev) {
  2259. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2260. return -ENOMEM;
  2261. }
  2262. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2263. ICNSS_M3_SEGMENT(
  2264. ICNSS_M3_SEGMENT_PHYA));
  2265. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2266. !priv->m3_dump_phydbg->dev) {
  2267. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2268. return -ENOMEM;
  2269. }
  2270. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2271. ICNSS_M3_SEGMENT(
  2272. ICNSS_M3_SEGMENT_WMACREG));
  2273. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2274. !priv->m3_dump_wmac0reg->dev) {
  2275. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2276. return -ENOMEM;
  2277. }
  2278. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2279. ICNSS_M3_SEGMENT(
  2280. ICNSS_M3_SEGMENT_WCSSDBG));
  2281. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2282. !priv->m3_dump_wcssdbg->dev) {
  2283. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2284. return -ENOMEM;
  2285. }
  2286. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2287. ICNSS_M3_SEGMENT(
  2288. ICNSS_M3_SEGMENT_PHYAM3));
  2289. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2290. !priv->m3_dump_phyapdmem->dev) {
  2291. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2292. return -ENOMEM;
  2293. }
  2294. }
  2295. return 0;
  2296. }
  2297. static int icnss_enable_recovery(struct icnss_priv *priv)
  2298. {
  2299. int ret;
  2300. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2301. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2302. return 0;
  2303. }
  2304. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2305. icnss_pr_dbg("SSR disabled through module parameter\n");
  2306. goto enable_pdr;
  2307. }
  2308. ret = icnss_register_ramdump_devices(priv);
  2309. if (ret)
  2310. return ret;
  2311. if (priv->wpss_supported) {
  2312. icnss_wpss_early_ssr_register_notifier(priv);
  2313. icnss_wpss_ssr_register_notifier(priv);
  2314. return 0;
  2315. }
  2316. if (!(priv->rproc_fw_download))
  2317. icnss_modem_ssr_register_notifier(priv);
  2318. if (priv->is_slate_rfa) {
  2319. icnss_slate_ssr_register_notifier(priv);
  2320. icnss_register_slate_event_notifier(priv);
  2321. }
  2322. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2323. icnss_pr_dbg("PDR disabled through module parameter\n");
  2324. return 0;
  2325. }
  2326. enable_pdr:
  2327. ret = icnss_pd_restart_enable(priv);
  2328. if (ret)
  2329. return ret;
  2330. return 0;
  2331. }
  2332. static int icnss_dev_id_match(struct icnss_priv *priv,
  2333. struct device_info *dev_info)
  2334. {
  2335. while (dev_info->device_id) {
  2336. if (priv->device_id == dev_info->device_id)
  2337. return 1;
  2338. dev_info++;
  2339. }
  2340. return 0;
  2341. }
  2342. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2343. unsigned long *thermal_state)
  2344. {
  2345. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2346. *thermal_state = icnss_tcdev->max_thermal_state;
  2347. return 0;
  2348. }
  2349. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2350. unsigned long *thermal_state)
  2351. {
  2352. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2353. *thermal_state = icnss_tcdev->curr_thermal_state;
  2354. return 0;
  2355. }
  2356. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2357. unsigned long thermal_state)
  2358. {
  2359. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2360. struct device *dev = &penv->pdev->dev;
  2361. int ret = 0;
  2362. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2363. return 0;
  2364. if (thermal_state > icnss_tcdev->max_thermal_state)
  2365. return -EINVAL;
  2366. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2367. thermal_state, icnss_tcdev->tcdev_id);
  2368. mutex_lock(&penv->tcdev_lock);
  2369. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2370. icnss_tcdev->tcdev_id);
  2371. if (!ret)
  2372. icnss_tcdev->curr_thermal_state = thermal_state;
  2373. mutex_unlock(&penv->tcdev_lock);
  2374. if (ret) {
  2375. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2376. ret, icnss_tcdev->tcdev_id);
  2377. return ret;
  2378. }
  2379. return 0;
  2380. }
  2381. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2382. .get_max_state = icnss_tcdev_get_max_state,
  2383. .get_cur_state = icnss_tcdev_get_cur_state,
  2384. .set_cur_state = icnss_tcdev_set_cur_state,
  2385. };
  2386. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2387. int tcdev_id)
  2388. {
  2389. struct icnss_priv *priv = dev_get_drvdata(dev);
  2390. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2391. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2392. struct device_node *dev_node;
  2393. int ret = 0;
  2394. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2395. if (!icnss_tcdev)
  2396. return -ENOMEM;
  2397. icnss_tcdev->tcdev_id = tcdev_id;
  2398. icnss_tcdev->max_thermal_state = max_state;
  2399. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2400. "qcom,icnss_cdev%d", tcdev_id);
  2401. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2402. if (!dev_node) {
  2403. icnss_pr_err("Failed to get cooling device node\n");
  2404. return -EINVAL;
  2405. }
  2406. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2407. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2408. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2409. dev_node,
  2410. cdev_node_name, icnss_tcdev,
  2411. &icnss_cooling_ops);
  2412. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2413. ret = PTR_ERR(icnss_tcdev->tcdev);
  2414. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2415. ret, icnss_tcdev->tcdev_id);
  2416. } else {
  2417. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2418. icnss_tcdev->tcdev_id);
  2419. list_add(&icnss_tcdev->tcdev_list,
  2420. &priv->icnss_tcdev_list);
  2421. }
  2422. } else {
  2423. icnss_pr_dbg("Cooling device registration not supported");
  2424. ret = -EOPNOTSUPP;
  2425. }
  2426. return ret;
  2427. }
  2428. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2429. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2430. {
  2431. struct icnss_priv *priv = dev_get_drvdata(dev);
  2432. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2433. while (!list_empty(&priv->icnss_tcdev_list)) {
  2434. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2435. struct icnss_thermal_cdev,
  2436. tcdev_list);
  2437. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2438. list_del(&icnss_tcdev->tcdev_list);
  2439. kfree(icnss_tcdev);
  2440. }
  2441. }
  2442. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2443. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2444. unsigned long *thermal_state,
  2445. int tcdev_id)
  2446. {
  2447. struct icnss_priv *priv = dev_get_drvdata(dev);
  2448. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2449. mutex_lock(&priv->tcdev_lock);
  2450. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2451. if (icnss_tcdev->tcdev_id != tcdev_id)
  2452. continue;
  2453. *thermal_state = icnss_tcdev->curr_thermal_state;
  2454. mutex_unlock(&priv->tcdev_lock);
  2455. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2456. icnss_tcdev->curr_thermal_state, tcdev_id);
  2457. return 0;
  2458. }
  2459. mutex_unlock(&priv->tcdev_lock);
  2460. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2461. return -EINVAL;
  2462. }
  2463. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2464. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2465. int cmd_len, void *cb_ctx,
  2466. int (*cb)(void *ctx, void *event, int event_len))
  2467. {
  2468. struct icnss_priv *priv = icnss_get_plat_priv();
  2469. int ret;
  2470. if (!priv)
  2471. return -ENODEV;
  2472. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2473. return -EINVAL;
  2474. priv->get_info_cb = cb;
  2475. priv->get_info_cb_ctx = cb_ctx;
  2476. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2477. if (ret) {
  2478. priv->get_info_cb = NULL;
  2479. priv->get_info_cb_ctx = NULL;
  2480. }
  2481. return ret;
  2482. }
  2483. EXPORT_SYMBOL(icnss_qmi_send);
  2484. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2485. struct module *owner, const char *mod_name)
  2486. {
  2487. int ret = 0;
  2488. struct icnss_priv *priv = icnss_get_plat_priv();
  2489. if (!priv || !priv->pdev) {
  2490. ret = -ENODEV;
  2491. goto out;
  2492. }
  2493. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2494. if (priv->ops) {
  2495. icnss_pr_err("Driver already registered\n");
  2496. ret = -EEXIST;
  2497. goto out;
  2498. }
  2499. if (!ops->dev_info) {
  2500. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2501. return -EINVAL;
  2502. }
  2503. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2504. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2505. ops->dev_info->name);
  2506. return -ENODEV;
  2507. }
  2508. if (!ops->probe || !ops->remove) {
  2509. ret = -EINVAL;
  2510. goto out;
  2511. }
  2512. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2513. 0, ops);
  2514. if (ret == -EINTR)
  2515. ret = 0;
  2516. out:
  2517. return ret;
  2518. }
  2519. EXPORT_SYMBOL(__icnss_register_driver);
  2520. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2521. {
  2522. int ret;
  2523. struct icnss_priv *priv = icnss_get_plat_priv();
  2524. if (!priv || !priv->pdev) {
  2525. ret = -ENODEV;
  2526. goto out;
  2527. }
  2528. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2529. if (!priv->ops) {
  2530. icnss_pr_err("Driver not registered\n");
  2531. ret = -ENOENT;
  2532. goto out;
  2533. }
  2534. ret = icnss_driver_event_post(priv,
  2535. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2536. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2537. out:
  2538. return ret;
  2539. }
  2540. EXPORT_SYMBOL(icnss_unregister_driver);
  2541. static struct icnss_msi_config msi_config_wcn6750 = {
  2542. .total_vectors = 28,
  2543. .total_users = 2,
  2544. .users = (struct icnss_msi_user[]) {
  2545. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2546. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2547. },
  2548. };
  2549. static struct icnss_msi_config msi_config_wcn6450 = {
  2550. .total_vectors = 14,
  2551. .total_users = 2,
  2552. .users = (struct icnss_msi_user[]) {
  2553. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2554. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2555. },
  2556. };
  2557. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2558. {
  2559. if (priv->device_id == WCN6750_DEVICE_ID)
  2560. priv->msi_config = &msi_config_wcn6750;
  2561. else
  2562. priv->msi_config = &msi_config_wcn6450;
  2563. return 0;
  2564. }
  2565. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2566. int *num_vectors, u32 *user_base_data,
  2567. u32 *base_vector)
  2568. {
  2569. struct icnss_priv *priv = dev_get_drvdata(dev);
  2570. struct icnss_msi_config *msi_config;
  2571. int idx;
  2572. if (!priv)
  2573. return -ENODEV;
  2574. msi_config = priv->msi_config;
  2575. if (!msi_config) {
  2576. icnss_pr_err("MSI is not supported.\n");
  2577. return -EINVAL;
  2578. }
  2579. for (idx = 0; idx < msi_config->total_users; idx++) {
  2580. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2581. *num_vectors = msi_config->users[idx].num_vectors;
  2582. *user_base_data = msi_config->users[idx].base_vector
  2583. + priv->msi_base_data;
  2584. *base_vector = msi_config->users[idx].base_vector;
  2585. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2586. user_name, *num_vectors, *user_base_data,
  2587. *base_vector);
  2588. return 0;
  2589. }
  2590. }
  2591. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2592. return -EINVAL;
  2593. }
  2594. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2595. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2596. {
  2597. struct icnss_priv *priv = dev_get_drvdata(dev);
  2598. int irq_num;
  2599. irq_num = priv->srng_irqs[vector];
  2600. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2601. irq_num, vector);
  2602. return irq_num;
  2603. }
  2604. EXPORT_SYMBOL(icnss_get_msi_irq);
  2605. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2606. u32 *msi_addr_high)
  2607. {
  2608. struct icnss_priv *priv = dev_get_drvdata(dev);
  2609. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2610. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2611. }
  2612. EXPORT_SYMBOL(icnss_get_msi_address);
  2613. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2614. irqreturn_t (*handler)(int, void *),
  2615. unsigned long flags, const char *name, void *ctx)
  2616. {
  2617. int ret = 0;
  2618. unsigned int irq;
  2619. struct ce_irq_list *irq_entry;
  2620. struct icnss_priv *priv = dev_get_drvdata(dev);
  2621. if (!priv || !priv->pdev) {
  2622. ret = -ENODEV;
  2623. goto out;
  2624. }
  2625. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2626. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2627. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2628. ret = -EINVAL;
  2629. goto out;
  2630. }
  2631. irq = priv->ce_irqs[ce_id];
  2632. irq_entry = &priv->ce_irq_list[ce_id];
  2633. if (irq_entry->handler || irq_entry->irq) {
  2634. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2635. irq, ce_id);
  2636. ret = -EEXIST;
  2637. goto out;
  2638. }
  2639. ret = request_irq(irq, handler, flags, name, ctx);
  2640. if (ret) {
  2641. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2642. irq, ce_id, ret);
  2643. goto out;
  2644. }
  2645. irq_entry->irq = irq;
  2646. irq_entry->handler = handler;
  2647. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2648. penv->stats.ce_irqs[ce_id].request++;
  2649. out:
  2650. return ret;
  2651. }
  2652. EXPORT_SYMBOL(icnss_ce_request_irq);
  2653. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2654. {
  2655. int ret = 0;
  2656. unsigned int irq;
  2657. struct ce_irq_list *irq_entry;
  2658. if (!penv || !penv->pdev || !dev) {
  2659. ret = -ENODEV;
  2660. goto out;
  2661. }
  2662. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2663. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2664. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2665. ret = -EINVAL;
  2666. goto out;
  2667. }
  2668. irq = penv->ce_irqs[ce_id];
  2669. irq_entry = &penv->ce_irq_list[ce_id];
  2670. if (!irq_entry->handler || !irq_entry->irq) {
  2671. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2672. ret = -EEXIST;
  2673. goto out;
  2674. }
  2675. free_irq(irq, ctx);
  2676. irq_entry->irq = 0;
  2677. irq_entry->handler = NULL;
  2678. penv->stats.ce_irqs[ce_id].free++;
  2679. out:
  2680. return ret;
  2681. }
  2682. EXPORT_SYMBOL(icnss_ce_free_irq);
  2683. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2684. {
  2685. unsigned int irq;
  2686. if (!penv || !penv->pdev || !dev) {
  2687. icnss_pr_err("Platform driver not initialized\n");
  2688. return;
  2689. }
  2690. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2691. penv->state);
  2692. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2693. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2694. return;
  2695. }
  2696. penv->stats.ce_irqs[ce_id].enable++;
  2697. irq = penv->ce_irqs[ce_id];
  2698. enable_irq(irq);
  2699. }
  2700. EXPORT_SYMBOL(icnss_enable_irq);
  2701. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2702. {
  2703. unsigned int irq;
  2704. if (!penv || !penv->pdev || !dev) {
  2705. icnss_pr_err("Platform driver not initialized\n");
  2706. return;
  2707. }
  2708. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2709. penv->state);
  2710. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2711. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2712. ce_id);
  2713. return;
  2714. }
  2715. irq = penv->ce_irqs[ce_id];
  2716. disable_irq(irq);
  2717. penv->stats.ce_irqs[ce_id].disable++;
  2718. }
  2719. EXPORT_SYMBOL(icnss_disable_irq);
  2720. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2721. {
  2722. char *fw_build_timestamp = NULL;
  2723. struct icnss_priv *priv = dev_get_drvdata(dev);
  2724. if (!priv) {
  2725. icnss_pr_err("Platform driver not initialized\n");
  2726. return -EINVAL;
  2727. }
  2728. info->v_addr = priv->mem_base_va;
  2729. info->p_addr = priv->mem_base_pa;
  2730. info->chip_id = priv->chip_info.chip_id;
  2731. info->chip_family = priv->chip_info.chip_family;
  2732. info->board_id = priv->board_id;
  2733. info->soc_id = priv->soc_id;
  2734. info->fw_version = priv->fw_version_info.fw_version;
  2735. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2736. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2737. strlcpy(info->fw_build_timestamp,
  2738. priv->fw_version_info.fw_build_timestamp,
  2739. WLFW_MAX_TIMESTAMP_LEN + 1);
  2740. strlcpy(info->fw_build_id, priv->fw_build_id,
  2741. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2742. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2743. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2744. info->phy_qam_cap = priv->phy_qam_cap;
  2745. return 0;
  2746. }
  2747. EXPORT_SYMBOL(icnss_get_soc_info);
  2748. int icnss_get_mhi_state(struct device *dev)
  2749. {
  2750. struct icnss_priv *priv = dev_get_drvdata(dev);
  2751. if (!priv) {
  2752. icnss_pr_err("Platform driver not initialized\n");
  2753. return -EINVAL;
  2754. }
  2755. if (!priv->mhi_state_info_va)
  2756. return -ENOMEM;
  2757. return ioread32(priv->mhi_state_info_va);
  2758. }
  2759. EXPORT_SYMBOL(icnss_get_mhi_state);
  2760. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2761. {
  2762. int ret;
  2763. struct icnss_priv *priv;
  2764. if (!dev)
  2765. return -ENODEV;
  2766. priv = dev_get_drvdata(dev);
  2767. if (!priv) {
  2768. icnss_pr_err("Platform driver not initialized\n");
  2769. return -EINVAL;
  2770. }
  2771. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2772. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2773. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2774. priv->state);
  2775. return -EINVAL;
  2776. }
  2777. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2778. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2779. if (ret)
  2780. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2781. ret, fw_log_mode);
  2782. return ret;
  2783. }
  2784. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2785. int icnss_force_wake_request(struct device *dev)
  2786. {
  2787. struct icnss_priv *priv;
  2788. if (!dev)
  2789. return -ENODEV;
  2790. priv = dev_get_drvdata(dev);
  2791. if (!priv) {
  2792. icnss_pr_err("Platform driver not initialized\n");
  2793. return -EINVAL;
  2794. }
  2795. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2796. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2797. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2798. priv->state);
  2799. return -EINVAL;
  2800. }
  2801. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2802. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2803. atomic_read(&priv->soc_wake_ref_count));
  2804. return 0;
  2805. }
  2806. icnss_pr_soc_wake("Calling SOC Wake request");
  2807. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2808. 0, NULL);
  2809. return 0;
  2810. }
  2811. EXPORT_SYMBOL(icnss_force_wake_request);
  2812. int icnss_force_wake_release(struct device *dev)
  2813. {
  2814. struct icnss_priv *priv;
  2815. if (!dev)
  2816. return -ENODEV;
  2817. priv = dev_get_drvdata(dev);
  2818. if (!priv) {
  2819. icnss_pr_err("Platform driver not initialized\n");
  2820. return -EINVAL;
  2821. }
  2822. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2823. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2824. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2825. priv->state);
  2826. return -EINVAL;
  2827. }
  2828. icnss_pr_soc_wake("Calling SOC Wake response");
  2829. if (atomic_read(&priv->soc_wake_ref_count) &&
  2830. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2831. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2832. atomic_read(&priv->soc_wake_ref_count));
  2833. return 0;
  2834. }
  2835. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2836. 0, NULL);
  2837. return 0;
  2838. }
  2839. EXPORT_SYMBOL(icnss_force_wake_release);
  2840. int icnss_is_device_awake(struct device *dev)
  2841. {
  2842. struct icnss_priv *priv = dev_get_drvdata(dev);
  2843. if (!priv) {
  2844. icnss_pr_err("Platform driver not initialized\n");
  2845. return -EINVAL;
  2846. }
  2847. return atomic_read(&priv->soc_wake_ref_count);
  2848. }
  2849. EXPORT_SYMBOL(icnss_is_device_awake);
  2850. int icnss_is_pci_ep_awake(struct device *dev)
  2851. {
  2852. struct icnss_priv *priv = dev_get_drvdata(dev);
  2853. if (!priv) {
  2854. icnss_pr_err("Platform driver not initialized\n");
  2855. return -EINVAL;
  2856. }
  2857. if (!priv->mhi_state_info_va)
  2858. return -ENOMEM;
  2859. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2860. }
  2861. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2862. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2863. uint32_t mem_type, uint32_t data_len,
  2864. uint8_t *output)
  2865. {
  2866. int ret = 0;
  2867. struct icnss_priv *priv = dev_get_drvdata(dev);
  2868. if (priv->magic != ICNSS_MAGIC) {
  2869. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2870. dev, priv, priv->magic);
  2871. return -EINVAL;
  2872. }
  2873. if (!output || data_len == 0
  2874. || data_len > WLFW_MAX_DATA_SIZE) {
  2875. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2876. output, data_len);
  2877. ret = -EINVAL;
  2878. goto out;
  2879. }
  2880. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2881. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2882. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2883. priv->state);
  2884. ret = -EINVAL;
  2885. goto out;
  2886. }
  2887. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2888. data_len, output);
  2889. out:
  2890. return ret;
  2891. }
  2892. EXPORT_SYMBOL(icnss_athdiag_read);
  2893. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2894. uint32_t mem_type, uint32_t data_len,
  2895. uint8_t *input)
  2896. {
  2897. int ret = 0;
  2898. struct icnss_priv *priv = dev_get_drvdata(dev);
  2899. if (priv->magic != ICNSS_MAGIC) {
  2900. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2901. dev, priv, priv->magic);
  2902. return -EINVAL;
  2903. }
  2904. if (!input || data_len == 0
  2905. || data_len > WLFW_MAX_DATA_SIZE) {
  2906. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2907. input, data_len);
  2908. ret = -EINVAL;
  2909. goto out;
  2910. }
  2911. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2912. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2913. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2914. priv->state);
  2915. ret = -EINVAL;
  2916. goto out;
  2917. }
  2918. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2919. data_len, input);
  2920. out:
  2921. return ret;
  2922. }
  2923. EXPORT_SYMBOL(icnss_athdiag_write);
  2924. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2925. enum icnss_driver_mode mode,
  2926. const char *host_version)
  2927. {
  2928. struct icnss_priv *priv = dev_get_drvdata(dev);
  2929. int temp = 0, ret = 0;
  2930. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2931. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2932. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2933. priv->state);
  2934. return -EINVAL;
  2935. }
  2936. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2937. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2938. priv->state);
  2939. return -EINVAL;
  2940. }
  2941. if (priv->wpss_supported &&
  2942. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2943. icnss_setup_dms_mac(priv);
  2944. if (priv->device_id == WCN6750_DEVICE_ID) {
  2945. if (!icnss_get_temperature(priv, &temp)) {
  2946. icnss_pr_dbg("Temperature: %d\n", temp);
  2947. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2948. icnss_set_wlan_en_delay(priv);
  2949. }
  2950. }
  2951. if (priv->device_id == WCN6450_DEVICE_ID)
  2952. icnss_hw_power_off(priv);
  2953. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2954. if (priv->device_id == WCN6450_DEVICE_ID)
  2955. icnss_hw_power_on(priv);
  2956. return ret;
  2957. }
  2958. EXPORT_SYMBOL(icnss_wlan_enable);
  2959. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2960. {
  2961. struct icnss_priv *priv = dev_get_drvdata(dev);
  2962. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2963. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2964. priv->state);
  2965. return 0;
  2966. }
  2967. return icnss_send_wlan_disable_to_fw(priv);
  2968. }
  2969. EXPORT_SYMBOL(icnss_wlan_disable);
  2970. bool icnss_is_qmi_disable(struct device *dev)
  2971. {
  2972. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2973. }
  2974. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2975. int icnss_get_ce_id(struct device *dev, int irq)
  2976. {
  2977. int i;
  2978. if (!penv || !penv->pdev || !dev)
  2979. return -ENODEV;
  2980. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2981. if (penv->ce_irqs[i] == irq)
  2982. return i;
  2983. }
  2984. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2985. return -EINVAL;
  2986. }
  2987. EXPORT_SYMBOL(icnss_get_ce_id);
  2988. int icnss_get_irq(struct device *dev, int ce_id)
  2989. {
  2990. int irq;
  2991. if (!penv || !penv->pdev || !dev)
  2992. return -ENODEV;
  2993. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2994. return -EINVAL;
  2995. irq = penv->ce_irqs[ce_id];
  2996. return irq;
  2997. }
  2998. EXPORT_SYMBOL(icnss_get_irq);
  2999. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  3000. {
  3001. struct icnss_priv *priv = dev_get_drvdata(dev);
  3002. if (!priv) {
  3003. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  3004. return NULL;
  3005. }
  3006. return priv->iommu_domain;
  3007. }
  3008. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3009. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3010. int icnss_iommu_map(struct iommu_domain *domain,
  3011. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3012. {
  3013. return iommu_map(domain, iova, paddr, size, prot);
  3014. }
  3015. #else
  3016. int icnss_iommu_map(struct iommu_domain *domain,
  3017. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3018. {
  3019. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  3020. }
  3021. #endif
  3022. int icnss_smmu_map(struct device *dev,
  3023. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3024. {
  3025. struct icnss_priv *priv = dev_get_drvdata(dev);
  3026. int flag = IOMMU_READ | IOMMU_WRITE;
  3027. bool dma_coherent = false;
  3028. unsigned long iova;
  3029. int prop_len = 0;
  3030. size_t len;
  3031. int ret = 0;
  3032. if (!priv) {
  3033. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3034. dev, priv);
  3035. return -EINVAL;
  3036. }
  3037. if (!iova_addr) {
  3038. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3039. &paddr, size);
  3040. return -EINVAL;
  3041. }
  3042. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3043. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3044. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3045. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3046. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3047. iova,
  3048. &priv->smmu_iova_ipa_start,
  3049. priv->smmu_iova_ipa_len);
  3050. return -ENOMEM;
  3051. }
  3052. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3053. icnss_pr_dbg("dma-coherent is %s\n",
  3054. dma_coherent ? "enabled" : "disabled");
  3055. if (dma_coherent)
  3056. flag |= IOMMU_CACHE;
  3057. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3058. ret = icnss_iommu_map(priv->iommu_domain, iova,
  3059. rounddown(paddr, PAGE_SIZE), len,
  3060. flag);
  3061. if (ret) {
  3062. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3063. return ret;
  3064. }
  3065. priv->smmu_iova_ipa_current = iova + len;
  3066. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3067. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3068. return 0;
  3069. }
  3070. EXPORT_SYMBOL(icnss_smmu_map);
  3071. int icnss_smmu_unmap(struct device *dev,
  3072. uint32_t iova_addr, size_t size)
  3073. {
  3074. struct icnss_priv *priv = dev_get_drvdata(dev);
  3075. unsigned long iova;
  3076. size_t len, unmapped_len;
  3077. if (!priv) {
  3078. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3079. dev, priv);
  3080. return -EINVAL;
  3081. }
  3082. if (!iova_addr) {
  3083. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3084. size);
  3085. return -EINVAL;
  3086. }
  3087. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3088. PAGE_SIZE);
  3089. iova = rounddown(iova_addr, PAGE_SIZE);
  3090. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3091. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3092. iova,
  3093. &priv->smmu_iova_ipa_start,
  3094. priv->smmu_iova_ipa_len);
  3095. return -ENOMEM;
  3096. }
  3097. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3098. iova, len);
  3099. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3100. if (unmapped_len != len) {
  3101. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3102. return -EINVAL;
  3103. }
  3104. priv->smmu_iova_ipa_current = iova;
  3105. return 0;
  3106. }
  3107. EXPORT_SYMBOL(icnss_smmu_unmap);
  3108. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3109. {
  3110. return socinfo_get_serial_number();
  3111. }
  3112. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3113. int icnss_trigger_recovery(struct device *dev)
  3114. {
  3115. int ret = 0;
  3116. struct icnss_priv *priv = dev_get_drvdata(dev);
  3117. if (priv->magic != ICNSS_MAGIC) {
  3118. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3119. ret = -EINVAL;
  3120. goto out;
  3121. }
  3122. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3123. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3124. priv->state);
  3125. ret = -EPERM;
  3126. goto out;
  3127. }
  3128. if (priv->wpss_supported) {
  3129. icnss_pr_vdbg("Initiate Root PD restart");
  3130. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3131. ICNSS_SMP2P_OUT_POWER_SAVE);
  3132. if (!ret)
  3133. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3134. return ret;
  3135. }
  3136. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3137. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3138. priv->state);
  3139. ret = -EOPNOTSUPP;
  3140. goto out;
  3141. }
  3142. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3143. priv->state);
  3144. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3145. if (!ret)
  3146. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3147. out:
  3148. return ret;
  3149. }
  3150. EXPORT_SYMBOL(icnss_trigger_recovery);
  3151. int icnss_idle_shutdown(struct device *dev)
  3152. {
  3153. struct icnss_priv *priv = dev_get_drvdata(dev);
  3154. if (!priv) {
  3155. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3156. return -EINVAL;
  3157. }
  3158. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3159. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3160. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3161. return -EBUSY;
  3162. }
  3163. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3164. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3165. }
  3166. EXPORT_SYMBOL(icnss_idle_shutdown);
  3167. int icnss_idle_restart(struct device *dev)
  3168. {
  3169. struct icnss_priv *priv = dev_get_drvdata(dev);
  3170. if (!priv) {
  3171. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3172. return -EINVAL;
  3173. }
  3174. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3175. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3176. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3177. return -EBUSY;
  3178. }
  3179. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3180. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3181. }
  3182. EXPORT_SYMBOL(icnss_idle_restart);
  3183. int icnss_exit_power_save(struct device *dev)
  3184. {
  3185. struct icnss_priv *priv = dev_get_drvdata(dev);
  3186. icnss_pr_vdbg("Calling Exit Power Save\n");
  3187. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3188. !test_bit(ICNSS_MODE_ON, &priv->state))
  3189. return 0;
  3190. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3191. ICNSS_SMP2P_OUT_POWER_SAVE);
  3192. }
  3193. EXPORT_SYMBOL(icnss_exit_power_save);
  3194. int icnss_prevent_l1(struct device *dev)
  3195. {
  3196. struct icnss_priv *priv = dev_get_drvdata(dev);
  3197. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3198. !test_bit(ICNSS_MODE_ON, &priv->state))
  3199. return 0;
  3200. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3201. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3202. }
  3203. EXPORT_SYMBOL(icnss_prevent_l1);
  3204. void icnss_allow_l1(struct device *dev)
  3205. {
  3206. struct icnss_priv *priv = dev_get_drvdata(dev);
  3207. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3208. !test_bit(ICNSS_MODE_ON, &priv->state))
  3209. return;
  3210. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3211. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3212. }
  3213. EXPORT_SYMBOL(icnss_allow_l1);
  3214. void icnss_allow_recursive_recovery(struct device *dev)
  3215. {
  3216. struct icnss_priv *priv = dev_get_drvdata(dev);
  3217. priv->allow_recursive_recovery = true;
  3218. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3219. }
  3220. void icnss_disallow_recursive_recovery(struct device *dev)
  3221. {
  3222. struct icnss_priv *priv = dev_get_drvdata(dev);
  3223. priv->allow_recursive_recovery = false;
  3224. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3225. }
  3226. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3227. {
  3228. struct kobject *icnss_kobject;
  3229. int ret = 0;
  3230. atomic_set(&priv->is_shutdown, false);
  3231. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3232. if (!icnss_kobject) {
  3233. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3234. return -EINVAL;
  3235. }
  3236. priv->icnss_kobject = icnss_kobject;
  3237. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3238. if (ret) {
  3239. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3240. return ret;
  3241. }
  3242. return ret;
  3243. }
  3244. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3245. {
  3246. struct kobject *icnss_kobject;
  3247. icnss_kobject = priv->icnss_kobject;
  3248. if (icnss_kobject)
  3249. kobject_put(icnss_kobject);
  3250. }
  3251. static ssize_t qdss_tr_start_store(struct device *dev,
  3252. struct device_attribute *attr,
  3253. const char *buf, size_t count)
  3254. {
  3255. struct icnss_priv *priv = dev_get_drvdata(dev);
  3256. wlfw_qdss_trace_start(priv);
  3257. icnss_pr_dbg("Received QDSS start command\n");
  3258. return count;
  3259. }
  3260. static ssize_t qdss_tr_stop_store(struct device *dev,
  3261. struct device_attribute *attr,
  3262. const char *user_buf, size_t count)
  3263. {
  3264. struct icnss_priv *priv = dev_get_drvdata(dev);
  3265. u32 option = 0;
  3266. if (sscanf(user_buf, "%du", &option) != 1)
  3267. return -EINVAL;
  3268. wlfw_qdss_trace_stop(priv, option);
  3269. icnss_pr_dbg("Received QDSS stop command\n");
  3270. return count;
  3271. }
  3272. static ssize_t qdss_conf_download_store(struct device *dev,
  3273. struct device_attribute *attr,
  3274. const char *buf, size_t count)
  3275. {
  3276. struct icnss_priv *priv = dev_get_drvdata(dev);
  3277. icnss_wlfw_qdss_dnld_send_sync(priv);
  3278. icnss_pr_dbg("Received QDSS download config command\n");
  3279. return count;
  3280. }
  3281. static ssize_t hw_trc_override_store(struct device *dev,
  3282. struct device_attribute *attr,
  3283. const char *buf, size_t count)
  3284. {
  3285. struct icnss_priv *priv = dev_get_drvdata(dev);
  3286. int tmp = 0;
  3287. if (sscanf(buf, "%du", &tmp) != 1)
  3288. return -EINVAL;
  3289. priv->hw_trc_override = tmp;
  3290. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3291. return count;
  3292. }
  3293. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3294. {
  3295. struct icnss_priv *priv = icnss_get_plat_priv();
  3296. phandle rproc_phandle;
  3297. int ret;
  3298. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3299. &rproc_phandle)) {
  3300. icnss_pr_err("error reading rproc phandle\n");
  3301. return;
  3302. }
  3303. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3304. if (IS_ERR_OR_NULL(priv->rproc)) {
  3305. icnss_pr_err("rproc not found");
  3306. return;
  3307. }
  3308. ret = rproc_boot(priv->rproc);
  3309. if (ret) {
  3310. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3311. rproc_put(priv->rproc);
  3312. }
  3313. }
  3314. static ssize_t wpss_boot_store(struct device *dev,
  3315. struct device_attribute *attr,
  3316. const char *buf, size_t count)
  3317. {
  3318. struct icnss_priv *priv = dev_get_drvdata(dev);
  3319. int wpss_rproc = 0;
  3320. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3321. return count;
  3322. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3323. icnss_pr_err("Failed to read wpss rproc info");
  3324. return -EINVAL;
  3325. }
  3326. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3327. if (wpss_rproc == 1)
  3328. schedule_work(&wpss_loader);
  3329. else if (wpss_rproc == 0)
  3330. icnss_wpss_unload(priv);
  3331. return count;
  3332. }
  3333. static ssize_t wlan_en_delay_store(struct device *dev,
  3334. struct device_attribute *attr,
  3335. const char *buf, size_t count)
  3336. {
  3337. struct icnss_priv *priv = dev_get_drvdata(dev);
  3338. uint32_t wlan_en_delay = 0;
  3339. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3340. return count;
  3341. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3342. icnss_pr_err("Failed to read wlan_en_delay");
  3343. return -EINVAL;
  3344. }
  3345. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3346. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3347. return count;
  3348. }
  3349. static DEVICE_ATTR_WO(qdss_tr_start);
  3350. static DEVICE_ATTR_WO(qdss_tr_stop);
  3351. static DEVICE_ATTR_WO(qdss_conf_download);
  3352. static DEVICE_ATTR_WO(hw_trc_override);
  3353. static DEVICE_ATTR_WO(wpss_boot);
  3354. static DEVICE_ATTR_WO(wlan_en_delay);
  3355. static struct attribute *icnss_attrs[] = {
  3356. &dev_attr_qdss_tr_start.attr,
  3357. &dev_attr_qdss_tr_stop.attr,
  3358. &dev_attr_qdss_conf_download.attr,
  3359. &dev_attr_hw_trc_override.attr,
  3360. &dev_attr_wpss_boot.attr,
  3361. &dev_attr_wlan_en_delay.attr,
  3362. NULL,
  3363. };
  3364. static struct attribute_group icnss_attr_group = {
  3365. .attrs = icnss_attrs,
  3366. };
  3367. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3368. {
  3369. struct device *dev = &priv->pdev->dev;
  3370. int ret;
  3371. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3372. if (ret) {
  3373. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3374. ret);
  3375. goto out;
  3376. }
  3377. return 0;
  3378. out:
  3379. return ret;
  3380. }
  3381. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3382. {
  3383. sysfs_remove_link(kernel_kobj, "icnss");
  3384. }
  3385. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3386. union icnss_device_group_devres {
  3387. const struct attribute_group *group;
  3388. };
  3389. static void devm_icnss_group_remove(struct device *dev, void *res)
  3390. {
  3391. union icnss_device_group_devres *devres = res;
  3392. const struct attribute_group *group = devres->group;
  3393. icnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3394. sysfs_remove_group(&dev->kobj, group);
  3395. }
  3396. static int devm_icnss_group_match(struct device *dev, void *res, void *data)
  3397. {
  3398. return ((union icnss_device_group_devres *)res) == data;
  3399. }
  3400. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3401. {
  3402. WARN_ON(devres_release(&priv->pdev->dev,
  3403. devm_icnss_group_remove, devm_icnss_group_match,
  3404. (void *)&icnss_attr_group));
  3405. }
  3406. #else
  3407. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3408. {
  3409. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3410. }
  3411. #endif
  3412. static int icnss_sysfs_create(struct icnss_priv *priv)
  3413. {
  3414. int ret = 0;
  3415. ret = devm_device_add_group(&priv->pdev->dev,
  3416. &icnss_attr_group);
  3417. if (ret) {
  3418. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3419. ret);
  3420. goto out;
  3421. }
  3422. icnss_create_sysfs_link(priv);
  3423. ret = icnss_create_shutdown_sysfs(priv);
  3424. if (ret)
  3425. goto remove_icnss_group;
  3426. return 0;
  3427. remove_icnss_group:
  3428. icnss_devm_device_remove_group(priv);
  3429. out:
  3430. return ret;
  3431. }
  3432. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3433. {
  3434. icnss_destroy_shutdown_sysfs(priv);
  3435. icnss_remove_sysfs_link(priv);
  3436. icnss_devm_device_remove_group(priv);
  3437. }
  3438. static int icnss_resource_parse(struct icnss_priv *priv)
  3439. {
  3440. int ret = 0, i = 0, irq = 0;
  3441. struct platform_device *pdev = priv->pdev;
  3442. struct device *dev = &pdev->dev;
  3443. struct resource *res;
  3444. u32 int_prop;
  3445. ret = icnss_get_vreg(priv);
  3446. if (ret) {
  3447. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3448. goto out;
  3449. }
  3450. ret = icnss_get_clk(priv);
  3451. if (ret) {
  3452. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3453. goto put_vreg;
  3454. }
  3455. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3456. ret = icnss_get_psf_info(priv);
  3457. if (ret < 0)
  3458. goto out;
  3459. priv->psf_supported = true;
  3460. }
  3461. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3462. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3463. "membase");
  3464. if (!res) {
  3465. icnss_pr_err("Memory base not found in DT\n");
  3466. ret = -EINVAL;
  3467. goto put_clk;
  3468. }
  3469. priv->mem_base_pa = res->start;
  3470. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3471. resource_size(res));
  3472. if (!priv->mem_base_va) {
  3473. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3474. &priv->mem_base_pa);
  3475. ret = -EINVAL;
  3476. goto put_clk;
  3477. }
  3478. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3479. &priv->mem_base_pa,
  3480. priv->mem_base_va);
  3481. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3482. irq = platform_get_irq(pdev, i);
  3483. if (irq < 0) {
  3484. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3485. ret = -ENODEV;
  3486. goto put_clk;
  3487. } else {
  3488. priv->ce_irqs[i] = irq;
  3489. }
  3490. }
  3491. if (of_property_read_bool(pdev->dev.of_node,
  3492. "qcom,is_low_power")) {
  3493. priv->low_power_support = true;
  3494. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3495. }
  3496. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3497. &priv->rf_subtype) == 0) {
  3498. priv->is_rf_subtype_valid = true;
  3499. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3500. }
  3501. if (of_property_read_bool(pdev->dev.of_node,
  3502. "qcom,is_slate_rfa")) {
  3503. priv->is_slate_rfa = true;
  3504. icnss_pr_err("SLATE rfa is enabled\n");
  3505. }
  3506. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3507. priv->device_id == WCN6450_DEVICE_ID) {
  3508. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3509. "msi_addr");
  3510. if (!res) {
  3511. icnss_pr_err("MSI address not found in DT\n");
  3512. ret = -EINVAL;
  3513. goto put_clk;
  3514. }
  3515. priv->msi_addr_pa = res->start;
  3516. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3517. PAGE_SIZE,
  3518. DMA_FROM_DEVICE, 0);
  3519. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3520. icnss_pr_err("MSI: failed to map msi address\n");
  3521. priv->msi_addr_iova = 0;
  3522. ret = -ENOMEM;
  3523. goto put_clk;
  3524. }
  3525. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3526. &priv->msi_addr_pa,
  3527. priv->msi_addr_iova);
  3528. ret = of_property_read_u32_index(dev->of_node,
  3529. "interrupts",
  3530. 1,
  3531. &int_prop);
  3532. if (ret) {
  3533. icnss_pr_dbg("Read interrupt prop failed");
  3534. goto put_clk;
  3535. }
  3536. priv->msi_base_data = int_prop + 32;
  3537. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3538. priv->msi_base_data, int_prop);
  3539. icnss_get_msi_assignment(priv);
  3540. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3541. irq = platform_get_irq(priv->pdev, i);
  3542. if (irq < 0) {
  3543. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3544. ret = -ENODEV;
  3545. goto put_clk;
  3546. } else {
  3547. priv->srng_irqs[i] = irq;
  3548. }
  3549. }
  3550. }
  3551. return 0;
  3552. put_clk:
  3553. icnss_put_clk(priv);
  3554. put_vreg:
  3555. icnss_put_vreg(priv);
  3556. out:
  3557. return ret;
  3558. }
  3559. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3560. {
  3561. int ret = 0;
  3562. struct platform_device *pdev = priv->pdev;
  3563. struct device *dev = &pdev->dev;
  3564. struct device_node *np = NULL;
  3565. u64 prop_size = 0;
  3566. const __be32 *addrp = NULL;
  3567. np = of_parse_phandle(dev->of_node,
  3568. "qcom,wlan-msa-fixed-region", 0);
  3569. if (np) {
  3570. addrp = of_get_address(np, 0, &prop_size, NULL);
  3571. if (!addrp) {
  3572. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3573. ret = -EINVAL;
  3574. of_node_put(np);
  3575. goto out;
  3576. }
  3577. priv->msa_pa = of_translate_address(np, addrp);
  3578. if (priv->msa_pa == OF_BAD_ADDR) {
  3579. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3580. ret = -EINVAL;
  3581. of_node_put(np);
  3582. goto out;
  3583. }
  3584. of_node_put(np);
  3585. priv->msa_va = memremap(priv->msa_pa,
  3586. (unsigned long)prop_size, MEMREMAP_WT);
  3587. if (!priv->msa_va) {
  3588. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3589. &priv->msa_pa);
  3590. ret = -EINVAL;
  3591. goto out;
  3592. }
  3593. priv->msa_mem_size = prop_size;
  3594. } else {
  3595. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3596. &priv->msa_mem_size);
  3597. if (ret || priv->msa_mem_size == 0) {
  3598. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3599. priv->msa_mem_size, ret);
  3600. goto out;
  3601. }
  3602. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3603. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3604. if (!priv->msa_va) {
  3605. icnss_pr_err("DMA alloc failed for MSA\n");
  3606. ret = -ENOMEM;
  3607. goto out;
  3608. }
  3609. }
  3610. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3611. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3612. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3613. "qcom,fw-prefix");
  3614. return 0;
  3615. out:
  3616. return ret;
  3617. }
  3618. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3619. struct device *dev, unsigned long iova,
  3620. int flags, void *handler_token)
  3621. {
  3622. struct icnss_priv *priv = handler_token;
  3623. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3624. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3625. if (!priv) {
  3626. icnss_pr_err("priv is NULL\n");
  3627. return -ENODEV;
  3628. }
  3629. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3630. fw_down_data.crashed = true;
  3631. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3632. &fw_down_data);
  3633. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3634. &fw_down_data);
  3635. }
  3636. icnss_trigger_recovery(&priv->pdev->dev);
  3637. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3638. return -ENOSYS;
  3639. }
  3640. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3641. {
  3642. int ret = 0;
  3643. struct platform_device *pdev = priv->pdev;
  3644. struct device *dev = &pdev->dev;
  3645. const char *iommu_dma_type;
  3646. struct resource *res;
  3647. u32 addr_win[2];
  3648. ret = of_property_read_u32_array(dev->of_node,
  3649. "qcom,iommu-dma-addr-pool",
  3650. addr_win,
  3651. ARRAY_SIZE(addr_win));
  3652. if (ret) {
  3653. icnss_pr_err("SMMU IOVA base not found\n");
  3654. } else {
  3655. priv->smmu_iova_start = addr_win[0];
  3656. priv->smmu_iova_len = addr_win[1];
  3657. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3658. &priv->smmu_iova_start,
  3659. priv->smmu_iova_len);
  3660. priv->iommu_domain =
  3661. iommu_get_domain_for_dev(&pdev->dev);
  3662. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3663. &iommu_dma_type);
  3664. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3665. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3666. priv->smmu_s1_enable = true;
  3667. if (priv->device_id == WCN6750_DEVICE_ID ||
  3668. priv->device_id == WCN6450_DEVICE_ID)
  3669. iommu_set_fault_handler(priv->iommu_domain,
  3670. icnss_smmu_fault_handler,
  3671. priv);
  3672. }
  3673. res = platform_get_resource_byname(pdev,
  3674. IORESOURCE_MEM,
  3675. "smmu_iova_ipa");
  3676. if (!res) {
  3677. icnss_pr_err("SMMU IOVA IPA not found\n");
  3678. } else {
  3679. priv->smmu_iova_ipa_start = res->start;
  3680. priv->smmu_iova_ipa_current = res->start;
  3681. priv->smmu_iova_ipa_len = resource_size(res);
  3682. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3683. &priv->smmu_iova_ipa_start,
  3684. priv->smmu_iova_ipa_len);
  3685. }
  3686. }
  3687. return 0;
  3688. }
  3689. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3690. {
  3691. if (!priv)
  3692. return -ENODEV;
  3693. if (!priv->smmu_iova_len)
  3694. return -EINVAL;
  3695. *addr = priv->smmu_iova_start;
  3696. *size = priv->smmu_iova_len;
  3697. return 0;
  3698. }
  3699. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3700. {
  3701. if (!priv)
  3702. return -ENODEV;
  3703. if (!priv->smmu_iova_ipa_len)
  3704. return -EINVAL;
  3705. *addr = priv->smmu_iova_ipa_start;
  3706. *size = priv->smmu_iova_ipa_len;
  3707. return 0;
  3708. }
  3709. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3710. char *name)
  3711. {
  3712. if (!priv)
  3713. return;
  3714. if (!priv->use_prefix_path) {
  3715. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3716. return;
  3717. }
  3718. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3719. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3720. ADRASTEA_PATH_PREFIX "%s", name);
  3721. else if (priv->device_id == WCN6750_DEVICE_ID)
  3722. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3723. QCA6750_PATH_PREFIX "%s", name);
  3724. else if (priv->device_id == WCN6450_DEVICE_ID)
  3725. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3726. WCN6450_PATH_PREFIX "%s", name);
  3727. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3728. }
  3729. static const struct platform_device_id icnss_platform_id_table[] = {
  3730. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3731. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3732. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3733. { },
  3734. };
  3735. static const struct of_device_id icnss_dt_match[] = {
  3736. {
  3737. .compatible = "qcom,wcn6750",
  3738. .data = (void *)&icnss_platform_id_table[0]},
  3739. {
  3740. .compatible = "qcom,icnss",
  3741. .data = (void *)&icnss_platform_id_table[1]},
  3742. {
  3743. .compatible = "qcom,wcn6450",
  3744. .data = (void *)&icnss_platform_id_table[2]},
  3745. { },
  3746. };
  3747. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3748. static void icnss_init_control_params(struct icnss_priv *priv)
  3749. {
  3750. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3751. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3752. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3753. if (priv->device_id == WCN6750_DEVICE_ID ||
  3754. priv->device_id == WCN6450_DEVICE_ID ||
  3755. of_property_read_bool(priv->pdev->dev.of_node,
  3756. "wpss-support-enable"))
  3757. priv->wpss_supported = true;
  3758. if (of_property_read_bool(priv->pdev->dev.of_node,
  3759. "bdf-download-support"))
  3760. priv->bdf_download_support = true;
  3761. if (of_property_read_bool(priv->pdev->dev.of_node,
  3762. "rproc-fw-download"))
  3763. priv->rproc_fw_download = true;
  3764. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3765. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3766. }
  3767. static void icnss_read_device_configs(struct icnss_priv *priv)
  3768. {
  3769. if (of_property_read_bool(priv->pdev->dev.of_node,
  3770. "wlan-ipa-disabled")) {
  3771. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3772. }
  3773. if (of_property_read_bool(priv->pdev->dev.of_node,
  3774. "qcom,wpss-self-recovery"))
  3775. priv->wpss_self_recovery_enabled = true;
  3776. }
  3777. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3778. {
  3779. pm_runtime_get_sync(&priv->pdev->dev);
  3780. pm_runtime_forbid(&priv->pdev->dev);
  3781. pm_runtime_set_active(&priv->pdev->dev);
  3782. pm_runtime_enable(&priv->pdev->dev);
  3783. }
  3784. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3785. {
  3786. pm_runtime_disable(&priv->pdev->dev);
  3787. pm_runtime_allow(&priv->pdev->dev);
  3788. pm_runtime_put_sync(&priv->pdev->dev);
  3789. }
  3790. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3791. {
  3792. return of_property_read_bool(priv->pdev->dev.of_node,
  3793. "use-nv-mac");
  3794. }
  3795. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3796. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3797. {
  3798. struct icnss_subsys_restart_level_data *restart_level_data;
  3799. icnss_pr_info("rproc name: %s recovery disable: %d",
  3800. rproc->name, rproc->recovery_disabled);
  3801. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3802. if (!restart_level_data)
  3803. return;
  3804. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3805. if (rproc->recovery_disabled)
  3806. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3807. else
  3808. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3809. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3810. 0, restart_level_data);
  3811. }
  3812. }
  3813. #endif
  3814. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3815. static void icnss_initialize_mem_pool(unsigned long device_id)
  3816. {
  3817. cnss_initialize_prealloc_pool(device_id);
  3818. }
  3819. static void icnss_deinitialize_mem_pool(void)
  3820. {
  3821. cnss_deinitialize_prealloc_pool();
  3822. }
  3823. #else
  3824. static void icnss_initialize_mem_pool(unsigned long device_id)
  3825. {
  3826. }
  3827. static void icnss_deinitialize_mem_pool(void)
  3828. {
  3829. }
  3830. #endif
  3831. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3832. static void register_rproc_restart_level_notifier(void)
  3833. {
  3834. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3835. }
  3836. #else
  3837. static void register_rproc_restart_level_notifier(void)
  3838. {
  3839. return;
  3840. }
  3841. #endif
  3842. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3843. static void unregister_rproc_restart_level_notifier(void)
  3844. {
  3845. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3846. }
  3847. #else
  3848. static void unregister_rproc_restart_level_notifier(void)
  3849. {
  3850. return;
  3851. }
  3852. #endif
  3853. static int icnss_probe(struct platform_device *pdev)
  3854. {
  3855. int ret = 0;
  3856. struct device *dev = &pdev->dev;
  3857. struct icnss_priv *priv;
  3858. const struct of_device_id *of_id;
  3859. const struct platform_device_id *device_id;
  3860. if (dev_get_drvdata(dev)) {
  3861. icnss_pr_err("Driver is already initialized\n");
  3862. return -EEXIST;
  3863. }
  3864. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3865. if (!of_id || !of_id->data) {
  3866. icnss_pr_err("Failed to find of match device!\n");
  3867. ret = -ENODEV;
  3868. goto out_reset_drvdata;
  3869. }
  3870. device_id = of_id->data;
  3871. icnss_pr_dbg("Platform driver probe\n");
  3872. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3873. if (!priv)
  3874. return -ENOMEM;
  3875. priv->magic = ICNSS_MAGIC;
  3876. dev_set_drvdata(dev, priv);
  3877. priv->pdev = pdev;
  3878. priv->device_id = device_id->driver_data;
  3879. priv->is_chain1_supported = true;
  3880. INIT_LIST_HEAD(&priv->vreg_list);
  3881. INIT_LIST_HEAD(&priv->clk_list);
  3882. icnss_allow_recursive_recovery(dev);
  3883. icnss_initialize_mem_pool(priv->device_id);
  3884. icnss_init_control_params(priv);
  3885. icnss_read_device_configs(priv);
  3886. ret = icnss_resource_parse(priv);
  3887. if (ret)
  3888. goto out_reset_drvdata;
  3889. ret = icnss_msa_dt_parse(priv);
  3890. if (ret)
  3891. goto out_free_resources;
  3892. ret = icnss_smmu_dt_parse(priv);
  3893. if (ret)
  3894. goto out_free_resources;
  3895. spin_lock_init(&priv->event_lock);
  3896. spin_lock_init(&priv->on_off_lock);
  3897. spin_lock_init(&priv->soc_wake_msg_lock);
  3898. mutex_init(&priv->dev_lock);
  3899. mutex_init(&priv->tcdev_lock);
  3900. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3901. if (!priv->event_wq) {
  3902. icnss_pr_err("Workqueue creation failed\n");
  3903. ret = -EFAULT;
  3904. goto smmu_cleanup;
  3905. }
  3906. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3907. INIT_LIST_HEAD(&priv->event_list);
  3908. if (priv->is_slate_rfa)
  3909. init_completion(&priv->slate_boot_complete);
  3910. ret = icnss_register_fw_service(priv);
  3911. if (ret < 0) {
  3912. icnss_pr_err("fw service registration failed: %d\n", ret);
  3913. goto out_destroy_wq;
  3914. }
  3915. icnss_power_misc_params_init(priv);
  3916. icnss_enable_recovery(priv);
  3917. icnss_debugfs_create(priv);
  3918. icnss_sysfs_create(priv);
  3919. ret = device_init_wakeup(&priv->pdev->dev, true);
  3920. if (ret)
  3921. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3922. ret);
  3923. icnss_set_plat_priv(priv);
  3924. init_completion(&priv->unblock_shutdown);
  3925. if (priv->device_id == WCN6750_DEVICE_ID ||
  3926. priv->device_id == WCN6450_DEVICE_ID) {
  3927. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3928. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3929. if (!priv->soc_wake_wq) {
  3930. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3931. ret = -EFAULT;
  3932. goto out_unregister_fw_service;
  3933. }
  3934. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3935. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3936. ret = icnss_genl_init();
  3937. if (ret < 0)
  3938. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3939. init_completion(&priv->smp2p_soc_wake_wait);
  3940. icnss_runtime_pm_init(priv);
  3941. icnss_aop_interface_init(priv);
  3942. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3943. priv->bdf_download_support = true;
  3944. register_rproc_restart_level_notifier();
  3945. }
  3946. if (priv->wpss_supported) {
  3947. ret = icnss_dms_init(priv);
  3948. if (ret)
  3949. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3950. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3951. icnss_pr_dbg("NV MAC feature is %s\n",
  3952. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3953. }
  3954. if (priv->wpss_supported || priv->rproc_fw_download)
  3955. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3956. timer_setup(&priv->recovery_timer,
  3957. icnss_recovery_timeout_hdlr, 0);
  3958. if (priv->wpss_self_recovery_enabled) {
  3959. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3960. timer_setup(&priv->wpss_ssr_timer,
  3961. icnss_wpss_ssr_timeout_hdlr, 0);
  3962. }
  3963. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3964. icnss_pr_info("Platform driver probed successfully\n");
  3965. return 0;
  3966. out_unregister_fw_service:
  3967. icnss_unregister_fw_service(priv);
  3968. out_destroy_wq:
  3969. destroy_workqueue(priv->event_wq);
  3970. smmu_cleanup:
  3971. priv->iommu_domain = NULL;
  3972. out_free_resources:
  3973. icnss_put_resources(priv);
  3974. out_reset_drvdata:
  3975. icnss_deinitialize_mem_pool();
  3976. dev_set_drvdata(dev, NULL);
  3977. return ret;
  3978. }
  3979. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3980. {
  3981. if (IS_ERR_OR_NULL(ramdump_info))
  3982. return;
  3983. device_unregister(ramdump_info->dev);
  3984. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3985. kfree(ramdump_info);
  3986. }
  3987. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3988. {
  3989. if (priv->batt_psy)
  3990. power_supply_put(penv->batt_psy);
  3991. if (priv->psf_supported) {
  3992. flush_workqueue(priv->soc_update_wq);
  3993. destroy_workqueue(priv->soc_update_wq);
  3994. power_supply_unreg_notifier(&priv->psf_nb);
  3995. }
  3996. }
  3997. static int icnss_remove(struct platform_device *pdev)
  3998. {
  3999. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  4000. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  4001. del_timer(&priv->recovery_timer);
  4002. if (priv->wpss_self_recovery_enabled)
  4003. del_timer(&priv->wpss_ssr_timer);
  4004. device_init_wakeup(&priv->pdev->dev, false);
  4005. icnss_debugfs_destroy(priv);
  4006. icnss_unregister_power_supply_notifier(penv);
  4007. icnss_sysfs_destroy(priv);
  4008. complete_all(&priv->unblock_shutdown);
  4009. if (priv->is_slate_rfa) {
  4010. complete(&priv->slate_boot_complete);
  4011. icnss_slate_ssr_unregister_notifier(priv);
  4012. icnss_unregister_slate_event_notifier(priv);
  4013. }
  4014. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  4015. if (priv->wpss_supported) {
  4016. icnss_dms_deinit(priv);
  4017. icnss_wpss_early_ssr_unregister_notifier(priv);
  4018. icnss_wpss_ssr_unregister_notifier(priv);
  4019. } else {
  4020. icnss_modem_ssr_unregister_notifier(priv);
  4021. icnss_pdr_unregister_notifier(priv);
  4022. }
  4023. if (priv->device_id == WCN6750_DEVICE_ID ||
  4024. priv->device_id == WCN6450_DEVICE_ID) {
  4025. icnss_genl_exit();
  4026. icnss_runtime_pm_deinit(priv);
  4027. unregister_rproc_restart_level_notifier();
  4028. complete_all(&priv->smp2p_soc_wake_wait);
  4029. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  4030. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  4031. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  4032. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  4033. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  4034. if (priv->soc_wake_wq)
  4035. destroy_workqueue(priv->soc_wake_wq);
  4036. icnss_aop_interface_deinit(priv);
  4037. }
  4038. class_destroy(priv->icnss_ramdump_class);
  4039. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  4040. icnss_unregister_fw_service(priv);
  4041. if (priv->event_wq)
  4042. destroy_workqueue(priv->event_wq);
  4043. priv->iommu_domain = NULL;
  4044. icnss_hw_power_off(priv);
  4045. icnss_put_resources(priv);
  4046. icnss_deinitialize_mem_pool();
  4047. dev_set_drvdata(&pdev->dev, NULL);
  4048. return 0;
  4049. }
  4050. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  4051. {
  4052. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  4053. /* This is to handle if slate is not up and modem SSR is triggered */
  4054. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  4055. return;
  4056. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  4057. ICNSS_ASSERT(0);
  4058. }
  4059. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  4060. {
  4061. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  4062. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  4063. priv->state);
  4064. schedule_work(&wpss_ssr_work);
  4065. }
  4066. #ifdef CONFIG_PM_SLEEP
  4067. static int icnss_pm_suspend(struct device *dev)
  4068. {
  4069. struct icnss_priv *priv = dev_get_drvdata(dev);
  4070. int ret = 0;
  4071. if (priv->magic != ICNSS_MAGIC) {
  4072. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4073. dev, priv, priv->magic);
  4074. return -EINVAL;
  4075. }
  4076. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4077. if (!priv->ops || !priv->ops->pm_suspend ||
  4078. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4079. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4080. return 0;
  4081. ret = priv->ops->pm_suspend(dev);
  4082. if (ret == 0) {
  4083. if (priv->device_id == WCN6750_DEVICE_ID ||
  4084. priv->device_id == WCN6450_DEVICE_ID) {
  4085. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4086. !test_bit(ICNSS_MODE_ON, &priv->state))
  4087. return 0;
  4088. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4089. ICNSS_SMP2P_OUT_POWER_SAVE);
  4090. }
  4091. priv->stats.pm_suspend++;
  4092. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4093. } else {
  4094. priv->stats.pm_suspend_err++;
  4095. }
  4096. return ret;
  4097. }
  4098. static int icnss_pm_resume(struct device *dev)
  4099. {
  4100. struct icnss_priv *priv = dev_get_drvdata(dev);
  4101. int ret = 0;
  4102. if (priv->magic != ICNSS_MAGIC) {
  4103. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4104. dev, priv, priv->magic);
  4105. return -EINVAL;
  4106. }
  4107. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4108. if (!priv->ops || !priv->ops->pm_resume ||
  4109. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4110. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4111. goto out;
  4112. ret = priv->ops->pm_resume(dev);
  4113. out:
  4114. if (ret == 0) {
  4115. priv->stats.pm_resume++;
  4116. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4117. } else {
  4118. priv->stats.pm_resume_err++;
  4119. }
  4120. return ret;
  4121. }
  4122. static int icnss_pm_suspend_noirq(struct device *dev)
  4123. {
  4124. struct icnss_priv *priv = dev_get_drvdata(dev);
  4125. int ret = 0;
  4126. if (priv->magic != ICNSS_MAGIC) {
  4127. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4128. dev, priv, priv->magic);
  4129. return -EINVAL;
  4130. }
  4131. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4132. if (!priv->ops || !priv->ops->suspend_noirq ||
  4133. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4134. goto out;
  4135. ret = priv->ops->suspend_noirq(dev);
  4136. out:
  4137. if (ret == 0) {
  4138. priv->stats.pm_suspend_noirq++;
  4139. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4140. } else {
  4141. priv->stats.pm_suspend_noirq_err++;
  4142. }
  4143. return ret;
  4144. }
  4145. static int icnss_pm_resume_noirq(struct device *dev)
  4146. {
  4147. struct icnss_priv *priv = dev_get_drvdata(dev);
  4148. int ret = 0;
  4149. if (priv->magic != ICNSS_MAGIC) {
  4150. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4151. dev, priv, priv->magic);
  4152. return -EINVAL;
  4153. }
  4154. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4155. if (!priv->ops || !priv->ops->resume_noirq ||
  4156. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4157. goto out;
  4158. ret = priv->ops->resume_noirq(dev);
  4159. out:
  4160. if (ret == 0) {
  4161. priv->stats.pm_resume_noirq++;
  4162. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4163. } else {
  4164. priv->stats.pm_resume_noirq_err++;
  4165. }
  4166. return ret;
  4167. }
  4168. static int icnss_pm_runtime_suspend(struct device *dev)
  4169. {
  4170. struct icnss_priv *priv = dev_get_drvdata(dev);
  4171. int ret = 0;
  4172. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4173. icnss_pr_err("Ignore runtime suspend:\n");
  4174. goto out;
  4175. }
  4176. if (priv->magic != ICNSS_MAGIC) {
  4177. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4178. dev, priv, priv->magic);
  4179. return -EINVAL;
  4180. }
  4181. if (!priv->ops || !priv->ops->runtime_suspend ||
  4182. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4183. goto out;
  4184. icnss_pr_vdbg("Runtime suspend\n");
  4185. ret = priv->ops->runtime_suspend(dev);
  4186. if (!ret) {
  4187. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4188. !test_bit(ICNSS_MODE_ON, &priv->state))
  4189. return 0;
  4190. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4191. ICNSS_SMP2P_OUT_POWER_SAVE);
  4192. }
  4193. out:
  4194. return ret;
  4195. }
  4196. static int icnss_pm_runtime_resume(struct device *dev)
  4197. {
  4198. struct icnss_priv *priv = dev_get_drvdata(dev);
  4199. int ret = 0;
  4200. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4201. icnss_pr_err("Ignore runtime resume\n");
  4202. goto out;
  4203. }
  4204. if (priv->magic != ICNSS_MAGIC) {
  4205. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4206. dev, priv, priv->magic);
  4207. return -EINVAL;
  4208. }
  4209. if (!priv->ops || !priv->ops->runtime_resume ||
  4210. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4211. goto out;
  4212. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4213. ret = priv->ops->runtime_resume(dev);
  4214. out:
  4215. return ret;
  4216. }
  4217. static int icnss_pm_runtime_idle(struct device *dev)
  4218. {
  4219. struct icnss_priv *priv = dev_get_drvdata(dev);
  4220. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4221. icnss_pr_err("Ignore runtime idle\n");
  4222. goto out;
  4223. }
  4224. icnss_pr_vdbg("Runtime idle\n");
  4225. pm_request_autosuspend(dev);
  4226. out:
  4227. return -EBUSY;
  4228. }
  4229. #endif
  4230. static const struct dev_pm_ops icnss_pm_ops = {
  4231. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4232. icnss_pm_resume)
  4233. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4234. icnss_pm_resume_noirq)
  4235. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4236. icnss_pm_runtime_idle)
  4237. };
  4238. static struct platform_driver icnss_driver = {
  4239. .probe = icnss_probe,
  4240. .remove = icnss_remove,
  4241. .driver = {
  4242. .name = "icnss2",
  4243. .pm = &icnss_pm_ops,
  4244. .of_match_table = icnss_dt_match,
  4245. },
  4246. };
  4247. static int __init icnss_initialize(void)
  4248. {
  4249. icnss_debug_init();
  4250. return platform_driver_register(&icnss_driver);
  4251. }
  4252. static void __exit icnss_exit(void)
  4253. {
  4254. platform_driver_unregister(&icnss_driver);
  4255. icnss_debug_deinit();
  4256. }
  4257. module_init(icnss_initialize);
  4258. module_exit(icnss_exit);
  4259. MODULE_LICENSE("GPL v2");
  4260. MODULE_DESCRIPTION("iWCN CORE platform driver");